WO2025102427A1 - 一种悬浮电容三电平boost变换器及控制方法 - Google Patents

一种悬浮电容三电平boost变换器及控制方法 Download PDF

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Publication number
WO2025102427A1
WO2025102427A1 PCT/CN2023/134616 CN2023134616W WO2025102427A1 WO 2025102427 A1 WO2025102427 A1 WO 2025102427A1 CN 2023134616 W CN2023134616 W CN 2023134616W WO 2025102427 A1 WO2025102427 A1 WO 2025102427A1
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Prior art keywords
power device
switch
boost converter
diode
capacitor
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English (en)
French (fr)
Inventor
汪昌友
潘年安
冯纪归
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Sungrow Power Supply Co Ltd
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Sungrow Power Supply Co Ltd
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Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of DC power input into DC power output
    • H02M3/02Conversion of DC power input into DC power output without intermediate conversion into AC
    • H02M3/04Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
    • H02M3/10Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/08Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/088Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/32Means for protecting converters other than automatic disconnection
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/36Means for starting or stopping converters

Definitions

  • the present application relates to the field of power electronics technology, and in particular to a suspended capacitor three-level Boost converter and a control method thereof.
  • the suspended capacitor three-level Boost converter is widely used in high-voltage DC-DC conversion scenarios due to its advantages such as low switching stress and small ripple current.
  • FIG1 is a typical floating capacitor three-level Boost topology, including an input capacitor Cin, an output capacitor Cout, an inductor L, a first diode D1, a second diode D2, a first switch tube Q1, a second switch tube Q2, a first switch K1, and a floating capacitor Cf.
  • the first switch K1 is used to prevent the second switch tube Q2 from being over-voltage and broken down due to the instantaneous power-on of the input high voltage.
  • the present application provides a suspended capacitor three-level Boost converter and a control method to avoid the risk of overvoltage failure of switching devices.
  • the present application provides a suspended capacitor three-level Boost converter, comprising: a controller, an inductor, a first power device, a second power device, a first diode, a second diode, a first switch and a suspended capacitor;
  • the first end and the second end of the inductor are connected to the positive input end of the Boost converter and the anode of the first diode respectively, and the anode and the cathode of the second diode are connected to the cathode of the first diode and the positive output end of the Boost converter respectively;
  • the first end and the second end of the first power device are connected to the second end of the inductor and the first end of the second power device respectively, and the second end of the second power device is connected to the negative input end of the Boost converter;
  • the first end and the second end are respectively connected to the second end of the first power device and the first end of the suspended capacitor, and the second end of the suspended capacitor is connected to the cathode of the first diode;
  • the controller is used to control the disconnection time of the first switch to lag behind the disconnection time of the first power device and the second power device.
  • the controller is specifically configured to, upon receiving a shutdown instruction of the Boost converter or requiring a fault shutdown, first send a shutdown signal to the first power device and the second power device, and then send a shutdown signal to the first switch after a preset time interval.
  • it also includes: a delay circuit
  • the controller is specifically used to send a shutdown signal to the first power device, the second power device and the first switch when receiving a shutdown instruction of the Boost converter or a fault shutdown is required;
  • the shutdown signal sent by the controller to the first switch is output to the first switch after being delayed by a preset time by the delay circuit.
  • the delay circuit comprises: a first resistor and a first capacitor;
  • the controller inputs a shutdown signal to the first switch into the first end of the first resistor, the second end of the first resistor is connected to the first end of the first capacitor, the second end of the first capacitor is grounded, and the first end of the first capacitor is connected to the control end of the first switch.
  • the delay circuit further comprises: a third diode
  • a cathode of the third diode is connected to the first end of the first resistor, and an anode of the third diode is connected to the second end of the first resistor.
  • the controller comprises: a first output terminal, a second output terminal and a third output terminal;
  • the first output end is connected to the control end of the first power device, the second output end is connected to the control end of the second power device, the third output end is connected to the first end of the delay circuit, and the second end of the delay circuit is connected to the control end of the first switch;
  • the controller sends a shut-off signal to the first output terminal, the second output terminal, and the third output terminal.
  • it further comprises: a second switch and a second resistor;
  • the first end of the second switch is connected to the second end of the first switch, and the second end of the second switch is connected to the negative input end of the Boost converter through a second resistor.
  • it further comprises: a first voltage balancing circuit and/or a second voltage balancing circuit;
  • the first voltage balancing circuit comprises a resistor and/or a voltage regulator tube, and the second voltage balancing circuit comprises a resistor and/or a voltage regulator tube;
  • the first voltage balancing circuit is connected in parallel to the first end and the second end of the first power device;
  • the second voltage balancing circuit is connected in parallel to the first end and the second end of the second power device.
  • the present application provides a control method for a suspended capacitor three-level Boost converter, wherein the Boost converter comprises: a controller, an inductor, a first power device, a second power device, a first diode, a second diode, a first switch and a suspended capacitor;
  • the method includes:
  • the disconnection time of the first switch is controlled to lag behind the disconnection time of the first power device and the second power device.
  • controlling the disconnection time of the first switch to lag behind the disconnection time of the first power device and the second power device specifically includes:
  • a shutdown signal is sent to the first power device and the second power device, and then a shutdown signal is sent to the first switch after a preset time interval.
  • the Boost converter further comprises: a delay circuit
  • Controlling the disconnection time of the first switch to lag behind the disconnection time of the first power device and the second power device specifically includes:
  • a shutdown signal is sent to the first power device, the second power device and the first switch; the shutdown signal sent to the first switch is delayed by a preset time by a delay circuit and then output to the first switch.
  • the Boost converter shuts down and disconnects the first power device and the second power device
  • the first diode and the second diode are turned on to continue current, and the maximum voltage stress of the first power device will be clamped at the floating capacitor voltage (i.e., half the bus voltage), and the maximum voltage stress of the second power device will be clamped at the difference between the bus voltage and the floating voltage (i.e., clamped at half the bus voltage), thereby effectively solving the risk of overvoltage failure of the first power device and the second power device.
  • FIG1 is a typical floating capacitor three-level Boost topology diagram
  • FIG2 is a schematic diagram of the current path when Q1 is not turned off and K1 is not turned off;
  • FIG3 is a schematic diagram of the current path when Q1 is not turned off and K1 is turned off;
  • FIG4 is a schematic diagram of the current path when Q2 is not turned off and K1 is not turned off;
  • FIG5 is a schematic diagram of the current path when Q2 is not turned off and K1 is turned off;
  • FIG6 is a schematic diagram of a Boost converter provided in an embodiment of the present application.
  • FIG7 is a schematic diagram of a delay control provided in an embodiment of the present application.
  • FIG10 is a schematic diagram of another Boost converter provided in an embodiment of the present application.
  • FIG. 11 is a flow chart of a control method for a suspended capacitor three-level Boost converter provided in an embodiment of the present application.
  • the embodiments of the present application do not specifically limit the application scenarios of the suspended capacitor three-level Boost converter.
  • it can be applied to photovoltaic systems, energy storage systems, and other power electronics scenarios.
  • the controller will send shutdown signals to Q2 and K1. If K1 is turned off first, the inductor current path will switch from D1, Cf, K1, Q2 to D1, D2. At this time, the voltage across the series branch of Q1 and Q2 is equal to the DC bus voltage, but because Q2 has not been turned off, Q1 tube is subjected to the DC bus voltage, causing Q1 to fail due to overvoltage, as shown in Figures 4 and 5.
  • the embodiment of the present application controls the disconnection time of K1 to lag behind the disconnection time of the power devices Q1 and Q2 when the suspended capacitor three-level Boost converter is shut down.
  • Vcf floating capacitor voltage
  • Q2 the maximum voltage stress of Q2 will be clamped at the difference between the bus voltage and the floating capacitor voltage, that is, Vbus-Vcf.
  • Vbus-Vcf Vbus/2, which effectively solves the risk of overvoltage failure of Q1 and Q2.
  • FIG. 6 is a schematic diagram of a suspended capacitor three-level Boost converter provided in an embodiment of the present application.
  • the suspended capacitor three-level Boost converter provided in the embodiment of the present application includes: a controller 100, an inductor L, a first power device Q1, a second power device Q2, a first diode D1, a second diode D2, a first switch K1 and a suspended capacitor Cf;
  • the first end and the second end of the inductor L are respectively connected to the positive input end of the Boost converter and the anode of the first diode D1, and the anode and the cathode of the second diode D2 are respectively connected to the cathode of the first diode D1 and the positive output end of the Boost converter;
  • the first end and the second end of the first power device Q1 are respectively connected to the second end of the inductor L and the first end of the second power device Q2, and the second end of the second power device Q2 is connected to the negative input end of the Boost converter; the first end and the second end of the first switch K1 are respectively connected to the second end of the first power device Q1 and the first end of the floating capacitor Cf, and the second end of the floating capacitor Cf is connected to the cathode of the first diode D1;
  • the controller 100 is used to control the disconnection time of the first switch K1 to lag behind the disconnection time of the first power device Q1 and the second power device Q2.
  • the embodiment of the present application does not specifically limit the implementation method of the delayed shutdown of K1.
  • the shutdown signal that lags behind the first switch tube Q1 and the second switch tube Q2 can be directly output by the control, or the shutdown signal delay can be implemented by a hardware circuit.
  • the controller is specifically used to send a shutdown signal to the first power device and the second power device when receiving a shutdown instruction of the Boost converter or a fault shutdown is required, and then send a shutdown signal to the first switch after a preset time interval.
  • the first switch is turned off later than the first switch and the second switch.
  • the embodiment of the present application does not specifically limit the length of the preset time, as long as the preset time can ensure that the turn-off time of the first switch lags behind the turn-off time of the first power device and the second power device.
  • FIG. 7 is a schematic diagram of delay control provided in an embodiment of the present application.
  • the Boost converter provided in the embodiment of the present application further includes: a delay circuit 200;
  • the controller 100 is specifically configured to send shutdown signals PWM-Q1, PWM-Q2 and PWM-K1 to the first power device Q1, the second power device Q2 and the first switch K1 respectively when receiving a shutdown instruction of the Boost converter or a fault shutdown is required.
  • the turn-off signal sent by the controller 100 to the first switch K1 is output to the first switch K1 after being delayed by a preset time by the delay circuit 200 .
  • the controller 100 includes: a first output terminal, a second output terminal and a third output terminal;
  • the first output terminal is connected to the control terminal of the first power device Q1
  • the second output terminal is connected to the control terminal of the second power device Q2
  • the third output terminal is connected to the first terminal of the delay circuit 200
  • the second terminal of the delay circuit 200 is connected to the control terminal of the first switch K1.
  • the controller 100 sends a shutdown signal to the first output terminal, the second output terminal and the third output terminal, namely PWM-Q1, PWM-Q2 and PWM-K1 respectively. Due to the existence of the delay circuit 200, the shutdown signal received by K1 will lag behind the shutdown signals of Q1 and Q2. Therefore, Q1 and Q2 are shut down first, and K1 is shut down after Q1 and Q2. Q1 and Q2 can be shut down synchronously, and Q1 and Q2 can also be shut down asynchronously.
  • FIG. 8 is a schematic diagram of a delay circuit provided in an embodiment of the present application.
  • the delay circuit includes: a first resistor R1 and a first capacitor C1.
  • the controller sends a shutdown signal PWM-K1 to the first switch K1, which is input to the first end of the first resistor R1.
  • the second end of the first resistor R1 is connected to the first end of the first capacitor C1.
  • the second end of the first capacitor C1 is grounded.
  • the first end of the first capacitor C1 is connected to the control end of the first switch K1.
  • the delay circuit further includes: a third diode D3.
  • a cathode of the third diode D3 is connected to the first end of the first resistor R1 , and an anode of the third diode D3 is connected to the second end of the first resistor R1 .
  • the working principle of the delay circuit shown in FIG8 is that when the shutdown signal PWM-K1 is at a high level, the third diode D3 is turned off, PWM-K1 charges C1 through R1, and the voltage across C1 rises slowly, that is, it reaches the set value after a delay period, and K1 is turned off at this time.
  • the shutdown signal PWM-K1 becomes a low level, the third diode D3 is turned on, and the voltage of C1 is quickly discharged to zero through the third diode D3.
  • FIG8 merely illustrates a delay circuit.
  • the delay circuit may also be implemented by a timer, or by an integrated chip such as a CPLD or FPGA.
  • the present application does not specifically limit the specific implementation method of the delay circuit.
  • FIG. 9 is a schematic diagram of another Boost converter provided in an embodiment of the present application.
  • the Boost converter provided in the embodiment of the present application further includes: a second switch K2 and a second resistor R2;
  • a first end of the second switch K2 is connected to the second end of the first switch K1 , and a second end of the second switch K2 is connected to the negative input end of the Boost converter via a second resistor.
  • the second switch K2 and the second resistor R2 form a pre-charging circuit for the floating capacitor Cf, and pre-charge the voltage of the floating capacitor Cf to a set value (Vbus/2) before the Boost converter is started.
  • K2 When the Boost converter is working normally, K2 is normally open, K1 is normally closed (K2 is disconnected), and Q1 and Q2 work at high frequency.
  • the controller will first turn off Q1. At this time, the first diode D1 and the second diode D2 are turned on for freewheeling. Since K1 remains in a closed state, the voltage across Q1 will be clamped at the floating capacitor voltage Vcf (Vbus/2), and the voltage stress of Q2 will be clamped at Vbus-Vcf (Vbus/2).
  • the controller will first disconnect Q2 (disconnect Q1 and Q2), at which time diodes D1 and D2 are turned on for freewheeling. Since K1 remains in a closed state, the voltages across Q1 and Q2 will be clamped at the floating capacitor voltage Vcf (Vbus/2) and Vbus-Vcf (Vbus/2) respectively. Therefore, the technical solution provided in the embodiment of the present application can effectively solve the risk of overvoltage failure of Q1 and Q2.
  • a voltage balancing circuit can be connected in parallel at both ends of one of Q1 and Q2. It should be understood that since Q1 and Q2 are connected in series, when the voltage of one power device is clamped, the voltage of the other power device is also clamped.
  • FIG. 10 is a schematic diagram of another Boost converter provided in an embodiment of the present application.
  • the Boost converter provided in the embodiment of the present application further includes: a first voltage equalizing circuit and/or a second voltage equalizing circuit; FIG10 is introduced by taking two voltage equalizing circuits as an example.
  • the first voltage balancing circuit 300 includes a resistor or a voltage regulator tube
  • the second voltage balancing circuit 400 includes a resistor or a voltage regulator tube
  • the first voltage equalizing circuit 300 is connected in parallel to the first end and the second end of the first power device Q1;
  • the second voltage equalizing circuit 400 is connected in parallel to the first terminal and the second terminal of the second power device Q2 .
  • K1 and K2 are not specifically limited in the embodiments of the present application, and they may be relays or power semiconductor switch devices, wherein the power semiconductor power device may be IGBT or MOS.
  • an embodiment of the present application further provides a control method for a suspended capacitor three-level Boost converter, which is described in detail below with reference to the accompanying drawings.
  • FIG. 11 is a flow chart of a method for controlling a suspended capacitor three-level Boost converter provided in an embodiment of the present application.
  • the Boost converter includes: a controller, an inductor, a first power device, a second power device, a first diode, a second diode, a first switch and a suspended capacitor;
  • the method includes:
  • S1102 Control the disconnection time of the first switch to lag behind the disconnection time of the first power device and the second power device.
  • the embodiment of the present application does not specifically limit the implementation method of the delayed shutdown of the first switch, and can be controlled by software.
  • the control directly outputs a shutdown signal that lags behind the shutdown signal of the first switch tube, and the shutdown signal delay can also be achieved by a hardware circuit.
  • the software implementation method controls the disconnection time of the first switch to lag behind the disconnection time of the first power device and the second power device, specifically including: first sending a shutdown signal to the first power device and the second power device, and then sending a shutdown signal to the first switch after a preset time interval.
  • the Boost converter also includes: a delay circuit; controlling the disconnection time of the first switch to lag behind the disconnection time of the first power device and the second power device, specifically including: sending a shutdown signal to the first power device, the second power device and the first switch; the shutdown signal sent to the first switch is delayed by a preset time by the delay circuit and then output to the first switch.

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  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

本申请公开了一种悬浮电容三电平Boost变换器及控制方法,包括:电感的第一端和第二端分别连接Boost变换器的正输入端和第一二极管的阳极,第二二极管的阳极和阴极分别连接第一二极管的阴极和Boost变换器的正输出端;第一功率器件的第一端和第二端分别连接电感的第二端和第二功率器件的第一端,第二功率器件的第二端连接Boost变换器的负输入端;第一开关的第一端和第二端分别连接第一功率器件的第二端和悬浮电容的第一端,悬浮电容的第二端连接第一二极管的阴极;控制器,用于控制第一开关的断开时刻滞后于第一功率器件和第二功率器件的断开时刻,避免开关器件承受过压失效风险。

Description

一种悬浮电容三电平Boost变换器及控制方法
本申请要求于2023年11月13日提交中国国家知识产权局的申请号为2023115205412、申请名称为“一种悬浮电容三电平Boost变换器及控制方法”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
技术领域
本申请涉及电力电子技术领域,具体涉及一种悬浮电容三电平Boost变换器及控制方法。
背景技术
悬浮电容三电平Boost变换器由于开关应力低、纹波电流小等优势被广泛应用于高压DC-DC变换场景。
图1为一种典型的悬浮电容三电平Boost拓扑,包括输入电容Cin、输出电容Cout,电感L、第一二极管D1、第二二极管D2、第一开关管Q1、第二开关管Q2、第一开关K1、和悬浮电容Cf。
其中第一开关K1是为了防止输入高压上电瞬间导致第二开关管Q2过压被击穿。
由于第一开关管Q1、第二开关管Q2和第一开关K1的关断信号链路的延迟以及器件自身关断速度的差异性,导致Q1、Q2、K1关断时刻不一致,这将使得开关器件承受过压失效风险。
发明内容
有鉴于此,本申请提供一种悬浮电容三电平Boost变换器及控制方法,避免开关器件承受过压失效风险。
本申请提供一种悬浮电容三电平Boost变换器,包括:控制器、电感、第一功率器件、第二功率器件、第一二极管、第二二极管、第一开关和悬浮电容;
电感的第一端和第二端分别连接Boost变换器的正输入端和第一二极管的阳极,第二二极管的阳极和阴极分别连接第一二极管的阴极和Boost变换器的正输出端;
第一功率器件的第一端和第二端分别连接电感的第二端和第二功率器件的第一端,第二功率器件的第二端连接Boost变换器的负输入端;第一开关的 第一端和第二端分别连接第一功率器件的第二端和悬浮电容的第一端,悬浮电容的第二端连接第一二极管的阴极;
控制器,用于控制第一开关的断开时刻滞后于第一功率器件和第二功率器件的断开时刻。
优选地,控制器,具体用于在收到Boost变换器停机指令或需要故障停机时,先向第一功率器件和第二功率器件发送关断信号,再间隔预设时间后向第一开关发送关断信号。
优选地,还包括:延迟电路;
控制器,具体用于在收到Boost变换器停机指令或需要故障停机时,向第一功率器件、第二功率器件和第一开关发送关断信号;
控制器向第一开关发出的关断信号经过延迟电路延迟预设时间后输出给第一开关。
优选地,延迟电路包括:第一电阻和第一电容;
控制器向第一开关发出的关断信号输入第一电阻的第一端,第一电阻的第二端连接第一电容的第一端,第一电容的第二端接地,第一电容的第一端连接第一开关的控制端。
优选地,延迟电路还包括:第三二极管;
第三二极管的阴极连接第一电阻的第一端,第三二极管的阳极连接第一电阻的第二端。
优选地,控制器包括:第一输出端、第二输出端和第三输出端;
第一输出端连接第一功率器件的控制端,第二输出端连接第二功率器件的控制端,第三输出端连接延迟电路的第一端,延迟电路的第二端连接第一开关的控制端;
控制器向第一输出端、第二输出端和第三输出端发送关断信号。
优选地,还包括:第二开关和第二电阻;
第二开关的第一端连接第一开关的第二端,第二开关的第二端通过第二电阻连接Boost变换器的负输入端。
优选地,还包括:第一均压电路和/或第二均压电路;第一均压电路包括电阻和/或稳压管,第二均压电路包括电阻和/或稳压管;
第一均压电路并联在第一功率器件的第一端和第二端;
第二均压电路并联在第二功率器件的第一端和第二端。
本申请提供一种悬浮电容三电平Boost变换器的控制方法,Boost变换器包括:控制器、电感、第一功率器件、第二功率器件、第一二极管、第二二极管、第一开关和悬浮电容;
该方法包括:
收到Boost变换器停机指令或需要故障停机时,控制第一开关的断开时刻滞后于第一功率器件和第二功率器件的断开时刻。
优选地,控制第一开关的断开时刻滞后于第一功率器件和第二功率器件的断开时刻,具体包括:
先向第一功率器件和第二功率器件发送关断信号,再间隔预设时间后向第一开关发送关断信号。
优选地,Boost变换器还包括:延迟电路;
控制第一开关的断开时刻滞后于第一功率器件和第二功率器件的断开时刻,具体包括:
向第一功率器件、第二功率器件和第一开关发送关断信号;向第一开关发出的关断信号经过延迟电路延迟预设时间后输出给第一开关。
由此可见,本申请具有如下有益效果:
本申请实施例提供的控制方法,由于第一开关的断开时刻滞后于第一功率器件和第二功率器件,因此,Boost变换器在停机关断第一功率器件和第二功率器件时,第一二极管和第二二极管导通续流,第一功率器件的最大电压应力将钳位于悬浮电容电压(即半母线电压),第二功率器件的最大电压应力将被钳位于母线电压与悬浮电压之差(即被钳位于半母线电压),从而有效解决了第一功率器件和第二功率器件过压失效风险。
附图说明
图1为一种典型的悬浮电容三电平Boost拓扑图;
图2为Q1未关断K1未关断时的电流路径示意图;
图3为Q1未关断K1关断时的电流路径示意图;
图4为Q2未关断K1未关断时的电流路径示意图;
图5为Q2未关断K1关断时的电流路径示意图;
图6为本申请实施例提供的一种Boost变换器的示意图;
图7为本申请实施例提供的一种延迟控制示意图;
图8为本申请实施例提供的一种延迟电路的示意图;
图9为本申请实施例提供的另一种Boost变换器的示意图;
图10为本申请实施例提供的又一种Boost变换器的示意图;
图11为本申请实施例提供的一种悬浮电容三电平Boost变换器的控制方法的流程图。
具体实施方式
为了使本领域技术人员更好地理解本申请实施例提供的技术方案,下面先详细介绍图1中的电路的失效路径。
本申请实施例具体不限定悬浮电容三电平Boost变换器的应用场景,例如可以应用于光伏系统,也可以应用于储能系统,也可以应该于其他电力电子场景。
继续参见图1,例如悬浮电容三电平Boost变换器正常工作时,K1常闭,Q1和Q2交替工作。若停机前一时刻Q1导通、Q2关断,此时控制器给Q1和K1关断信号,由于信号链路延迟不一致及器件自身关断速度的差异性,Q1和K1无法同步关断。若K1先关断,电感电流路径将由Q1、K1、Cf切换到D1、D2,此时Q1和Q2串联支路两端电压等于直流母线电压,但由于Q1尚未关断,导致Q2管承受直流母线电压,从而引起Q2过压失效,如图2和图3所示。
同理,若停机前一时刻Q1关断、Q2导通,此时控制器给Q2和K1关断信号,若K1先关断,电感电流路径将由D1、Cf、K1、Q2切换到D1、D2,此时Q1和Q2串联支路两端电压等于直流母线电压,但由于Q2尚未关断,导致Q1管承受直流母线电压,从而引起Q1过压失效,如图4和图5所示。
综上,悬浮电容三电平Boost变换器停机时对Q1、Q2、K1的关断控制直接影响了该拓扑的可靠性。
因此,为了避免悬浮电容三电平Boost变换器在停机时开关管不存在失效风险,本申请实施例在悬浮电容三电平Boost变换器停机时,控制K1断开时刻滞后于功率器件Q1和Q2的断开时刻。这样在停机关断Q1和Q2时,二极管D1 和D2导通续流,Q1的最大电压应力将钳位于悬浮电容电压Vcf(Vbus/2),Q2的最大电压应力将被钳位于母线电压与悬浮电容电压之差,即Vbus-Vcf,一般Vbus-Vcf=Vbus/2,从而有效解决了Q1和Q2过压失效风险。
为使本申请的上述目的、特征和优点能够更加明显易懂,下面结合附图和具体实施方式对本申请实施例作进一步详细的说明。
参见图6,该图为本申请实施例提供的一种悬浮电容三电平Boost变换器的示意图。
本申请实施例提供的悬浮电容三电平Boost变换器,包括:控制器100、电感L、第一功率器件Q1、第二功率器件Q2、第一二极管D1、第二二极管D2、第一开关K1和悬浮电容Cf;
电感L的第一端和第二端分别连接Boost变换器的正输入端和第一二极管D1的阳极,第二二极管D2的阳极和阴极分别连接第一二极管D1的阴极和Boost变换器的正输出端;
第一功率器件Q1的第一端和第二端分别连接电感L的第二端和第二功率器件Q2的第一端,第二功率器件Q2的第二端连接Boost变换器的负输入端;第一开关K1的第一端和第二端分别连接第一功率器件Q1的第二端和悬浮电容Cf的第一端,悬浮电容Cf的第二端连接第一二极管D1的阴极;
控制器100,用于控制第一开关K1的断开时刻滞后于第一功率器件Q1和第二功率器件Q2的断开时刻。
由于K1的断开时刻滞后于Q1和Q2,因此,Boost变换器在停机关断Q1和Q2时,第一二极管D1和第二二极管D2导通续流,Q1的最大电压应力将钳位于悬浮电容的电压Vcf(Vbus/2),Q2的最大电压应力将被钳位于Vbus-Vcf(Vbus/2),从而有效解决了Q1和Q2过压失效风险。
本申请实施例不具体限定K1的滞后关断的实现方式,可以由控制直接输出滞后于第一开关管Q1和第二开关管Q2的关断信号,也可以由硬件电路实现关断信号的延迟,下面分析举例进行详细介绍。
首先介绍由控制器直接输出不同时序的关断信号。
控制器,具体用于在收到Boost变换器停机指令或需要故障停机时,先向第一功率器件和第二功率器件发送关断信号,再间隔预设时间后向第一开关发 送关断信号。即第一开关的关断时刻滞后于第一开关管和第二开关管的关断时刻。
本申请实施例不具体限定预设时间的长度,只要预设时间可以保障第一开关的关断时刻滞后于第一功率器件和第二功率器件的关断时刻即可。
下面结合附图介绍由硬件延迟电路实现延迟的实现方式。
参见图7,该图为本申请实施例提供的一种延迟控制示意图。
本申请实施例提供的Boost变换器,还包括:延迟电路200;
控制器100,具体用于在收到Boost变换器停机指令或需要故障停机时,分别向第一功率器件Q1、第二功率器件Q2和第一开关K1发送关断信号PWM-Q1、PWM-Q2和PWM-K1。
控制器100向第一开关K1发出的关断信号经过延迟电路200延迟预设时间后输出给第一开关K1。
控制器100包括:第一输出端、第二输出端和第三输出端;
第一输出端连接第一功率器件Q1的控制端,第二输出端连接第二功率器件Q2的控制端,第三输出端连接延迟电路200的第一端,延迟电路200的第二端连接第一开关K1的控制端。
控制器100向第一输出端、第二输出端和第三输出端发送关断信号,即分别为PWM-Q1、PWM-Q2和PWM-K1。由于延迟电路200的存在,导致K1收到的关断信号会滞后于Q1和Q2的关断信号,因此,Q1和Q2先关断,K1滞后于Q1和Q2后关断,Q1和Q2可以同步关断,另外,Q1和Q2也可以不同步关断。
下面举例介绍一种延迟电路的具体实现方式。
参见图8,该图为本申请实施例提供的一种延迟电路的示意图。
本申请实施例提供的Boost变换器,延迟电路包括:第一电阻R1和第一电容C1。
控制器向第一开关K1发出的关断信号PWM-K1输入第一电阻R1的第一端,第一电阻R1的第二端连接第一电容C1的第一端,第一电容C1的第二端接地,第一电容C1的第一端连接第一开关K1的控制端。
延迟电路还包括:第三二极管D3。
第三二极管D3的阴极连接第一电阻R1的第一端,第三二极管D3的阳极连接第一电阻R1的第二端。
图8所示的延迟电路的工作原理为,当关断信号PWM-K1高电平时,第三二极管D3截止,PWM-K1通过R1对C1充电,C1两端电压缓慢上升,即延时一段时间后达到设定值,此时K1才关断。当关断信号PWM-K1变为低电平时,第三二极管D3导通,C1的电压通过第三二极管D3迅速放电到零。
图8仅是示意了一种延迟电路,另外,延迟电路还可以由定时器来实现,也可以由CPLD或FPGA等集成芯片来实现,本申请不具体限定延迟电路的具体实现方式。
参见图9,该图为本申请实施例提供的另一种Boost变换器的示意图。
本申请实施例提供的Boost变换器,还包括:第二开关K2和第二电阻R2;
第二开关K2的第一端连接第一开关K1的第二端,第二开关K2的第二端通过第二电阻连接Boost变换器的负输入端。
第二开关K2和第二电阻R2构成悬浮电容Cf的预充电电路,在Boost变换器启动前将悬浮电容Cf的电压预充至设定值(Vbus/2)。
Boost变换器正常工作时,K2常开,K1常闭(K2断开),Q1和Q2高频工作。
若Boost变换器在接收到停机指令或故障停机前一刻为Q1开通、Q2关断状态,则控制器先关断Q1,此时第一二极管D1和第二二极管D2导通续流,由于K1依然保持闭合状态,故Q1管两端电压将钳位于悬浮电容电压Vcf(Vbus/2),Q2管的电压应力将被钳位于Vbus-Vcf(Vbus/2)。
同理,若Boost变换器在接收到停机指令或故障停机前一刻为Q1关断、Q2导通状态(或Q1和Q2开通状态),则控制器先断开Q2(断开Q1和Q2),此时二极管D1和D2导通续流,由于K1依然保持闭合状态,所以Q1管和Q2管两端电压将分被钳位于悬浮电容电压Vcf(Vbus/2)和Vbus-Vcf(Vbus/2)。因此,本申请实施例提供的技术方案可以有效解决Q1和Q2过压失效风险。
另外,在K1关断后,为了保障K1断开后Q1和Q2的静态均压效果,可以在Q1和Q2其中之一的两端并联均压电路。应该理解,由于Q1和Q2串联,因此,当其中一个功率器件的电压被钳位时,另一个功率器件的电压也被钳位。
参见图10,该图为本申请实施例提供的又一种Boost变换器的示意图。
本申请实施例提供的Boost变换器,还包括:第一均压电路和/或第二均压电路;图10中以包括两个均压电路为例进行介绍。
第一均压电路300包括电阻或稳压管,第二均压电路400包括电阻或稳压管;
第一均压电路300并联在第一功率器件Q1的第一端和第二端;
第二均压电路400并联在第二功率器件Q2的第一端和第二端。
本申请实施例中不具体限定K1和K2的具体类型,例如可以为继电器,或功率半导体开关器件。其中功率半导体功率器件可以为IGBT或MOS等。
基于以上实施例提供的一种悬浮电容三电平Boost变换器,本申请实施例还提供一种悬浮电容三电平Boost变换器的控制方法,下面结合附图进行详细介绍。
参见图11,该图为本申请实施例提供的一种悬浮电容三电平Boost变换器的控制方法的流程图。
本申请实施例提供的悬浮电容三电平Boost变换器的控制方法,Boost变换器包括:控制器、电感、第一功率器件、第二功率器件、第一二极管、第二二极管、第一开关和悬浮电容;
该方法包括:
S1101:判断是否收到Boost变换器停机指令或需要故障停机;如果是,则执行S1102;
S1102:控制第一开关的断开时刻滞后于第一功率器件和第二功率器件的断开时刻。
本申请实施例提供的控制方法,由于第一开关的断开时刻滞后于第一功率器件和第二功率器件,因此,Boost变换器在停机关断第一功率器件和第二功率器件时,第一二极管和第二二极管导通续流,第一功率器件的最大电压应力将钳位于悬浮电容的电压Vcf(即半母线电压),第二功率器件的最大电压应力将被钳位于Vbus-Vcf(即半母线电压),从而有效解决了第一功率器件和第二功率器件过压失效风险。
本申请实施例不具体限定第一开关的滞后关断的实现方式,可以由软件控 制直接输出滞后于第一开关管的关断信号,也可以由硬件电路实现关断信号的延迟,下面分析举例进行详细介绍。
软件实现方式,控制第一开关的断开时刻滞后于第一功率器件和第二功率器件的断开时刻,具体包括:先向第一功率器件和第二功率器件发送关断信号,再间隔预设时间后向第一开关发送关断信号。
硬件实现方式,Boost变换器还包括:延迟电路;控制第一开关的断开时刻滞后于第一功率器件和第二功率器件的断开时刻,具体包括:向第一功率器件、第二功率器件和第一开关发送关断信号;向第一开关发出的关断信号经过延迟电路延迟预设时间后输出给第一开关。
需要说明的是,本说明书中各个实施例采用递进的方式描述,每个实施例重点说明的都是与其他实施例的不同之处,各个实施例之间相同相似部分互相参见即可。对于实施例公开的系统或装置而言,由于其与实施例公开的方法相对应,所以描述的比较简单,相关之处参见方法部分说明即可。
对所公开的实施例的上述说明,使本领域专业技术人员能够实现或使用本申请。对这些实施例的多种修改对本领域的专业技术人员来说将是显而易见的,本文中所定义的一般原理可以在不脱离本申请的精神或范围的情况下,在其它实施例中实现。因此,本申请将不会被限制于本文所示的这些实施例,而是要符合与本文所公开的原理和新颖特点相一致的最宽的范围。

Claims (11)

  1. 一种悬浮电容三电平Boost变换器,其特征在于,包括:控制器、电感、第一功率器件、第二功率器件、第一二极管、第二二极管、第一开关和悬浮电容;
    所述电感的第一端和第二端分别连接Boost变换器的正输入端和所述第一二极管的阳极,所述第二二极管的阳极和阴极分别连接所述第一二极管的阴极和所述Boost变换器的正输出端;
    所述第一功率器件的第一端和第二端分别连接所述电感的第二端和所述第二功率器件的第一端,所述第二功率器件的第二端连接所述Boost变换器的负输入端;所述第一开关的第一端和第二端分别连接所述第一功率器件的第二端和所述悬浮电容的第一端,所述悬浮电容的第二端连接所述第一二极管的阴极;
    所述控制器,用于控制所述第一开关的断开时刻滞后于所述第一功率器件和所述第二功率器件的断开时刻。
  2. 根据权利要求1所述的变换器,其特征在于,所述控制器,具体用于在收到Boost变换器停机指令或需要故障停机时,先向所述第一功率器件和所述第二功率器件发送关断信号,再间隔预设时间后向所述第一开关发送关断信号。
  3. 根据权利要求1所述的变换器,其特征在于,还包括:延迟电路;
    所述控制器,具体用于在收到Boost变换器停机指令或需要故障停机时,向所述第一功率器件、所述第二功率器件和所述第一开关发送关断信号;
    所述控制器向所述第一开关发出的关断信号经过所述延迟电路延迟预设时间后输出给所述第一开关。
  4. 根据权利要求3所述的变换器,其特征在于,所述延迟电路包括:第一电阻和第一电容;
    所述控制器向所述第一开关发出的关断信号输入所述第一电阻的第一端,所述第一电阻的第二端连接所述第一电容的第一端,所述第一电容的第二端接地,所述第一电容的第一端连接所述第一开关的控制端。
  5. 根据权利要求4所述的变换器,其特征在于,所述延迟电路还包括: 第三二极管;
    所述第三二极管的阴极连接所述第一电阻的第一端,所述第三二极管的阳极连接所述第一电阻的第二端。
  6. 根据权利要求3-4任一项所述的变换器,其特征在于,所述控制器包括:第一输出端、第二输出端和第三输出端;
    所述第一输出端连接所述第一功率器件的控制端,所述第二输出端连接所述第二功率器件的控制端,所述第三输出端连接所述延迟电路的第一端,所述延迟电路的第二端连接所述第一开关的控制端;
    所述控制器向所述第一输出端、所述第二输出端和所述第三输出端发送关断信号。
  7. 根据权利要求1-5任一项所述的变换器,其特征在于,还包括:第二开关和第二电阻;
    所述第二开关的第一端连接所述第一开关的第二端,所述第二开关的第二端通过所述第二电阻连接所述Boost变换器的负输入端。
  8. 根据权利要求3-4任一项所述的变换器,其特征在于,还包括:第一均压电路和/或第二均压电路;所述第一均压电路包括电阻和/或稳压管,所述第二均压电路包括电阻和/或稳压管;
    所述第一均压电路并联在所述第一功率器件的第一端和第二端;
    所述第二均压电路并联在所述第二功率器件的第一端和第二端。
  9. 一种悬浮电容三电平Boost变换器的控制方法,其特征在于,所述Boost变换器包括:控制器、电感、第一功率器件、第二功率器件、第一二极管、第二二极管、第一开关和悬浮电容;
    该方法包括:
    收到Boost变换器停机指令或需要故障停机时,控制所述第一开关的断开时刻滞后于所述第一功率器件和所述第二功率器件的断开时刻。
  10. 根据权利要求9所述的方法,其特征在于,所述控制所述第一开关的断开时刻滞后于所述第一功率器件和所述第二功率器件的断开时刻,具体包括:
    先向所述第一功率器件和所述第二功率器件发送关断信号,再间隔预设时间后向所述第一开关发送关断信号。
  11. 根据权利要求9所述的方法,其特征在于,所述Boost变换器还包括:延迟电路;
    所述控制所述第一开关的断开时刻滞后于所述第一功率器件和所述第二功率器件的断开时刻,具体包括:
    向所述第一功率器件、所述第二功率器件和所述第一开关发送关断信号;向所述第一开关发出的关断信号经过所述延迟电路延迟预设时间后输出给所述第一开关。
PCT/CN2023/134616 2023-11-13 2023-11-28 一种悬浮电容三电平boost变换器及控制方法 Pending WO2025102427A1 (zh)

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CN101252320A (zh) * 2007-12-18 2008-08-27 浙江大学 有源箝位交错并联升压型变换器
EP2782235A1 (en) * 2013-03-21 2014-09-24 Mitsubishi Electric R&D Centre Europe B.V. Converter composed of at least a first and a second switches and a snubber circuit which protects the second switch
CN104811075A (zh) * 2014-12-12 2015-07-29 武汉绿鼎天舒科技发展有限公司 一种组合变换器的控制方法
CN114024436A (zh) * 2022-01-10 2022-02-08 浙江日风电气股份有限公司 一种t型三电平关机控制方法、装置及系统
CN114710021A (zh) * 2022-06-06 2022-07-05 阳光电源股份有限公司 一种悬浮电容三电平boost变换器及其启动控制方法

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101252320A (zh) * 2007-12-18 2008-08-27 浙江大学 有源箝位交错并联升压型变换器
EP2782235A1 (en) * 2013-03-21 2014-09-24 Mitsubishi Electric R&D Centre Europe B.V. Converter composed of at least a first and a second switches and a snubber circuit which protects the second switch
CN104811075A (zh) * 2014-12-12 2015-07-29 武汉绿鼎天舒科技发展有限公司 一种组合变换器的控制方法
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