WO2024257549A1 - 半導体装置および車両 - Google Patents

半導体装置および車両 Download PDF

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Publication number
WO2024257549A1
WO2024257549A1 PCT/JP2024/018300 JP2024018300W WO2024257549A1 WO 2024257549 A1 WO2024257549 A1 WO 2024257549A1 JP 2024018300 W JP2024018300 W JP 2024018300W WO 2024257549 A1 WO2024257549 A1 WO 2024257549A1
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Prior art keywords
terminal
conductive
electrode
semiconductor device
conductive member
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2024/018300
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English (en)
French (fr)
Japanese (ja)
Inventor
知輝 藤村
大記 池田
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Rohm Co Ltd
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Rohm Co Ltd
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Priority to JP2025527588A priority Critical patent/JPWO2024257549A1/ja
Publication of WO2024257549A1 publication Critical patent/WO2024257549A1/ja
Priority to US19/411,915 priority patent/US20260096491A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/791—Package configurations characterised by the relative positions of pads or connectors relative to package parts of direct-bonded pads
    • H10W90/794—Package configurations characterised by the relative positions of pads or connectors relative to package parts of direct-bonded pads between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D80/00—Assemblies of multiple devices comprising at least one device covered by this subclass
    • H10D80/20—Assemblies of multiple devices comprising at least one device covered by this subclass the at least one device being covered by groups H10D1/00 - H10D48/00, e.g. assemblies comprising capacitors, power FETs or Schottky diodes
    • H10D80/251—FETs covered by H10D30/00, e.g. power FETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H10W70/652—Cross-sectional shapes
    • H10W70/6528—Cross-sectional shapes of the portions that connect to chips, wafers or package parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H10W70/654—Top-view layouts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/60—Strap connectors, e.g. thick copper clips for grounding of power devices
    • H10W72/631—Shapes of strap connectors
    • H10W72/634—Cross-sectional shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/60—Strap connectors, e.g. thick copper clips for grounding of power devices
    • H10W72/631—Shapes of strap connectors
    • H10W72/637—Multiple strap connectors having different shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/10—Configurations of laterally-adjacent chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/761—Package configurations characterised by the relative positions of pads or connectors relative to package parts of strap connectors
    • H10W90/763—Package configurations characterised by the relative positions of pads or connectors relative to package parts of strap connectors between laterally-adjacent chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/761—Package configurations characterised by the relative positions of pads or connectors relative to package parts of strap connectors
    • H10W90/764—Package configurations characterised by the relative positions of pads or connectors relative to package parts of strap connectors between a chip and a stacked insulating package substrate, interposer or RDL

Definitions

  • This disclosure relates to a semiconductor device and a vehicle.
  • Patent Document 1 discloses a conventional semiconductor device (power module).
  • the semiconductor device described in Patent Document 1 has input and output terminals through which the main current to be switched flows, and multiple control terminals.
  • the input terminals, output terminals, and multiple control terminals are appropriately arranged.
  • An object of the present disclosure is to provide a semiconductor device that is an improvement over conventional semiconductor devices.
  • an object of the present disclosure is to provide a semiconductor device that allows terminals to be more appropriately arranged.
  • Another object of the present disclosure is to provide a vehicle equipped with such a semiconductor device.
  • the semiconductor device provided by the first aspect of the present disclosure includes a first conductive portion, a second conductive portion, one or more first semiconductor elements having a first electrode that is a positive electrode of a current path to be switched, a second electrode that is a negative electrode, and a third electrode for switching the conduction state between the first electrode and the second electrode, one or more second semiconductor elements having a first electrode that is a positive electrode of a current path to be switched, a second electrode that is a negative electrode, and a third electrode for switching the conduction state between the first electrode and the second electrode, two first terminals, a second terminal, a third terminal, a first conductive member, a second conductive member, a plurality of first control terminals, a plurality of second control terminals, and a sealing resin.
  • the first conductive portion has a first main surface facing a first side in the thickness direction
  • the second conductive portion has a second main surface facing the first side in the thickness direction.
  • the first conductive portion In a first direction perpendicular to the thickness direction, the first conductive portion is arranged on the first side, and the second conductive portion is arranged on the second side.
  • the first electrode of the first semiconductor element is conductively bonded to the first main surface
  • the first electrode of the second semiconductor element is conductively bonded to the second main surface.
  • the first control terminals are located on the first side of the first semiconductor element in the first direction, are spaced apart from each other in a second direction perpendicular to the first direction and the thickness direction, and protrude to the first side in the thickness direction with respect to the first conductive portion.
  • the two first terminals are spaced apart from each other in the second direction, are connected to the first main surface, and protrude to the first side in the first direction beyond the first control terminals.
  • the second terminal is located between the two first terminals in the second direction, and protrudes to the first side in the first direction beyond the first control terminals.
  • the third terminal is connected to the second main surface.
  • the first conductive member is conductively bonded to the second electrode and the second main surface of the first semiconductor element.
  • the second conductive member is electrically connected to the second electrode and the second terminal of the second semiconductor element.
  • the second terminal and the second conductive member form a conductive path that is located outside the first control terminals in the second direction.
  • the vehicle provided by the second aspect of the present disclosure includes a drive source and a semiconductor device provided by the first aspect of the present disclosure, the semiconductor device being electrically connected to the drive source.
  • the above configuration allows the terminals to be more appropriately arranged in the semiconductor device.
  • FIG. 1 is a perspective view of a main portion of a semiconductor device according to a first embodiment of the present disclosure.
  • FIG. 2 is a perspective view of a main part showing the semiconductor device according to the first embodiment of the present disclosure.
  • FIG. 3 is a plan view showing the semiconductor device according to the first embodiment of the present disclosure.
  • FIG. 4 is a plan view showing a main part of the semiconductor device according to the first embodiment of the present disclosure.
  • FIG. 5 is a side view showing a main part of the semiconductor device according to the first embodiment of the present disclosure.
  • FIG. 6 is a plan view showing a main part of the semiconductor device according to the first embodiment of the present disclosure.
  • FIG. 7 is a plan view showing a main part of the semiconductor device according to the first embodiment of the present disclosure.
  • FIG. 1 is a perspective view of a main portion of a semiconductor device according to a first embodiment of the present disclosure.
  • FIG. 2 is a perspective view of a main part showing the semiconductor device according to the first embodiment of
  • FIG. 8 is a side view showing the semiconductor device according to the first embodiment of the present disclosure.
  • FIG. 9 is a bottom view showing the semiconductor device according to the first embodiment of the present disclosure.
  • FIG. 10 is a cross-sectional view taken along line XX in FIG.
  • FIG. 11 is a cross-sectional view taken along line XI-XI in FIG.
  • FIG. 12 is an enlarged cross-sectional view of a main part showing the semiconductor device according to the first embodiment of the present disclosure.
  • FIG. 13 is an enlarged cross-sectional view of a main portion showing the semiconductor device according to the first embodiment of the present disclosure.
  • FIG. 14 is a cross-sectional view taken along line XIV-XIV in FIG. FIG.
  • FIG. 15 is a cross-sectional view taken along line XV-XV in FIG.
  • FIG. 16 is a cross-sectional view taken along line XVI-XVI in FIG.
  • FIG. 17 is a cross-sectional view taken along line XVII-XVII in FIG.
  • FIG. 18 is a cross-sectional view taken along line XVIII-XVIII in FIG.
  • FIG. 19 is a circuit diagram showing the semiconductor device according to the first embodiment of the present disclosure.
  • FIG. 20 is a system configuration diagram showing a vehicle equipped with the semiconductor device according to the first embodiment of the present disclosure.
  • FIG. 21 is a cross-sectional view showing a semiconductor device according to the second embodiment of the present disclosure.
  • FIG. 22 is a partial plan view showing a semiconductor device according to a third embodiment of the present disclosure.
  • an object A is formed on an object B" and “an object A is formed on an object B” include “an object A is formed directly on an object B” and “an object A is formed on an object B with another object interposed between the object A and the object B” unless otherwise specified.
  • an object A is disposed on an object B” and “an object A is disposed on an object B” include “an object A is disposed directly on an object B” and “an object A is disposed on an object B with another object interposed between the object A and the object B" unless otherwise specified.
  • an object A is located on an object B includes “an object A is located on an object B in contact with an object B” and “an object A is located on an object B with another object interposed between the object A and the object B” unless otherwise specified.
  • an object A overlaps an object B when viewed in a certain direction includes “an object A overlaps the entire object B” and “an object A overlaps a part of an object B.”
  • a surface A faces in direction B is not limited to the case where the angle of surface A with respect to direction B is 90°, but also includes the case where surface A is tilted with respect to direction B.
  • FIGS. 1 to 19 show a semiconductor device according to a first embodiment of the present disclosure.
  • the semiconductor device A1 of this embodiment includes a plurality of first semiconductor elements 10A, a plurality of second semiconductor elements 10B, a support substrate 3, a second terminal 42, a third terminal 43, two first terminals 41, a plurality of control terminals 45, a control terminal support 48, a first conductive member 5, a second conductive member 6, and a sealing resin 8.
  • FIG. 1 is a perspective view of a main part of the semiconductor device A1.
  • FIG. 2 is a perspective view of a main part of the semiconductor device A1.
  • FIG. 3 is a plan view of the semiconductor device A1.
  • FIG. 4 is a plan view of a main part of the semiconductor device A1.
  • FIG. 5 is a side view of a main part of the semiconductor device A1.
  • FIG. 6 is a plan view of a main part of the semiconductor device A1.
  • FIG. 7 is a plan view of a main part of the semiconductor device A1.
  • FIG. 8 is a side view of the semiconductor device A1.
  • FIG. 9 is a bottom view of the semiconductor device A1.
  • FIG. 10 is a cross-sectional view taken along line X-X in FIG. 4.
  • FIG. 10 is a cross-sectional view taken along line X-X in FIG. 4.
  • FIG. 11 is a cross-sectional view taken along line XI-XI in FIG. 4.
  • FIG. 12 is an enlarged cross-sectional view of a main part of the semiconductor device A1.
  • FIG. 13 is an enlarged cross-sectional view of a main part of the semiconductor device A1.
  • FIG. 14 is a cross-sectional view taken along line XIV-XIV in FIG. 4.
  • FIG. 15 is a cross-sectional view taken along line XV-XV in FIG. 4.
  • FIG. 16 is a cross-sectional view taken along line XVI-XVI in FIG. 4.
  • FIG. 17 is a cross-sectional view taken along line XVII-XVII in FIG. 4.
  • FIG. 18 is a cross-sectional view taken along line XVIII-XVIII in FIG. 4.
  • FIG. 19 is a circuit diagram showing semiconductor device A1.
  • the thickness direction z is the "thickness direction” of this disclosure
  • the first direction x is the “first direction” of this disclosure
  • the second direction y is the “second direction” of this disclosure.
  • the first semiconductor elements 10A and the second semiconductor elements 10B are electronic components that are the core of the functions of the semiconductor device A1.
  • the material of each of the first semiconductor elements 10A and the second semiconductor elements 10B is a semiconductor material mainly made of, for example, SiC (silicon carbide). This semiconductor material is not limited to SiC, and may be Si (silicon), GaN (gallium nitride), or C (diamond).
  • Each of the first semiconductor elements 10A and the second semiconductor elements 10B is a power semiconductor chip having a switching function, such as a MOSFET (Metal Oxide Semiconductor Field Effect Transistor).
  • MOSFET Metal Oxide Semiconductor Field Effect Transistor
  • the first semiconductor elements 10A and the second semiconductor elements 10B are MOSFETs, but are not limited thereto and may be other transistors such as an IGBT (Insulated Gate Bipolar Transistor).
  • Each of the first semiconductor elements 10A and the second semiconductor elements 10B is the same element.
  • Each of the first semiconductor elements 10A and each of the second semiconductor elements 10B is, for example, an n-channel MOSFET, but may also be a p-channel MOSFET.
  • the first semiconductor element 10A and the second semiconductor element 10B each have an element main surface 101 and an element back surface 102.
  • the element main surface 101 and the element back surface 102 are separated in the thickness direction z.
  • the element main surface 101 faces the z1 side in the thickness direction z
  • the element back surface 102 faces the z2 side in the thickness direction z.
  • the semiconductor device A1 has four first semiconductor elements 10A and four second semiconductor elements 10B, but the number of first semiconductor elements 10A and the number of second semiconductor elements 10B are not limited to this configuration and are changed as appropriate according to the performance required of the semiconductor device A1.
  • four first semiconductor elements 10A and four second semiconductor elements 10B are arranged.
  • the number of first semiconductor elements 10A and the number of second semiconductor elements 10B may be two or three, or five or more.
  • the number of first semiconductor elements 10A and the number of second semiconductor elements 10B may be equal to or different from each other.
  • the number of first semiconductor elements 10A and the number of second semiconductor elements 10B are determined by the current capacity handled by the semiconductor device A1.
  • the semiconductor device A1 is configured, for example, as a half-bridge type switching circuit.
  • the multiple first semiconductor elements 10A configure the upper arm circuit of the semiconductor device A1
  • the multiple second semiconductor elements 10B configure the lower arm circuit.
  • the multiple first semiconductor elements 10A are connected in parallel with each other, and in the lower arm circuit, the multiple second semiconductor elements 10B are connected in parallel with each other.
  • Each first semiconductor element 10A and each second semiconductor element 10B are connected in series to configure a bridge layer.
  • each of the first semiconductor elements 10A is mounted on a first conductive portion 32A of a support substrate 3 described later.
  • the first semiconductor elements 10A are arranged, for example, in the second direction y and are spaced apart from each other.
  • the first semiconductor elements 10A may be arranged spaced apart from each other in the second direction y and at different positions in the first direction x.
  • Each first semiconductor element 10A is conductively bonded to the first conductive portion 32A via a first conductive bonding material 19A.
  • the element back surface 102 faces the first conductive portion 32A.
  • the first semiconductor elements 10A may be mounted on a metal member different from a part of the DBC substrate or the like.
  • the metal member corresponds to the first conductive portion in this disclosure.
  • This metal member may be supported by, for example, the first conductive portion 32A.
  • each of the second semiconductor elements 10B is mounted on a second conductive portion 32B of the support substrate 3 described later.
  • the second semiconductor elements 10B are arranged, for example, in the second direction y and spaced apart from each other.
  • the second semiconductor elements 10B may be arranged spaced apart from each other in the second direction y and at different positions in the first direction x.
  • Each second semiconductor element 10B is conductively bonded to the second conductive portion 32B via the second conductive bonding material 19B.
  • the element back surface 102 faces the second conductive portion 32B.
  • the first semiconductor elements 10A and the second semiconductor elements 10B overlap when viewed in the first direction x, but they do not have to overlap.
  • the multiple second semiconductor elements 10B may be mounted on a metal member that is different from a part of the DBC substrate, etc.
  • the metal member corresponds to the second conductive portion in this disclosure. This metal member may be supported by, for example, the second conductive portion 32B.
  • the multiple first semiconductor elements 10A and the multiple second semiconductor elements 10B each have a gate electrode 11, a source electrode 12, a source sense electrode 13, and a drain electrode 15.
  • the configurations of the gate electrode 11, the source electrode 12, the source sense electrode 13, and the drain electrode 15 described below are common to each of the first semiconductor elements 10A and each of the second semiconductor elements 10B.
  • the gate electrode 11, the source electrode 12, and the source sense electrode 13 are provided on the element main surface 101.
  • the gate electrode 11, the source electrode 12, and the source sense electrode 13 are insulated by an insulating film (not shown).
  • the drain electrode 15 is provided on the element back surface 102.
  • the drain electrode 15 is an example of a first electrode of the present disclosure.
  • the drain electrode 15 is the positive electrode of the current path to be switched in the semiconductor device A1.
  • the drain electrode 15 covers the entire area (or substantially the entire area) of the back surface 102 of the element.
  • the drain electrode 15 is formed, for example, by Ag (silver) plating.
  • the source electrode 12 is an example of a second electrode of the present disclosure.
  • the source electrode 12 is the negative electrode of the current path to be switched in the semiconductor device A1.
  • the gate electrode 11 is an example of a third electrode of the present disclosure.
  • the gate electrode 11 is an electrode for switching the conduction state between the drain electrode 15 and the source electrode 12, and a drive signal (for example, a gate voltage) for driving the first semiconductor element 10A (second semiconductor element 10B) is input to the gate electrode 11.
  • the source sense electrode 13 is an electrode at the same potential as the source electrode 12.
  • each first semiconductor element 10A switches between a conductive state and a cut-off state in response to the drive signal.
  • a current flows from the drain electrode 15 to the source electrode 12, and in the cut-off state, this current does not flow.
  • each first semiconductor element 10A (each second semiconductor element 10B) performs a switching operation.
  • the semiconductor device A1 converts a DC voltage input between the two first terminals 41 and the second terminals 42 into, for example, an AC voltage, using the switching function of the multiple first semiconductor elements 10A and the multiple second semiconductor elements 10B, and outputs the AC voltage from the third terminal 43.
  • the support substrate 3 supports a plurality of first semiconductor elements 10A and a plurality of second semiconductor elements 10B.
  • the specific configuration of the support substrate 3 is not limited in any way, and may be, for example, a DBC (Direct Bonded Copper) substrate or an AMB (Active Metal Brazing) substrate.
  • the support substrate 3 includes an insulating layer 31, a first metal layer 32, and a back metal layer 33.
  • the first metal layer 32 includes a first conductive portion 32A and a second conductive portion 32B.
  • the dimension of the support substrate 3 in the thickness direction z is, for example, 0.4 mm or more and 3.0 mm or less.
  • the insulating layer 31 is, for example, a ceramic with excellent thermal conductivity.
  • An example of such a ceramic is SiN (silicon nitride).
  • the insulating layer 31 is not limited to ceramics, and may be an insulating resin sheet or the like.
  • the insulating layer 31 is, for example, rectangular in plan view.
  • the dimension of the insulating layer 31 in the thickness direction z is, for example, 0.05 mm or more and 1.0 mm or less.
  • the first conductive portion 32A supports a plurality of first semiconductor elements 10A
  • the second conductive portion 32B supports a plurality of second semiconductor elements 10B.
  • the first conductive portion 32A and the second conductive portion 32B are formed on the upper surface of the insulating layer 31 (the surface facing the z1 side in the thickness direction z).
  • the constituent material of the first conductive portion 32A and the second conductive portion 32B includes, for example, Cu (copper).
  • the constituent material may include, for example, Al (aluminum) other than Cu (copper).
  • the first conductive portion 32A and the second conductive portion 32B are spaced apart in the first direction x.
  • the first conductive portion 32A is located on the x1 side of the second conductive portion 32B in the first direction x.
  • the first conductive portion 32A and the second conductive portion 32B are each, for example, rectangular in a plan view.
  • the first conductive portion 32A has a first main surface 301A.
  • the first main surface 301A is a plane facing the z1 side in the thickness direction z.
  • a plurality of first semiconductor elements 10A are respectively bonded to the first main surface 301A of the first conductive portion 32A via a first conductive bonding material 19A.
  • the second conductive portion 32B has a second main surface 301B.
  • the second main surface 301B is a plane facing the z1 side in the thickness direction z.
  • a plurality of second semiconductor elements 10B are bonded to the second main surface 301B of the second conductive portion 32B via a second conductive bonding material 19B.
  • the constituent materials of the first conductive bonding material 19A and the second conductive bonding material 19B are not particularly limited, and may be, for example, solder, a metal paste material containing a metal such as Ag (silver), or a sintered metal containing a metal such as Ag (silver).
  • the dimension of the first conductive portion 32A and the second conductive portion 32B in the thickness direction z is, for example, 0.1 mm or more and 1.5 mm or less.
  • the back metal layer 33 is formed on the lower surface (surface facing the z2 side in the thickness direction z) of the insulating layer 31.
  • the constituent material of the back metal layer 33 is the same as the constituent material of the first metal layer 32.
  • the back metal layer 33 has a back surface 302.
  • the back surface 302 is a flat surface facing the z2 side in the thickness direction z. In the example shown in FIG. 9, the back surface 302 is exposed from the sealing resin 8, for example.
  • a heat dissipation member for example, a heat sink
  • the back surface 302 may not be exposed from the sealing resin 8 and may be covered by the sealing resin 8.
  • the back surface metal layer 33 overlaps both the first conductive portion 32A and the second conductive portion 32B in a plan view.
  • the second terminal 42, the third terminal 43, and the two first terminals 41 are each made of a plate-shaped metal plate.
  • This metal plate contains, for example, Cu (copper) or a Cu (copper) alloy.
  • the DC voltage to be converted is input to the second terminal 42 and the first terminal 41.
  • the first terminal 41 is a positive electrode (P terminal), and the second terminal 42 is a negative electrode (N terminal).
  • the AC voltage converted by the first semiconductor element 10A and the second semiconductor element 10B is output from the third terminal 43.
  • the second terminal 42, the third terminal 43, and the two first terminals 41 each include a portion covered by the sealing resin 8 and a portion exposed from the sealing resin 8.
  • the two first terminals 41 are arranged apart from each other in the second direction y, as shown in Figs. 1 to 7.
  • the two first terminals 41 are each connected to the first main surface 301A of the first conductive portion 32A.
  • the two first terminals 41 are located on the x1 side in the first direction x with respect to the multiple first semiconductor elements 10A, as shown in Figs. 6 and 7.
  • the two first terminals 41 are conductive to the first conductive portion 32A, and are conductive to the drain electrodes 15 of each first semiconductor element 10A via the first conductive portion 32A.
  • the first terminal 41 has a first terminal portion 411, a first connection portion 412, and a first step portion 413.
  • the first terminal portion 411 is exposed from the sealing resin 8 and is used when electrically connecting the semiconductor device A1 to the outside.
  • the first connection portion 412 is conductively joined to the first main surface 301A of the first conductive portion 32A.
  • the first step portion 413 is interposed between the first terminal portion 411 and the first connection portion 412, and makes the first terminal portion 411 and the first connection portion 412 different in position in the thickness direction z.
  • the second terminal 42 is electrically connected to the source electrodes 12 of the second semiconductor elements 10B via the second conductive member 6.
  • the second terminal 42 and the second conductive member 6 are formed separately from each other and are electrically connected to each other.
  • the second terminal 42 and the second conductive member 6 may be an integral member.
  • An integral member is formed, for example, by subjecting a single metal plate material to cutting and bending processes, and does not include a bonding material for bonding the two members to each other.
  • the second terminal 42 is located between the two first terminals 41 in the second direction y.
  • the second terminal 42 is located on the x1 side of the first direction x with respect to the first semiconductor elements 10A.
  • the second terminal 42 has a second terminal portion 421 and a second connection portion 422, as shown in FIG. 14.
  • the second terminal portion 421 is exposed from the sealing resin 8 and is a portion used when electrically connecting the semiconductor device A1 to the outside.
  • the second terminal portion 421 is located between the two first terminal portions 411 in the second direction y.
  • the second terminal portion 421 is exposed from the sealing resin 8.
  • the second connection portion 422 extends from the second terminal portion 421 to the x2 side in the x direction.
  • the third terminal 43 is conductively joined to the second conductive portion 32B.
  • the third terminal 43 is located on the x2 side of the first direction x with respect to the multiple second semiconductor elements 10B.
  • the third terminal 43 is conductive to the second conductive portion 32B, and is also conductive to the drain electrodes 15 of the multiple second semiconductor elements 10B via the second conductive portion 32B.
  • the number of third terminals 43 is not limited to one, and may be, for example, two or more.
  • the third terminal 43 has a third terminal portion 431 and a third connection portion 432.
  • the third terminal portion 431 is exposed from the sealing resin 8 and is a portion used when electrically connecting the semiconductor device A1 to the outside.
  • the third connection portion 432 extends from the third terminal portion 431 to the x1 side in the x direction.
  • the third connection portion 432 is conductively joined to the second main surface 301B of the second conductive portion 32B.
  • the multiple control terminals 45 are pin-shaped terminals for controlling each of the first semiconductor elements 10A and each of the second semiconductor elements 10B.
  • the multiple control terminals 45 include multiple first control terminals 46A, 46B, 46E and multiple second control terminals 47A, 47B, 47C, 47E.
  • the multiple first control terminals 46A, 46B, 46E are used for controlling each of the first semiconductor elements 10A, etc.
  • the multiple second control terminals 47A, 47B, 47C, 47E are used for controlling each of the second semiconductor elements 10B, etc.
  • the first control terminals 46A, 46B, 46E are arranged apart from each other in the second direction y.
  • the first control terminals 46A, 46B, 46E are arranged in a substantially straight line along the second direction y, but this is not limited thereto, and may be arranged at different positions in the first direction.
  • each of the first control terminals 46A, 46B, 46E protrudes from the sealing resin 8 to the z1 side in the thickness direction z.
  • Each of the first control terminals 46A, 46B, 46E is supported by the first conductive portion 32A via a control terminal support 48 (first support portion 48A described later).
  • Each of the first control terminals 46A, 46B, 46E is located between the first semiconductor elements 10A and the second terminal 42 and the first terminal 41 in the first direction x, as shown in FIG. 4 and FIG. 6.
  • the first control terminal 46A is a terminal (gate terminal) for inputting a drive signal to the multiple first semiconductor elements 10A.
  • a drive signal for driving the multiple first semiconductor elements 10A is input to the first control terminal 46A (for example, a gate voltage is applied).
  • the first control terminal 46B is a terminal (source sense terminal) for detecting source signals of the multiple first semiconductor elements 10A.
  • the voltage (voltage corresponding to the source current) applied to each source electrode 12 of the multiple first semiconductor elements 10A is detected from the first control terminal 46B.
  • the first control terminal 46E is a terminal (drain sense terminal) for detecting the drain signals of the multiple first semiconductor elements 10A.
  • the voltage (voltage corresponding to the drain current) applied to the drain electrodes 15 of the multiple first semiconductor elements 10A is detected from the first control terminal 46E.
  • the second control terminals 47A, 47B, 47C, and 47E are spaced apart from one another in the second direction y.
  • the second control terminals 47A, 47B, 47C, and 47E are arranged in a substantially straight line along the second direction y, but this is not limited thereto, and may be arranged at different positions in the first direction.
  • each of the second control terminals 47A, 47B, 47C, and 47E is supported by the second conductive portion 32B via a control terminal support 48 (second support portion 48B described later).
  • each of the second control terminals 47A, 47B, 47C, and 47E is located between the second semiconductor elements 10B and the two third terminals 43 in the first direction x.
  • the second control terminal 47A is a terminal (gate terminal) for inputting a drive signal to the multiple second semiconductor elements 10B.
  • a drive signal for driving the multiple second semiconductor elements 10B is input to the second control terminal 47A (for example, a gate voltage is applied).
  • the second control terminal 47B is a terminal (source sense terminal) for detecting source signals of the multiple second semiconductor elements 10B.
  • the voltage (voltage corresponding to the source current) applied to each source electrode 12 of the multiple second semiconductor elements 10B is detected from the second control terminal 47B.
  • the second control terminals 47C and 47E are terminals used for temperature detection using the thermistor 17.
  • Each of the multiple control terminals 45 includes a holder 451 and a metal pin 452.
  • the holder 451 is made of a conductive material. As shown in Figures 12 and 13, the holder 451 is bonded to the control terminal support 48 (first metal layer 482 described below) via a conductive bonding material 459.
  • the holder 451 includes a cylindrical portion, an upper end flange, and a lower end flange. The upper end flange is connected to the upper part of the cylindrical portion, and the lower end flange is connected to the lower part of the cylindrical portion.
  • a metal pin 452 is inserted through at least the upper end flange and the cylindrical portion of the holder 451.
  • the holder 451 is covered with sealing resin 8 (second protrusion 852 described below).
  • the metal pin 452 is a rod-shaped member extending in the thickness direction z.
  • the metal pin 452 is supported, for example, by being pressed into the holder 451.
  • the metal pin 452 is electrically connected to the control terminal support 48 (the first metal layer 482 described below) at least via the holder 451.
  • the control terminal support 48 supports the multiple control terminals 45.
  • the control terminal support 48 is interposed between the first main surface 301A and the second main surface 301B and the multiple control terminals 45 in the thickness direction z.
  • the control terminal support 48 includes a first support portion 48A and a second support portion 48B.
  • the first support portion 48A is disposed on the first conductive portion 32A and supports the first control terminals 46A to 46E of the control terminals 45.
  • the first support portion 48A is bonded to the first conductive portion 32A via a bonding material 49 as shown in FIG. 12.
  • the bonding material 49 may be conductive or insulating, and may be, for example, solder.
  • the second support portion 48B is disposed on the second conductive portion 32B and supports the second control terminals 47A to 47D of the control terminals 45.
  • the second support portion 48B is bonded to the second conductive portion 32B via a bonding material 49 as shown in FIG. 13.
  • the control terminal support 48 (each of the first support portion 48A and the second support portion 48B) is formed, for example, from a DBC (Direct Bonded Copper) substrate.
  • the control terminal support 48 has an insulating layer 481, a first metal layer 482, and a second metal layer 483 stacked on top of each other.
  • the insulating layer 481 is made of, for example, ceramics.
  • the insulating layer 481 is, for example, rectangular in plan view.
  • the first metal layer 482 is formed on the upper surface of the insulating layer 481, as shown in Figures 12 and 13. Each control terminal 45 is disposed on the first metal layer 482.
  • the first metal layer 482 includes, for example, Cu (copper) or a Cu (copper) alloy. As shown in Figures 6 and 7, the first metal layer 482 includes a first portion 482A, a second portion 482B, a fifth portion 482E, a sixth portion 482F, and a seventh portion 482G.
  • the first portion 482A, the second portion 482B, the fifth portion 482E, the sixth portion 482F, and the seventh portion 482G are separated and insulated from each other.
  • the first portion 482A has multiple wires 71 bonded thereto, and is electrically connected to the gate electrode 11 of each of the first semiconductor elements 10A (each of the second semiconductor elements 10B) via each wire 71. Wires 71, 72, 74, 75, and 76 are omitted in figures other than FIG. 7.
  • the first control terminal 46A is bonded to the first portion 482A of the first support portion 48A, and the second control terminal 47A is bonded to 482B of the second support portion 48B.
  • the sixth portion 482F is electrically connected to the gate electrode 11 of one of the first semiconductor elements 10A via a wire 71.
  • the sixth portion 482F is electrically connected to the first portion 482A via a wire 75.
  • the seventh portion 482G has multiple wires 72 bonded thereto, and is electrically connected to the source sense electrodes 13 of the first semiconductor elements 10A (second semiconductor elements 10B) via the wires 72.
  • the seventh portion 482G is electrically connected to the second portion 482B via wires 76.
  • the first control terminal 46B is bonded to the second portion 482B of the first support portion 48A, and the second control terminal 47B is bonded to the second portion 482B of the second support portion 48B.
  • the fifth portion 482E of the first support portion 48A is joined to the wire 74 and is electrically connected to the first conductive portion 32A via the wire 74.
  • the first control terminal 46E is joined to the fifth portion 482E of the first support portion 48A.
  • the thermistor 17 is conductively joined to the fifth portion 482E and the third portion 482C of the second support portion 48B.
  • the second control terminal 47E is joined to the fifth portion 482E of the second support portion 48B, and the second control terminal 47C is joined to the third portion 482C of the second support portion 48B.
  • Wires 71, 72, 74, 75, and 76 are, for example, bonding wires.
  • the material of each of wires 71, 72, and 74 includes, for example, any of Au (gold), Al (aluminum), and Cu (copper).
  • the second metal layer 483 is formed on the lower surface of the insulating layer 481, as shown in Figures 12 and 13.
  • the second metal layer 483 of the first support portion 48A is bonded to the first conductive portion 32A via a bonding material 49, as shown in Figure 12.
  • the second metal layer 483 of the second support portion 48B is bonded to the second conductive portion 32B via a bonding material 49, as shown in Figure 13.
  • the first conductive member 5 and the second conductive member 6 are located on the z1 side in the thickness direction z from the first main surface 301A and the second main surface 301B, and overlap the first main surface 301A and the second main surface 301B in a plan view.
  • the first conductive member 5 and the second conductive member 6 are each made of a metal plate material.
  • the metal includes, for example, Cu (copper) or a Cu (copper) alloy.
  • the first conductive member 5 and the second conductive member 6 are metal plate materials that are appropriately bent.
  • the first conductive member 5 is connected to the source electrodes 12 of the multiple first semiconductor elements 10A and the second conductive portion 32B, and provides electrical continuity between the source electrodes 12 of the multiple first semiconductor elements 10A and the second conductive portion 32B.
  • the first conductive member 5 forms a path for the main circuit current that is switched by the multiple first semiconductor elements 10A.
  • the first conductive member 5 includes a main portion 53, multiple fourth connection portions 51, and multiple fifth connection portions 52.
  • the main portion 53 is located between the multiple first semiconductor elements 10A and the second conductive portion 32B in the first direction x, and is a band-shaped portion extending in the second direction y in a planar view.
  • the main portion 53 is spaced apart in the thickness direction z from the first main surface 301A and the second main surface 301B on the z1 side of the thickness direction z. As shown in FIG. 14 etc., the main portion 53 is located on the z2 side of the thickness direction z with respect to the main portion 63 of the second conductive member 6 described later.
  • the main portion 53 is disposed parallel to the first main surface 301A and the second main surface 301B.
  • a plurality of first openings 514 are formed in the main portion 53.
  • the plurality of first openings 514 expose portions of the insulating layer 31 located between the first conductive portion 32A and the second conductive portion 32B.
  • the plurality of first openings 514 are formed to facilitate the flow of the resin material between the upper side (z1 side in the thickness direction z) and the lower side (z2 side in the thickness direction z) near the main portion 53 (first conductive member 5) when injecting a fluid resin material to form the sealing resin 8.
  • the plurality of fourth connection parts 51 and the plurality of fifth connection parts 52 are each connected to the main part 53.
  • the plurality of fourth connection parts 51 are arranged corresponding to the plurality of first semiconductor elements 10A.
  • each fourth connection part 51 is located on the x1 side of the first direction x with respect to the main part 53.
  • Each fifth connection part 52 is located on the x2 side of the first direction x with respect to the main part 53.
  • each fourth connection part 51 and the corresponding source electrode 12 of the first semiconductor element 10A are joined via a conductive bonding material 59.
  • Each fifth connection part 52 and the second conductive part 32B are joined via a conductive bonding material 59.
  • the material of the conductive bonding material 59 is not particularly limited, and may be, for example, solder, a metal paste material, or a sintered metal.
  • the fourth connection part 51 has two parts spaced apart in the second direction y. These two parts are joined to the source electrode 12 on either side in the second direction y, sandwiching a gate finger (not shown) of the source electrode 12 of the first semiconductor element 10A.
  • the second conductive member 6 is electrically connected to the source electrodes 12 of the second semiconductor elements 10B and the second terminals 42 and 42, and conducts them. As shown in FIG. 1, FIG. 4, and FIG. 18, the second terminals 42 and the second conductive member 6 form a conductive path Cp.
  • the conductive path Cp is located outside the first control terminals 46 in the second direction y.
  • the second terminals 42 and the second conductive member 6 form two conductive paths Cp.
  • One conductive path Cp is located on the y1 side of the second direction y with respect to the first control terminals 46, and the other conductive path Cp is located on the y2 side of the second direction y with respect to the first control terminals 46.
  • the two conductive paths Cp are located on both outsides of the first control terminals 46 in the second direction y.
  • the conduction path Cp is shown by a dashed line, but this is for ease of understanding, and the actual conduction direction of the conduction path Cp is determined by the shapes of the second terminal 42 and the second conductive member 6, etc.
  • the second conductive member 6 has a plurality of sixth connection parts 61, a seventh connection part 62, a main part 63, a plurality of relay parts 64, two relay parts 65, and two relay parts 66, as shown in Figures 4, 13, and 14.
  • the sixth connection portions 61 are portions that are individually bonded to the second semiconductor elements 10B. Each sixth connection portion 61 and the source electrode 12 of each second semiconductor element 10B are bonded via a conductive bonding material 69.
  • the material of the conductive bonding material 69 is not particularly limited, and may be, for example, solder, a metal paste material, or a sintered metal.
  • the sixth connection portion 61 has two flat portions 611 and two first inclined portions 612.
  • the two flat portions 611 are aligned in the second direction y.
  • the two flat portions 611 are spaced apart from each other in the second direction y.
  • the shape of the flat portion 611 is not limited in any way, and in the illustrated example, it is rectangular.
  • the two flat portions are joined to the source electrode 12 on both sides in the second direction y, sandwiching a gate finger (not shown) of the source electrode 12 of the second semiconductor element 10B therebetween.
  • the two first inclined portions 612 are connected to the x1 side of the two flat portions 611 in the x direction.
  • the first inclined portions 612 are inclined so that the further they are from the flat portions 611 in the first direction x, the closer they are to the z1 side in the thickness direction z.
  • the two seventh connection parts 62 are each electrically connected to the second connection part 422 of the second terminal 42.
  • the seventh connection part 62 is conductively joined to the second connection part 422.
  • the method of conductive joining There are no limitations on the method of conductive joining, and methods such as ultrasonic joining, laser joining, welding, or methods using solder, metal paste, sintered silver, etc. may be used as appropriate.
  • the seventh connection part 62 is joined to the second connection part 422 via a conductive joining material 69.
  • the two seventh connection parts 62 are arranged apart in the second direction y.
  • the main portion 63 is interposed between the sixth connection portions 61 and the seventh connection portion 62.
  • the main portion 63 is a flat portion perpendicular to the thickness direction z.
  • the multiple relay parts 64 are individually interposed between the multiple sixth connection parts 61 and the main part 63.
  • the multiple relay parts 64 are arranged radially from the main part 63 toward the multiple sixth connection parts 61.
  • the two relay portions 65 extend outward in the second direction y from the two seventh connection portions 62. As shown in Figures 4, 10, and 15, the relay portions 65 overlap the first connection portion 412 of the first terminal 41 when viewed in the thickness direction z. The relay portions 65 are located on the z1 side of the first connection portion 412 in the thickness direction z.
  • the two relay parts 66 are individually interposed between the main part 63 and the two relay parts 65.
  • the two relay parts 66 are located on both outer sides in the second direction y relative to the multiple first control terminals 46.
  • the relay part 66 has an extension part 661.
  • the extension part 661 is a part that extends to the z2 side in the thickness direction z on the outer side in the second direction y.
  • the sealing resin 8 covers the first semiconductor elements 10A, the second semiconductor elements 10B, the support substrate 3 (excluding the back surface 302), the second terminal 42, the third terminal 43, and a portion of each of the two first terminals 41, the control terminals 45, the control terminal support 48, the first conductive member 5, the second conductive member 6, and the wires 71, 72, and 74.
  • the sealing resin 8 is made of, for example, a black epoxy resin.
  • the sealing resin 8 is formed, for example, by molding.
  • the sealing resin 8 has, for example, a dimension in the first direction x of about 35 mm to 60 mm, a dimension in the second direction y of about 35 mm to 50 mm, and a dimension in the thickness direction z of about 4 mm to 15 mm. These dimensions are the size of the maximum portion along each direction.
  • the sealing resin 8 has a resin main surface 81, a resin back surface 82, and a plurality of resin side surfaces 831 to 834.
  • the resin main surface 81 and the resin back surface 82 are separated in the thickness direction z, as shown in Figures 8, 10, 16, etc.
  • the resin main surface 81 faces the z1 side in the thickness direction z
  • the resin back surface 82 faces the z2 side in the thickness direction z.
  • a plurality of control terminals 45 protrude from the resin main surface 81.
  • the resin back surface 82 is frame-shaped in plan view surrounding the back surface 302 (the lower surface of the back surface metal layer 33) of the support substrate 3.
  • the back surface 302 of the support substrate 3 is exposed from the resin back surface 82, and is, for example, flush with the resin back surface 82.
  • the multiple resin side surfaces 831 to 834 are each connected to both the resin main surface 81 and the resin back surface 82, and are sandwiched between them in the thickness direction z. As shown in FIG. 3 and other figures, the resin side surface 831 and the resin side surface 832 are separated in the first direction x. The resin side surface 831 faces the x2 side of the first direction x, and the resin side surface 832 faces the x1 side of the first direction x. Two third terminals 43 protrude from the resin side surface 831, and the second terminal 42, the second terminal 42, and the first terminal 41 protrude from the resin side surface 832. As shown in FIG. 3 and other figures, the resin side surface 833 and the resin side surface 834 are separated in the second direction y. The resin side surface 833 faces the y2 side of the second direction y, and the resin side surface 834 faces the y1 side of the second direction y.
  • a plurality of recesses 832a are formed on the resin side surface 832.
  • Each recess 832a is a portion recessed in the first direction x in a plan view.
  • the plurality of recesses 832a are formed between the second terminal 42 and the first terminal 41 in a plan view.
  • the plurality of recesses 832a are provided to increase the creepage distance along the resin side surface 832 between the second terminal 42 and the first terminal 41.
  • a plurality of recesses 832b are formed on the resin side surface 832.
  • the plurality of recesses 832b are recessed from the resin side surface 832 toward the x2 side in the first direction x.
  • the first terminal portions 411 of the two first terminals 41 and the second terminal portions 421 of the second terminals 42 are exposed from the plurality of recesses 832b.
  • the resin side surface 832 may not be formed with a plurality of recesses 832b, and the first terminal portions 411 and the second connection portions 422 may be configured to protrude from the resin side surface 832 toward the x1 side in the first direction x, for example.
  • the sealing resin 8 has a plurality of second protrusions 852.
  • the plurality of second protrusions 852 protrude from the resin main surface 81 in the thickness direction z.
  • the plurality of second protrusions 852 overlap the plurality of control terminals 45 in a plan view.
  • Each metal pin 452 of the plurality of control terminals 45 protrudes from each second protrusion 852.
  • Each second protrusion 852 is frustum-shaped.
  • the second protrusion 852 covers the holder 451 and a portion of the metal pin 452 in each control terminal 45.
  • the vehicle B1 is, for example, an electric vehicle (EV).
  • EV electric vehicle
  • vehicle B1 is equipped with an on-board charger 91, a storage battery 92, and a drive system 93.
  • Power is supplied to the on-board charger 91 wirelessly from a power supply facility (not shown) installed outdoors. Alternatively, power may be supplied from the power supply facility to the on-board charger 91 via a wired connection.
  • the on-board charger 91 is configured with a step-up DC-DC converter. The voltage of the power supplied to the on-board charger 91 is stepped up by the converter and then supplied to the storage battery 92. The stepped-up voltage is, for example, 600V.
  • the drive system 93 drives the vehicle B1.
  • the drive system 93 has an inverter 931 and a drive source 932.
  • the semiconductor device A1 constitutes part of the inverter 931.
  • the power stored in the storage battery 92 is supplied to the inverter 931.
  • the power supplied from the storage battery 92 to the inverter 931 is DC power.
  • a step-up DC-DC converter may be further provided between the storage battery 92 and the inverter 931.
  • the inverter 931 converts DC power into AC power.
  • the inverter 931 including the semiconductor device A1 is conductive to the drive source 932.
  • the driving source 932 has an AC motor and a transmission.
  • the AC motor rotates and the rotation is transmitted to the transmission.
  • the transmission appropriately reduces the rotation speed transmitted from the AC motor and then rotates the drive shaft of the vehicle B1. This drives the vehicle B1.
  • the semiconductor device A1 in the inverter 931 is necessary to output AC power whose frequency has been appropriately changed to correspond to the required rotation speed of the AC motor.
  • the conductive path Cp formed by the second conductive member 6 and the second terminal 42 is disposed outside the first control terminals 46 in the second direction y. This makes it possible to more appropriately dispose the second terminal 42 and the first control terminals 46 while avoiding interference between the second conductive member 6 and the second terminal 42 and the first control terminals 46.
  • the second conductive member 6 and the second terminal 42 are configured as separate components. This makes it possible to prevent the individual components that make up the conductive path Cp from becoming excessively large.
  • two conductive paths Cp are configured.
  • the two conductive paths Cp are arranged on both outsides of the multiple first control terminals 46 in the second direction y, and are paths that bypass the multiple first control terminals 46 to the outside in the second direction y. This makes it possible to allow a larger current to flow between the second terminal 42 and the second conductive member 6 while avoiding interference between the second conductive member 6 and the multiple first control terminals 46 and the second terminal 42.
  • the relay portion 65 overlaps with the first connection portion 412 when viewed in the thickness direction z, and is located on the z1 side of the first connection portion 412 in the thickness direction z. This makes it possible to more reliably insulate the first terminal 41 from the second conductive member 6 while preventing the semiconductor device A1 from becoming larger in size when viewed in the thickness direction z.
  • the sixth connection portion 61 has two flat portions 611 and two first inclined portions 612.
  • the two first inclined portions 612 are connected to the x1 side of the two flat portions 611 in the first direction x. This makes it possible to prevent the current flowing through the source electrode 12 from concentrating in one place.
  • the two flat portions 611 are spaced apart in the second direction y. This allows current to flow reliably through both the two flat portions 611 and the two first inclined portions 612, which is advantageous in preventing current concentration.
  • the gate finger (not shown) of the source electrode 12 can be positioned between them.
  • FIGS. 21 and 22 show other embodiments of the present disclosure.
  • elements that are the same as or similar to those in the above embodiment are given the same reference numerals as in the above embodiment.
  • the configurations of the various parts in each embodiment can be combined with each other as appropriate to the extent that no technical contradictions arise.
  • FIG. 21 shows a semiconductor device according to a second embodiment of the present disclosure.
  • the semiconductor device A2 of this embodiment differs from the above-described embodiment in the configuration of the second conductive member 6 and the second terminal 42.
  • the second conductive member 6 and the second terminal 42 are configured as a single member. In other words, the second conductive member 6 and the second terminal 42 are connected to each other without a joint or the like that joins them together.
  • the second terminal 42 and the multiple first control terminals 46 can be more appropriately arranged.
  • the specific configuration of the second conductive member 6 and the second terminal 42 that constitute the conductive path Cp is not limited in any way.
  • the configuration in which the second conductive member 6 and the second terminal 42 are electrically connected is not limited to the configuration in which the second conductive member 6 and the second terminal 42 are conductively joined as in the semiconductor device A1, but is a concept that includes a configuration in which the second conductive member 6 and the second terminal 42 are formed by an integrated member as in this embodiment.
  • FIG. 22 shows a semiconductor device according to a third embodiment of the present disclosure.
  • the semiconductor device A3 of this embodiment differs from the above-described embodiments in the number of conductive paths Cp.
  • one conductive path Cp is formed by the second terminal 42 and the second conductive member 6.
  • the conductive path Cp is located on the y1 side of the second direction y with respect to the multiple first control terminals 46.
  • the second conductive member 6 has one seventh connection portion 62, one relay portion 65, and one relay portion 66.
  • This embodiment also allows the second terminal 42 and the multiple first control terminals 46 to be more appropriately arranged. As can be understood from this embodiment, there is no limitation on the number of conductive paths Cp.
  • the semiconductor device and vehicle according to the present disclosure are not limited to the above-mentioned embodiment.
  • the specific configuration of each part of the semiconductor device and vehicle according to the present disclosure can be freely designed in various ways.
  • the present disclosure includes the embodiments described in the following appendix.
  • Appendix 1 A first conductive portion; A second conductive portion; one or more first semiconductor elements having a first electrode which is a positive electrode of a current path to be switched, a second electrode which is a negative electrode, and a third electrode for switching a conduction state between the first electrode and the second electrode; one or more second semiconductor elements having a first electrode which is a positive electrode of a current path to be switched, a second electrode which is a negative electrode, and a third electrode for switching a conduction state between the first electrode and the second electrode; Two first terminals; A second terminal; A third terminal; A first conductive member; A second conductive member; A plurality of first control terminals; A plurality of second control terminals; and a sealing resin; the first conductive portion has a first main surface facing a first side in a thickness direction; the second conductive portion has a second main surface facing the first side in the thickness direction, In a first direction perpendicular to the thickness direction, the first conductive portion is disposed on a first side, and the second
  • Appendix 2 The semiconductor device according to claim 1, wherein the first terminal has a first terminal portion exposed from the sealing resin and a first connection portion conductively joined to the first main surface. Appendix 3. 3. The semiconductor device according to claim 2, wherein the second terminal has a second terminal portion exposed from the sealing resin. Appendix 4. 4. The semiconductor device according to claim 3, wherein the third terminal has a third terminal portion exposed from the sealing resin and a third connection portion conductively joined to the second main surface. Appendix 5. The semiconductor device according to claim 3 or 4, wherein the first conductive member has a fourth connection portion conductively joined to the second electrode of the first semiconductor element and a fifth connection portion conductively joined to the second main surface. Appendix 6.
  • the semiconductor device according to claim 5 wherein the first conductive member has a plurality of the fourth connection portions that are individually conductively joined to the second electrodes of the plurality of the first semiconductor elements. Appendix 7. 7. The semiconductor device according to claim 6, wherein the first conductive member further has a main portion interposed between the plurality of fourth connection portions and the fifth connection portion. Appendix 8. 8. The semiconductor device according to claim 3, further comprising a first support portion interposed between the plurality of first control terminals and the first conductive portion. Appendix 9. 9. The semiconductor device according to claim 3, wherein the second terminal and the second conductive member are separate from each other and are conductively joined. Appendix 10.
  • the second terminal has a second connection portion extending from the second terminal portion to the second side in the first direction, 10.
  • Appendix 11 The semiconductor device according to claim 10, wherein the second conductive member has a sixth connection portion that is conductively joined to the second electrode of the second semiconductor element.
  • Appendix 12. a plurality of the second semiconductor elements arranged apart from each other in the second direction; The semiconductor device according to claim 11, wherein the second conductive member has a plurality of the sixth connection portions that are individually conductively joined to the second electrodes of the plurality of the second semiconductor elements.
  • Appendix 13. 13 13.
  • the second conductive member further includes a seventh connection portion conductively joined to the second connection portion, and a main portion interposed between the sixth connection portion and the seventh connection portion.
  • Appendix 14. 14 The semiconductor device according to claim 13, wherein the second terminal and the second conductive member form two of the conductive paths located on both outer sides of the plurality of first control terminals in the second direction. Appendix 15. 15. The semiconductor device according to claim 14, wherein the second conductive member has two of the seventh connection portions and a plurality of relay portions that individually relay the main portion and the two seventh connection portions. Appendix 16. 9. The semiconductor device according to claim 3, wherein the second terminal and the second conductive member are an integral member. Appendix 17. A driving source; A semiconductor device according to any one of claims 1 to 16, The semiconductor device is electrically connected to the drive source.

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WO2022080063A1 (ja) * 2020-10-14 2022-04-21 ローム株式会社 半導体モジュール
WO2022264834A1 (ja) * 2021-06-15 2022-12-22 ローム株式会社 半導体装置

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022080063A1 (ja) * 2020-10-14 2022-04-21 ローム株式会社 半導体モジュール
WO2022264834A1 (ja) * 2021-06-15 2022-12-22 ローム株式会社 半導体装置

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