WO2024209327A1 - 半導体装置、及び表示装置 - Google Patents

半導体装置、及び表示装置 Download PDF

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Publication number
WO2024209327A1
WO2024209327A1 PCT/IB2024/053075 IB2024053075W WO2024209327A1 WO 2024209327 A1 WO2024209327 A1 WO 2024209327A1 IB 2024053075 W IB2024053075 W IB 2024053075W WO 2024209327 A1 WO2024209327 A1 WO 2024209327A1
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Prior art keywords
layer
insulating layer
conductive layer
light
semiconductor
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PCT/IB2024/053075
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English (en)
French (fr)
Japanese (ja)
Inventor
神長正美
島行徳
土橋正佳
佐藤学
肥塚純一
中田昌孝
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Priority to KR1020257031836A priority Critical patent/KR20250170592A/ko
Priority to JP2025512206A priority patent/JPWO2024209327A1/ja
Priority to CN202480018405.XA priority patent/CN121003032A/zh
Publication of WO2024209327A1 publication Critical patent/WO2024209327A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/1368Active matrix addressed cells in which the switching element is a three-electrode device
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09FDISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6729Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6736Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes characterised by the shape of gate insulators
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/674Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6757Thin-film transistors [TFT] characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/421Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/441Interconnections, e.g. scanning lines
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/451Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs characterised by the compositions or shapes of the interlayer dielectrics
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H29/00Integrated devices, or assemblies of multiple devices, comprising at least one light-emitting semiconductor element covered by group H10H20/00
    • H10H29/30Active-matrix LED displays
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/123Connection of the pixel electrodes to the thin film transistors [TFT]

Definitions

  • One aspect of the present invention relates to a semiconductor device and a manufacturing method thereof.
  • One aspect of the present invention relates to a transistor and a manufacturing method thereof.
  • One aspect of the present invention relates to a display device including a semiconductor device.
  • one embodiment of the present invention is not limited to the above technical field.
  • Examples of technical fields of one embodiment of the present invention disclosed in this specification and the like include semiconductor devices, display devices, light-emitting devices, power storage devices, memory devices, electronic devices, lighting devices, input devices, input/output devices, driving methods thereof, and manufacturing methods thereof.
  • a semiconductor device refers to any device that can function by utilizing semiconductor characteristics.
  • High-definition display panels mainly use light-emitting elements such as organic electroluminescence (EL) elements or light-emitting diodes (LEDs).
  • EL organic electroluminescence
  • LEDs light-emitting diodes
  • Patent Document 1 discloses a high-definition display device that uses an organic EL device (also called an organic EL element).
  • circuit elements including transistors
  • the photolithography method used in the semiconductor manufacturing process has an exposure limit for the exposure equipment, and the minimum processing dimensions for the resist mask pattern size and the distance between adjacent patterns are determined by the exposure equipment, resist material, and other conditions.
  • a margin also called an inclusion margin
  • Such layout restrictions are sometimes called design rules. These design rules can be a major constraint when arranging circuit elements at a high density.
  • An object of one embodiment of the present invention is to provide a transistor that can be miniaturized. Another object is to provide a semiconductor device in which transistors can be arranged at high density. Another object is to provide a transistor with good electrical characteristics. Another object is to provide a transistor that can pass a large current. Another object is to provide a transistor with an extremely short channel length. Another object is to provide a transistor that occupies a small area. Another object is to provide a display device that can be easily made high-definition. Another object is to provide a highly reliable transistor, semiconductor device, and display device.
  • An object of one embodiment of the present invention is to provide a semiconductor device, a display device, or an electronic device having a novel structure.
  • An object of one embodiment of the present invention is to alleviate at least one of the problems of the prior art.
  • One aspect of the present invention is a semiconductor device that includes an insulating layer having an opening, and a first transistor and a second transistor each having a source electrode and a drain electrode on the insulating layer and the other of the source electrode and drain electrode below the insulating layer.
  • the semiconductor layers of the first transistor and the second transistor are in contact with the side of the insulating layer in the opening.
  • the present invention is a semiconductor device having a first transistor, a second transistor, and an insulating layer.
  • the first transistor has a first conductive layer, a second conductive layer, a first semiconductor layer, a gate insulating layer, and a first gate electrode.
  • the second transistor has a third conductive layer, a fourth conductive layer, a second semiconductor layer, a gate insulating layer, and a second gate electrode.
  • the insulating layer is located on the first conductive layer and the third conductive layer, and has an opening that reaches the first conductive layer and the third conductive layer.
  • the second conductive layer and the fourth conductive layer are located on the insulating layer.
  • the first semiconductor layer has a portion in contact with the first conductive layer, a portion in contact with the second conductive layer, and a portion in contact with a part of the side surface of the insulating layer inside the opening.
  • the second semiconductor layer has a portion in contact with the third conductive layer, a portion in contact with the fourth conductive layer, and a portion in contact with another part of the side surface of the insulating layer inside the opening.
  • the gate insulating layer covers the first semiconductor layer and the second semiconductor layer in the opening.
  • the first gate electrode covers the first semiconductor layer through the gate insulating layer in the opening.
  • the second gate electrode covers the first semiconductor layer through the gate insulating layer in the opening.
  • the present invention is a semiconductor device having a first transistor, a second transistor, and an insulating layer.
  • the first transistor has a first conductive layer, a second conductive layer, a first semiconductor layer, a gate insulating layer, and a gate electrode.
  • the second transistor has a third conductive layer, a fourth conductive layer, a second semiconductor layer, a gate insulating layer, and a gate electrode.
  • the insulating layer is located on the first conductive layer and the third conductive layer, and has an opening that reaches the first conductive layer and the third conductive layer.
  • the second conductive layer and the fourth conductive layer are located on the insulating layer.
  • the first semiconductor layer has a portion in contact with the first conductive layer, a portion in contact with the second conductive layer, and a portion in contact with a part of a side surface of the insulating layer inside the opening.
  • the second semiconductor layer has a portion in contact with the third conductive layer, a portion in contact with the fourth conductive layer, and a portion in contact with another part of the side surface of the insulating layer inside the opening.
  • the gate insulating layer covers the first semiconductor layer and the second semiconductor layer within the opening.
  • the gate electrode has a portion that covers the first semiconductor layer through the gate insulating layer within the opening, and a portion that covers the second semiconductor layer through the gate insulating layer.
  • the first semiconductor layer and the second semiconductor layer each contain a first metal oxide. It is also preferable that the portion of the first conductive layer that contacts the first semiconductor layer and the portion of the third conductive layer that contacts the second semiconductor layer contain a second metal oxide.
  • the first semiconductor layer and the second semiconductor layer each contain a first metal oxide. It is also preferable that the portion of the second conductive layer that contacts the first semiconductor layer and the portion of the fourth conductive layer that contacts the second semiconductor layer contain a third metal oxide.
  • the first semiconductor layer and the second semiconductor layer each contain a metal oxide.
  • the insulating layer is a laminate of a first insulating film, a second insulating film, and a third insulating film in this order. It is further preferable that the first insulating film and the third insulating film contain a nitride, and the second insulating film contains an oxide.
  • the first insulating film and the third insulating film contain silicon nitride. Furthermore, it is preferable that the second insulating film contains silicon oxide.
  • the angle between the side surface of the insulating layer at the opening and the top surface of the first conductive layer is 75 degrees or more and 90 degrees or less.
  • Another embodiment of the present invention is a display device including any one of the above semiconductor devices, a first display element, and a second display element.
  • the first display element is electrically connected to the first transistor
  • the second display element is electrically connected to the second transistor.
  • the plurality of first display elements are arranged at a density of 3000 ppi or more.
  • a transistor that can be miniaturized can be provided.
  • a semiconductor device in which transistors can be arranged at high density can be provided.
  • a transistor with good electrical characteristics can be provided.
  • a transistor that can pass a large current can be provided.
  • a transistor with an extremely short channel length can be provided.
  • a transistor that occupies a small area can be provided.
  • a display device that can be easily made high-definition can be provided.
  • a highly reliable transistor, semiconductor device, and display device can be provided.
  • the present invention it is possible to provide a semiconductor device, a display device, or an electronic device having a novel configuration. According to one aspect of the present invention, it is possible to at least alleviate at least one of the problems of the prior art.
  • 1A to 1C show examples of the configuration of a semiconductor device.
  • 2A and 2B show examples of the configuration of a semiconductor device.
  • FIG. 3 shows an example of the configuration of a semiconductor device.
  • 4A and 4B show examples of the configuration of a semiconductor device.
  • 5A and 5B show examples of the configuration of a semiconductor device.
  • 6A and 6B show examples of the configuration of a semiconductor device.
  • 7A to 7C show examples of the configuration of a semiconductor device.
  • 8A to 8C show examples of the configuration of a semiconductor device.
  • 9A and 9B show examples of the configuration of a semiconductor device.
  • 10A to 10C show examples of the configuration of a semiconductor device.
  • 11A and 11B show configuration examples of a display device.
  • FIG. 12 shows an example of the configuration of a display device.
  • FIG. 13 shows an example of the configuration of a display device.
  • FIG. 14 shows an example of the configuration of a display device.
  • FIG. 15 shows an example of the configuration of a display device.
  • FIG. 16 shows an example of the configuration of a display device.
  • FIG. 17 shows an example of the configuration of a display device.
  • FIG. 18 shows an example of the configuration of a display device.
  • FIG. 19 shows an example of the configuration of a display device.
  • FIG. 20 shows an example of the configuration of a display device.
  • FIG. 21 shows an example of the configuration of a display device.
  • 22A to 22F are diagrams illustrating a method for manufacturing a display device.
  • 23A to 23D show configuration examples of electronic devices.
  • 24A to 24F show configuration examples of electronic devices.
  • 25A to 25G show configuration examples of electronic devices.
  • a transistor is a type of semiconductor element that can perform functions such as amplifying current or voltage, and switching operations that control conduction or non-conduction.
  • transistor includes IGFETs (Insulated Gate Field Effect Transistors) and thin film transistors (TFTs).
  • source and drain may be interchangeable when transistors of different polarity are used, or when the direction of current changes during circuit operation. For this reason, in this specification, the terms “source” and “drain” can be used interchangeably.
  • electrically connected includes cases where the connection is made via "something that has some kind of electrical action.”
  • something that has some kind of electrical action is not particularly limited as long as it allows the transmission and reception of electrical signals between the connected objects.
  • something that has some kind of electrical action includes electrodes or wiring, as well as switching elements such as transistors, resistive elements, coils, and other elements with various functions.
  • the top surface shapes roughly match means that at least a portion of the contours of the stacked layers overlap. For example, this includes cases where the upper and lower layers are processed using the same mask pattern, or where a portion of the mask pattern is the same. However, strictly speaking, there are also cases where the contours do not overlap, and the upper layer is located inside the lower layer, or outside the lower layer, and in these cases, it may also be said that "the top surface shapes roughly match.”
  • film and “layer” are interchangeable.
  • insulating layer may be interchangeable with the term “insulating film.”
  • an EL layer refers to a layer that is provided between a pair of electrodes of a light-emitting element and contains at least a light-emitting substance (also called a light-emitting layer), or a laminate that contains a light-emitting layer.
  • a display panel which is one aspect of a display device, has the function of displaying (outputting) images, etc. on a display surface. Therefore, a display panel is one aspect of an output device.
  • a display panel having a connector such as an FPC (Flexible Printed Circuit) or TCP (Tape Carrier Package), attached to the substrate, or an IC mounted on the substrate using a method such as COG (Chip On Glass), may be referred to as a display panel module, display module, or simply a display panel.
  • a connector such as an FPC (Flexible Printed Circuit) or TCP (Tape Carrier Package)
  • COG Chip On Glass
  • a semiconductor device has at least two transistors and an insulating layer.
  • One of the transistors has a first semiconductor layer, a gate insulating layer, a first gate electrode, a first electrode functioning as one of a source electrode and a drain electrode, and a second electrode functioning as the other.
  • the other transistor has a second semiconductor layer, a gate insulating layer, a second gate electrode, a third electrode functioning as one of a source electrode and a drain electrode, and a fourth electrode functioning as the other.
  • the semiconductor device can also be said to have an insulating layer having an opening, and two transistors (a first transistor and a second transistor) each having a source electrode and a drain electrode on the insulating layer and the other source electrode and drain electrode below the insulating layer. Furthermore, the semiconductor layers of the two transistors can each be configured to be in contact with the side of the insulating layer in the opening.
  • the source electrode and drain electrode are located at different heights, so the current flowing through the semiconductor flows in the height direction.
  • the channel length direction has a height (vertical) component
  • the transistor of one embodiment of the present invention can also be called a VFET (Vertical Field Effect Transistor), vertical transistor, vertical channel transistor, etc. Since the source electrode, semiconductor, and drain electrode of the transistor can be provided overlapping each other, the occupied area can be significantly reduced compared to a so-called planar type transistor (which can also be called a lateral transistor, LFET (Lateral FET), etc.) in which the semiconductor is arranged on a plane.
  • planar type transistor which can also be called a lateral transistor, LFET (Lateral FET), etc.
  • the area occupied by the transistors can be reduced compared to display devices that use conventional horizontal transistors, making it possible to reduce the size of pixels, increase the functionality of pixels, and improve the aperture ratio. This makes it possible to realize display devices with higher resolution, higher reliability, and lower power consumption than conventional devices.
  • the first transistor and the second transistor may share a gate electrode. That is, one gate electrode may have a portion that covers the first semiconductor layer and a portion that covers the second semiconductor layer.
  • first transistor and the second transistor may have separate gate insulating layers instead of sharing a common gate insulating layer.
  • gate insulating layers with different thicknesses, materials, stacking structures, etc. for each transistor, it is possible to create transistors with different electrical characteristics.
  • one opening in an insulating layer can be shared by two vertical transistors. Therefore, the distance between the two transistors can be significantly reduced compared to when an opening is provided for each of the two transistors.
  • FIG. 1A is a schematic top view of a semiconductor device
  • Fig. 1B and Fig. 1C are schematic cross-sectional views taken along lines AB and CD in Fig. 1A, respectively.
  • the semiconductor device has transistors 10a and 10b, which are provided on an insulating layer 11 on a substrate (not shown), and an insulating layer 41.
  • Transistor 10a has a semiconductor layer 21a, an insulating layer 22, a conductive layer 23, a conductive layer 24a, and a conductive layer 25a.
  • Transistor 10b has a semiconductor layer 21b, an insulating layer 22, a conductive layer 23, a conductive layer 24b, and a conductive layer 25b.
  • Insulating layer 22 functions as a gate insulating layer for each transistor.
  • Conductive layer 23 functions as a gate electrode for each transistor.
  • Conductive layer 24a and conductive layer 24b each function as one of a source electrode and a drain electrode, and conductive layer 25a and conductive layer 25b each function as the other.
  • the conductive layer 24a and the conductive layer 24b are provided on the insulating layer 11, and the insulating layer 41 is provided on the conductive layer 24a and the conductive layer 24b.
  • the insulating layer 41 has the conductive layer 24a, the conductive layer 24b, and an opening 20 that reaches the insulating layer 11.
  • the conductive layer 25a and the conductive layer 25b are provided on the insulating layer 41.
  • the conductive layer 25a and the conductive layer 25b may have a cutout portion whose top surface shape matches that of the opening 20 in a plan view.
  • the insulating layer 11 functions as a base insulating layer for the transistors 10a and 10b. Note that the transistors 10a and 10b may be formed directly on the substrate without providing the insulating layer 11 that serves as the base insulating layer.
  • the insulating layer 41 functions as an interlayer insulating layer (spacer) that insulates the conductive layers 24a and 25a, and the conductive layers 24b and 25b, respectively.
  • FIG. 1C shows a cross-sectional view of transistor 10a, the same applies to transistor 10b.
  • Semiconductor layer 21a and semiconductor layer 21b each have a portion located inside opening 20.
  • Semiconductor layer 21a contacts the upper surface and side surface of conductive layer 25a, the side surface of insulating layer 41 in opening 20, and the upper surface of conductive layer 24a.
  • Semiconductor layer 21b contacts the upper surface and side surface of conductive layer 25b, the side surface of insulating layer 41 in opening 20, and the upper surface of conductive layer 24b.
  • the insulating layer 22 is provided to cover the insulating layer 41, the conductive layer 25a, the conductive layer 25b, the semiconductor layer 21a, the semiconductor layer 21b, the conductive layer 24a, the conductive layer 24b, and the insulating layer 11.
  • the portion of the insulating layer 22 located inside the opening 20 is provided along the upper and side surfaces of the semiconductor layer 21a, the side surfaces of the conductive layer 24a, the upper and side surfaces of the semiconductor layer 21b, the side surfaces of the conductive layer 24b, and the upper surface of the insulating layer 11.
  • the insulating layer 22 has a portion that contacts the side surface of the insulating layer 41.
  • the conductive layer 23 is provided to cover a portion of the insulating layer 22.
  • the portion of the conductive layer 23 that overlaps with the semiconductor layer 21a via the insulating layer 22 functions as the gate electrode of the transistor 10a.
  • the portion of the conductive layer 23 that overlaps with the semiconductor layer 21b via the insulating layer 22 functions as the gate electrode of the transistor 10b.
  • the conductive layers 24a and 24b are preferably located on the same surface (here, on the insulating layer 11), and are preferably formed by processing the same conductive film.
  • the conductive layers 25a and 25b are preferably located on the same surface (here, on the insulating layer 41), and are preferably formed by processing the same conductive film.
  • the conductive layers 24a and 24b are provided so as to extend in the same direction.
  • the conductive layers 25a and 25b are provided so as to extend in the same direction.
  • the opening 20 provided in the insulating layer 41 has an oval shape in a plan view. That is, it has a shape with two arcs with a central angle of 180 degrees and two straight lines connecting them. In this way, it is preferable that the width of the opening 20 in the direction parallel to the extension direction of the conductive layers 24a and 24b (vertical) is smaller than the width in the direction perpendicular to the direction (horizontal) (also called a horizontally elongated shape). This allows the vertical size of the opening 20 to be smaller than when the opening 20 has a shape with the same aspect ratio, such as a circle.
  • the shape of the opening 20 is not limited to this, and can be a variety of shapes.
  • it can be an ellipse, a rectangle with rounded corners, etc.
  • It can also be a regular polygon such as an equilateral triangle, square, or regular pentagon, or a polygon other than a regular polygon.
  • the channel width can be increased by using a concave polygon, such as a star polygon, which is a polygon with at least one interior angle exceeding 180 degrees.
  • Other shapes include a polygon with rounded corners, and a closed curve that combines straight lines and curves.
  • the channel lengths of the transistors 10a and 10b can be precisely controlled by the thickness of the insulating layer 41, so that the variation in channel length can be made extremely small compared to planar type transistors. Furthermore, by making the insulating layer 41 thinner, a transistor with an extremely short channel length can be manufactured. For example, a transistor with a channel length of 2 ⁇ m or less, 1 ⁇ m or less, 500 nm or less, 300 nm or less, 200 nm or less, 100 nm or less, 50 nm or less, 30 nm or less, or 20 nm or less, and 5 nm or more, 7 nm or more, or 10 nm or more can be manufactured.
  • Various semiconductor materials can be used for the semiconductor layer 21a and the semiconductor layer 21b, but it is particularly preferable to use an oxide semiconductor containing a metal oxide.
  • an oxide semiconductor formed under appropriate conditions a transistor that combines a high on-current and an extremely low off-current can be realized at low cost.
  • a preferred configuration example in which an oxide semiconductor is used for the semiconductor layer 21a and the semiconductor layer 21b will be described.
  • the conductive layers 24a, 24b, 25a, and 25b are configured so that the semiconductor layer 21a or 21b is in contact with the upper surface of each of them. Therefore, when an oxide semiconductor is used for the semiconductor layers 21a and 21b, the surfaces of the conductive layers 24a, 24b, 25a, and 25b may be oxidized due to the influence of heat during or after the film formation process of the semiconductor film that becomes the semiconductor layers 21a and 21b, and an insulating oxide film may be formed between the semiconductor layer 21a or 21b, which may increase the contact resistance. Therefore, it is preferable to use an oxide conductor containing a conductive oxide for at least the uppermost part of the conductive layers 24a, 24b, 25a, and 25b.
  • Conductive layer 24a, conductive layer 24b, conductive layer 25a, and conductive layer 25b can also be called oxide layers, metal oxide layers, or oxide conductor layers.
  • a part of the conductive layer 24a and the conductive layer 24b can be used as one of the source wiring and the drain wiring.
  • a part of the conductive layer 25a and the conductive layer 25b can be used as the other of the source wiring and the drain wiring.
  • the electrical resistance is low. Therefore, it is preferable to use a material having a higher conductivity than an oxide conductor, such as a metal, an alloy, or a nitride thereof.
  • Figure 4A is an enlarged view of Figure 1B.
  • the channel length L1 of transistor 10a is the length of the portion of the semiconductor layer 21a that is in contact with insulating layer 41 on the path that connects the portion of the semiconductor layer 21a that is in contact with conductive layer 25a and the portion of the semiconductor layer 21a that is in contact with conductive layer 24a.
  • the channel length L2 of transistor 10b is the same.
  • the channel lengths L1 and L2 are equal to the thickness of the insulating layer 41.
  • the angle ⁇ is smaller (or larger) than 90 degrees, the channel lengths L1 and L2 can be made larger than the thickness of the insulating layer 41.
  • the angle ⁇ is smaller than 90 degrees, the step coverage is improved when forming the semiconductor film that becomes the semiconductor layer 21a, the insulating layer 22, etc., which is preferable.
  • the angle ⁇ is too small, the shape of the opening 20 becomes a mortar shape, and the difference in the electrical characteristics of the transistor when the source electrode and the drain electrode are interchanged becomes large. Therefore, it is preferable that the angle between the side of the insulating layer 41 in the opening 20 and the conductive layer 24a or the conductive layer 24b is 75 degrees or more and 90 degrees or less.
  • FIG. 4B is a cross-sectional view of the semiconductor device cut along a cut plane E-F shown in FIG. 4A, which is parallel to the surface of insulating layer 11 and passes through insulating layer 41.
  • the positions of conductive layer 23, conductive layer 24a, conductive layer 24b, etc. are indicated by dashed lines.
  • the semiconductor layers 21a and 21b are each provided along the side of the insulating layer 41 in the opening 20.
  • the semiconductor layers 21a and 21b each have a U-shape.
  • the insulating layer 22 is provided inside the semiconductor layers 21a and 21b. As described above, a portion of the insulating layer 22 is provided in contact with the insulating layer 41.
  • the conductive layer 23 is provided inside the insulating layer 22.
  • the channel width W1 of transistor 10a can be said to be the length of the semiconductor layer 21a along the opening 20. The same can be said for the channel width W2 of transistor 10b. If the insulating layer 41 has a tapered shape, the circumference of the opening 20 will differ depending on the height. Therefore, the channel width W1 of transistor 10a and the channel width W2 of transistor 10b may use the value at the height of the upper end, the height of the lower end, or the center height of the insulating layer 41, or may be the average value or median value thereof.
  • the semiconductor layer 21a, the semiconductor layer 21b, the insulating layer 22, etc. are formed along the inner wall of the opening 20 of the insulating layer 41, so depending on the film formation method, the thickness of this part may be thin.
  • film formation methods such as sputtering or plasma CVD
  • films formed on surfaces inclined or perpendicular to the substrate surface tend to be thinner than films formed on surfaces parallel to the substrate surface.
  • film formation methods such as atomic layer deposition (ALD) or thermal CVD can form a film of uniform thickness regardless of the angle of the surface to be formed.
  • the angle ⁇ of the sidewall of the opening 20 of the insulating layer 41 is 80 degrees or more, or 85 degrees or more, it is preferable to form the semiconductor layer 21a, the semiconductor layer 21b, and the insulating layer 22 using the ALD method.
  • Transistor placement method Next, an example of a method for arranging transistors will be described by comparing a case in which one transistor is formed in one opening provided in an insulating layer with a case in which one opening is shared by two transistors, which is one embodiment of the present invention.
  • Figure 5A shows the positional relationship in a plan view between the opening 20C in the insulating layer and the conductive layer 24. Also in Figure 5A, four conductive layers 24 are arranged with the minimum arrangement period P that satisfies the design rules.
  • the minimum width of the conductive layer 24 is the sum (N+2L) of the minimum dimension N of the opening 20C and the two containment margins L that sandwich the opening 20C.
  • FIG. 5B shows the positional relationship in plan view between the opening 20 provided in the insulating layer and the conductive layers 24a and 24b.
  • FIG. 5B also shows four conductive layers (two conductive layers 24a and two conductive layers 24b).
  • pairs of two conductive layers, 24a and 24b are periodically arranged, so if the arrangement period of each conductive layer is P, then the arrangement period of the pair of two conductive layers is 2P.
  • the opening 20 Focusing on the opening 20 and the conductive layer 24a, the opening 20 is disposed beyond one end of the conductive layer 24a (the end on the right side of the drawing). Therefore, it is necessary to consider the inclusion margin only on the other end side of the conductive layer 24a (the end on the left side of the drawing). Similarly, it is necessary to consider the inclusion margin only on one end side (the end on the right side of the drawing) of the conductive layer 24b. Therefore, the conductive layer 24a and the conductive layer 24b can each be formed with a minimum width (N).
  • the minimum pattern width N is 1.5 ⁇ m
  • the minimum inter-pattern distance M is 1 ⁇ m
  • the inclusion margin L is 0.5 ⁇ m
  • the array period P in FIG. 5A is 3.5 ⁇ m
  • the array period in FIG. 5B is 2.5 ⁇ m.
  • the minimum pixel array period is 10.5 ⁇ m in the example of FIG. 5A
  • the maximum resolution is 2419 ppi.
  • the minimum pixel array period is 7.5 ⁇ m
  • the maximum resolution is 3387 ppi. In other words, it is possible to manufacture displays with resolution significantly exceeding 3000 ppi on a glass substrate using a general display manufacturing device.
  • the semiconductor device of one embodiment of the present invention enables transistors to be arranged at an extremely high density. Furthermore, by applying such a semiconductor device to a display device, a display device with extremely high definition can be realized.
  • the semiconductor device of one embodiment of the present invention is not limited to display devices and can also be applied to various devices using transistors (computing devices, memory devices), and the like. Since high integration is particularly required for memory devices, the semiconductor device of one embodiment of the present invention can be suitably applied.
  • Configuration Example 2-1 The configuration shown in FIGS. 6A and 6B differs from Configuration Example 1 mainly in that the insulating layer 41, the conductive layer 25a, the conductive layer 25b, the conductive layer 24a, and the conductive layer 24b each have a laminated structure.
  • transistor 10a and transistor 10b when describing matters common to transistor 10a and transistor 10b, they may be referred to as transistor 10. Similarly, when describing matters common to components distinguished by letters, such as conductive layer 24a and conductive layer 24b, they may be described using symbols without the letters.
  • the insulating layer 41 functions as an interlayer insulating layer (spacer) that insulates the conductive layer 24 from the conductive layer 25.
  • a laminated film of insulating layer 41a, insulating layer 41b, and insulating layer 41c is used as the insulating layer 41.
  • the semiconductor layer 21 is provided in contact with the inner wall of the opening 20 of the insulating layer 41b. It is preferable to use an oxide insulating film for the insulating layer 41b. In particular, it is preferable to use an oxide insulating film that releases oxygen when heated. Therefore, oxygen is supplied from the insulating layer 41b to the semiconductor layer 21 by heat treatment or heat applied during the manufacturing process, and oxygen deficiency in the semiconductor layer 21 can be reduced. In addition, it is preferable to have a structure in which the insulating layer 41b is sandwiched between the insulating layer 41a and the insulating layer 41c, which have barrier properties against oxygen.
  • the conductive layer 31 and the conductive layer 33 are in contact with the semiconductor layer 21.
  • an oxide semiconductor is used for the semiconductor layer 21, it is preferable to use for the conductive layer 31 and the conductive layer 33 a conductive material that is difficult to oxidize, a conductive material that maintains low electrical resistance even when oxidized, or an oxide conductive material.
  • a conductive material having higher conductivity for conductive layer 32 and conductive layer 34 compared to conductive layer 31 or conductive layer 33 is preferable to use a conductive material including a metal, an alloy, or a metal nitride film.
  • Configuration Example 2-2 The configuration shown in FIGS. 7A and 7B differs from Configuration Example 1 mainly in that a conductive layer 26 and an insulating layer 27 are provided.
  • the conductive layer 26 functions as a second gate electrode (or back gate electrode).
  • the insulating layer 27 is located between the conductive layer 26 and the semiconductor layer 21 and functions as a second gate insulating layer (or back gate insulating layer).
  • a fixed potential or any signal can be applied to the conductive layer 26.
  • the threshold voltage of the transistor can be controlled.
  • the potential on the back channel side of the semiconductor layer 21 can be fixed, the variation in electrical characteristics can be reduced.
  • the conductive layer 26 may be electrically connected to any one of the conductive layers 24, 25, and 23 and may be applied with the same potential.
  • the insulating layer 41 has a four-layer structure consisting of insulating layer 41a, insulating layer 41b1, insulating layer 41b2, and insulating layer 41c.
  • the conductive layer 26 is provided between insulating layer 41b1 and insulating layer 41b2.
  • the insulating layer 41b1 and the insulating layer 41b2 may not be included.
  • the conductive layer 26 is provided between the insulating layer 41a and the insulating layer 41c.
  • the insulating layer 27 is provided along the side surfaces of the insulating layer 41a, the insulating layer 41b1, the conductive layer 26, the insulating layer 41b2, the insulating layer 41c, the conductive layer 32, and the conductive layer 31.
  • the insulating layer 27 can be formed by forming openings including the opening 20 in the insulating layer 41a, the insulating layer 41b1, the conductive layer 26, the insulating layer 41b2, the insulating layer 41c, the conductive layer 32, and the conductive layer 31, depositing an insulating film that covers the opening by a film deposition method with high coverage, and then performing anisotropic etching.
  • the insulating layer 27 is formed in the opening including the opening 20, and can also be called a sidewall insulating film.
  • the conductive layer 26 is provided in common to the transistors 10a and 10b, but it may be provided separately. This allows the threshold voltage to be different for each transistor, increasing the degree of freedom in circuit design.
  • Transistor 10a has conductive layer 23a, and transistor 10b has conductive layer 23b. Different signals can be applied to conductive layer 23a and conductive layer 23b, respectively. Therefore, transistor 10a and transistor 10b can be operated at different timings.
  • the conductive layers 23a and 23b can be formed using the same conductive film.
  • the conductive layers 23a and 23b are separated by a region that overlaps with the opening 20. In other words, a region is provided inside the opening 20 that does not overlap with either the conductive layer 23a or the conductive layer 23b.
  • the configuration shown in Figures 9A and 9B differs from the above example configuration mainly in that the ends of each layer are processed to be roughly vertical. By processing the ends of each layer roughly vertically, the area occupied by the transistors is reduced, which is preferable as it makes it easier to miniaturize the transistors.
  • the diameter of the opening 20 is shrinking with miniaturization.
  • the conductive layer 23 is too thin, the wiring resistance increases, so there is a limit to how thin it can be. Therefore, as miniaturization progresses, the conductive layer 23 becomes thicker relative to the diameter of the opening 20.
  • the opening 20 is provided so as to be filled with the conductive layer 23.
  • the upper surface of the conductive layer 23 may be flattened.
  • FIGS. 10A and 10B show an example having a conductive layer 26 that functions as a second gate electrode and an insulating layer 27 that functions as a second gate insulating layer.
  • the conductive layer 26 is provided between the insulating layer 41b1 and the insulating layer 41b2.
  • the insulating layer 41b2 is provided to cover the conductive layer 26 and the insulating layer 41b1, and has a flat upper surface.
  • the insulating layer 41c is provided to cover the flat upper surface of the insulating layer 41b2.
  • the insulating layer 27 is provided along the roughly vertical side surfaces of the insulating layer 41a, the insulating layer 41b1, the conductive layer 26, the insulating layer 41b2, the insulating layer 41c, the conductive layer 32, and the conductive layer 31.
  • FIG. 10C shows an example in which conductive layer 26 is embedded in insulating layer 41b.
  • the bottom surface of conductive layer 26 contacts insulating layer 41a, and the top surface contacts insulating layer 41c.
  • the top surfaces of conductive layer 26 and insulating layer 41b are both flattened, and the heights of the top surfaces are roughly the same.
  • Insulating layer 41c is provided to cover the flat top surfaces of conductive layer 26 and insulating layer 41b.
  • an insulating substrate for example, a glass substrate, a quartz substrate, a sapphire substrate, a stabilized zirconia substrate (such as an yttria stabilized zirconia substrate), a resin substrate, etc.
  • a semiconductor substrate for example, a semiconductor substrate made of silicon or germanium, or a compound semiconductor substrate made of silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, gallium oxide, or gallium nitride, etc. are available.
  • a semiconductor substrate having an insulating region inside the aforementioned semiconductor substrate for example, an SOI (Silicon On Insulator) substrate, etc. are available.
  • the conductive substrate there is a graphite substrate, a metal substrate, an alloy substrate, a conductive resin substrate, etc. are available.
  • a substrate having a metal nitride, a substrate having a metal oxide, etc. can be used.
  • a substrate in which a conductive layer or a semiconductor layer is provided on an insulating substrate a substrate in which a conductive layer or an insulating layer is provided on a semiconductor substrate, a substrate in which a semiconductor layer or an insulating layer is provided on a conductive substrate, etc. are available.
  • a substrate provided with elements may be used.
  • the elements provided on the substrate include a capacitor element, a resistor element, a switch element (including a transistor), a light-emitting element, a photoelectric conversion element, a memory element, and the like.
  • the semiconductor layer 21 preferably includes a metal oxide (oxide semiconductor).
  • metal oxides that can be used in the semiconductor layer 21 include In oxide, Ga oxide, and Zn oxide.
  • the metal oxide preferably contains at least In or Zn.
  • the metal oxide preferably contains two or three elements selected from In, element M, and Zn.
  • the element M is a metal element or semimetal element with a high bond energy with oxygen, for example, a metal element or semimetal element with a bond energy with oxygen higher than that of indium.
  • element M include Al, Ga, Sn, Y, Ti, V, Cr, Mn, Fe, Co, Ni, Zr, Mo, Hf, Ta, W, La, Ce, Nd, Mg, Ca, Sr, Ba, B, Si, Ge, and Sb.
  • the element M contained in the metal oxide is preferably one or more of the above elements, and is preferably one or more of Al, Ga, Y, and Sn, and more preferably Ga.
  • metal oxides containing In, M, and Zn may be referred to as In-M-Zn oxides hereafter.
  • the metal oxide is an In-M-Zn oxide
  • the atomic ratio of In in the In-M-Zn oxide is equal to or greater than the atomic ratio of M.
  • the term "close composition" includes a range of ⁇ 30% of the desired atomic ratio.
  • the atomic ratio of In in the In-M-Zn oxide may be less than the atomic ratio of M.
  • the semiconductor layer 21 may be made of, for example, In oxide, In-Zn oxide, In-Ga oxide, In-Sn oxide, In-Ti oxide, In-Ga-Al oxide, In-Ga-Sn oxide, In-Ga-Zn oxide, In-Sn-Zn oxide, In-Al-Zn oxide, In-Ti-Zn oxide, In-Ga-Sn-Zn oxide, In-Ga-Al-Zn oxide, etc.
  • Ga-Zn oxide may also be used.
  • a material that does not contain Zn, such as indium oxide, is preferred because it increases compatibility with the LSI manufacturing process.
  • a material that contains Zn is preferred because it is easier to increase crystallinity.
  • the metal oxide may contain one or more metal elements with a large periodic number.
  • the field effect mobility of the transistor may be increased.
  • metal elements with a large periodic number include metal elements belonging to the fifth period and metal elements belonging to the sixth period. Specific examples of such metal elements include Y, Zr, Ag, Cd, Sn, Sb, Ba, Pb, Bi, La, Ce, Pr, Nd, Pm, Sm, and Eu. La, Ce, Pr, Nd, Pm, Sm, and Eu are called light rare earth elements.
  • the metal oxide may also contain one or more nonmetallic elements.
  • the field effect mobility of the transistor may be increased.
  • nonmetallic elements include carbon, nitrogen, phosphorus, sulfur, selenium, fluorine, chlorine, bromine, and hydrogen.
  • the metal oxide can be formed preferably by sputtering or atomic layer deposition (ALD). In particular, it is preferable to form the metal oxide film by ALD, which has excellent coating properties.
  • ALD atomic layer deposition
  • the composition of the metal oxide film may differ from the composition of the target. In particular, the zinc content in the metal oxide film may decrease to about 50% compared to the target.
  • the content of a certain metal element in a metal oxide refers to the ratio of the number of atoms of that element to the total number of atoms of the metal element contained in the metal oxide.
  • the content of metal element X can be expressed as Ax / ( Ax + Ay + Az ).
  • metal element X when the ratio of the numbers of atoms of metal element X, metal element Y , and metal element Z in the metal oxide (atomic ratio) is expressed as Bx :By: Bz , the content of metal element X can be expressed as Bx /( Bx + By + Bz ).
  • a transistor with high reliability when a positive bias is applied can be obtained.
  • a transistor with a small amount of variation in threshold voltage in a PBTS (Positive Bias Temperature Stress) test can be obtained.
  • the Ga content it is possible to produce a transistor with high reliability against light.
  • NBTIS Near Bias Temperature Illumination Stress
  • a metal oxide in which the atomic ratio of Ga is equal to or greater than the atomic ratio of In has a larger band gap, and it is possible to reduce the amount of variation in threshold voltage in NBTIS testing of a transistor.
  • the metal oxide becomes highly crystalline, and the diffusion of impurities in the metal oxide can be suppressed. This suppresses fluctuations in the electrical characteristics of the transistor, and increases reliability.
  • the semiconductor layer 21 may have a laminated structure having two or more metal oxide layers.
  • the two or more metal oxide layers of the semiconductor layer 21 may have the same or approximately the same composition.
  • the same sputtering target can be used to form the semiconductor layer, which reduces manufacturing costs.
  • a laminated structure in which two or more oxide semiconductor layers with different compositions are laminated may also be used.
  • the ALD method it is also possible to form a metal oxide layer whose composition continuously varies in the thickness direction. This not only widens the range of design options compared to the case where a film with a fixed composition is used, but also prevents the generation of interface states between two layers with different compositions, thereby improving electrical characteristics and reliability.
  • the semiconductor layer 21 has a two-layer structure
  • a material with higher mobility highly conductive material
  • the second layer i.e., the side closer to the gate electrode
  • a material with higher mobility than the second layer may be used for the first layer, i.e., the side in contact with the source electrode and drain electrode. This makes it possible to reduce the contact resistance between the semiconductor layer 21 and the source electrode or drain electrode, thereby reducing parasitic resistance and making it possible to create a transistor with a large on-current.
  • the semiconductor layer 21 has a three-layer structure, it is preferable to use a material for the second layer that has a higher mobility than the first and third layers. This makes it possible to realize a transistor with a high on-current and high reliability.
  • the semiconductor layer 21 is preferably a crystalline metal oxide layer.
  • a metal oxide layer having a CAAC (c-axis aligned crystal) structure, a polycrystalline structure, a nano-crystalline (nc) structure, or the like can be used.
  • CAAC c-axis aligned crystal
  • nc nano-crystalline
  • the density of defect levels in the semiconductor layer 21 can be reduced, and a highly reliable semiconductor device can be realized.
  • OS transistors have extremely high field-effect mobility compared to transistors using amorphous silicon.
  • OS transistors have an extremely small source-drain leakage current in an off state (hereinafter also referred to as off-current), and can hold charge accumulated in a capacitor connected in series with the transistor for a long period of time.
  • off-current extremely small source-drain leakage current in an off state
  • the use of OS transistors can reduce the power consumption of a semiconductor device.
  • the semiconductor device can be applied to, for example, a display device.
  • a display device In order to increase the light emission luminance of a light-emitting device included in a pixel circuit of a display device, it is necessary to increase the amount of current flowing through the light-emitting device. To achieve this, it is necessary to increase the source-drain voltage of a driving transistor included in the pixel circuit. Since an OS transistor has a higher withstand voltage between the source and drain than a transistor using silicon (hereinafter, referred to as a Si transistor), a high voltage can be applied between the source and drain of the OS transistor. Therefore, by using an OS transistor as the driving transistor included in the pixel circuit, it is possible to increase the amount of current flowing through the light-emitting device and increase the light emission luminance of the light-emitting device.
  • an OS transistor When the transistor operates in the saturation region, an OS transistor can reduce the change in source-drain current in response to a change in gate-source voltage compared to a Si transistor. Therefore, by using an OS transistor as a driving transistor included in a pixel circuit, the amount of current flowing through the light-emitting device can be precisely controlled. This makes it possible to increase the gradation in the pixel circuit. Furthermore, even if the electrical characteristics (e.g., resistance) of the light-emitting device fluctuate or there is variation in the electrical characteristics, a stable current can flow.
  • the electrical characteristics e.g., resistance
  • the semiconductor layer 21 may have a layered material that functions as a semiconductor.
  • a layered material is a general term for a group of materials that have a layered crystal structure.
  • a layered crystal structure is a structure in which layers formed by covalent or ionic bonds are stacked via bonds weaker than covalent or ionic bonds, such as van der Waals bonds.
  • a layered material has high electrical conductivity within a unit layer, that is, high two-dimensional electrical conductivity.
  • Examples of the layered material include graphene, silicene, and chalcogenides.
  • Chalcogenides are compounds containing chalcogen (an element belonging to Group 16).
  • Examples of the chalcogenides include transition metal chalcogenides and Group 13 chalcogenides.
  • transition metal chalcogenides that can be used as the semiconductor layer of a transistor include molybdenum sulfide (representatively MoS 2 ), molybdenum selenide (representatively MoSe 2 ), molybdenum tellurium (representatively MoTe 2 ), tungsten sulfide (representatively WS 2 ), tungsten selenide (representatively WSe 2 ), tungsten tellurium (representatively WTe 2 ), hafnium sulfide (representatively HfS 2 ), hafnium selenide (representatively HfSe 2 ), zirconium sulfide (representatively ZrS 2 ), zirconium selenide (representatively ZrSe 2 ), and the like.
  • the insulating layer 22 (and the insulating layer 27) functions as a gate insulating layer of the transistor.
  • an oxide semiconductor is used for the semiconductor layer 21, it is preferable to use an oxide insulating film for at least the film of the insulating layer 22 that is in contact with the semiconductor layer 21.
  • silicon oxide, silicon oxynitride, aluminum oxide, aluminum oxynitride, hafnium oxide, hafnium oxynitride, gallium oxide, gallium oxynitride, yttrium oxide, yttrium oxynitride, and Ga-Zn oxide can be used.
  • a nitride insulating film such as silicon nitride, silicon nitride oxide, aluminum nitride, or aluminum nitride oxide can be used as the insulating layer 22.
  • the insulating layer 22 may have a stacked structure, and may have, for example, a stacked structure having one or more oxide insulating films and one or more nitride insulating films.
  • oxynitride refers to a material that contains more oxygen than nitrogen.
  • Nitrogen oxide refers to a material that contains more nitrogen than oxygen.
  • the insulating layer 22 is preferably made of a high-k insulating material, and preferably has a laminated structure of a high dielectric constant (high-k) material and a material with a higher dielectric strength than the high-k material.
  • the insulating layer 22 can be made of an insulating film (also called ZAZ) in which zirconium oxide, aluminum oxide, and zirconium oxide are laminated in this order.
  • an insulating film also called ZAZA in which zirconium oxide, aluminum oxide, zirconium oxide, and aluminum oxide are laminated in this order can be used.
  • an insulating film in which hafnium zirconium oxide, aluminum oxide, hafnium zirconium oxide, and aluminum oxide are laminated in this order can be used.
  • an insulator with a relatively high dielectric strength, such as aluminum oxide, in a laminated manner the dielectric strength is improved and electrostatic breakdown of the capacitance element can be suppressed.
  • a material exhibiting ferroelectricity may be used as the insulating layer 22.
  • materials exhibiting ferroelectricity include metal oxides such as hafnium oxide, zirconium oxide, and HfZrO x (x is a real number greater than 0).
  • the conductive layer 24 and the conductive layer 25 are in contact with the semiconductor layer 21.
  • an oxide semiconductor is used as the semiconductor layer 21
  • a metal that is easily oxidized such as aluminum
  • an insulating oxide e.g., aluminum oxide
  • the conductive layer 24 and the conductive layer 25 it is preferable to use, for example, titanium, tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, oxides containing lanthanum and nickel, etc. These are preferable because they are conductive materials that are difficult to oxidize, or materials that maintain their conductivity even when oxidized.
  • conductive oxides such as indium oxide, zinc oxide, In-Sn oxide, In-Zn oxide, In-W oxide, In-W-Zn oxide, In-Ti oxide, In-Ti-Sn oxide, In-Sn-Si oxide, and Ga-Zn oxide can be used.
  • Conductive oxides containing indium are particularly preferred because of their high conductivity.
  • oxide materials such as In-Ga-Zn oxide that can be applied to the semiconductor layer 21 can also be used as a conductive layer by increasing the carrier concentration.
  • the conductive layers 24 and 25 may be a single-layer structure of the conductive oxide film, a three-layer structure in which a titanium nitride film, a tungsten film, and a titanium nitride film are laminated in this order, a two-layer structure in which a ruthenium film or a ruthenium oxide film is laminated on tungsten, a two-layer structure in which a ruthenium film or a ruthenium oxide film is laminated on the conductive oxide film, or a two-layer structure in which the conductive oxide film is laminated on a ruthenium film or a ruthenium oxide film.
  • ruthenium is a material that is difficult to etch, so when used, the thinner the better, and it is preferable to use a thickness of, for example, 0.1 nm to 2 nm.
  • the conductive layer 23 (and the conductive layer 26) functions as a gate electrode, and various conductive materials can be used.
  • a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, lanthanum, etc., or an alloy containing the metal element. It is also possible to use a nitride of the above metal or alloy, or an oxide of the above metal or alloy.
  • tantalum nitride titanium nitride, tungsten, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel, etc.
  • a semiconductor with high electrical conductivity such as polycrystalline silicon containing an impurity element such as phosphorus, or a silicide such as nickel silicide.
  • nitrides and oxides that can be used for the conductive layers 24 and 25 may be applied to the conductive layer 23.
  • conductive layers 23, 24, and 25 also function as wiring, it is preferable to use a low-resistance conductive material in a laminated state.
  • the low-resistance conductive material that can be used for conductive layer 23 described above can also be used for the lower layer of conductive layer 24 and conductive layer 25.
  • the insulating layer 41b can be used as an interlayer insulating film.
  • a deposition method such as a sputtering method or a plasma CVD method.
  • a film with an extremely low hydrogen content can be obtained. Therefore, the supply of hydrogen to the semiconductor layer 21 can be suppressed, and the electrical characteristics of the transistor 10 can be stabilized.
  • the insulating layer 41b is in contact with the channel formation region of the semiconductor layer 21, it is preferable to use an oxide insulating film. In particular, it is preferable to use an oxide insulating film that releases oxygen when heated.
  • the oxide insulating film that can be used for the gate insulating layer can be used as the insulating layer 41b.
  • the insulating layer 41b functions as an interlayer insulating layer, it is preferable to use a film formation method that allows film formation at a high film formation rate compared to other insulating layers.
  • a TEOS Tetra-Ethyl-Ortho-Silicate, chemical formula: Si( OC2H5 ) 4
  • plasma CVD may be used as the insulating layer 41. This can improve productivity.
  • the insulating layers 41a and 41c are preferably made of a film through which hydrogen does not easily diffuse. By sandwiching the insulating layer 41b between the insulating layers 41a and 41c through which hydrogen does not easily diffuse, it is possible to prevent hydrogen from entering the insulating layer 41b that contacts the semiconductor layer 21 from the outside.
  • silicon nitride, silicon nitride oxide, silicon oxynitride, aluminum oxide, aluminum oxynitride, aluminum nitride, hafnium oxide, and hafnium aluminate can be used.
  • silicon nitride and silicon nitride oxide have the characteristics of releasing little impurities (e.g., water and hydrogen) from themselves and being difficult for oxygen and hydrogen to pass through (having barrier properties), so they can be suitably used as the insulating layer 41a and the insulating layer 41c.
  • silicon nitride, silicon nitride oxide, aluminum oxide, aluminum oxynitride, aluminum nitride, hafnium aluminate, and the like have barrier properties against oxygen and hydrogen, and therefore can be suitably used for the insulating layer 41a and the insulating layer 41c.
  • FIG. 11A shows a circuit diagram of a pixel of a display device exemplified below.
  • the pixel has a transistor M1, a transistor M2, a capacitor C, and a light-emitting element EL.
  • the pixel is connected to a wiring SL, a wiring GL, a wiring AL, and a wiring CL.
  • the wiring SL functions as a source line (signal line)
  • the wiring GL functions as a gate line
  • the wiring AL and the wiring CL function as power supply lines.
  • a higher potential is applied to the wiring AL than to the wiring CL.
  • the gate of transistor M1 is electrically connected to wiring GL, one of the source and drain is electrically connected to wiring SL, and the other is electrically connected to the gate of transistor M2 and one electrode of capacitance C.
  • One of the source and drain of transistor M2 is electrically connected to wiring AL, and the other is electrically connected to the other electrode of capacitance C and one electrode of light-emitting element EL.
  • the other electrode of light-emitting element EL is electrically connected to wiring CL.
  • Transistors according to one embodiment of the present invention can be used for the transistors M1 and M2. Specifically, two transistors M1 provided in two adjacent subpixels share one opening, and two transistors M2 share the other opening. This makes it possible to reduce the distance between adjacent subpixels, and to realize a high-definition display device.
  • the number of transistors may be one, or three or more.
  • the capacitor may be absent or may be two or more.
  • Pixel 50 has three subpixels arranged in the X direction. There are two types of subpixels: subpixel 51R and subpixel 51L. Of the two subpixels in which a pair of transistors sharing the above-mentioned aperture is provided, one is subpixel 51L and the other is subpixel 51R. There are two types of pixels 50: one with two subpixels 51L and one subpixel 51R, and one with one subpixel 51L and two subpixels 51R, which are arranged alternately in the X direction.
  • Subpixel 51R and subpixel 51L each have a transistor M1, a transistor M2, and a connection part CO.
  • the connection part CO is a part where a contact hole is provided for connection to a pixel electrode (not shown) of the light-emitting element EL.
  • Transistors M1 and M2 can be any of the transistors exemplified in configuration example 1 or configuration example 2 above.
  • the connection portion CO has a portion where a part of the conductive layer 55 and the conductive layer 61 are in contact.
  • the conductive layer 61 functions as a pixel electrode of the light-emitting element.
  • the conductive layer 62 on the conductive layer 61 functions as an optical adjustment layer.
  • the light-emitting element has a top emission structure. For this reason, it is preferable to use a conductive material with high reflectivity for visible light for the conductive layer 61.
  • a conductive material that is transparent to visible light can be used for the conductive layer 62.
  • conductive layers 51 and 52 are stacked as wiring SL.
  • the conductive layer 51 can refer to the conductive layer 32 described above, and the conductive layer 52 can refer to the conductive layer 31 described above. It is preferable to use a low-resistance conductive material for the conductive layer 51 and an oxide conductor material for the conductive layer 52.
  • the wiring SL has a portion that overlaps with the transistor M2 and the connection portion CO.
  • An insulating layer 43 that functions as an interlayer insulating layer is provided on the wiring SL, and a conductive layer 53 and a conductive layer 54 are stacked on the insulating layer 43 as the wiring AL.
  • the conductive layer 53 can be described above as the conductive layer 32, and the conductive layer 54 can be described above as the conductive layer 31. It is preferable to use a low-resistance conductive material for the conductive layer 53 and an oxide conductor material for the conductive layer 54.
  • Insulating layer 41a, insulating layer 41b, and insulating layer 41c are provided on insulating layer 43 and wiring SL, and conductive layer 55 is provided on insulating layer 41c.
  • An oxide conductor material is preferably used for conductive layer 55.
  • An opening 20b reaching conductive layer 54 is provided in insulating layer 41c, insulating layer 41b, and insulating layer 41a, and an opening having a top surface shape roughly matching that of opening 20b is also provided in conductive layer 55.
  • Semiconductor layer 21B is provided in contact with conductive layer 55, conductive layer 54, and the side surfaces of opening 20b of insulating layer 41a, insulating layer 41b, and insulating layer 41c.
  • Insulating layer 22B is provided covering semiconductor layer 21B, and conductive layer 56 is provided on insulating layer 22B.
  • Insulating layer 41c, insulating layer 41b, insulating layer 41a, and insulating layer 43 are provided with an opening 20a reaching conductive layer 52, and insulating layer 22B and conductive layer 56 are also provided with an opening whose top shape is roughly the same as that of opening 20a.
  • Semiconductor layer 21A contacts the top surface of conductive layer 56, the top surface of conductive layer 52, the side surface of insulating layer 22B, and the side surfaces of insulating layer 41a, insulating layer 41b, insulating layer 41c, and insulating layer 43 in opening 20a.
  • Insulating layer 22A is provided to cover semiconductor layer 21A, and conductive layer 57 and conductive layer 58 are laminated on insulating layer 22A. It is preferable to use a conductive material with a lower resistance than conductive layer 57 for conductive layer 58.
  • a titanium film can be used for conductive layer 57
  • a copper film can be used for conductive layer 58.
  • An insulating layer 44 is provided to cover the conductive layer 58 and the insulating layer 22A.
  • the insulating layer 44 functions as a protective film and can prevent impurities such as water from diffusing from the outside.
  • an inorganic insulating film can be used as a single layer or in a laminated state.
  • an insulating layer 45 is provided to cover the insulating layer 44.
  • the insulating layer 45 functions as a planarizing layer.
  • an organic insulating material can be used.
  • Conductive layers 61 and 62 are laminated on insulating layer 45.
  • openings reaching conductive layer 55 are provided in insulating layer 45, insulating layer 44, insulating layer 22A, and insulating layer 22B. Conductive layer 61 and conductive layer 55 are electrically connected via the openings.
  • the semiconductor layer, gate insulating layer, source electrode, and drain electrode of transistor M1 and transistor M2 are all constructed from different layers. Furthermore, the upper electrode (conductive layer 56) of transistor M1 also serves as the gate electrode of transistor M2. In this way, by creating different transistors using different layers, a pixel circuit that occupies a small area can be constructed.
  • conductive layer 56 has a portion that overlaps with semiconductor layer 21B via insulating layer 22B. Also, here, the ends of semiconductor layer 21B and conductive layer 55 are configured to coincide, but by making the end of conductive layer 55 protrude outward beyond semiconductor layer 21B, conductive layer 56 may have a portion that overlaps with conductive layer 55 via insulating layer 22B. A capacitance is formed in such a portion, which corresponds to capacitance C shown in FIG. 11A.
  • a display device with a resolution exceeding 3000 ppi (e.g., 3387 ppi) can be realized by setting the line width of the wiring SL to 1.5 ⁇ m, the spacing between the wiring SL to 1 ⁇ m, and the inclusion margin between the openings 20a and 20b and the wiring SL to 0.5 ⁇ m, etc.
  • the oxygen in the insulating layer 41b may diffuse through the insulating layer 22A or the insulating layer 22B due to heat during the manufacturing process, and the amount of oxygen that can be supplied to the semiconductor layer 21A and the semiconductor layer 21B may be reduced. Therefore, it is preferable to use a film having a barrier property against oxygen for the insulating layer 22B and the insulating layer 22A.
  • inorganic insulating films that have barrier properties against oxygen include silicon nitride, silicon nitride oxide, aluminum oxide, aluminum oxynitride, aluminum nitride oxide, aluminum nitride, hafnium oxide, oxides containing hafnium and silicon (hafnium silicate), oxides containing hafnium and aluminum (hafnium aluminate), gallium oxide, and oxides containing gallium and zinc.
  • the surface of the insulating layer 41b that is not covered by each semiconductor layer is nitrided to reduce the diffusibility of oxygen.
  • a plasma process in a nitrogen-containing atmosphere such as nitrogen (N 2 ) or dinitrogen monoxide (N 2 O) can be mentioned.
  • N 2 nitrogen
  • N 2 O dinitrogen monoxide
  • the end of the wiring SL (conductive layer 51 and conductive layer 52) is located inside the opening 20a, and the insulating layer 22A and the wiring GL (conductive layer 57 and conductive layer 58) are provided to cover the end.
  • the step coverage of the insulating layer 22A is low, a thin portion of the insulating layer 22A may be formed at the end of the wiring SL, and the dielectric strength may decrease. In that case, there is a risk of problems such as an increase in leakage current between the wiring SL and the wiring GL and insulation breakdown of the insulating layer 22A.
  • the conductive layer 51 and the conductive layer 52 are processed so that the end has a tapered shape.
  • the insulating layer 22A is formed using a film formation method with high step coverage, for example, a CVD method or a PVD method such as an ALD method. The same applies to the wiring AL (conductive layer 53 and conductive layer 54) and the insulating layer 22B inside the opening 20b.
  • FIG. 16 shows a schematic cross-sectional view of a display device with a configuration that differs in part from that described above.
  • the configuration shown in FIG. 16 differs from the above configuration example mainly in that it does not have conductive layer 56.
  • the portions of the semiconductor layer 21A that are not covered by the wiring GL are made low-resistance.
  • the resistance of the semiconductor layer 21A can be reduced by performing a process of supplying impurities that generate carriers to the semiconductor layer 21A through the insulating layer 22A using the wiring GL as a mask.
  • the impurities include hydrogen, nitrogen, and metal elements.
  • the portions of the semiconductor layer 21A that are not in contact with the insulating layer 41b may contain a large number of carriers due to insufficient oxygen supply. Therefore, if the portions of the semiconductor layer 21A that are not covered by the wiring GL have a sufficiently low resistance, such a process does not need to be performed.
  • the semiconductor device can realize a device in which transistors with high electrical properties and high reliability are integrated at an extremely high density. Furthermore, according to one aspect of the present invention, it is possible to realize a display device with a resolution exceeding 3000 ppi, which has been difficult to achieve until now, using general flat panel display manufacturing equipment.
  • the display device of this embodiment can be a high-definition display device. Therefore, the display device of this embodiment can be used, for example, in the display section of a wristwatch-type or bracelet-type information terminal (wearable device), as well as in the display section of a wearable device that can be worn on the head, such as a head-mounted display (HMD) or other VR device, or a glasses-type AR device.
  • a wearable device such as a head-mounted display (HMD) or other VR device, or a glasses-type AR device.
  • HMD head-mounted display
  • AR device glasses-type AR device
  • the display device of this embodiment can be a high-resolution display device or a large display device. Therefore, the display device of this embodiment can be used in electronic devices with relatively large screens, such as television devices, desktop or notebook personal computers, computer monitors, digital signage, and large game machines such as pachinko machines, as well as in the display units of digital cameras, digital video cameras, digital photo frames, mobile phones, portable game machines, personal digital assistants, and audio playback devices.
  • electronic devices with relatively large screens such as television devices, desktop or notebook personal computers, computer monitors, digital signage, and large game machines such as pachinko machines, as well as in the display units of digital cameras, digital video cameras, digital photo frames, mobile phones, portable game machines, personal digital assistants, and audio playback devices.
  • the semiconductor device of one embodiment of the present invention can be used in a display device or a module having the display device.
  • the module having the display device include a module in which a connector such as a flexible printed circuit (hereinafter, referred to as FPC) or a TCP (Tape Carrier Package) is attached to the display device, and a module in which an integrated circuit (IC) is mounted by a COG (Chip On Glass) method or a COF (Chip On Film) method, etc.
  • FPC flexible printed circuit
  • TCP Tape Carrier Package
  • Figure 17 shows a perspective view of the display device 100A.
  • Display device 100A has a configuration in which substrate 152 and substrate 151 are bonded together.
  • substrate 152 is indicated by a dashed line.
  • the display device 100A has a display unit 162, a connection unit 140, a circuit unit 164, wiring 165, etc.
  • FIG. 17 shows an example in which an IC 173 and an FPC 172 are mounted on the display device 100A. Therefore, the configuration shown in FIG. 17 can also be said to be a display module having the display device 100A, an IC, and an FPC.
  • connection portion 140 is provided on the outside of the display portion 162.
  • the connection portion 140 can be provided along one side or multiple sides of the display portion 162. There may be one or multiple connection portions 140.
  • FIG. 17 shows an example in which the connection portion 140 is provided so as to surround the four sides of the display portion 162.
  • the connection portion 140 electrically connects the common electrode of the display element and the conductive layer, and can supply a potential to the common electrode.
  • the circuit portion 164 has, for example, a scanning line driver circuit (also called a gate driver).
  • the circuit portion 164 may also have both a scanning line driver circuit and a signal line driver circuit (also called a source driver).
  • the wiring 165 has a function of supplying signals and power to the display unit 162 and the circuit unit 164.
  • the signals and power are input to the wiring 165 from the outside via the FPC 172, or are input to the wiring 165 from the IC 173.
  • FIG. 17 shows an example in which an IC 173 is provided on a substrate 151 by a COG method, a COF method, or the like.
  • an IC having one or both of a scanning line driver circuit and a signal line driver circuit can be used as the IC 173.
  • the display device 100A and the display module may be configured without an IC.
  • the IC may be mounted on an FPC by a COF method, or the like.
  • the semiconductor device of one embodiment of the present invention can be applied to, for example, one or both of the display portion 162 and the circuit portion 164 of the display device 100A.
  • the semiconductor device of one embodiment of the present invention can also be applied to the IC 173.
  • the semiconductor device of one embodiment of the present invention when the semiconductor device of one embodiment of the present invention is applied to a pixel circuit of a display device, the area occupied by the pixel circuit can be reduced compared to when a planar transistor is used, and a high-definition display device can be obtained.
  • the semiconductor device of one embodiment of the present invention when the semiconductor device of one embodiment of the present invention is applied to a driver circuit of a display device (e.g., one or both of a gate line driver circuit and a source line driver circuit), the area occupied by the driver circuit can be reduced compared to when a planar transistor is used, and a display device with a narrow frame can be obtained.
  • the semiconductor device of one embodiment of the present invention since the semiconductor device of one embodiment of the present invention has good electrical characteristics, the reliability of the display device can be improved by using it in the display device.
  • the display unit 162 is an area in the display device 100A that displays an image, and has a number of periodically arranged pixels 210.
  • Figure 17 shows an enlarged view of one pixel 210.
  • pixel arrangements there are no particular limitations on the pixel arrangement in the display device of this embodiment, and various methods can be applied. Examples of pixel arrangements include a stripe arrangement, an S-stripe arrangement, a matrix arrangement, a delta arrangement, a Bayer arrangement, and a Pentile arrangement.
  • the pixel 210 shown in FIG. 17 has a subpixel 210R that emits red light, a subpixel 210G that emits green light, and a subpixel 210B that emits blue light.
  • the display element including, for example, liquid crystal elements and light-emitting elements.
  • display elements using shutter-type or optical interference-type MEMS (Micro Electro Mechanical Systems) elements, microcapsule-type, electrophoresis-type, electrowetting-type, or electronic liquid powder (registered trademark)-type can also be used.
  • QLED Quantum-dot LED
  • a light source and color conversion technology using quantum dot materials may also be used.
  • liquid crystal elements include transmissive liquid crystal elements, reflective liquid crystal elements, and semi-transmissive liquid crystal elements.
  • Light-emitting elements include, for example, self-emitting light-emitting elements such as LEDs (Light Emitting Diodes), OLEDs (Organic LEDs), and semiconductor lasers. As LEDs, for example, mini LEDs and micro LEDs can be used.
  • LEDs Light Emitting Diodes
  • OLEDs Organic LEDs
  • semiconductor lasers As LEDs, for example, mini LEDs and micro LEDs can be used.
  • Light-emitting materials that light-emitting elements have include, for example, materials that emit fluorescence (fluorescent materials), materials that emit phosphorescence (phosphorescent materials), materials that exhibit thermally activated delayed fluorescence (thermally activated delayed fluorescence (TADF) materials), and inorganic compounds (quantum dot materials, etc.).
  • fluorescent materials materials that emit fluorescence
  • phosphorescent materials materials that emit phosphorescence
  • TADF thermally activated delayed fluorescence
  • inorganic compounds quantum dot materials, etc.
  • the light-emitting element can emit light of infrared, red, green, blue, cyan, magenta, yellow, or white.
  • the color purity can be increased by providing the light-emitting element with a microcavity structure.
  • the display device of one embodiment of the present invention may be a top-emission type that emits light in a direction opposite to the substrate on which the light-emitting element is formed, a bottom-emission type that emits light toward the substrate on which the light-emitting element is formed, or a dual-emission type that emits light to both sides.
  • FIG. 18 shows an example of a cross section of the display device 100A when a portion of the area including the FPC 172, a portion of the circuit section 164, a portion of the display section 162, a portion of the connection section 140, and a portion of the area including the end portion are cut away.
  • the display device 100A shown in FIG. 18 has transistors 205D, 205R, 205G, 205B, light-emitting elements 130R, 130G, and 130B between substrate 151 and substrate 152.
  • Light-emitting element 130R is a display element included in sub-pixel 210R that emits red light
  • light-emitting element 130G is a display element included in sub-pixel 210G that emits green light
  • light-emitting element 130B is a display element included in sub-pixel 210B that emits blue light.
  • the display device 100A uses an SBS structure.
  • the SBS structure allows the material and configuration to be optimized for each light-emitting element, which increases the freedom of material and configuration selection and makes it easier to improve brightness and reliability.
  • the display device 100A is also a top emission type.
  • transistors and the like can be arranged so as to overlap the light emitting region of the light emitting element, so the aperture ratio of the pixel can be increased compared to a bottom emission type.
  • Transistors 205D, 205R, 205G, and 205B are all formed on substrate 151. These transistors can be fabricated using the same process.
  • an example is shown in which an oxide semiconductor is used as the semiconductor for the transistors 205D, 205R, 205G, and 205B, and vertical transistors of one embodiment of the present invention, which are easily highly integrated, are used.
  • the transistors 205R, 205G, and 205B function as driving transistors for controlling a current flowing through a light-emitting element.
  • the transistor 205D provided in the circuit portion 164 is a transistor that constitutes part of the driver circuit.
  • the transistor of one embodiment of the present invention has both a high on-current and a low off-current, and therefore can be applied not only to a gate line driver circuit but also to a source line driver circuit.
  • the transistors 205D, 205R, 205G, and 205B are provided in openings in an insulating layer, and each of them has a conductive layer 104 functioning as a gate electrode, an insulating layer 106 functioning as a gate insulating layer, a conductive layer 109 functioning as one of a source electrode or a drain electrode, a conductive layer 107 functioning as the other, and a semiconductor layer 108.
  • the conductive layer 109 and the conductive layer 107 are in contact with the semiconductor layer 108.
  • a conductive layer 112a in contact with the conductive layer 107 and a conductive layer 112b in contact with the conductive layer 109 are provided.
  • the conductive layer 112a and the conductive layer 112b contain a conductive material having a lower resistance than the conductive layer 107 and the conductive layer 109, respectively, and function as wiring.
  • the same hatching pattern is applied to multiple layers obtained by processing the same film.
  • the display device 100A includes transistors of one embodiment of the present invention in both the display portion 162 and the circuit portion 164.
  • the pixel size can be reduced, leading to higher resolution.
  • the area occupied by the circuit portion 164 can be reduced, leading to a narrower frame.
  • the load on wiring can be reduced, leading to a display device capable of high-speed operation, a large display device, or a display device with high resolution (with a large number of pixels).
  • the description of the previous embodiment can be referred to.
  • the transistors included in the display device of this embodiment are not limited to the transistors of one embodiment of the present invention.
  • the display device may include a combination of a transistor of one embodiment of the present invention and a transistor having another structure.
  • the display device of this embodiment may have, for example, one or more of a planar transistor, a staggered transistor, and an inverted staggered transistor.
  • the transistors of the display device of this embodiment may be either a top-gate type or a bottom-gate type.
  • a gate may be provided above and below a semiconductor layer in which a channel is formed.
  • the display device of this embodiment may have a transistor (Si transistor) using silicon in the channel formation region.
  • silicon examples include single crystal silicon, polycrystalline silicon, and amorphous silicon.
  • a transistor having LTPS in the semiconductor layer (hereinafter also referred to as an LTPS transistor) can be used.
  • LTPS transistors have high field effect mobility and good frequency characteristics.
  • a transistor having amorphous silicon in the semiconductor layer has excellent productivity because it can be uniformly formed on a large-area glass substrate.
  • the display device of this embodiment may also have a transistor (OS transistor) that uses an oxide semiconductor (OS) such as In-Ga-Zn oxide (also referred to as IGZO) in the channel formation region.
  • OS oxide semiconductor
  • IGZO In-Ga-Zn oxide
  • the display device may have a mixture of a transistor that uses silicon as the semiconductor in which the channel is formed and a transistor that uses an oxide semiconductor.
  • the transistors in the circuit unit 164 and the transistors in the display unit 162 may have the same structure or different structures.
  • the transistors in the circuit unit 164 may all have the same structure or there may be two or more types.
  • the transistors in the display unit 162 may all have the same structure or there may be two or more types.
  • All of the transistors in the display portion 162 may be OS transistors, all of the transistors in the display portion 162 may be Si transistors, or some of the transistors in the display portion 162 may be OS transistors and the rest may be Si transistors.
  • LTPS transistors and OS transistors are used in the display unit 162 to realize a display device with low power consumption and high driving capability.
  • a configuration in which LTPS transistors and OS transistors are combined is sometimes called LTPO.
  • a more suitable example is a configuration in which OS transistors are used as transistors that function as switches for controlling conduction/non-conduction between wirings, and LTPS transistors are used as transistors for controlling current.
  • one of the transistors in the display unit 162 functions as a transistor for controlling the current flowing through the light-emitting element and can also be called a driving transistor.
  • One of the source and drain of the driving transistor is electrically connected to the pixel electrode of the light-emitting element.
  • the other transistor in the display unit 162 functions as a switch for controlling pixel selection/non-selection and can also be called a selection transistor.
  • the gate of the selection transistor is electrically connected to a gate line, and one of the source and drain is electrically connected to a source line (signal line). It is preferable to use an OS transistor as the selection transistor. This makes it possible to maintain the gradation of the pixel even if the frame frequency is significantly reduced (for example, 1 fps or less), and therefore power consumption can be reduced by stopping the driver when displaying a still image.
  • An insulating layer 218 is provided to cover transistors 205D, 205R, 205G, and 205B, and an insulating layer 235 is provided on insulating layer 218.
  • the insulating layer 218 preferably functions as a protective layer for the transistor.
  • the insulating layer 218 is preferably made of a material that is difficult for impurities such as water and hydrogen to diffuse into. This allows the insulating layer 218 to function as a barrier layer. With this configuration, it is possible to effectively prevent impurities from diffusing from the outside into the transistor, and the reliability of the display device can be improved.
  • the insulating layer 218 preferably has one or more inorganic insulating films.
  • inorganic insulating films include oxide insulating films, nitride insulating films, oxynitride insulating films, and nitride oxide insulating films. Specific examples of these inorganic insulating films are as described above.
  • the insulating layer 235 preferably functions as a planarization layer, and is preferably an organic insulating film.
  • Materials that can be used for the organic insulating film include acrylic resin, polyimide resin, epoxy resin, polyamide resin, polyimideamide resin, siloxane resin, benzocyclobutene resin, phenol resin, and precursors of these resins.
  • the insulating layer 235 may also have a laminated structure of an organic insulating film and an inorganic insulating film.
  • the outermost layer of the insulating layer 235 preferably functions as an etching protection layer. This makes it possible to prevent the formation of recesses in the insulating layer 235 when processing the pixel electrodes 111R, 111G, 111B, etc. Alternatively, recesses may be provided in the insulating layer 235 when processing the pixel electrodes 111R, 111G, 111B, etc.
  • Light emitting elements 130R, 130G, and 130B are provided on insulating layer 235.
  • the light-emitting element 130R has a pixel electrode 111R on the insulating layer 235, an EL layer 113R on the pixel electrode 111R, and a common electrode 115 on the EL layer 113R.
  • the light-emitting element 130R shown in FIG. 18 emits red light (R).
  • the EL layer 113R has a light-emitting layer that emits red light.
  • the light-emitting element 130G has a pixel electrode 111G, an EL layer 113G, and a common electrode 115.
  • the light-emitting element 130G emits green light (G)
  • the EL layer 113G has a light-emitting layer that emits green light.
  • the light-emitting element 130B has a pixel electrode 111B, an EL layer 113B, and a common electrode 115.
  • the light-emitting element 130B emits blue light (B)
  • the EL layer 113B has a light-emitting layer that emits blue light.
  • EL layers 113R, 113G, and 113B are all shown as having the same thickness, but this is not limited to the above.
  • EL layers 113R, 113G, and 113B may each have a different film thickness.
  • the pixel electrode 111R is electrically connected to the conductive layer 112b of the transistor 205R through openings provided in the insulating layer 106, the insulating layer 218, and the insulating layer 235.
  • the pixel electrode 111G is electrically connected to the conductive layer 112b of the transistor 205G
  • the pixel electrode 111B is electrically connected to the conductive layer 112b of the transistor 205B.
  • the ends of each of the pixel electrodes 111R, 111G, and 111B are covered with an insulating layer 237.
  • the insulating layer 237 functions as a partition (also called a bank or spacer).
  • the insulating layer 237 can be provided in a single layer structure or a stacked structure using one or both of an inorganic insulating material and an organic insulating material.
  • the material that can be used for the insulating layer 218 and the material that can be used for the insulating layer 235 can be applied to the insulating layer 237.
  • the insulating layer 237 can electrically insulate the pixel electrode and the common electrode. Furthermore, the insulating layer 237 can electrically insulate adjacent light-emitting elements from each other.
  • the common electrode 115 is a continuous film that is provided in common to the light-emitting elements 130R, 130G, and 130B.
  • the common electrode 115 that is shared by the multiple light-emitting elements is electrically connected to a conductive layer 123 provided in the connection portion 140.
  • a conductive layer 123 it is preferable to use a conductive layer formed from the same material and in the same process as the pixel electrodes 111R, 111G, and 111B.
  • a conductive film that transmits visible light is used for the electrode from which light is extracted, between the pixel electrode and the common electrode. It is preferable to use a conductive film that reflects visible light for the electrode from which light is not extracted.
  • a conductive film that transmits visible light may also be used for the electrode on the side from which light is not extracted.
  • the light emitted from the EL layer may be reflected by the reflective layer and extracted from the display device.
  • metals, alloys, electrically conductive compounds, and mixtures thereof can be appropriately used.
  • the material include metals such as aluminum, magnesium, titanium, chromium, manganese, iron, cobalt, nickel, copper, gallium, zinc, indium, tin, molybdenum, tantalum, tungsten, palladium, gold, platinum, silver, yttrium, and neodymium, and alloys containing these in appropriate combinations.
  • Examples of the material include indium tin oxide (In-Sn oxide, also called ITO), In-Si-Sn oxide (also called ITSO), indium zinc oxide (In-Zn oxide), and In-W-Zn oxide.
  • Examples of the material include alloys containing aluminum (aluminum alloys), such as an alloy of aluminum, nickel, and lanthanum (Al-Ni-La), and alloys containing silver, such as an alloy of silver and magnesium (Mg-Ag), and an alloy of silver, palladium, and copper (Ag-Pd-Cu, also called APC).
  • Such materials include elements belonging to Group 1 or 2 of the periodic table (e.g., lithium, cesium, calcium, and strontium) that are not listed above, rare earth metals such as europium and ytterbium, and alloys containing appropriate combinations of these, graphene, etc.
  • the light-emitting element preferably has a micro-optical resonator (microcavity) structure. Therefore, one of the pair of electrodes of the light-emitting element is preferably an electrode that is transparent and reflective to visible light (semi-transparent and semi-reflective electrode), and the other is preferably an electrode that is reflective to visible light (reflective electrode).
  • the light-emitting element have a microcavity structure, the light emitted from the light-emitting layer can be resonated between both electrodes, thereby intensifying the light emitted from the light-emitting element.
  • the visible light reflectance of the semi-transmissive/semi-reflective electrode is 10% to 95%, preferably 30% to 80%.
  • the visible light reflectance of the reflective electrode is 40% to 100%, preferably 70% to 100%.
  • the lower the resistivity of these electrodes the more preferable, for example, 1 ⁇ 10 ⁇ 2 ⁇ cm or less is preferable.
  • the EL layers 113R, 113G, and 113B are each provided in an island shape.
  • the ends of adjacent EL layers 113R and 113G overlap, the ends of adjacent EL layers 113G and 113B overlap, and the ends of adjacent EL layers 113R and 113B overlap.
  • the ends of adjacent EL layers may overlap as shown in FIG. 18, but this is not limited to this. In other words, adjacent EL layers may not overlap and may be separated from each other.
  • the display device may have both a portion where adjacent EL layers overlap and a portion where adjacent EL layers do not overlap and are separated from each other.
  • the EL layers 113R, 113G, and 113B each have at least a light-emitting layer.
  • the light-emitting layer has one or more types of light-emitting materials.
  • a material that emits light of a color such as blue, purple, blue-purple, green, yellow-green, yellow, orange, or red is appropriately used.
  • a material that emits near-infrared light can also be used as the light-emitting material.
  • Light-emitting materials include fluorescent materials, phosphorescent materials, TADF materials, and quantum dot materials.
  • the light-emitting layer may have one or more organic compounds (host materials, assist materials, etc.) in addition to the light-emitting substance (guest material).
  • the one or more organic compounds one or both of a substance with high hole transport properties (hole transport material) and a substance with high electron transport properties (electron transport material) can be used.
  • a bipolar substance a substance with high electron transport properties and hole transport properties, also called a bipolar material
  • TADF material may be used as the one or more organic compounds.
  • the light-emitting layer preferably has, for example, a phosphorescent material and a hole-transporting material and an electron-transporting material, which are a combination that easily forms an exciplex.
  • ExTET Exciplex-Triple Energy Transfer
  • the energy transfer becomes smooth and light emission can be efficiently obtained.
  • the EL layer may have one or more of a layer containing a substance with high hole injection properties (hole injection layer), a layer containing a material with hole transport properties (hole transport layer), a layer containing a substance with high electron blocking properties (electron blocking layer), a layer containing a substance with high electron injection properties (electron injection layer), a layer containing a material with electron transport properties (electron transport layer), and a layer containing a substance with high hole blocking properties (hole blocking layer).
  • the EL layer may contain one or both of a bipolar material and a TADF material.
  • Eigen elements can be made of either low molecular weight compounds or high molecular weight compounds, and may contain inorganic compounds.
  • the layers constituting the luminescent element can be formed by deposition methods (including vacuum deposition methods), transfer methods, printing methods, inkjet methods, coating methods, etc.
  • the light-emitting element may have a single structure (a structure having only one light-emitting unit) or a tandem structure (a structure having multiple light-emitting units).
  • the light-emitting unit has at least one light-emitting layer.
  • the tandem structure is a structure in which multiple light-emitting units are connected in series via a charge-generating layer. When a voltage is applied between a pair of electrodes, the charge-generating layer has the function of injecting electrons into one of the two light-emitting units and injecting holes into the other.
  • the tandem structure makes it possible to obtain a light-emitting element capable of emitting light with high brightness. Furthermore, compared to a single structure, the tandem structure can reduce the current required to obtain the same brightness, thereby improving reliability.
  • the tandem structure may also be called a stack structure.
  • EL layer 113R has a structure having multiple light-emitting units that emit red light
  • EL layer 113G has a structure having multiple light-emitting units that emit green light
  • EL layer 113B has a structure having multiple light-emitting units that emit blue light.
  • a protective layer 131 is provided on the light-emitting elements 130R, 130G, and 130B.
  • the protective layer 131 and the substrate 152 are bonded via an adhesive layer 142.
  • the substrate 152 is provided with a light-shielding layer 117.
  • a solid sealing structure or a hollow sealing structure can be applied to seal the light-emitting elements.
  • the space between the substrates 152 and 151 is filled with an adhesive layer 142, and a solid sealing structure is applied.
  • the space may be filled with an inert gas (such as nitrogen or argon), and a hollow sealing structure may be applied.
  • the adhesive layer 142 may be provided so as not to overlap with the light-emitting elements.
  • the space may also be filled with a resin different from the adhesive layer 142 provided in a frame shape.
  • the protective layer 131 is provided at least on the display unit 162, and is preferably provided so as to cover the entire display unit 162. By providing the protective layer 131 on the light-emitting elements 130R, 130G, and 130B, the reliability of the light-emitting elements can be improved.
  • the protective layer 131 is preferably provided so as to cover not only the display unit 162, but also the connection unit 140 and the circuit unit 164. In addition, the protective layer 131 is preferably provided up to the end of the display device 100A.
  • the connection unit 204 there are portions where the protective layer 131 is not provided in order to electrically connect the FPC 172 and the conductive layer 166.
  • the protective layer 131 may have a single layer structure or a laminated structure of two or more layers.
  • the conductivity of the protective layer 131 does not matter.
  • At least one of an insulating film, a semiconductor film, and a conductive film can be used as the protective layer 131.
  • the protective layer 131 has an inorganic film, which can prevent oxidation of the common electrode 115, suppress impurities (such as moisture and oxygen) from entering the light-emitting element, and suppress deterioration of the light-emitting element, thereby improving the reliability of the display device.
  • the protective layer 131 can be, for example, an inorganic insulating film such as an oxide insulating film, a nitride insulating film, an oxynitride insulating film, and a nitride oxide insulating film. Specific examples of these inorganic insulating films are as described above.
  • the protective layer 131 preferably has a nitride insulating film or a nitride oxide insulating film, and more preferably has a nitride insulating film.
  • the protective layer 131 may also be an inorganic film containing ITO, In-Zn oxide, Ga-Zn oxide, Al-Zn oxide, IGZO, or the like.
  • the inorganic film preferably has a high resistance, and more specifically, preferably has a higher resistance than the common electrode 115.
  • the inorganic film may further contain nitrogen.
  • the protective layer 131 has high transparency to visible light.
  • ITO, IGZO, and aluminum oxide are preferable because they are inorganic materials that have high transparency to visible light.
  • the protective layer 131 may be, for example, a laminated structure of an aluminum oxide film and a silicon nitride film on the aluminum oxide film, or a laminated structure of an aluminum oxide film and an IGZO film on the aluminum oxide film. By using this laminated structure, it is possible to prevent impurities (water, oxygen, etc.) from entering the EL layer side.
  • the protective layer 131 may have an organic film.
  • the protective layer 131 may have both an organic film and an inorganic film.
  • organic films that can be used for the protective layer 131 include the organic insulating film that can be used for the insulating layer 235.
  • connection portion 204 is provided in an area of the substrate 151 where the substrate 152 does not overlap.
  • the wiring 165 is electrically connected to the FPC 172 via the conductive layer 166 and the connection layer 242.
  • the wiring 165 is an example of a single-layer structure of a conductive layer obtained by processing the same conductive film as the conductive layer 112b.
  • the conductive layer 166 is an example of a single-layer structure of a conductive layer obtained by processing the same conductive film as the pixel electrodes 111R, 111G, and 111B.
  • the conductive layer 166 is exposed on the top surface of the connection portion 204. This allows the connection portion 204 and the FPC 172 to be electrically connected via the connection layer 242.
  • the display device 100A is a top emission type. Light emitted by the light emitting elements is emitted towards the substrate 152. It is preferable to use a material that is highly transparent to visible light for the substrate 152.
  • the pixel electrodes 111R, 111G, and 111B contain a material that reflects visible light, and the counter electrode (common electrode 115) contains a material that transmits visible light.
  • the light-shielding layer 117 can be provided between adjacent light-emitting elements, in the connection section 140, in the circuit section 164, etc.
  • a colored layer such as a color filter may be provided on the surface of substrate 152 facing substrate 151 or on protective layer 131.
  • a color filter By providing a color filter over the light-emitting element, the color purity of the light emitted from the pixel can be increased.
  • various optical members can be arranged on the outside of the substrate 152 (the surface opposite to the substrate 151).
  • the optical members include a polarizing plate, a retardation plate, a light diffusion layer (such as a diffusion film), an anti-reflection layer, and a light collecting film.
  • a surface protection layer such as an antistatic film that suppresses the adhesion of dust, a water-repellent film that makes it difficult for dirt to adhere, a hard coat film that suppresses the occurrence of scratches due to use, and an impact absorbing layer may be arranged on the outside of the substrate 152.
  • a glass layer or a silica layer As the surface protection layer, it is possible to suppress the occurrence of surface contamination and scratches, which is preferable.
  • DLC diamond-like carbon
  • AlO x aluminum oxide
  • a polyester-based material As the surface protection layer.
  • a polycarbonate-based material may be used as the surface protection layer.
  • a material with a high hardness for the surface protection layer it is preferable to use a material with a high hardness for the surface protection layer.
  • the substrates 151 and 152 may each be made of glass, quartz, ceramics, sapphire, resin, metal, alloy, semiconductor, or the like.
  • the substrate on the side from which light from the light-emitting element is extracted is made of a material that transmits the light. If a flexible material is used for the substrates 151 and 152, the flexibility of the display device can be increased, and a flexible display can be realized.
  • a polarizing plate may also be used for at least one of the substrates 151 and 152.
  • the substrates 151 and 152 may each be made of polyester resins such as polyethylene terephthalate (PET) and polyethylene naphthalate (PEN), polyacrylonitrile resin, acrylic resin, polyimide resin, polymethyl methacrylate resin, polycarbonate (PC) resin, polyethersulfone (PES) resin, polyamide resin (nylon, aramid, etc.), polysiloxane resin, cycloolefin resin, polystyrene resin, polyamideimide resin, polyurethane resin, polyvinyl chloride resin, polyvinylidene chloride resin, polypropylene resin, polytetrafluoroethylene (PTFE) resin, ABS resin, cellulose nanofiber, etc. At least one of the substrates 151 and 152 may be made of glass having a thickness sufficient to provide flexibility.
  • PET polyethylene terephthalate
  • PEN polyethylene naphthalate
  • polyacrylonitrile resin acrylic resin
  • polyimide resin polymethyl methacrylate resin
  • a substrate with high optical isotropy has low birefringence (it can also be said that the amount of birefringence is small).
  • films with high optical isotropy include triacetyl cellulose (TAC, also known as cellulose triacetate) film, cycloolefin polymer (COP) film, cycloolefin copolymer (COC) film, and acrylic film.
  • curing adhesives such as photo-curing adhesives such as ultraviolet curing adhesives, reactive curing adhesives, heat curing adhesives, and anaerobic adhesives.
  • photo-curing adhesives such as ultraviolet curing adhesives, reactive curing adhesives, heat curing adhesives, and anaerobic adhesives.
  • These adhesives include epoxy resin, acrylic resin, silicone resin, phenolic resin, polyimide resin, imide resin, PVC (polyvinyl chloride) resin, PVB (polyvinyl butyral) resin, and EVA (ethylene vinyl acetate) resin.
  • materials with low moisture permeability such as epoxy resin are preferable.
  • Two-part mixed resins may also be used.
  • Adhesive sheets, etc. may also be used.
  • connection layer 242 may be an anisotropic conductive film (ACF), an anisotropic conductive paste (ACP), or the like.
  • Display device 100B The display device 100B shown in FIG. 19 is a display device of a bottom emission type in that it uses a light emitting element having an EL layer 113 common to the sub-pixels of each color and a colored layer (such as a color filter).
  • the main differences from the display device 100A are as follows. In the following description of the display device, the description of the same parts as those of the display device described above may be omitted.
  • Light emitted by the light-emitting element is emitted toward the substrate 151. It is preferable to use a material that is highly transparent to visible light for the substrate 151. On the other hand, the translucency of the material used for the substrate 152 does not matter.
  • the display device 100B shown in FIG. 19 has transistors 205D, 205R, 205G, and 205B (not shown), light-emitting elements 130R, 130G, and 130B, a colored layer 132R that transmits red light, a colored layer 132G that transmits green light, and a colored layer 132B that transmits blue light between substrates 151 and 152.
  • the light-emitting element 130R has a pixel electrode 111R, an EL layer 113 on the pixel electrode 111R, and a common electrode 115 on the EL layer 113.
  • the light emitted by the light-emitting element 130R is extracted as red light to the outside of the display device 100B via the colored layer 132R.
  • the light-emitting element 130G has a pixel electrode 111G, an EL layer 113 on the pixel electrode 111G, and a common electrode 115 on the EL layer 113.
  • the light emitted by the light-emitting element 130G is extracted as green light to the outside of the display device 100B via the colored layer 132G.
  • the light-emitting element 130B has a pixel electrode 111B, an EL layer 113 on the pixel electrode 111B, and a common electrode 115 on the EL layer 113.
  • the light emitted by the light-emitting element 130B is extracted as blue light to the outside of the display device 100B via the colored layer 132B.
  • Light-emitting elements 130R, 130G, and 130B each share an EL layer 113 and a common electrode 115.
  • a configuration in which a common EL layer 113 is provided for the subpixels of each color can reduce the number of manufacturing steps compared to a configuration in which a different EL layer is provided for each subpixel of each color.
  • the light-emitting elements 130R, 130G, and 130B shown in FIG. 19 emit white light.
  • the white light emitted by the light-emitting elements 130R, 130G, and 130B passes through the colored layers 132R, 132G, and 132B to obtain light of the desired color.
  • FIG. 19 shows an example in which the light-shielding layer 117 is provided on the substrate 151, the insulating layer 153 is provided on the light-shielding layer 117, and the transistors 205D, 205R, 205G, and 205B (not shown) are provided on the insulating layer 153.
  • the colored layers 132R, 132G, and 132B are provided on the insulating layer 218, and the insulating layer 235 is provided on the colored layers 132R, 132G, and 132B.
  • the pixel electrodes 111R, 111G, and 111B are each made of a material that is highly transparent to visible light. It is preferable to use a material that reflects visible light for the common electrode 115. In a bottom-emission display device, a low-resistance metal or the like can be used for the common electrode 115, so that voltage drops caused by the resistance of the common electrode 115 can be suppressed, and high display quality can be achieved.
  • the transistor of one embodiment of the present invention can be miniaturized and its occupation area can be reduced, so that in a display device with a bottom emission structure, the pixel aperture ratio can be increased or the pixel size can be reduced.
  • light-emitting elements 130R, 130G, and 130B When a microcavity is applied to light-emitting elements 130R, 130G, and 130B, they each emit light in which the light of a specific wavelength is intensified from the white light emitted by EL layer 113.
  • a light-emitting element has a microcavity applied in this way, if an EL layer that emits white light is applied, it will be called a light-emitting element that emits white light.
  • a light-emitting element that emits white light preferably includes two or more light-emitting layers.
  • light-emitting layers can be selected such that the emission colors of the two light-emitting layers are complementary to each other. For example, by making the emission color of the first light-emitting layer and the emission color of the second light-emitting layer complementary to each other, a configuration can be obtained in which the light-emitting element as a whole emits white light.
  • the emission colors of the three or more light-emitting layers can be combined to obtain a configuration in which the light-emitting element as a whole emits white light.
  • the EL layer 113 preferably has, for example, a light-emitting layer having a light-emitting material that emits blue light, and a light-emitting layer having a light-emitting material that emits visible light with a longer wavelength than blue.
  • the EL layer 113 preferably has, for example, a light-emitting layer that emits yellow light, and a light-emitting layer that emits blue light.
  • the EL layer 113 preferably has, for example, a light-emitting layer that emits red light, a light-emitting layer that emits green light, and a light-emitting layer that emits blue light.
  • a tandem structure For light-emitting elements that emit white light, it is preferable to use a tandem structure. Specifically, a two-stage tandem structure having a light-emitting unit that emits yellow light and a light-emitting unit that emits blue light, a two-stage tandem structure having a light-emitting unit that emits red and green light and a light-emitting unit that emits blue light, a three-stage tandem structure having, in this order, a light-emitting unit that emits blue light, a light-emitting unit that emits yellow, yellow-green or green light, and a light-emitting unit that emits blue light, or a three-stage tandem structure having, in this order, a light-emitting unit that emits blue light, a light-emitting unit that emits yellow, yellow-green or green light, and red light, and a light-emitting unit that emits blue light, etc.
  • the number of layers and the order of colors of the light-emitting units can be, from the anode side, a two-layer structure of B and Y, a two-layer structure of B and light-emitting unit X, a three-layer structure of B, Y, and B, and a three-layer structure of B, X, and B.
  • the number of layers and the order of colors of the light-emitting layers in light-emitting unit X can be, from the anode side, a two-layer structure of R and Y, a two-layer structure of R and G, a two-layer structure of G and R, a three-layer structure of G, R, and G, or a three-layer structure of R, G, and R.
  • another layer may be provided between the two light-emitting layers.
  • the light-emitting elements 130R, 130G, and 130B shown in FIG. 19 may be configured to emit blue light.
  • the EL layer 113 has one or more light-emitting layers that emit blue light.
  • the blue light emitted by the light-emitting element 130B can be extracted.
  • a color conversion layer is provided between the light-emitting element 130R or the light-emitting element 130G and the substrate 151, so that the blue light emitted by the light-emitting element 130R or the light-emitting element 130G can be converted into light with a longer wavelength, and red or green light can be extracted.
  • a portion of the light emitted by the light-emitting element may pass through the color conversion layer without being converted.
  • the display device 100C shown in Fig. 20 is an example of a display device to which an MML (metal maskless) structure is applied.
  • the display device 100C has a light-emitting element manufactured without using a fine metal mask.
  • the layered structure from the substrate 151 to the insulating layer 235 and the layered structure from the protective layer 131 to the substrate 152 are similar to those of the display device 100A, and therefore descriptions thereof will be omitted.
  • light-emitting elements 130R, 130G, and 130B are provided on insulating layer 235.
  • the light-emitting element 130R has a conductive layer 124R on the insulating layer 235, a conductive layer 126R on the conductive layer 124R, a layer 133R on the conductive layer 126R, a common layer 114 on the layer 133R, and a common electrode 115 on the common layer 114.
  • the light-emitting element 130R shown in FIG. 20 emits red light (R).
  • the layer 133R has a light-emitting layer that emits red light.
  • the layer 133R and the common layer 114 can be collectively referred to as an EL layer.
  • one or both of the conductive layer 124R and the conductive layer 126R can be referred to as a pixel electrode.
  • light-emitting element 130G has conductive layer 124G on insulating layer 235, conductive layer 126G on conductive layer 124G, layer 133G on conductive layer 126G, common layer 114 on layer 133G, and common electrode 115 on common layer 114.
  • Light-emitting element 130G shown in FIG. 20 emits green light (G).
  • Layer 133G has a light-emitting layer that emits green light.
  • light-emitting element 130B has conductive layer 124B on insulating layer 235, conductive layer 126B on conductive layer 124B, layer 133B on conductive layer 126B, common layer 114 on layer 133B, and common electrode 115 on common layer 114.
  • Light-emitting element 130B shown in FIG. 20 emits blue light (B).
  • Layer 133B has a light-emitting layer that emits blue light.
  • layers provided in an island shape for each light-emitting element are indicated as layer 133B, layer 133G, or layer 133R, and a layer shared by a plurality of light-emitting elements is indicated as common layer 114.
  • layers 133R, 133G, and 133B may be referred to as island-shaped EL layers or EL layers formed in an island shape, without including common layer 114.
  • Layer 133R, layer 133G, and layer 133B are separated from each other.
  • the EL layer in an island shape for each light-emitting element, it is possible to suppress leakage current between adjacent light-emitting elements. This makes it possible to prevent crosstalk caused by unintended light emission, and to realize a display device with extremely high contrast.
  • layers 133R, 133G, and 133B are all shown to have the same film thickness, but this is not limited to this.
  • the film thicknesses of layers 133R, 133G, and 133B may be different.
  • the conductive layer 124R is electrically connected to the conductive layer 112b of the transistor 205R through openings provided in the insulating layer 106, the insulating layer 218, and the insulating layer 235.
  • the conductive layer 124G is electrically connected to the conductive layer 112b of the transistor 205G
  • the conductive layer 124B is electrically connected to the conductive layer 112b of the transistor 205B.
  • the conductive layers 124R, 124G, and 124B are formed to cover the openings provided in the insulating layer 235.
  • Layer 128 is embedded in the recesses of the conductive layers 124R, 124G, and 124B, respectively.
  • Layer 128 has the function of flattening the recesses of conductive layers 124R, 124G, and 124B.
  • Conductive layers 126R, 126G, and 126B are provided on conductive layers 124R, 124G, and 124B and layer 128, and are electrically connected to conductive layers 124R, 124G, and 124B.
  • the portion where layer 128 is provided is covered with insulating layers 125 and 127 so that it becomes a non-light-emitting region, but if it is not covered with these, the regions that overlap with the recesses of conductive layers 124R, 124G, and 124B can also be used as light-emitting regions, and the aperture ratio of the pixel can be increased. It is preferable to use conductive layers that function as reflective electrodes for conductive layer 124R and conductive layer 126R.
  • FIG. 20 shows an example in which the top surface of layer 128 has a flat portion, but the shape of layer 128 is not particularly limited.
  • the top surface of layer 128 can have at least one of a convex curved surface, a concave curved surface, and a flat surface.
  • the height of the upper surface of layer 128 and the height of the upper surface of conductive layer 124R may be the same or approximately the same, or may be different from each other.
  • the height of the upper surface of layer 128 may be lower or higher than the height of the upper surface of conductive layer 124R.
  • the end of the conductive layer 126R may be aligned with the end of the conductive layer 124R, or may cover the side of the end of the conductive layer 124R.
  • the ends of the conductive layer 124R and the conductive layer 126R preferably have a tapered shape.
  • the ends of the conductive layer 124R and the conductive layer 126R preferably have a tapered shape with a taper angle of less than 90°.
  • the layer 133R provided along the side of the pixel electrode has an inclined portion.
  • conductive layer 126R The upper and side surfaces of conductive layer 126R are covered by layer 133R. Similarly, the upper and side surfaces of conductive layer 126G are covered by layer 133G, and the upper and side surfaces of conductive layer 126B are covered by layer 133B. Therefore, the entire area in which conductive layers 126R, 126G, and 126B are provided can be used as the light-emitting area of light-emitting elements 130R, 130G, and 130B, thereby increasing the aperture ratio of the pixel.
  • the insulating layer 237 shown in FIG. 18 and the like is not provided between the conductive layer 126R and the layer 133R.
  • the display device 100C does not have an insulating layer (also called a partition, bank, spacer, etc.) that contacts the pixel electrode and covers the upper end of the pixel electrode. Therefore, the distance between adjacent light-emitting elements can be made extremely narrow. This makes it possible to provide a high-definition or high-resolution display device.
  • a mask for forming the insulating layer is not required, which reduces the manufacturing cost of the display device.
  • each of the layers 133R, 133G, and 133B preferably has a light-emitting layer, a carrier block layer on the light-emitting layer, and a carrier transport layer on the carrier block layer. Since the surfaces of the layers 133R, 133G, and 133B are exposed during the manufacturing process of the display device, by providing one or both of the carrier transport layer and the carrier block layer on the light-emitting layer, it is possible to suppress exposure of the light-emitting layer to the outermost surface and reduce damage to the light-emitting layer. This can improve the reliability of the light-emitting element.
  • the common layer 114 may not be provided. In that case, the common electrode 115 is provided in contact with layers 133R, 133G, 133B, insulating layer 127, insulating layer 125, etc.
  • Insulating layer 125 covers the sides of layers 133R, 133G, and 133B via insulating layer 125.
  • the side surfaces (and even parts of the top surfaces) of layers 133R, 133G, and 133B are covered with at least one of insulating layers 125 and 127, which prevents the common layer 114 (or common electrode 115) from coming into contact with the pixel electrodes and the side surfaces of layers 133R, 133G, and 133B, thereby preventing short circuits in the light-emitting elements. This improves the reliability of the light-emitting elements.
  • the insulating layer 125 contacts the side surfaces of the layers 133R, 133G, and 133B. By configuring the insulating layer 125 to contact the layers 133R, 133G, and 133B, peeling of the layers 133R, 133G, and 133B can be prevented, and the reliability of the light-emitting element can be improved.
  • the insulating layer 127 is provided on the insulating layer 125 so as to fill the recesses in the insulating layer 125. It is preferable that the insulating layer 127 covers at least a portion of the side surface of the insulating layer 125.
  • the gap between adjacent island-shaped layers can be filled, reducing the large unevenness of the surface on which layers (such as the carrier injection layer and the common electrode) are formed on the island-shaped layers, making it possible to make the surface flatter. This improves the coverage of the carrier injection layer, the common electrode, etc.
  • the common layer 114 and the common electrode 115 are provided on the layers 133R, 133G, and 133B, the insulating layer 125, and the insulating layer 127. Before the insulating layer 125 and the insulating layer 127 are provided, there is a step between the region where the pixel electrode and the island-shaped EL layer are provided and the region (region between the light-emitting elements) where the pixel electrode and the island-shaped EL layer are not provided. In the display device of one embodiment of the present invention, the step can be flattened by having the insulating layer 125 and the insulating layer 127, and the coverage of the common layer 114 and the common electrode 115 can be improved. Therefore, poor connection due to step disconnection can be suppressed. In addition, the step can be suppressed from locally thinning the common electrode 115 and increasing the electrical resistance.
  • the upper surface of the insulating layer 127 preferably has a highly flat shape.
  • the upper surface of the insulating layer 127 may have at least one of a flat surface, a convex curved surface, and a concave curved surface.
  • the upper surface of the insulating layer 127 preferably has a smooth convex curved shape with high flatness.
  • the insulating layer 125 can be an insulating layer having an inorganic material.
  • an inorganic insulating film such as an oxide insulating film, a nitride insulating film, an oxynitride insulating film, and a nitride oxide insulating film can be used for the insulating layer 125. Specific examples of these inorganic insulating films are as described above.
  • the insulating layer 125 may have a single layer structure or a laminated structure. In particular, aluminum oxide is preferable because it has a high selectivity with respect to the EL layer in etching and has a function of protecting the EL layer in the formation of the insulating layer 127.
  • an inorganic insulating film such as an aluminum oxide film, a hafnium oxide film, or a silicon oxide film formed by the ALD method to the insulating layer 125, it is possible to form an insulating layer 125 with few pinholes and excellent function of protecting the EL layer.
  • the insulating layer 125 may also have a laminated structure of a film formed by the ALD method and a film formed by the sputtering method.
  • the insulating layer 125 may have a laminated structure of, for example, an aluminum oxide film formed by the ALD method and a silicon nitride film formed by the sputtering method.
  • the insulating layer 125 preferably functions as a barrier insulating layer against at least one of water and oxygen.
  • the insulating layer 125 preferably has a function of suppressing the diffusion of at least one of water and oxygen.
  • a barrier insulating layer refers to an insulating layer that has barrier properties.
  • barrier properties refer to the function of suppressing the diffusion of the corresponding substance (also referred to as low permeability).
  • the insulating layer 125 has a low impurity concentration. This can prevent impurities from entering the EL layer from the insulating layer 125 and causing deterioration of the EL layer.
  • the impurity concentration in the insulating layer 125 it is possible to improve the barrier properties against at least one of water and oxygen.
  • the insulating layer 125 has a sufficiently low hydrogen concentration or a sufficiently low carbon concentration, preferably both.
  • the insulating layer 127 provided on the insulating layer 125 has the function of flattening the unevenness of the insulating layer 125 formed between adjacent light-emitting elements. In other words, the presence of the insulating layer 127 has the effect of improving the flatness of the surface on which the common electrode 115 is formed.
  • an insulating layer containing an organic material can be suitably used.
  • the organic material it is preferable to use a photosensitive organic resin, for example, a photosensitive resin composition containing an acrylic resin.
  • acrylic resin does not only refer to polymethacrylic acid ester or methacrylic resin, but may refer to acrylic polymers in a broad sense.
  • the insulating layer 127 may be made of acrylic resin, polyimide resin, epoxy resin, imide resin, polyamide resin, polyimideamide resin, silicone resin, siloxane resin, benzocyclobutene resin, phenol resin, or precursors of these resins. Also, the insulating layer 127 may be made of organic materials such as polyvinyl alcohol (PVA), polyvinyl butyral, polyvinylpyrrolidone, polyethylene glycol, polyglycerin, pullulan, water-soluble cellulose, or alcohol-soluble polyamide resin. Also, a photoresist may be used as the photosensitive organic resin. Either a positive-type material or a negative-type material may be used as the photosensitive organic resin.
  • PVA polyvinyl alcohol
  • a photoresist may be used as the photosensitive organic resin. Either a positive-type material or a negative-type material may be used as the photosensitive organic resin.
  • the insulating layer 127 may be made of a material that absorbs visible light. By having the insulating layer 127 absorb the light emitted from the light-emitting element, it is possible to suppress leakage of light from the light-emitting element to an adjacent light-emitting element through the insulating layer 127 (stray light). This can improve the display quality of the display device. In addition, since the display quality can be improved without using a polarizing plate in the display device, it is possible to reduce the weight and thickness of the display device.
  • Materials that absorb visible light include materials containing pigments such as black, materials containing dyes, resin materials with light absorbing properties (such as polyimide), and resin materials that can be used in color filters (color filter materials).
  • resin materials that can be used in color filters color filter materials.
  • by mixing three or more colors of color filter materials it is possible to create a resin layer that is black or close to black.
  • Display device 100D In the above, an example in which a light emitting element is used as a display element has been shown, but hereinafter, a liquid crystal display device in which a liquid crystal element is used as a display element will be described.
  • the liquid crystal element of the display device can be of various configurations. Typically, a transmissive liquid crystal element using the VA (Vertical Alignment) mode, FFS (Fringe Field Switching) mode, or IPS (In-Plane Switching) mode can be used. In addition to transmissive liquid crystal elements, reflective or semi-transmissive liquid crystal elements may also be used. It is preferable that the display device is a normally black liquid crystal display device.
  • the VA mode can be MVA (Multi-Domain Vertical Alignment) mode, PVA (Patterned Vertical Alignment) mode, ASV (Advanced Super View) mode, etc.
  • the liquid crystal element may be one that employs various modes.
  • various modes For example, in addition to the VA mode, FFS mode, and IPS mode, it may be possible to use liquid crystal elements that employ TN (Twisted Nematic) mode, ASM (Axially Symmetrically Aligned Micro-cell) mode, OCB (Opticaly Compensated Birefringence) mode, FLC (Ferroelectric Liquid Crystal) mode, AFLC (AntiFerroelectric Liquid Crystal) mode, ECB (Electrically Controlled Birefringence) mode, guest-host mode, etc.
  • TN Transmission Nematic
  • ASM Analy Symmetrically Aligned Micro-cell
  • OCB Opticaly Compensated Birefringence
  • FLC Fluorroelectric Liquid Crystal
  • AFLC AntiFerroelectric Liquid Crystal
  • ECB Electrodefringence
  • the liquid crystal display device is a display device that controls the transmission or non-transmission of light by utilizing the optical modulation action of polarized light and liquid crystal.
  • the optical modulation action of liquid crystal is controlled by an electric field (including a horizontal electric field, a vertical electric field, or an oblique electric field) applied to the liquid crystal.
  • Examples of liquid crystals that can be used in liquid crystal elements include thermotropic liquid crystals, low molecular weight liquid crystals, polymer liquid crystals, polymer dispersed liquid crystals (PDLC: Polymer Dispersed Liquid Crystal), polymer network liquid crystals (PNLC: Polymer Network Liquid Crystal), ferroelectric liquid crystals, and antiferroelectric liquid crystals.
  • liquid crystal materials exhibit cholesteric phases, smectic phases, cubic phases, chiral nematic phases, isotropic phases, and the like, depending on the conditions.
  • positive liquid crystals or negative liquid crystals may be used as the liquid crystal material, and the most suitable liquid crystal material may be used depending on the mode or design to be applied.
  • the display device 100D shown in FIG. 21 is an FFS mode liquid crystal display device.
  • Substrate 151 and substrate 152 are bonded together by adhesive layer 144.
  • Liquid crystal 262 is sealed in the area surrounded by substrate 151, substrate 152, and adhesive layer 144.
  • Polarizing plate 260a is located on the outer surface of substrate 152
  • polarizing plate 260b is located on the outer surface of substrate 151.
  • a backlight can be provided outside polarizing plate 260a or polarizing plate 260b.
  • Transistors 205D, 205R, 205G, and 205B (not shown), a connection portion 204, a spacer 224, and the like are provided on the substrate 151.
  • the transistor 205D is provided in the circuit portion 164, and the transistors 205R and 205G are provided in the display portion 162.
  • the conductive layer 112b of the transistors 205R and 205G is electrically connected to the pixel electrode 111 of the liquid crystal element 60.
  • the substrate 152 is provided with colored layers 132R and 132G, a light-shielding layer 117, an insulating layer 225, etc.
  • Transistors 205D, 205R, and 205G each have a conductive layer 112a, a conductive layer 112b, a semiconductor layer 108, a conductive layer 107, a conductive layer 109, an insulating layer 106, a conductive layer 104, and the like.
  • the conductive layer 112a functions as one of a source electrode and a drain electrode, and the conductive layer 112b functions as the other.
  • the conductive layer 107 functions as one of a source electrode and a drain electrode, and the conductive layer 109 functions as the other.
  • the conductive layer 104 functions as a gate electrode.
  • a part of the insulating layer 106 functions as a gate insulating layer.
  • transistors 205D, 205R, and 205G are covered with insulating layer 218.
  • Insulating layer 218 functions as a protective layer for transistors 205D, 205R, and 205G.
  • the subpixels of the display unit 162 each have a transistor, a liquid crystal element 60, and a colored layer.
  • a subpixel that emits red light has a transistor 205R, a liquid crystal element 60, and a colored layer 132R that transmits red light.
  • a subpixel that emits green light has a transistor 205G, a liquid crystal element 60, and a colored layer 132G that transmits green light.
  • a subpixel that emits blue light similarly has a transistor, a liquid crystal element 60, and a colored layer that transmits blue light.
  • the liquid crystal element 60 has a common electrode 115, a pixel electrode 111, and liquid crystal 262.
  • the common electrode 115 is provided on an insulating layer 218, and an insulating layer 214 is provided on the common electrode 115.
  • the pixel electrode 111 is provided on the insulating layer 214.
  • the pixel electrode 111 and the common electrode 115 transmit visible light.
  • the liquid crystal element 60 can be a transmissive liquid crystal element.
  • the orientation of the liquid crystal 262 can be controlled by the voltage applied between the pixel electrode 111 and the common electrode 115, and the optical modulation of the light can be controlled.
  • the intensity of the light emitted through the polarizing plate 260a can be controlled.
  • the colored layer absorbs light other than a specific wavelength range of the incident light, so that the extracted light is, for example, red light.
  • a linear polarizing plate may be used as the polarizing plate 260a, but a circular polarizing plate may also be used.
  • a circular polarizing plate for example, a laminate of a linear polarizing plate and a quarter-wave retardation plate may be used.
  • polarizer 260a When a circular polarizer is used as polarizer 260a, a circular polarizer may also be used as polarizer 260b, or a normal linear polarizer may be used.
  • the desired contrast can be achieved by adjusting the cell gap, orientation, drive voltage, etc. of the liquid crystal element used in liquid crystal element 60 according to the type of polarizer used for polarizers 260a and 260b.
  • connection portion 204 is provided in a region close to the end of the substrate 151.
  • the wiring 165 is electrically connected to the FPC 172 via the conductive layer 166 and the connection layer 242.
  • the wiring 165 is connected to the wiring 165 through an opening provided in the insulating layer.
  • the wiring 165 is formed from the same material and in the same process as the conductive layer 112a and the conductive layer 107, and the conductive layer 166 is formed from the same material and in the same process as the conductive layer 112b.
  • the pixel electrode 111 has a comb-like shape or a shape with slits in a plan view.
  • the pixel electrode 111 is disposed so as to overlap the common electrode 115. In the area overlapping the colored layer, there is a portion on the common electrode 115 where the pixel electrode 111 is not disposed.
  • both the pixel electrode 111 and the common electrode 115 may have a comb-like upper surface shape.
  • the pixel electrode 111 and the common electrode 115 are configured to partially overlap. This allows the capacitance between the pixel electrode 111 and the common electrode 115 to be used as a storage capacitance, eliminating the need to provide a separate capacitive element and increasing the aperture ratio of the display device.
  • an insulating layer 225 is provided to cover the colored layers 132R, 132G and the light-shielding layer 117.
  • the insulating layer 225 functions as an overcoat that prevents the components contained in the colored layers 132R, 132G, etc. from diffusing into the liquid crystal 262.
  • the insulating layer 225 may also function as a planarizing film.
  • the insulating layer 225 can be formed using an organic resin that is translucent.
  • an alignment film for controlling the alignment of the liquid crystal 262 may be provided on the surfaces of the pixel electrode 111, the insulating layer 214, the insulating layer 225, etc. that come into contact with the liquid crystal 262.
  • FIG. 22 shows cross-sectional views of three light-emitting elements and a connection part 140 of a display part 162 in each process.
  • Light-emitting elements can be fabricated using vacuum processes such as deposition, and solution processes such as spin coating and inkjet printing.
  • deposition methods include physical deposition (PVD) methods such as sputtering, ion plating, ion beam deposition, molecular beam deposition, and vacuum deposition, and chemical deposition (CVD).
  • PVD physical deposition
  • CVD chemical deposition
  • the functional layers included in the EL layer can be formed by deposition (vacuum deposition, etc.), coating methods (dip coating, die coating, bar coating, spin coating, spray coating, etc.), printing methods (inkjet, screen (screen printing), offset (lithographic printing), flexo (letterpress), gravure, microcontact, etc.), etc.
  • the island-like layer (layer including the light-emitting layer) produced by the method for producing a display device described below is not formed using a fine metal mask, but is formed by depositing the light-emitting layer over one surface and then processing it using photolithography. This makes it possible to realize a high-definition display device or a display device with a high aperture ratio, which has been difficult to achieve until now. Furthermore, since the light-emitting layers can be produced separately for each color, it is possible to realize a display device that is extremely vivid, has high contrast, and has high display quality. Furthermore, by providing a sacrificial layer on the light-emitting layer, damage to the light-emitting layer during the display device production process can be reduced, and the reliability of the light-emitting element can be increased.
  • a display device is composed of three types of light-emitting elements, one that emits blue light, one that emits green light, and one that emits red light
  • three types of island-shaped light-emitting layers can be formed by repeating the deposition of the light-emitting layer and processing by photolithography three times.
  • pixel electrodes 111R, 111G, and 111B and a conductive layer 123 are formed on a substrate 151 on which transistors 205R, 205G, and 205B (not shown) are provided (FIG. 22A).
  • the conductive film that becomes the pixel electrodes can be formed by, for example, sputtering or vacuum deposition. After forming a resist mask on the conductive film by a photolithography process, the conductive film can be processed to form pixel electrodes 111R, 111G, and 111B and conductive layer 123. The conductive film can be processed by one or both of wet etching and dry etching.
  • Film 133Bf (later layer 133B) includes a light-emitting layer that emits blue light.
  • an example is shown in which an island-shaped EL layer of a light-emitting element that emits blue light is first formed, and then an island-shaped EL layer of a light-emitting element that emits light of another color is formed.
  • the pixel electrodes of the light-emitting elements of the colors formed second or later may be damaged by the previous process. This may result in the driving voltage of the light-emitting elements of the colors formed second or later being higher.
  • an island-shaped EL layer of a light-emitting element that emits light with the shortest wavelength e.g., a blue light-emitting element.
  • the island-shaped EL layers in the order of blue, green, and red, or blue, red, and green.
  • the state of the interface between the pixel electrode and the EL layer in the blue light-emitting element can be kept good, and the drive voltage of the blue light-emitting element can be prevented from increasing. It also extends the life of the blue light-emitting element and improves its reliability. Furthermore, since the red and green light-emitting elements are less affected by increases in drive voltage compared to the blue light-emitting element, the drive voltage can be reduced and reliability can be improved for the entire display device.
  • the order in which the island-shaped EL layers are fabricated is not limited to the above, and may be, for example, red, green, and blue.
  • film 133Bf is not formed on conductive layer 123.
  • film 133Bf can be formed only in desired areas.
  • a light-emitting element can be manufactured through a relatively simple process.
  • the heat resistance temperature of the compounds contained in film 133Bf is preferably 100°C or higher and 180°C or lower, more preferably 120°C or higher and 180°C or lower, and more preferably 140°C or higher and 180°C or lower. This can improve the reliability of the light-emitting element.
  • the upper limit of the temperature allowed in the manufacturing process of the display device can be increased. This can broaden the range of choices for materials and formation methods used in the display device, making it possible to improve yield and reliability.
  • the heat resistance temperature can be, for example, any one of the glass transition point, softening point, melting point, thermal decomposition temperature, and 5% weight loss temperature, preferably the lowest temperature among these.
  • the film 133Bf can be formed, for example, by a deposition method, specifically a vacuum deposition method.
  • the film 133Bf may also be formed by a transfer method, a printing method, an inkjet method, a coating method, or other methods.
  • a sacrificial layer 118B is formed on the film 133Bf and on the conductive layer 123 (FIG. 22A).
  • a resist mask is formed by a photolithography process on the film that will become the sacrificial layer 118B, the film can be processed to form the sacrificial layer 118B.
  • the sacrificial layer 118B is preferably provided so as to cover the ends of each of the pixel electrodes 111R, 111G, and 111B. This means that the ends of the layer 133B formed in a later process will be located outside the ends of the pixel electrode 111B. This makes it possible to use the entire upper surface of the pixel electrode 111B as a light-emitting region, thereby increasing the aperture ratio of the pixel. In addition, since the ends of the layer 133B may be damaged in a process after the formation of the layer 133B, it is preferable that they are located outside the ends of the pixel electrode 111B, that is, are not used as a light-emitting region. This makes it possible to suppress variation in the characteristics of the light-emitting element and increase reliability.
  • layer 133B covers the top and side surfaces of pixel electrode 111B, each process after the formation of layer 133B can be performed without pixel electrode 111B being exposed. If the end of pixel electrode 111B is exposed, corrosion may occur during an etching process or the like. By suppressing corrosion of pixel electrode 111B, the yield and characteristics of the light-emitting element can be improved.
  • the sacrificial layer 118B is also preferable to provide at a position that overlaps the conductive layer 123. This makes it possible to prevent the conductive layer 123 from being damaged during the manufacturing process of the display device.
  • a film that is highly resistant to the processing conditions of the film 133Bf specifically, a film that can increase the etching selectivity with respect to the film 133Bf, is used.
  • the sacrificial layer 118B is formed at a temperature lower than the heat resistance temperature of each compound contained in the film 133Bf.
  • the substrate temperature when forming the sacrificial layer 118B is typically 200°C or less, preferably 150°C or less, more preferably 120°C or less, more preferably 100°C or less, and even more preferably 80°C or less.
  • the deposition temperature of sacrificial layer 118B can be made high, which is preferable.
  • the substrate temperature when forming sacrificial layer 118B can be set to 100°C or higher, 120°C or higher, or 140°C or higher.
  • the higher the deposition temperature the denser the inorganic insulating film can be and the higher the barrier properties can be. Therefore, by depositing the sacrificial layer at such a temperature, damage to film 133Bf can be further reduced, and the reliability of the light-emitting element can be improved.
  • each of the other layers e.g., insulating film 125f
  • film 133Bf the deposition temperature of each of the other layers (e.g., insulating film 125f) formed on film 133Bf.
  • the sacrificial layer 118B can be formed by, for example, sputtering, ALD (including thermal ALD and PEALD), CVD, or vacuum deposition. It may also be formed by using the wet film formation method described above.
  • the sacrificial layer 118B (if the sacrificial layer 118B has a laminated structure, the layer provided in contact with the film 133Bf) is preferably formed using a formation method that causes less damage to the film 133Bf. For example, it is preferable to use the ALD method or the vacuum deposition method rather than the sputtering method.
  • the sacrificial layer 118B can be processed by wet etching or dry etching. It is preferable to process the sacrificial layer 118B by anisotropic etching.
  • the wet etching method By using the wet etching method, damage to the film 133Bf during processing of the sacrificial layer 118B can be reduced compared to when using the dry etching method.
  • a developer When using the wet etching method, it is preferable to use, for example, a developer, a tetramethylammonium hydroxide (TMAH) aqueous solution, dilute hydrofluoric acid, oxalic acid, phosphoric acid, acetic acid, nitric acid, or a mixed solution containing two or more of these.
  • TMAH tetramethylammonium hydroxide
  • a mixed acid-based chemical solution containing water, phosphoric acid, dilute hydrofluoric acid, and nitric acid may be used.
  • the chemical solution used in the wet etching process may be alkaline or acidic.
  • the sacrificial layer 118B may be, for example, one or more of a metal film, an alloy film, a metal oxide film, a semiconductor film, an inorganic insulating film, and an organic insulating film.
  • the sacrificial layer 118B can be made of metal materials such as gold, silver, platinum, magnesium, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, palladium, titanium, aluminum, yttrium, zirconium, and tantalum, or alloy materials containing such metal materials.
  • the sacrificial layer 118B can be made of metal oxides such as In-Ga-Zn oxide, indium oxide, In-Zn oxide, In-Sn oxide, indium titanium oxide (In-Ti oxide), indium tin zinc oxide (In-Sn-Zn oxide), indium titanium zinc oxide (In-Ti-Zn oxide), indium gallium tin zinc oxide (In-Ga-Sn-Zn oxide), and indium tin oxide containing silicon.
  • metal oxides such as In-Ga-Zn oxide, indium oxide, In-Zn oxide, In-Sn oxide, indium titanium oxide (In-Ti oxide), indium tin zinc oxide (In-Sn-Zn oxide), indium titanium zinc oxide (In-Ti-Zn oxide), indium gallium tin zinc oxide (In-Ga-Sn-Zn oxide), and indium tin oxide containing silicon.
  • element M (wherein M is one or more elements selected from aluminum, silicon, boron, yttrium, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium) may be used in place of the above gallium.
  • semiconductor materials such as silicon or germanium can be used as materials that have high compatibility with semiconductor manufacturing processes.
  • oxides or nitrides of the above semiconductor materials can be used.
  • non-metallic materials such as carbon, or compounds thereof can be used.
  • metals such as titanium, tantalum, tungsten, chromium, and aluminum, or alloys containing one or more of these, can be used.
  • oxides containing the above metals, such as titanium oxide or chromium oxide, or nitrides such as titanium nitride, chromium nitride, or tantalum nitride can be used.
  • various inorganic insulating films that can be used for the protective layer 131 can be used as the sacrificial layer 118B.
  • oxide insulating films are preferable because they have higher adhesion to the film 133Bf than nitride insulating films.
  • inorganic insulating materials such as aluminum oxide, hafnium oxide, and silicon oxide can be used for the sacrificial layer 118B.
  • an aluminum oxide film can be formed as the sacrificial layer 118B using the ALD method. Using the ALD method is preferable because it can reduce damage to the base (particularly the film 133Bf).
  • the sacrificial layer 118B can be a laminated structure of an inorganic insulating film (e.g., an aluminum oxide film) formed using the ALD method and an inorganic film (e.g., an In-Ga-Zn oxide film, a silicon film, or a tungsten film) formed using the sputtering method.
  • an inorganic insulating film e.g., an aluminum oxide film
  • an inorganic film e.g., an In-Ga-Zn oxide film, a silicon film, or a tungsten film
  • the same inorganic insulating film can be used for both the sacrificial layer 118B and the insulating layer 125 to be formed later.
  • an aluminum oxide film formed by ALD can be used for both the sacrificial layer 118B and the insulating layer 125.
  • the same film-forming conditions can be applied to the sacrificial layer 118B and the insulating layer 125, or different film-forming conditions can be applied to each of them.
  • the sacrificial layer 118B can be an insulating layer with high barrier properties against at least one of water and oxygen.
  • the sacrificial layer 118B is a layer that is removed in most or all in a later process, it is preferable that it is easy to process. Therefore, it is preferable to form the sacrificial layer 118B under conditions where the substrate temperature during film formation is lower than that of the insulating layer 125.
  • an organic material may be used for the sacrificial layer 118B.
  • the organic material may be a material that is soluble in a solvent that is chemically stable with respect to at least the film located at the top of the film 133Bf.
  • a material that dissolves in water or alcohol is preferably used.
  • the sacrificial layer 118B may be made of an organic resin such as polyvinyl alcohol (PVA), polyvinyl butyral, polyvinylpyrrolidone, polyethylene glycol, polyglycerin, pullulan, water-soluble cellulose, alcohol-soluble polyamide resin, or a fluororesin such as a perfluoropolymer.
  • PVA polyvinyl alcohol
  • polyvinyl butyral polyvinylpyrrolidone
  • polyethylene glycol polyglycerin
  • pullulan polyethylene glycol
  • polyglycerin polyglycerin
  • pullulan polyethylene glycol
  • pullulan polyglycerin
  • water-soluble cellulose water-soluble cellulose
  • alcohol-soluble polyamide resin or a fluororesin such as a perfluoropolymer.
  • the sacrificial layer 118B can be a laminated structure of an organic film (e.g., a PVA film) formed using either a vapor deposition method or the above-mentioned wet film formation method, and an inorganic film (e.g., a silicon nitride film) formed using a sputtering method.
  • an organic film e.g., a PVA film
  • an inorganic film e.g., a silicon nitride film
  • a portion of the sacrificial film may remain as a sacrificial layer.
  • the film 133Bf is processed using the sacrificial layer 118B as a hard mask to form the layer 133B ( Figure 22B).
  • a laminated structure of layer 133B and sacrificial layer 118B remains on pixel electrode 111B.
  • Pixel electrodes 111R and 111G are exposed.
  • sacrificial layer 118B remains on conductive layer 123.
  • the film 133Bf is preferably processed by anisotropic etching.
  • anisotropic dry etching is preferable.
  • wet etching may be used.
  • the process of forming film 133Bf, the process of forming sacrificial layer 118B, and the process of forming layer 133B are repeated at least twice, changing the light-emitting material, to form a layered structure of layer 133R and sacrificial layer 118R on pixel electrode 111R, and a layered structure of layer 133G and sacrificial layer 118G on pixel electrode 111G (FIG. 22C).
  • layer 133R is formed to include a light-emitting layer that emits red light
  • layer 133G is formed to include a light-emitting layer that emits green light.
  • the materials that can be used for sacrificial layer 118B can be applied to sacrificial layers 118R and 118G, and both may be the same material or different materials.
  • the side surfaces of layers 133B, 133G, and 133R are perpendicular or approximately perpendicular to the surface on which they are formed.
  • the angle between the surface on which they are formed and these side surfaces is 60 degrees or more and 90 degrees or less.
  • the distance between two adjacent layers of layers 133B, 133G, and 133R formed using photolithography can be narrowed to 8 ⁇ m or less, 5 ⁇ m or less, 3 ⁇ m or less, 2 ⁇ m or less, or 1 ⁇ m or less.
  • the distance can be defined as, for example, the distance between two adjacent opposing ends of layers 133B, 133G, and 133R. In this way, by narrowing the distance between the island-shaped EL layers, a display device with high definition and a large aperture ratio can be provided.
  • insulating film 125f which will later become insulating layer 125, is formed to cover the pixel electrode, layer 133B, layer 133G, layer 133R, sacrificial layer 118B, sacrificial layer 118G, and sacrificial layer 118R, and insulating layer 127 is formed on insulating film 125f ( Figure 22D).
  • the insulating film 125f it is preferable to form an insulating film having a thickness of, for example, 3 nm or more and 200 nm or less. More specifically, it is preferable to form the insulating film with a thickness of 3 nm or more, 5 nm or more, or 10 nm or more, and 200 nm or less, 150 nm or less, 100 nm or less, or 50 nm or less.
  • the insulating film 125f is preferably formed, for example, by the ALD method.
  • the ALD method is preferable because it can reduce film formation damage and can form a film with high coating properties.
  • As the insulating film 125f it is preferable to form an aluminum oxide film, for example, by the ALD method.
  • the insulating film 125f may be formed using a sputtering method, a CVD method, or a plasma CVD method, which have a faster film formation speed than the ALD method. This allows a highly reliable display device to be manufactured with high productivity.
  • the insulating film that becomes the insulating layer 127 is preferably formed by the above-mentioned wet film formation method (e.g., spin coating) using, for example, a photosensitive resin composition containing an acrylic resin.
  • a heat treatment also called pre-baking
  • visible light or ultraviolet light is irradiated to a part of the insulating film to expose the part.
  • development is performed to remove the exposed area of the insulating film.
  • a heat treatment also called post-baking
  • the shape of the insulating layer 127 is not limited to the shape shown in FIG. 22D.
  • the upper surface of the insulating layer 127 can have one or more of a convex curved surface, a concave curved surface, and a flat surface.
  • the insulating layer 127 may cover the side surface of at least one end of the insulating layer 125, the sacrificial layer 118B, the sacrificial layer 118G, and the sacrificial layer 118R.
  • an etching process is performed using the insulating layer 127 as a mask to remove the insulating film 125f and parts of the sacrificial layers 118B, 118G, and 118R.
  • openings are formed in the sacrificial layers 118B, 118G, and 118R, respectively, and the top surfaces of the layers 133G, 133G, and 133R, and the conductive layer 123 are exposed.
  • parts of the sacrificial layers 118B, 118G, and 118R may remain in positions overlapping the insulating layer 127 and the insulating layer 125 (see sacrificial layers 119B, 119G, and 119R).
  • the etching process can be performed by dry etching or wet etching. If the insulating film 125f is formed using the same material as the sacrificial layers 118B, 118G, and 118R, this is preferable because the etching process can be performed in one go.
  • insulating layer 127 As described above, by providing insulating layer 127, insulating layer 125, sacrificial layer 118B, sacrificial layer 118G, and sacrificial layer 118R, it is possible to prevent connection failures caused by disconnected portions of common layer 114 and common electrode 115 between each light-emitting element, and increases in electrical resistance caused by locally thin portions of the film thickness. This allows the display device of one embodiment of the present invention to improve display quality.
  • the common layer 114 and the common electrode 115 are formed in this order on the insulating layer 127, the layer 133B, the layer 133G, and the layer 133R ( Figure 22F).
  • the common layer 114 can be formed by a method such as a deposition method (including a vacuum deposition method), a transfer method, a printing method, an inkjet method, or a coating method.
  • the common electrode 115 can be formed by, for example, sputtering or vacuum deposition. Alternatively, a film formed by deposition and a film formed by sputtering can be laminated together.
  • the island-shaped layers 133B, 133G, and 133R are not formed using a fine metal mask, but are formed by forming a film on one surface and then processing it, so that the island-shaped layers can be formed with a uniform thickness.
  • This makes it possible to realize a high-definition display device or a display device with a high aperture ratio.
  • the layers 133B, 133G, and 133R can be prevented from contacting each other in adjacent subpixels. Therefore, it is possible to prevent leakage current from occurring between the subpixels. This makes it possible to prevent crosstalk caused by unintended light emission, and to realize a display device with extremely high contrast.
  • the display device of one embodiment of the present invention can achieve both high definition and high display quality.
  • the electronic device of this embodiment has a display device of one embodiment of the present invention in a display portion.
  • the display device of one embodiment of the present invention can easily achieve high definition and high resolution. Therefore, it can be used in the display portion of various electronic devices.
  • the semiconductor device of one embodiment of the present invention can also be applied to portions other than the display portion of an electronic device.
  • portions other than the display portion of an electronic device For example, by using the semiconductor device of one embodiment of the present invention in a control portion of an electronic device, it is possible to reduce power consumption, which is preferable.
  • Electronic devices include, for example, electronic devices with relatively large screens such as television sets, desktop or notebook personal computers, computer monitors, digital signage, large game machines such as pachinko machines, as well as digital cameras, digital video cameras, digital photo frames, mobile phones, portable game machines, personal digital assistants, and audio playback devices.
  • the display device of one embodiment of the present invention can be used favorably in electronic devices having a relatively small display area because it is possible to increase the resolution.
  • electronic devices include wristwatch-type and bracelet-type information terminals (wearable devices), as well as wearable devices that can be worn on the head, such as VR devices such as head-mounted displays, AR glasses-type devices, and MR devices.
  • the display device of one embodiment of the present invention preferably has an extremely high resolution such as HD (1280 x 720 pixels), FHD (1920 x 1080 pixels), WQHD (2560 x 1440 pixels), WQXGA (2560 x 1600 pixels), 4K (3840 x 2160 pixels), or 8K (7680 x 4320 pixels).
  • an extremely high resolution such as HD (1280 x 720 pixels), FHD (1920 x 1080 pixels), WQHD (2560 x 1440 pixels), WQXGA (2560 x 1600 pixels), 4K (3840 x 2160 pixels), or 8K (7680 x 4320 pixels).
  • HD 1280 x 720 pixels
  • FHD (1920 x 1080 pixels
  • WQHD 2560 x 1440 pixels
  • WQXGA 2560 x 1600 pixels
  • 4K 3840 x 2160 pixels
  • 8K 8K
  • the pixel density (resolution) of the display device of one embodiment of the present invention is preferably 100 ppi or more, preferably 300 ppi or more, more preferably 500 ppi or more, more preferably 1000 ppi or more, more preferably 2000 ppi or more, more preferably 3000 ppi or more, more preferably 5000 ppi or more, and even more preferably 7000 ppi or more.
  • the display device can support various screen ratios such as 1:1 (square), 4:3, 16:9, and 16:10.
  • the electronic device of this embodiment may have a sensor (including the function of sensing, detecting, or measuring force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemicals, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared light).
  • a sensor including the function of sensing, detecting, or measuring force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemicals, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared light).
  • the electronic device of this embodiment can have various functions. For example, it can have a function to display various information (still images, videos, text images, etc.) on the display unit, a touch panel function, a function to display a calendar, date or time, etc., a function to execute various software (programs), a wireless communication function, a function to read out programs or data recorded on a recording medium, etc.
  • a function to display various information still images, videos, text images, etc.
  • a touch panel function a function to display a calendar, date or time, etc.
  • a function to execute various software (programs) a wireless communication function
  • a function to read out programs or data recorded on a recording medium etc.
  • FIG. 23A to 23D An example of a wearable device that can be worn on the head will be described using Figures 23A to 23D.
  • These wearable devices have at least one of the following functions: a function to display AR content, a function to display VR content, a function to display SR content, and a function to display MR content.
  • a function to display AR content a function to display AR content
  • VR content a function to display VR content
  • SR content a function to display SR content
  • MR content a function to display MR content
  • Electronic device 700A shown in FIG. 23A and electronic device 700B shown in FIG. 23B each have a pair of display panels 751, a pair of housings 721, a communication unit (not shown), a pair of mounting units 723, a control unit (not shown), an imaging unit (not shown), a pair of optical members 753, a frame 757, and a pair of nose pads 758.
  • a display device can be applied to the display panel 751. Therefore, the electronic device can display images with extremely high resolution.
  • Electronic device 700A and electronic device 700B can each project an image displayed on display panel 751 onto display area 756 of optical member 753. Because optical member 753 is translucent, the user can see the image displayed in the display area superimposed on the transmitted image visible through optical member 753. Therefore, electronic device 700A and electronic device 700B are each electronic devices capable of AR display.
  • Electronic device 700A and electronic device 700B may be provided with a camera capable of capturing an image of the front as an imaging unit. Furthermore, electronic device 700A and electronic device 700B may each be provided with an acceleration sensor such as a gyro sensor, thereby detecting the orientation of the user's head and displaying an image corresponding to that orientation in display area 756.
  • an acceleration sensor such as a gyro sensor
  • the communication unit has a wireless communication device, and can supply video signals and the like via the wireless communication device.
  • a connector can be provided to which a cable through which a video signal and power supply potential can be connected.
  • Electronic device 700A and electronic device 700B are provided with batteries and can be charged wirelessly and/or wired.
  • the housing 721 may be provided with a touch sensor module.
  • the touch sensor module has a function of detecting that the outer surface of the housing 721 is touched.
  • the touch sensor module can detect a tap operation or a slide operation by the user and execute various processes. For example, a tap operation can execute processes such as pausing or resuming a video, and a slide operation can execute processes such as fast-forwarding or rewinding. Furthermore, by providing a touch sensor module on each of the two housings 721, the range of operations can be expanded.
  • touch sensors can be used as the touch sensor module.
  • various types can be adopted, such as the capacitance type, resistive film type, infrared type, electromagnetic induction type, surface acoustic wave type, and optical type.
  • a photoelectric conversion element When using an optical touch sensor, a photoelectric conversion element can be used as the light receiving element.
  • the active layer of the photoelectric conversion element can be made of either or both of an inorganic semiconductor and an organic semiconductor.
  • Electronic device 800A shown in FIG. 23C and electronic device 800B shown in FIG. 23D each have a pair of display units 820, a housing 821, a communication unit 822, a pair of mounting units 823, a control unit 824, a pair of imaging units 825, and a pair of lenses 832.
  • a display device can be applied to the display portion 820. Therefore, the electronic device can display images with extremely high resolution. This allows the user to feel a high sense of immersion.
  • the display unit 820 is provided inside the housing 821 at a position that can be seen through the lens 832. In addition, by displaying different images on the pair of display units 820, it is also possible to perform three-dimensional display using parallax.
  • the electronic device 800A and the electronic device 800B can each be considered electronic devices for VR.
  • a user wearing the electronic device 800A or the electronic device 800B can view the image displayed on the display unit 820 through the lens 832.
  • Electric device 800A and electronic device 800B each preferably have a mechanism that can adjust the left-right positions of lens 832 and display unit 820 so that they are optimally positioned according to the position of the user's eyes. Also, it is preferable that they have a mechanism that can adjust the focus by changing the distance between lens 832 and display unit 820.
  • the imaging unit 825 has a function of acquiring external information.
  • the data acquired by the imaging unit 825 can be output to the display unit 820.
  • An image sensor can be used for the imaging unit 825.
  • multiple cameras may be provided to support multiple angles of view, such as telephoto and wide angle.
  • a distance measuring sensor capable of measuring the distance to an object
  • the imaging unit 825 is one aspect of the detection unit.
  • the detection unit for example, an image sensor or a distance image sensor such as a LIDAR (Light Detection and Ranging) can be used.
  • LIDAR Light Detection and Ranging
  • Each of electronic devices 800A and 800B may have an input terminal.
  • the input terminal can be connected to a cable that supplies a video signal from a video output device or the like, and power for charging a battery provided within the electronic device.
  • the electronic device of one embodiment of the present invention may have a function of wireless communication with the earphone 750.
  • the earphone 750 has a communication unit (not shown) and has a wireless communication function.
  • the earphone 750 can receive information (e.g., audio data) from the electronic device through the wireless communication function.
  • the electronic device 700A shown in FIG. 23A has a function of transmitting information to the earphone 750 through the wireless communication function.
  • the electronic device 800A shown in FIG. 23C has a function of transmitting information to the earphone 750 through the wireless communication function.
  • electronic device 800B shown in FIG. 23D has earphone unit 827.
  • earphone unit 827 and control unit 824 can be configured to be connected to each other by wire.
  • Part of the wiring connecting earphone unit 827 and control unit 824 may be disposed inside housing 821 or mounting unit 823.
  • earphone unit 827 and mounting unit 823 may have magnets. This allows earphone unit 827 to be fixed to mounting unit 823 by magnetic force, which is preferable as it makes storage easier.
  • the electronic device may have an audio output terminal to which earphones or headphones can be connected.
  • the electronic device may also have one or both of an audio input terminal and an audio input mechanism.
  • a sound collection device such as a microphone can be used as the audio input mechanism.
  • the electronic device may be endowed with the functionality of a so-called headset.
  • the electronic device of one embodiment of the present invention can transmit information to the earphones via wire or wirelessly.
  • the electronic device 6500 shown in FIG. 24A is a portable information terminal that can be used as a smartphone.
  • the display device of one embodiment of the present invention can be applied to the display portion 6502.
  • FIG. 24B is a schematic cross-sectional view including the end of the housing 6501 on the microphone 6506 side.
  • a translucent protective member 6510 is provided on the display surface side of the housing 6501, and a display panel 6511, optical members 6512, a touch sensor panel 6513, a printed circuit board 6517, a battery 6518, etc. are arranged in the space surrounded by the housing 6501 and the protective member 6510.
  • the display panel 6511, the optical member 6512, and the touch sensor panel 6513 are fixed to the protective member 6510 by an adhesive layer (not shown).
  • a part of the display panel 6511 is folded back in the area outside the display unit 6502, and the FPC 6515 is connected to the folded back part.
  • An IC 6516 is mounted on the FPC 6515.
  • the FPC 6515 is connected to a terminal provided on a printed circuit board 6517.
  • the flexible display of one embodiment of the present invention can be applied to the display panel 6511. Therefore, an extremely lightweight electronic device can be realized.
  • the display panel 6511 is extremely thin, a large-capacity battery 6518 can be mounted thereon while keeping the thickness of the electronic device small.
  • a connection portion with the FPC 6515 on the back side of the pixel portion, an electronic device with a narrow frame can be realized.
  • FIG. 24C shows an example of a television device.
  • a display unit 7000 is built into a housing 7101.
  • the housing 7101 is supported by a stand 7103.
  • the television set 7100 shown in FIG. 24C can be operated using operation switches provided on the housing 7101 and a separate remote control 7111.
  • the display unit 7000 may be provided with a touch sensor, and the television set 7100 may be operated by touching the display unit 7000 with a finger or the like.
  • the remote control 7111 may have a display unit that displays information output from the remote control 7111.
  • the channel and volume can be operated using operation keys or a touch panel provided on the remote control 7111, and the image displayed on the display unit 7000 can be operated.
  • the television device 7100 is configured to include a receiver and a modem.
  • the receiver can receive general television broadcasts.
  • by connecting to a wired or wireless communication network via the modem it is also possible to carry out one-way (from sender to receiver) or two-way (between sender and receiver, or between receivers, etc.) information communication.
  • FIG. 24D shows an example of a notebook personal computer.
  • the notebook personal computer 7200 has a housing 7211, a keyboard 7212, a pointing device 7213, an external connection port 7214, etc.
  • the display unit 7000 is built into the housing 7211.
  • a display device can be applied to the display portion 7000.
  • Figures 24E and 24F show an example of digital signage.
  • the digital signage 7300 shown in FIG. 24E has a housing 7301, a display unit 7000, and a speaker 7303. It can also have LED lamps, operation keys (including a power switch or an operation switch), connection terminals, various sensors, a microphone, etc.
  • FIG. 24F shows digital signage 7400 attached to a cylindrical pole 7401.
  • Digital signage 7400 has a display unit 7000 that is provided along the curved surface of pole 7401.
  • a display device according to one embodiment of the present invention can be applied to the display portion 7000.
  • the larger the display unit 7000 the more information can be provided at one time. Also, the larger the display unit 7000, the more easily it catches people's attention, which can increase the advertising effectiveness of an advertisement, for example.
  • a touch panel By applying a touch panel to the display unit 7000, not only can images or videos be displayed on the display unit 7000, but the user can also intuitively operate it, which is preferable. Furthermore, when used to provide information such as route information or traffic information, the intuitive operation can improve usability.
  • the digital signage 7300 or the digital signage 7400 can be linked via wireless communication with an information terminal 7311 or an information terminal 7411 such as a smartphone carried by a user.
  • advertising information displayed on the display unit 7000 can be displayed on the screen of the information terminal 7311 or the information terminal 7411.
  • the display on the display unit 7000 can be switched by operating the information terminal 7311 or the information terminal 7411.
  • the digital signage 7300 or the digital signage 7400 can also be made to run a game using the screen of the information terminal 7311 or the information terminal 7411 as an operating means (controller). This allows an unspecified number of users to participate in and enjoy the game at the same time.
  • the electronic device shown in Figures 25A to 25G has a housing 9000, a display unit 9001, a speaker 9003, operation keys 9005 (including a power switch or an operation switch), a connection terminal 9006, a sensor 9007 (including a function to sense, detect, or measure force, displacement, position, speed, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared light), a microphone 9008, etc.
  • a display device can be applied to the display portion 9001.
  • the electronic devices shown in Figures 25A to 25G have various functions. For example, they can have a function to display various information (still images, videos, text images, etc.) on the display unit, a touch panel function, a function to display a calendar, date or time, etc., a function to control processing by various software (programs), a wireless communication function, a function to read and process programs or data recorded on a recording medium, etc.
  • the functions of the electronic devices are not limited to these, and they can have various functions.
  • the electronic devices may have multiple display units.
  • the electronic devices may have a function to provide a camera or the like, capture still images or videos, and store them on a recording medium (external or built into the camera), a function to display the captured images on the display unit, etc.
  • FIG. 25A is a perspective view showing a mobile information terminal 9101.
  • the mobile information terminal 9101 can be used as a smartphone, for example.
  • the mobile information terminal 9101 may be provided with a speaker 9003, a connection terminal 9006, a sensor 9007, and the like.
  • the mobile information terminal 9101 can display text and image information on multiple surfaces.
  • FIG. 25A shows an example in which three icons 9050 are displayed.
  • Information 9051 shown in a dashed rectangle can also be displayed on another surface of the display unit 9001. Examples of the information 9051 include notifications of incoming e-mail, SNS, telephone calls, etc., the title of e-mail or SNS, the sender's name, the date and time, the remaining battery level, and radio wave strength.
  • an icon 9050 or the like may be displayed at the position where the information 9051 is displayed.
  • FIG 25B is a perspective view showing a mobile information terminal 9102.
  • the mobile information terminal 9102 has a function of displaying information on three or more sides of the display unit 9001.
  • information 9052, information 9053, and information 9054 are each displayed on different sides.
  • a user can check information 9053 displayed in a position that can be observed from above the mobile information terminal 9102 while the mobile information terminal 9102 is stored in a breast pocket of clothes. The user can check the display without taking the mobile information terminal 9102 out of the pocket and decide, for example, whether or not to answer a call.
  • FIG. 25C is a perspective view showing a tablet terminal 9103.
  • the tablet terminal 9103 is capable of executing various applications such as mobile phone calls, e-mail, text browsing and creation, music playback, Internet communication, and computer games, for example.
  • the tablet terminal 9103 has a display unit 9001, a camera 9002, a microphone 9008, and a speaker 9003 on the front side of the housing 9000, operation keys 9005 as operation buttons on the left side of the housing 9000, and a connection terminal 9006 on the bottom.
  • FIG. 25D is a perspective view showing a wristwatch-type mobile information terminal 9200.
  • the mobile information terminal 9200 can be used, for example, as a smart watch (registered trademark).
  • the display surface of the display unit 9001 is curved, and display can be performed along the curved display surface.
  • the mobile information terminal 9200 can also make hands-free calls by communicating with, for example, a headset capable of wireless communication.
  • the mobile information terminal 9200 can also transmit data to and from other information terminals and charge itself via a connection terminal 9006. Charging may be performed by wireless power supply.
  • FIG. 25E to 25G are perspective views showing a foldable mobile information terminal 9201.
  • FIG. 25E is a perspective view of the mobile information terminal 9201 in an unfolded state
  • FIG. 25G is a perspective view of the mobile information terminal 9201 in a folded state
  • FIG. 25F is a perspective view of a state in the middle of changing from one of FIG. 25E and FIG. 25G to the other.
  • the mobile information terminal 9201 has excellent portability when folded, and excellent display visibility due to a seamless wide display area when unfolded.
  • the display unit 9001 of the mobile information terminal 9201 is supported by three housings 9000 connected by hinges 9055.
  • the display unit 9001 can be bent with a radius of curvature of 0.1 mm or more and 150 mm or less.

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  • Microelectronics & Electronic Packaging (AREA)
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  • General Physics & Mathematics (AREA)
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  • Thin Film Transistor (AREA)
PCT/IB2024/053075 2023-04-05 2024-03-29 半導体装置、及び表示装置 Ceased WO2024209327A1 (ja)

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JPH1168116A (ja) * 1997-08-14 1999-03-09 Lg Semicon Co Ltd 薄膜トランジスタ及びその製造方法
JP2004165297A (ja) * 2002-11-11 2004-06-10 Fujitsu Ltd 半導体装置
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JPH1168116A (ja) * 1997-08-14 1999-03-09 Lg Semicon Co Ltd 薄膜トランジスタ及びその製造方法
JP2004165297A (ja) * 2002-11-11 2004-06-10 Fujitsu Ltd 半導体装置
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