WO2024209326A1 - 半導体装置、及び、半導体装置の作製方法 - Google Patents

半導体装置、及び、半導体装置の作製方法 Download PDF

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Publication number
WO2024209326A1
WO2024209326A1 PCT/IB2024/053069 IB2024053069W WO2024209326A1 WO 2024209326 A1 WO2024209326 A1 WO 2024209326A1 IB 2024053069 W IB2024053069 W IB 2024053069W WO 2024209326 A1 WO2024209326 A1 WO 2024209326A1
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Prior art keywords
layer
insulating layer
conductive layer
region
insulating
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English (en)
French (fr)
Japanese (ja)
Inventor
黒崎大輔
保本清治
田邉美和
神長正美
肥塚純一
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Priority to CN202480023221.2A priority Critical patent/CN121220199A/zh
Priority to KR1020257034409A priority patent/KR20250170619A/ko
Priority to JP2025512205A priority patent/JPWO2024209326A1/ja
Publication of WO2024209326A1 publication Critical patent/WO2024209326A1/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B33/00—Electroluminescent light sources
    • H05B33/12—Light sources with substantially two-dimensional [2D] radiating surfaces
    • H05B33/14—Light sources with substantially two-dimensional [2D] radiating surfaces characterised by the chemical or physical composition or the arrangement of the electroluminescent material, or by the simultaneous addition of the electroluminescent material in or onto the light source
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6736—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes characterised by the shape of gate insulators
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6757—Thin-film transistors [TFT] characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/421—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/441—Interconnections, e.g. scanning lines
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/451—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs characterised by the compositions or shapes of the interlayer dielectrics
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H29/00—Integrated devices, or assemblies of multiple devices, comprising at least one light-emitting semiconductor element covered by group H10H20/00
    • H10H29/30—Active-matrix LED displays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/10—OLEDs or polymer light-emitting diodes [PLED]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/10—Deposition of organic active material
    • H10K71/16—Deposition of organic active material using physical vapour deposition [PVD], e.g. vacuum deposition or sputtering

Definitions

  • One aspect of the present invention relates to a semiconductor device and a manufacturing method thereof.
  • One aspect of the present invention relates to a transistor and a manufacturing method thereof.
  • One aspect of the present invention relates to a display device having a semiconductor device.
  • one embodiment of the present invention is not limited to the above technical field.
  • Examples of technical fields of one embodiment of the present invention include semiconductor devices, display devices, light-emitting devices, power storage devices, memory devices, electronic devices, lighting devices, input devices (e.g., touch sensors), input/output devices (e.g., touch panels), driving methods thereof, and manufacturing methods thereof.
  • a semiconductor device is a device that utilizes semiconductor characteristics, and refers to a circuit including a semiconductor element (transistor, diode, photodiode, etc.), a device having such a circuit, etc. Also, it refers to any device that can function by utilizing semiconductor characteristics. For example, an integrated circuit, a chip including an integrated circuit, and an electronic component that houses a chip in a package are examples of semiconductor devices. Also, memory devices, display devices, light-emitting devices, lighting devices, and electronic devices may themselves be semiconductor devices and each may have a semiconductor device.
  • Semiconductor devices having transistors are widely used in electronic devices. For example, in display devices, by reducing the area occupied by transistors, the pixel size can be reduced and higher definition can be achieved. For this reason, there is a demand for miniaturization of transistors.
  • Devices requiring high-definition display devices such as those for virtual reality (VR), augmented reality (AR), substitute reality (SR), and mixed reality (MR), are being actively developed.
  • VR virtual reality
  • AR augmented reality
  • SR substitute reality
  • MR mixed reality
  • display devices for example, light-emitting devices having organic EL (Electro Luminescence) elements or light-emitting diodes (LEDs: Light Emitting Diodes) have been developed.
  • organic EL Electro Luminescence
  • LEDs Light Emitting Diodes
  • Patent document 1 discloses a high-definition display device that uses organic EL elements.
  • An object of one embodiment of the present invention is to provide a transistor with a fine size.
  • an object of the present invention is to provide a transistor with a small channel length.
  • an object of the present invention is to provide a transistor with a large on-state current.
  • an object of the present invention is to provide a transistor with good electrical characteristics.
  • an object of the present invention is to provide a semiconductor device with a small occupancy area.
  • an object of the present invention is to provide a semiconductor device with low wiring resistance.
  • an object of the present invention is to provide a semiconductor device or display device with low power consumption.
  • an object of the present invention is to provide a highly reliable transistor, semiconductor device, or display device.
  • an object of the present invention is to provide a display device that can be easily made high-definition.
  • an object of the present invention is to provide a method for manufacturing a semiconductor device or display device with high productivity.
  • an object of the present invention is to provide a novel transistor, semiconductor device, display device, and a manufacturing method thereof.
  • One aspect of the present invention is a semiconductor device having a semiconductor layer, a first conductive layer, a second conductive layer, a third conductive layer, a first insulating layer, and a second insulating layer, the first insulating layer being located on the first conductive layer, the second conductive layer being located on the first insulating layer, the semiconductor layer being in contact with the upper surface of the first conductive layer, the upper surface and side surface of the second conductive layer, and the side surface of the first insulating layer, the second insulating layer being located on the semiconductor layer, the third conductive layer being located on the second insulating layer and overlapping with the semiconductor layer via the second insulating layer, the semiconductor layer having a first region in contact with the upper surface of the first conductive layer and a second region in contact with the upper surface of the second conductive layer, the first region and the second region having a first element, the first element being boron or phosphorus.
  • one aspect of the present invention includes a semiconductor layer, a first conductive layer, a second conductive layer, a third conductive layer, a first insulating layer, and a second insulating layer, the first insulating layer being located on the first conductive layer and having a first opening, the second conductive layer being located on the first insulating layer and having a second opening overlapping the first opening, the semiconductor layer contacting an upper surface of the first conductive layer through the first opening and the second opening, and the upper surface of the second conductive layer and the second opening.
  • the semiconductor device has a first region that contacts the upper surface of the first conductive layer and a side surface at the first opening of the first insulating layer, the second insulating layer is located on the semiconductor layer, the third conductive layer is located on the second insulating layer and overlaps with the semiconductor layer via the second insulating layer, the semiconductor layer has a first region that contacts the upper surface of the first conductive layer and a second region that contacts the upper surface of the second conductive layer, and the first region and the second region have a first element, the first element being boron or phosphorus.
  • the semiconductor device has the first insulating layer on a substrate, and the angle between the side surface at the first opening of the first insulating layer and the upper surface of the substrate is preferably 65 degrees or more and 90 degrees or less.
  • the second insulating layer preferably contains the first element.
  • the first region and the second region preferably contain hydrogen and the first element is boron.
  • the semiconductor layer preferably has a third region in contact with a side surface of the first insulating layer, the first region preferably has a region having a higher concentration of the first element than the third region, and the second region preferably has a region having a higher concentration of the first element than the third region.
  • the first region has a region with a higher hydrogen concentration than the third region
  • the second region has a region with a higher hydrogen concentration than the third region
  • the semiconductor layer preferably has a metal oxide in the channel formation region.
  • the first insulating layer preferably has a first layer containing nitrogen and silicon on the first conductive layer, a second layer containing oxygen and silicon on the first layer, and a third layer containing nitrogen and silicon on the second layer. Furthermore, the first insulating layer preferably has a fourth layer located between the first conductive layer and the first layer, and a fifth layer on the third layer, and the fourth layer preferably has a region with a higher hydrogen content than the first layer, and the fifth layer preferably has a region with a higher hydrogen content than the third layer.
  • the semiconductor device of each of the above configurations preferably has a third insulating layer, the first conductive layer is located on the third insulating layer, the first insulating layer has a fourth layer on the third layer, and the third insulating layer preferably has a region with a higher hydrogen content than the first layer, and the fourth layer preferably has a region with a higher hydrogen content than the third layer.
  • one embodiment of the present invention is a method for manufacturing a semiconductor device, which includes forming a first conductive layer on a substrate, forming an insulating film on the first conductive layer, forming a conductive film on the insulating film, and processing the insulating film and conductive film to form a first insulating layer having a first opening that reaches the first conductive layer and a second conductive layer having a second opening that overlaps with the first opening, forming a metal oxide layer on the first conductive layer, the second conductive layer, and the first insulating layer, forming a second insulating layer on the metal oxide layer, supplying a first element to the metal oxide layer through the second insulating layer, and forming a third conductive layer on the second insulating layer, the first element being boron or phosphorus.
  • the step of supplying the first element it is preferable to use a plasma ion doping method or an ion implantation method.
  • the step of supplying the first element it is preferable not to perform mass separation.
  • the first element is preferably supplied from a direction perpendicular or approximately perpendicular to the upper surface of the substrate.
  • One embodiment of the present invention can provide a transistor with a small size. Or a transistor with a small channel length can be provided. Or a transistor with a large on-state current can be provided. Or a transistor with good electrical characteristics can be provided. Or a semiconductor device with a small occupation area can be provided. Or a semiconductor device with low wiring resistance can be provided. Or a semiconductor device or display device with low power consumption can be provided. Or a highly reliable transistor, semiconductor device, or display device can be provided. Or a display device that can be easily made high-definition can be provided. Or a method for manufacturing a semiconductor device or display device with high productivity can be provided. Or a novel transistor, semiconductor device, display device, and a manufacturing method thereof can be provided.
  • FIG. 1A is a top view illustrating an example of a semiconductor device
  • Fig. 1B and Fig. 1C are cross-sectional views illustrating the example of the semiconductor device.
  • FIG. 2 is a perspective view showing an example of a semiconductor device.
  • 3A and 3B are a top view and a cross-sectional view illustrating an example of a semiconductor device.
  • 4A and 4B are cross-sectional views showing an example of a semiconductor device.
  • 5A and 5B are cross-sectional views showing an example of a semiconductor device.
  • 6A to 6C are cross-sectional views showing an example of a semiconductor device.
  • 7A to 7C are cross-sectional views showing an example of a semiconductor device.
  • FIG. 8A is a top view illustrating an example of a semiconductor device
  • Figs. 8B and 8C are cross-sectional views illustrating the example of the semiconductor device
  • Fig. 9A is a top view illustrating an example of a semiconductor device
  • Figs. 9B and 9C are cross-sectional views illustrating the example of the semiconductor device.
  • 10A and 10B are cross-sectional views showing an example of a semiconductor device.
  • 11A to 11D are cross-sectional views showing an example of a method for manufacturing a semiconductor device.
  • 12A to 12C are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device.
  • 13A and 13B are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device.
  • 14A and 14B are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device.
  • 15A to 15I are circuit diagrams showing an example of a semiconductor device.
  • 16A and 16B are a top view and a cross-sectional view illustrating an example of a semiconductor device.
  • 17A and 17B are a top view and a cross-sectional view illustrating an example of a semiconductor device.
  • 18A is a top view illustrating an example of a semiconductor device, and FIG 18B is a cross-sectional view illustrating the example of the semiconductor device.
  • 19A is a top view illustrating an example of a semiconductor device, and FIG 19B is a cross-sectional view illustrating the example of the semiconductor device.
  • FIG. 20 is a perspective view showing an example of a display device.
  • 21A and 21B are cross-sectional views showing an example of a display device.
  • FIG. 22 is a cross-sectional view showing an example of a display device.
  • 23A to 23C are cross-sectional views showing an example of a display device.
  • 24A and 24B are cross-sectional views showing an example of a display device.
  • FIG. 25 is a cross-sectional view showing an example of a display device.
  • 26A to 26F are diagrams showing an example of an electronic device.
  • 27A to 27G are diagrams showing an example of an electronic device.
  • 28A to 28H are diagrams showing an example of an electronic device.
  • 29A to 29E are cross-sectional views for explaining a method for fabricating a sample according to the first embodiment.
  • 30A is a graph showing the sheet resistance and the contact resistance of the sample of Example 1.
  • 31A is a graph showing the sheet resistance and the contact resistance of the sample of Example 1.
  • 32A is a graph showing the sheet resistance and contact resistance of the sample of Example 1.
  • 33A and 33B are graphs showing the Id-Vg characteristics of the transistor of Example 2.
  • FIG. 34 is a graph showing the on-state current of the transistor of Example 2.
  • ordinal numbers “first” and “second” are used for convenience and do not limit the number of components or the order of the components (e.g., the order of processes or the order of stacking).
  • an ordinal number attached to a component in one part of this specification may not match an ordinal number attached to the same component in another part of this specification or in the claims.
  • film and “layer” can be interchanged depending on the circumstances.
  • conductive layer can be changed to the term “conductive film.”
  • insulating film can be changed to the term “insulating layer.”
  • a transistor is a type of semiconductor element that can perform functions such as amplifying current or voltage and switching to control conduction or non-conduction.
  • transistor includes an IGFET (Insulated Gate Field Effect Transistor) and a thin film transistor (TFT).
  • a transistor using an oxide semiconductor or a metal oxide in a semiconductor layer and a transistor having an oxide semiconductor or a metal oxide in a channel formation region may be referred to as an OS transistor.
  • a transistor having silicon in a channel formation region may be referred to as a Si transistor.
  • a transistor is an element having at least three terminals including a gate, a drain, and a source.
  • a transistor has a region (also called a channel formation region) in which a channel is formed between the drain (drain terminal, drain region, or drain electrode) and the source (source terminal, source region, or source electrode), and a current can flow between the source and drain through the channel formation region.
  • a channel formation region refers to a region through which a current mainly flows.
  • source and drain may be interchanged when transistors of different polarity are used, or when the direction of current changes during circuit operation. For this reason, in this specification, the terms “source” and “drain” can be used interchangeably.
  • the impurity of a semiconductor refers to, for example, a substance other than the main component constituting the semiconductor.
  • an element with a concentration of less than 0.1 atomic % can be considered as an impurity.
  • the defect state density of the semiconductor may increase or the crystallinity may decrease.
  • the inclusion of an impurity may cause oxygen vacancies (also referred to as V O ) to be formed in an oxide semiconductor. Note that the following embodiments can also be referred to for specific examples of impurities.
  • an oxynitride refers to a material whose composition contains more oxygen than nitrogen.
  • An oxynitride refers to a material whose composition contains more nitrogen than oxygen.
  • SIMS secondary ion mass spectrometry
  • XPS X-ray photoelectron spectroscopy
  • SIMS is suitable when the content of the target element is high (e.g., 0.5 atomic% or more, or 1 atomic% or more).
  • SIMS is suitable when the content of the target element is low (e.g., 0.5 atomic% or less, or 1 atomic% or less).
  • parallel refers to a state in which two straight lines are arranged at an angle of -10 degrees or more and 10 degrees or less. Therefore, it also includes cases where the angle is -5 degrees or more and 5 degrees or less.
  • approximately parallel refers to a state in which two straight lines are arranged at an angle of -30 degrees or more and 30 degrees or less.
  • Perfect refers to a state in which two straight lines are arranged at an angle of 80 degrees or more and 100 degrees or less. Therefore, it also includes cases where the angle is 85 degrees or more and 95 degrees or less.
  • approximately perpendicular refers to a state in which two straight lines are arranged at an angle of 60 degrees or more and 120 degrees or less.
  • electrically connected includes cases where the connection is made via "something that has some kind of electrical action.”
  • something that has some kind of electrical action is not particularly limited as long as it allows the transmission and reception of electrical signals between the connected objects.
  • something that has some kind of electrical action includes electrodes or wiring, as well as switching elements such as transistors, resistive elements, coils, and other elements with various functions.
  • the off-state current refers to a leakage current between the source and drain when a transistor is in an off state (also referred to as a non-conducting state or a cut-off state).
  • the off-state refers to a state in which the voltage Vgs between the gate and source of an n-channel transistor is lower than the threshold voltage Vth (higher than Vth for a p-channel transistor).
  • normally on refers to a state in which a channel exists and current flows through the transistor even when no voltage is applied to the gate.
  • Normally off refers to a state in which no current flows through the transistor when no potential is applied to the gate or when a ground potential is applied to the gate.
  • the top surface shape of a certain component refers to the contour shape of the component in a planar view.
  • a planar view refers to a view from the normal direction of the surface on which the component is formed or the surface of the support (e.g., substrate) on which the component is formed.
  • top surface shapes roughly match means that at least a portion of the contours of the stacked layers overlap. For example, this includes cases where the upper and lower layers are processed using the same mask pattern, or where a portion of the mask pattern is the same. However, strictly speaking, the contours may not overlap, and the upper layer may be located inside the lower layer, or outside the lower layer, in which case it may also be said that "top surface shapes roughly match.” Furthermore, when the top surface shapes match or roughly match, it can also be said that the edges are aligned or roughly matched, or that the side edges are aligned or roughly matched.
  • a tapered shape refers to a shape in which at least a part of the side of the structure is inclined with respect to the substrate surface or the surface to be formed.
  • the side of the structure, the substrate surface, and the surface to be formed do not necessarily need to be completely flat, and may be approximately planar with a slight curvature, or approximately planar with fine irregularities.
  • A covers B
  • at least a part of A covers B. Therefore, for example, it can be rephrased as saying that A has an area that covers B.
  • a device fabricated using a metal mask or an FMM may be referred to as a device with an MM (metal mask) structure.
  • a device fabricated without using a metal mask or an FMM may be referred to as a device with an MML (metal maskless) structure.
  • SBS Side By Side
  • the SBS structure allows the materials and configuration to be optimized for each light-emitting element, which increases the freedom of material and configuration selection and makes it easier to improve brightness and reliability.
  • holes or electrons may be referred to as "carriers".
  • the hole injection layer or electron injection layer may be referred to as the "carrier injection layer”
  • the hole transport layer or electron transport layer may be referred to as the “carrier transport layer”
  • the hole block layer or electron block layer may be referred to as the "carrier block layer”.
  • the above-mentioned carrier injection layer, carrier transport layer, and carrier block layer may not be clearly distinguishable.
  • one layer may have two or three functions among the carrier injection layer, carrier transport layer, and carrier block layer.
  • the light-emitting element has an EL layer between a pair of electrodes.
  • the EL layer has at least a light-emitting layer.
  • the layers (also called functional layers) that the EL layer has include a light-emitting layer, a carrier injection layer (a hole injection layer and an electron injection layer), a carrier transport layer (a hole transport layer and an electron transport layer), and a carrier block layer (a hole block layer and an electron block layer).
  • the light-receiving element also called a light-receiving device
  • one of the pair of electrodes may be referred to as a pixel electrode, and the other as a common electrode.
  • the sacrificial layer (which may also be referred to as a mask layer) is located at least above the light-emitting layer (more specifically, the layer that is processed into an island shape among the layers that make up the EL layer) and has the function of protecting the light-emitting layer during the manufacturing process.
  • step discontinuity refers to the phenomenon in which a layer, film, or electrode is divided due to the shape of the surface on which it is formed (e.g., a step, etc.).
  • a semiconductor device has a semiconductor layer, a first conductive layer, a second conductive layer, a third conductive layer, a first insulating layer, and a second insulating layer.
  • the first conductive layer functions as one of the source and drain electrodes of the transistor
  • the second conductive layer functions as the other of the source and drain electrodes of the transistor
  • the third conductive layer functions as the gate electrode of the transistor
  • the second insulating layer functions as the gate insulating layer of the transistor.
  • the first insulating layer is located on the first conductive layer
  • the second conductive layer is located on the first insulating layer.
  • the semiconductor layer contacts the top surface of the first conductive layer, the top surface and side surface of the second conductive layer, and the side surface of the first insulating layer.
  • the second insulating layer is located on the semiconductor layer.
  • the third conductive layer is located on the second insulating layer and overlaps the semiconductor layer via the second insulating layer.
  • the semiconductor layer has a first region in contact with the upper surface of the first conductive layer and a second region in contact with the upper surface of the second conductive layer.
  • One of the first region and the second region functions as a source region, and the other functions as a drain region.
  • the first region and the second region have an impurity element. It is preferable to use the first element as the impurity element. Alternatively, it is preferable to use both the first element and hydrogen as the impurity element.
  • the first element it is preferable to use one or more of boron, aluminum, indium, carbon, silicon, germanium, tin, phosphorus, arsenic, antimony, magnesium, calcium, titanium, copper, zinc, tungsten, molybdenum, tantalum, hafnium, cerium, and noble gases (helium, neon, argon, krypton, xenon, etc.).
  • the first element is not limited to the above elements, but may be one or more of the first transition elements (3d transition elements, 3d transition metals), second transition elements (4d transition elements, 4d transition metals), third transition elements (5d transition elements, 5d transition metals), alkaline earth metal elements, and elements contained in the rare earth elements.
  • the first element By supplying the first element to the first region and the second region (which can also be said to be adding the first element or injecting the first element), the first element removes oxygen from these regions, causing oxygen vacancies in these regions. The oxygen vacancies then bond with hydrogen in the film to generate carriers, thereby lowering the resistance of the first region and the second region.
  • the first element When an element that easily bonds with oxygen is used as the first element, the first element exists in a state bonded with oxygen in the semiconductor layer. When an element that bonds with oxygen to stabilize is used as the first element, the first element in the semiconductor layer exists stably in an oxidized state, and is unlikely to be desorbed by heat or the like during the manufacturing process of the semiconductor device, and a stable low-resistance region with low electrical resistance can be realized. For this reason, it is preferable to use an element whose oxide can exist as a solid in the standard state as the first element.
  • preferred first elements include typical nonmetallic elements other than hydrogen, typical metallic elements, and transition elements (transition metals), and examples of particularly preferred first elements include boron, phosphorus, magnesium, aluminum, and silicon.
  • boron, phosphorus, magnesium, aluminum, or silicon it is preferable to use boron, phosphorus, magnesium, aluminum, or silicon as one of the first elements.
  • boron or phosphorus it is preferable to use boron or phosphorus as one of the first elements.
  • hydrogen In addition to causing the oxygen vacancies mentioned above, hydrogen also has the ability to bond with oxygen vacancies, making it a suitable impurity element.
  • the first insulating layer may have a first opening that reaches the first conductive layer.
  • the second conductive layer may have a second opening that overlaps with the first opening.
  • a groove slit may be provided instead of the first opening and the second opening.
  • the source electrode and the drain electrode are located at different heights, and the current flowing through the semiconductor layer flows in the height direction.
  • the channel length direction has a component in the height direction (vertical direction), and therefore the transistor according to one embodiment of the present invention can also be called a VFET (Vertical Field Effect Transistor), vertical transistor, vertical channel transistor, vertical channel transistor, etc.
  • VFET Vertical Field Effect Transistor
  • the transistor can have a source electrode, a semiconductor layer, and a drain electrode that are stacked, so the area occupied can be significantly reduced compared to a so-called planar type transistor in which the semiconductor layer is arranged in a planar shape.
  • Transistor 100 1A and 3A show top views of the transistor 100.
  • Fig. 3A shows the diameter D143 of the opening 143 and the channel width W100 of the transistor 100, but differs from Fig. 1A in that the dashed dotted line B1-B2 is not shown. Insulating layers are omitted from Fig. 1A and 3A. Note that some components are also omitted from the other top views.
  • Figures 1B and 3B are cross-sectional views taken along dashed lines A1-A2 in Figures 1A and 3A.
  • Figure 3B can also be considered an enlarged view of Figure 1B.
  • Figure 1B shows openings 141 and 143
  • Figure 3B shows diameter D143, channel width W100, channel length L100 of transistor 100, thickness T110 of insulating layer 110c, angle ⁇ 110, and angle ⁇ 112. Details of these elements will be described later. Note that other elements are shown in common in Figures 1B and 3B.
  • Figure 1C is a cross-sectional view taken along dashed lines B1-B2 in Figure 1A.
  • Figure 2 shows a perspective view of the transistor 100.
  • the insulating layer is not shown.
  • the transistor 100 is provided over a substrate 102.
  • the transistor 100 includes a conductive layer 112a, an insulating layer 110 (insulating layers 110b, 110c, and 110d), a semiconductor layer 108, a conductive layer 112b, an insulating layer 106, and a conductive layer 104.
  • Each layer included in the transistor 100 may have a single-layer structure or a stacked-layer structure.
  • the insulating layer 110 does not necessarily have to be included as a component of the transistor 100. In other words, it can be said that the semiconductor device of one embodiment of the present invention includes the transistor 100 and the insulating layer 110.
  • the conductive layer 112a is provided on the substrate 102.
  • the conductive layer 112a functions as one of the source electrode and the drain electrode of the transistor 100.
  • the insulating layer 110 is located on the substrate 102 and the conductive layer 112a.
  • the insulating layer 110 is in contact with the conductive layer 112a.
  • the insulating layer 110 has an opening 141 that reaches the conductive layer 112a.
  • the insulating layer 110 has a laminated structure of an insulating layer 110b on the substrate 102 and the conductive layer 112a, an insulating layer 110c on the insulating layer 110b, and an insulating layer 110d on the insulating layer 110c.
  • the conductive layer 112b is located on the insulating layer 110.
  • the conductive layer 112b has an opening 143 that overlaps with the opening 141.
  • the conductive layer 112b functions as the other of the source electrode and the drain electrode of the transistor. It is preferable that the conductive layer 112b is not provided inside the opening 141. In other words, it is preferable that the conductive layer 112b does not have a region that is in contact with the side surface of the insulating layer 110 on the opening 141 side.
  • the semiconductor layer 108 is in contact with the top surface of the conductive layer 112a, the side surface of the insulating layer 110, and the top surface and side surface of the conductive layer 112b.
  • the semiconductor layer 108 is provided in contact with the end of the insulating layer 110 on the opening 141 side (also referred to as the side wall of the opening 141) and the end of the conductive layer 112b on the opening 143 side (also referred to as the side wall of the opening 143).
  • the semiconductor layer 108 is in contact with the conductive layer 112a through the openings 141 and 143.
  • the semiconductor layer 108 has a low-resistance region 108n in a portion thereof.
  • the low-resistance region 108n contains impurity elements.
  • the low-resistance region 108n has a higher concentration of impurity elements than other regions of the semiconductor layer 108 (such as the channel formation region) and has low electrical resistance.
  • the low-resistance region 108n in contact with the conductive layer 112a functions as one of the source region and the drain region
  • the low-resistance region 108n in contact with the conductive layer 112b functions as the other of the source region and the drain region.
  • the semiconductor layer 108 has a region between the source region and the drain region that functions as a channel formation region.
  • the low-resistance region 108n is formed in a region of the semiconductor layer 108 that is in contact with the upper surface of the conductive layer 112a and is located between the upper surface of the conductive layer 112a and the lower surface of the conductive layer 104.
  • the region in which the low-resistance region 108n is formed is not limited to this, and for example, the low-resistance region 108n may be formed in the entire region that is in contact with the upper surface of the conductive layer 112a.
  • the impurity element may diffuse in a direction parallel to the upper surface of the substrate 102 due to heat applied when the impurity element is supplied or in a process after the impurity element is supplied.
  • a low-resistance region 108n is formed in a region of the semiconductor layer 108 that contacts the top surface of the conductive layer 112b.
  • the low-resistance region 108n may also be provided in a region of the semiconductor layer 108 that contacts the side surface of the conductive layer 112b.
  • the low-resistance region 108n may also be provided in a part of a region of the semiconductor layer 108 that contacts the side surface of the insulating layer 110.
  • the first element is used as the impurity element.
  • the first element it is preferable to use one or more of boron, aluminum, indium, carbon, silicon, germanium, tin, phosphorus, arsenic, antimony, magnesium, calcium, titanium, copper, zinc, tungsten, molybdenum, tantalum, hafnium, cerium, and noble gases (helium, neon, argon, krypton, xenon, etc.).
  • the first element is not limited to the above elements, but may be one or more of the first transition elements (3d transition elements, 3d transition metals), second transition elements (4d transition elements, 4d transition metals), third transition elements (5d transition elements, 5d transition metals), alkaline earth metal elements, and elements contained in the rare earth elements.
  • the first element By supplying the first element to the source region and the drain region (it can also be said that the first element is added or the first element is injected), the first element takes away oxygen in the source region and the drain region, and oxygen vacancies occur in the source region and the drain region. Then, the oxygen vacancies combine with hydrogen in the semiconductor layer 108 to generate carriers, so that the resistance of the source region and the drain region can be reduced.
  • This can reduce the sheet resistance of the semiconductor layer 108, the contact resistance between the semiconductor layer 108 and the conductive layer 112a, and the contact resistance between the semiconductor layer 108 and the conductive layer 112b. Therefore, the on-current of the transistor 100 can be increased. By increasing the on-current, the operating voltage of the transistor 100 can be reduced. This can reduce the power consumption of the semiconductor device.
  • the first element When an element that easily bonds with oxygen is used as the first element, the first element exists in a state bonded to oxygen in the semiconductor layer 108. When an element that bonds with oxygen to stabilize is used as the first element, the first element in the semiconductor layer 108 exists stably in an oxidized state, and is unlikely to be desorbed by heat or the like during the manufacturing process of the transistor 100, and a stable low-resistance region with low electrical resistance can be realized. For this reason, it is preferable to use an element whose oxide can exist as a solid in the standard state as the first element.
  • preferred first elements include typical nonmetallic elements other than hydrogen, typical metallic elements, and transition elements (transition metals), and examples of particularly preferred first elements include boron, phosphorus, magnesium, aluminum, and silicon.
  • boron, phosphorus, magnesium, aluminum, or silicon it is preferable to use boron, phosphorus, magnesium, aluminum, or silicon as one of the first elements.
  • boron or phosphorus it is preferable to use boron or phosphorus as one of the first elements.
  • hydrogen In addition to causing the oxygen vacancies mentioned above, hydrogen also has the ability to bond with oxygen vacancies, making it a suitable impurity element.
  • the ions generated from the raw material gas can be added without mass separation, which is preferable because it can increase productivity.
  • B 2 H 6 gas boron and hydrogen can be supplied as impurity elements.
  • PH 3 gas phosphorus and hydrogen can be supplied as impurity elements.
  • the method of supplying the impurity element is not limited to this.
  • ions generated from the raw material gas may be mass separated and a specific element may be added.
  • boron may be added to the low resistance region 108n after mass separation using B 2 H 6 gas.
  • the low-resistance region 108n preferably includes a region having an impurity element concentration of 1 ⁇ 10 19 atoms/cm 3 or more and 1 ⁇ 10 23 atoms/cm 3 or less, preferably 5 ⁇ 10 19 atoms/cm 3 or more and 5 ⁇ 10 22 atoms/cm 3 or less, more preferably 1 ⁇ 10 20 atoms/cm 3 or more and 1 ⁇ 10 22 atoms/cm 3 or less.
  • the concentration of each of the impurity elements is preferably in the above range.
  • impurity elements may also be supplied to the channel formation region in the semiconductor layer 108.
  • some of the impurity elements contained in the low-resistance region 108n may diffuse into the channel formation region due to the influence of heat during the manufacturing process.
  • the concentration of the impurity elements in the channel formation region is preferably 1/10 or less, and more preferably 1/100 or less, of the concentration of the impurity elements in the low-resistance region 108n.
  • the concentration of impurity elements contained in the semiconductor layer 108 (including the low resistance region 108n) and the insulating layer 106 can be analyzed by, for example, secondary ion mass spectrometry (SIMS) or X-ray photoelectron spectroscopy (XPS).
  • SIMS secondary ion mass spectrometry
  • XPS X-ray photoelectron spectroscopy
  • concentration distribution in the depth direction can be known by combining ion sputtering from the front or back side with XPS analysis.
  • the source and drain regions of the semiconductor layer 108 are more easily doped with impurity elements than the channel formation region. Therefore, it is preferable that the impurity element is doped from a direction perpendicular or approximately perpendicular to the top surface of the substrate 102. In this case, the amount of the impurity element doped is smaller in the surface of the semiconductor layer 108 that is inclined with respect to the top surface of the substrate 102 than in the surface that is parallel or approximately parallel to the top surface of the substrate 102. In other words, the amount of the impurity element doped is larger in the source and drain regions of the semiconductor layer 108 than in the channel formation region. Therefore, the resistance of the source and drain regions can be preferentially reduced.
  • the thickness of the insulating layer 106 in the direction in which the impurity element is added is thicker in the region provided along the side surface of the insulating layer 110 than in the region provided along the top surface of the conductive layer 112a or the top surface of the conductive layer 112b.
  • the thickness T2 is larger than the thickness T1 shown in FIG. 3B.
  • the thickness T1 is an example of the thickness of the region provided along the top surface of the conductive layer 112a in the insulating layer 106 in the direction in which the impurity element is added.
  • the thickness T2 is an example of the thickness of the region provided along the side surface of the insulating layer 110 in the insulating layer 106 in the direction in which the impurity element is added.
  • the amount of the impurity element added is larger in the region provided along the top surface of the conductive layer 112a or the top surface of the conductive layer 112b in the semiconductor layer 108 than in the region provided along the side surface of the insulating layer 110. In this way, impurity elements can be prevented from entering the channel formation region of the semiconductor layer 108, and the resistance of the source and drain regions can be preferentially reduced.
  • the thickness of the insulating layer 106 is preferably 1 nm or more and 200 nm or less, more preferably 1 nm or more and 150 nm or less, and more preferably 1 nm or more and 100 nm or less.
  • the thickness of the insulating layer 106 is preferably 30 nm or more and 100 nm or less.
  • the thickness of the insulating layer 106 is preferably 1 nm or more and 50 nm or less. Also, for example, when the channel length is 1 nm or more and 10 nm or less, the thickness of the insulating layer 106 is preferably 1 nm or more and 10 nm or less.
  • thickness T1 is small from the standpoint of improving the on-current and suppressing the short channel effect.
  • the insulating layer 106 may also contain the impurity element. It is preferable that the low-resistance region 108n has a portion having a higher concentration of the impurity element than the insulating layer 106, because this can reduce the electrical resistance of the low-resistance region 108n.
  • the insulating layer 106 preferably has an insulating layer containing oxygen.
  • the impurity element exists in a state of being bonded with oxygen in the insulating layer 106 as in the semiconductor layer 108.
  • the region containing the impurity element is in a state where oxygen is hardly desorbed even when heated, and the oxygen is unlikely to diffuse to other layers. This makes it possible to supply oxygen to the channel formation region while suppressing the supply of oxygen from the insulating layer 106 to the low resistance region 108n. Therefore, it is possible to reduce oxygen vacancies in the channel formation region while preventing the low resistance region 108n from becoming high-resistance. As a result, a transistor with good electrical characteristics and high reliability can be realized.
  • the boron contained in the low resistance region 108n and the insulating layer 106 may exist in a state of being bonded to oxygen. This can be confirmed by observing a spectrum peak due to a B2O3 bond in an XPS analysis. In addition, in an XPS analysis, a spectrum peak due to the state in which the boron element exists alone is not observed, or the peak intensity becomes so small that it is buried in the background noise at the lower limit of measurement.
  • FIG. 1B an example is shown in which the end of the semiconductor layer 108 is in contact with the upper surface of the conductive layer 112b, but the present invention is not limited to this.
  • the semiconductor layer 108 may cover the end of the conductive layer 112b, and the end of the semiconductor layer 108 may be in contact with the insulating layer 110 (see transistor 100G (FIG. 9B, etc.) described later).
  • the insulating layer 106 is located on the insulating layer 110, the semiconductor layer 108, and the conductive layer 112b.
  • the insulating layer 106 is provided along the sidewalls of the opening 141 and the sidewalls of the opening 143 via the semiconductor layer 108.
  • the insulating layer 106 functions as a gate insulating layer (also referred to as a first gate insulating layer).
  • the conductive layer 104 is located on the insulating layer 106.
  • the conductive layer 104 overlaps with the semiconductor layer 108 through the insulating layer 106 inside the openings 141 and 143.
  • the conductive layer 104 functions as a gate electrode (also called a first gate electrode) of the transistor.
  • the conductive layer 112a, the conductive layer 112b, and the conductive layer 104 can each function as wiring, and the transistor 100 can be provided in a region where these wirings overlap. That is, in a circuit having the transistor 100 and wiring, the area occupied by the transistor 100 and the wiring can be reduced. Therefore, the area occupied by the circuit can be reduced, and a small-sized semiconductor device can be obtained.
  • the semiconductor device of one embodiment of the present invention when the semiconductor device of one embodiment of the present invention is applied to a pixel circuit of a display device, the area occupied by the pixel circuit can be reduced, and a high-definition display device can be obtained.
  • the semiconductor device of one embodiment of the present invention when the semiconductor device of one embodiment of the present invention is applied to a driver circuit of a display device (e.g., one or both of a gate line driver circuit and a source line driver circuit), the area occupied by the driver circuit can be reduced, and a display device with a narrow frame can be obtained.
  • the channel length and channel width of transistor 100 are explained using Figures 3A and 3B.
  • the channel length L100 of the transistor 100 is indicated by a dashed double-headed arrow.
  • the channel length L100 can be considered to be the shortest distance between the portion of the semiconductor layer 108 that contacts the insulating layer 110b and the portion that contacts the insulating layer 110d in a cross-sectional view.
  • the channel length L100 of the transistor 100 corresponds to the length of the side of the insulating layer 110c on the opening 141 side in a cross-sectional view.
  • the channel length L100 is determined by the thickness T110 of the insulating layer 110c and the angle ⁇ 110 between the side of the insulating layer 110c on the opening 141 side and the surface on which the insulating layer 110c is to be formed (here, the upper surface of the insulating layer 110b). Therefore, for example, the channel length L100 can be set to a value smaller than the limit resolution of the exposure device, and a transistor of a fine size can be realized.
  • a transistor with an extremely small channel length that could not be realized with a conventional exposure device for mass production of flat panel displays (for example, a minimum line width of about 2 ⁇ m or 1.5 ⁇ m).
  • a transistor with a channel length of less than 10 nm without using an extremely expensive exposure device used in cutting-edge LSI technology.
  • the channel length L100 can be, for example, 5 nm or more, 7 nm or more, or 10 nm or more, and less than 3 ⁇ m, 2.5 ⁇ m or less, 2 ⁇ m or less, 1.5 ⁇ m or less, 1.2 ⁇ m or less, 1 ⁇ m or less, 500 nm or less, 300 nm or less, 200 nm or less, 100 nm or less, 50 nm or less, 30 nm or less, or 20 nm or less.
  • the channel length L100 is preferably 10 nm or more and 1 ⁇ m or less, more preferably 10 nm or more and 500 nm or less, more preferably 10 nm or more and 100 nm or less, and more preferably 10 nm or more and 50 nm or less.
  • the on-state current of the transistor 100 can be increased.
  • the transistor 100 By using the transistor 100, a circuit capable of high-speed operation can be manufactured. Furthermore, the area occupied by the circuit can be reduced. Therefore, a small-sized semiconductor device can be obtained. For example, when the semiconductor device of one embodiment of the present invention is applied to a large display device or a high-definition display device, even if the number of wirings is increased, signal delay in each wiring can be reduced and display unevenness can be suppressed. Furthermore, since the area occupied by the circuit can be reduced, the frame of the display device can be narrowed.
  • the channel length L100 can be controlled by adjusting the thickness T110 and angle ⁇ 110 of the insulating layer 110c. Note that in FIG. 3B, the thickness T110 of the insulating layer 110c is indicated by a double-headed arrow of a dashed line.
  • the thickness T110 of the insulating layer 110c can be, for example, 10 nm or more, 50 nm or more, 100 nm or more, 150 nm or more, 200 nm or more, 300 nm or more, 400 nm or more, or 500 nm or more, and less than 3.0 ⁇ m, 2.5 ⁇ m or less, 2.0 ⁇ m or less, 1.5 ⁇ m or less, 1.2 ⁇ m or less, or 1.0 ⁇ m or less.
  • the thickness T110 of the insulating layer 110c can be, for example, 5 nm or more, 7 nm or more, or 10 nm or more, and 1 ⁇ m or less, 500 nm or less, 300 nm or less, 200 nm or less, 100 nm or less, 50 nm or less, 30 nm or less, or 20 nm or less.
  • the source region and the drain region of the semiconductor layer 108 are more easily doped with impurity elements than the channel formation region.
  • the thickness T110 is small.
  • the thickness T110 of the insulating layer 110c is preferably 10 nm or more and 1 ⁇ m or less, more preferably 10 nm or more and 500 nm or less, more preferably 10 nm or more and 300 nm or less, more preferably 10 nm or more and 100 nm or less, and more preferably 10 nm or more and 50 nm or less.
  • the side of the insulating layer 110c on the opening 141 side is preferably vertical or tapered.
  • the angle ⁇ 110 between the side of the insulating layer 110c on the opening 141 side and the surface on which the insulating layer 110c is to be formed is preferably 90 degrees or less.
  • the coverage of the layer (e.g., the semiconductor layer 108) provided on the insulating layer 110c can be improved.
  • Figures 1B, 1C, and 3B show an example in which the side of the insulating layer 110c on the opening 141 side is tapered (angle ⁇ 110 is less than 90 degrees).
  • Figure 4A shows an example in which the side of the insulating layer 110c on the opening 141 side is vertical (angle ⁇ 110 is 90 degrees).
  • FIG. 3B shows an example in which the angle ⁇ 110 is equal to the angle ⁇ 112 between the side surface of the conductive layer 112b on the opening 143 side and the surface on which the conductive layer 112b is to be formed (here, the upper surface of the insulating layer 110).
  • FIG. 4B shows an example in which the angle ⁇ 110 and the angle ⁇ 112 are different from each other.
  • the angle ⁇ 112 is smaller than the angle ⁇ 110.
  • the step of the surface on which the layer (e.g., the semiconductor layer 108) formed on the conductive layer 112b and the insulating layer 110 is formed is reduced, and the coverage of the layer can be improved. This makes it possible to suppress defects such as step discontinuities or voids in the layer.
  • the angle ⁇ 110 and the angle ⁇ 112 can be made different by using different methods to form the opening 141 and the opening 143.
  • the angle ⁇ 112 can be made smaller than the angle ⁇ 110 by using a wet etching method to form the opening 143 and a dry etching method to form the opening 141.
  • Angle ⁇ 110 and angle ⁇ 112 can be, for example, 30 degrees or more, 35 degrees or more, 40 degrees or more, 45 degrees or more, 50 degrees or more, 55 degrees or more, 60 degrees or more, 65 degrees or more, 70 degrees or more, or 75 degrees or more, and 90 degrees or less, 85 degrees or less, or 80 degrees or less. Also, angle ⁇ 110 and angle ⁇ 112 may be 75 degrees or less, 70 degrees or less, 65 degrees or less, or 60 degrees or less.
  • the angle ⁇ 110 and the angle ⁇ 112 are 80 degrees or more and 90 degrees or less, it is preferable to form a film covering the insulating layer 110 using a film formation method with high coverage.
  • a film formation method with high coverage For example, it is preferable to form the conductive layer 104 by a chemical vapor deposition (CVD) method, and the insulating layer 106 and the semiconductor layer 108 by an atomic layer deposition (ALD) method. It is also preferable to form the conductive layer 104, the insulating layer 106, and the semiconductor layer 108 by an ALD method.
  • the angle ⁇ 110 and the angle ⁇ 112 are 60 degrees or more and 85 degrees or less, it is also possible to form a film covering the insulating layer 110 using a film formation method with higher productivity.
  • the source and drain regions of the semiconductor layer 108 are more easily doped with impurity elements than the channel formation region.
  • the angles ⁇ 110 and ⁇ 112 are preferably 65 degrees or more and 90 degrees or less, more preferably 70 degrees or more and 90 degrees or less, and even more preferably 75 degrees or more and 90 degrees or less.
  • the angle ⁇ 110 is set based on the insulating layer 110c, but it may be set based on the entire insulating layer 110.
  • the angle ⁇ 110 may be the angle between the side of the insulating layer 110 on the opening 141 side and the surface on which the insulating layer 110 is to be formed (here, the upper surface of the conductive layer 112a).
  • the channel length L100 can be said to be the shortest distance between the part of the semiconductor layer 108 that contacts the conductive layer 112a and the part that contacts the conductive layer 112b in a cross-sectional view.
  • the channel length L100 corresponds to the sum of the lengths of the side surfaces of the insulating layers 110b, 110c, and 110d on the opening 141 side in a cross-sectional view.
  • the diameter D143 of opening 143 is indicated by a double-headed arrow with a two-dot chain line.
  • Figure 3A shows an example in which the top surface shape of opening 141 and opening 143 is a circle with diameter D143.
  • the channel width W100 of transistor 100 matches the circumference of the circle.
  • channel width W100 is ⁇ x D143. In this way, when the top surface shape of opening 141 and opening 143 is circular, a transistor with a smaller channel width can be realized compared to other shapes.
  • the diameter of the opening 141 and the diameter of the opening 143 may differ from each other. Furthermore, the diameter of the opening 141 and the diameter of the opening 143 may each change in the depth direction.
  • the diameter of the opening may be, for example, the average value of the diameter at the highest point of the insulating layer 110 (or the insulating layer 110c) in a cross-sectional view, the diameter at the lowest point, and the diameter at the midpoint between these.
  • the diameter of the opening may be, for example, any of the diameters at the highest point of the insulating layer 110 (or the insulating layer 110c) in a cross-sectional view, the diameter at the lowest point, and the diameter at the midpoint between these.
  • the diameter D143 of the opening 143 is equal to or greater than the limit resolution of the exposure device.
  • the diameter D143 can be, for example, 20 nm or more, 50 nm or more, 100 nm or more, 200 nm or more, 300 nm or more, 400 nm or more, or 500 nm or more, and less than 5.0 ⁇ m, 4.5 ⁇ m or less, 4.0 ⁇ m or less, 3.5 ⁇ m or less, 3.0 ⁇ m or less, 2.5 ⁇ m or less, 2.0 ⁇ m or less, 1.5 ⁇ m or less, or 1.0 ⁇ m or less.
  • the upper surface shape of the opening 141 and the opening 143 is not limited, and each of them can be, for example, a circle, an ellipse, a triangle, a quadrangle (including a rectangle, a diamond, and a square), a pentagon, a star-shaped polygon, or a polygon with rounded corners.
  • the polygon may be either a concave polygon (a polygon with at least one interior angle exceeding 180 degrees) or a convex polygon (a polygon with all interior angles less than 180 degrees).
  • the upper surface shape of the opening 141 and the opening 143 is preferably a circle.
  • the top surface shape of the opening 141 refers to the shape of the top surface end of the insulating layer 110 on the opening 141 side.
  • the top surface shape of the opening 143 refers to the shape of the bottom surface end of the conductive layer 112b on the opening 143 side.
  • the top surface shapes of the openings 141 and 143 can be made to match or roughly match each other.
  • the bottom surface end of the conductive layer 112b on the opening 143 side matches or roughly matches the top surface end of the insulating layer 110 on the opening 141 side.
  • the bottom surface of the conductive layer 112b refers to the surface on the insulating layer 110 side.
  • the top surface of the insulating layer 110 refers to the surface on the conductive layer 112b side.
  • opening 141 and opening 143 do not have to match each other (see transistor 100F (FIG. 8B, etc.) described later). Furthermore, when opening 141 and opening 143 have a circular top surface shape, opening 141 and opening 143 may or may not be concentric.
  • the insulating layer 110 can have a single-layer structure or a stacked-layer structure, and preferably has a stacked-layer structure of three or more layers.
  • an inorganic insulating film for each layer constituting the insulating layer 110.
  • the inorganic insulating film include an oxide insulating film, a nitride insulating film, an oxynitride insulating film, and a nitride oxide insulating film.
  • oxide insulating film examples include a silicon oxide film, an aluminum oxide film, a magnesium oxide film, a gallium oxide film, a germanium oxide film, a yttrium oxide film, a zirconium oxide film, a lanthanum oxide film, a neodymium oxide film, a hafnium oxide film, a tantalum oxide film, a cerium oxide film, a gallium zinc oxide film, and a hafnium aluminate film.
  • nitride insulating film examples include a silicon nitride film and an aluminum nitride film.
  • Examples of the oxynitride insulating film include a silicon oxynitride film, an aluminum oxynitride film, a gallium oxynitride film, an yttrium oxynitride film, and a hafnium oxynitride film.
  • Examples of the nitride oxide insulating film include a silicon nitride oxide film and an aluminum nitride oxide film.
  • the insulating layer 110 has a portion in contact with the semiconductor layer 108.
  • an oxide semiconductor is used for the semiconductor layer 108
  • the channel formation region is a high-resistance region with a low carrier concentration. It can be said that the channel formation region is i-type (intrinsic) or substantially i-type.
  • the insulating layer 110c in contact with the channel formation region of the semiconductor layer 108 is preferably a layer containing oxygen.
  • the insulating layer 110c preferably has a region with a higher oxygen content than one or both of the insulating layer 110b and the insulating layer 110d.
  • the insulating layer 110c is preferably made of one or more of the oxide insulating film and the oxynitride insulating film described above. Specifically, the insulating layer 110c is preferably made of one or both of a silicon oxide film and a silicon oxynitride film. If the insulating layer 110c is a layer with a high oxygen content, it becomes easy to form an i-type region in the region of the semiconductor layer 108 that is in contact with the insulating layer 110c and in its vicinity.
  • the insulating layer 110c is preferably a film that releases oxygen when heated.
  • the insulating layer 110c releases oxygen due to heat applied during the manufacturing process of the transistor 100, and oxygen can be supplied to the semiconductor layer 108.
  • oxygen can be supplied to the semiconductor layer 108.
  • oxygen can be supplied to the insulating layer 110c by performing heat treatment in an atmosphere containing oxygen or plasma treatment in an atmosphere containing oxygen.
  • oxygen may be supplied by forming an oxide film on the upper surface of the insulating layer 110c by a sputtering method in an oxygen atmosphere. The oxide film may then be removed. Note that in Embodiment 2, an example is shown in which oxygen is supplied to the insulating layer 110c by performing nitrous oxide (N 2 O) plasma treatment and forming a metal oxide layer 149.
  • N 2 O nitrous oxide
  • the insulating layer 110c is preferably formed by a deposition method such as a sputtering method or a plasma enhanced chemical vapor deposition (PECVD) method.
  • a deposition method such as a sputtering method or a plasma enhanced chemical vapor deposition (PECVD) method.
  • PECVD plasma enhanced chemical vapor deposition
  • a film through which oxygen does not easily diffuse for each of the insulating layers 110b and 110d. This can prevent oxygen contained in the insulating layer 110c from permeating through the insulating layer 110b to the substrate 102 side due to heating, and from permeating through the insulating layer 110d to the conductive layer 112b and the insulating layer 106 side.
  • the oxygen contained in the insulating layer 110c can be trapped. This can effectively supply oxygen to the semiconductor layer 108.
  • a film through which hydrogen does not easily diffuse for each of the insulating layers 110b and 110d is preferable to use. This makes it possible to prevent hydrogen from diffusing from outside the transistor to the semiconductor layer 108 through the insulating layer 110b or the insulating layer 110d.
  • the insulating layer 110b and the insulating layer 110d it is preferable to use one or more of the above-mentioned oxide insulating film, nitride insulating film, oxynitride insulating film, and nitride oxide insulating film, and it is preferable to use one or more of the following: a silicon nitride film, a silicon nitride oxide film, a silicon oxynitride film, an aluminum oxide film, an aluminum oxynitride film, an aluminum nitride film, a hafnium oxide film, and a hafnium aluminate film.
  • nitride insulating film and nitride oxide insulating film for the insulating layer 110b and the insulating layer 110d, respectively.
  • silicon nitride film and a silicon nitride oxide film for the insulating layer 110b and the insulating layer 110d, respectively.
  • the silicon nitride film and the silicon oxynitride film each emit little impurities (e.g., water and hydrogen) from themselves, and can be made into a film that is difficult for oxygen and hydrogen to permeate, so they can be suitably used as the insulating layer 110b and the insulating layer 110d.
  • impurities e.g., water and hydrogen
  • Insulating layer 110b and insulating layer 110d may be formed of a film containing aluminum, for example.
  • insulating layer 110b and insulating layer 110d may be formed of a film containing aluminum, for example.
  • An aluminum oxide film is preferable because it can reduce the hydrogen content compared to a silicon nitride film.
  • the thicknesses of the insulating layers 110b and 110d are preferably 5 nm to 200 nm, more preferably 5 nm to 150 nm, more preferably 5 nm to 100 nm, even more preferably 10 nm to 70 nm, even more preferably 10 nm to 50 nm, and even more preferably 20 nm to 50 nm.
  • the thicknesses of the insulating layers 110b and 110d may be equal to or different from each other.
  • a silicon nitride film or a silicon oxynitride film for the insulating layer 110b and the insulating layer 110d it is preferable to use a silicon oxide film or a silicon oxynitride film for the insulating layer 110c.
  • the semiconductor layer 108 includes a metal oxide (also referred to as an oxide semiconductor) that exhibits semiconductor characteristics.
  • the crystallinity of the semiconductor material used for the semiconductor layer 108 is not particularly limited, and any of an amorphous semiconductor, a single crystal semiconductor, and a semiconductor having crystallinity other than single crystal (a microcrystalline semiconductor, a polycrystalline semiconductor, or a semiconductor having a crystalline region in part) may be used.
  • the use of a single crystal semiconductor or a semiconductor having crystallinity is preferable because it can suppress deterioration of the transistor characteristics.
  • the band gap of the metal oxide used in the semiconductor layer 108 is preferably 2.0 eV or more, and more preferably 2.5 eV or more.
  • metal oxides examples include indium oxide, gallium oxide, and zinc oxide.
  • the metal oxide preferably contains at least indium or zinc.
  • the metal oxide preferably contains two or three elements selected from indium, element M, and zinc.
  • the element M is a metal element or semimetal element having a high bond energy with oxygen, for example, a metal element or semimetal element having a higher bond energy with oxygen than indium.
  • element M examples include aluminum, gallium, tin, yttrium, titanium, vanadium, chromium, manganese, iron, cobalt, nickel, zirconium, molybdenum, hafnium, tantalum, tungsten, lanthanum, cerium, neodymium, magnesium, calcium, strontium, barium, boron, silicon, germanium, and antimony.
  • the element M of the metal oxide is preferably one or more of the above elements, more preferably one or more selected from aluminum, gallium, tin, and yttrium, and even more preferably gallium.
  • metal elements and metalloid elements may be collectively referred to as "metal elements", and the "metal element" described in this specification may include metalloid elements.
  • the semiconductor layer 108 may be, for example, indium zinc oxide (In-Zn oxide, also referred to as IZO (registered trademark)), indium tin oxide (In-Sn oxide), indium titanium oxide (In-Ti oxide), indium gallium oxide (In-Ga oxide), indium gallium aluminum oxide (In-Ga-Al oxide), indium gallium tin oxide (In-Ga-Sn oxide), gallium zinc oxide (Ga-Zn oxide, also referred to as GZO), aluminum zinc oxide (Al-Zn oxide, also referred to as AZO), indium aluminum zinc oxide, Indium tin zinc oxide (In-Al-Zn oxide, also written as IAZO), indium tin zinc oxide (In-Sn-Zn oxide, also written as ITZO (registered trademark)), indium titanium zinc oxide (In-Ti-Zn oxide), indium gallium zinc oxide (In-Ga-Zn oxide, also written as IGZO), indium gallium tin
  • the field effect mobility of the transistor can be increased.
  • a transistor with a large on-current can be realized.
  • the metal oxide may contain one or more metal elements having a high period number in the periodic table instead of or in addition to indium.
  • metal elements having a high period number include metal elements belonging to the fifth period and metal elements belonging to the sixth period.
  • Specific examples of the metal elements include yttrium, zirconium, silver, cadmium, tin, antimony, barium, lead, bismuth, lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium. Note that lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium are called light rare earth elements.
  • the metal oxide may also contain one or more nonmetallic elements.
  • the carrier concentration may increase or the band gap may be narrowed, which may increase the field effect mobility of the transistor.
  • the metal oxide becomes highly crystalline, and the diffusion of impurities in the metal oxide can be suppressed. Therefore, fluctuations in the electrical characteristics of the transistor can be suppressed, and reliability can be improved.
  • the electrical characteristics and reliability of the transistor vary depending on the composition of the metal oxide applied to the semiconductor layer 108. Therefore, by varying the composition of the metal oxide according to the electrical characteristics and reliability required of the transistor, a semiconductor device that has both excellent electrical characteristics and high reliability can be obtained.
  • the metal oxide is an In-M-Zn oxide
  • the atomic ratio of In in the In-M-Zn oxide is equal to or greater than the atomic ratio of M.
  • the nearby composition includes a range of ⁇ 30% of the desired atomic ratio.
  • the atomic ratio of In in the In-M-Zn oxide may be less than the atomic ratio of M.
  • the total proportion of the atomic numbers of the metal elements can be regarded as the proportion of the atomic number of element M.
  • the ratio of the number of indium atoms to the sum of the numbers of atoms of all metal elements contained may be referred to as the indium content. The same applies to other metal elements.
  • the metal oxide can be formed by a sputtering method or an ALD method.
  • the composition of the metal oxide after film formation may differ from the composition of the target.
  • the zinc content in the metal oxide after film formation may decrease to about 50% compared to the target.
  • the semiconductor layer 108 may have a stacked structure having two or more metal oxide layers.
  • the two or more metal oxide layers in the semiconductor layer 108 may have the same or approximately the same composition.
  • the two or more metal oxide layers in the semiconductor layer 108 may have different compositions.
  • gallium, aluminum, or tin as the element M.
  • a stacked structure of any one selected from indium oxide, indium gallium oxide, and IGZO and any one selected from IAZO, IAGZO, and ITZO (registered trademark) can be used.
  • the semiconductor layer 108 preferably has a crystalline metal oxide layer.
  • the crystalline metal oxide structure include a CAAC (c-axis aligned crystal) structure, a polycrystalline structure, and a nano-crystalline (nc: nano-crystal) structure.
  • the semiconductor layer 108 may have a stacked structure of two or more metal oxide layers with different crystallinity.
  • the semiconductor layer 108 may have a stacked structure of a first metal oxide layer and a second metal oxide layer provided on the first metal oxide layer, and the second metal oxide layer may have a region with higher crystallinity than the first metal oxide layer.
  • the second metal oxide layer may have a region with lower crystallinity than the first metal oxide layer.
  • the first metal oxide layer and the second metal oxide layer may have different compositions, or may have the same or approximately the same composition.
  • the thickness of the semiconductor layer 108 is preferably 3 nm or more and 200 nm or less, more preferably 3 nm or more and 100 nm or less, more preferably 5 nm or more and 100 nm or less, more preferably 10 nm or more and 100 nm or less, more preferably 10 nm or more and 70 nm or less, more preferably 15 nm or more and 70 nm or less, more preferably 15 nm or more and 50 nm or less, and more preferably 20 nm or more and 50 nm or less.
  • oxygen vacancies may be formed in the oxide semiconductor.
  • VOH oxygen vacancies
  • some of the hydrogen may bond with oxygen bonded to a metal atom to generate an electron that is a carrier. Therefore, a transistor using an oxide semiconductor containing a large amount of hydrogen is likely to be normally on (that is, has a negative threshold voltage).
  • hydrogen in an oxide semiconductor is easily mobile due to stress such as heat or an electric field; therefore, if an oxide semiconductor contains a large amount of hydrogen, the reliability of the transistor may be deteriorated.
  • an oxide semiconductor When an oxide semiconductor is used for the semiconductor layer 108, it is preferable to reduce VOH in the semiconductor layer 108 as much as possible to make the semiconductor layer 108 highly pure intrinsic or substantially highly pure intrinsic.
  • it is important to remove impurities such as water and hydrogen from the oxide semiconductor (sometimes referred to as dehydration or dehydrogenation treatment) and to supply oxygen to the oxide semiconductor to repair oxygen vacancies.
  • impurities such as water and hydrogen from the oxide semiconductor
  • an oxide semiconductor with sufficiently reduced impurities such as VOH for a channel formation region of a transistor, stable electrical characteristics can be imparted.
  • oxygen addition treatment By supplying oxygen to an oxide semiconductor to repair oxygen vacancies may be referred to as oxygen addition treatment.
  • the carrier concentration of the oxide semiconductor in a region functioning as a channel formation region is preferably 1 ⁇ 10 18 cm -3 or less, more preferably less than 1 ⁇ 10 17 cm -3 , further preferably less than 1 ⁇ 10 16 cm -3 , further preferably less than 1 ⁇ 10 13 cm -3 , and further preferably less than 1 ⁇ 10 12 cm -3 .
  • the lower limit of the carrier concentration of the oxide semiconductor in the region functioning as a channel formation region is not particularly limited, and can be, for example, 1 ⁇ 10 -9 cm -3 .
  • OS transistors have extremely high field-effect mobility compared to transistors using amorphous silicon.
  • OS transistors have an extremely small off-state current and can hold charge accumulated in a capacitor connected in series with the transistor for a long period of time.
  • the use of OS transistors can reduce the power consumption of a semiconductor device.
  • OS transistors have small variations in electrical characteristics due to radiation exposure, i.e., are highly resistant to radiation, and therefore can be suitably used in environments where radiation may be incident. It can also be said that OS transistors have high reliability against radiation.
  • OS transistors can be suitably used in pixel circuits of X-ray flat panel detectors.
  • OS transistors can also be suitably used in semiconductor devices used in outer space.
  • radiation include electromagnetic radiation (e.g., X-rays and gamma rays) and particle radiation (e.g., alpha rays, beta rays, meson rays, proton rays, and neutron rays).
  • semiconductor materials that can be used for the semiconductor layer 108 include, for example, semiconductors made of single elements or compound semiconductors.
  • semiconductors made of single elements include silicon and germanium.
  • compound semiconductors include gallium arsenide and silicon germanium.
  • compound semiconductors include organic semiconductors and nitride semiconductors.
  • the aforementioned oxide semiconductor is also a type of compound semiconductor. These semiconductor materials may contain impurities as dopants.
  • Silicon that can be used for the semiconductor layer 108 includes single crystal silicon, polycrystalline silicon, microcrystalline silicon, and amorphous silicon.
  • An example of polycrystalline silicon is low temperature polysilicon (LTPS).
  • Transistors using amorphous silicon for the semiconductor layer 108 can be formed on large glass substrates and can be manufactured at low cost. Transistors using polycrystalline silicon for the semiconductor layer 108 have high field effect mobility and can operate at high speed. Transistors using microcrystalline silicon for the semiconductor layer 108 have higher field effect mobility and can operate at high speed than transistors using amorphous silicon.
  • the semiconductor layer 108 may have a layered material that functions as a semiconductor.
  • a layered material is a general term for a group of materials that have a layered crystal structure.
  • a layered crystal structure is a structure in which layers formed by covalent or ionic bonds are stacked via bonds weaker than covalent or ionic bonds, such as van der Waals bonds.
  • a layered material has high electrical conductivity within a unit layer, that is, high two-dimensional electrical conductivity.
  • Examples of the layered material include graphene, silicene, and chalcogenides.
  • Chalcogenides are compounds containing chalcogen (an element belonging to Group 16).
  • Examples of the chalcogenides include transition metal chalcogenides and Group 13 chalcogenides.
  • transition metal chalcogenides that can be used as the semiconductor layer of a transistor include molybdenum sulfide (representatively MoS 2 ), molybdenum selenide (representatively MoSe 2 ), molybdenum tellurium (representatively MoTe 2 ), tungsten sulfide (representatively WS 2 ), tungsten selenide (representatively WSe 2 ), tungsten tellurium (representatively WTe 2 ), hafnium sulfide (representatively HfS 2 ), hafnium selenide (representatively HfSe 2 ), zirconium sulfide (representatively ZrS 2 ), zirconium selenide (representatively ZrSe 2 ), and the like.
  • the conductive layer 112a and the conductive layer 112b can each have a single layer structure or a stacked structure of two or more layers.
  • Examples of materials that can be used for the conductive layer 112a and the conductive layer 112b include chromium and copper. , aluminum, gold, silver, zinc, tantalum, titanium, tungsten, manganese, nickel, iron, cobalt, molybdenum, and niobium, as well as alloys containing one or more of the aforementioned metals.
  • the layer 112a and the conductive layer 112b can be preferably made of a conductive material having low electrical resistivity, including one or more of copper, silver, gold, and aluminum. In particular, copper or aluminum is suitable for mass production. This is preferable because it has excellent
  • the conductive layer 112a and the conductive layer 112b can each be made of a metal oxide having electrical conductivity (also referred to as an oxide conductor).
  • oxide conductors include indium oxide, zinc oxide, In-Sn oxide (ITO), In-Zn oxide (also referred to as IZO (registered trademark)), In-W oxide, In-W-Zn oxide, In-Ti oxide, In-Ti-Sn oxide, In-Sn-Si oxide (also referred to as ITO containing silicon, ITSO), zinc oxide to which gallium is added, and In-Ga-Zn oxide.
  • ITO In-Sn oxide
  • IZO registered trademark
  • a metal oxide that has become a conductor can be called an oxide conductor.
  • the conductive layer 112a and the conductive layer 112b may each have a stacked structure of a conductive film containing the above-mentioned oxide conductor (metal oxide) and a conductive film containing a metal or an alloy.
  • a conductive film containing a metal or an alloy By using a conductive film containing a metal or an alloy, the wiring resistance can be reduced.
  • a Cu-X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti) may be applied to the conductive layer 112a and the conductive layer 112b.
  • X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti
  • a Cu-X alloy film it can be processed using a wet etching method, so that the manufacturing cost can be reduced.
  • the conductive layer 112a and the conductive layer 112b each have a region in contact with the semiconductor layer 108.
  • an oxide semiconductor is used for the semiconductor layer 108
  • a metal e.g., aluminum
  • an insulating oxide e.g., aluminum oxide
  • the conductive layer 112a or the conductive layer 112b has a stacked structure, it is preferable to use a conductive material that is not easily oxidized, a conductive material that maintains low electrical resistance even when oxidized, or an oxide conductor for at least the layer in contact with the semiconductor layer 108.
  • Various conductive materials can be used for the layer of the conductive layer 112a or the conductive layer 112b that is not in contact with the semiconductor layer 108, and it is preferable to use a material with high conductivity (which can also be referred to as a material with high conductivity or low resistivity). This allows the conductive layer 112a and the conductive layer 112b to be layers suitable as wiring.
  • Conductive materials that are difficult to oxidize, or that maintain low electrical resistance even when oxidized include, for example, titanium, tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel.
  • oxide conductors are as described above.
  • the conductive layer 112a and the conductive layer 112b may each be made of a nitride conductor.
  • nitride conductors include tantalum nitride and titanium nitride.
  • the conductive layer 112a and the conductive layer 112b may be made of the same material or different materials.
  • the conductive layers 112a and 112b are preferably made of a conductive material that is not easily oxidized, a conductive material that maintains low electrical resistance even when oxidized, or an oxide conductor in the layer in contact with the semiconductor layer 108, and preferably made of a material that is more conductive than the material used in the layer in contact with the semiconductor layer 108 in at least one of the other layers. This can prevent the contact resistance between the semiconductor layer 108 and the conductive layer 112a and the contact resistance between the semiconductor layer 108 and the conductive layer 112b from increasing. In addition, the wiring resistance of the conductive layers 112a and 112b can be reduced.
  • the configuration of the conductive layer 112a and the conductive layer 112b include a stacked structure of one or more metal films and one or more oxide conductor films, or a stacked structure having one or more metal films between a pair of oxide conductor films.
  • the one or more metal films include a single-layer structure of a tungsten film, a single-layer structure of a titanium film, a single-layer structure of a copper film, a two-layer structure of a titanium film and an aluminum film, and a three-layer structure of a titanium film, an aluminum film, and a titanium film.
  • the oxide conductor film include a single-layer structure of an In-Zn oxide film, a single-layer structure of an ITO film, and a single-layer structure of an ITSO film.
  • the conductive layer 104 can have a single layer structure or a laminated structure of two or more layers. Examples of materials that can be used for the conductive layer 104 include one or more of chromium, copper, aluminum, gold, silver, zinc, tantalum, titanium, tungsten, manganese, nickel, iron, cobalt, molybdenum, and niobium, as well as alloys containing one or more of the above-mentioned metals.
  • a conductive material with low electrical resistivity including one or more of copper, silver, gold, and aluminum, can be suitably used. In particular, copper or aluminum is preferable because of its excellent mass productivity.
  • the conductive layer 104 can be made of the oxide conductor described above.
  • the conductive layer 104 may have a stacked structure of a conductive film containing the oxide conductor (metal oxide) described above and a conductive film containing a metal or an alloy. By using a conductive film containing a metal or an alloy, the wiring resistance can be reduced.
  • the conductive layer 104 may be a Cu-X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti). By using a Cu-X alloy film, it can be processed using a wet etching method, so manufacturing costs can be reduced.
  • X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti.
  • a three-layer structure of a titanium film, an aluminum film, and a titanium film for the conductive layer 104 it is preferable to use a three-layer structure of a titanium film, an aluminum film, and a titanium film for the conductive layer 104. It is also preferable to use a two-layer structure of a titanium film and an aluminum film for the conductive layer 104. It is also preferable to use a two-layer structure of a titanium film or a molybdenum film, and a copper film for the conductive layer 104.
  • the conductive layer 112a, the conductive layer 112b, and the conductive layer 104 may all be made of the same material, or at least one of them may be made of a different material.
  • the insulating layer 106 can have a single-layer structure or a stacked structure of two or more layers.
  • the insulating layer 106 preferably has one or more inorganic insulating films.
  • the inorganic insulating film include an oxide insulating film, a nitride insulating film, an oxynitride insulating film, and a nitride oxide insulating film. Specific examples of these inorganic insulating films are as described above.
  • the insulating layer 106 has a portion in contact with the semiconductor layer 108.
  • an oxide semiconductor is used for the semiconductor layer 108
  • the insulating layer 106 has a single-layer structure, it is preferable to use a silicon oxide film or a silicon oxynitride film for the insulating layer 106.
  • the insulating layer 106 can have a stacked structure of an oxide insulating film or an oxynitride insulating film on the side in contact with the semiconductor layer 108, and a nitride insulating film or a nitride oxide insulating film on the side in contact with the conductive layer 104.
  • an oxide insulating film or the oxynitride insulating film for example, a silicon oxide film or a silicon oxynitride film is preferably used.
  • nitride insulating film or the nitride oxide insulating film a silicon nitride film or a silicon nitride oxide film is preferably used.
  • Silicon nitride films and silicon nitride oxide films have the characteristics of releasing little impurities (e.g., water and hydrogen) from themselves and being difficult for oxygen and hydrogen to permeate, so they can be suitably used as the insulating layer 106.
  • impurities e.g., water and hydrogen
  • the electrical characteristics of the transistor can be improved and the reliability can be increased.
  • the thickness of the gate insulating layer becomes thin, the leakage current may become large.
  • a material with a high relative dielectric constant also called a high-k material
  • high-k materials that can be used for the insulating layer 106 include gallium oxide, hafnium oxide, zirconium oxide, oxides having aluminum and hafnium, oxynitrides having aluminum and hafnium, oxides having silicon and hafnium, oxynitrides having silicon and hafnium, and nitrides having silicon and hafnium.
  • Substrate 102 There is no particular limitation on the material of the substrate 102, but the substrate 102 must have at least sufficient heat resistance to withstand subsequent heat treatment.
  • a single crystal semiconductor substrate made of silicon or silicon carbide, a polycrystalline semiconductor substrate, a compound semiconductor substrate such as silicon germanium, an SOI substrate, a glass substrate, a quartz substrate, a sapphire substrate, a ceramic substrate, or a resin substrate may be used as the substrate 102.
  • a semiconductor element may be provided on the substrate 102.
  • the shape of the semiconductor substrate and the insulating substrate may be circular or rectangular.
  • a flexible substrate may be used as the substrate 102, and the transistor 100 and the like may be formed directly on the flexible substrate.
  • a peeling layer may be provided between the substrate 102 and the transistor 100 and the like. The peeling layer can be used to separate the semiconductor device from the substrate 102 after a part or whole of the semiconductor device is completed thereon, and to transfer the semiconductor device to another substrate.
  • the transistor 100 and the like can also be transferred to a substrate with poor heat resistance or a flexible substrate.
  • Transistor 100A 5A and 5B are cross-sectional views of the transistor 100A. Note that since a top view of the transistor 100A is similar to that of the transistor 100, FIG. 1A can be referred to.
  • the insulating layer 110 has a three-layer structure, but in the transistor 100A, an example in which the insulating layer 110 has a five-layer structure is shown.
  • the insulating layer 110 shown in Figures 5A and 5B has a laminated structure of an insulating layer 110a on the substrate 102 and the conductive layer 112a, an insulating layer 110b on the insulating layer 110a, an insulating layer 110c on the insulating layer 110b, an insulating layer 110d on the insulating layer 110c, and an insulating layer 110e on the insulating layer 110d.
  • the semiconductor layer 108 has a region (offset region) where the gate electric field is not easily applied. It is preferable to provide the insulating layer 110a so that it is in contact with the offset region.
  • the insulating layer 110a has a region with a higher hydrogen content than the insulating layer 110b. In addition, it is preferable that the insulating layer 110a has a region with a higher hydrogen content than the insulating layer 110d.
  • the field effect mobility of the transistor may decrease. If the insulating layer 110a is a layer with a high hydrogen content, the resistance of the region in contact with the insulating layer 110a in the semiconductor layer 108 and its vicinity can be reduced. This makes it possible to suppress the decrease in field effect mobility caused by the offset region.
  • the insulating layer 110a is preferably a layer that releases hydrogen when heated.
  • the heat applied during the manufacturing process of the transistor 100A causes the insulating layer 110a to release hydrogen, thereby allowing hydrogen to be supplied to the semiconductor layer 108.
  • Supplying hydrogen to the offset region of the semiconductor layer 108 reduces the resistance of the offset region, thereby suppressing a decrease in field effect mobility.
  • insulating layer 110e has a region with a higher hydrogen content than insulating layer 110d. Also, insulating layer 110e preferably has a region with a higher hydrogen content than insulating layer 110b.
  • the insulating layer 110e is a layer with a high hydrogen content, the resistance of the region of the semiconductor layer 108 that contacts the insulating layer 110e and its vicinity can be reduced.
  • the insulating layer 110e is preferably a layer that releases hydrogen when heated.
  • the heat applied during the manufacturing process of the transistor 100A causes the insulating layer 110e to release hydrogen, thereby allowing hydrogen to be supplied to the semiconductor layer 108. This allows a low-resistance region to be formed near the region of the semiconductor layer 108 that contacts the conductive layer 112b.
  • a region in contact with the insulating layer 110a which is a low resistance region, is provided in the semiconductor layer 108 between a region in contact with the conductive layer 112a and a region in contact with the insulating layer 110c, which is an i-type region.
  • the semiconductor layer 108 has a low resistance region between the region in contact with the drain electrode and the channel formation region. This makes it difficult for a high electric field to be generated near the drain region, suppressing the generation of hot carriers and suppressing deterioration of the transistor.
  • a region in contact with the insulating layer 110e which is a low resistance region, is provided in the semiconductor layer 108 between a region in contact with the conductive layer 112b and a region in contact with the insulating layer 110c, which is an i-type region.
  • the semiconductor layer 108 has a low resistance region between the region in contact with the drain electrode and the channel formation region. This makes it difficult for a high electric field to be generated near the drain region, suppressing the generation of hot carriers and suppressing deterioration of the transistor.
  • the transistor of one embodiment of the present invention can have high reliability regardless of whether the conductive layer 112a or the conductive layer 112b serves as the drain electrode. Therefore, the degree of freedom in designing the semiconductor device can be increased.
  • the insulating layer 110b has a lower hydrogen content than the insulating layer 110a. Also, the insulating layer 110d has a lower hydrogen content than the insulating layer 110e. Therefore, it is possible to suppress the diffusion of hydrogen from the insulating layer 110b or the insulating layer 110d to the insulating layer 110c and to the region of the semiconductor layer 108 where the gate electric field is sufficiently applied (the region to be made i-type).
  • a film in which hydrogen does not easily diffuse for each of insulating layer 110b and insulating layer 110d is preferable to use. This makes it possible to suppress the diffusion of hydrogen from insulating layer 110a through insulating layer 110b to semiconductor layer 108. It is also possible to suppress the diffusion of hydrogen from insulating layer 110e through insulating layer 110d to semiconductor layer 108.
  • the insulating layer 110a and the insulating layer 110e it is preferable to use one or more of the above-mentioned oxide insulating film, nitride insulating film, oxynitride insulating film, and nitride oxide insulating film, and it is preferable to use one or more of the following: a silicon nitride film, a silicon nitride oxide film, a silicon oxynitride film, an aluminum oxide film, an aluminum oxynitride film, an aluminum nitride film, a hafnium oxide film, and a hafnium aluminate film.
  • nitride insulating film and nitride oxide insulating film for the insulating layer 110a and the insulating layer 110e, respectively.
  • silicon nitride film and a silicon nitride oxide film for the insulating layer 110a and the insulating layer 110e, respectively.
  • the silicon nitride film and the silicon nitride oxide film can be made to release a lot of hydrogen by changing the film formation conditions (e.g., the film formation gas or the power during film formation), so they can be suitably used as the insulating layer 110a and the insulating layer 110e.
  • the film formation conditions e.g., the film formation gas or the power during film formation
  • the region in contact with the insulating layer 110b preferably has a higher resistance than the region in contact with the insulating layer 110a and a lower resistance than the region in contact with the insulating layer 110c.
  • the region in contact with the insulating layer 110b can be called an n - type region or an n - region.
  • oxygen supplied from the insulating layer 110c may reach not only the region in contact with the insulating layer 110c but also the region in contact with the insulating layer 110b and its vicinity.
  • hydrogen supplied from the insulating layer 110a may reach not only the region in contact with the insulating layer 110a but also the region in contact with the insulating layer 110b and its vicinity.
  • the insulating layer 110a is not provided, the region in contact with the insulating layer 110b and its vicinity in the semiconductor layer 108 become relatively high resistance by supplying oxygen from the insulating layer 110c. If there is a high-resistance region between the channel formation region and the region in contact with the drain electrode in the semiconductor layer 108, the on-state current of the transistor may decrease.
  • the supply of hydrogen can suppress the increase in resistance of the region in contact with the insulating layer 110b and its vicinity in the semiconductor layer 108, and thus the decrease in the on-state current of the transistor can be suppressed, which is preferable.
  • a silicon nitride film or a silicon oxynitride film for the insulating layer 110a, the insulating layer 110b, the insulating layer 110d, and the insulating layer 110e it is preferable to use a silicon oxide film or a silicon oxynitride film for the insulating layer 110c.
  • a silicon nitride film or a silicon oxynitride film for the insulating layers 110a and 110e it is preferable to use a silicon nitride film or a silicon oxynitride film for the insulating layers 110a and 110e, an aluminum oxide film for the insulating layers 110b and 110d, and a silicon oxide film or a silicon oxynitride film for the insulating layer 110c.
  • the channel formation region in the semiconductor layer 108 can be disposed in a position where the gate electric field is sufficiently applied.
  • the resistance of the offset region in the semiconductor layer 108 can be reduced. Therefore, the decrease in the field effect mobility of the transistor 100 can be suppressed, and good electrical characteristics can be obtained.
  • a region in contact with the insulating layer 110 is provided between the region of the semiconductor layer 108 in contact with the conductive layer 112a and the region in contact with the conductive layer 112b.
  • the insulating layer 110 is configured such that the insulating layer 110c is sandwiched between the insulating layers 110b and 110d, which have a low hydrogen content, and the three-layer structure is sandwiched between the insulating layers 110a and 110e, which have a high hydrogen content.
  • the insulating layer 110 has a symmetrical structure with respect to a line perpendicular to the up-down direction (stacking direction). This allows the carrier concentration distribution in the channel length direction in the semiconductor layer 108 to be appropriate. This allows the transistor to have good electrical characteristics and high reliability.
  • the hydrogen content is low compared to the main components constituting the insulating layer (e.g., nitrogen and silicon in the case of a silicon nitride layer), it is preferable to compare the hydrogen content in insulating layers 110a, 110b, 110d, and 110e using SIMS analysis.
  • the insulating layers 110a and 110b are made of layers with the same main component (e.g., silicon nitride layers), they may be distinguishable by cross-sectional observation. For example, in a transmitted electron (TE) image of a scanning transmission electron microscope (STEM), the insulating layer 110a is observed to be brighter than the insulating layer 110b. Similarly, even if the insulating layers 110d and 110e are made of layers with the same main component, they may be distinguishable by cross-sectional observation. For example, in a TE image of a STEM, the insulating layer 110e is observed to be brighter than the insulating layer 110d.
  • TE transmitted electron
  • STEM scanning transmission electron microscope
  • each of the insulating layers 110a and 110e is preferably 10 nm or more and 200 nm or less, more preferably 20 nm or more and 150 nm or less, and even more preferably 30 nm or more and 100 nm or less.
  • the thicknesses of the insulating layers 110a and 110e may be the same or different from each other.
  • a region in contact with the insulating layer 110a and a region in contact with the insulating layer 110e function as low-resistance regions (also referred to as n + -type regions or n + -type regions), and a region in contact with the insulating layer 110c functions as a channel formation region.
  • a region in contact with the insulating layer 110b may have higher resistance than a region in contact with the insulating layer 110a and lower resistance than a region in contact with the insulating layer 110c.
  • a region in contact with the insulating layer 110d may have higher resistance than a region in contact with the insulating layer 110e and lower resistance than a region in contact with the insulating layer 110c.
  • the region in contact with the insulating layer 110b and the region in contact with the insulating layer 110d in the semiconductor layer 108 are described as not being included in the channel formation region, but these regions may be included in the channel formation region.
  • the region in contact with the insulating layer 110b and the region in contact with the insulating layer 110d in the semiconductor layer 108 can be called a low-resistance region. Note that the low-resistance region may function as a source region or a drain region.
  • the channel length of transistor 100A can be said to be the shortest distance between the part of semiconductor layer 108 that contacts insulating layer 110b and the part that contacts insulating layer 110d in a cross-sectional view.
  • the channel length can be said to be the shortest distance between the part of the semiconductor layer 108 that contacts the insulating layer 110a and the part that contacts the insulating layer 110e in a cross-sectional view.
  • the channel length corresponds to the sum of the lengths of the side surfaces of the insulating layers 110b, 110c, and 110d on the opening 141 side in a cross-sectional view.
  • Transistor 100B 6A and 6B are cross-sectional views of the transistor 100B. Note that since a top view of the transistor 100B is similar to the top view of the transistor 100, FIG. 1A can be referred to.
  • the transistor 100B shown in Figures 6A and 6B differs from the transistor 100A ( Figures 5A and 5B) in that the insulating layer 110 does not have the insulating layer 110a, but has an insulating layer 109 between the substrate 102 and the conductive layer 112a.
  • the insulating layer 109 of the transistor 100B can be formed of the same material as the insulating layer 110a of the transistor 100A and can have the same function.
  • Hydrogen released from the insulating layer 109 diffuses into the region of the conductive layer 112a that is in contact with the insulating layer 109.
  • the hydrogen that diffuses into the conductive layer 112a diffuses into the region of the semiconductor layer 108 that is in contact with the conductive layer 112a and its vicinity. This makes it possible to reduce the resistance of the region of the semiconductor layer 108 that is in contact with the conductive layer 112a and its vicinity. This makes it possible to increase the on-current of the transistor and realize a semiconductor device that can operate at high speed.
  • insulating layer 110b can prevent hydrogen released from insulating layer 109 from diffusing into insulating layer 110c and the channel formation region of semiconductor layer 108.
  • FIG. 6C shows a modified example of the transistor 100B shown in FIG. 6B.
  • FIG. 6B shows an example in which the insulating layer 109 is provided on the entire upper surface of the substrate 102, but the present invention is not limited to this, and the insulating layer 109 may be processed.
  • FIG. 6C shows an example in which the insulating layer 109 is provided in an island shape on the substrate 102.
  • the end of the insulating layer 109 may be aligned or approximately aligned with the end of the conductive layer 112a.
  • FIG. 6B shows an example in which the insulating layer 109 is provided on the entire upper surface of the substrate 102, but the present invention is not limited to this, and the insulating layer 109 may be processed.
  • FIG. 6C shows an example in which the insulating layer 109 is provided in an island shape on
  • the insulating layer 109 is in contact with the insulating layer 110b of the insulating layer 110.
  • the insulating layer 110b is a film through which hydrogen is unlikely to diffuse, so that it is possible to suppress diffusion of hydrogen from the insulating layer 109 through the insulating layer 110b to the insulating layer 110c and the channel formation region of the semiconductor layer 108.
  • Transistor 100C, Transistor 100D, Transistor 100E A transistor 100C illustrated in FIG. 7A, a transistor 100D illustrated in FIG. 7B, and a transistor 100E illustrated in FIG. 7C differ from the transistor 100 in that the conductive layers 112a and 112b each have a stacked structure.
  • the conductive layer 112a shown in FIG. 7A and FIG. 7B has a conductive layer 182a and a conductive layer 122a on the conductive layer 182a.
  • FIG. 7A shows an example in which the end of the conductive layer 182a and the end of the conductive layer 122a are aligned.
  • FIG. 7B shows an example in which the conductive layer 122a covers the upper surface and side surface of the conductive layer 182a. Since the conductive layer 122a is a layer in contact with the semiconductor layer 108, it is preferable to use the above-mentioned conductive material that is difficult to oxidize, a conductive material that maintains low electrical resistance even when oxidized, or an oxide conductor.
  • the conductive layer 112a shown in FIG. 7C includes a conductive layer 183a, a conductive layer 182a on the conductive layer 183a, and a conductive layer 122a on the conductive layer 182a.
  • the adhesiveness of the conductive layer 112a to the surface on which the conductive layer 112a is to be formed may be low, resulting in a low manufacturing yield of the semiconductor device. Therefore, by using a material for the conductive layer 183a that has higher adhesiveness to the surface on which the conductive layer 112a is to be formed than the conductive layer 182a, the manufacturing yield of the semiconductor device can be increased.
  • the thickness of the conductive layer 183a can be set to a thickness that has the effect of increasing the adhesiveness of the conductive layer 112a to the surface on which the conductive layer 112a is to be formed, and may be thinner than the thicknesses of the conductive layer 182a and the conductive layer 122a.
  • FIG. 7C shows an example in which the end of the conductive layer 183a and the end of the conductive layer 122a are aligned. By processing the conductive layer 183a and the conductive layer 122a with the same mask pattern, manufacturing costs can be reduced, which is preferable.
  • an oxide conductor film such as an ITSO film is preferably used as the conductive layer 183a.
  • the surface on which the conductive layer 112a is formed is a glass substrate or an oxide film
  • the use of an oxide conductor film can increase the adhesion between the conductive layer 112a and the surface on which the conductive layer 112a is formed, compared to a metal film such as a copper film.
  • the conductive layer 183a and the conductive layer 122a can be easily processed in the same process, which is preferable, as manufacturing costs can be reduced.
  • the conductive layer 112b shown in FIG. 7A to FIG. 7C includes a conductive layer 182b and a conductive layer 122b on the conductive layer 182b.
  • FIG. 7A shows an example in which the end of the conductive layer 182b is aligned with the end of the conductive layer 122b.
  • FIG. 7B shows an example in which the conductive layer 122b covers the upper surface and side surface of the conductive layer 182b.
  • the semiconductor layer 108 is in contact with the upper surface and side surface of the conductive layer 122b.
  • the conductive layer 122b has a larger area in contact with the semiconductor layer 108 than the conductive layer 182b, it is preferable to use the conductive material that is difficult to oxidize, the conductive material that keeps the electrical resistance low even when oxidized, or the oxide conductor described above. It is preferable to use a material that is more conductive than the material used for the conductive layer 122b for the conductive layer 182b. This can suppress the contact resistance between the semiconductor layer 108 and the conductive layer 112b from increasing, and can reduce the wiring resistance of the conductive layer 112b.
  • the conductive layer 182b may not have an opening 143.
  • the conductive layer 182b may be present on both sides of the opening 143, or as shown in FIG. 7C, the conductive layer 182b may be present only on either the left or right side of the opening 143.
  • FIG. 7C shows an example in which the end of the conductive layer 182b is located on the right side of the opening 143, and no conductive layer 182b is present on the left side of the opening 143.
  • FIG. 8A shows a top view of the transistor 100F
  • Fig. 8B shows a cross-sectional view taken along dashed lines A1-A2 in Fig. 8A
  • Fig. 8C shows a cross-sectional view taken along dashed lines B1-B2 in Fig. 8A.
  • Transistor 100F differs from transistor 100A primarily in that opening 143 is larger than opening 141 when viewed from above.
  • the end of the conductive layer 112b on the opening 143 side is located outside the end of the insulating layer 110 on the opening 141 side.
  • the semiconductor layer 108 contacts the top and side surfaces of the conductive layer 112b, the top and side surfaces of the insulating layer 110e, the side surfaces of the insulating layer 110d, the side surfaces of the insulating layer 110c, the side surfaces of the insulating layer 110b, the side surfaces of the insulating layer 110a, and the top surface of the conductive layer 112a.
  • the semiconductor layer 108 preferably contains the above-mentioned impurity element at least in the region in contact with the upper surface of the conductive layer 112a and the region in contact with the upper surface of the conductive layer 112b.
  • Figures 8B and 8C show an example in which the low-resistance region 108n is provided in the region in contact with the upper surface of the conductive layer 112a and the region in contact with the upper surface of the conductive layer 112b. Note that the low-resistance region 108n may also be provided in one or both of the region in contact with the side surface of the conductive layer 112b and the region in contact with the upper surface of the insulating layer 110e.
  • FIG. 9A shows a top view of a transistor 100G
  • Fig. 9B is a cross-sectional view taken along dashed dotted line A1-A2 in Fig. 9A
  • Fig. 9C is a cross-sectional view taken along dashed dotted line B1-B2 in Fig. 9A.
  • Transistor 100G differs from transistor 100A in that semiconductor layer 108 contacts the side of conductive layer 112b that does not face opening 143 (the side opposite opening 143).
  • the top surface shape and size of the semiconductor layer 108 and the conductive layer 112b are not particularly limited.
  • the end of the semiconductor layer 108 may be aligned with the end of the conductive layer 112b, may be located inside the end of the conductive layer 112b, or may be located outside the end of the conductive layer 112b.
  • the semiconductor layer 108 of the transistor 100C covers the side of the conductive layer 112b that does not face the opening 143.
  • the end of the semiconductor layer 108 is located outside the end of the conductive layer 112b and is in contact with the insulating layer 110.
  • the end of the semiconductor layer 108 on the left side in FIG. 9C covers the end of the conductive layer 112b and is in contact with the insulating layer 110.
  • the end of the semiconductor layer 108 on the right side in FIG. 9C is in contact with the conductive layer 112b.
  • the semiconductor layer 108 preferably contains the above-mentioned impurity element at least in the region in contact with the top surface of the conductive layer 112a and the region in contact with the top surface of the conductive layer 112b.
  • 9B and 9C show an example in which the low-resistance region 108n is provided in the region in contact with the top surface of the conductive layer 112a and the region in contact with the top surface of the conductive layer 112b. Note that the low-resistance region 108n may also be provided in the region in contact with the side surface of the conductive layer 112b.
  • FIG. 10A shows a cross-sectional view of a transistor 100H.
  • Transistor 100H differs from transistor 100A in that it has a conductive layer 103 on insulating layer 110b and an insulating layer 110f on conductive layer 103.
  • the conductive layer 103 is located on the insulating layer 110b.
  • the conductive layer 112a and the conductive layer 103 are electrically insulated from each other by the insulating layer 110a and the insulating layer 110b.
  • the conductive layer 103 has an opening at a position overlapping with the conductive layer 112a.
  • top surface shape of the opening provided in the conductive layer 103.
  • the top surface shape of the opening refers to the shape of the top surface end or bottom surface end of the conductive layer 103 on the opening side.
  • the insulating layer 110 includes an insulating layer 110a on the conductive layer 112a, an insulating layer 110b on the insulating layer 110a, an insulating layer 110f on the insulating layer 110b and the conductive layer 103, an insulating layer 110c on the insulating layer 110f, an insulating layer 110d on the insulating layer 110c, and an insulating layer 110e on the insulating layer 110d.
  • the insulating layer 110f covers the upper and side surfaces of the conductive layer 103.
  • the insulating layer 110f is provided so as to cover a portion of the opening.
  • the insulating layer 110f contacts the insulating layer 110b through the opening.
  • the insulating layer 110f has a similar structure to the insulating layers 110a, 110b, and 110d. Specifically, it is preferable that the insulating layer 110f is made of a film through which oxygen is less likely to diffuse. It is also preferable that the insulating layer 110f is made of a film through which hydrogen is less likely to diffuse.
  • transistor 100H there is a region in semiconductor layer 108 that overlaps with conductive layer 104 via insulating layer 106 and with conductive layer 103 via a portion of insulating layer 110 (particularly, insulating layer 110f and insulating layer 110c). In other words, there is a region in semiconductor layer 108 that is sandwiched between conductive layer 104 and conductive layer 103 via insulating layer 106 and a portion of insulating layer 110 (particularly, insulating layer 110f and insulating layer 110c).
  • the conductive layer 103 functions as a back gate electrode (also referred to as a second gate electrode) of the transistor 100H.
  • a part of the insulating layer 110 functions as a back gate insulating layer (also referred to as a second gate insulating layer) of the transistor 100H.
  • transistor 100H By providing a backgate electrode in transistor 100H, the potential on the backgate side (also called the backchannel) of the semiconductor layer 108 is fixed, and the saturation of the Id-Vd characteristics of transistor 100H can be increased.
  • the transistor 100H since the transistor 100H has a back gate electrode, the potential of the back channel of the semiconductor layer 108 can be fixed, and a negative shift in the threshold voltage can be suppressed. This makes it possible to realize a normally-off transistor (i.e., a threshold voltage of a positive value).
  • Figure 10A shows an example in which the thickness of insulating layer 110b is uniform regardless of location. Note that insulating layer 110b may have different thicknesses in areas that overlap with conductive layer 103 and areas that do not. For example, when processing the film that will become conductive layer 103, parts of insulating layer 110b that do not overlap with conductive layer 103 may be removed, resulting in a thinner thickness.
  • the semiconductor layer 108 preferably contains the above-mentioned impurity element at least in the region in contact with the top surface of the conductive layer 112a and the region in contact with the top surface of the conductive layer 112b.
  • FIG. 10A shows an example in which the low-resistance region 108n is provided in the region in contact with the top surface of the conductive layer 112a and the region in contact with the top surface of the conductive layer 112b. Note that the low-resistance region 108n may also be provided in the region in contact with the side surface of the conductive layer 112b.
  • the region in contact with the conductive layer 112a functions as one of the source region and the drain region
  • the region in contact with the conductive layer 112b functions as the other of the source region and the drain region.
  • the region in contact with the insulating layer 110a and the region in contact with the insulating layer 110e function as low resistance regions
  • the region in contact with the insulating layer 110c functions as a channel formation region.
  • the region in contact with the insulating layer 110f in the semiconductor layer 108 is described as not being included in the channel formation region, but this region may be included in the channel formation region.
  • channel length L100 of transistor 100H is indicated by a dashed double-headed arrow.
  • channel length L100 can be considered to be the shortest distance between the portion of semiconductor layer 108 that contacts insulating layer 110f and the portion that contacts insulating layer 110d.
  • channel length L100, thickness T110, and angle ⁇ 110 are as described above.
  • the thickness T3 of the conductive layer 103 is preferably 0.5 times or more, more preferably 1.0 times or more, and even more preferably more than 1.0 times the channel length L100. This makes it possible to widen the area in the semiconductor layer 108 that overlaps with the conductive layer 104 via the insulating layer 106 and with the conductive layer 103 via the insulating layer 110. Therefore, the electric field of the back channel of the semiconductor layer 108 can be more reliably controlled.
  • Transistor 100H has a region in which conductive layer 103, insulating layer 110, semiconductor layer 108, insulating layer 106, and conductive layer 104 overlap in this order in one direction without any other layers in between.
  • This direction is a direction perpendicular to channel length L100.
  • the distance L1 which is the shortest distance between the conductive layer 103 and the semiconductor layer 108, is preferably shorter than the channel length L100, more preferably 0.5 times or less, and even more preferably 0.1 times or less. The closer the distance between the conductive layer 103 and the semiconductor layer 108, the higher the saturation in the Id-Vd characteristics of the transistor 100H can be.
  • the shortest distance between the conductive layer 103 and the semiconductor layer 108 may differ on the left and right sides of the opening (opening 141) in the insulating layer 110.
  • the distance L1 satisfies the above on at least one of the left and right sides of the opening, and it is more preferable that the distance L1 satisfies the above on both sides.
  • the shortest distance between the conductive layer 103 and the semiconductor layer 108 on the left side of the opening is preferably 50% to 150% of the shortest distance on the right side of the opening, more preferably 30% to 130%, and even more preferably 10% to 110%.
  • the channel length L100 may be affected by the thickness T103 of the conductive layer 103 depending on the shortest distance L1 between the conductive layer 103 and the semiconductor layer 108.
  • the channel length L100 of the transistor corresponds to the length of the side of the insulating layer 110c on the opening 141 side in a cross-sectional view.
  • the channel length L100 may become longer due to the influence of the thickness of the conductive layer 103. Therefore, the channel length L100 can be set to 1 or more times, 1.5 or more times, or even 2 or more times the thickness T110.
  • the conductive layer 103 can have a single layer structure or a stacked structure of two or more layers.
  • the conductive layer 103 can be made of any of the materials that can be used for the conductive layer 112a, the conductive layer 112b, and the conductive layer 104.
  • the conductive layer 103 may be provided in contact with the conductive layer 112a, and an insulating layer 110 may be provided on the conductive layer 103.
  • the conductive layer 103 can function as an auxiliary wiring for the conductive layer 112a in addition to functioning as a back gate electrode.
  • a material having a higher conductivity than the conductive layer 112a for the conductive layer 103 it is preferable to use a material having a higher conductivity than the conductive layer 112a for the conductive layer 103.
  • one or more of copper, aluminum, titanium, tungsten, and molybdenum, or an alloy containing one or more of the above-mentioned metals can be preferably used as the conductive layer 103.
  • the conductive layer 103 and the conductive layer 112a which are in contact with each other, are supplied with the same potential.
  • the conductive layer 103 which functions as a backgate electrode, is preferably supplied with the lower potential of the source potential and the drain potential.
  • the conductive layer 112a functions as a source electrode and the conductive layer 112b functions as a drain electrode.
  • the conductive layer 112a functions as a drain electrode and the conductive layer 112b functions as a source electrode.
  • FIG. 10B shows a cross-sectional view of transistor 100I.
  • Transistor 100I differs from transistor 100H primarily in that insulating layer 110 has an eight-layer structure.
  • the insulating layer 110 includes an insulating layer 110a on the conductive layer 112a, an insulating layer 110b on the insulating layer 110a, an insulating layer 110c1 on the insulating layer 110b, an insulating layer 110f1 on the insulating layer 110c1, an insulating layer 110f2 on the insulating layer 110f1 and the conductive layer 103, an insulating layer 110c2 on the insulating layer 110f2, an insulating layer 110d on the insulating layer 110c2, and an insulating layer 110e on the insulating layer 110d.
  • the insulating layer 110c1 and the insulating layer 110c2 can each have a configuration similar to that applicable to the insulating layer 110c. Specifically, it is preferable to use a layer containing oxygen for the insulating layer 110c1 and the insulating layer 110c2, and it is preferable to have a region with a higher oxygen content than at least one of the insulating layers 110a, 110b, 110d, 110e, 110f1, and 110f2.
  • the insulating layer 110f1 and the insulating layer 110f2 can have the same configuration as that applicable to the insulating layer 110f. Specifically, it is preferable to use a film through which oxygen is difficult to diffuse for each of the insulating layer 110f1 and the insulating layer 110f2. It is also preferable to use a film through which hydrogen is difficult to diffuse for each of the insulating layer 110f1 and the insulating layer 110f2.
  • the aforementioned configurations can be applied to the insulating layers 110a, 110b, 110d, and 110e.
  • the channel length L100 can be said to be the shortest distance between the portion of the semiconductor layer 108 that contacts the insulating layer 110b and the portion that contacts the insulating layer 110d.
  • the structure of the insulating layer 110 can be made symmetrical above and below the conductive layer 103.
  • oxygen can be supplied to the semiconductor layer 108 from both the insulating layers 110c1 and 110c2, thereby improving the characteristics of the transistor.
  • the transistor according to one embodiment of the present invention is a type of vertical transistor, and since the source electrode, the semiconductor layer, and the drain electrode can be provided in a stacked manner, the area occupied can be significantly reduced compared to a planar transistor.
  • a CMOS Complementary Metal Oxide Semiconductor
  • the transistor of one embodiment of the present invention has impurity elements in the source region and drain electrode of the semiconductor layer. This can reduce the sheet resistance of the semiconductor layer. In addition, the contact resistance between the source electrode or drain electrode and the semiconductor layer can be reduced. Therefore, the on-current of the transistor can be increased.
  • Embodiment 2 a manufacturing method of a semiconductor device of one embodiment of the present invention will be described with reference to FIGS. 11 to 14.
  • a manufacturing method of the transistor 100B illustrated in Embodiment 1 will be described. Note that with regard to materials and formation methods of each element, description of the same parts as those described in Embodiment 1 may be omitted.
  • Figures 11 to 14 show a cross-sectional view between dashed dotted lines A1-A2 and a cross-sectional view between dashed dotted lines B1-B2 shown in Figure 1A side by side.
  • the thin films (insulating films, semiconductor films, conductive films, etc.) that make up semiconductor devices can be formed using methods such as sputtering, CVD, vacuum deposition, pulsed laser deposition (PLD: Pulsed Laser Deposition), and ALD.
  • CVD methods include PECVD and thermal CVD.
  • One type of thermal CVD method is metal organic chemical vapor deposition (MOCVD: Metal Organic CVD).
  • the thin films (insulating films, semiconductor films, conductive films, etc.) constituting the semiconductor device can be formed by wet film formation methods such as spin coating, dip coating, spray coating, inkjet printing, dispensing, screen printing, offset printing, doctor knife method, slit coating, roll coating, curtain coating, or knife coating.
  • the thin film when processing the thin film that constitutes the semiconductor device, a photolithography method or the like can be used.
  • the thin film may be processed by a nanoimprint method, a sandblasting method, a lift-off method, or the like.
  • an island-shaped thin film may be directly formed by a film formation method using a shielding mask such as a metal mask.
  • the light used for exposure can be, for example, i-line (wavelength 365 nm), g-line (wavelength 436 nm), h-line (wavelength 405 nm), or a mixture of these.
  • ultraviolet light, KrF laser light, ArF laser light, etc. can also be used.
  • Exposure can also be performed by immersion exposure technology.
  • Extreme ultraviolet (EUV) light or X-rays can also be used as the light used for exposure.
  • Electron beams can also be used instead of the light used for exposure. Extreme ultraviolet light, X-rays, or electron beams are preferable because they enable extremely fine processing. When exposure is performed by scanning a beam such as an electron beam, a photomask is not required.
  • Dry etching, wet etching, sandblasting, etc. can be used to etch thin films.
  • an insulating layer 109 is formed on the substrate 102, and a conductive layer 112a is formed on the insulating layer 109 ( Figure 11A).
  • the insulating layer 109 has an area with a higher hydrogen content than the insulating layer 110b that will be formed later.
  • the deposition gas for the insulating layer 109 preferably has a higher flow rate of NH 3 gas than the deposition gas for the insulating film 110bf to be deposited later.
  • NH 3 gas does not have to be used as the deposition gas for the insulating film 110bf.
  • the deposition conditions for the insulating layer 109 and the insulating film 110bf are made different from each other in one or more of the deposition power (deposition power density), deposition pressure, deposition gas type, deposition gas flow rate ratio, deposition temperature, and distance between the substrate and the electrode.
  • the deposition power density of the insulating layer 109 smaller than the deposition power density of the insulating film 110bf, the hydrogen content in the insulating layer 109 can be made larger than the hydrogen content in the insulating film 110bf. This makes it possible to increase the amount of hydrogen released by heating in the insulating layer 109.
  • a silicon nitride film as the insulating layer 109.
  • sputtering or PECVD is suitable for forming the insulating layer 109.
  • the PECVD method is preferable because it is easy to form both a film with a low hydrogen content and a film with a high hydrogen content.
  • the substrate temperature during the formation of the insulating layer 109 is preferably 180°C or higher and 450°C or lower, and more preferably 200°C or higher and 450°C or lower.
  • the substrate temperature during the formation of the insulating layer 109 is preferably set to be equal to or lower than the substrate temperature during the formation of the insulating film 110bf. This makes it possible to increase the amount of hydrogen released by heating.
  • the insulating layer 109 is formed before the semiconductor layer 108, there is no need to worry about oxygen being desorbed from the semiconductor layer 108 due to the heat applied during the formation of the insulating layer 109.
  • the insulating layer 109 is not provided, and the insulating layer 110a is formed as the first layer of the insulating layer 110.
  • the insulating layer 110a is preferably formed by using the method for forming the insulating layer 109 described above.
  • the conductive layer 112a can be formed by forming and processing a conductive film that will become the conductive layer 112a.
  • a sputtering method is suitable for forming the conductive film that will become the conductive layer 112a.
  • the conductive film can be processed to form the conductive layer.
  • One or both of a wet etching method and a dry etching method can be used for processing the conductive film.
  • the layers formed so that their top surface shapes are the same or roughly the same can be processed using the same mask pattern.
  • each layer constituting the conductive layer 112a may be processed using a different mask pattern.
  • an insulating film 110bf that will become insulating layer 110b, and an insulating film 110cf that will become insulating layer 110c are formed on the conductive layer 112a ( Figure 11B).
  • a silicon nitride film or an aluminum oxide film as the insulating film 110bf.
  • a silicon oxide film or a silicon oxynitride film as the insulating film 110cf.
  • sputtering or PECVD is suitable for forming the insulating films 110bf and 110cf.
  • the PECVD method is preferable because it allows both a film with a low hydrogen content and a film with a high hydrogen content to be easily formed.
  • the insulating film 110bf it is preferable to form the insulating film 110cf continuously in a vacuum without exposing the surface of the insulating film 110bf to the atmosphere.
  • impurities include water and organic matter.
  • the substrate temperature during the formation of the insulating film 110bf and the insulating film 110cf is preferably 180°C or higher and 450°C or lower, more preferably 200°C or higher and 450°C or lower, more preferably 250°C or higher and 450°C or lower, more preferably 300°C or higher and 450°C or lower, more preferably 300°C or higher and 400°C or lower, and even more preferably 350°C or higher and 400°C or lower.
  • the substrate temperature during the formation of the insulating film 110bf and the insulating film 110cf within the above-mentioned range, it is possible to reduce the release of impurities (e.g., water and hydrogen) from the insulating film 110bf and the insulating film 110cf, and to suppress the diffusion of impurities into the semiconductor layer 108. Therefore, it is possible to obtain a transistor that exhibits good electrical characteristics and is highly reliable.
  • impurities e.g., water and hydrogen
  • the insulating films 110bf and 110cf are formed before the semiconductor layer 108, there is no need to worry about oxygen being desorbed from the semiconductor layer 108 due to the heat applied during the formation of the insulating films 110bf and 110cf.
  • the insulating film 110cf After the insulating film 110cf is formed, it is preferable to perform a plasma treatment in an atmosphere containing oxygen without exposure to the air (in-situ). For example, it is preferable to perform an N 2 O plasma treatment. By performing such a plasma treatment, oxygen can be supplied to the insulating film 110cf.
  • a metal oxide layer 149 on the insulating film 110cf (FIG. 11C).
  • oxygen can be supplied to the insulating film 110cf.
  • the conductivity of the metal oxide layer 149 does not matter.
  • At least one of an insulating film, a semiconductor film, and a conductive film can be used as the metal oxide layer 149.
  • aluminum oxide, hafnium oxide, hafnium aluminate, indium oxide, indium tin oxide (ITO), or indium tin oxide containing silicon (ITSO) can be used as the metal oxide layer 149.
  • the metal oxide layer 149 it is preferable to use an oxide material that contains one or more of the same elements as the semiconductor layer 108. In particular, it is preferable to use an oxide semiconductor material that can be applied to the semiconductor layer 108.
  • the amount of oxygen supplied to the insulating film 110cf can be increased by increasing the ratio of the oxygen flow rate (oxygen flow rate ratio) to the total flow rate of the deposition gas introduced into the processing chamber of the deposition apparatus or the oxygen partial pressure in the processing chamber.
  • the oxygen flow rate ratio or oxygen partial pressure is, for example, 50% or more and 100% or less, preferably 65% or more and 100% or less, more preferably 80% or more and 100% or less, and even more preferably 90% or more and 100% or less.
  • oxygen can be supplied to the insulating film 110cf during the formation of the metal oxide layer 149, and oxygen can be prevented from being released from the insulating film 110cf.
  • a large amount of oxygen can be trapped in the insulating film 110cf.
  • a large amount of oxygen can be supplied to the semiconductor layer 108 by a later heat treatment.
  • oxygen vacancies and VOH in the semiconductor layer 108 can be reduced, and a transistor with good electrical characteristics and high reliability can be obtained.
  • the metal oxide layer 149 After forming the metal oxide layer 149, it is preferable to perform heat treatment. By performing heat treatment after forming the metal oxide layer 149, oxygen can be effectively supplied from the metal oxide layer 149 to the insulating film 110cf.
  • the temperature of the heat treatment is preferably 150°C or higher and lower than the distortion point of the substrate, more preferably 200°C or higher and 450°C or lower, even more preferably 250°C or higher and 450°C or lower, even more preferably 300°C or higher and 450°C or lower, even more preferably 300°C or higher and 400°C or lower, and even more preferably 350°C or higher and 400°C or lower.
  • the heat treatment can be performed in an atmosphere containing one or more of a noble gas, nitrogen, or oxygen. Dry air (CDA: Clean Dry Air) may be used as the atmosphere containing nitrogen or the atmosphere containing oxygen. It is preferable that the content of hydrogen, water, etc. in the atmosphere is as small as possible.
  • a high-purity gas with a dew point of -60°C or lower, preferably -100°C or lower, as the atmosphere.
  • a high-purity gas with a dew point of -60°C or lower, preferably -100°C or lower, as the atmosphere.
  • Heat treatment can be performed using an oven, rapid heating (RTA: Rapid Thermal Annealing) device, etc. Using an RTA device can shorten the heat treatment time.
  • oxygen may be further supplied to the insulating film 110cf through the metal oxide layer 149.
  • an ion implantation method, an ion doping method, a plasma immersion ion implantation method, or a plasma treatment can be used as a method for supplying oxygen.
  • an apparatus that turns oxygen gas into plasma by high-frequency power can be preferably used. Examples of the apparatus that turns gas into plasma by high-frequency power include a plasma etching apparatus and a plasma ashing apparatus.
  • heat treatment may be performed before the metal oxide layer 149 is formed. By performing heat treatment, water and hydrogen can be released from the surface and inside of the insulating film 110cf.
  • the method for removing the metal oxide layer 149 is not particularly limited, but a wet etching method can be preferably used.
  • a wet etching method By using a wet etching method, etching of the insulating film 110cf can be suppressed when removing the metal oxide layer 149. This can suppress the thickness of the insulating film 110cf from becoming thin, and the thickness of the insulating layer 110c can be made uniform.
  • the process of supplying oxygen to the insulating film 110cf is not limited to the above-mentioned method.
  • oxygen radicals, oxygen atoms, oxygen atomic ions, oxygen molecular ions, or the like can be supplied to the insulating film 110cf by ion doping, ion implantation, or plasma treatment.
  • oxygen may be supplied to the insulating film 110cf through the film. It is preferable to remove the film after supplying oxygen.
  • a conductive film or a semiconductor film containing one or more of indium, zinc, gallium, tin, aluminum, chromium, tantalum, titanium, molybdenum, nickel, iron, cobalt, and tungsten can be used.
  • an insulating film 110df that will become insulating layer 110d, and an insulating film 110ef that will become insulating layer 110e are formed on insulating film 110cf ( Figure 11D).
  • insulating layer 110e has an area with a higher hydrogen content than insulating layer 110d.
  • the deposition gas for the insulating film 110ef preferably has a higher flow rate of NH 3 gas than the deposition gas for the insulating film 110df.
  • the deposition gas for the insulating film 110df does not necessarily need to use NH 3 gas.
  • the deposition conditions of the insulating film 110ef and the insulating film 110df are made different from each other in one or more of the deposition power (deposition power density), deposition pressure, deposition gas type, deposition gas flow rate ratio, deposition temperature, and distance between the substrate and the electrode.
  • the deposition power density of the insulating film 110ef smaller than the deposition power density of the insulating film 110df
  • the hydrogen content in the insulating film 110ef can be made larger than the hydrogen content in the insulating film 110df. This makes it possible to increase the amount of hydrogen released by heating in the insulating layer 110e.
  • a silicon nitride film as the insulating films 110df and 110ef.
  • an aluminum oxide film as the insulating film 110df and a silicon nitride film as the insulating film 110ef.
  • insulating film 110df For the formation of insulating film 110df, the description of the formation of insulating film 110bf can be referred to. Note that the deposition conditions for insulating film 110bf and insulating film 110df may be the same or different from each other.
  • the formation of the insulating film 110ef can be performed by referring to the description of the formation of the insulating layer 109. Note that the film formation conditions of the insulating layer 109 and the insulating film 110ef may be the same or different from each other.
  • a conductive film 112f that will become the conductive layer 112b is formed on the insulating film 110ef, and the conductive film 112f is processed to form the conductive layer 112b having an opening 143 ( Figures 12A to 12C).
  • a conductive film 112f is formed, and as shown in FIG. 12B, the conductive film 112f is processed into a conductive layer 112B having a desired shape such as an island shape, and then the conductive layer 112B is opened as shown in FIG. 12C to form a conductive layer 112b having an opening 143.
  • the conductive film 112f may be opened and then processed into a desired shape to form the conductive layer 112b having the opening 143.
  • the conductive layer 112b is formed to have the opening 143 at a position that overlaps with a portion of the insulating films 110bf, 110cf, 110df, and 110ef that will be opened later.
  • openings are made in the insulating films 110bf to 110ef to form the insulating layer 110 (insulating layers 110b, 110c, 110d, and 110e) having an opening 141 (FIG. 12C).
  • the opening 141 is provided at a position that overlaps with the opening 143 of the conductive layer 112b. By providing the opening 141, the area of the conductive layer 112a that overlaps with the openings 141 and 143 is exposed.
  • the conductive film 112f can be processed (also called the formation of the conductive layer 112B and the formation of the conductive layer 112b) by using either or both of a wet etching method and a dry etching method.
  • the wet etching method is suitable for forming the opening 143.
  • the opening 141 can be formed by using either or both of a wet etching method and a dry etching method, and for example, a dry etching method is preferred.
  • the opening 141 can be formed, for example, by using the resist mask used to form the opening 143. Specifically, a resist mask is formed on the conductive layer 112B, a part of the conductive layer 112B is removed using the resist mask to form the opening 143, and the insulating films 110bf, 110cf, 110df, and 110ef are each removed using the resist mask to form the opening 141. Also, the openings 141 and 143 may be formed using different resist masks.
  • a metal oxide film 108f that will become the semiconductor layer 108 is formed so as to cover the openings 141 and 143 (FIG. 13A).
  • the metal oxide film 108f is provided in contact with the upper and side surfaces of the conductive layer 112b, the upper and side surfaces of the insulating layer 110, and the upper surface of the conductive layer 112a.
  • the metal oxide film 108f is preferably formed as a film with as uniform a thickness as possible on the side surface of the opening 141 in the insulating layer 110 and on the side surface of the opening 143 in the conductive layer 112b.
  • the metal oxide film 108f can be formed, for example, by using a sputtering method or an ALD method.
  • the metal oxide film 108f is preferably formed by a sputtering method using a metal oxide target.
  • the metal oxide film 108f is preferably a dense film with as few defects as possible.
  • the metal oxide film 108f is preferably a high-purity film in which impurities including hydrogen elements are reduced as much as possible.
  • oxygen gas When forming the metal oxide film 108f, it is preferable to use oxygen gas.
  • oxygen gas when forming the metal oxide film 108f, oxygen can be suitably supplied into the insulating layer 110.
  • oxygen gas when an oxide is used for the insulating layer 110c, oxygen can be suitably supplied into the insulating layer 110c.
  • oxygen is supplied to the semiconductor layer 108 in a later step, and oxygen vacancies and VOH in the semiconductor layer 108 can be reduced.
  • oxygen gas may be mixed with an inert gas (e.g., helium gas, argon gas, xenon gas, etc.).
  • an inert gas e.g., helium gas, argon gas, xenon gas, etc.
  • oxygen flow ratio oxygen flow ratio
  • the lower the oxygen flow ratio the lower the crystallinity of the metal oxide film 108f can be, and a transistor with a large on-current can be obtained.
  • the substrate temperature during formation of the metal oxide film 108f is preferably from room temperature to 250°C, more preferably from room temperature to 200°C, and even more preferably from room temperature to 140°C.
  • a substrate temperature of from room temperature to 140°C is preferable because it increases productivity.
  • the crystallinity can be reduced.
  • the ALD method it is preferable to use a film formation method such as thermal ALD or PEALD (Plasma Enhanced ALD).
  • a film formation method such as thermal ALD or PEALD (Plasma Enhanced ALD).
  • the thermal ALD method is preferable because it shows extremely high step coverage.
  • the PEALD method is preferable because it shows high step coverage and allows low-temperature film formation.
  • the metal oxide film 108f can be formed, for example, by the ALD method using a precursor containing the constituent metal elements and an oxidizing agent.
  • precursors containing indium include trimethylindium, triethylindium, tris(2,2,6,6-tetramethyl-3,5-heptanedionate)indium, cyclopentadienylindium, indium(III) chloride, and (3-(dimethylamino)propyl)dimethylindium.
  • precursors containing gallium include trimethylgallium, triethylgallium, tris(dimethylamido)gallium(III), gallium(III) acetylacetonate, tris(2,2,6,6-tetramethyl-3,5-heptanedionate)gallium, dimethylchlorogallium, diethylchlorogallium, and gallium(III) chloride.
  • precursors containing tin include tetramethyltin, tetraethyltin, tetraethenyltin, tetraallyltin, tributylvinyltin, allyltributyltin, tributylstannylacetylene, tributylphenyltin, chlorotrimethyltin, chlorotriethyltin, and tin(IV) chloride.
  • Examples of zinc-containing precursors include dimethylzinc, diethylzinc, zinc bis(2,2,6,6-tetramethyl-3,5-heptanedionate), and zinc chloride.
  • three precursors can be used: a precursor containing indium, a precursor containing gallium, and a precursor containing zinc.
  • two precursors can be used: a precursor containing indium, and a precursor containing gallium and zinc.
  • Oxidizing agents include, for example, ozone, oxygen, and water.
  • Methods for controlling the composition of the resulting film include adjusting the flow ratio of the raw material gases, the time for which the raw material gases are flowed, the order in which the raw material gases are flowed, etc. By adjusting these, it is also possible to deposit a film whose composition changes continuously. It is also possible to deposit films with different compositions continuously.
  • a treatment for removing water, hydrogen, organic substances, and the like adsorbed on the surface of the insulating layer 110 it is preferable to perform at least one of a treatment for removing water, hydrogen, organic substances, and the like adsorbed on the surface of the insulating layer 110 and a treatment for supplying oxygen into the insulating layer 110.
  • a heat treatment can be performed at a temperature of 70° C. or higher and 200° C. or lower in a reduced pressure atmosphere.
  • a plasma treatment in an atmosphere containing oxygen may be performed.
  • oxygen may be supplied to the insulating layer 110 by a plasma treatment in an atmosphere containing an oxidizing gas such as nitrous oxide ( N 2 O).
  • oxygen can be supplied while the organic substances on the surface of the insulating layer 110 are suitably removed. After such a treatment, it is preferable to continuously form the metal oxide film 108f without exposing the surface of the insulating layer 110 to the air.
  • the semiconductor layer 108 has a laminated structure, it is preferable to deposit a metal oxide film first, and then deposit the next metal oxide film in succession without exposing the surface to the air.
  • all layers constituting the semiconductor layer 108 may be formed by the same film formation method (e.g., sputtering or ALD), or different film formation methods may be used for different layers.
  • the first metal oxide film may be formed by sputtering
  • the second metal oxide film may be formed by ALD.
  • the metal oxide film 108f is processed into an island shape to form the semiconductor layer 108 ( Figure 13B).
  • the semiconductor layer 108 can be formed by using either or both of a wet etching method and a dry etching method.
  • a wet etching method is preferable.
  • a part of the conductive layer 112b in the region that does not overlap with the semiconductor layer 108 may be etched and become thin.
  • a part of the insulating layer 110 in the region that does not overlap with both the semiconductor layer 108 and the conductive layer 112b may be etched and become thin.
  • the insulating layer 110e of the insulating layer 110 may disappear by etching, and the surface of the insulating layer 110d may be exposed. Note that, in the etching of the metal oxide film 108f, by using a material with a high selectivity for the insulating layer 110e, it is possible to prevent the insulating layer 110e from becoming thin.
  • the heat treatment can remove hydrogen or water contained in the metal oxide film 108f or the semiconductor layer 108 or adsorbed on the surface.
  • the heat treatment may also improve the film quality of the metal oxide film 108f or the semiconductor layer 108 (e.g., reduce defects or improve crystallinity). It is more preferable to perform the heat treatment before processing into the semiconductor layer 108.
  • the channel formation region can be made an i-type (intrinsic) or substantially i-type region. This allows the transistor to have stable electrical characteristics.
  • the insulating layer 109 it is preferable to supply hydrogen from the insulating layer 109 to a part of the metal oxide film 108f or a part of the semiconductor layer 108 through the conductive layer 112a by heat treatment.
  • the resistance of the region can be reduced. This can reduce the contact resistance between the conductive layer 112a and the semiconductor layer 108.
  • the on-current of the transistor can be increased.
  • this heat treatment does not have to be performed if it is not necessary. Also, instead of performing the heat treatment here, it may be performed in combination with a heat treatment performed in a later process. Also, a high-temperature process in a later process (e.g., a film formation process) may also serve as the heat treatment.
  • the insulating layer 106 is formed to cover the semiconductor layer 108, the conductive layer 112b, and the insulating layer 110 (FIG. 13B).
  • the PECVD method or the ALD method is suitable for forming the insulating layer 106.
  • the insulating layer 106 When an oxide semiconductor is used for the semiconductor layer 108, the insulating layer 106 preferably functions as a barrier film that suppresses the diffusion of oxygen. Since the insulating layer 106 has the function of suppressing the diffusion of oxygen, the diffusion of oxygen from above the insulating layer 106 to the conductive layer 104 can be suppressed, and the conductive layer 104 can be suppressed from being oxidized. As a result, a transistor that exhibits good electrical characteristics and is highly reliable can be obtained.
  • a barrier film refers to a film having barrier properties.
  • an insulating layer having barrier properties can be called a barrier insulating layer.
  • barrier properties refer to one or both of the function of suppressing the diffusion of the corresponding substance (also called low permeability) and the function of capturing or fixing the corresponding substance (also called gettering).
  • the substrate temperature during the formation of the insulating layer 106 is preferably 180° C. to 450° C., more preferably 200° C. to 450° C., more preferably 250° C. to 450° C., even more preferably 300° C. to 450° C., and even more preferably 300° C. to 400° C.
  • the substrate temperature during the formation of the insulating layer 106 By setting the substrate temperature during the formation of the insulating layer 106 within the above range, defects in the insulating layer 106 can be reduced and oxygen can be prevented from being released from the semiconductor layer 108. Therefore, a transistor exhibiting good electrical characteristics and high reliability can be obtained.
  • a plasma treatment may be performed on the surface of the semiconductor layer 108.
  • the plasma treatment can reduce impurities such as water adsorbed on the surface of the semiconductor layer 108. Therefore, impurities at the interface between the semiconductor layer 108 and the insulating layer 106 can be reduced, and a highly reliable transistor can be realized. This is particularly suitable for the case where the surface of the semiconductor layer 108 is exposed to the air between the formation of the semiconductor layer 108 and the formation of the insulating layer 106.
  • the plasma treatment can be performed in an atmosphere of oxygen, ozone, nitrogen, nitrous oxide, argon, or the like, for example. In addition, it is preferable that the plasma treatment and the formation of the insulating layer 106 are performed successively without exposure to the air.
  • a film containing a large amount of oxygen for the insulating layer 106, because oxygen can be supplied from the insulating layer 106 to the semiconductor layer 108. It is more preferable to use a film that releases oxygen when heated for the insulating layer 106. When the insulating layer 106 releases oxygen due to heat applied during the manufacturing process of the transistor, oxygen can be supplied to the semiconductor layer 108. By supplying oxygen from the insulating layer 106 to the semiconductor layer 108, particularly to the channel formation region of the semiconductor layer 108, oxygen vacancies in the semiconductor layer 108 can be reduced, and a transistor that exhibits good electrical characteristics and is highly reliable can be obtained.
  • an impurity element 189 is added to the semiconductor layer 108 through the insulating layer 106 (FIG. 14A).
  • the impurity element 189 it is possible to reduce the sheet resistance of the semiconductor layer 108, the contact resistance between the semiconductor layer 108 and the conductive layer 112a, and the contact resistance between the semiconductor layer 108 and the conductive layer 112b.
  • the impurity element 189 is preferably added from a direction perpendicular or approximately perpendicular to the upper surface of the substrate 102.
  • the surface that is inclined with respect to the upper surface of the substrate 102 has a smaller amount of impurity element added thereto than a surface that is parallel or approximately parallel to the upper surface of the substrate 102.
  • the source and drain regions of the semiconductor layer 108 have a larger amount of impurity element added thereto than the channel formation region. Therefore, the resistance of the source and drain regions can be preferentially reduced.
  • the impurity element 189 is preferably added to the semiconductor layer 108 through the insulating layer 106.
  • the thickness of the insulating layer 106 in the direction in which the impurity element 189 is added varies depending on the location. Therefore, the semiconductor layer 108 has a region with a large amount of the impurity element 189 added and a region with a small amount of the impurity element 189 added.
  • the region of the semiconductor layer 108 provided along the top surface of the conductive layer 112a or the top surface of the conductive layer 112b has a larger amount of the impurity element added than the region provided along the side surface of the insulating layer 110.
  • the impurity element is prevented from entering the channel formation region of the semiconductor layer 108, and the resistance of the source region and the drain region can be preferentially reduced.
  • the impurity element 189 is also supplied to the insulating layer 106.
  • Figure 14A shows an example in which low-resistance regions 108n are formed in a region of the semiconductor layer 108 that is provided along the top surface of the conductive layer 112a and a region that is provided along the top surface of the conductive layer 112b.
  • impurity element 189 The elements that can be used for impurity element 189 are as described above.
  • the impurity element 189 can be preferably supplied by plasma ion doping or ion implantation. These methods allow the concentration profile in the depth direction to be controlled with high precision by the ion acceleration voltage, dose, etc.
  • the purity of the supplied impurity element can be increased.
  • the ion implantation method it is preferable to use the first element described above as the impurity element 189, and it is more preferable to use boron or phosphorus.
  • a low-resistance region 108n with low electrical resistance can be realized.
  • productivity can be improved by using a plasma ion doping method in which the source gas is ionized and the ions are added without mass separation.
  • the plasma ion doping method it is preferable to use both the first element and hydrogen as the impurity element 189, and it is even more preferable to use both boron or phosphorus and hydrogen.
  • both an element that bonds with oxygen to stabilize it and hydrogen it is easy to reduce the electrical resistance of the low resistance region 108n, and the low electrical resistance state can be stably maintained.
  • the ion implantation equipment or ion doping equipment used to supply the impurity element 189 is also used in the manufacture of Si transistors such as LTPS transistors, so it is preferable because the equipment in the existing LTPS manufacturing line can be reused and no new capital investment is required. This makes it possible to reduce the initial capital investment costs associated with the manufacture of semiconductor devices.
  • the impurity element 189 In the supplying process of the impurity element 189, it is preferable to control the processing conditions so that the concentration of the impurity element in the portion of the semiconductor layer 108 that overlaps with the conductive layer 112a or the conductive layer 112b is higher than the concentration of the impurity element in other regions. This allows the impurity element 189 to be supplied at an optimal concentration to the source region and the drain region of the semiconductor layer 108.
  • a gas containing the above -mentioned impurity element can be used as a source gas for the impurity element 189.
  • boron typically, B2H6 gas , BF3 gas, or the like can be used.
  • phosphorus typically, PH3 gas can be used.
  • a mixed gas in which these source gases are diluted with hydrogen or a noble gas may also be used.
  • source gas examples include CH4 , N2 , NH3, AlH3 , AlCl3 , SiH4 , Si2H6 , F2 , HF, H2 , ( C5H5 ) 2Mg , and noble gases.
  • the ion source is not limited to gas, and a solid or liquid may be heated and vaporized.
  • the impurity element 189 it is preferable to use a gas containing boron and hydrogen to supply boron and hydrogen as the impurity element 189.
  • the impurity element 189 can be added without mass separation, and the resistance of the semiconductor layer 108 can be easily reduced, which is preferable because it is possible to improve both the productivity and characteristics of the semiconductor device.
  • the supply of the impurity element 189 can be controlled by setting conditions such as the acceleration voltage and dose amount, taking into account the composition, density, and thickness of the insulating layer 106 and the semiconductor layer 108.
  • the method of supplying the impurity element 189 is not limited, and for example, plasma treatment or treatment using thermal diffusion by heating may be used.
  • the impurity element can be supplied by generating plasma in a gas atmosphere containing the impurity element to be supplied and performing plasma treatment.
  • a dry etching apparatus, an ashing apparatus, a plasma CVD apparatus, a high density plasma CVD apparatus, etc. may be used as an apparatus for generating the plasma.
  • the impurity element 189 is supplied to the semiconductor layer 108 through the insulating layer 106. This can prevent the crystallinity of the semiconductor layer 108 from decreasing when the impurity element 189 is supplied. Therefore, it is possible to prevent the electrical resistance from increasing due to the decrease in crystallinity.
  • the inside of the deposition chamber for the insulating layer 106 may be contaminated. For this reason, it is preferable to add the impurity element 189 after the insulating layer 106 is formed.
  • the impurity element 189 may be directly added to the semiconductor layer 108, and then the insulating layer 106 may be formed on the semiconductor layer 108. This can prevent the insulating layer 106 from being damaged by the addition of the impurity element 189.
  • the step of supplying the impurity element 189 is preferably performed while heating the substrate 102. This makes it possible to repair damage to the semiconductor layer 108 that occurs when the impurity element 189 is added. That is, the addition of the impurity element 189 to the semiconductor layer 108 and the repair of damage caused by the addition can be performed in parallel. Furthermore, damage to the insulating layer 106 that occurs when the impurity element 189 is added can also be repaired.
  • the substrate temperature during the supply process of the impurity element 189 is preferably 150°C or higher and lower than the distortion point of the substrate, more preferably 200°C or higher and 500°C or lower, even more preferably 200°C or higher and 450°C or lower, even more preferably 250°C or higher and 400°C or lower, even more preferably 250°C or higher and 350°C or lower, or 300°C or higher and 400°C or lower, even more preferably 300°C or higher and 350°C or lower.
  • heat treatment may be performed. By performing this heat treatment, damage that is caused to the semiconductor layer 108 and the insulating layer 106 during the process of supplying the impurity element 189 can be repaired.
  • the sheet resistance of the semiconductor layer 108 and the contact resistance between the semiconductor layer 108 and the conductive layer 112a or the conductive layer 112b may increase when heat treatment is performed after the formation of the insulating layer 106.
  • the sheet resistance and the contact resistance are less likely to increase and a low resistance can be maintained compared to when the impurity element 189 is not added.
  • the temperature of the heat treatment is too high, the sheet resistance and the contact resistance may increase even when the impurity element 189 is added.
  • the temperature of the heat treatment after adding the impurity element 189 is preferably 150°C or higher and lower than the distortion point of the substrate, more preferably 200°C or higher and 500°C or lower, even more preferably 200°C or higher and 450°C or lower, even more preferably 250°C or higher and 400°C or lower, even more preferably 250°C or higher and 350°C or lower, or even more preferably 300°C or higher and 400°C or lower, even more preferably 300°C or higher and 350°C or lower.
  • the impurity element 189 By using an element that bonds with oxygen to stabilize the impurity element 189, it is possible to prevent the impurity element 189 from being detached due to heat or the like applied during the manufacturing process of the semiconductor device. Therefore, even if a heat treatment is performed after the impurity element 189 is added, or a film formation process is performed while the substrate is heated, the electrical resistance can be maintained low in the low resistance region 108n.
  • a conductive layer 104 is formed on the insulating layer 106 (FIG. 14B).
  • a sputtering method, a thermal CVD method (including MOCVD), or an ALD method is suitable for forming the conductive film that becomes the conductive layer 104.
  • the conductive film can be processed to form an island-shaped conductive layer 104 that functions as a gate electrode.
  • a semiconductor device according to one embodiment of the present invention can be manufactured.
  • FIG. 15 shows a circuit diagram of a semiconductor device of one embodiment of the present invention.
  • FIGS. 16 to 19 show top views and cross-sectional views of the semiconductor device of one embodiment of the present invention.
  • transistor 100A will be mainly used as an example of a transistor included in the semiconductor device of one embodiment of the present invention.
  • the semiconductor device of one embodiment of the present invention is not limited to this, and may include one or more of the transistors 100 and transistors 100B to 100I described above.
  • a semiconductor device has at least two transistors, and one of the gate, source, or drain of one transistor is electrically connected to the gate, source, or drain of the other transistor.
  • the semiconductor device shown in FIG. 15A has a transistor 100A and a transistor 200A.
  • One of the source and drain of the transistor 200A is electrically connected to the gate of the transistor 100A.
  • each transistor is shown as an n-channel type in FIG. 15A to FIG. 15C, one embodiment of the present invention is not limited to this.
  • One or both of the transistor 100A and the transistor 200A may be a p-channel type.
  • Fig. 15B shows a circuit diagram of the semiconductor device 10A.
  • Fig. 16A shows a top view of the semiconductor device 10A.
  • Fig. 16B is a cross-sectional view taken along dashed line A1-A2 in Fig. 16A.
  • the semiconductor device 10A has a transistor 100A and a transistor 200A.
  • the other of the source or drain of the transistor 200A is electrically connected to the other of the source or drain of the transistor 100A.
  • transistor 100A and transistor 200A are each provided on a substrate 102.
  • Transistor 100A has the configuration described above, so detailed description will be omitted (see Figures 5A and 5B).
  • the transistor 200A has a conductive layer 112c, an insulating layer 110 (insulating layers 110a, 110b, 110c, 110d, and 110e), a semiconductor layer 108a (including a low-resistance region 108an), a conductive layer 112b, an insulating layer 106, and a conductive layer 104a.
  • the insulating layer 110 has an opening 141a that reaches the conductive layer 112c
  • the conductive layer 112b has an opening 143a that overlaps with the opening 141a.
  • the conductive layer 112c functions as one of the source and drain electrodes of the transistor 200A.
  • the conductive layer 112c can be formed using the same material and in the same process as the conductive layer 112a.
  • the semiconductor layer 108a can be formed using the same material and in the same process as the semiconductor layer 108. Alternatively, the semiconductor layer 108 and the semiconductor layer 108a may be formed using different materials and in different processes.
  • the conductive layer 112b functions as the other of the source electrode or drain electrode of the transistor 100A, and also functions as the other of the source electrode or drain electrode of the transistor 200A. By sharing the conductive layer 112b between the transistors 100A and 200A, the area occupied by the semiconductor device can be reduced.
  • the conductive layer 104a functions as the gate electrode of the transistor 200A.
  • the conductive layer 104a can be formed using the same material and process as the conductive layer 104.
  • the shapes and sizes (e.g., diameter) of the openings 141 and 141a provided in the insulating layer 110 may be the same or different from each other.
  • the shapes and sizes (e.g., diameter) of the openings 143 and 143a provided in the conductive layer 112b may be the same or different from each other.
  • the insulating layer 195 functions as a protective layer. It is preferable to use a material that does not easily diffuse impurities for the insulating layer 195. By providing the insulating layer 195, it is possible to effectively suppress the diffusion of impurities from the outside into the transistor, and to improve the reliability of the semiconductor device. Examples of impurities include water and hydrogen.
  • the insulating layer 195 has one or both of an inorganic insulating layer and an organic insulating layer.
  • the insulating layer 195 may have a laminated structure of an inorganic insulating layer and an organic insulating layer.
  • Examples of inorganic insulating films that can be used for the insulating layer 195 include an oxide insulating film, a nitride insulating film, an oxynitride insulating film, and a nitride oxide insulating film. Specific examples of these inorganic insulating films are as described for the insulating layer 110. More specifically, the insulating layer 195 can be made of one or more of silicon nitride, silicon nitride oxide, silicon oxynitride, aluminum oxide, aluminum oxynitride, aluminum nitride, hafnium oxide, and hafnium aluminate. The insulating layer 195 can be made of an organic material, such as one or more of an acrylic resin and a polyimide resin.
  • FIG. 15C shows a circuit diagram of the semiconductor device 10B.
  • Fig. 17A shows a top view of the semiconductor device 10B.
  • Fig. 17B is a cross-sectional view taken along dashed line A1-A2 in Fig. 17A.
  • the semiconductor device 10B has a transistor 100A and a transistor 200A.
  • One of the source or drain of the transistor 200A is electrically connected to one of the source or drain of the transistor 100A.
  • Transistor 100A and transistor 200A are each provided on a substrate 102.
  • Transistor 100A has the configuration described above, so detailed description will be omitted.
  • Transistor 200A has conductive layer 112c, insulating layer 110 (insulating layers 110a, 110b, 110c, 110d, 110e), semiconductor layer 108a, conductive layer 112a, insulating layer 106, and conductive layer 104a.
  • the conductive layer 112c functions as one of the source and drain electrodes of the transistor 200A.
  • the conductive layer 112c can be formed using the same material and in the same process as the conductive layer 112b.
  • the conductive layer 112a functions as the other of the source electrode or drain electrode of the transistor 100A, and also functions as the other of the source electrode or drain electrode of the transistor 200A. By sharing the conductive layer 112a between the transistors 100A and 200A, the area occupied by the semiconductor device can be reduced.
  • the conductive layer 104a functions as the gate electrode of the transistor 200A.
  • the conductive layer 104a can be formed using the same material and process as the conductive layer 104.
  • Fig. 15D shows a circuit diagram of the semiconductor device 10C.
  • Fig. 18A shows a top view of the semiconductor device 10C.
  • Fig. 18B is a cross-sectional view taken along dashed line A1-A2 in Fig. 18A.
  • the semiconductor device 10C has a transistor 100A and a transistor 250.
  • One of the source or drain of the transistor 250 is electrically connected to one of the source or drain of the transistor 100A.
  • the transistor 100A is illustrated as an n-channel type and the transistor 250 is illustrated as a p-channel type; however, one embodiment of the present invention is not limited to this. Both the transistor 100A and the transistor 250 may be n-channel types or p-channel types. Alternatively, the transistor 100A may be a p-channel type and the transistor 250 may be an n-channel type.
  • Transistor 100A and transistor 250 are each provided on substrate 102.
  • the semiconductor device 10C has a conductive layer 259 on the substrate 102, an insulating layer 252 on the substrate and the conductive layer 259, and a semiconductor layer 253 on the insulating layer 252. It also has an insulating layer 254 on the insulating layer 252 and the semiconductor layer 253, and a conductive layer 255 on the insulating layer 254.
  • the semiconductor layer 253 and the conductive layer 255 have overlapping regions.
  • an insulating layer 256 is provided over the insulating layer 254 and the conductive layer 255.
  • an opening 257a is provided in the insulating layer 254 and the insulating layer 256 in a region overlapping with a part of the semiconductor layer 253.
  • an opening 257b is provided in the insulating layer 254 and the insulating layer 256 in a region overlapping with another part of the semiconductor layer 253.
  • a conductive layer 258a is provided on the insulating layer 256 and inside the opening 257a
  • a conductive layer 258b is provided on the insulating layer 256 and inside the opening 257b.
  • the conductive layer 258a is electrically connected to the semiconductor layer 253 in the opening 257a.
  • the conductive layer 258b is electrically connected to the semiconductor layer 253 in the opening 257b.
  • the semiconductor layer 253 has a drain region 253a, a channel formation region 253b, and a source region 253c.
  • a region that overlaps with the conductive layer 255 functions as the channel formation region 253b.
  • the drain region 253a is electrically connected to the conductive layer 258a, and the source region 253c is electrically connected to the conductive layer 258b.
  • an insulating layer 110 (insulating layers 110a, 110b, 110c, 110d, and 110e) is provided on the insulating layer 256, the conductive layer 258a, and the conductive layer 258b, and a conductive layer 112b is provided on the insulating layer 110.
  • an opening 146 is provided in the conductive layer 112b and the insulating layer 110 in a region that overlaps with a portion of the conductive layer 258a (FIG. 18A).
  • the semiconductor layer 108 is provided inside the opening 146.
  • an insulating layer 106 is provided over the insulating layer 110, the conductive layer 112b, and the semiconductor layer 108, and a conductive layer 104 is provided over the insulating layer 106.
  • an insulating layer 195 is provided over the insulating layer 106 and the conductive layer 104.
  • the conductive layer 259 functions as a backgate electrode of the transistor 250. Therefore, it is preferable that the conductive layer 259 overlaps with the channel formation region 253b and extends beyond the end of the channel formation region 253b. That is, it is preferable that the conductive layer 259 is larger than the channel formation region 253b. It is also preferable that the conductive layer 259 extends beyond the end of the semiconductor layer 253. That is, it is preferable that the conductive layer 259 is larger than the semiconductor layer 253.
  • the backgate electrode is arranged so that the gate electrode and the backgate electrode sandwich the channel formation region of the semiconductor layer.
  • the threshold voltage of the transistor can be changed by changing the potential of the backgate electrode.
  • the potential of the backgate electrode may be the ground potential or any other potential.
  • the backgate electrode is formed of a conductive layer and can function in the same manner as the gate electrode.
  • the potential of the backgate electrode can be set to the same potential as the gate electrode.
  • the backgate electrode can be formed using the same materials and methods as the gate electrode, source electrode, drain electrode, etc.
  • the gate electrode and the backgate electrode are conductive layers, they have a function of preventing an electric field generated outside the transistor from acting on the semiconductor layer in which the channel is formed (particularly an electric field shielding function against static electricity). In other words, it is possible to prevent the electrical characteristics of the transistor from fluctuating due to the influence of an external electric field such as static electricity.
  • a backgate electrode it is possible to reduce the amount of change in the threshold voltage of the transistor before and after a BT (Bias Temperature) stress test. By providing a backgate electrode, the variation in the characteristics of the transistor is reduced, and the reliability of the semiconductor device can be improved.
  • the semiconductor layer 253 functions as a semiconductor layer in which a channel of the transistor 250 is formed, the insulating layer 254 functions as a gate insulating layer, and the conductive layer 255 functions as a gate electrode.
  • the conductive layer 258a functions as a drain electrode of the transistor 250, and the conductive layer 258b functions as a source electrode.
  • Transistor 250 may be an OS transistor, similar to transistor 100A.
  • the semiconductor layer 108 and the semiconductor layer 253 may be made of the same material or different materials.
  • transistor 250 a transistor that uses silicon in the channel formation region (Si transistor) may be used as the transistor 250.
  • Examples of silicon include single crystal silicon, polycrystalline silicon, and amorphous silicon.
  • a transistor having an LTPS semiconductor layer (hereinafter also referred to as an LTPS transistor) can be used.
  • LTPS transistors have high field effect mobility and good frequency characteristics.
  • Transistor 100A has the same configuration as described above, except that it has conductive layer 258a instead of conductive layer 112a.
  • the conductive layer 258a functions as one of the source electrode or drain electrode of the transistor 100A and also functions as one of the source electrode or drain electrode of the transistor 250. By sharing the conductive layer 258a between the transistor 100A and the transistor 250, the occupation area of the semiconductor device can be reduced.
  • transistor 100A is a vertical channel transistor.
  • transistor 250 the current flowing through the semiconductor layer flows horizontally, that is, parallel or nearly parallel to the surface of substrate 102.
  • Such a transistor can be called a horizontal channel transistor.
  • a semiconductor device may have not only vertical channel transistors but also horizontal channel transistors.
  • the back gate and the gate of the transistor 250 may be electrically connected. Also, as shown in FIG. 15F, the back gate and the source or the drain of the transistor 250 may be electrically connected. Also, as shown in FIG. 15G, the transistor 250 may not have a back gate.
  • Fig. 15H shows a circuit diagram of the semiconductor device 10D.
  • Fig. 19A shows a top view of the semiconductor device 10D.
  • Fig. 19B is a cross-sectional view taken along dashed line A1-A2 in Fig. 19A.
  • the semiconductor device 10D has a transistor 100A and a transistor 250.
  • the gate of the transistor 250 is electrically connected to one of the source and drain of the transistor 100A.
  • the semiconductor device 10D differs from the semiconductor device 10C in that the opening 146 is provided overlapping the conductive layer 255 that functions as the gate electrode of the transistor 250. Therefore, in the semiconductor device 10C, the transistor 100A is provided overlapping the gate electrode of the transistor 250. In the semiconductor device 10D, the opening 146 is formed by selectively removing a part of each of the conductive layer 112b and the insulating layer 110 in the region overlapping with the conductive layer 255.
  • the opening 146 overlaps with the channel formation region 253b, but this is not limited thereto.
  • the opening 146 may not overlap with the channel formation region 253b and may overlap with the conductive layer 255.
  • the conductive layer 255 functions as the gate electrode of the transistor 250 and also functions as one of the source and drain electrodes of the transistor 100A.
  • transistor 100A By stacking transistor 100A and transistor 250, a semiconductor device with a reduced occupied area can be realized.
  • opening 257a, opening 257b, conductive layer 258a, and conductive layer 258b in semiconductor device 10D are different from those in semiconductor device 10C.
  • the opening 257a is formed by selectively removing a portion of each of the insulating layer 254 and the insulating layer 110 in a region overlapping the drain region 253a of the semiconductor layer 253.
  • the opening 257b is formed by selectively removing a portion of each of the insulating layer 254 and the insulating layer 110 in a region overlapping the source region 253c of the semiconductor layer 253.
  • the conductive layer 258a and the conductive layer 258b are provided on the insulating layer 110.
  • the conductive layers 258a and 258b can be formed simultaneously in the same manufacturing process as the conductive layer 112b using the same material. Since there is no need to manufacture the conductive layers 258a and 258b separately from the conductive layer 112b, the manufacturing process of the semiconductor device can be shortened, and the productivity of the semiconductor device can be improved.
  • the semiconductor device of one embodiment of the present invention has at least one transistor and at least one capacitor, and has a structure in which the source or drain of the transistor is electrically connected to one of a pair of electrodes of the capacitor.
  • Figure 15I shows an example in which the source or drain of the transistor 100 is electrically connected to one electrode of the capacitor 190.
  • the display device of this embodiment can be a high-resolution display device or a large display device. Therefore, the display device of this embodiment can be used in electronic devices with relatively large screens, such as television devices, desktop or notebook personal computers, computer monitors, digital signage, and large game machines such as pachinko machines, as well as in the display units of digital cameras, digital video cameras, digital photo frames, mobile phones, portable game machines, personal digital assistants, and sound reproduction devices.
  • electronic devices with relatively large screens such as television devices, desktop or notebook personal computers, computer monitors, digital signage, and large game machines such as pachinko machines, as well as in the display units of digital cameras, digital video cameras, digital photo frames, mobile phones, portable game machines, personal digital assistants, and sound reproduction devices.
  • the display device of this embodiment can also be a high-definition display device. Therefore, the display device of this embodiment can be used, for example, in the display section of a wristwatch-type or bracelet-type information terminal (wearable device), as well as in the display section of a wearable device that can be worn on the head, such as a head-mounted display (HMD) or other VR device, and a glasses-type AR device.
  • a wearable device such as a head-mounted display (HMD) or other VR device, and a glasses-type AR device.
  • HMD head-mounted display
  • AR device glasses-type AR device
  • the semiconductor device of one embodiment of the present invention can be used for a display device or a module having the display device.
  • the module having the display device include a module in which a connector such as a flexible printed circuit (hereinafter, referred to as FPC) or a TCP (Tape Carrier Package) is attached to the display device, and a module in which an integrated circuit (IC) is mounted by a COG (Chip On Glass) method, a COF (Chip On Film) method, or the like.
  • FPC flexible printed circuit
  • TCP Tape Carrier Package
  • the display device of this embodiment may also have a function as a touch panel.
  • various detection elements also called sensor elements
  • various detection elements that can detect the proximity or contact of a detectable object such as a finger can be applied to the display device.
  • Sensor types include, for example, capacitance type, resistive film type, surface acoustic wave type, infrared type, optical type, and pressure sensitive type.
  • Examples of the capacitance type include a surface capacitance type and a projected capacitance type.
  • Examples of the projected capacitance type include a self-capacitance type and a mutual capacitance type.
  • the mutual capacitance type is preferable because it allows simultaneous multi-point detection.
  • touch panels examples include out-cell, on-cell, and in-cell types.
  • an in-cell touch panel is one in which electrodes constituting a detection element are provided on one or both of the substrate supporting the display element and the opposing substrate.
  • FIG. 20 shows a perspective view of the display device 50A.
  • Display device 50A has a configuration in which substrate 152 and substrate 151 are bonded together.
  • substrate 152 is indicated by a dashed line.
  • the display device 50A has a display portion 162, a connection portion 140, a circuit portion 164, a conductive layer 165, etc.
  • FIG. 20 shows an example in which an IC 173 and an FPC 172 are mounted on the display device 50A. Therefore, the configuration shown in FIG. 20 can also be said to be a display module having the display device 50A, an IC, and an FPC.
  • connection portion 140 is provided on the outside of the display portion 162.
  • the connection portion 140 can be provided along one side or multiple sides of the display portion 162. There may be one or multiple connection portions 140.
  • FIG. 20 shows an example in which the connection portion 140 is provided so as to surround the four sides of the display portion.
  • the connection portion 140 electrically connects the common electrode of the display element and the conductive layer, and can supply a potential to the common electrode.
  • the circuit portion 164 has, for example, a scanning line driver circuit (also called a gate driver).
  • the circuit portion 164 may also have both a scanning line driver circuit and a signal line driver circuit (also called a source driver).
  • the conductive layer 165 has a function of supplying signals and power to the display portion 162 and the circuit portion 164.
  • the signals and power are input to the conductive layer 165 from the outside via the FPC 172, or are input to the conductive layer 165 from the IC 173.
  • an example is shown in which an IC 173 is provided on a substrate 151 by a COG method or a COF method.
  • an IC having one or both of a scanning line driver circuit and a signal line driver circuit can be used as the IC 173.
  • the display device 50A and the display module may be configured without an IC.
  • the IC may be mounted on an FPC by a COF method or the like.
  • the semiconductor device of one embodiment of the present invention can be used, for example, as one or both of the display portion 162 and the circuit portion 164 of the display device 50A.
  • the semiconductor device of one embodiment of the present invention when the semiconductor device of one embodiment of the present invention is applied to a pixel circuit of a display device, the area occupied by the pixel circuit can be reduced, and a high-definition display device can be obtained. Furthermore, when the semiconductor device of one embodiment of the present invention is applied to a driver circuit of a display device (e.g., one or both of a gate line driver circuit and a source line driver circuit), the area occupied by the driver circuit can be reduced, and a display device with a narrow frame can be obtained. Furthermore, since the semiconductor device of one embodiment of the present invention has good electrical characteristics, the reliability of the display device can be improved by using the semiconductor device in the display device.
  • a driver circuit of a display device e.g., one or both of a gate line driver circuit and a source line driver circuit
  • the semiconductor device of one embodiment of the present invention has good electrical characteristics, the reliability of the display device can be improved by using the semiconductor device in the display device.
  • the display unit 162 is an area that displays an image in the display device 50A, and has a number of periodically arranged pixels 201.
  • Figure 20 shows an enlarged view of one pixel 201.
  • the pixel arrangement in the display device of this embodiment is not particularly limited, and various methods can be applied.
  • Examples of pixel arrangements include a stripe arrangement, an S-stripe arrangement, a matrix arrangement, a delta arrangement, a Bayer arrangement, and a Pentile arrangement.
  • the pixel 201 shown in FIG. 20 has a subpixel 11R that emits red light, a subpixel 11G that emits green light, and a subpixel 11B that emits blue light. There is no particular limit to the number of subpixels that one pixel has.
  • Each of the sub-pixels 11R, 11G, and 11B has a display element and a circuit that controls the driving of the display element.
  • the display element including, for example, liquid crystal elements and light-emitting elements.
  • display elements using shutter-type or optical interference-type MEMS (Micro Electro Mechanical Systems) elements, microcapsule-type, electrophoresis-type, electrowetting-type, or electronic liquid powder (registered trademark)-type can also be used.
  • QLED Quantum-dot LED
  • a light source and color conversion technology using quantum dot materials may also be used.
  • Display devices using liquid crystal elements include, for example, transmissive liquid crystal display devices, reflective liquid crystal display devices, and semi-transmissive liquid crystal display devices.
  • Modes that can be used in display devices using liquid crystal elements include, for example, vertical alignment (VA) mode, FFS (Fringe Field Switching) mode, IPS (In-Plane Switching) mode, TN (Twisted Nematic) mode, and ASM (Axially Symmetrically aligned Micro-cell) mode.
  • VA mode include the MVA (Multi-Domain Vertical Alignment) mode, the PVA (Patterned Vertical Alignment) mode, and the ASV (Advanced Super View) mode.
  • Liquid crystal materials that can be used in liquid crystal elements include, for example, thermotropic liquid crystal, low molecular weight liquid crystal, polymer liquid crystal, polymer dispersed liquid crystal (PDLC: Polymer Dispersed Liquid Crystal), polymer network liquid crystal (PNLC: Polymer Network Liquid Crystal), ferroelectric liquid crystal, and antiferroelectric liquid crystal.
  • thermotropic liquid crystal low molecular weight liquid crystal
  • polymer liquid crystal polymer dispersed liquid crystal
  • PNLC Polymer Network liquid crystal
  • ferroelectric liquid crystal and antiferroelectric liquid crystal.
  • these liquid crystal materials can exhibit cholesteric phase, smectic phase, cubic phase, chiral nematic phase, isotropic phase, blue phase, etc.
  • either positive type liquid crystal or negative type liquid crystal can be used as the liquid crystal material, and can be selected according to the mode or design to be applied.
  • light-emitting elements include self-emitting light-emitting elements such as LEDs (Light Emitting Diodes), OLEDs (Organic LEDs), and semiconductor lasers. Examples of LEDs that can be used include mini LEDs and micro LEDs.
  • Examples of light-emitting materials that light-emitting elements have include fluorescent materials, phosphorescent materials, materials that exhibit thermally activated delayed fluorescence (thermally activated delayed fluorescence: TADF materials), and inorganic compounds (quantum dot materials, etc.).
  • the light-emitting element can emit light of infrared, red, green, blue, cyan, magenta, yellow, or white.
  • the color purity can be increased by providing the light-emitting element with a microcavity structure.
  • one electrode functions as an anode and the other electrode functions as a cathode.
  • the display device of one embodiment of the present invention may be a top emission type that emits light in a direction opposite to the substrate on which the light-emitting elements are formed, a bottom emission type that emits light toward the substrate on which the light-emitting elements are formed, or a dual emission type that emits light to both sides.
  • Figure 21A shows an example of a cross section of the display device 50A when a portion of the area including the FPC 172, a portion of the circuit section 164, a portion of the display section 162, a portion of the connection section 140, and a portion of the area including the end portion are cut away.
  • the display device 50A shown in FIG. 21A has transistors 205D, 205R, 205G, and 205B, light-emitting elements 130R, 130G, and 130B between the substrate 151 and the substrate 152.
  • the light-emitting element 130R is a display element included in the subpixel 11R that emits red light
  • the light-emitting element 130G is a display element included in the subpixel 11G that emits green light
  • the light-emitting element 130B is a display element included in the subpixel 11B that emits blue light.
  • the display device 50A uses an SBS structure.
  • the SBS structure allows the material and configuration to be optimized for each light-emitting element, which increases the freedom of material and configuration selection and makes it easier to improve brightness and reliability.
  • the display device 50A is also a top emission type.
  • transistors and the like can be arranged so as to overlap the light emitting region of the light emitting element, so the aperture ratio of the pixel can be increased compared to a bottom emission type.
  • Transistors 205D, 205R, 205G, and 205B are all formed on substrate 151. These transistors can be manufactured using the same materials and the same process.
  • the display device 50A includes the transistors of one embodiment of the present invention in both the display portion 162 and the circuit portion 164.
  • the transistors of one embodiment of the present invention in the display portion 162 the pixel size can be reduced and high definition can be achieved.
  • the transistors of one embodiment of the present invention in the circuit portion 164 the area occupied by the circuit portion 164 can be reduced and a narrower frame can be achieved.
  • transistor 100A (FIGS. 5A and 5B) is used as the transistor of one embodiment of the present invention is described, but is not limited thereto.
  • the description of the previous embodiment can be referred to.
  • transistors 205D, 205R, 205G, and 205B each have a conductive layer 104 functioning as a gate, an insulating layer 106 functioning as a gate insulating layer, conductive layers 112a and 112b functioning as a source and a drain, a semiconductor layer 108 having a metal oxide, and an insulating layer 110 (insulating layers 110a, 110b, 110c, 110d, and 110e).
  • the same hatched pattern is applied to multiple layers obtained by processing the same conductive film.
  • the insulating layer 110 is located between the conductive layer 112a and the semiconductor layer 108.
  • the insulating layer 106 is located between the conductive layer 104 and the semiconductor layer 108.
  • the transistors included in the display device of this embodiment are not limited to the transistors of one embodiment of the present invention.
  • the display device may include a combination of a transistor of one embodiment of the present invention and a transistor having another structure.
  • the display device of this embodiment may have, for example, one or more of a planar transistor, a staggered transistor, and an inverted staggered transistor.
  • the transistors included in the display device of this embodiment may be either a top-gate type or a bottom-gate type.
  • a gate may be provided above and below a semiconductor layer in which a channel is formed.
  • the display device of this embodiment may also have a Si transistor.
  • the OS transistor when the transistor operates in the saturation region, the OS transistor can reduce the change in source-drain current in response to a change in gate-source voltage compared to a Si transistor. Therefore, by using an OS transistor as a driving transistor included in a pixel circuit, the current flowing between the source and drain can be precisely determined by changing the gate-source voltage, and the amount of current flowing to the light-emitting element can be controlled. This allows a larger number of gray levels to be achieved in the pixel circuit.
  • an OS transistor can pass a more stable current (saturation current) than a Si transistor, even when the source-drain voltage gradually increases. Therefore, by using an OS transistor as a driving transistor, a stable current can be passed to the light-emitting element, for example, even when the current-voltage characteristics of the light-emitting element vary. In other words, when the OS transistor operates in the saturation region, the source-drain current hardly changes even when the source-drain voltage is changed, so that the light emission luminance of the light-emitting element can be stabilized.
  • the transistors in the circuit unit 164 and the transistors in the display unit 162 may have the same structure or different structures.
  • the transistors in the circuit unit 164 may all have the same structure or may have two or more types.
  • the transistors in the display unit 162 may all have the same structure or may have two or more types.
  • All of the transistors in the display portion 162 may be OS transistors, all of the transistors in the display portion 162 may be Si transistors, or some of the transistors in the display portion 162 may be OS transistors and the rest may be Si transistors.
  • LTPS transistor For example, by using both an LTPS transistor and an OS transistor in the display unit 162, a display device with low power consumption and high driving capability can be realized.
  • a configuration in which an LTPS transistor and an OS transistor are combined is sometimes called LTPO.
  • a more suitable example is a configuration in which an OS transistor is used as a transistor that functions as a switch for controlling conduction/non-conduction between wirings, and an LTPS transistor is used as a transistor for controlling current.
  • one of the transistors in the display unit 162 functions as a transistor for controlling the current flowing to the light-emitting element, and can also be called a driving transistor.
  • One of the source and drain of the driving transistor is electrically connected to the pixel electrode of the light-emitting element. It is preferable to use an LTPS transistor as the driving transistor. This makes it possible to increase the current flowing to the light-emitting element in the pixel circuit.
  • the other transistor in the display unit 162 functions as a switch for controlling pixel selection/non-selection and can also be called a selection transistor.
  • the gate of the selection transistor is electrically connected to a gate line, and one of the source and drain is electrically connected to a source line (signal line). It is preferable to use an OS transistor as the selection transistor. This allows the gradation of the pixel to be maintained even if the frame frequency is significantly reduced (for example, 1 fps or less), so that power consumption can be reduced by stopping the driver when displaying a still image.
  • An insulating layer 218 is provided to cover transistors 205D, 205R, 205G, and 205B, and an insulating layer 235 is provided on insulating layer 218.
  • the insulating layer 218 preferably functions as a protective layer for the transistor.
  • the insulating layer 218 is preferably made of a material through which impurities such as water and hydrogen are unlikely to diffuse. This allows the insulating layer 218 to function as a barrier layer. With this structure, it is possible to effectively prevent impurities from diffusing from the outside into the transistor, thereby improving the reliability of the display device.
  • the insulating layer 218 preferably has one or more inorganic insulating films.
  • inorganic insulating films include oxide insulating films, nitride insulating films, oxynitride insulating films, and nitride oxide insulating films. Specific examples of these inorganic insulating films are as described above.
  • the insulating layer 235 preferably functions as a planarization layer, and is preferably an organic insulating film.
  • Materials that can be used for the organic insulating film include acrylic resin, polyimide resin, epoxy resin, polyamide resin, polyimideamide resin, siloxane resin, benzocyclobutene resin, phenol resin, and precursors of these resins.
  • the insulating layer 235 may also have a laminated structure of an organic insulating film and an inorganic insulating film.
  • the outermost layer of the insulating layer 235 preferably functions as an etching protection layer. This makes it possible to suppress the formation of recesses in the insulating layer 235 when processing the pixel electrodes 111R, 111G, 111B, etc. Alternatively, recesses may be provided in the insulating layer 235 when processing the pixel electrodes 111R, 111G, 111B, etc.
  • Light-emitting elements 130R, 130G, and 130B are provided on insulating layer 235.
  • the light-emitting element 130R has a pixel electrode 111R on the insulating layer 235, an EL layer 113R on the pixel electrode 111R, and a common electrode 115 on the EL layer 113R.
  • the light-emitting element 130R shown in FIG. 21A emits red light (R).
  • the EL layer 113R has a light-emitting layer that emits red light.
  • the light-emitting element 130G has a pixel electrode 111G on the insulating layer 235, an EL layer 113G on the pixel electrode 111G, and a common electrode 115 on the EL layer 113G.
  • the light-emitting element 130G shown in FIG. 21A emits green light (G).
  • the EL layer 113G has a light-emitting layer that emits green light.
  • the light-emitting element 130B has a pixel electrode 111B on the insulating layer 235, an EL layer 113B on the pixel electrode 111B, and a common electrode 115 on the EL layer 113B.
  • the light-emitting element 130B shown in FIG. 21A emits blue light (B).
  • the EL layer 113B has a light-emitting layer that emits blue light.
  • EL layers 113R, 113G, and 113B are all shown with the same film thickness, but this is not limited to this.
  • EL layers 113R, 113G, and 113B may each have a different film thickness.
  • the pixel electrode 111R is electrically connected to the conductive layer 112b of the transistor 205R through openings provided in the insulating layer 106, the insulating layer 218, and the insulating layer 235.
  • the pixel electrode 111G is electrically connected to the conductive layer 112b of the transistor 205G
  • the pixel electrode 111B is electrically connected to the conductive layer 112b of the transistor 205B.
  • the ends of each of the pixel electrodes 111R, 111G, and 111B are covered with an insulating layer 237.
  • the insulating layer 237 functions as a partition wall.
  • the insulating layer 237 can be formed in a single layer structure or a multilayer structure using one or both of an inorganic insulating material and an organic insulating material.
  • the material that can be used for the insulating layer 218 and the material that can be used for the insulating layer 235 can be used for the insulating layer 237.
  • the insulating layer 237 can electrically insulate the pixel electrode and the common electrode.
  • the insulating layer 237 can electrically insulate adjacent light-emitting elements from each other.
  • the insulating layer 237 is provided at least in the display section 162.
  • the insulating layer 237 may be provided not only in the display section 162, but also in the connection section 140 and the circuit section 164.
  • the insulating layer 237 may also be provided up to the edge of the display device 50A.
  • the common electrode 115 is a continuous film that is provided in common to the light-emitting elements 130R, 130G, and 130B.
  • the common electrode 115 shared by the multiple light-emitting elements is electrically connected to a conductive layer 123 provided in the connection portion 140.
  • the conductive layer 123 it is preferable to use a conductive layer formed from the same material and in the same process as the pixel electrodes 111R, 111G, and 111B.
  • a conductive film that transmits visible light is used for the pixel electrode and the common electrode, which is the electrode from which light is extracted. It is preferable to use a conductive film that reflects visible light for the electrode from which light is not extracted.
  • a conductive film that transmits visible light may also be used for the electrode on the side from which light is not extracted.
  • the light emitted from the EL layer may be reflected by the reflective layer and extracted from the display device.
  • metals, alloys, electrically conductive compounds, and mixtures thereof can be appropriately used.
  • the material include metals such as aluminum, magnesium, titanium, chromium, manganese, iron, cobalt, nickel, copper, gallium, zinc, indium, tin, molybdenum, tantalum, tungsten, palladium, gold, platinum, silver, yttrium, and neodymium, and alloys containing these in appropriate combinations.
  • examples of the material include indium tin oxide (In-Sn oxide, also referred to as ITO), In-Si-Sn oxide (also referred to as ITSO), indium zinc oxide (In-Zn oxide), and In-W-Zn oxide.
  • examples of the material include alloys containing aluminum (aluminum alloys), such as an alloy of aluminum, nickel, and lanthanum (Al-Ni-La), and alloys containing silver, such as an alloy of silver and magnesium, and an alloy of silver, palladium, and copper (Ag-Pd-Cu, also referred to as APC).
  • Such materials include elements belonging to Group 1 or 2 of the periodic table (e.g., lithium, cesium, calcium, and strontium) that are not listed above, rare earth metals such as europium and ytterbium, and alloys containing appropriate combinations of these, graphene, etc.
  • the light-emitting element preferably has a micro-optical resonator (microcavity) structure. Therefore, it is preferable that one of the pair of electrodes of the light-emitting element has an electrode that is transparent and reflective to visible light (semi-transmissive/semi-reflective electrode), and the other has an electrode that is reflective to visible light (reflective electrode).
  • the light-emitting element has a microcavity structure, the light emitted from the light-emitting layer can be resonated between the two electrodes, thereby intensifying the light emitted from the light-emitting element.
  • the light transmittance of the transparent electrode is 40% or more.
  • the visible light reflectance of the semi-transmissive/semi-reflective electrode is 10% or more and 95% or less, preferably 30% or more and 80% or less.
  • the visible light reflectance of the reflective electrode is 40% or more and 100% or less, preferably 70% or more and 100% or less.
  • the resistivity of these electrodes is preferably 1 ⁇ 10 ⁇ 2 ⁇ cm or less.
  • the EL layers 113R, 113G, and 113B are each provided in an island shape.
  • the ends of adjacent EL layers 113R and 113G overlap, the ends of adjacent EL layers 113G and 113B overlap, and the ends of adjacent EL layers 113R and 113B overlap.
  • the ends of adjacent EL layers may overlap as shown in FIG. 21A, but this is not limited to this. In other words, adjacent EL layers may not overlap and may be separated from each other.
  • the EL layers 113R, 113G, and 113B each have at least a light-emitting layer.
  • the light-emitting layer has one or more types of light-emitting materials.
  • a material that emits light of a color such as blue, purple, blue-purple, green, yellow-green, yellow, orange, or red is appropriately used.
  • a material that emits near-infrared light can also be used as the light-emitting material.
  • Light-emitting materials include fluorescent materials, phosphorescent materials, TADF materials, and quantum dot materials.
  • the light-emitting layer may have one or more organic compounds (host material, assist material, etc.) in addition to the light-emitting substance (guest material).
  • the one or more organic compounds one or both of a substance with high hole transport properties (hole transport material) and a substance with high electron transport properties (electron transport material) can be used.
  • a bipolar substance a substance with high electron transport properties and hole transport properties
  • a TADF material may be used as the one or more organic compounds.
  • the light-emitting layer preferably has, for example, a phosphorescent material and a hole-transporting material and an electron-transporting material, which are a combination that easily forms an exciplex.
  • ExTET Exciplex-Triple Energy Transfer
  • the energy transfer becomes smooth and light emission can be efficiently obtained.
  • the EL layer may have one or more of a layer containing a substance with high hole injection properties (hole injection layer), a layer containing a hole transport material (hole transport layer), a layer containing a substance with high electron blocking properties (electron blocking layer), a layer containing a substance with high electron injection properties (electron injection layer), a layer containing an electron transport material (electron transport layer), and a layer containing a substance with high hole blocking properties (hole blocking layer).
  • the EL layer may contain one or both of a bipolar substance and a TADF material.
  • the light-emitting element can be made of either a low molecular weight compound or a high molecular weight compound, and may contain an inorganic compound.
  • the layers constituting the light-emitting element can be formed by a deposition method (including a vacuum deposition method), a transfer method, a printing method, an inkjet method, a coating method, or the like.
  • a single structure (a structure having only one light-emitting unit) or a tandem structure (a structure having multiple light-emitting units) may be applied to the light-emitting element.
  • the light-emitting unit has at least one light-emitting layer.
  • the tandem structure is a structure in which multiple light-emitting units are connected in series via a charge-generating layer. When a voltage is applied between a pair of electrodes, the charge-generating layer has a function of injecting electrons into one of the two light-emitting units and injecting holes into the other.
  • the tandem structure can be used to make a light-emitting element capable of emitting high-luminance light. Furthermore, the tandem structure can reduce the current required to obtain the same luminance compared to a single structure, and therefore can improve reliability.
  • the tandem structure can be called a stack structure.
  • EL layer 113R has a structure having multiple light-emitting units that emit red light
  • EL layer 113G has a structure having multiple light-emitting units that emit green light
  • EL layer 113B has a structure having multiple light-emitting units that emit blue light.
  • a protective layer 131 is provided on the light-emitting elements 130R, 130G, and 130B.
  • the protective layer 131 and the substrate 152 are bonded via an adhesive layer 142.
  • the substrate 152 is provided with a light-shielding layer 117.
  • a solid sealing structure or a hollow sealing structure can be applied to seal the light-emitting elements.
  • the space between the substrates 152 and 151 is filled with an adhesive layer 142, and a solid sealing structure is applied.
  • the space may be filled with an inert gas (such as nitrogen or argon), and a hollow sealing structure may be applied.
  • the adhesive layer 142 may be provided so as not to overlap with the light-emitting elements.
  • the space may also be filled with a resin different from the adhesive layer 142 provided in a frame shape.
  • the protective layer 131 is provided at least on the display unit 162, and is preferably provided so as to cover the entire display unit 162.
  • the protective layer 131 is preferably provided so as to cover not only the display unit 162, but also the connection unit 140 and the circuit unit 164.
  • the protective layer 131 is also preferably provided up to the end of the display device 50A.
  • the connection unit 204 there are portions where the protective layer 131 is not provided in order to electrically connect the FPC 172 and the conductive layer 166.
  • the reliability of the light-emitting elements can be improved.
  • the protective layer 131 can have a single layer structure or a laminated structure of two or more layers.
  • the conductivity of the protective layer 131 does not matter.
  • At least one of an insulating film, a semiconductor film, and a conductive film can be used as the protective layer 131.
  • the protective layer 131 has an inorganic film, which prevents oxidation of the common electrode 115 and prevents impurities (such as moisture and oxygen) from entering the light-emitting element, thereby suppressing deterioration of the light-emitting element and improving the reliability of the display device.
  • inorganic insulating films such as an oxide insulating film, a nitride insulating film, an oxynitride insulating film, and a nitride oxide insulating film can be used for the protective layer 131.
  • specific examples of these inorganic insulating films are as described above.
  • the protective layer 131 preferably has a nitride insulating film or a nitride oxide insulating film, and more preferably has a nitride insulating film.
  • the protective layer 131 may also be an inorganic film containing ITO, In-Zn oxide, Ga-Zn oxide, Al-Zn oxide, IGZO, or the like.
  • the inorganic film preferably has a high resistance, and more specifically, preferably has a higher resistance than the common electrode 115.
  • the inorganic film may further contain nitrogen.
  • the protective layer 131 has high transparency to visible light.
  • ITO, IGZO, and aluminum oxide are preferable because they are inorganic materials that have high transparency to visible light.
  • the protective layer 131 may be, for example, a laminated structure of an aluminum oxide film and a silicon nitride film on the aluminum oxide film, or a laminated structure of an aluminum oxide film and an IGZO film on the aluminum oxide film. By using such a laminated structure, it is possible to prevent impurities (water, oxygen, etc.) from entering the EL layer side.
  • the protective layer 131 may have an organic film.
  • the protective layer 131 may have both an organic film and an inorganic film.
  • organic films that can be used for the protective layer 131 include organic insulating films that can be used for the insulating layer 235.
  • connection portion 204 is provided in an area of the substrate 151 where the substrate 152 does not overlap.
  • the conductive layer 165 is electrically connected to the FPC 172 via the conductive layer 166 and the connection layer 242.
  • the conductive layer 165 is a conductive layer obtained by processing the same conductive film as the conductive layer 112b.
  • the conductive layer 166 is a conductive layer obtained by processing the same conductive film as the pixel electrodes 111R, 111G, and 111B.
  • the conductive layer 166 is exposed on the upper surface of the connection portion 204. This allows the connection portion 204 and the FPC 172 to be electrically connected via the connection layer 242.
  • the display device 50A is a top emission type. Light emitted by the light emitting elements is emitted toward the substrate 152. It is preferable to use a material that is highly transparent to visible light for the substrate 152.
  • the pixel electrodes 111R, 111G, and 111B contain a material that reflects visible light, and the counter electrode (common electrode 115) contains a material that transmits visible light.
  • the light-shielding layer 117 can be provided between adjacent light-emitting elements, in the connection section 140, in the circuit section 164, etc.
  • a colored layer such as a color filter may be provided on the surface of the substrate 152 facing the substrate 151 or on the protective layer 131.
  • a color filter By providing a color filter over the light-emitting element, the color purity of the light emitted from the pixel can be increased.
  • the colored layer is a colored layer that selectively transmits light in a specific wavelength range and absorbs light in other wavelength ranges.
  • a red (R) color filter that transmits light in the red wavelength range
  • a green (G) color filter that transmits light in the green wavelength range
  • a blue (B) color filter that transmits light in the blue wavelength range
  • R red
  • G green
  • B blue
  • a metal material a resin material, a pigment, and a dye
  • the colored layers are formed at the desired positions by a printing method, an inkjet method, an etching method using photolithography, or the like.
  • various optical members can be arranged on the outside of the substrate 152 (the surface opposite to the substrate 151).
  • the optical members include a polarizing plate, a retardation plate, a light diffusion layer (such as a diffusion film), an anti-reflection layer, and a light collecting film.
  • a surface protection layer such as an antistatic film that suppresses the adhesion of dust, a water-repellent film that makes it difficult for dirt to adhere, a hard coat film that suppresses the occurrence of scratches due to use, and an impact absorbing layer may be arranged on the outside of the substrate 152.
  • a glass layer or a silica layer As the surface protection layer, it is possible to suppress the occurrence of surface contamination and scratches, which is preferable.
  • DLC diamond-like carbon
  • AlO x aluminum oxide
  • a polyester-based material As the surface protection layer.
  • a polycarbonate-based material may be used as the surface protection layer.
  • a material with a high hardness for the surface protection layer it is preferable to use a material with a high hardness for the surface protection layer.
  • the substrate 151 and the substrate 152 can each be made of glass, quartz, ceramics, sapphire, resin, metal, alloy, semiconductor, or the like.
  • a material that transmits light is used for the substrate on the side from which light from the light-emitting element is extracted.
  • a flexible material is used for the substrate 151 and the substrate 152, the flexibility of the display device can be increased, and a flexible display can be realized.
  • a polarizing plate may be used for at least one of the substrates 151 and 152.
  • polyester resins such as polyethylene terephthalate (PET) and polyethylene naphthalate (PEN), polyacrylonitrile resin, acrylic resin, polyimide resin, polymethyl methacrylate resin, polycarbonate (PC) resin, polyethersulfone (PES) resin, polyamide resin (nylon, aramid, etc.), polysiloxane resin, cycloolefin resin, polystyrene resin, polyamideimide resin, polyurethane resin, polyvinyl chloride resin, polyvinylidene chloride resin, polypropylene resin, polytetrafluoroethylene (PTFE) resin, ABS resin, cellulose nanofiber, etc.
  • PET polyethylene terephthalate
  • PEN polyethylene naphthalate
  • polyacrylonitrile resin acrylic resin
  • polyimide resin polymethyl methacrylate resin
  • PC polycarbonate
  • PES polyethersulfone
  • polyamide resin nylon, aramid, etc.
  • polysiloxane resin
  • a substrate with high optical isotropy has small birefringence (it can also be said that the amount of birefringence is small).
  • films with high optical isotropy include triacetyl cellulose (TAC, also called cellulose triacetate) film, cycloolefin polymer (COP) film, cycloolefin copolymer (COC) film, and acrylic film.
  • curing adhesives such as photo-curing adhesives such as ultraviolet curing adhesives, reactive curing adhesives, heat curing adhesives, and anaerobic adhesives.
  • photo-curing adhesives such as ultraviolet curing adhesives, reactive curing adhesives, heat curing adhesives, and anaerobic adhesives.
  • These adhesives include epoxy resin, acrylic resin, silicone resin, phenolic resin, polyimide resin, imide resin, PVC (polyvinyl chloride) resin, PVB (polyvinyl butyral) resin, and EVA (ethylene vinyl acetate) resin.
  • materials with low moisture permeability such as epoxy resin are preferable.
  • Two-part mixed resins may also be used.
  • Adhesive sheets, etc. may also be used.
  • connection layer 242 can be made of an anisotropic conductive film (ACF), an anisotropic conductive paste (ACP), or the like.
  • ACF anisotropic conductive film
  • ACP anisotropic conductive paste
  • FIG. 21B shows an example of a cross section of the display unit 162 of the display device 50B.
  • the display device 50B is mainly different from the display device 50A in that a light-emitting element having a common EL layer 113 and a colored layer (such as a color filter) are used in each subpixel of each color.
  • the configuration shown in FIG. 21B can be combined with the region including the FPC 172, the circuit portion 164, the laminated structure from the substrate 151 to the insulating layer 235 of the display unit 162, the connection portion 140, and the configuration of the end portion shown in FIG. 21A. Note that in the following description of the display device, the description of the same parts as those of the display device described above may be omitted.
  • the display device 50B shown in FIG. 21B has light emitting elements 130R, 130G, and 130B, a colored layer 132R that transmits red light, a colored layer 132G that transmits green light, and a colored layer 132B that transmits blue light.
  • the light-emitting element 130R has a pixel electrode 111R, an EL layer 113 on the pixel electrode 111R, and a common electrode 115 on the EL layer 113.
  • the light emitted by the light-emitting element 130R is extracted as red light to the outside of the display device 50B via the colored layer 132R.
  • the light-emitting element 130G has a pixel electrode 111G, an EL layer 113 on the pixel electrode 111G, and a common electrode 115 on the EL layer 113.
  • the light emitted by the light-emitting element 130G is extracted as green light to the outside of the display device 50B via the colored layer 132G.
  • the light-emitting element 130B has a pixel electrode 111B, an EL layer 113 on the pixel electrode 111B, and a common electrode 115 on the EL layer 113.
  • the light emitted by the light-emitting element 130B is extracted as blue light to the outside of the display device 50B via the colored layer 132B.
  • Each of the light-emitting elements 130R, 130G, and 130B shares an EL layer 113 and a common electrode 115.
  • the configuration in which a common EL layer 113 is provided for the subpixels of each color can reduce the number of manufacturing steps compared to the configuration in which a different EL layer is provided for each subpixel of each color.
  • the light-emitting elements 130R, 130G, and 130B shown in FIG. 21B emit white light.
  • the white light emitted by the light-emitting elements 130R, 130G, and 130B passes through the colored layers 132R, 132G, and 132B to obtain light of the desired color.
  • a light-emitting element that emits white light preferably includes two or more light-emitting layers.
  • the light-emitting layers are selected so that the emission colors of the two light-emitting layers are complementary to each other. For example, by making the emission color of the first light-emitting layer and the emission color of the second light-emitting layer complementary to each other, a configuration can be obtained in which the light-emitting element as a whole emits white light.
  • the emission colors of the three or more light-emitting layers are combined to form a configuration in which the light-emitting element as a whole emits white light.
  • the EL layer 113 preferably has, for example, a light-emitting layer having a light-emitting material that emits blue light, and a light-emitting layer having a light-emitting material that emits visible light with a longer wavelength than blue.
  • the EL layer 113 preferably has, for example, a light-emitting layer that emits yellow light, and a light-emitting layer that emits blue light.
  • the EL layer 113 preferably has, for example, a light-emitting layer that emits red light, a light-emitting layer that emits green light, and a light-emitting layer that emits blue light.
  • a tandem structure For light-emitting elements that emit white light, it is preferable to use a tandem structure. Specifically, a two-stage tandem structure having a light-emitting unit that emits yellow light and a light-emitting unit that emits blue light, a two-stage tandem structure having a light-emitting unit that emits red and green light and a light-emitting unit that emits blue light, a three-stage tandem structure having, in this order, a light-emitting unit that emits blue light, a light-emitting unit that emits yellow, yellow-green or green light, and a light-emitting unit that emits blue light, or a three-stage tandem structure having, in this order, a light-emitting unit that emits blue light, a light-emitting unit that emits yellow, yellow-green or green light, and red light, and a light-emitting unit that emits blue light, etc.
  • the number of layers and the order of colors of the light-emitting units can be, from the anode side, a two-layer structure of B and Y, a two-layer structure of B and light-emitting unit X, a three-layer structure of B, Y, and B, and a three-layer structure of B, X, and B.
  • the number of layers and the order of colors of the light-emitting layers in light-emitting unit X can be, from the anode side, a two-layer structure of R and Y, a two-layer structure of R and G, a two-layer structure of G and R, a three-layer structure of G, R, and G, or a three-layer structure of R, G, and R.
  • another layer may be provided between the two light-emitting layers.
  • a light-emitting element configured to emit white light may emit light of a specific wavelength, such as red, green, or blue, with the light being enhanced.
  • the light-emitting elements 130R, 130G, and 130B shown in FIG. 21B emit blue light.
  • the EL layer 113 has one or more light-emitting layers that emit blue light.
  • the blue light emitted by the light-emitting element 130B can be extracted.
  • a color conversion layer is provided between the light-emitting element 130R or the light-emitting element 130G and the substrate 152, so that the blue light emitted by the light-emitting element 130R or the light-emitting element 130G can be converted into light with a longer wavelength, and red or green light can be extracted. Furthermore, it is preferable to provide a colored layer 132R between the color conversion layer and the substrate 152 on the light-emitting element 130R, and a colored layer 132G between the color conversion layer and the substrate 152 on the light-emitting element 130G.
  • a part of the light emitted by the light-emitting element may be transmitted as it is without being converted by the color conversion layer.
  • the color conversion layer By extracting the light that has passed through the color conversion layer via the colored layer, light other than the desired color is absorbed by the colored layer, and the color purity of the light emitted by the subpixel can be increased.
  • Display device 50C A display device 50C shown in FIG. 22 differs from the display device 50B mainly in that it is a bottom emission type display device.
  • Light emitted by the light-emitting element is emitted toward the substrate 151. It is preferable to use a material that is highly transparent to visible light for the substrate 151. On the other hand, the translucency of the material used for the substrate 152 does not matter.
  • FIG. 22 shows an example in which the light-shielding layer 117 is provided on the substrate 151, the insulating layer 153 is provided on the light-shielding layer 117, and the transistors 205D, 205R (not shown), 205G, and 205B are provided on the insulating layer 153.
  • the colored layers 132R, 132G, and 132B are provided on the insulating layer 218, and the insulating layer 235 is provided on the colored layers 132R, 132G, and 132B.
  • the light-emitting element 130R which overlaps with the colored layer 132R, has a pixel electrode 111R, an EL layer 113, and a common electrode 115.
  • the light-emitting element 130G which overlaps with the colored layer 132G, has a pixel electrode 111G, an EL layer 113, and a common electrode 115.
  • the light-emitting element 130B which overlaps with the colored layer 132B, has a pixel electrode 111B, an EL layer 113, and a common electrode 115.
  • the pixel electrodes 111R, 111G, and 111B are each made of a material that is highly transparent to visible light. It is preferable to use a material that reflects visible light for the common electrode 115. In a bottom-emission display device, a low-resistance metal or the like can be used for the common electrode 115, so that voltage drops caused by the resistance of the common electrode 115 can be suppressed, and high display quality can be achieved.
  • the transistor of one embodiment of the present invention can be miniaturized and its occupation area can be reduced, so that in a display device with a bottom emission structure, the aperture ratio of a pixel can be increased or the pixel size can be reduced.
  • Display device 50D A display device 50D shown in FIG. 23A differs from the display device 50A mainly in that a light receiving element 130S is included.
  • Display device 50D has a light-emitting element and a light-receiving element in each pixel.
  • display device 50D it is preferable to use an organic EL element as the light-emitting element and an organic photodiode as the light-receiving element.
  • the organic EL element and the organic photodiode can be formed on the same substrate. Therefore, an organic photodiode can be built into a display device that uses an organic EL element.
  • display unit 162 has one or both of an imaging function and a sensing function. For example, in addition to displaying an image using all of the sub-pixels of display device 50D, some of the sub-pixels can provide light as a light source, some other sub-pixels can perform light detection, and the remaining sub-pixels can display an image.
  • the display device 50D can capture an image using the light receiving element.
  • the image sensor can be used to capture images for personal authentication using a fingerprint, palm print, iris, pulse shape (including vein shape and artery shape), face, etc.
  • the light receiving element can also be used as a touch sensor (also called a direct touch sensor) or a non-contact sensor (also called a hover sensor, hover touch sensor, or touchless sensor).
  • a touch sensor can detect an object (such as a finger, hand, or pen) when the display device and the object are in direct contact with each other.
  • a non-contact sensor can detect an object even if the object does not touch the display device.
  • the light receiving element 130S has a pixel electrode 111S on an insulating layer 235, a functional layer 113S on the pixel electrode 111S, and a common electrode 115 on the functional layer 113S.
  • Light Lin is incident on the functional layer 113S from outside the display device 50D.
  • the pixel electrode 111S is electrically connected to the conductive layer 112b of the transistor 205S through openings provided in the insulating layer 106, the insulating layer 218, and the insulating layer 235.
  • the ends of the pixel electrode 111S are covered by an insulating layer 237.
  • the common electrode 115 is a continuous film that is provided in common to the light receiving element 130S, the light emitting element 130R (not shown), the light emitting element 130G, and the light emitting element 130B.
  • the common electrode 115 that is shared by the light emitting element and the light receiving element is electrically connected to the conductive layer 123 provided in the connection portion 140.
  • the functional layer 113S has at least an active layer (also called a photoelectric conversion layer).
  • the active layer includes a semiconductor.
  • the semiconductor include inorganic semiconductors such as silicon, and organic semiconductors including organic compounds.
  • an organic semiconductor is used as the semiconductor of the active layer.
  • the light-emitting layer and the active layer can be formed by the same method (for example, vacuum deposition method), which is preferable because the manufacturing equipment can be shared.
  • the functional layer 113S may further include a layer containing a material with high hole transport properties, a material with high electron transport properties, or a bipolar material, as a layer other than the active layer.
  • the functional layer 113S may further include a layer containing a material with high hole injection properties, a hole blocking material, a material with high electron injection properties, or an electron blocking material.
  • the materials that can be used in the light-emitting element described above can be used for the functional layer 113S.
  • the light receiving element may be made of either a low molecular weight compound or a high molecular weight compound, and may contain an inorganic compound.
  • the layers constituting the light receiving element may be formed by a deposition method (including a vacuum deposition method), a transfer method, a printing method, an inkjet method, a coating method, or the like.
  • the display device 50D shown in Figures 23B and 23C has a layer 353 having a light receiving element, a circuit layer 355, and a layer 357 having a light emitting element between the substrate 151 and the substrate 152.
  • Layer 353 has, for example, light receiving element 130S.
  • Layer 357 has, for example, light emitting elements 130R, 130G, and 130B.
  • the circuit layer 355 has a circuit that drives the light receiving element and a circuit that drives the light emitting element.
  • the circuit layer 355 has, for example, transistors 205R, 205G, and 205B.
  • the circuit layer 355 may be provided with one or more of a switch, a capacitance, a resistance, a wiring, a terminal, and the like.
  • Figure 23B shows an example in which the light receiving element 130S is used as a touch sensor. As shown in Figure 23B, light emitted by the light emitting element in layer 357 is reflected by a finger 352 that touches the display device 50D, and the light receiving element in layer 353 detects the reflected light. This makes it possible to detect that the finger 352 has touched the display device 50D.
  • Figure 23C shows an example in which the light receiving element 130S is used as a non-contact sensor. As shown in Figure 23C, light emitted by the light emitting element in layer 357 is reflected by a finger 352 that is close to (i.e., not in contact with) the display device 50D, and the light receiving element in layer 353 detects the reflected light.
  • Display device 50E] 24A is an example of a display device to which an MML (metal maskless) structure is applied, that is, the display device 50E has light-emitting elements fabricated without using a fine metal mask.
  • MML metal maskless
  • the island-shaped light-emitting layer in the light-emitting element of a display device to which the MML structure is applied is formed by depositing a light-emitting layer on one surface and then processing it using a photolithography method. This makes it possible to realize a high-definition display device or a display device with a high aperture ratio, which has been difficult to achieve until now. Furthermore, since the light-emitting layer can be made separately for each color, a display device with extremely vivid images, high contrast, and high display quality can be realized.
  • a display device is composed of three types of light-emitting elements, one that emits blue light, one that emits green light, and one that emits red light
  • the deposition of the light-emitting layer and processing by photolithography can be repeated three times to form three types of island-shaped light-emitting layers.
  • Devices with an MML structure can be manufactured without using a metal mask, and therefore can exceed the upper limit of resolution resulting from the alignment accuracy of the metal mask. Furthermore, when devices are manufactured without using a metal mask, the equipment required for manufacturing the metal mask and the process of cleaning the metal mask can be eliminated. Furthermore, since the same or similar equipment as that used to manufacture transistors can be used for photolithography processing, there is no need to introduce special equipment to manufacture devices with an MML structure. In this way, the MML structure makes it possible to keep manufacturing costs low, and is therefore suitable for mass production of devices.
  • a display device to which the MML structure is applied there is no need to artificially increase the resolution by applying a special pixel arrangement such as a Pentile arrangement, so it is possible to realize a display device with high resolution (for example, 500 ppi or more, 1000 ppi or more, 2000 ppi or more, 3000 ppi or more, or 5000 ppi or more) with a so-called stripe arrangement in which R, G, and B sub-pixels are each arranged in one direction.
  • a special pixel arrangement such as a Pentile arrangement
  • the layered structure from the substrate 151 to the insulating layer 235, and the layered structure from the protective layer 131 to the substrate 152 are similar to those of the display device 50A, and therefore will not be described.
  • light-emitting elements 130R, 130G, and 130B are provided on an insulating layer 235.
  • the light-emitting element 130R has a conductive layer 124R on the insulating layer 235, a conductive layer 126R on the conductive layer 124R, a layer 133R on the conductive layer 126R, a common layer 114 on the layer 133R, and a common electrode 115 on the common layer 114.
  • the light-emitting element 130R shown in FIG. 24A emits red light (R).
  • the layer 133R has a light-emitting layer that emits red light.
  • the layer 133R and the common layer 114 can be collectively referred to as an EL layer.
  • one or both of the conductive layer 124R and the conductive layer 126R can be referred to as a pixel electrode.
  • the light-emitting element 130G has a conductive layer 124G on the insulating layer 235, a conductive layer 126G on the conductive layer 124G, a layer 133G on the conductive layer 126G, a common layer 114 on the layer 133G, and a common electrode 115 on the common layer 114.
  • the light-emitting element 130G shown in FIG. 24A emits green light (G).
  • the layer 133G has a light-emitting layer that emits green light.
  • the layer 133G and the common layer 114 can be collectively referred to as an EL layer.
  • one or both of the conductive layer 124G and the conductive layer 126G can be referred to as a pixel electrode.
  • the light-emitting element 130B has a conductive layer 124B on the insulating layer 235, a conductive layer 126B on the conductive layer 124B, a layer 133B on the conductive layer 126B, a common layer 114 on the layer 133B, and a common electrode 115 on the common layer 114.
  • the light-emitting element 130B shown in FIG. 24A emits blue light (B).
  • the layer 133B has a light-emitting layer that emits blue light.
  • the layer 133B and the common layer 114 can be collectively referred to as an EL layer.
  • one or both of the conductive layer 124B and the conductive layer 126B can be referred to as a pixel electrode.
  • layers provided in an island shape for each light-emitting element are indicated as layer 133B, layer 133G, or layer 133R, and a layer shared by multiple light-emitting elements is indicated as common layer 114.
  • the layers 133R, 133G, and 133B may be referred to as island-shaped EL layers or EL layers formed in an island shape, without including the common layer 114.
  • Layer 133R, layer 133G, and layer 133B are separated from each other.
  • the EL layer in an island shape for each light-emitting element, it is possible to suppress leakage current between adjacent light-emitting elements. This makes it possible to prevent unintended light emission caused by crosstalk, and to realize a display device with extremely high contrast.
  • layers 133R, 133G, and 133B are all shown to have the same film thickness, but this is not limited to this. Each of layers 133R, 133G, and 133B may have a different film thickness.
  • the conductive layer 124R is electrically connected to the conductive layer 112b of the transistor 205R through openings provided in the insulating layer 106, the insulating layer 218, and the insulating layer 235.
  • the conductive layer 124G is electrically connected to the conductive layer 112b of the transistor 205G
  • the conductive layer 124B is electrically connected to the conductive layer 112b of the transistor 205B.
  • the conductive layers 124R, 124G, and 124B are formed to cover the openings provided in the insulating layer 235.
  • Layer 128 is embedded in the recesses of the conductive layers 124R, 124G, and 124B, respectively.
  • Layer 128 has a function of planarizing the recesses of conductive layers 124R, 124G, and 124B.
  • Conductive layers 126R, 126G, and 126B that are electrically connected to conductive layers 124R, 124G, and 124B are provided on conductive layers 124R, 124G, and 124B and layer 128. It is preferable to use a conductive layer that functions as a reflective electrode for conductive layer 124R and conductive layer 126R.
  • layers 133R, 133G, and 133B are formed by processing using a photolithography method. Therefore, if layer 128 is not used and conductive layers 126R, 126G, and 126B are not provided, films that become layers 133R, 133G, and 133B will also be formed in the recesses of conductive layers 124R, 124G, and 124B. At this time, there is a risk that the film located in the recesses will not be etched and residues will accumulate. Therefore, it is preferable to flatten the surfaces on which layers 133R, 133G, and 133B are formed using layer 128 and conductive layers 126R, 126G, and 126B.
  • the portion where layer 128 is provided is covered with insulating layer 125 and insulating layer 127 so that it becomes a non-light-emitting region, but this is not limited to this.
  • display device 50F by configuring the portion where layer 128 is provided not to be covered with insulating layer 125 and insulating layer 127, the regions overlapping with the recesses of conductive layers 124R, 124G, and 124B can also be used as light-emitting regions, and the aperture ratio of the pixel can be increased.
  • Layer 128 may be an insulating layer or a conductive layer.
  • Various inorganic insulating materials, organic insulating materials, and conductive materials can be used as appropriate for layer 128.
  • layer 128 is preferably formed using an insulating material, and is particularly preferably formed using an organic insulating material.
  • the organic insulating material that can be used for insulating layer 237 described above can be applied to layer 128.
  • FIG. 24A shows an example in which the top surface of layer 128 has a flat portion, but the shape of layer 128 is not particularly limited.
  • the top surface of layer 128 can have at least one of a convex curved surface, a concave curved surface, and a flat surface.
  • the height of the upper surface of layer 128 and the height of the upper surface of conductive layer 124R may be the same or approximately the same, or may be different from each other.
  • the height of the upper surface of layer 128 may be lower or higher than the height of the upper surface of conductive layer 124R.
  • the end of the conductive layer 126R may be aligned with the end of the conductive layer 124R, or may cover the side of the end of the conductive layer 124R.
  • the ends of the conductive layer 124R and the conductive layer 126R preferably have a tapered shape.
  • the ends of the conductive layer 124R and the conductive layer 126R preferably have a tapered shape with a taper angle greater than 0 degrees and less than 90 degrees.
  • the layer 133R provided along the side of the pixel electrode has an inclined portion.
  • Conductive layers 124G, 126G and conductive layers 124B, 126B are similar to conductive layers 124R, 126R, so detailed description will be omitted.
  • conductive layer 126R The upper and side surfaces of conductive layer 126R are covered by layer 133R. Similarly, the upper and side surfaces of conductive layer 126G are covered by layer 133G, and the upper and side surfaces of conductive layer 126B are covered by layer 133B. Therefore, the entire area in which conductive layers 126R, 126G, and 126B are provided can be used as the light-emitting area of light-emitting elements 130R, 130G, and 130B, thereby increasing the aperture ratio of the pixel.
  • a common layer 114 is provided on layers 133R, 133G, 133B, and insulating layers 125 and 127, and a common electrode 115 is provided on common layer 114.
  • Common layer 114 and common electrode 115 are each a continuous film provided in common to multiple light-emitting elements.
  • the insulating layer 237 shown in FIG. 21A and the like is not provided between the conductive layer 126R and the layer 133R.
  • the display device 50E does not have an insulating layer (also called a partition, bank, spacer, etc.) that contacts the pixel electrode and covers the upper end of the pixel electrode. Therefore, the distance between adjacent light-emitting elements can be made extremely narrow. This makes it possible to provide a high-definition or high-resolution display device.
  • a mask for forming the insulating layer is not required, which reduces the manufacturing cost of the display device.
  • each of the layers 133R, 133G, and 133B has a light-emitting layer.
  • Each of the layers 133R, 133G, and 133B preferably has a light-emitting layer and a carrier transport layer (electron transport layer or hole transport layer) on the light-emitting layer.
  • each of the layers 133R, 133G, and 133B preferably has a light-emitting layer and a carrier block layer (hole block layer or electron block layer) on the light-emitting layer.
  • each of the layers 133R, 133G, and 133B preferably has a light-emitting layer, a carrier block layer on the light-emitting layer, and a carrier transport layer on the carrier block layer. Since the surfaces of the layers 133R, 133G, and 133B are exposed during the manufacturing process of the display device, by providing one or both of the carrier transport layer and the carrier block layer on the light-emitting layer, it is possible to suppress exposure of the light-emitting layer to the outermost surface and reduce damage to the light-emitting layer. This can improve the reliability of the light-emitting element.
  • the common layer 114 has, for example, an electron injection layer or a hole injection layer.
  • the common layer 114 may have an electron transport layer and an electron injection layer stacked together, or a hole transport layer and a hole injection layer stacked together.
  • the common layer 114 may not be provided. In that case, the common electrode 115 is provided in contact with layers 133R, 133G, 133B, insulating layer 127, insulating layer 125, etc.
  • Insulating layer 125 covers the sides of layers 133R, 133G, and 133B via insulating layer 125.
  • the insulating layer 125 is preferably in contact with the side surfaces of the layers 133R, 133G, and 133B. By configuring the insulating layer 125 to be in contact with the layers 133R, 133G, and 133B, peeling of the layers 133R, 133G, and 133B can be prevented, and the reliability of the light-emitting element can be improved.
  • the insulating layer 127 is provided on the insulating layer 125 so as to fill the recesses in the insulating layer 125. It is preferable that the insulating layer 127 covers at least a portion of the side surface of the insulating layer 125.
  • the gap between adjacent island-shaped layers can be filled, so that the large unevenness in height difference on the surface on which the layers (e.g., the carrier injection layer and the common electrode) are formed on the island-shaped layers can be reduced, making the surface flatter. Therefore, the coverage of the carrier injection layer, the common electrode, etc. can be improved.
  • the layers e.g., the carrier injection layer and the common electrode
  • the common layer 114 and the common electrode 115 are provided on the layers 133R, 133G, 133B, the insulating layer 125, and the insulating layer 127. Before the insulating layer 125 and the insulating layer 127 are provided, there is a step between the region where the pixel electrode and the island-shaped EL layer are provided and the region (region between the light-emitting elements) where the pixel electrode and the island-shaped EL layer are not provided. In the display device of one embodiment of the present invention, the step can be flattened by having the insulating layer 125 and the insulating layer 127, and the coverage of the common layer 114 and the common electrode 115 can be improved. Therefore, poor connection due to step disconnection can be suppressed. In addition, it is possible to suppress an increase in electrical resistance due to local thinning of the common electrode 115 caused by the step.
  • the upper surface of the insulating layer 127 preferably has a shape with high flatness.
  • the upper surface of the insulating layer 127 may have at least one of a flat surface, a convex curved surface, and a concave curved surface.
  • the upper surface of the insulating layer 127 preferably has a convex curved shape with a large radius of curvature.
  • the insulating layer 125 can be an insulating layer containing an inorganic material.
  • an inorganic insulating film such as an oxide insulating film, a nitride insulating film, an oxynitride insulating film, and a nitride oxide insulating film can be used for the insulating layer 125. Specific examples of these inorganic insulating films are as described above.
  • the insulating layer 125 may have a single layer structure or a laminated structure. In particular, aluminum oxide is preferable because it has a high selectivity with respect to the EL layer in etching and has a function of protecting the EL layer in the formation of the insulating layer 127 described later.
  • the insulating layer 125 may have a laminated structure of a film formed by the ALD method and a film formed by the sputtering method.
  • the insulating layer 125 may have a laminated structure of, for example, an aluminum oxide film formed by the ALD method and a silicon nitride film formed by the sputtering method.
  • the insulating layer 125 preferably has a function as a barrier insulating layer against at least one of water and oxygen.
  • the insulating layer 125 preferably has a function of suppressing the diffusion of at least one of water and oxygen.
  • the insulating layer 125 preferably has a function of capturing or fixing (also called gettering) at least one of water and oxygen.
  • the insulating layer 125 functions as a barrier insulating layer, making it possible to suppress the intrusion of impurities (typically at least one of water and oxygen) that may diffuse from the outside into each light-emitting element. This configuration makes it possible to provide a highly reliable light-emitting element and further a highly reliable display device.
  • impurities typically at least one of water and oxygen
  • the insulating layer 125 preferably has a low impurity concentration. This can prevent impurities from entering the EL layer from the insulating layer 125 and causing deterioration of the EL layer. In addition, by lowering the impurity concentration in the insulating layer 125, the barrier properties against at least one of water and oxygen can be improved. For example, it is desirable that the insulating layer 125 has a sufficiently low hydrogen concentration or a sufficiently low carbon concentration, preferably both.
  • the insulating layer 127 provided on the insulating layer 125 has the function of flattening the unevenness of the insulating layer 125 formed between adjacent light-emitting elements. In other words, the presence of the insulating layer 127 has the effect of improving the flatness of the surface on which the common electrode 115 is formed.
  • an insulating layer containing an organic material can be suitably used.
  • the organic material it is preferable to use a photosensitive resin, for example, a photosensitive resin composition containing an acrylic resin.
  • acrylic resin does not only refer to polymethacrylic acid ester or methacrylic resin, but may refer to acrylic polymers in a broad sense.
  • the insulating layer 127 may be made of acrylic resin, polyimide resin, epoxy resin, imide resin, polyamide resin, polyimideamide resin, silicone resin, siloxane resin, benzocyclobutene resin, phenol resin, or precursors of these resins.
  • the insulating layer 127 may be made of organic materials such as polyvinyl alcohol (PVA), polyvinyl butyral, polyvinylpyrrolidone, polyethylene glycol, polyglycerin, pullulan, water-soluble cellulose, or alcohol-soluble polyamide resin.
  • PVA polyvinyl alcohol
  • the photosensitive resin may be a photoresist.
  • the photosensitive resin may be either a positive-type material or a negative-type material.
  • the insulating layer 127 may be made of a material that absorbs visible light. By absorbing light emitted from the light-emitting element with the insulating layer 127, it is possible to suppress leakage of light from the light-emitting element to an adjacent light-emitting element through the insulating layer 127 (stray light). This can improve the display quality of the display device. In addition, since the display quality can be improved without using a polarizing plate in the display device, it is possible to reduce the weight and thickness of the display device.
  • Materials that absorb visible light include materials containing pigments such as black, materials containing dyes, resin materials with light absorbing properties (such as polyimide), and resin materials that can be used in color filters (color filter materials).
  • resin materials that can be used in color filters color filter materials.
  • by mixing three or more colors of color filter materials it is possible to create a resin layer that is black or close to black.
  • Display device 50F] 24B shows an example of a cross section of the display unit 162 of the display device 50F.
  • the display device 50F is different from the display device 50E mainly in that a light-emitting element having a layer 133 and a colored layer (such as a color filter) are used in each subpixel of each color.
  • the configuration shown in FIG. 24B can be combined with the region including the FPC 172, the circuit portion 164, the laminated structure from the substrate 151 to the insulating layer 235 of the display unit 162, the connection portion 140, and the configuration of the end portion shown in FIG. 24A.
  • the display device 50F shown in FIG. 24B has light emitting elements 130R, 130G, and 130B, a colored layer 132R that transmits red light, a colored layer 132G that transmits green light, and a colored layer 132B that transmits blue light.
  • the light emitted by the light-emitting element 130R is extracted as red light to the outside of the display device 50F via the colored layer 132R.
  • the light emitted by the light-emitting element 130G is extracted as green light to the outside of the display device 50F via the colored layer 132G.
  • the light emitted by the light-emitting element 130B is extracted as blue light to the outside of the display device 50F via the colored layer 132B.
  • Each of the light-emitting elements 130R, 130G, and 130B has a layer 133. These three layers 133 are formed in the same process and from the same material. In addition, these three layers 133 are separated from each other. By providing an island-shaped EL layer for each light-emitting element, it is possible to suppress leakage current between adjacent light-emitting elements. This makes it possible to prevent unintended light emission due to crosstalk, and to realize a display device with extremely high contrast.
  • the light-emitting elements 130R, 130G, and 130B shown in FIG. 24B emit white light.
  • the white light emitted by the light-emitting elements 130R, 130G, and 130B passes through the colored layers 132R, 132G, and 132B to obtain light of the desired color.
  • the light-emitting elements 130R, 130G, and 130B shown in FIG. 24B emit blue light.
  • the layer 133 has one or more light-emitting layers that emit blue light.
  • the blue light emitted by the light-emitting element 130B can be extracted.
  • a color conversion layer is provided between the light-emitting element 130R or the light-emitting element 130G and the substrate 152, so that the blue light emitted by the light-emitting element 130R or the light-emitting element 130G can be converted into light with a longer wavelength, and red or green light can be extracted.
  • Display device 50G A display device 50G shown in FIG. 25 differs from the display device 50F mainly in that it is a bottom emission type display device.
  • Light emitted by the light-emitting element is emitted toward the substrate 151. It is preferable to use a material that is highly transparent to visible light for the substrate 151. On the other hand, the translucency of the material used for the substrate 152 does not matter.
  • FIG. 25 shows an example in which the light-shielding layer 117 is provided on the substrate 151, the insulating layer 153 is provided on the light-shielding layer 117, and the transistors 205D, 205R (not shown), 205G, and 205B are provided on the insulating layer 153.
  • the colored layers 132R, 132G, and 132B are provided on the insulating layer 218, and the insulating layer 235 is provided on the colored layers 132R, 132G, and 132B.
  • the light-emitting element 130R which overlaps with the colored layer 132R, has a conductive layer 124R, a conductive layer 126R, a layer 133, a common layer 114, and a common electrode 115.
  • the light-emitting element 130G which overlaps with the colored layer 132G, has a conductive layer 124G, a conductive layer 126G, a layer 133, a common layer 114, and a common electrode 115.
  • the light-emitting element 130B which overlaps with the colored layer 132B, has a conductive layer 124B, a conductive layer 126B, a layer 133, a common layer 114, and a common electrode 115.
  • the conductive layers 124R, 124G, 124B, 126R, 126G, and 126B are each made of a material that is highly transparent to visible light. It is preferable to use a material that reflects visible light for the common electrode 115. In a bottom emission display device, a low resistance metal or the like can be used for the common electrode 115, so that voltage drops caused by the resistance of the common electrode 115 can be suppressed, and high display quality can be achieved.
  • the transistor of one embodiment of the present invention can be miniaturized and its occupation area can be reduced, so that in a display device with a bottom emission structure, the aperture ratio of a pixel can be increased or the pixel size can be reduced.
  • the electronic device of this embodiment has a display device of one embodiment of the present invention in a display portion.
  • the display device of one embodiment of the present invention can easily achieve high definition and high resolution. Therefore, the display device can be used in the display portion of various electronic devices.
  • the semiconductor device of one embodiment of the present invention can also be applied to portions other than the display portion of electronic devices.
  • portions other than the display portion of electronic devices For example, by using the semiconductor device of one embodiment of the present invention in a control portion of an electronic device, it is possible to reduce power consumption, which is preferable.
  • Examples of electronic devices include electronic devices with relatively large screens such as television sets, desktop or notebook personal computers, computer monitors, digital signage, large game machines such as pachinko machines, as well as digital cameras, digital video cameras, digital photo frames, mobile phones, portable game machines, personal digital assistants, and audio playback devices.
  • the display device of one embodiment of the present invention can be used favorably in electronic devices having a relatively small display unit, since it is possible to increase the resolution.
  • electronic devices include wristwatch-type and bracelet-type information terminals (wearable devices), as well as wearable devices that can be worn on the head, such as VR devices such as head-mounted displays, glasses-type AR devices, and MR devices.
  • the display device of one embodiment of the present invention preferably has an extremely high resolution such as HD (1280 x 720 pixels), FHD (1920 x 1080 pixels), WQHD (2560 x 1440 pixels), WQXGA (2560 x 1600 pixels), 4K (3840 x 2160 pixels), or 8K (7680 x 4320 pixels).
  • an extremely high resolution such as HD (1280 x 720 pixels), FHD (1920 x 1080 pixels), WQHD (2560 x 1440 pixels), WQXGA (2560 x 1600 pixels), 4K (3840 x 2160 pixels), or 8K (7680 x 4320 pixels).
  • HD 1280 x 720 pixels
  • FHD (1920 x 1080 pixels
  • WQHD 2560 x 1440 pixels
  • WQXGA 2560 x 1600 pixels
  • 4K 3840 x 2160 pixels
  • 8K 8K
  • the pixel density (resolution) of the display device of one embodiment of the present invention is preferably 100 ppi or more, preferably 300 ppi or more, more preferably 500 ppi or more, more preferably 1000 ppi or more, more preferably 2000 ppi or more, more preferably 3000 ppi or more, more preferably 5000 ppi or more, and even more preferably 7000 ppi or more.
  • the display device can support various screen ratios such as 1:1 (square), 4:3, 16:9, and 16:10.
  • the electronic device of this embodiment may have a sensor (including the function of sensing, detecting, or measuring force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemicals, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared light).
  • a sensor including the function of sensing, detecting, or measuring force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemicals, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared light).
  • the electronic device of this embodiment can have various functions. For example, it can have a function to display various information (still images, videos, text images, etc.) on the display unit, a touch panel function, a function to display a calendar, date or time, etc., a function to execute various software (programs), a wireless communication function, a function to read out programs or data recorded on a recording medium, etc.
  • a function to display various information still images, videos, text images, etc.
  • a touch panel function a function to display a calendar, date or time, etc.
  • a function to execute various software (programs) a wireless communication function
  • a function to read out programs or data recorded on a recording medium etc.
  • FIG. 26A to 26F An example of a wearable device that can be worn on the head will be described using Figures 26A to 26F.
  • These wearable devices have at least one of the following functions: a function to display AR content, a function to display VR content, a function to display SR content, and a function to display MR content.
  • a function to display AR content a function to display AR content
  • VR content a function to display VR content
  • SR content a function to display SR content
  • MR content a function to display MR content
  • the electronic device 700A shown in FIG. 26A has a pair of display panels 751, a pair of housings 721, a communication unit (not shown), a pair of mounting units 723, a control unit (not shown), an imaging unit (not shown), a pair of optical members 753, a frame 757, and a pair of nose pads 758.
  • the display device of one embodiment of the present invention can be applied to the display panel 751. Therefore, the electronic device can display with extremely high resolution.
  • the semiconductor device of one embodiment of the present invention can be applied to the control unit (not shown). This can reduce the power consumption of the electronic device.
  • Electronic device 700A can project an image displayed on display panel 751 onto display area 756 of optical member 753. Because optical member 753 is translucent, the user can see the image displayed in the display area superimposed on a transmitted image visually recognized through optical member 753. Therefore, electronic device 700A is an electronic device capable of AR display.
  • the electronic device 700A may be provided with a camera capable of capturing an image in front of it as an imaging unit.
  • the electronic device 700A may be provided with an acceleration sensor such as a gyro sensor, so that the electronic device 700A can detect the orientation of the user's head and display an image corresponding to that orientation in the display area 756.
  • the communication unit has a wireless communication device, and can supply video signals and the like via the wireless communication device.
  • a connector can be provided to which a cable through which a video signal and a power supply potential can be connected.
  • the electronic device 700A is also provided with a battery, which can be charged wirelessly and/or wired.
  • the housing 721 may be provided with a touch sensor module.
  • the touch sensor module has a function of detecting that the outer surface of the housing 721 is touched.
  • the touch sensor module can detect a tap operation or a slide operation by the user and execute various processes. For example, a tap operation can execute processes such as pausing or resuming a video, and a slide operation can execute processes such as fast-forwarding or rewinding. Furthermore, by providing a touch sensor module on each of the two housings 721, the range of operations can be expanded.
  • touch sensors can be used as the touch sensor module.
  • various types can be adopted, such as a capacitance type, a resistive film type, an infrared type, an electromagnetic induction type, a surface acoustic wave type, and an optical type.
  • Electronic device 800A shown in FIG. 26B and electronic device 800B shown in FIG. 26C each have a pair of display units 820, a housing 821, a communication unit 822, a pair of mounting units 823, a control unit 824, a pair of imaging units 825, and a pair of lenses 832.
  • a display device can be applied to the display portion 820. Therefore, an electronic device capable of displaying images with extremely high resolution can be obtained. This allows a user to feel a high sense of immersion.
  • a semiconductor device can be applied to the control portion 824. This allows the power consumption of the electronic device to be reduced.
  • the display unit 820 is provided inside the housing 821 at a position that can be seen through the lens 832. In addition, by displaying different images on the pair of display units 820, it is also possible to perform three-dimensional display using parallax.
  • Each of the electronic devices 800A and 800B can be considered electronic devices for VR.
  • a user wearing the electronic device 800A or the electronic device 800B can view the image displayed on the display unit 820 through the lens 832.
  • Electric device 800A and electronic device 800B each preferably have a mechanism that can adjust the left-right positions of lens 832 and display unit 820 so that they are optimally positioned according to the position of the user's eyes. Also, it is preferable that they have a mechanism that adjusts the focus by changing the distance between lens 832 and display unit 820.
  • the mounting unit 823 allows the user to mount the electronic device 800A or electronic device 800B on the head. Note that in FIG. 26B and other figures, the mounting unit 823 is shaped like the temples of glasses, but is not limited to this. The mounting unit 823 only needs to be wearable by the user, and may be shaped like a helmet or band, for example.
  • the imaging unit 825 has a function of acquiring external information.
  • the data acquired by the imaging unit 825 can be output to the display unit 820.
  • An image sensor can be used for the imaging unit 825.
  • multiple cameras may be provided to support multiple angles of view, such as telephoto and wide angle.
  • a distance measuring sensor capable of measuring the distance to an object
  • the imaging unit 825 is one aspect of the detection unit.
  • the detection unit for example, an image sensor or a distance image sensor such as a LIDAR (Light Detection and Ranging) can be used.
  • LIDAR Light Detection and Ranging
  • the electronic device 800A may have a vibration mechanism that functions as a bone conduction earphone.
  • a vibration mechanism that functions as a bone conduction earphone.
  • a configuration having such a vibration mechanism can be applied to one or more of the display unit 820, the housing 821, and the wearing unit 823. This makes it possible to enjoy video and audio by simply wearing the electronic device 800A without the need for separate audio equipment such as headphones, earphones, or speakers.
  • Each of the electronic devices 800A and 800B may have an input terminal.
  • the input terminal can be connected to a cable that supplies a video signal from a video output device or the like, and power for charging a battery provided within the electronic device.
  • the electronic device of one embodiment of the present invention may have a function of wireless communication with the earphone 750.
  • the earphone 750 has a communication unit (not shown) and has a wireless communication function.
  • the earphone 750 can receive information (e.g., audio data) from the electronic device through the wireless communication function.
  • the electronic device 700A shown in FIG. 26A has a function of transmitting information to the earphone 750 through the wireless communication function.
  • the electronic device may also have an earphone unit.
  • the electronic device 800B shown in FIG. 26C has an earphone unit 827.
  • the earphone unit 827 and the control unit 824 may be configured to be connected to each other by wire.
  • a portion of the wiring connecting the earphone unit 827 and the control unit 824 may be disposed inside the housing 821 or the mounting unit 823.
  • the earphone unit 827 and the mounting unit 823 may also have a magnet. This allows the earphone unit 827 to be fixed to the mounting unit 823 by magnetic force, which is preferable as it makes storage easier.
  • the electronic device may have an audio output terminal to which earphones or headphones can be connected.
  • the electronic device may also have one or both of an audio input terminal and an audio input mechanism.
  • a sound collection device such as a microphone can be used as the audio input mechanism.
  • the electronic device may be endowed with the functionality of a so-called headset.
  • Figures 26D and 26E show perspective views of a goggle-type electronic device 850A for VR.
  • Figures 26D and 26E show an example in which a pair of curved display devices 840 (display device 840_R and display device 840_L) are included in a housing 845.
  • Electronic device 850A also includes a motion detection unit 841, a gaze detection unit 842, a calculation unit 843, a communication unit 844, a lens 848, an operation button 851, a wearing device 854, a sensor 855, a dial 856, and the like.
  • the user can see one display device per eye. This allows high-resolution images to be displayed even when performing 3D display using parallax.
  • the display device 840 is curved in an arc shape roughly centered on the user's eye. This allows the user to see more natural images because the distance from the user's eye to the display surface of the display device 840 is constant.
  • the user's eyes can be configured to be located in the normal direction of the display surface of the display device 840, so that the effect can be essentially ignored, especially in the horizontal direction, and more realistic images can be displayed.
  • lens 848 is located between display device 840 and the user's eyes.
  • FIG. 26E shows an example having dial 856 for changing the position of the lens to adjust visibility. Note that if electronic device 850A has an autofocus function, it does not need to have dial 856 for adjusting visibility.
  • Figure 26F shows a goggle-type electronic device 850B that has one display device 840. This configuration makes it possible to reduce the number of parts.
  • the display device 840 can display two images, one for the right eye and one for the left eye, side by side in two left and right areas. This makes it possible to display a stereoscopic image using binocular parallax. Note that the display device 840 may display two different images side by side using parallax, or may display two identical images side by side without using parallax.
  • a single image visible to both eyes may be displayed across the entire area of the display device 840. This allows a panoramic image to be displayed across both ends of the field of view, enhancing realism.
  • a display device can be applied to the display device 840.
  • the display device according to one embodiment of the present invention has extremely high definition, so that even if the image is enlarged using the lens 848, the user cannot see the pixels, and a more realistic image can be displayed.
  • the electronic device 6500 shown in FIG. 27A is a portable information terminal that can be used as a smartphone.
  • the electronic device 6500 has a housing 6501, a display unit 6502, a power button 6503, a button 6504, a speaker 6505, a microphone 6506, a camera 6507, a light source 6508, and a control device 6509.
  • the electronic device 6520 shown in FIG. 27B is a portable information terminal that can be used as a tablet terminal.
  • the electronic device 6520 has a housing 6501, a display unit 6502, a button 6504, a speaker 6505, a microphone 6506, a camera 6507, a control device 6509, and a connection terminal 6519.
  • the display portion 6502 has a touch panel function.
  • the control device 6509 has, for example, one or more selected from a CPU, a GPU, and a storage device.
  • the semiconductor device of one embodiment of the present invention can be used for one or both of the display portion 6502 and the control device 6509.
  • Figure 27C is a schematic cross-sectional view including the end of the housing 6501 of the electronic device 6500 or electronic device 6520 on the microphone 6506 side.
  • a transparent protective member 6510 is provided on the display surface side of the housing 6501, and a display panel 6511, optical members 6512, a touch sensor panel 6513, a printed circuit board 6517, a battery 6518, etc. are arranged in the space surrounded by the housing 6501 and the protective member 6510.
  • the display panel 6511, the optical member 6512, and the touch sensor panel 6513 are fixed to the protective member 6510 by an adhesive layer (not shown).
  • a part of the display panel 6511 is folded back, and the FPC 6515 is connected to the folded back part.
  • An IC 6516 is mounted on the FPC 6515.
  • the FPC 6515 is connected to a terminal provided on a printed circuit board 6517.
  • the flexible display of one embodiment of the present invention can be applied to the display panel 6511. Therefore, an extremely lightweight electronic device can be realized.
  • the display panel 6511 is extremely thin, a large-capacity battery 6518 can be mounted while keeping the thickness of the electronic device small.
  • a connection portion with the FPC 6515 on the back side of the pixel portion, an electronic device with a narrow frame can be realized.
  • Figure 27D shows an example of a television device.
  • a display unit 7000 is built into a housing 7101.
  • the housing 7101 is supported by a stand 7103.
  • a display device can be applied to the display portion 7000.
  • the television device 7100 shown in FIG. 27D can be operated using an operation switch provided on the housing 7101 and a separate remote control 7111.
  • the display unit 7000 may be provided with a touch sensor, and the television device 7100 may be operated by touching the display unit 7000 with a finger or the like.
  • the remote control 7111 may have a display unit that displays information output from the remote control 7111.
  • the channel and volume can be operated using the operation keys or touch panel provided on the remote control 7111, and the image displayed on the display unit 7000 can be operated.
  • the television device 7100 is configured to include a receiver and a modem.
  • the receiver can receive general television broadcasts.
  • by connecting to a wired or wireless communication network via the modem it is also possible to perform one-way (from sender to receiver) or two-way (between sender and receiver, or between receivers, etc.) information communication.
  • FIG. 27E shows an example of a laptop personal computer.
  • the laptop personal computer 7200 includes a housing 7211, a keyboard 7212, a pointing device 7213, an external connection port 7214, and a control device 7215.
  • a display portion 7000 is incorporated in the housing 7211.
  • the control device 7215 includes, for example, one or more selected from a CPU, a GPU, and a storage device.
  • the semiconductor device of one embodiment of the present invention can be used for one or both of the display portion 7000 and the control device 7215.
  • FIG. 27F and 27G An example of digital signage is shown in Figures 27F and 27G.
  • the digital signage 7300 shown in FIG. 27F has a housing 7301, a display unit 7000, a speaker 7303, and the like. It can also have LED lamps, operation keys (including a power switch or an operation switch), connection terminals, various sensors, a microphone, and the like.
  • Figure 27G shows a digital signage 7400 attached to a cylindrical pole 7401.
  • the digital signage 7400 has a display unit 7000 that is provided along the curved surface of the pole 7401.
  • a display device of one embodiment of the present invention can be applied to the display portion 7000.
  • the larger the display unit 7000 the more information can be provided at one time. Also, the larger the display unit 7000, the more easily it catches people's attention, which can increase the advertising effectiveness of, for example, advertisements.
  • a touch panel By applying a touch panel to the display unit 7000, not only can images or videos be displayed on the display unit 7000, but the user can also intuitively operate it, which is preferable. Furthermore, when used to provide information such as route information or traffic information, the intuitive operation can improve usability.
  • the digital signage 7300 or the digital signage 7400 can be linked via wireless communication with an information terminal 7311 or an information terminal 7411 such as a smartphone carried by a user.
  • advertising information displayed on the display unit 7000 can be displayed on the screen of the information terminal 7311 or the information terminal 7411.
  • the display on the display unit 7000 can be switched by operating the information terminal 7311 or the information terminal 7411.
  • the digital signage 7300 or the digital signage 7400 can be made to execute a game using the screen of the information terminal 7311 or the information terminal 7411 as an operating means (controller). This allows an unspecified number of users to participate in and enjoy the game at the same time.
  • the semiconductor device and display device of one embodiment of the present invention can be applied to the vicinity of the driver's seat of an automobile, which is a moving object.
  • Figure 28A is a diagram showing the area around the windshield in the interior of a car.
  • Figure 28A shows display panels 9001a, 9001b, and 9001c attached to the dashboard, and display panel 9001d attached to a pillar.
  • the display panels 9001a to 9001c can provide various information by displaying navigation information, a speedometer, a tachometer, mileage, a fuel gauge, gear status, air conditioning settings, and the like.
  • the display items and layouts displayed on the display panels can be changed as appropriate to suit the user's preferences, improving the design.
  • the display panels 9001a to 9001c can also be used as lighting devices.
  • the display panel 9001d can display images from an imaging means installed on the vehicle body to complement the field of view (blind spots) blocked by the pillars. In other words, by displaying images from an imaging means installed on the outside of the vehicle, blind spots can be complemented and safety can be increased. In addition, by displaying images that complement the invisible parts, safety can be confirmed more naturally and without any sense of discomfort.
  • the display panel 9001d can also be used as a lighting device.
  • FIG 28B is a perspective view showing a wristwatch-type mobile information terminal 9200.
  • the mobile information terminal 9200 can be used as, for example, a smart watch (registered trademark).
  • the display surface of the display unit 9001 is curved, and display can be performed along the curved display surface.
  • the mobile information terminal 9200 can also perform hands-free conversation by communicating with, for example, a headset capable of wireless communication.
  • the mobile information terminal 9200 can also perform data transmission with other information terminals and charge itself through a connection terminal 9006. Note that charging may be performed by wireless power supply.
  • the mobile information terminal 9200 shown in FIG. 28B has a housing 9000, a display unit 9001, a speaker 9003, operation keys 9005 (including a power switch or an operation switch), a connection terminal 9006, a sensor 9007 (including a function to sense, detect, or measure force, displacement, position, speed, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared), a microphone 9008, etc.
  • FIG. 28C is a perspective view showing a mobile information terminal 9101.
  • the mobile information terminal 9101 can be used as, for example, a smartphone.
  • the mobile information terminal 9101 has a housing 9000, a display unit 9001, and operation keys 9005.
  • the mobile information terminal 9101 may have the above-mentioned speaker, a connection terminal, a sensor, and the like.
  • the mobile information terminal 9101 can display text and image information on multiple surfaces.
  • FIG. 28C shows an example in which three icons 9050 are displayed. Information 9051 shown in a dashed rectangle can also be displayed on another surface of the display unit 9001.
  • Examples of the information 9051 include notifications of incoming e-mail, SNS, telephone calls, etc., the title of e-mail or SNS, the sender's name, the date and time, the remaining battery level, and radio wave strength.
  • an icon 9050 or the like may be displayed at the position where the information 9051 is displayed.
  • FIG. 28D is a perspective view showing a mobile information terminal 9102.
  • the mobile information terminal 9102 has a housing 9000 and a display unit 9001.
  • the mobile information terminal 9101 may have the above-mentioned speaker, operation keys, connection terminals, sensors, and the like.
  • the mobile information terminal 9102 has a function of displaying information on three or more sides of the display unit 9001.
  • information 9052, information 9053, and information 9054 are displayed on different sides.
  • a user can check information 9053 displayed in a position that can be observed from above the mobile information terminal 9102 while storing the mobile information terminal 9102 in a breast pocket of clothes. The user can check the display without taking the mobile information terminal 9102 out of the pocket and determine, for example, whether to answer a call.
  • FIG 28E is a perspective view of a foldable mobile information terminal 9201.
  • the mobile information terminal 9201 has a housing 9000a, a housing 9000b, a display portion 9001, and an operation button 9056.
  • the housings 9000a and 9000b are connected by a hinge 9055, which allows the device to be folded in half.
  • the display portion 9001 of the mobile information terminal 9201 is supported by two housings (housing 9000a and housing 9000b) connected by a hinge 9055.
  • Figures 28F to 28H are perspective views showing a foldable mobile information terminal 9202. Also, Figure 28F is a perspective view of the mobile information terminal 9202 in an unfolded state, Figure 28H is a folded state, and Figure 28G is a perspective view of a state in the process of changing from one of Figures 28F and 28H to the other. In this way, the mobile information terminal 9202 can be folded into three.
  • the display unit 9001 of the mobile information terminal 9202 is supported by three housings 9000 connected by hinges 9055.
  • the portable information terminal 9201 and the portable information terminal 9202 each have excellent portability when folded, and excellent display visibility when unfolded due to their seamless, large display areas.
  • the display device of one embodiment of the present invention can be applied to the display portion 9001.
  • the display portion 9001 can be bent with a radius of curvature of 0.1 mm or more and 150 mm or less.
  • impurity elements specifically boron and hydrogen
  • the evaluation method used was the transfer length method (TLM method).
  • an aluminum oxide film with a thickness of about 20 nm was formed as an undercoat film 303 on a glass substrate 301.
  • a copper film with a thickness of about 300 nm was formed as a conductive layer 304 on the base film 303, and an ITSO film with a thickness of about 100 nm was formed as a conductive layer 305 so as to cover the upper and side surfaces of the conductive layer 304.
  • the conductive layer 304 and the conductive layer 305 are layers that are assumed to be the upper electrodes of the source and drain electrodes of a transistor (for example, the conductive layer 112b in FIG. 1B, etc.).
  • an IGZO film with a thickness of about 20 nm was formed as the metal oxide layer 306 on the base film 303 and the conductive layer 305.
  • the metal oxide layer 306 was provided so as to have both a portion in contact with the conductive layer 305 and a portion in contact with the base film 303.
  • the metal oxide layer 306 is a layer that is assumed to be a semiconductor layer of a transistor (for example, the semiconductor layer 108 in FIG. 1B, etc.).
  • a silicon oxynitride film with a thickness of about 50 nm was formed as an insulating layer 307 so as to cover the conductive layer 305 and the metal oxide layer 306.
  • the insulating layer 307 is a layer intended to serve as a gate insulating layer of a transistor (for example, the insulating layer 106 in FIG. 1B, etc.).
  • an impurity element 308 was supplied to the metal oxide layer 306 through the insulating layer 307.
  • a plasma ion doping apparatus without a mass separation mechanism was used to supply the impurity element 308.
  • the acceleration voltage was 30 kV, 40 kV, or 50 kV depending on the sample.
  • the dose amount was 5 ⁇ 10 14 ions/cm 2 , 1 ⁇ 10 15 ions/cm 2 , or 2 ⁇ 10 15 ions/cm 2 depending on the sample.
  • the impurity element 308 was not supplied to the comparative sample.
  • a heat treatment was performed for 1 hour in a dry air (CDA: Clean Dry Air) atmosphere.
  • the heat treatment temperature was 250°C, 350°C, 400°C, or 450°C depending on the sample.
  • the sheet resistance of the metal oxide layer 306 and the contact resistance between the metal oxide layer 306 and the conductive layer 305 of the sample and the comparative sample prepared as described above were evaluated using the TLM method.
  • sample A sample A
  • sample B sample B
  • sample C a comparative sample a to which the impurity element 308 was not supplied.
  • the dose amount was 5 ⁇ 10 14 ions/cm 2 for sample A, 1 ⁇ 10 15 ions/cm 2 for sample B, and 2 ⁇ 10 15 ions/cm 2 for sample C.
  • the acceleration voltage was 50 kV for all samples. Note that no heat treatment was performed after the impurity element 308 was supplied.
  • Figure 30A shows the sheet resistance (unit: ⁇ / ⁇ ) of the metal oxide layer 306 for three types of samples (sample A, sample B, and sample C) and comparative sample a.
  • FIG. 30B shows the contact resistance (unit: ⁇ cm 2 ) between the metal oxide layer 306 and the conductive layer 305 in the three types of samples (samples A, B, and C) and the comparative sample a.
  • the sample A had lower sheet resistance and contact resistance. Also, compared to the comparative sample a, the sample B had lower contact resistance. Also, compared to the comparative sample a, the sample C had higher sheet resistance and contact resistance.
  • sample A sample A, sample D, and sample E
  • the acceleration voltage was 50 kV for sample A, 30 kV for sample D, and 40 kV for sample E.
  • the dose amount was 5 ⁇ 10 ions/cm 2 for all samples. Note that no heat treatment was performed after the impurity element 308 was supplied.
  • Figure 31A shows the sheet resistance (unit: ⁇ / ⁇ ) of the metal oxide layer 306 for three types of samples (sample A, sample D, and sample E) and comparative sample a.
  • FIG. 31B shows the contact resistance (unit: ⁇ cm 2 ) between the metal oxide layer 306 and the conductive layer 305 in the three types of samples (samples A, D, and E) and the comparative sample a.
  • the impurity element 308 was supplied to the five types of samples, and the acceleration voltage was 50 kV and the dose amount was 1 ⁇ 10 15 ions/cm 2 for all of them.
  • the heat treatment was not performed on the sample B, and the heat treatment was performed on the samples F to I at different temperatures (250° C., 350° C., 400° C., or 450° C.).
  • the impurity element 308 was not supplied to the five types of comparative samples.
  • the heat treatment was not performed on the comparative sample a, and the heat treatment was performed on the comparative samples b to e at different temperatures (250° C., 350° C., 400° C., or 450° C.).
  • Figure 32A shows the sheet resistance (unit: ⁇ / ⁇ ) of the metal oxide layer 306 for five types of samples (samples B, F to I) and five types of comparison samples (comparison samples a to e).
  • FIG. 32B shows the contact resistance (unit: ⁇ cm 2 ) between the metal oxide layer 306 and the conductive layer 305 in five types of samples (sample B, and samples F to I) and five types of comparative samples (comparative samples a to e ).
  • a transistor corresponding to the structure of transistor 100B shown in Figures 6A and 6B was manufactured. Specifically, after forming an insulating layer 109 on a substrate, conductive layer 112a, insulating layer 110 (insulating layers 110b, 110c, 110d, and 110e), conductive layer 112b, semiconductor layer 108, insulating layer 106, and conductive layer 104 were formed. Furthermore, an insulating layer (not shown) covering the transistor was formed.
  • sample J a transistor according to one embodiment of the present invention was fabricated by supplying impurity elements (specifically, boron and hydrogen) to the semiconductor layer 108.
  • impurity elements specifically, boron and hydrogen
  • comparative sample f a comparative transistor was also fabricated in which no impurity elements were supplied to the semiconductor layer 108.
  • a silicon nitride film having a thickness of about 30 nm was formed as an insulating layer 109 on a glass substrate (corresponding to the substrate 102) by the PECVD method (FIG. 11A).
  • the insulating layer 109 was formed using SiH4 gas, N2 gas, and NH3 gas at a substrate temperature of 200° C.
  • an ITSO film with a thickness of about 10 nm was formed on the insulating layer 109 by sputtering, and a Cu film with a thickness of about 100 nm was formed by sputtering.
  • an ITSO film with a thickness of about 100 nm was formed by sputtering and processed to form the conductive layer 112a (FIG. 11A).
  • the cross-sectional shape of the conductive layer 112a produced in this example corresponds to the cross-sectional shape of the conductive layer 112a shown in FIG. 7C.
  • insulating films 110bf and 110cf were formed in sequence on the insulating layer 109 and conductive layer 112a ( Figure 11B).
  • the insulating film 110bf was a silicon nitride film having a thickness of about 200 nm, which was formed by the PECVD method. Specifically, the insulating film 110bf was formed by using SiH4 gas and N2 gas under the condition of a substrate temperature of 350°C.
  • the insulating layer 109 is formed using NH3 gas, whereas the insulating film 110bf is formed without using NH3 gas.
  • the insulating layer 109 is formed under conditions that result in a higher hydrogen content than the insulating film 110bf.
  • the insulating film 110cf was a silicon oxynitride film having a thickness of about 100 nm, which was formed by PECVD. Specifically, the insulating film 110cf was formed using SiH4 gas and N2O gas at a substrate temperature of 350°C.
  • a plasma treatment was performed for 240 seconds in an atmosphere containing N 2 O gas.
  • an In-Ga-Zn oxide film having a thickness of about 20 nm was formed on the insulating film 110cf to form a metal oxide layer 149 ( FIG. 11C ).
  • a heat treatment was performed in a CDA atmosphere at 250° C. for 1 hour. Then, the metal oxide layer 149 was removed by wet etching.
  • insulating films 110df and 110ef were formed on insulating film 110cf ( Figure 11D).
  • the insulating film 110df was a silicon nitride film having a thickness of about 20 nm, which was formed by PECVD. Specifically, the insulating film 110df was formed by using SiH4 gas and N2 gas at a substrate temperature of 350°C.
  • the insulating film 110ef was a silicon nitride film having a thickness of about 30 nm, which was formed by PECVD. Specifically, the insulating film 110ef was formed using SiH4 gas, N2 gas, and NH3 gas at a substrate temperature of 200°C.
  • the insulating film 110ef is formed using NH3 gas, whereas the insulating film 110df is formed without using NH3 gas, and the insulating film 110ef is formed under conditions in which the hydrogen content is higher than that of the insulating film 110df.
  • an ITSO film with a thickness of about 100 nm was formed on the insulating film 110ef by sputtering (see conductive film 112f in FIG. 12A), and then processed to form a conductive layer 112B (FIG. 12B).
  • the conductive layer 112B was processed using a wet etching method to form the conductive layer 112b having the opening 143. Furthermore, the insulating films 110bf, 110cf, 110df, and 110ef were processed using a dry etching method to form the insulating layer 110 (insulating layers 110b, 110c, 110d, and 110e) having the opening 141 (FIG. 12C).
  • a metal oxide film 108f was formed on the insulating layer 110e and the conductive layer 112b ( Figure 13A).
  • an In-Ga-Zn oxide film with a thickness of about 20 nm was formed.
  • a silicon oxynitride film having a thickness of about 50 nm was formed by PECVD as the insulating layer 106.
  • the insulating layer 106 was formed using SiH4 gas and N2O gas under the condition of a substrate temperature of 350°C.
  • the impurity element 189 was supplied to the semiconductor layer 108 through the insulating layer 106 ( FIG. 14A ).
  • a plasma ion doping apparatus without a mass separation mechanism was used to supply the impurity element 189.
  • the acceleration voltage was 40 kV, and the dose amount was 1 ⁇ 10 15 ions/cm 2. Note that the impurity element 189 was not supplied to the comparative sample f.
  • a titanium film with a thickness of approximately 50 nm and an aluminum film with a thickness of approximately 200 nm were deposited in this order by sputtering.
  • a silicon nitride oxide film with a thickness of about 300 nm was formed by PECVD as an insulating layer covering the transistor. Then, a heat treatment was performed at 300°C for 1 hour in a CDA atmosphere. After that, a polyimide film with a thickness of about 1.5 ⁇ m was formed as a planarization film (not shown), and a heat treatment was performed at 250°C for 1 hour in a nitrogen atmosphere.
  • Figure 33A shows the Id-Vg characteristics of the transistor of comparison sample f.
  • Figure 33B shows the Id-Vg characteristics of the transistor of sample J.
  • Figures 33A and 33B show the results when the conductive layer 112b functions as a source electrode.
  • the vertical axis represents the drain current (Id (A)) and the horizontal axis represents the gate voltage (Vg (V)). Note that in Figures 33A and 33B, the Id-Vg characteristic results of eight transistors are shown overlapping each other.
  • the transistor fabricated in this example was an n-channel type transistor, fabricated to have a channel length (L) of 0.1 ⁇ m and a channel width (W) of 6.3 ⁇ m (diameter of opening: 2 ⁇ m ⁇ ).
  • the measurement conditions for the Id-Vg characteristics of the transistor were as follows: the voltage (gate voltage (Vg)) applied to the conductive layer 104 was -10 V to +10 V in 0.1 V increments. The voltage applied to the source electrode (source voltage (Vs)) was 0 V (common), and the voltage applied to the drain electrode (drain voltage (Vd)) was 0.1 V and 1.2 V. The upper limit of Id measurement was 1 mA.
  • the transistor fabricated in this example exhibited good switching characteristics and was confirmed to have a large on-current.
  • Vth The average threshold voltage (Vth) was 0.75 V for comparative sample f and 0.48 V for sample J.
  • the 3 ⁇ of Vth was 0.36 V for comparative sample f and 0.27 V for sample J.
  • ⁇ indicates the standard deviation.
  • Figure 34 shows a comparison of the on-current between comparative sample f and sample J.
  • the gate voltage (Vg) was 10 V and the drain voltage (Vd) was 0.1 V
  • the on-current (Ion) was 4.5 ⁇ A for comparative sample f and 10.5 ⁇ A for sample J, which is 2.3 times higher.
  • the gate bias stress test (GBT test) was used as the stress test.
  • the GBT test is a type of accelerated test that can quickly evaluate changes in transistor characteristics that occur over a long period of use.
  • the substrate on which the transistor is formed was held at 60°C, and a voltage of 0 V was applied to the source and drain of the transistor, and a voltage of 20 V was applied to the gate, and this state was held for 3600 seconds. Note that because this is a test in which a positive voltage is applied to the gate, hereafter this will be referred to as a PBTS (Positive Bias Temperature Stress) test.
  • PBTS Positive Bias Temperature Stress
  • the threshold voltage variation ( ⁇ Vth) in the PBTS test was 0.67V.
  • a transistor according to one embodiment of the present invention which is manufactured by adding impurity elements (specifically, boron and hydrogen) to the semiconductor layer 108, exhibits normally-off characteristics, has a large on-current, and is highly reliable, even with a channel length as small as 0.1 ⁇ m.
  • impurity elements specifically, boron and hydrogen

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013048216A (ja) * 2011-07-22 2013-03-07 Semiconductor Energy Lab Co Ltd 半導体装置
JP2016146422A (ja) * 2015-02-09 2016-08-12 株式会社ジャパンディスプレイ 表示装置
JP2016149552A (ja) * 2015-02-11 2016-08-18 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作製方法
US20170330924A1 (en) * 2016-05-12 2017-11-16 Samsung Display Co Ltd Thin film transistor including a vertical channel and display apparatus using the same

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013048216A (ja) * 2011-07-22 2013-03-07 Semiconductor Energy Lab Co Ltd 半導体装置
JP2016146422A (ja) * 2015-02-09 2016-08-12 株式会社ジャパンディスプレイ 表示装置
JP2016149552A (ja) * 2015-02-11 2016-08-18 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作製方法
US20170330924A1 (en) * 2016-05-12 2017-11-16 Samsung Display Co Ltd Thin film transistor including a vertical channel and display apparatus using the same

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