WO2024204472A1 - 半導体発光素子、及びその製造方法、並びにモノリシックｌｅｄアレイ及びその製造方法 - Google Patents

半導体発光素子、及びその製造方法、並びにモノリシックｌｅｄアレイ及びその製造方法 Download PDF

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WO2024204472A1
WO2024204472A1 PCT/JP2024/012517 JP2024012517W WO2024204472A1 WO 2024204472 A1 WO2024204472 A1 WO 2024204472A1 JP 2024012517 W JP2024012517 W JP 2024012517W WO 2024204472 A1 WO2024204472 A1 WO 2024204472A1
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light
layer
emitting
laminated
substrate
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French (fr)
Japanese (ja)
Inventor
素顕 岩谷
好伸 末広
雄太 今泉
竜成 齋藤
直希 長谷川
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Meijo University
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Meijo University
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/81—Bodies
    • H10H20/813—Bodies having a plurality of light-emitting regions, e.g. multi-junction LEDs or light-emitting devices having photoluminescent regions within the bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/81—Bodies
    • H10H20/819—Bodies characterised by their shape, e.g. curved or truncated substrates
    • H10H20/82—Roughened surfaces, e.g. at the interface between epitaxial layers

Definitions

  • the present invention relates to semiconductor light emitting devices and methods for their manufacture for use in multicolor displays, and to monolithic LED arrays and methods for their manufacture.
  • This application claims priority based on Japanese Patent Application No. 2023-049293 and Japanese Patent Application No. 2023-049380, filed in Japan on March 27, 2023, the contents of which are incorporated herein by reference.
  • Patent Document 1 discloses a configuration in which LEDs that emit light of different emission wavelengths are arranged on a substrate, with grooves formed between adjacent LEDs.
  • Patent Document 2 discloses a micro LED panel that is rectangular in plan view, with multiple micro LED pixels arranged in rows and columns.
  • the pixel needs to be configured within an angular range approximately equal to the resolution of the viewer's eyes.
  • the micro LED panel of Patent Document 2 has a concern that light generated by the LEDs may enter adjacent micro LED pixels through the n-type semiconductor layer, causing micro LED pixels that are not lit to appear as if they are lit.
  • the present invention has been made in consideration of the above-mentioned conventional situation, and has as its object to provide a semiconductor light-emitting element that improves the color mixing ability of light from LEDs having different emission wavelengths that constitute one pixel, and a manufacturing method thereof. Another object of the present invention is to provide a monolithic LED array that suppresses pseudo-illumination, in which unlit micro LED pixels appear to be lit, and a manufacturing method thereof.
  • the semiconductor light emitting device of the first invention is A substrate; a buffer layer laminated on the substrate and having a higher refractive index than the substrate; an epitaxial layer having a refractive index higher than that of the substrate, the epitaxial layer being stacked on the buffer layer and having a plurality of light-emitting layers having different emission wavelengths; Equipped with the epitaxial layer has a plurality of pixels partitioned by partition grooves extending to at least the buffer layer;
  • the pixel includes a plurality of sub-pixels having different emission wavelengths, the subpixel is formed by removing a portion of the epitaxial layer so as not to expose the buffer layer, exposing a power supply layer that supplies power to a predetermined light-emitting layer, and providing an electrode thereon;
  • the sub-pixel radiates to the outside the light generated inside and the light incident from the adjacent sub-pixel.
  • the subpixels of the semiconductor light-emitting element of the first invention are configured to radiate to the outside, via the substrate, light generated internally (from themselves) and light generated in and incident on adjacent subpixels, so that light of different wavelengths generated in the individual light-emitting layers within the pixel is radiated to the outside from each subpixel.
  • This improves color mixing compared to Patent Document 1, in which adjacent subpixels are partitioned by grooves that reach the sapphire substrate, preventing light from passing between adjacent subpixels.
  • a method for manufacturing a semiconductor light emitting device includes the steps of: A substrate; a buffer layer laminated on the substrate and having a higher refractive index than the substrate; an epitaxial layer having a refractive index higher than that of the substrate, the epitaxial layer being stacked on the buffer layer and having a plurality of light-emitting layers having different emission wavelengths; Equipped with the epitaxial layer has a plurality of pixels partitioned by partition grooves extending to at least the buffer layer; The pixel comprises a plurality of sub-pixels, In the subpixel, a part of the epitaxial layer is removed so as not to expose the buffer layer, and a power supply layer that supplies power to a predetermined light-emitting layer is exposed and an electrode is provided.
  • a method for manufacturing a semiconductor light emitting device comprising: The partition grooves are formed perpendicular to the substrate by a groove forming etching process using a laminated mask having an etching selectivity of 40 or more.
  • the groove width tends to widen, which makes it difficult to increase the pixel surface area density. Furthermore, if the pixel density is fixed, a wider groove width reduces the light-emitting area, raising concerns about the impact on electrical and optical characteristics.
  • the partition grooves are formed perpendicular to the substrate through an etching process using a stacked mask with an etching selectivity ratio of 40 or more. This prevents the groove width from becoming wider in plan view due to the taper angle, and therefore reduces concerns about the impact on electrical and optical characteristics.
  • the monolithic LED array of the third invention comprises: A substrate; A buffer layer laminated on the substrate; an epitaxial layer having a light emitting layer laminated on the buffer layer; Equipped with the epitaxial layer has a plurality of pixels partitioned by partition grooves extending to the substrate;
  • the light emitting device further includes a light absorbing member disposed in the partition groove and configured to absorb light generated from the light emitting layer.
  • a partition groove is provided that reaches the substrate, and a light absorbing material is disposed in this groove, so that the light irradiated to the light absorbing material in the partition groove can be absorbed while preventing light from reaching adjacent pixels via the buffer layer or epitaxial layer. This makes it possible to suppress pseudo lighting.
  • the method for manufacturing a monolithic LED array includes the steps of: A substrate; A buffer layer laminated on the substrate; an epitaxial layer having a light emitting layer laminated on the buffer layer; Equipped with the epitaxial layer has a plurality of pixels partitioned by partition grooves extending to the substrate; a light absorbing member disposed in the partition groove and absorbing light generated from the light emitting layer, The step of disposing the light absorbing member in the partition groove is performed prior to the step of mounting the monolithic LED array.
  • the present invention employs the following configuration.
  • a substrate a buffer layer laminated on the substrate and having a higher refractive index than the substrate; an epitaxial layer having a refractive index higher than that of the substrate, the epitaxial layer being stacked on the buffer layer and having a plurality of light-emitting layers having different emission wavelengths; Equipped with the epitaxial layer has a plurality of pixels partitioned by partition grooves extending to at least the buffer layer;
  • the pixel includes a plurality of sub-pixels having different emission wavelengths, the subpixel is formed by removing a portion of the epitaxial layer so as not to expose the buffer layer, exposing a power supply layer that supplies power to a predetermined light-emitting layer, and providing an electrode thereon;
  • the sub-pixel is a semiconductor light-emitting element that radiates light generated inside and light incident from an adjacent sub-pixel to the outside.
  • the partition groove of the pixel reaches the substrate, The semiconductor light-emitting element according to [1], wherein each of the pixels is formed in an island shape on the substrate.
  • the pixel comprises a plurality of sub-pixels, In the semiconductor light-emitting device, a portion of the epitaxial layer is removed so as not to expose the buffer layer, and a power supply layer that supplies power to a predetermined light-emitting layer is exposed and an electrode is provided thereon,
  • [8] Further comprising a layered mask forming step of forming the layered mask using a fluoride gas; The method for manufacturing a semiconductor light-emitting element described in [7], wherein the laminated mask is composed of a combination of an oxide film formed of any one of SiO2 , Al2O3 , or Si3N4 that is laminated on the epitaxial layer, and a metal film formed of any one of Ni, Pt, or Cr that is laminated on the oxide film.
  • the monolithic LED array further comprises a light absorbing member disposed in the partition groove and configured to absorb light generated from the light emitting layer.
  • the epitaxial layer has a plurality of the light-emitting layers having different emission wavelengths
  • the pixel includes a plurality of sub-pixels having different emission wavelengths
  • the subpixel is formed by removing a portion of the epitaxial layer so as not to expose the buffer layer, and exposing a power supply layer that supplies power to the light-emitting layer and providing an electrode thereon.
  • the monolithic LED array according to [10] wherein the light-emitting layer to which power is supplied from the power supply layer is not continuous with the adjacent sub-pixels.
  • the epitaxial layer has a plurality of the light-emitting layers having different emission wavelengths
  • the pixel includes a plurality of sub-pixels having different emission wavelengths
  • [16] Further comprising a layered mask forming step of forming the layered mask using a fluoride gas, The method for manufacturing a monolithic LED array described in [ 15], wherein the laminated mask is composed of a combination of an oxide film made of any one of SiO2, Al2O3 , or Si3N4 that is laminated on the epitaxial layer, and a metal film made of any one of Ni, Pt, or Cr that is laminated on the oxide film.
  • a semiconductor laser comprising: a buffer layer; and an epitaxial layer laminated on the buffer layer and having a plurality of light-emitting layers having different emission wavelengths; the epitaxial layer has a plurality of pixels partitioned by partition grooves extending to at least the buffer layer;
  • the pixel includes a plurality of sub-pixels having different emission wavelengths, the subpixel is formed by removing a portion of the epitaxial layer so as not to expose the buffer layer, exposing a power supply layer that supplies power to a predetermined light-emitting layer, and providing an electrode thereon;
  • the sub-pixel is a semiconductor light-emitting element that radiates light generated inside and light incident from an adjacent sub-pixel to the outside.
  • [20] Further comprising a layered mask forming step of forming the layered mask using a fluoride gas, The method for manufacturing a semiconductor light-emitting element described in [19], wherein the laminated mask is composed of a combination of an oxide film made of any one of SiO2 , Al2O3 , or Si3N4 that is laminated on the epitaxial layer, and a metal film made of any one of Ni, Pt, or Cr that is laminated on the oxide film.
  • the present invention it is possible to provide a semiconductor light emitting device that improves the color mixing of light from LEDs having different emission wavelengths that constitute one pixel, and a manufacturing method thereof.
  • a monolithic LED array and a manufacturing method thereof that suppresses pseudo-illumination, in which unlit micro LED pixels appear to be lit.
  • FIG. 1 is a schematic diagram showing the positional relationship between a semiconductor light-emitting element mounted on a mounting board provided in VR goggles and the viewer's eyes.
  • 1 is a side view showing the structure of a semiconductor light emitting element according to Example 1A.
  • FIG. 1 is a perspective view showing a structure of a semiconductor light-emitting element according to Example 1A.
  • FIG. 2 is a partially enlarged plan view showing a pixel of the semiconductor light emitting device of Example 1A.
  • 1A to 1C are schematic diagrams showing a process for manufacturing the semiconductor light-emitting element of Example 1A.
  • FIG. 4 is a schematic diagram showing a process of forming partition grooves.
  • FIG. 1 is a side view showing a state in which the semiconductor light emitting element of Example 1A is mounted on a mounting substrate.
  • FIG. 2 is a schematic diagram showing paths of light generated from each light emitting layer of a semiconductor light emitting element mounted on a mounting substrate.
  • FIG. 2A and 2B show the state of the sapphire substrate of the semiconductor light-emitting element of Example 2A, where FIG. 2A is a plan view of the sapphire substrate on which protrusions are formed, and FIG. 2B is a side view of the sapphire substrate on which protrusions are formed.
  • 2 is a schematic diagram showing paths of light generated from each light-emitting layer in the semiconductor light-emitting element of Example 2A.
  • FIG. 13 is a side view of a semiconductor light-emitting element according to another embodiment, showing a state in which partition grooves are formed between adjacent sub-pixels.
  • FIG. 1B is a side view showing the structure of the monolithic LED array of Example 1B.
  • FIG. 1 is a perspective view showing the structure of a monolithic LED array according to Example 1B.
  • FIG. 1B is a partially enlarged plan view showing a pixel of the monolithic LED array of Example 1B.
  • FIG. 1 is a schematic diagram showing a process for manufacturing the monolithic LED array of Example 1B.
  • FIG. 4 is a schematic diagram showing a process of forming partition grooves.
  • FIG. 11 is a side view showing a state in which the monolithic LED array of Example 1B is mounted on a mounting substrate.
  • 1 is a schematic diagram showing the path of light emitted from a light-emitting layer of a monolithic LED array mounted on a mounting substrate.
  • FIG. 2 is a side view showing the structure of the monolithic LED array of Example 2B.
  • FIG. 11 is a perspective view showing the structure of a monolithic LED array according to Example 2B.
  • FIG. 11 is a partially enlarged plan view showing a pixel of the monolithic LED array of Example 2B.
  • FIG. 13 is a schematic diagram showing a process for manufacturing the monolithic LED array of Example 2B.
  • FIG. 11 is a side view showing a state in which the monolithic LED array of Example 2B is mounted on a mounting substrate.
  • the pixel partition grooves reach the substrate, and multiple pixels can be formed in an island shape on the substrate. In this case, it is possible to prevent light from leaking to adjacent pixels.
  • the light-emitting layer to which power is supplied from the power supply layer can be continuous with adjacent subpixels. In this case, light is generated from this light-emitting layer in the adjacent subpixels as well. This makes it possible to improve the color mixing of light.
  • the light-emitting layer to which power is supplied from the power supply layer does not have to be continuous with the adjacent subpixels.
  • static lighting is possible in addition to dynamic lighting.
  • each subpixel is formed to extend long in one direction, and can be aligned in a direction intersecting that direction.
  • the area in which each subpixel is adjacent to another can be increased, which facilitates the exchange of light between adjacent subpixels, and therefore makes it easier to enhance the effect of the subpixel radiating to the outside the light generated inside (from itself) and the light generated in and incident on an adjacent subpixel.
  • adjacent subpixels are partitioned by grooves that reach the sapphire substrate, which greatly restricts the movement of light between adjacent subpixels.
  • the substrate can be formed with projections and recesses.
  • the projections and recesses make it easier to diffuse light within the pixel.
  • the method further includes a step of forming a laminated mask using a fluoride gas
  • the laminated mask may be composed of a combination of an oxide film made of any of SiO2 , Al2O3 , and Si3N4 laminated on the epitaxial layer and a metal film made of any of Ni , Pt, and Cr laminated on the oxide film.
  • tapers are less likely to occur, and it is possible to more effectively form grooves perpendicular to the substrate.
  • Example 1A which is an embodiment of the semiconductor light-emitting element of the present invention, will be described with reference to Figures 1 to 8.
  • Example 1A The semiconductor light-emitting element 1 of Example 1A is used in a display device such as a VR goggle. As shown in FIG. 1, the semiconductor light-emitting element 1 used in the VR goggle 200 is disposed in front of the viewer's eye 202 with a lens 201 interposed therebetween. The distance between the semiconductor light-emitting element 1 and the viewer's eye 202 is approximately 5 cm. As shown in FIG. 2, the semiconductor light-emitting element 1 of Example 1A includes a sapphire substrate 10, a buffer layer 20, and an epitaxial layer 30. The semiconductor light-emitting element 1 is disposed such that the epitaxial layer 30 is on the opposite side of the viewer's eye 202 with respect to the sapphire substrate 10 (see FIG. 2). The light emitted by the epitaxial layer 30 passes through the sapphire substrate 10 and reaches the viewer's eye 202.
  • the sapphire substrate 10 is a plate-like sapphire having both sides polished to be flat.
  • the thickness of the sapphire substrate 10 is, for example, 300 ⁇ m.
  • the surface of the sapphire substrate 10 opposite the viewer's eye 202 is referred to as the top surface.
  • the surface of each layer opposite the viewer's eye 202 is also referred to as the top surface.
  • the buffer layer 20 is laminated on the sapphire substrate 10.
  • the buffer layer 20 has a thickness of, for example, 2 ⁇ m.
  • the buffer layer 20 is made of AlN, GaN, or the like, which is grown at a low temperature.
  • the epitaxial layer 30 is laminated on the upper surface of the buffer layer 20.
  • the epitaxial layer 30 has a first n-type layer 301, a first light-emitting layer 30B (light-emitting layer), a first p-type layer 302, a first tunnel junction layer 303, a second n-type layer 304, a second light-emitting layer 30G (light-emitting layer), a second p-type layer 305, a second tunnel junction layer 306, a third n-type layer 307, a third light-emitting layer 30R (light-emitting layer), a third p-type layer 308, a third tunnel junction layer 309, and a fourth n-type layer 310, which are laminated in this order.
  • the first n-type layer 301 is laminated on the upper surface of the buffer layer 20.
  • the thickness of the first n-type layer 301 is, for example, 2 ⁇ m.
  • the first n-type layer 301 is formed of, for example, GaN doped with n-type impurities such as Si.
  • the first light-emitting layer 30B is laminated on the upper surface of the first n-type layer 301.
  • the first light-emitting layer 30B is formed, for example, as a multiple quantum well.
  • the thickness of the first light-emitting layer 30B is, for example, 50 nm.
  • the first light-emitting layer 30B is configured to generate light with an emission wavelength (for example, 450 to 470 nm) corresponding to blue color.
  • the first p-type layer 302 is laminated on the upper surface of the first light-emitting layer 30B.
  • the thickness of the first p-type layer 302 is, for example, 180 nm.
  • the first p-type layer 302 is formed of, for example, GaN doped with p-type impurities such as Mg.
  • the first tunnel junction layer 303 is laminated on the upper surface of the first p-type layer 302.
  • the thickness of the first tunnel junction layer 303 is, for example, 25 nm.
  • the first tunnel junction layer 303 is formed by laminating an n++ GaN layer to which Si is highly doped and a p++ GaN layer to which Mg is highly doped.
  • n++ means a state in which n-type impurities are highly doped
  • p++ means a state in which p-type impurities are highly doped. Note that by providing a tunnel junction layer between the n-type semiconductor and the p-type semiconductor, it becomes possible to pass a current from the n-type semiconductor to the p-type semiconductor.
  • the second n-type layer 304 is laminated on the upper surface of the first tunnel junction layer 303.
  • the thickness of the second n-type layer 304 is, for example, 400 nm.
  • the second n-type layer 304 is formed of, for example, GaN doped with n-type impurities such as Si.
  • the second light-emitting layer 30G is laminated on the upper surface of the second n-type layer 304.
  • the second light-emitting layer 30G is formed, for example, as a multiple quantum well.
  • the thickness of the second light-emitting layer 30G is, for example, 50 nm.
  • the second light-emitting layer 30G is configured to generate light with an emission wavelength corresponding to green (for example, 500 to 570 nm).
  • the second p-type layer 305 is laminated on the upper surface of the second light-emitting layer 30G.
  • the thickness of the second p-type layer 305 is, for example, 180 nm.
  • the second p-type layer 305 is formed of, for example, GaN doped with p-type impurities such as Mg.
  • the second tunnel junction layer 306 is laminated on the upper surface of the second p-type layer 305.
  • the thickness of the second tunnel junction layer 306 is, for example, 25 nm.
  • the second tunnel junction layer 306 is formed by laminating an n++ GaN layer to which Si is highly doped and a p++ GaN layer to which Mg is highly doped.
  • the third n-type layer 307 is laminated on the upper surface of the second tunnel junction layer 306.
  • the third n-type layer 307 has a thickness of, for example, 400 nm.
  • the third n-type layer 307 is formed of, for example, GaN doped with n-type impurities such as Si.
  • the third light-emitting layer 30R is laminated on the upper surface of the third n-type layer 307.
  • the third light-emitting layer 30R is formed, for example, as a multiple quantum well.
  • the thickness of the third light-emitting layer 30R is, for example, 50 nm.
  • the third light-emitting layer 30R is configured to generate light with an emission wavelength corresponding to red (for example, 600 to 650 nm).
  • the third p-type layer 308 is laminated on the upper surface of the third light-emitting layer 30R.
  • the thickness of the third p-type layer 308 is, for example, 180 nm.
  • the third p-type layer 308 is formed of, for example, GaN doped with p-type impurities such as Mg.
  • the third tunnel junction layer 309 is laminated on the upper surface of the third p-type layer 308.
  • the thickness of the third tunnel junction layer 309 is, for example, 25 nm.
  • the third tunnel junction layer 309 is formed by laminating an n++ GaN layer to which Si is highly doped and a p++ GaN layer to which Mg is highly doped.
  • the fourth n-type layer 310 is laminated on the upper surface of the third tunnel junction layer 309.
  • the fourth n-type layer 310 has a thickness of, for example, 300 nm.
  • the fourth n-type layer 310 is formed of, for example, GaN doped with n-type impurities such as Si.
  • the semiconductor light emitting element 1 has a pixel 701 partitioned by a partitioning groove 80.
  • the pixel 701 has a plurality of sub-pixels 71.
  • the sub-pixels 71 have a red light emitting diode 71R, a green light emitting diode 71G, and a blue light emitting diode 71B.
  • the pixel 701 is formed in a square shape.
  • Each of the sub-pixels 71 of the red light emitting diode 71R, the green light emitting diode 71G, and the blue light emitting diode 71B is formed to extend long in one direction.
  • the red light emitting diode 71R, the green light emitting diode 71G, and the blue light emitting diode 71B are formed adjacent to each other in a direction perpendicular to the one direction.
  • the partition groove 80 is recessed (in the stacking direction 81) from the upper surface of the fourth n-type layer 310 toward the sapphire substrate 10, and its bottom surface reaches the upper surface of the sapphire substrate 10.
  • the partition groove 80 is formed perpendicular to the sapphire substrate 10.
  • the outer periphery of each pixel 701 is formed in an island shape on the upper surface of the sapphire substrate 10 by the partition groove 80.
  • the depth dimension of the partition groove 80 in the stacking direction 81 (see FIG. 2) (depth dimension from the upper surface of the fourth n-type layer 310) is approximately 6 ⁇ m.
  • the red light emitting diode 71R has a light emitting body 72 and a non-light emitting portion 73.
  • the light emitting body 72 has an upper surface of the fourth n-type layer 310 (the uppermost surface of the epitaxial layer 30).
  • the non-light emitting portion 73 is adjacent to the light emitting body 72 so as to be aligned in one direction.
  • the non-light emitting portion 73 has the third light emitting layer 30R to the fourth n-type layer 310 removed, and the third n-type layer 307 is exposed.
  • a positive electrode 31p which is an electrode 31, is laminated on the upper surface of the light emitting body 72 (the upper surface of the fourth n-type layer 310, which is a power supply layer from the p-type layer side to the third light emitting layer 30R).
  • a negative electrode 31n which is an electrode 31, is laminated on the upper surface of the non-light emitting portion 73 (the surface where the third n-type layer 307, which is a power supply layer from the n-type layer side to the third light emitting layer 30R, is exposed).
  • a circuit that passes electricity to the third light-emitting layer 30R is formed by a positive electrode 31p provided on the fourth n-type layer 310 and a negative electrode 31n provided on the third n-type layer 307.
  • the green light emitting diode 71G has a light emitting body 74 and a non-light emitting portion 75.
  • the light emitting body 74 is removed from the third light emitting layer 30R to the fourth n-type layer 310, and the third n-type layer 307 is exposed.
  • the non-light emitting portion 75 is adjacent to the light emitting body 74 so as to be aligned in one direction.
  • the non-light emitting portion 75 is removed from the second light emitting layer 30G to the fourth n-type layer 310, and the second n-type layer 304 is exposed.
  • a positive electrode 31p which is an electrode 31, is laminated on the upper surface of the light emitting body 74 (the surface where the third n-type layer 307, which is a power supply layer from the p-type layer side to the second light emitting layer 30G, is exposed).
  • a negative electrode 31n which is an electrode 31, is laminated on the upper surface of the non-light-emitting portion 75 (the surface on which the second n-type layer 304, which serves as a power supply layer from the n-type layer side to the second light-emitting layer 30G, is exposed).
  • a circuit for passing electricity to the second light-emitting layer 30G is formed by a positive electrode 31p provided in the third n-type layer 307 and a negative electrode 31n provided in the second n-type layer 304.
  • the second light-emitting layer 30G is continuous with the red light-emitting diode 71R, which is the adjacent sub-pixel 71, and is also included in the region of the red light-emitting diode 71R.
  • the blue light-emitting diode 71B has a light-emitting body portion 76 and a non-light-emitting portion 77.
  • the light-emitting body portion 76 has the second light-emitting layer 30G through the fourth n-type layer 310 removed, exposing the second n-type layer 304.
  • the non-light-emitting portion 77 is adjacent to the light-emitting body portion 76 and aligned in one direction.
  • the non-light-emitting portion 77 has the first light-emitting layer 30B through the fourth n-type layer 310 removed, exposing the first n-type layer 301.
  • a positive electrode 31p which is an electrode 31, is laminated on the upper surface of the light-emitting body portion 76 (the surface where the second n-type layer 304, which is the power supply layer from the p-type layer side to the first light-emitting layer 30B, is exposed).
  • a negative electrode 31n which is an electrode 31, is laminated on the upper surface of the non-light-emitting portion 77 (the surface where the first n-type layer 301, which is the power supply layer from the n-type layer side to the first light-emitting layer 30B, is exposed).
  • a circuit that supplies electricity to the first light-emitting layer 30B is formed by a positive electrode 31p provided on the second n-type layer 304 and a negative electrode 31n provided on the first n-type layer 301.
  • the first light-emitting layer 30B is continuous with the green light-emitting diode 71G, which is the adjacent sub-pixel 71, and is also included in the area of the green light-emitting diode 71G and the red light-emitting diode 71R.
  • each subpixel 71 a portion of the epitaxial layer 30 is removed to the extent that the buffer layer 20 is not exposed.
  • the power supply layer that supplies current from the p-type layer side and the n-type layer side of each of the first light-emitting layer 30B, the second light-emitting layer 30G, and the third light-emitting layer 30R is exposed.
  • An electrode 31 is provided on the exposed power supply layer. Note that even if the power supply layer is an n-type layer, a current can be passed from the n-type semiconductor to the p-type semiconductor by the tunnel junction layer. If a tunnel junction layer is not provided, it is necessary to take measures such as exposing the p-type layer as the power supply layer and forming an electrode 31.
  • the semiconductor light emitting element 1 is manufactured by performing a lamination process, a partition groove forming process, and a pixel forming process.
  • a buffer layer 20 and an epitaxial layer 30 are crystal-grown and laminated on the upper surface side of a sapphire substrate 10 using MOVPE (metal organic vapor phase epitaxy) as shown in Figure 5 (A).
  • MOVPE metal organic vapor phase epitaxy
  • partition grooves 80 are formed as shown in FIG. 5(B).
  • the partition groove forming process is composed of a layer mask forming process for forming vertical grooves, and a groove forming etching process.
  • a SiO2 film is formed as a lower layer film 51 on the entire upper surface of the epitaxial layer 30.
  • a Ni film is laminated as an upper layer film 52 on the lower layer film 51 in an area other than the area where the partition grooves 80 are formed.
  • the lower layer film 51 can be formed using, for example, a sputtering device.
  • the upper layer film 52 can be formed using, for example, a deposition device.
  • the laminated mask 50 consisting of the lower layer 51 and the upper layer 52 is a combination in which the etching selectivity of the material of the lower layer 51 to the material of the upper layer 52 is 40 or more in the etching process of the lower layer 51 described later. In the case of a combination of SiO2 and Ni, the etching selectivity is approximately 50.
  • the lower layer 51 oxides such as Al2O3 and nitrides such as Si3N4 can be used in addition to SiO2 .
  • As the upper layer 52 Pt, Cr , etc. can be used in addition to Ni.
  • a resist mask formed by commonly used lithography can be used. Specifically, a resist material is applied to the upper surface of the lower layer film 51 to form a resist film, and then a resist mask is formed in the region in which the partition groove 80 is to be formed. The upper layer film 52 is then laminated by vapor deposition on the exposed upper surface of the lower layer film 51 and on the upper surface of the resist mask. The resist mask is then removed, allowing the upper layer film 52 to be laminated in the regions other than the regions in which the partition groove 80 is to be formed, as shown in FIG. 6(B).
  • the lower layer 51 in the region where the partitioning groove 80 is to be formed and not covered by the upper layer 52 is removed by dry etching using CF4 , which is a fluoride gas.
  • CF4 which is a fluoride gas.
  • the etching rate of the lower layer 51 is higher than that of the upper layer 52, the side of the laminated mask 50 is formed to have an extremely small taper and to stand vertically. In this way, the laminated mask 50 is formed.
  • the etching for removing the lower layer 51 in the region where the partitioning groove 80 is to be formed may be performed using a fluoride gas such as SF6 or CHF3 instead of CF4 .
  • the groove forming etching process In the groove forming etching process, the buffer layer 20 and the epitaxial layer 30 in the region exposed and not covered by the laminate mask 50 are removed by dry etching using Cl2 as shown in FIG. 6D. The etching is performed to a depth reaching the upper surface of the sapphire substrate 10, and is stopped when the upper surface of the sapphire substrate 10 is reached. As a result, as shown in FIG. 5B, the partition grooves 80 whose peripheries reach the upper surface of the sapphire substrate 10 form island-shaped pixels 701 on the sapphire substrate 10. At this time, the partition grooves 80 can be formed into a deep, vertically cut shape by etching using the laminate mask 50.
  • the stack mask 50 is removed by hydrofluoric acid treatment. This completes the process of forming the partition grooves 80.
  • the partition grooves 80 are formed, forming a plurality of island-shaped pixels 701.
  • the angle that the wall surface of the partition groove 80 makes with the upper surface of the sapphire substrate 10 is 89 degrees or more, and it has been confirmed that the partition grooves 80 are formed almost vertically.
  • a resist mask is laminated on the epitaxial layer 30 in the region where the light-emitting body 72 is to be formed, and then the third light-emitting layer 30R to the fourth n-type layer 310 are removed by dry etching using Cl2 .
  • the region where the resist mask is laminated leaves the light-emitting body 72 in a protruding shape, and the region where the resist mask is not laminated exposes the third n-type layer 307.
  • the resist mask may be the same as that used when laminating the upper layer 52.
  • a resist mask is laminated on the regions where the light-emitting main body 72, the non-light-emitting portion 73, and the light-emitting main body 74 are to be formed. Then, dry etching is performed using Cl2 to remove the second light-emitting layer 30G to the third n-type layer 307 in the epitaxial layer 30 in the region where the resist mask is not laminated. As a result, as shown in FIG. 5D, the second n-type layer 304 is exposed in the region where the resist mask is not laminated.
  • a resist mask is laminated on the regions in which the light-emitting body 72, the non-light-emitting portion 73, the light-emitting body 74, the non-light-emitting portion 75, and the light-emitting body 76 are to be formed.
  • dry etching is performed using Cl2 to remove the first light-emitting layer 30B to the second n-type layer 304 in the epitaxial layer 30 in the region in which the resist mask is not laminated.
  • the first n-type layer 301 is exposed to become the non-light-emitting portion 77.
  • subpixels 71 are formed.
  • the semiconductor light-emitting element 1 thus formed is mounted on a mounting substrate 90 as shown in FIG. 7.
  • the mounting substrate 90 is made of, for example, Si.
  • FIG. 7 corresponds to the A-A cross section in FIG. 4.
  • the mounting substrate 90 has wiring 91 made of Cu formed thereon.
  • the positive electrodes 31p and negative electrodes 31n of the red light-emitting diode 71R, green light-emitting diode 71G, and blue light-emitting diode 71B are electrically connected to the wiring 91 via metal bumps 92.
  • the metal bumps 92 are made of, for example, an alloy of Au and Su. Note that the negative electrode 31n is not shown in FIG. 7.
  • the semiconductor light-emitting element 1 is driven by a dynamic lighting method.
  • a voltage is applied to a predetermined power supply layer of the epitaxial layer 30 of the semiconductor light-emitting element 1 via the mounting substrate 90.
  • a current flows to a predetermined light-emitting layer of each light-emitting layer (first light-emitting layer 30B, second light-emitting layer 30G, third light-emitting layer 30R), light is generated from the predetermined light-emitting layer.
  • each sub-pixel is sequentially lit for a short period of time. The viewer perceives them as if they are all lit at the same time.
  • the light-emitting layer of a specific sub-pixel 71 in the semiconductor light-emitting element 1 When the light-emitting layer of a specific sub-pixel 71 in the semiconductor light-emitting element 1 is turned on, the light that reaches the viewer is not only the sub-pixel 71 of this light-emitting layer, but also the light from other sub-pixels 71 within the pixel 701. Furthermore, when the light-emitting layers of other specific sub-pixels 71 are also turned on to light up multiple colors, light of multiple emission wavelengths reaches the viewer from the same sub-pixel 71.
  • the second light-emitting layer 30G when the second light-emitting layer 30G is turned on, as shown by the solid line in FIG. 8, a portion of the light (L1) generated in the second light-emitting layer 30G inside the green light-emitting diode 71G, which is one of the sub-pixels 71, passes through the buffer layer 20 and the sapphire substrate 10 and reaches the viewer's eye directly from the green light-emitting diode 71G.
  • a portion of the light generated in the second light-emitting layer 30G is incident on the adjacent sub-pixels 71, the red light-emitting diode 71R and the blue light-emitting diode 71B.
  • the second light-emitting layer 30G is continuous with the red light-emitting diode 71R, and the red light-emitting diode 71R also emits light. A portion of this light reaches the viewer's eyes from the red light-emitting diode 71R.
  • the first light-emitting layer 30B and the third light-emitting layer 30R are turned on. Then, just as when the second light-emitting layer 30G is turned on, a portion of the light (L1) generated inside the subpixel 71 and a portion of the light (L2) incident from the adjacent subpixel 71 in the pixel reach the viewer's eyes. Then, blue, green, and red light from each subpixel 71 reach the viewer's eyes.
  • the buffer layer 20 is made of AlN (refractive index 2.2) or GaN (refractive index 2.4), so reflection occurs at the interface with sapphire (refractive index 1.7).
  • the epitaxial layer 30 is made of GaN (refractive index 2.4) and the partition grooves 80 are air (refractive index 1.0), so reflection occurs at these interfaces. In either case, the epitaxial layer 30 on which the light-emitting layer is formed has a higher refractive index than the surrounding sapphire substrate 10 and partition grooves 80. For this reason, light incident at an angle equal to or greater than the critical angle is totally reflected.
  • no partition grooves are formed between adjacent subpixels 71, and adjacent subpixels 71 are continuous with high refractive index AlN or GaN. This makes it easy for light generated in each subpixel 71 to enter adjacent subpixels 71.
  • the partition grooves 80 that reach the sapphire substrate 10 the light generated in each subpixel 71 tends to remain within the pixel 701. Furthermore, the light generated in the subpixels 71 of each color tends to be repeatedly reflected within the pixel 701. This makes it easy for the light to reach the viewer's eyes from subpixels 71 other than the subpixel 71 from which the light was generated.
  • the semiconductor light-emitting element 1 can improve color mixing because each sub-pixel 71 emits light generated in other sub-pixels 71 within the pixel 701. Furthermore, the constraint of configuring one pixel 701 within an angular range approximately equal to the resolution of the viewer's eye can be reduced, making it possible to provide a semiconductor light-emitting element 1 that can perform color mixing even when the pixel size is large.
  • the semiconductor light emitting element 1 includes a sapphire substrate 10, a buffer layer 20 having a higher refractive index than the sapphire substrate 10 and stacked on the sapphire substrate 10, and an epitaxial layer 30 having a higher refractive index than the sapphire substrate 10 and stacked on the buffer layer 20, the epitaxial layer 30 having a plurality of light emitting layers (a first light emitting layer 30B, a second light emitting layer 30G, and a third light emitting layer 30R) having different emission wavelengths.
  • the epitaxial layer 30 has a plurality of pixels 701 partitioned by partition grooves 80 recessed in a stacking direction 81 and reaching the sapphire substrate 10.
  • the pixels 701 have different emission wavelengths.
  • the device has a plurality of sub-pixels 71, and in each sub-pixel 71, a portion of the epitaxial layer 30 is removed to the extent that the buffer layer 20 is not exposed, and an n-type layer (first n-type layer 301, second n-type layer 304, third n-type layer 307, fourth n-type layer 310) that serves as a power supply layer that supplies power to a predetermined light-emitting layer (first light-emitting layer 30B, second light-emitting layer 30G, third light-emitting layer 30R) is exposed and an electrode 31 is provided.
  • the sub-pixel 71 radiates to the outside light generated inside (from itself) and light generated in an adjacent sub-pixel 71 and incident from this sub-pixel 71.
  • the subpixels 71 of the semiconductor light-emitting element 1 are configured to radiate to the outside light generated internally (from themselves) and light generated in adjacent subpixels 71 and incident on these subpixels 71, so that light of different wavelengths generated in the individual light-emitting layers (first light-emitting layer 30B, second light-emitting layer 30G, third light-emitting layer 30R) within the pixel 701 is radiated to the outside from each subpixel 71.
  • This improves color mixing compared to Patent Document 1, in which adjacent subpixels are partitioned by grooves that reach the sapphire substrate, preventing light from traveling between adjacent subpixels.
  • the partition grooves 80 of the pixels 701 reach the upper surface of the sapphire substrate 10, and the pixels 701 are formed in an island shape on the sapphire substrate 10. This makes it possible to prevent light from leaking to adjacent pixels 701.
  • the first light-emitting layer 30B and the second light-emitting layer 30G which receive power from the power supply layer, are continuous with the adjacent sub-pixels 71. In this case, light is also generated from this light-emitting layer 30 in the adjacent sub-pixels 71. This improves the color mixing of the light.
  • Each subpixel 71 is formed to extend long in one direction along the top surface of the sapphire substrate 10, and is lined up in a direction intersecting that direction. With this configuration, the area in which the subpixels 71 are adjacent to each other can be increased, which makes it easier for light to be exchanged between adjacent subpixels 71, and therefore makes it easier to enhance the effect of the subpixel 71 radiating to the outside the light generated inside (from itself) and the light generated in and incident on the adjacent subpixel 71. In contrast, in the device of Patent Document 1, adjacent subpixels are partitioned by grooves that reach the sapphire substrate, which greatly restricts the movement of light between adjacent subpixels.
  • the method for manufacturing a semiconductor light emitting device includes a sapphire substrate, a buffer layer having a higher refractive index than the sapphire substrate and stacked on the sapphire substrate, and an epitaxial layer having a higher refractive index than the sapphire substrate and stacked on the buffer layer and including a plurality of light emitting layers (a first light emitting layer, a second light emitting layer, and a third light emitting layer) having different emission wavelengths.
  • the epitaxial layer has a concave surface in a stacking direction.
  • the pixel 701 has a plurality of sub-pixels 71, and each sub-pixel 71 has a portion of the epitaxial layer 30 removed to the extent that the buffer layer 20 is not exposed, and has an n-type layer (first n-type layer 301, second n-type layer 304, third n-type layer 305, third n-type layer 306) that serves as a power supply layer that supplies power to a predetermined light-emitting layer (first light-emitting layer 30B, second light-emitting layer 30G, third light-emitting layer 30R).
  • n-type layer first n-type layer 301, second n-type layer 304, third n-type layer 305, third n-type layer 306
  • the partition grooves 80 are formed in the stacking direction 81 of the epitaxial layer 30 by a groove formation etching process using a stacked mask 50 with an etching selectivity of 40 or more. More specifically, the partition grooves 80 are formed perpendicular to the sapphire substrate 10.
  • the method for manufacturing the semiconductor light emitting device further includes a laminated mask formation step of forming a laminated mask 50 using a fluoride gas, and the laminated mask 50 is composed of a lower layer 51 made of any of SiO2 , Al2O3 , and Si3N4 and laminated on the epitaxial layer 30, and an upper layer 52 made of any of Ni, Pt, and Cr and laminated on the lower layer 51.
  • Example 2A The semiconductor light emitting device 2 of Example 2A is different from Example 1A in that the upper surface 114 of the sapphire substrate 110 is formed in an uneven shape, but is otherwise common to both Examples 1A and 1A.
  • Example 2A the same components as those in Example 1A are denoted by the same reference numerals, and detailed descriptions thereof will be omitted.
  • a plurality of cone-shaped protrusions 111 are formed on the upper surface 114 of the sapphire substrate 110, and the upper surface 114 of the sapphire substrate 110 is formed in an uneven shape.
  • the outer dimensions of each protrusion 111 are a diameter of 2.8 ⁇ m and a height of 1.8 ⁇ m.
  • the pitch (distance between the central axes) between adjacent protrusions 111 is 3 ⁇ m.
  • the inclination angle 113 of the slope 112 of the protrusions 111 is preferably 90- ⁇ c or more with respect to the upper surface 114 of the sapphire substrate 110.
  • ⁇ c is the critical angle of light incident on the interface between AlN and sapphire from the AlN side.
  • each convex portion 111 is filled with a buffer layer.
  • the semiconductor light-emitting element 2 the light generated in each light-emitting layer (first light-emitting layer 30B, second light-emitting layer 30G, third light-emitting layer 30R) is diffused in the pixel 701 by the multiple convex portions 111.
  • FIG. 10 corresponds to a position corresponding to the A-A cross section in FIG. 4.
  • each convex portion 111 protrudes from the upper surface 114 of the sapphire substrate 110 toward the light-emitting layer (first light-emitting layer 30B, second light-emitting layer 30G, third light-emitting layer 30R) side.
  • the light generated in each of the red light-emitting diode 71R, green light-emitting diode 71G, and blue light-emitting diode 71B is likely to hit each convex portion 111.
  • the unevenness makes it easy to diffuse light in the pixel 701.
  • the semiconductor light-emitting element 1 of Example 1A In the semiconductor light-emitting element 1 of Example 1A, light that is repeatedly reflected within pixel 701 becomes light that reaches the viewer's eyes from sub-pixels 71 other than the sub-pixel 71 where the light is generated.
  • the configuration of the semiconductor light-emitting element 2 of Example 2A light that reaches the upper surface 114 of the sapphire substrate 110 and is scattered becomes light that reaches the viewer's eyes from sub-pixels 71 other than the sub-pixel 71 where the light is generated. This can further enhance the color mixing effect.
  • the shape of the convex portion is not limited to a cone shape, but may be a polygonal pyramid, a hemisphere, or an irregularly uneven shape.
  • the apex of the cone may also be spherical. If the apex of the cone is spherical, it is preferable that the inclination angle of the slope of the convex portion is 90- ⁇ c or more with respect to the upper surface of the sapphire substrate.
  • the present invention is not limited to the embodiment 1A and the embodiment 2A described above with reference to the drawings, and the following embodiments are also included within the technical scope of the present invention.
  • the light emitting layer to which power is supplied from the power supply layer may be divided so as not to be continuous with the adjacent subpixels 71.
  • partition grooves 180 of the subpixels 71 are formed between the red light emitting diode 71R and the green light emitting diode 71G and between the green light emitting diode 71G and the blue light emitting diode 71B.
  • partition grooves 180 are formed in the process of forming the exposed surfaces of the second n-type layer 304 of the green light emitting diode 71G and the first n-type layer 301 of the blue light emitting diode 71B, respectively.
  • the bottom surface of the partition groove 180 is at the same height as the second n-type layer 304 and the first n-type layer 301, and has a depth in a range that does not expose the buffer layer 20. Even in this case, light can be exchanged between adjacent subpixels 71 via the buffer layer 20 and the epitaxial layer 30, and the subpixels 71 can radiate to the outside the light generated internally and the light incident from the adjacent subpixels 71.
  • Example 1A the non-light-emitting portion 73 of the red light-emitting diode 71R and the light-emitting body portion 74 of the green light-emitting diode 71G, and the non-light-emitting portion 75 of the green light-emitting diode 71G and the light-emitting body portion 76 of the blue light-emitting diode 71B were electrically connected via the third n-type layer 307 and the second n-type layer 304.
  • the arrangement order of the red light emitting diode, the green light emitting diode, and the blue light emitting diode in one pixel is not limited to the arrangement order in Example 1 A. In particular, since red light and blue light are difficult to mix, it is preferable to arrange the red light emitting diode and the blue light emitting diode adjacent to each other. (3) The number of each of the red light emitting diode, the green light emitting diode, and the blue light emitting diode in one pixel does not have to be one. Also, one pixel may be configured to include two of the red light emitting diode, the green light emitting diode, and the blue light emitting diode.
  • one pixel may be configured to include at least two of the red light emitting diode, the green light emitting diode, and the blue light emitting diode.
  • the stacking order of the first light-emitting layer, the second light-emitting layer, and the third light-emitting layer is not limited to that of Example 1A.
  • the sub-pixels may be arranged in a direction intersecting one direction in which the sub-pixels extend. In other words, the arrangement of the sub-pixels is not limited to the direction perpendicular to the one direction.
  • the depth of the partition groove formed around the pixel may be at least as deep as the upper surface of the buffer layer.
  • the depth of the partition groove formed around the pixel may be deeper than the upper surface of the buffer layer and may reach the sapphire substrate.
  • the semiconductor light emitting element does not need to have a sapphire substrate.
  • the sapphire substrate may be removed by laser lift-off after the semiconductor light emitting element is mounted on a mounting substrate. Even in this case, the adjacent subpixels are continuous with the high refractive index buffer layer and epitaxial layer, so that the same effect can be obtained.
  • the epitaxial layer has a plurality of light-emitting layers having different emission wavelengths
  • the pixel has a plurality of sub-pixels having different emission wavelengths
  • the sub-pixels are each formed by removing a portion of the epitaxial layer so as not to expose the buffer layer, exposing a power supply layer that supplies power to the light-emitting layers and providing an electrode thereon.
  • the light-emitting layer to which power is supplied from the power supply layer is not continuous with the adjacent subpixels.
  • the substrate has an uneven shape formed on the side on which the buffer layer is laminated.
  • the epitaxial layer has a plurality of light-emitting layers with different emission wavelengths
  • the pixel has a plurality of sub-pixels with different emission wavelengths
  • the sub-pixels are preferably such that a portion of the epitaxial layer is removed to the extent that the buffer layer is not exposed, and the power supply layer that supplies power to the light-emitting layers is exposed and an electrode is provided.
  • the partition grooves are preferably formed perpendicular to the substrate by a groove formation etching process using a layered mask with an etching selectivity ratio of 40 or more.
  • the method further comprises a layered mask formation step of forming a layered mask using a fluoride gas, and the layered mask is composed of a combination of an oxide film made of any of SiO2 , Al2O3 , and Si3N4 that is laminated on the epitaxial layer, and a metal film made of any of Ni, Pt, and Cr that is laminated on the oxide film.
  • Example 1B which is an embodiment of the monolithic LED array of the present invention, with reference to Figures 1 and 12 to 18.
  • Example 1B The monolithic LED array 1 of Example 1B is used in a display device such as a VR goggle. As shown in FIG. 1, the monolithic LED array 1 used in the VR goggles 200 is disposed in front of the viewer's eye 202 with a lens 201 interposed therebetween. The distance between the monolithic LED array 1 and the viewer's eye 202 is approximately 5 cm. As shown in FIG. 12, the monolithic LED array 1 of the first embodiment includes a sapphire substrate 10, a buffer layer 20, an epitaxial layer 30, and a light absorbing member 40. The monolithic LED array 1 is disposed such that the epitaxial layer 30 is on the opposite side of the viewer's eye 202 with respect to the sapphire substrate 10 (see FIG. 12). The light emitted from the epitaxial layer 30 passes through the sapphire substrate 10 and reaches the viewer's eye 202.
  • the sapphire substrate 10 is a plate-like sapphire having both sides polished to be flat.
  • the thickness of the sapphire substrate 10 is, for example, 300 ⁇ m.
  • the surface of the sapphire substrate 10 opposite the viewer's eye 202 is referred to as the top surface.
  • the surface of each layer opposite the viewer's eye 202 is also referred to as the top surface.
  • the buffer layer 20 is laminated on the sapphire substrate 10.
  • the buffer layer 20 has a thickness of, for example, 2 ⁇ m.
  • the buffer layer 20 is made of AlN, GaN, or the like, which is grown at a low temperature.
  • the epitaxial layer 30 is laminated on the upper surface of the buffer layer 20.
  • the epitaxial layer 30 has a first n-type layer 301, a light emitting layer 30B, a p-type layer 302, a tunnel junction layer 303, and a second n-type layer 304, which are laminated in this order.
  • the first n-type layer 301 is laminated on the upper surface of the buffer layer 20.
  • the thickness of the first n-type layer 301 is, for example, 2 ⁇ m.
  • the first n-type layer 301 is formed of, for example, GaN doped with n-type impurities such as Si.
  • the light-emitting layer 30B is laminated on the upper surface of the first n-type layer 301.
  • the light-emitting layer 30B is formed, for example, as a multiple quantum well.
  • the thickness of the light-emitting layer 30B is, for example, 50 nm.
  • the light-emitting layer 30B is configured to generate light of a predetermined emission wavelength.
  • the p-type layer 302 is laminated on the upper surface of the light-emitting layer 30B.
  • the thickness of the p-type layer 302 is, for example, 180 nm.
  • the p-type layer 302 is formed of, for example, GaN doped with p-type impurities such as Mg.
  • the tunnel junction layer 303 is laminated on the upper surface of the p-type layer 302.
  • the thickness of the tunnel junction layer 303 is, for example, 25 nm.
  • the tunnel junction layer 303 is formed by laminating an n++ GaN layer to which Si is highly doped, and a p++ GaN layer to which Mg is highly doped.
  • n++ means a state in which n-type impurities are highly doped
  • p++ means a state in which p-type impurities are highly doped. Note that by providing a tunnel junction layer between the n-type semiconductor and the p-type semiconductor, it becomes possible to pass a current from the n-type semiconductor to the p-type semiconductor.
  • the second n-type layer 304 is laminated on the upper surface of the tunnel junction layer 303.
  • the thickness of the second n-type layer 304 is, for example, 400 nm.
  • the second n-type layer 304 is formed of, for example, GaN doped with n-type impurities such as Si.
  • the monolithic LED array 1 has a plurality of pixels 702 partitioned by partition grooves 80. Each pixel 702 is formed to extend long in one direction. The pixels 702 are formed adjacent to each other in a direction perpendicular to the one direction.
  • the partition grooves 80 are recessed (in the stacking direction 81) from the upper surface of the second n-type layer 304 toward the sapphire substrate 10, with their bottom surfaces reaching the upper surface of the sapphire substrate 10.
  • the partition grooves 80 are formed perpendicular to the sapphire substrate 10.
  • the outer periphery of each pixel 702 is formed into an island shape on the upper surface of the sapphire substrate 10 by the partition grooves 80.
  • a plurality of island-shaped pixels 702 are aligned in one direction and in a direction perpendicular to the one direction.
  • the light absorbing member 40 is arranged so as to fill the partition groove 80.
  • a metal complex dye such as an acid azo dye or a basic azo dye, is used as the light absorbing member 40.
  • the pixel 702 has a light-emitting body section 72 and a non-light-emitting section 73.
  • the light-emitting body section 72 has the upper surface of the second n-type layer 304 (the uppermost surface of the epitaxial layer 30) exposed.
  • the non-light-emitting section 73 is adjacent to the light-emitting body section 72 so as to be aligned in one direction.
  • the non-light-emitting section 73 has the light-emitting layer 30B through the second n-type layer 304 removed, exposing the first n-type layer 301.
  • a positive electrode 31p which is an electrode 31, is laminated on the upper surface of the light-emitting body section 72 (the upper surface of the second n-type layer 304, which is the power supply layer).
  • a negative electrode 31n which is an electrode 31, is laminated on the upper surface of the non-light-emitting section 73 (the surface where the first n-type layer 301, which is the power supply layer, is exposed).
  • each pixel 702 is formed by removing a portion of the epitaxial layer 30 so as not to expose the buffer layer 20, and providing an electrode 31. Note that even if the power supply layer is an n-type layer, a current can be passed from the n-type semiconductor to the p-type semiconductor by the tunnel junction layer 303.
  • the monolithic LED array 1 is manufactured by carrying out a lamination process, a partition groove forming process, a pixel forming process, and a light absorbing material application process (arrangement process).
  • a lamination process a buffer layer 20 and an epitaxial layer 30 are crystal-grown and laminated on the upper surface side of a sapphire substrate 10 using MOVPE (metal organic vapor phase epitaxy) as shown in Figure 15 (A).
  • MOVPE metal organic vapor phase epitaxy
  • partition grooves 80 are formed as shown in FIG. 15(B).
  • the partition groove forming process is composed of a layer mask forming process for forming vertical grooves, and a groove forming etching process.
  • a SiO2 film is formed as a lower layer film 51 on the entire upper surface of the epitaxial layer 30.
  • a Ni film (metal film) is laminated as an upper layer film 52 on the lower layer film 51 in an area other than the area where the partition grooves 80 are to be formed.
  • the lower layer film 51 can be formed using, for example, a sputtering device.
  • the upper layer film 52 can be formed using, for example, a deposition device.
  • the laminated mask 50 consisting of the lower layer 51 and the upper layer 52 is a combination in which the etching selectivity of the material of the lower layer 51 to the material of the upper layer 52 is 40 or more in the etching process of the lower layer 51 described later. In the case of a combination of SiO2 and Ni, the etching selectivity is approximately 50.
  • the lower layer 51 oxides such as Al2O3 and nitrides such as Si3N4 can be used in addition to SiO2 .
  • As the upper layer 52 Pt, Cr , etc. can be used in addition to Ni.
  • a resist mask formed by commonly used lithography can be used. Specifically, a resist material is applied to the upper surface of the lower layer film 51 to form a resist film, and then a resist mask is formed in the region in which the partition groove 80 is to be formed. The upper layer film 52 is then laminated by deposition on the exposed upper surface of the lower layer film 51 and on the upper surface of the resist mask. The resist mask is then removed, allowing the upper layer film 52 to be laminated in the regions other than the regions in which the partition groove 80 is to be formed, as shown in FIG. 16(B).
  • the lower layer film 51 in the region where the partitioning grooves 80 are to be formed and not covered by the upper layer film 52 is removed by dry etching using CF4 , which is a fluoride gas.
  • CF4 which is a fluoride gas.
  • the etching rate of the lower layer film 51 is larger than that of the upper layer film 52, the side of the laminated mask 50 is formed with an extremely small taper. In this way, the laminated mask 50 is formed.
  • the etching for removing the lower layer film 51 in the region where the partitioning grooves 80 are to be formed may be performed using a fluoride gas such as SF6 or CHF3 instead of CF4.
  • the buffer layer 20 and the epitaxial layer 30 in the region exposed and not covered by the laminate mask 50 are removed by dry etching using Cl2 as shown in FIG. 16(D).
  • the etching is performed to a depth reaching the upper surface of the sapphire substrate 10, and is stopped when the upper surface of the sapphire substrate 10 is reached.
  • the partition grooves 80 whose periphery reaches the upper surface of the sapphire substrate 10 form island-shaped pixels 702 on the sapphire substrate 10.
  • the partition grooves 80 can be shaped to be approximately perpendicular to the sapphire substrate 10 by etching using the laminate mask 50.
  • the total thickness of the buffer layer 20 and the epitaxial layer 30 is 5 ⁇ m
  • the width of the upper surface of the epitaxial layer 30 is 1 ⁇ m
  • a partition groove 80 is formed with a depth reaching the upper surface of the sapphire substrate 10.
  • the side of the partition groove 80 needs to be at an angle of 84.3 degrees or more with respect to the sapphire substrate 10.
  • the monolithic LED array 1 requires the width of the pixels 702 to be several tens of ⁇ m or several ⁇ m in size, and the partition groove 80 is required to be narrower than the width of the pixels 702.
  • the inventors have confirmed that the side of the partition groove 80 can be at an angle of 88 degrees or more, which is approximately perpendicular to the sapphire substrate 10. They have also confirmed that the partition groove 80 with a width of 1 ⁇ m or less and a depth of 5 ⁇ m that reaches the upper surface of the sapphire substrate 10 can form island-shaped pixels 702 with a width of 5 ⁇ m on the sapphire substrate 10 with a high degree of integration.
  • the stack mask 50 is removed by hydrofluoric acid treatment. This completes the process of forming the partition grooves 80. In this way, the partition grooves 80 are formed, forming multiple island-shaped pixels 702.
  • the surface on which the pixels 702 are to be formed is exposed as shown in Fig. 15(C).
  • a resist mask is laminated on the epitaxial layer 30 in the region where the light-emitting body portion 72 is to be formed
  • the light-emitting layer 30B through the second n-type layer 304 are removed by dry etching using Cl2 .
  • an electrode 31 is formed on the upper surfaces of the light-emitting body portion 72 and the non-light-emitting portion 73. This forms the pixels 702.
  • a metal complex dye is applied to the partition grooves 80 formed in the buffer layer 20 and the epitaxial layer 30.
  • the metal complex dye is applied by, for example, dropping a metal complex dye mixed with a volatile organic solvent from above the epitaxial layer 30 in a state in which the sapphire substrate 10 is arranged vertically downward, and spin coating.
  • the applied metal complex dye covers the upper surfaces of the light emitting main body 72 and the non-light emitting portion 73 of each pixel 702, and fills the partition grooves 80.
  • the metal complex dye applied to the upper surfaces of the light emitting main body 72 and the non-light emitting portion 73 of each pixel 702 is removed.
  • the metal complex dye arranged in the partition grooves 80 becomes the light absorbing member 40 without being removed (see FIG. 15(D)).
  • the monolithic LED array 1 thus formed is mounted on a mounting substrate 90 as shown in FIG. 17 (mounting process).
  • the mounting substrate 90 is made of, for example, Si.
  • FIG. 17 corresponds to the A-A cross section in FIG. 14.
  • the mounting substrate 90 is formed with wiring 91 made of Cu.
  • the positive electrode 31p and the negative electrode 31n of each pixel 702 are electrically connected to the wiring 91 via a metal bump 92.
  • an alloy of Au and Su is used for the metal bump 92.
  • the metal bump 92 is set to a thickness of 5 ⁇ m or less so that it does not short circuit with the metal bump 92 of the adjacent pixel 702 during mounting. In this case, the gap between the monolithic LED array 1 and the mounting substrate 90 is the same.
  • the negative electrode 31n is not shown in FIG. 17.
  • a voltage is applied to the power supply layer of the epitaxial layer 30 of the monolithic LED array 1 via the mounting substrate 90.
  • a current flows through the light-emitting layer 30B, light is generated from the light-emitting layer 30B.
  • the monolithic LED array 1 includes a sapphire substrate 10, a buffer layer 20 laminated on the sapphire substrate 10, and an epitaxial layer 30 laminated on the buffer layer 20 and having a light-emitting layer 30B.
  • the epitaxial layer 30 has a plurality of pixels 702 partitioned by partition grooves 80 that reach the sapphire substrate 10, and further includes a light-absorbing member 40 that is disposed in the partition groove 80 and absorbs light generated from the light-emitting layer 30B.
  • the partition groove 80 that reaches the sapphire substrate 10 is provided, and the light-absorbing member 40 is disposed in the partition groove 80. Therefore, the light that reaches the light-absorbing member 40 in the partition groove 80 can be absorbed while suppressing the light from propagating through the buffer layer 20 and the epitaxial layer 30 to reach the surrounding pixels 702. This can suppress pseudo lighting.
  • the method for manufacturing a monolithic LED array includes a sapphire substrate 10, a buffer layer 20 laminated on the sapphire substrate 10, and an epitaxial layer 30 laminated on the buffer layer 20 and having a light-emitting layer 30B, the epitaxial layer 30 having a plurality of pixels 702 partitioned by partition grooves 80 that reach the sapphire substrate 10, and a light-absorbing member 40 disposed in the partition groove 80 and absorbing light generated from the light-emitting layer 30B.
  • the process of arranging the light-absorbing member 40 in the partition groove 80 is performed prior to the process of mounting the monolithic LED array 1. According to this manufacturing method, the light-absorbing member 40 can be stably disposed in the partition groove 80.
  • the partition grooves 80 are formed perpendicular to the sapphire substrate 10 by a groove formation etching process using a laminate mask 50 with an etching selectivity ratio of 40 or more. This manufacturing method can avoid the occurrence of a taper angle that would result in a wider groove width in plan view, so there is little concern about the impact on electrical and optical characteristics.
  • the method for manufacturing the monolithic LED array further includes a laminate mask formation step of forming a laminate mask 50 using a fluoride gas, and the laminate mask 50 is composed of a lower layer 51 (oxide film) made of any of SiO2, Al2O3, and Si3N4 and laminated on the epitaxial layer 30, and an upper layer 52 (metal film) made of any of Ni, Pt, and Cr and laminated on the lower layer 51 (oxide film).
  • This manufacturing method makes it possible to more effectively form grooves perpendicular to the sapphire substrate 10 without causing tapers.
  • Example 2B The monolithic LED array 2 of Example 2B differs from Example 1B mainly in the configuration of the epitaxial layer 130 and the configuration of the pixel 170.
  • the epitaxial layer 130 of the monolithic LED array 2 of Example 2B is configured by stacking three p-type layers, a light-emitting layer, and an n-type layer, and the three light-emitting layers emit light of different emission wavelengths.
  • the pixels 170 of the monolithic LED array 2 of Example 2B are configured to have a plurality of sub-pixels 171 with different emission colors in each pixel 170.
  • Example 2B the same components as those of Example 1B are denoted by the same reference numerals, and detailed description thereof will be omitted.
  • the epitaxial layer 130 is laminated on the upper surface of the buffer layer 20.
  • the epitaxial layer 130 has a first n-type layer 1301, a first light-emitting layer 130B (light-emitting layer), a first p-type layer 1302, a first tunnel junction layer 1303, a second n-type layer 1304, a second light-emitting layer 130G (light-emitting layer), a second p-type layer 1305, a second tunnel junction layer 1306, a third n-type layer 1307, a third light-emitting layer 130R (light-emitting layer), a third p-type layer 1308, a third tunnel junction layer 1309, and a fourth n-type layer 1310, which are laminated in this order.
  • the first light-emitting layer 130B is configured to generate light with an emission wavelength corresponding to blue.
  • the second light-emitting layer 130G is formed, for example, as a multiple quantum well.
  • the thickness of the second light-emitting layer 130G is, for example, 50 nm.
  • the second light-emitting layer 130G is configured to generate light with an emission wavelength corresponding to green.
  • the third light-emitting layer 130R is formed, for example, as a multiple quantum well.
  • the thickness of the third light-emitting layer 130R is, for example, 50 nm.
  • the third light-emitting layer 130R is configured to generate light with an emission wavelength corresponding to red.
  • the monolithic LED array 2 has pixels 170 partitioned by partition grooves 180.
  • the pixels 170 have a plurality of sub-pixels 171.
  • the sub-pixels 171 have a red light emitting diode 171R, a green light emitting diode 171G, and a blue light emitting diode 171B.
  • the partition groove 180 is recessed from the upper surface of the fourth n-type layer 1310 toward the sapphire substrate 10 (in the stacking direction 81), and the bottom surface reaches the upper surface of the sapphire substrate 10.
  • the partition groove 180 is formed approximately perpendicular to the sapphire substrate 10.
  • each pixel 170 is formed in an island shape on the upper surface of the sapphire substrate 10 by the partition groove 180.
  • the depth dimension (depth dimension from the upper surface of the fourth n-type layer 1310) in the stacking direction 81 (see FIG. 19) of the partition groove 180 corresponds to the sum of the thicknesses of the buffer layer 20 and the epitaxial layer 130, and is approximately 6 ⁇ m.
  • the light absorbing member 40 is arranged to fill the partition groove 180.
  • the red light emitting diode 171R has a light emitting main body portion 172 and a non-light emitting portion 173.
  • a circuit that passes electricity to the third light emitting layer 130R is formed by a positive electrode 131p provided on the fourth n-type layer 1310 (power supply layer) and a negative electrode 131n provided on the third n-type layer 1307 (power supply layer).
  • the green light-emitting diode 171G has a light-emitting body portion 174 and a non-light-emitting portion 175.
  • a circuit that passes electricity to the second light-emitting layer 130G is formed by a positive electrode 131p provided on the third n-type layer 1307 and a negative electrode 131n provided on the second n-type layer 1304.
  • the second light-emitting layer 130G is continuous with the red light-emitting diode 171R, which is the adjacent sub-pixel 171, and is also included in the area of the red light-emitting diode 171R.
  • the blue light-emitting diode 171B has a light-emitting body portion 176 and a non-light-emitting portion 177.
  • a circuit that passes electricity to the first light-emitting layer 130B is formed by a positive electrode 131p provided on the second n-type layer 1304 (power supply layer) and a negative electrode 131n provided on the first n-type layer 1301 (power supply layer).
  • the first light-emitting layer 130B is continuous with the green light-emitting diode 171G, which is an adjacent sub-pixel 171, and is also included in the areas of the green light-emitting diode 171G and the red light-emitting diode 171R.
  • each subpixel 171 a portion of the epitaxial layer 130 is removed to the extent that the buffer layer 20 is not exposed.
  • the monolithic LED array 2 is manufactured by the process shown in Fig. 22.
  • the manufacturing process of the pixel 170 having a plurality of sub-pixels 171 as shown in Fig. 22(B) to Fig. 22(E), the non-light-emitting portion 173 and the light-emitting main body portion 174, the non-light-emitting portion 175 and the light-emitting main body portion 176, and the non-light-emitting portion 177 are sequentially exposed by etching.
  • the pixel 170 having a plurality of sub-pixels 171 is formed by forming an electrode 131 on each surface thus exposed.
  • the light-absorbing member application process (arrangement process) is performed in which a metal complex dye is applied to the partition grooves 180, thereby forming the monolithic LED array 2 shown in Fig. 22(F).
  • FIG. 23 corresponds to the cross section B-B in FIG. 21.
  • the positive electrodes 131p and negative electrodes 131n of the red light emitting diodes 171R, green light emitting diodes 171G, and blue light emitting diodes 171B are electrically connected to wiring 91 via metal bumps 92. Note that the negative electrodes 131n are not shown in FIG. 23.
  • the monolithic LED array 2 is driven by a dynamic lighting method.
  • a voltage is applied to a predetermined power supply layer of the epitaxial layer 130 of the monolithic LED array 2 via the mounting substrate 90.
  • a current flows through the light-emitting layers (first light-emitting layer 130B, second light-emitting layer 130G, third light-emitting layer 130R)
  • light is generated from the light-emitting layers (first light-emitting layer 130B, second light-emitting layer 130G, third light-emitting layer 130R).
  • each pixel 170 is lit for a short period of time. This allows the viewer to see that each pixel 170 is lit at the same time.
  • the lit light propagates through a part of the epitaxial layer 130 and the buffer layer 20 and is likely to be incident on other sub-pixels 171 (red light-emitting diode 171R and blue light-emitting diode 171B) in the pixel 170.
  • This makes it possible to improve color mixing with other emitted colors in the pixel 170.
  • Example 1B it is possible to suppress the propagation of the lit light to surrounding pixels 170 and suppress pseudo-emission of light from the surrounding pixels 170.
  • the epitaxial layer 130 on which the buffer layer 20 and the light-emitting layers (first light-emitting layer 130B, second light-emitting layer 130G, third light-emitting layer 130R) are formed has a higher refractive index than the surrounding sapphire substrate 10 and partition groove 180.
  • the buffer layer 20 is formed of AlN (refractive index 2.2) or GaN (refractive index 2.4), and the epitaxial layer 130 is formed of GaN (refractive index 2.4).
  • the light-absorbing member 40 of the partition groove 180 and air have a smaller refractive index than sapphire (refractive index 1.7). For this reason, in the pixel 170 formed in an island shape on the sapphire substrate 10, light tends to remain inside the pixel 170. In addition, light that reaches the light-absorbing member 40 of the partition groove 180 is absorbed by the light-absorbing member 40, and is prevented from propagating to the surrounding pixels 170.
  • the epitaxial layer 130 has a plurality of light-emitting layers (first light-emitting layer 130B, second light-emitting layer 130G, third light-emitting layer 130R) with different emission wavelengths
  • the pixel 170 has a plurality of sub-pixels 171 with different emission wavelengths, and in the sub-pixels 171, a part of the epitaxial layer 130 is removed to the extent that the buffer layer 20 is not exposed, and a power supply layer that supplies power to the light-emitting layers (first light-emitting layer 130B, second light-emitting layer 130G, third light-emitting layer 130R) is exposed and an electrode is provided.
  • the pixel 170 has a multi-color light-emitting function by making the plurality of light-emitting layers with different emission wavelengths emit light. Furthermore, the light with different emission wavelengths emitted by the plurality of sub-pixels 171 in the pixel 170 is likely to be mixed in the pixel 170. If there is no color mixing between the sub-pixels 171, the sub-pixels 171 can be made smaller in size than the resolution of the viewer, allowing the viewer to visually recognize that there is color mixing. In contrast, by performing color mixing between the sub-pixels 171, the viewer can visually recognize that there is color mixing even if the sub-pixels 171 are made relatively large. Furthermore, the ability to increase the size of the sub-pixels 171 makes it easier to manufacture and implement a monolithic LED array.
  • the present invention is not limited to the embodiment 1B and embodiment 2B described above with reference to the drawings, and the following embodiments are also included within the technical scope of the present invention.
  • the light absorbing member may be made of other materials such as black silicone resin, black epoxy resin, or black paint, as long as the material absorbs the light emitted by the monolithic LED array.
  • the light absorbing material in the partition grooves need only be disposed in the partition grooves. It is not limited to being disposed in a state in which the partition grooves are filled, but may be disposed in a state in which the light absorbing material is applied to the side surfaces of the partition grooves.
  • the light absorbing member is not limited to a bulk or coating type, and may be a particulate type light absorbing member disposed in the partition groove.
  • the method of disposing the light absorbing material in the partition groove does not have to use the spin coating method. For example, application may be performed in a reduced pressure atmosphere. Alternatively, application by sputtering deposition or the like may be used.
  • the process of disposing the light absorbing material is not limited to the final process of manufacturing the monolithic LED array, and may be performed before the pixel formation process or before the electrode formation process in the pixel formation process.
  • a black underfill material may be disposed between the monolithic LED array and the mounting substrate to form a device. This allows light absorption in the fine partition grooves to suppress the light effect between pixels, and suppresses the light effect of the light emitted by the monolithic LED array being reflected by the mounting substrate.
  • the black underfill material may be disposed as a light absorbing member in the partition grooves of the pixels of the monolithic LED array.
  • the sapphire substrate may be formed with a concave-convex shape by applying concave-convex processing to the side on which the buffer layer is laminated. By forming a buffer layer on the concave-convex surface, the light extraction efficiency can be improved. Furthermore, in Example 2B, the color mixing can be improved.
  • each subpixel may be divided by a partition groove.
  • the partition groove of the subpixel may be formed when the non-light-emitting portion and the light-emitting main body portion are sequentially exposed by etching. If a part of the epitaxial layer is removed to the extent that the buffer layer is not exposed, light propagates in the pixel in the buffer layer and part of the epitaxial layer, and color mixing can be improved.
  • the partition groove of the subpixel for example, the light-emitting layer to which power is supplied from the power supply layer is not continuous with the adjacent subpixel, and the adjacent subpixels are electrically independent, which enables not only dynamic lighting but also static lighting.

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JP2006232640A (ja) * 2005-02-25 2006-09-07 Kyocera Corp Ｒ面サファイア基板とそれを用いたエピタキシャル基板及び半導体装置、並びにその製造方法
JP2006332490A (ja) * 2005-05-30 2006-12-07 Sony Corp 発光素子及び発光装置
JP2008226962A (ja) * 2007-03-09 2008-09-25 Sumitomo Chemical Co Ltd 半導体発光素子およびその製造方法
US20090078955A1 (en) * 2007-09-26 2009-03-26 Iii-N Technlogy, Inc Micro-Emitter Array Based Full-Color Micro-Display
JP2013222925A (ja) * 2012-04-19 2013-10-28 Asahi Kasei Corp Ｌｅｄ用基板及びその製造方法
JP2017513225A (ja) * 2014-04-01 2017-05-25 サントル ナショナル ドゥ ラ ルシェルシュ シアンティフィク 半導体画素、このような画素のマトリクス、このような画素を製造するための半導体構造、およびそれらの製作方法
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Publication number Priority date Publication date Assignee Title
JP2005327845A (ja) * 2004-05-13 2005-11-24 Matsushita Electric Ind Co Ltd Ｌｅｄ点灯装置及びディスプレイ装置
JP2006232640A (ja) * 2005-02-25 2006-09-07 Kyocera Corp Ｒ面サファイア基板とそれを用いたエピタキシャル基板及び半導体装置、並びにその製造方法
JP2006332490A (ja) * 2005-05-30 2006-12-07 Sony Corp 発光素子及び発光装置
JP2008226962A (ja) * 2007-03-09 2008-09-25 Sumitomo Chemical Co Ltd 半導体発光素子およびその製造方法
US20090078955A1 (en) * 2007-09-26 2009-03-26 Iii-N Technlogy, Inc Micro-Emitter Array Based Full-Color Micro-Display
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