WO2024121325A1

WO2024121325A1 - Optical sensor

Info

Publication number: WO2024121325A1
Application number: PCT/EP2023/084740
Authority: WO
Inventors: François DANNEVILLE; Christophe Loyez
Original assignee: Universite De Lille; Centre National De La Recherche Scientifique; Université Polytechnique Hauts-De-France
Priority date: 2022-12-08
Filing date: 2023-12-07
Publication date: 2024-06-13
Also published as: FR3143195A1

Abstract

Optical sensor (1) comprising a plurality of photosensitive cells, each cell comprising: - an integration capacitor (Cm), - a circuit (10) for reading the charge of the integration capacitor (Cm), - at least one MOS transistor (31; 32) operating subthreshold, the drain-source current of which influences the charge of the integration capacitor (Cm), at least one photodiode (21; 22) operating in photovoltaic mode, connected to the gate of this transistor, such that the drain-source current of the MOS transistor increases when the current generated by the photodiode decreases and vice versa.

Description

Title: Optical sensor

Technical area

The present invention relates to the field of optical sensors, and more particularly concerns a sensor with low energy consumption, capable of reproducing certain behaviors of a biological retina, and usable in particular in bioinspired architectures.

Prior art

Various systems for acquiring and processing visual information, particularly bio-inspired, have already been proposed.

The majority of bio-inspired artificial optical sensors in the prior art operate according to the principle that, the greater the light intensity received, the higher the frequency of the electrical pulses generated by the sensor. Following this principle, on the scale of an imager and in luminance mode, a visual scene is captured through a “positive” image – in black and white.

The sensor described in patent FR3072564 works according to this principle and can behave in the same way as a biological cell of the “ON” retinal ganglion type.

However, this type of sensor does not offer the possibility of precisely adjusting the dynamics at low luminance (reduced to medium lighting situation, i.e., from 50 to 3000 lux). In everyday life, this corresponds to illuminated domestic or industrial spaces, for which a need for low-consumption image sensors is required.

Furthermore, so-called “event” optical sensors developed by the company Prophesee are available on the market. These imagers encode information only when a pixel changes intensity. Thus, it is necessary to observe movements within the visual scene to obtain an image, and it is not possible to extract a static image. These sensors, reproducing a visual scene from a video image, are powered by a supply voltage of the order of one volt or beyond, which leads to an electrical power of the order of 100 nW per unit. . Presentation of the invention

There is therefore a need to further improve optical sensors, in particular in order to have a high-performance sensor, with relatively low power consumption and with the possibility, if desired, of adjusting the dynamics in interior lighting.

The invention aims to meet this objective and has as its object, according to one of its aspects, an optical sensor comprising: an integration capacitance, a circuit for reading the charge of the integration capacitance, at least one MOS transistor operating below the threshold, whose drain-source current influences the charge of the integration capacitor, at least one photodiode operating in photovoltaic mode, connected to the gate of this transistor, such that the drain-source current of the MOS transistor increases when the current generated by the photodiode decreases and vice versa.

The sensor according to the invention has high energy efficiency and can have ultra-low consumption, for example of the order of 100 pW, i.e. a power consumption 3 orders of magnitude lower than certain sensors of the prior art. , which is close to the energy efficiency of a biological retina of the human eye (see “Event-Based Neuromorphic Systems”, Book, S-C Liu et al, Wiley 2015; Table 3.1, page 42). This advantage is notably linked to operation below the threshold of the transistor and to the use of the photodiode in photo voltaic mode.

The operation of the transistor below the threshold corresponds to the existence of a drain-source current varying exponentially with the gate control voltage in the so-called weak inversion region of the transistor ('weak-inversion region' or 'subthreshold region'). in English) where the gate-source voltage is below the threshold voltage for which the inversion zone appears, that is to say creates a conduction channel between the drain and the source.

The photodiode operates in open circuit photovoltaic mode where the voltage across its terminals is strictly positive. In this mode and due to the presence of the open circuit, the photodiode does not dissipate power, unlike the usual mode (receiver mode) in which the photodiode is reverse biased.

Due to the fact that the drain-source current of the MOS transistor is inversely proportional to the photovoltaic current, the invention makes it possible to obtain an inverse representation of a visual scene, whether a static image or a video, by coding the perceived luminance in the manner of a “negative” if transposed to photography. Indeed, in its luminance mode version, and when the reading circuit includes an artificial neuron, the sensor delivers electrical pulses with the greatest frequency when the light intensity to which it is exposed is the lowest. Thus, an imager of N*N sensors reproduces a “negative” image of a visual scene.

The invention is based on a paradigm shift for image extraction. In fact, the usual event-driven or pulse optical sensors extract a “positive” image, reconstituted in such a way that the more the sensor is illuminated, the higher the frequency of the pulses generated by the sensor. For the purpose of the present invention, the paradigm shift exists in the sense that a “negative” image is extracted.

The sensor according to the invention allows in situ adjustment of the coding dynamics for different luminance ranges, which can reach very low levels (< 50 lux). Indeed, in the light intensity ranges commonly encountered, particularly in interior lighting, the dynamics (luminance range) is adjustable, in particular via a control voltage, as will be detailed later.

By “photodiode in the dark”, we mean a photodiode illuminated by zero or low luminance, located between 0 and 3000 lux, in particular between 0 and 1500 lux, better still between 0 and 500 lux, even better between 0 and 50 lux.

The reading circuit may include at least one artificial neuron, for example of the “Octopus” type (as described in “Event-Based Neuromorphic Systems”, Book, S-C Liu et al, Wiley 2015; Figure 7.4, page 161), “ Leaky Integrate and Fire” or “Axon-Hillock”.

Preferably, the artificial neuron generates pulses at a frequency which depends on the optical power received by said at least one photodiode, the frequency of the pulses being inversely proportional to said power.

In one embodiment, the MOS transistor is an activation transistor arranged to charge the integration capacitor when the photodiode connected to its gate is in the dark. The activation transistor is preferably of the PMOS type whose gate is connected to the anode of the photodiode, the drain to the integration capacitance and the source to a supply voltage of the sensor. The cathode of the photodiode can be connected to ground. This allows fine adjustment of the dynamics, that is to say the frequency contrast (for a light intensity contrast) of electrical pulses generated by an artificial neuron included in the reading circuit, by adjusting the voltage of food, as will be demonstrated by the formulas below.

Alternatively, the activation transistor is of the NMOS type whose gate is connected to the cathode of the photodiode, the drain to a supply voltage of the sensor and the source to the integration capacitance. The anode can be connected to the hot spot of the power supply.

In another embodiment, the MOS transistor is a deactivation transistor arranged to discharge the integration capacitance when the photodiode connected to its gate is in the dark.

The deactivation transistor is preferably of the PMOS type, the gate of which is connected to the anode of the photodiode, the drain to a current mirror connected to the integration capacitor and the source to a supply voltage of the sensor.

Alternatively, the deactivation transistor is of the NMOS type whose gate is connected to the cathode of the photodiode, the drain to a supply voltage of the sensor and the source to a current mirror connected to the integration capacitor.

The MOS transistor can be of standard technology on a solid substrate.

The MOS transistor can be total depletion, called MOS on SOI (“Silicon On Insulator” in English, for silicon on insulator), consisting of a stack of a layer of silicon (from 50 nm to a few pm thick) on a layer of insulation.

The MOS transistor can be a type of non-planar transistor (3D transistor), in particular a fin field-effect transistor (FinFET) which is a multi-gate device, a transistor with field effect MOSFET (metal/oxide/semiconductor structure FET) built on a substrate where the gate is placed on two, three or four sides of the channel, forming a double gate structure.

In particular, the MOS transistor can be of the GAAFET (gate all around field effect transistor) type, a derivative of FinFET, making it possible to reach technological nodes at 5 or 3 nm. Other structures are still possible.

Preferably, the sensor comprises at least one photosensitive cell of the “OFF” type, the cell comprising:

An exciting part including:

- at least one MOS activation transistor, operating below the threshold, whose drain-source current influences the charge of the integration capacitance, and

- at least one photodiode operating in photovoltaic mode, connected to the gate of this activation transistor, such that the drain-source current of the activation MOS transistor is inversely proportional to the photovoltaic current generated by the photodiode, the transistor d activation being arranged to charge the integration capacitance when the photodiode is in the dark; And

An inhibitory part comprising:

- several MOS deactivation transistors, operating below the threshold, whose drain-source currents influence the charge of the integration capacitor, and

- several photodiodes operating in photovoltaic mode, each being connected to the gate of one of the deactivation transistors, such that the drain-source current of this transistor is inversely proportional to the photovoltaic current generated by the associated photodiode, the deactivation transistor being arranged to discharge the integration capacitance when the associated photodiode is in the dark, the photodiode associated with the activation transistor being surrounded by the photodiodes associated with the deactivation transistors.

Thus, the sensor is biomimetic, behaving in the same way as a biological cell of the “OFF” retinal ganglion type. Such a cell makes it possible to extract the oriented edges in an image, which is also called enhancement of contrasts.

Preferably, the activation transistor is of the PMOS type whose gate is connected to the anode of the associated photodiode, the drain to the integration capacitance and the source to a supply voltage Vdd _ex of the sensor.

The deactivation transistor is preferably of the PMOS type whose gate is connected to the anode of the photodiode, the drain to a current mirror connected to the integration capacitor and the source to a supply voltage Vddinh of the sensor.

Alternatively, the activation transistor is of the NMOS type whose gate is connected to the cathode of the photodiode, the drain to a supply voltage Vdd _ex of the sensor and the source to the integration capacitance.

The deactivation transistor can be of the NMOS type, the gate of which is connected to the cathode of the photodiode, the drain to a supply voltage Vddinh of the sensor and the source to a current mirror connected to the integration capacitor, the supply voltage Vddinh being preferably equal to Vdd _ex .

The sensor may include a set of pixels organized in a matrix comprising a plurality of “OFF” type cells as defined above.

In one embodiment, each “OFF” cell comprises a central pixel corresponding to the excitatory part and several peripheral pixels corresponding to the inhibitory part, the peripheral pixels being in particular four in number and the pixels of the “OFF” cell then being preferably arranged on the matrix in the form of a cross.

Preferably, each pixel comprises a single photodiode connected to several different transistors so as to serve several "OFF" cells, the photodiode being in particular connected to five different transistors including an activation transistor of a central pixel and four deactivation transistors of peripheral pixels.

The invention also relates, according to another of its aspects, to a method of acquiring an image or a video, in particular under lighting less than or equal to 3000 lux, using the sensor according to the invention.

Brief description of the drawings

The invention can be better understood on reading the detailed description which follows, non-limiting examples of its implementation, and on examining the appended drawing, in which:

[Fig 1] Figure 1 represents the evolution of the open circuit voltage of a photodiode in photovoltaic mode as a function of luminance;

[Fig 2] Figure 2 schematically illustrates a first example of a sensor according to the invention 9

[Fig 3] Figure 3 schematically represents a second example of sensor according to the invention;

[Fig 4] Figure 4 schematically illustrates a first example of an “OFF” cell of a sensor according to the invention;

[Fig 5] Figure 5 schematically represents a second example of an “OFF” cell of a sensor according to the invention; [Fig 6] Figure 6 schematically illustrates a sensor according to the invention comprising a set of pixels;

[Fig 7] Figure 7 schematically illustrates a simulation of a sensor according to the invention comprising a set of pixels;

[Fig 8] Figure 8 represents the temporal response of different pixels of a sensor according to the invention in an environment corresponding to a stadium lit at night;

[Fig 9] Figure 9 illustrates the temporal response of different pixels of a sensor according to the invention in an environment corresponding to a well-lit apartment;

[Fig 10] Figure 10 represents the result of the simulation of an “OFF” cell according to the invention at different luminances;

[Fig 11] Figure 11 schematically illustrates the experimental result, at different luminances and at a given supply voltage, obtained for the electrical pulses generated by a sensor according to the invention comprising a set of pixels;

[Fig 12] Figure 12 is similar to Figure 11 with change in the supply voltage;

[Fig 13] Figure 13 summarizes the experimental results from Figures 11 and 12 by representing the frequency of the electrical pulses generated as a function of luminance; [Fig 14] Figure 14 schematically illustrates the pulses generated by an artificial neuron of the Octopus type connected to a sensor according to the invention; And

[Fig 15] Figure 15 is similar to Figure 14 with change in supply voltage.

detailed description

We have schematically illustrated in Figure 1 a curve of the evolution of the open circuit voltage of a photodiode in photovoltaic mode as a function of the luminance. The photodiode is for example TSMC 65 nm technology. The ordinate axis represents the open circuit voltage V _co of the photodiode in mV, and the abscissa axis represents the luminance in lux. This curve is increasing with different slopes. The zone of interest to cover the majority of applications of the invention is circled in dotted lines and is between 0 and 1000 lux, which corresponds to an open circuit voltage of between 200 mV and 400 mV. Figure 2 schematically illustrates a first example of optical sensor 1 according to the invention. Such a sensor may include a PMOS transistor 31, a photodiode 21, an integration capacitance C _m and a reading circuit 10.

Photodiode 21 is connected to the gate of transistor 31 by its anode, its cathode being connected to ground. The drain of transistor 31 is connected to a terminal of the integration capacitor C _m also constituting an input-output of the read circuit 10.

The photodiode 21 operates in open circuit photovoltaic mode where the voltage across its terminals is strictly positive, V _co > 0, and the current passing through it is zero. In this mode, the photodiode does not dissipate energy, unlike the usual mode (photoconductor mode) in which the photodiode is reverse biased.

The voltage Vco generated by the photodiode is equal to:

[Math 1]

k T

With V _t = —, the thermal voltage being close to 25 mV for an ambient temperature of 300 K, I _ph the photovoltaic current generated by the photodiode and I _s the saturation current of the PN junction of the photodiode. This is considered ideal, ie the ideality factor of the junction is equal to 1.

It can be noted that with such a configuration of the circuit, for a fixed supply voltage Vdd, the source potential is not “floating”. Indeed, the gate-source voltage which controls the current Id of the MOS transistor 31 is equal to:

[Math 2]

V _sg = Vdd - v _co

In practice, this voltage will preferably be adjusted such that the MOS transistor 31 operates below the threshold, in order to ensure relatively low power consumption of the optical sensor.

Transistor 31 operates below the threshold, that is to say in the weak inversion region where the gate-source voltage is lower than the threshold voltage: VSG < Vth. The drain current then varies exponentially with the voltage VSG.

Thus, the current-voltage characteristic for the MOS transistor 31 is as follows: [Math 3]

For V _sci > 3.V _t , with n the ideality factor of the MOSFET. I _p corresponds to a current depending on geometric parameters (gate length and width, oxide thickness) and technological parameters (such as doping of the substrate) of a MOS transistor.

In this sensor circuit configuration, the MOS transistor 31 is an activation transistor arranged to charge the integration capacitance C _m when the photodiode 21 connected to its gate is in the dark. If the reading circuit 10 were an artificial neuron, the load current I _ex of the integration capacitance C _m would be an excitation current of the neuron, which is otherwise equal to the drain current la. By introducing equation 2 into equation 3 and replacing it with I _ex , we obtain: [Math 4]

By introducing equation 1 into equation 4, we obtain: [Math 5]

If we consider the ideal case where n=l (which corresponds to a slope below the ideal threshold for a MOSFET), we obtain: [Math 6]

This last equation demonstrates that the excitation current I _ex (the drain-source current la of the MOS transistor) is inversely proportional to the photovoltaic current I _p h, which means that the optical sensor according to the invention is clearly distinguishable from the operation of the conventional optical pulse sensors. In fact, electrical pulses will be generated by the artificial neuron 10 at very low luminance. The frequency of these pulses decreases as light intensity increases.

Furthermore, equation 6 shows that fine adjustment of the dynamics, that is to say the frequency contrast (for a given light intensity contrast) of the electrical pulses generated by the artificial neuron, is possible, by adjusting the supply voltage Vdd. The sensor according to the invention thus offers a possibility of effective adjustment for the dynamics, in particular to adapt to indoor lighting levels (50 to 3000 lux, levels encountered for domestic premises and/or industrial buildings) for many applications.

Figure 3 schematically represents a second example of sensor according to the invention which is a variant of the circuit of Figure 2 where the MOS transistor 31 is of the NMOS type. Its gate is connected to the cathode of photodiode 21, its drain to the supply voltage Vdd of the sensor and its source to the integration capacitance C _m . In this example also, transistor 31 is an activation transistor arranged to charge the capacitor when the photodiode is in the dark.

However, unlike the previous example, the source potential of the MOS transistor is “floating” in this implementation, the gate-source voltage being equal to:

[Math 7]

^gs Vdd VÇQ V _mem

Where V _mem is the voltage across the membrane capacitance, called the membrane voltage of the artificial neuron 10.

This alters the control of the drain current of the transistor (or excitation current) which will depend on the membrane voltage V _mem .

The sensor circuits described above can be used to make “OFF” cells.

Figure 4 schematically represents a first example of an “OFF” cell of a sensor according to the invention. The “OFF” cell 101 comprises a central pixel PC, forming an excitatory part 102 of the cell, and four peripheral pixels N, E, S, O forming an inhibitory part 103 of the cell. The central pixel PC is connected to each of the peripheral pixels N, E, S, O at the level of the membrane potential, thus sharing the same reading circuit 10 which can be an artificial neuron.

The exciting part 102 comprises the same circuit of Figure 2, namely a PMOS activation transistor 31 and a photodiode 21 connected by its anode to the gate of this transistor. This exciting part is supplied by a voltage Vdd _ex . Each pixel N, E, S, O of the inhibitory part 103 is similar to the circuit of Figure 2, with the difference that the transistor is a deactivation transistor 32 whose drain is connected to a current mirror 34 connected to the capacitor of integration C _m , and the source of the transistor is connected to a supply voltage Vddinh. Thus, from the excitation current i_exc the sum of all the inhibition currents i_inh is subtracted, a sum “weighted” according to the light intensity present at pixels N, E, S, O.

It should also be noted that this architecture offers the possibility of optimizing contrasts by adjusting Vddinh.

The “OFF” cell is also possible to implement using the architecture shown in Figure 5, using N-type MOS transistors for the excitation and inhibitory parts coupled to the photodiode. The exciting part 102 comprises the same circuit of Figure 3, namely an NMOS activation transistor 31 and a photodiode 21 connected by its cathode to the gate of this transistor. This exciting part is powered by a voltage Vddex.

Each pixel N, E, S, O of the inhibitory part 103 is similar to the circuit of Figure 3, with the difference that the transistor is a deactivation transistor 32 whose source is connected to a current mirror 34 connected to the capacitor of integration C _m , and the drain of the transistor is connected to a supply voltage Vddinh.

Compared to the first architecture, this second “OFF” cell architecture has the disadvantage of having the sources of the transistors floating.

Figure 6 schematically illustrates a sensor according to the invention comprising a set of pixels 100 organized in a matrix comprising a plurality of “OFF” type cells 101. Each “OFF” cell 101 comprises a central pixel PC and four peripheral pixels N, E , S, O, arranged so as to form a cross on the matrix, the peripheral pixels being named after the four cardinal points NORTH, EAST, SOUTH, WEST, according to their orientation relative to the central pixel PC.

In this example of matrix, each pixel 100 comprises a single photodiode connected to several different transistors, so as to serve several “OFF” cells 101, the photodiode then being connected to five different transistors including an activation transistor 31 of one pixel central PC and four deactivation transistors 32 of peripheral pixels N, E, S, O. For reasons of simplification, we will designate an “OFF” cell by the coordinates of its central pixel on the matrix. Thus, when we indicate that a cell is labeled (C8, L8), this means that its central pixel is located at column 8 and row 8 of the matrix.

The same photodiode is for example used both for the central pixel of the labeled “OFF” cell (C8, L8), and for the peripheral pixels of the adjacent “OFF” cells whose central pixels have the same coordinates as the peripheral pixels of the “OFF” cell in question. The peripheral pixels of adjacent “OFF” cells are:

- the EST pixel of the labeled cell (C7, L8),

- the WEST pixel of the labeled cell (C9, L8),

- the SOUTH pixel of the labeled cell (C8, L7), and

- the NORTH pixel of the labeled cell (C8, L9).

Thus, if we consider that the pixel matrix is designed according to the first “OFF” cell architecture shown in Figure 4, implemented with PMOS transistors, five interconnections go from the anode of the shared photodiode to grids of PMOS transistors (including an activation transistor for a central PC pixel and four peripheral pixel deactivation transistors), which requires routing but does not pose a fan-out problem (thanks to the very high input impedance presented by these transistors). Since the transistor sources are not floating in this first architecture, it is possible to have a single photodiode per pixel, shared between several “OFF” cells, while having two different supply voltages Vdd _ex and Vddinh.

However, if we consider that the pixel matrix is designed according to the second "OFF" cell architecture illustrated in Figure 5, implemented with NMOS transistors, five interconnections also go from the cathode of the shared photodiode to grids of NMOS transistors. However, in order to maintain an identical potential on the transistor gates, it is only possible to have a single photodiode per pixel, shared between several “OFF” cells, when Vdd _ex = Vddinh. Otherwise, two photodiodes per pixel will be required, which reduces the interest.

The first architecture is therefore preferred, not only because it uses only one photodiode per pixel, but also because it allows fine adjustment of contrasts by Vddinh adjustment.

In order to show the potential of the optical sensor according to the invention, a 64*64 pixel matrix was simulated. Figure 7 schematically illustrates this simulation. A sequential reading is carried out for 50 ps of each illuminated pixel (50 / 100 / 250 / 500 / 1000 / 5000 lux), one after the other. Thus, when an illuminated pixel is connected to the artificial neuron 10, the latter encodes the light intensity in the form of electrical pulses - time and frequency coding -, as for a biological retina. It should be noted that the leakage currents (inhibitors) associated with pixels in the dark (unilluminated pixels - luminance of 0 lux - which are never selected in the simulations given below) were taken into account in the simulation .

Figure 8 represents the temporal response of different pixels of a sensor according to the invention in an environment corresponding to a stadium lit at night with a maximum light intensity of 1500 lux. This is the response as a function of time of six pixels, from least to most illuminated, embedded in a matrix of 64*64 pixels (the other pixels being in darkness, that is to say, a luminance of 0 lux), each pixel having a different luminance.

The membrane voltage of the artificial neuron is plotted as a function of time. The neuron reacts promptly to the variation in light intensity observed when passing from one illuminated pixel to another. For this example, the supply voltage Vdd was adjusted such that, when the light intensity varies from 50 to 5000 lux (2 orders of magnitude between the least illuminated pixel and the most illuminated pixel), the ratio of electrical pulses delivered by the neuron (and therefore the frequency) is greater than 10 (ratio corresponding to the number of pulses for 50 lux divided by the number of pulses for 5000 lux).

Figure 9 schematically illustrates the temporal response of different pixels of a sensor according to the invention in an environment corresponding to a well-lit apartment with a maximum light intensity of 400 lux. This is the response as a function of time of six pixels, from least to most illuminated, embedded in a matrix of 64*64 pixels (the other pixels being in darkness), each pixel having a different luminance.

The supply voltage Vdd has been adjusted so as to increase the ratio - greater than 10 - between the number of electrical pulses, when the light intensity varies from 50 to 500 lux (for the previous case, this ratio for this variation light intensity was 3, while it was 10 when the light intensity varied from 50 to 5000 lux).

Figure 10 schematically represents the result of the simulation of an “OFF” cell according to the invention at different luminances. The “OFF” cell in Figure 4 was used for the simulation illustrated in Figure 10. We clearly observe that when the central pixel is more illuminated (1000 lux), the frequency of the electrical pulses delivered by the artificial neuron decreases (compared to illumination of only 100 lux), functioning perfectly mimicking biology.

In order to experimentally validate the concept of the negative image optical sensor, a 64*64 pixel chip was designed. This chip could be measured under tips, in low luminance conditions like those presented for the previous simulations. For characterization, the response of the artificial neuron was measured for a pixel, for different luminance conditions. A first experimental result is illustrated in Figure 11, with a pixel observed for 50 ps, from a situation corresponding to the room in “darkness” (1 lux, Figure 11 (a)) until illumination on the 1300 lux chip (figure 11 (c)), the supply voltage of the pixel being 600 mV and that of the neuron 300 mV.

From Figure 11, several lessons can be learned. Indeed, in accordance with the theory:

(i) the pixel generates spikes in the dark,

(ii) at ambient light (light intensity ~ 1000 lux, corresponding to Figure 11 (b)), the frequency of the electrical pulses decreases,

(iii) if we increase the light intensity (~ 1300 lux, corresponding to Figure 11 (c)), the frequency continues to decrease. It should be noted that if we continue to increase the luminance, the neuron will no longer generate electrical impulses.

To check the possibility of adjusting the dynamics of light intensity (and/or frequency of pulses generated by the neuron) by adjusting the pixel supply voltage, the latter was increased to 700 mV, the voltage power supply of the neuron remaining the same. The results are presented in Figure 12. We clearly observe an increase in the dynamic light intensity of the pixel: at 1000 lux and 1300 lux, more pulses are generated compared to Figure 11.

Figure 13 summarizes the results of Figures 11 and 12 by schematically representing the frequency of the electrical pulses in kHz generated as a function of the brightness in lux. This figure illustrates the possibility of controlling the dynamic light intensity of the optical sensor via the pixel supply voltage, so that it adapts to the lighting conditions of its environment. These experimental results support the results shown in simulation previously (figures 8 and 9).

The electronic chip integrating the sensor with the reading circuit can be encapsulated in a conventional manner in a housing. Alternatively, a polymerizable coating glue under UV radiation or under the effect of heat acts as an encapsulation resin or coating responding to mechanical and humidity constraints. Solvent-free and with high ionic purity, such glue protects against corrosion and allows great reliability and durability of the chip.

Figure 14 schematically illustrates the pulses generated by an artificial neuron of the Octopus type connected to a sensor according to the invention as described in Figure 2. These pulses have a frequency of approximately 386 kHz, and were obtained with a voltage of power supply of the pixel at 550 mV and a photodiode voltage V _co = 350 mV. This example corroborates the possibility of adjusting the frequency of pulses generated by the neuron by adjusting the pixel supply voltage.

Figure 15 is similar to Figure 14 with the pixel supply voltage increased by 100 mV. The pulse frequency then increases to approximately 4.5 MHz.

The potential applications of the invention concern the fields of on-board electronics, that is to say those which cannot benefit from connection to the electrical network. For these applications, the installation of a sensor according to the invention will be facilitated, because no modification of the infrastructure is required to power the sensor, a battery being sufficient. In this context, the applications are necessarily those of the Internet of Things where visual information, however rudimentary it may be, is required. Examples can be cited in the field of home automation (particularly helping the elderly) and transport (counting people on buses, metro, railway and land stations, airports). The variation of these applications can be carried out in very dark places, since the invention makes it possible to adjust the coding dynamics in the low luminance ranges (<50 lux).

The invention is not limited to the exemplary embodiments described above. For example, it is possible to provide another arrangement of pixels in the “OFF” cell of the matrix. For example, the cross described above can be rotated by an angle of 45°, that is to say be in an "X" on the pixel matrix rather than in a "+", the peripheral pixels then occupying the northeast, northwest, southeast and southwest orientations. The peripheral pixels can also be eight in number, instead of four.

Different lenses or optics can be associated with the sensor, for example with fixed or variable focal length.

Claims

1. Optical sensor (1) comprising: an integration capacitance (C _m ), a reading circuit (10) of the charge of the integration capacitance (C _m ), at least one MOS transistor (31; 32) operating below the threshold, whose drain-source current influences the charge of the integration capacitance (C _m ), at least one photodiode (21; 22) operating in photovoltaic mode, connected to the gate of this transistor, such so that the drain-source current (la) of the MOS transistor increases when the current generated by the photodiode decreases and vice versa.

2. Sensor (1) according to the preceding claim, the MOS transistor (31) being an activation transistor arranged to charge the integration capacitance (C _m ) when the photodiode (21) connected to its gate is in the dark .

3. Sensor (1) according to the preceding claim, the activation transistor (31) being of the PMOS type whose gate is connected to the anode of the photodiode (21), the drain to the integration capacitance (C _m ) and the source to a supply voltage (Vdd, Vdd _ex ) of the sensor.

4. Sensor (1) according to claim 2, the activation transistor (31) being of the NMOS type whose gate is connected to the cathode of the photodiode (21), the drain at a supply voltage (Vdd, Vdd _ex ) of the sensor and the source to the integration capacity (C _m ).

5. Sensor (1) according to claim 1, the MOS transistor (32) being a deactivation transistor arranged to discharge the integration capacitance (C _m ) when the photodiode (22) connected to its gate is in the dark.

6. Sensor (1) according to the preceding claim, the deactivation transistor (32) being of the PMOS type whose gate is connected to the anode of the photodiode (22), the drain to a current mirror (34) connected to the integration capacity (C _m ) and the source at a supply voltage (Vdd, Vddinh) of the sensor.

7. Sensor (1) according to claim 5, the deactivation transistor (32) being of the NMOS type whose gate is connected to the cathode of the photodiode (22), the drain to a supply voltage (Vdd, Vddinh) of the sensor and the source to a current mirror (34) connected to the integration capacitor (C _m ).

8. Sensor (1) according to any one of the preceding claims, comprising at least one “OFF” type photosensitive cell (101), the cell comprising:

An exciting part (102) comprising:

- at least one MOS activation transistor (31), operating below the threshold, whose drain-source current (la) influences the charge of the integration capacitor (C _m ), and

- at least one photodiode (21) operating in photovoltaic mode, connected to the gate of this activation transistor (31), such that the drain-source current (la) of the activation MOS transistor (31) is inversely proportional to the photovoltaic current generated by the photodiode (21), the activation transistor (31) being arranged to charge the integration capacitance (C _m ) when the photodiode (21) is in the dark; And

An inhibitor part (103) comprising:

- several MOS deactivation transistors (32), operating below the threshold, whose drain-source currents influence the charge of the integration capacitance (C _m ), and

- several photodiodes (22) operating in photovoltaic mode, each being connected to the gate of one of the deactivation transistors (32), such that the drain-source current (la) of this transistor is inversely proportional to the photovoltaic current generated by the associated photodiode (22), the deactivation transistor (32) being arranged to discharge the integration capacitance (C _m ) when the associated photodiode (22) is in the dark, the photodiode (21) associated with the transistor d the activation (31) being surrounded by the photodiodes (22) associated with the deactivation transistors (32).

9. Sensor (1) according to the preceding claim, the activation transistor (31) being of the PMOS type whose gate is connected to the anode of the associated photodiode (21), the drain to the integration capacitance (C _m ) and the source at a supply voltage Vdd _ex of the sensor. Sensor (1) according to the preceding claim, the deactivation transistor (32) being of the PMOS type whose gate is connected to the anode of the photodiode (22), the drain to a current mirror (34) connected to the capacitor integration (C _m ) and the source at a supply voltage Vddinh of the sensor. Sensor (1) according to claim 8, the activation transistor (31) being of the NMOS type whose gate is connected to the cathode of the photodiode (21), the drain to a supply voltage Vdd _ex of the sensor and the source to the integration capacity (Cm). Sensor (1) according to the preceding claim, the deactivation transistor (32) being of the NMOS type whose gate is connected to the cathode of the photodiode (22), the drain to a supply voltage Vddinh of the sensor and the source to a current mirror (34) connected to the integration capacitance (C _m ), the supply voltage Vddinh being preferably equal to Vdd _ex . Sensor (1) according to any one of the preceding claims 8 to 12, comprising a set of pixels organized in a matrix comprising a plurality of “OFF” type cells (101). Sensor (1) according to the preceding claim, each “OFF” cell (101) comprising a central pixel (PC) corresponding to the excitatory part (102) and several peripheral pixels (N, E, S, O) corresponding to the inhibitory part (103), the peripheral pixels (N, E, S, O) being notably four in number and the pixels of the “OFF” cell then being preferentially arranged on the matrix in the form of a cross. Sensor (1) according to one of the two preceding claims, each pixel (100) comprising a single photodiode (21; 22) connected to several different transistors (31; 32) so as to serve several “OFF” cells (101), the photodiode (21; 22) being in particular connected to five different transistors (31; 32) including an activation transistor (31) of a central pixel (PC) and four deactivation transistors (32) of peripheral pixels (N, E, S, O). Method for acquiring an image or video, in particular under lighting less than or equal to 3000 lux, using the sensor according to any one of the preceding claims.