WO2024111495A1 - Thin-plate thermistor and thin-plate thermistor-mounted piezoelectric vibration device - Google Patents

Thin-plate thermistor and thin-plate thermistor-mounted piezoelectric vibration device Download PDF

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Publication number
WO2024111495A1
WO2024111495A1 PCT/JP2023/041212 JP2023041212W WO2024111495A1 WO 2024111495 A1 WO2024111495 A1 WO 2024111495A1 JP 2023041212 W JP2023041212 W JP 2023041212W WO 2024111495 A1 WO2024111495 A1 WO 2024111495A1
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Prior art keywords
thermistor
thin plate
electrode
main surface
plate
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PCT/JP2023/041212
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French (fr)
Japanese (ja)
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賢周 森本
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株式会社大真空
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Publication of WO2024111495A1 publication Critical patent/WO2024111495A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C1/00Details
    • H01C1/14Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors
    • H01C1/142Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors the terminals or tapping points being coated on the resistive element
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C17/00Apparatus or processes specially adapted for manufacturing resistors
    • H01C17/06Apparatus or processes specially adapted for manufacturing resistors adapted for coating resistive material on a base
    • H01C17/065Apparatus or processes specially adapted for manufacturing resistors adapted for coating resistive material on a base by thick film techniques, e.g. serigraphy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C7/00Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
    • H01C7/04Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material having negative temperature coefficient
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02Details

Definitions

  • Such a thermistor-equipped piezoelectric vibration device is configured such that a quartz crystal plate with an excitation electrode formed thereon is housed in a ceramic package, and a thermistor is attached to the outside of the plate to detect the environmental temperature surrounding the quartz crystal unit (see, for example, Patent Document 1).
  • Thermistors have a laminated structure in which multiple layers of thermistor material and operating electrodes are stacked together, and those with a thickness of about 0.3 mm to 0.1 mm are commercially available and in use.
  • Thermistors are required to detect the temperature environment surrounding the quartz crystal unit with a small time lag.
  • the thermistors used to date have a laminated structure, which means that they require a certain thickness (height).
  • the electrodes of laminated thermistors are made of thick film electrodes produced by screen printing, etc., making the structure unsuitable for making thin thermistors.
  • a first split electrode and a second split electrode that are split into two on one surface and each serve as an operating electrode may be formed, and a common electrode that serves as a relay electrode may be formed on the other surface of the thermistor plate (the surface opposite to the first surface).
  • the present invention aims to provide a thin plate thermistor that improves the resistance characteristics of the thin plate thermistor by taking into account the surface roughness between one side and the other side of the thermistor plate, and a piezoelectric vibration device equipped with such a thin plate thermistor.
  • the thin plate thermistor of the present invention is characterized by having a single thermistor plate including one surface and another surface opposite to the first surface and having a surface roughness greater than that of the first surface, a first split electrode and a second split electrode formed on the first surface and split on the first surface, and a common electrode formed on the other surface.
  • the first and second split electrodes which serve as the working electrodes, are formed on one side of the thermistor plate with the smaller surface roughness, so there is less variation in the area in which the first and second split electrodes are formed compared to when the first and second split electrodes, which serve as the working electrodes, are formed on the other side with the larger surface roughness, and this makes it possible to suppress variation in the resistance characteristics of the thin plate thermistor.
  • the resistance characteristics of a thin plate thermistor are determined by the area of the first and second split electrodes facing the thermistor plate, forming the first and second split electrodes, which require precise areas, on the one side with the smaller surface roughness is an advantageous configuration for stabilizing the resistance characteristics of the thin plate thermistor.
  • the adhesion of the first and second split electrodes to that surface of the thermistor plate is improved and electrical conductivity is stabilized, allowing for a stable connection when a measurement probe or the like is brought into contact with the first and second split electrodes, making it possible to accurately measure the resistance characteristics of the thin plate thermistor.
  • the common electrode plays a role in preventing unnecessary resistance values from occurring in the thin plate thermistor, and since conductivity does not decrease as the surface area of the common electrode increases, the resistance value of the thin plate thermistor is not deteriorated.
  • the first and second divided electrodes, as well as the common electrode may be PVD (Physical Vapor Deposition) films.
  • the electrodes (first split electrode, second split electrode, common electrode) have a dense film configuration, making them excellent in terms of conductivity and adhesion to the thermistor plate. Also, the electrodes can be formed so that their area is the desired area, which results in stabilizing the resistance characteristics of the thin plate thermistor. This is particularly effective in stabilizing the resistance characteristics of miniaturized thin plate thermistors.
  • a piezoelectric vibration device equipped with a thin plate thermistor comprises a piezoelectric vibration device including a piezoelectric vibration plate having an excitation electrode formed on its surface and made of a plurality of metal film layers, a first sealing member bonded to one main surface of the piezoelectric vibration plate, and a second sealing member bonded to the other main surface of the piezoelectric vibration plate; and the thin plate thermistor, and is characterized in that the thin plate thermistor is bonded to the surface of the piezoelectric vibration device.
  • Another thin plate thermistor-mounted piezoelectric vibration device is characterized in that it has a piezoelectric vibration plate having an excitation electrode made of multiple metal film layers formed on its surface, the thin plate thermistor, and a package that houses the piezoelectric vibration plate and the thin plate thermistor.
  • the first and second split electrodes serving as the working electrodes are formed on one side of the thermistor plate with the smaller surface roughness, so that the areas in which the first and second split electrodes are formed are less likely to vary compared to when the first and second split electrodes serving as the working electrodes are formed on the other side with the larger surface roughness, and the variation in the resistance characteristics of the thin plate thermistor can be suppressed.
  • the resistance characteristics of a thin plate thermistor are determined by the areas of the first and second split electrodes facing the thermistor plate, forming the first and second split electrodes, which require precise areas, on one side with the smaller surface roughness is advantageous for stabilizing the resistance characteristics of the thin plate thermistor.
  • FIG. 10 is a plan view of a thin plate thermistor-equipped piezoelectric vibration device according to a second embodiment of the present invention.
  • FIG. 5 is a cross-sectional view of the thin plate thermistor mounted piezoelectric vibration device shown in FIG. 4 along line AA.
  • 5A is a plan view showing a first main surface of a piezoelectric diaphragm in the sandwich structure device of FIG. 4, and
  • FIG. 5B is a plan view showing a second main surface of the piezoelectric diaphragm in the sandwich structure device of FIG. 4.
  • 5A is a plan view showing a first main surface of a first sealing member in the sandwich structure device of FIG. 4, and FIG.
  • Fig. 1(a) is a perspective view of the thin plate thermistor 5
  • Fig. 1(b) is a cross-sectional view taken along line B-B of the thin plate thermistor 5 shown in Fig. 1(a).
  • Fig. 2(a) is a plan view showing the first main surface 51a, which is one of the main surfaces, of the thin plate thermistor 5 shown in Fig. 1
  • Fig. 2(b) is a plan view showing the second main surface 51b, which is the main surface (other main surface) on the opposite side (back side) to the first main surface 51a, of the thin plate thermistor 5 shown in Fig. 1.
  • the electrodes common electrode 52, split electrodes 53
  • the thermistor plate 51 is not hatched.
  • the surface roughness is greatest in the order of the center of the first main surface 51a, the second main surface 51b, and the ends of the first main surface 51a (surface roughness of the center of the first main surface 51a > surface roughness of the second main surface 51b > surface roughness of the ends of the first main surface 51a).
  • the ends of the first main surface 51a, the second main surface 51b, and the center of the first main surface 51a are smooth surfaces in that order.
  • the common electrode 52 is formed on the entire surface (or almost the entire surface) of the first main surface 51a of the thermistor plate 51.
  • the common electrode 52 is a thin metal film, and is a PVD (Physical Vapor Deposition) film formed by a PVD film formation method such as sputtering or vacuum deposition.
  • PVD Physical Vapor Deposition
  • the resistance value can be reduced with electrodes of small area (the common electrode 52, the first split electrode 53a, the second split electrode 53b), the resistance characteristics of the thin plate thermistor 5 are easily stabilized, and the voltage resistance performance of the thin plate thermistor 5 is improved.
  • the thin plate thermistor 5 When the thin plate thermistor 5 is configured such that the distance between the first divided electrode 53a and the second divided electrode 53b is small, depending on the applied voltage, the conductive path from one of the first and second polarized electrodes 53a and 53b to the other of the first and second polarized electrodes 53a and 53b (this path does not include the common electrode 52) becomes dominant, and the desired resistance value may not be obtained. Therefore, as shown in FIG.
  • the total area of the first split electrode 53a and the second split electrode 53b is within the range of 40% to 85% of the area of the second main surface 51b of the thermistor plate 51.
  • the thin plate thermistor 5 can perform stable temperature detection. If the total area of the first split electrode 53a and the second split electrode 53b is less than 40% of the area of the second main surface 51b of the thermistor plate 51, the first split electrode 53a and the second split electrode 53b of the thin plate thermistor 5 will be too small, and the resistance value of the thin plate thermistor 5 will be too high, which may make it impossible to accurately detect the temperature of the device to be detected.
  • the total area of the first split electrode 53a and the second split electrode 53b exceeds 85% of the area of the second main surface 51b of the thermistor plate 51, a short circuit may occur between the first split electrode 53a and the second split electrode 53b, causing the thermistor to no longer function as a thermistor.
  • a material mainly composed of manganese or mainly composed of manganese and nickel (such as Mn-Fe-Ni-Ti material or Mn-Fe material) is made into a slurry with a binder or the like, and a wafer-like green sheet of the thermistor plate 51 is created using a pressure film forming technique such as screen printing or doctor blade technology, and this is then sintered and molded into the wafer 51A that will become the thermistor plate 51 using a firing technique (sintering and molding process).
  • a firing technique sintered and molded into the wafer 51A that will become the thermistor plate 51 using a firing technique (sintering and molding process).
  • the green sheet is placed on a firing setter made of alumina (Al 2 O 3 ) and fired, but if the firing temperature is higher than the melting point of manganese, the manganese contained in the green sheet melts into the firing setter.
  • alumina Al 2 O 3
  • the first surface 51aA (the surface that becomes the first main surface 51a of the thermistor flat plate 51), which is the surface of the thermistor flat plate wafer 51A that was in contact with the firing setter
  • the second surface 51bA (the surface that becomes the second main surface 51b of the thermistor flat plate 51), which is the surface opposite (back side) to the surface that was in contact with the firing setter
  • the first surface 51aA of the thermistor flat plate wafer 51A has a larger surface roughness than the second surface 51bA because manganese has melted out of the first surface 51aA.
  • break line forming process is carried out to form break lines (small grooves) 51B in the thermistor plate wafer 51A.
  • the thermistor flat plate wafer 51A is irradiated from the first surface 51aA with a laser LA1 having a small irradiation area and a large power density (W/ cm2 ) as shown in Fig. 3(b) at the portion indicated by the dotted line in Fig. 3(a), and a break line 51B shown in Fig. 3(c) that does not penetrate the thermistor flat plate wafer 51A is formed on the first surface 51aA (first stage laser irradiation).
  • the break line 51B is formed by this first stage laser irradiation, as shown in Fig. 3(c)
  • steep and tall burrs 51C are formed at both ends of the break line 51b of the thermistor flat plate wafer 51A, and chipping is likely to occur at the burr 51C portion.
  • the thermistor flat plate wafer 51A is irradiated with a laser LA2 having a large irradiation area and a small power density (W/cm 2 ) as shown in FIG. 3(d) from the first surface 51aA side on which the break lines 51B are formed, at the portion indicated by the dotted line in FIG. 3(a) (second-stage laser irradiation).
  • the irradiation area in the second-stage laser irradiation is larger than that in the first-stage laser irradiation, and the power density (W/cm 2 ) in the second-stage laser irradiation is smaller than that in the first-stage laser irradiation.
  • the second-stage laser irradiation melts the burrs 51C, and the melted portion subsequently solidifies, forming a solidified portion 51D as a laser mark.
  • the surface roughness is smaller at the ends than at the center, and a slight protrusion (a protrusion lower than the height of the burrs 51C) is formed in at least a portion of the ends, thereby ensuring a curved surface at the ends.
  • the surface roughness of the end of the area surrounded by the break lines 51B on the first surface 51aA is the smallest
  • the surface roughness of the second surface 51bA is the second smallest
  • the surface roughness of the center of the area surrounded by the break lines 51B on the first surface 51aA is the largest.
  • the thermistor flat plate wafer 51A may be irradiated with a laser from the first surface 51aA side on which the break line 51B is formed to the dotted line in the dashed line in FIG. 3(a) to make the depth of the break line 51B deeper or penetrate the laser irradiated portion (intermediate stage laser irradiation). In this way, when the thermistor flat plate wafer 51 is broken along the break line 51B, damage to the thin plate thermistor 5 can be suppressed.
  • the irradiation area in the intermediate stage laser irradiation the irradiation area in the first stage laser irradiation ⁇ the irradiation area in the second stage laser irradiation, and the value of the light intensity per unit area in the intermediate stage laser irradiation ⁇ the power density in the first stage laser irradiation (W/cm 2 ) > the power density in the second stage laser irradiation (W/cm 2 ).
  • an electrode forming process is performed in which electrodes (common electrode 52, first divided electrode 53a, second divided electrode 53b) are formed on the thermistor flat plate wafer 51A.
  • an electrode film (metal film) is formed by sputtering on a predetermined area (area surrounded by break lines 51B on the first surface 51aA) of the thermistor flat plate wafer 51A after the break line forming process, and patterned using photolithography technology to form the common electrode 52
  • an electrode film (metal film) is formed by sputtering on a predetermined area (area behind the area surrounded by break lines 51B on the first surface 51aA) of the thermistor flat plate wafer 51A after the break line forming process, and patterned using photolithography technology to form the first divided electrode 53a and the second divided electrode 53b.
  • a laminated film structure is adopted in which a Ti film is formed as a base layer, a NiTi film made of an alloy of Ni and Ti is formed as an upper layer (middle layer), and an Au film is formed as a main layer (top layer) on the surface.
  • a laminated film structure of a Ti film, a NiTi film, and a Au film is adopted, when the thin plate thermistor 5 is finally soldered to a mounting board, solder erosion is unlikely to occur and a stable conductive bond can be achieved.
  • a TiO2 film may be formed between the base layer (Ti film) and the middle layer (NiTi film).
  • the metal film configurations of the first polarization electrode 53 a and the second split electrode 53 b may be different from those of the common electrode 52.
  • the metal film configurations of the first polarization electrode 53 a and the second split electrode 53 b may be a laminated film configuration of a Ti film, a NiTi film, and an Au film
  • the film configuration of the common electrode 52 may be a laminated film configuration of a Ti film and an Au film.
  • a Cr film or Ti film may be formed as an underlayer, and a laminated film configuration of an Au film, an Ag film, a Pt film, etc. may be formed on top of it, or a film configuration using only a Cu film may be formed. Note that when a laminated film configuration of an underlayer of a Cr film or Ti film and an Au film, an Ag film, a Pt film, or a single layer film configuration of a Cu film is adopted, they can be joined with a conductive resin adhesive.
  • the thermistor plate wafer 51A on which the common electrode 52, the first divided electrode 53a, and the second divided electrode 53b are formed is broken along the break lines 51B (breaking process). This results in individual thin plate thermistors 5 on which the common electrode 52, the first divided electrode 53a, and the second divided electrode 53b are formed, thereby completing the thin plate thermistors 5.
  • the surface roughness of the first main surface 51a of the thermistor plate 51 is smaller at the ends than at the center, so cracks and chips are less likely to occur on the first main surface 51a side of the ends of the thermistor plate 51, and as a result, the mechanical strength of the thin plate thermistor 5 can be improved.
  • at least a portion of the end of the first main surface 51a of the thermistor plate 51 is raised, so cracks and chips are less likely to occur on the first main surface 51a side of the ends of the thermistor plate 51, and as a result, the mechanical strength of the thin plate thermistor 5 can be improved.
  • the surface condition of the end of the first main surface 51a of the thermistor plate 51 can be smoothed to ensure a curved surface, which makes it less likely for cracks or chips to occur on the first main surface 51a side of the end of the thermistor plate 51, thereby improving the mechanical strength of the thin plate thermistor 5.
  • the solidified portion 51D as a laser mark, a curved surface can be easily formed at the solidified portion 51D.
  • the first and second split electrodes 53a and 53b which serve as the working electrodes, are formed on the second main surface 51b of the thermistor plate 51, which has the smaller surface roughness, the areas on which the first and second split electrodes 53a and 53b are formed are less likely to vary compared to when the first and second split electrodes 53a and 53b, which serve as the working electrodes, are formed on the first main surface 51a, which has the larger surface roughness, and this makes it possible to suppress variations in the resistance characteristics of the thin plate thermistor 5.
  • the resistance characteristics of the thin plate thermistor 5 are determined by the areas of the first and second split electrodes 53a and 53b facing the thermistor plate 51, forming the first and second split electrodes 53a and 53b, which require precise areas, on the second main surface 51b, which has the smaller surface roughness, is advantageous for stabilizing the resistance characteristics of the thin plate thermistor 5.
  • the adhesion of the first split electrode 53a and the second split electrode 53b to the second main surface 51b of the thermistor plate 5 is improved and the conductivity is stabilized, allowing a stable connection when a measurement probe or the like is brought into contact with the first split electrode 53a and the second split electrode 53b, making it possible to accurately measure the resistance characteristics of the thin plate thermistor 5.
  • the common electrode 52 which serves as a relay electrode
  • the surface area of the portion where the common electrode 52 is formed increases relative to the apparent area, and the total amount of conductors related to the common electrode 52 increases accordingly, improving the electrical conductivity.
  • the common electrode 52 plays a role in preventing unnecessary resistance values from occurring in the thin plate thermistor 5, and the electrical conductivity does not decrease as the surface area of the common electrode 52 increases, so the resistance value of the thin plate thermistor 5 is not deteriorated.
  • the first split electrode 53a, the second split electrode 53b, and the common electrode 52 are PVD films formed by a PVD film formation method such as sputtering or vacuum deposition, the first split electrode 53a, the second split electrode 53b, and the common electrode 52 have a dense film configuration, making them electrodes with excellent conductivity and adhesion to the thermistor plate 5.
  • the electrodes can be formed so that they have a desired area, and as a result, the resistance characteristics of the thin plate thermistor 5 can be stabilized.This is particularly effective in stabilizing the resistance characteristics of a miniaturized thin plate thermistor 5.
  • FIG. 4 is a plan view of a piezoelectric vibration device 1 equipped with a thin plate thermistor.
  • FIG. 5 is a cross-sectional view of the device 1 shown in the plan view in FIG. 4, taken along the line A-A.
  • the piezoelectric vibration device 1 equipped with a thin plate thermistor is a device having a sandwich-structured piezoelectric vibration device (hereinafter also referred to as a "sandwich-structured device") 2 and the above-mentioned thin plate thermistor 5 mounted on the sandwich-structured device 2.
  • the "thin plate thermistor-equipped piezoelectric vibration device 1" may simply be referred to as “device 1.”
  • the thickness of the sandwich-structured device 2 is about 120 ⁇ m, while the thin plate thermistor 5 can be less than half the thickness of the sandwich-structured device 2 (about 50 ⁇ m).
  • the sandwich structure device 2 is configured with a piezoelectric diaphragm 10, a first sealing member 20, and a second sealing member 30.
  • the piezoelectric diaphragm 10 and the first sealing member 20 are bonded together, and the piezoelectric diaphragm 10 and the second sealing member 30 are bonded together, thereby forming a substantially rectangular sandwich structure package.
  • FIG. 6(a) is a plan view showing the first main surface 11, which is one of the main surfaces (the surface to be bonded to the first sealing member 20) of the single piezoelectric diaphragm 10 before bonding.
  • FIG. 6(b) is a plan view showing the second main surface 12, which is the other main surface (the surface to be bonded to the second sealing member 30) of the single piezoelectric diaphragm 10 before bonding.
  • the piezoelectric diaphragm 10 is a piezoelectric substrate made of a piezoelectric material such as quartz, and both main surfaces (first main surface 11, second main surface 12) are formed as flat, smooth surfaces (mirror-finished). In this embodiment, an AT-cut quartz plate that performs thickness-shear vibration is used as the piezoelectric diaphragm 10.
  • both main surfaces of the piezoelectric diaphragm 10 are in the XZ plane, the direction parallel to the short side direction is the X-axis direction, the direction parallel to the long side direction is the Z-axis direction, and the direction perpendicular to the XZ plane is the Y-axis direction.
  • the piezoelectric diaphragm 10 has a vibration part 13 formed in a substantially rectangular shape, an outer frame part 14 that surrounds the outer periphery of the vibration part 13, and a holding part 15 that holds the vibration part 13 by connecting the vibration part 13 and the outer frame part 14.
  • the area between the vibration part 13 and the outer frame part 14 is a cutout part (an opening that penetrates the piezoelectric diaphragm 10 in the thickness direction) except for the part where the holding part 15 is formed.
  • the piezoelectric diaphragm 10 is configured such that the vibration part 13, the outer frame part 14, and the holding part 15 are integrally provided.
  • a pair of excitation electrodes (a first excitation electrode 111 on the first main surface 11 side and a second excitation electrode 121 on the second main surface 12 side) are formed on the first main surface 11 and the second main surface 12 of the piezoelectric diaphragm 10.
  • the holding portion 15 is provided at only one location between the vibration portion 13 and the outer frame portion 14. Furthermore, the vibration portion 13 and the holding portion 15 are formed thinner than the outer frame portion 14. Due to this difference in thickness between the outer frame portion 14 and the holding portion 15, the natural frequencies of the piezoelectric vibrations of the outer frame portion 14 and the holding portion 15 are different, and the piezoelectric vibrations are not propagated to the outer frame portion 14. Note that the location where the holding portion 15 is formed is not limited to one location, and the holding portion 15 may be provided at two locations between the vibration portion 13 and the outer frame portion 14.
  • the first excitation electrode 111 is provided on the first main surface 11 side of the vibration part 13, and the second excitation electrode 121 is provided on the second main surface 12 side of the vibration part 13.
  • the first excitation electrode 111 and the second excitation electrode 121 are each connected to an extraction electrode (extraction wiring electrode film) (the first extraction electrode 112 on the first main surface 11 side, and the second extraction electrode 122 on the second main surface 12 side) for connecting these excitation electrodes to external electrode terminals.
  • the first extraction electrode 112 is extracted from the first excitation electrode 111 and connected to the connection bonding pattern 114 formed on the outer frame part 14 via the holding part 15.
  • the second extraction electrode 122 is extracted from the second excitation electrode 121 and connected to the connection bonding pattern 124 formed on the outer frame part 14 via the holding part 15.
  • the first main surface 11 and the second main surface 12 of the piezoelectric diaphragm 10 are each formed with a bonding pattern for bonding the piezoelectric diaphragm 10 to the first sealing member 20 and the second sealing member 30.
  • the bonding pattern includes a sealing pattern for hermetically sealing the internal space of the package, and a conductive pattern for conducting wiring and electrodes. Note that in Figures 6(a), (b), 7(b), and 8(a), the bonding regions where the bonding patterns are formed are indicated by diagonal hatching.
  • a vibration-side first bonding pattern 113 is formed on the first main surface 11, and a vibration-side second bonding pattern 123 is formed on the second main surface 12.
  • the vibration-side first bonding pattern 113 and the vibration-side second bonding pattern 123 are provided on the outer frame portion 14 and are formed in a ring shape in a planar view.
  • the area inside the vibration-side first bonding pattern 113 and the vibration-side second bonding pattern 123 becomes the sealing area of the vibration portion 13 (the area that becomes the internal space of the package after bonding).
  • the first excitation electrode 111 and the second excitation electrode 121 are not electrically connected to the vibration-side first bonding pattern 113 and the vibration-side second bonding pattern 123.
  • connection bonding patterns 115 are formed outside the sealing area (outside the vibration side first bonding pattern 113), and connection bonding patterns 114 and 116 are formed within the sealing area (inside the vibration side first bonding pattern 113).
  • connection bonding patterns 125 are formed outside the sealing area (outside the vibration side second bonding pattern 123), and connection bonding pattern 124 is formed within the sealing area (inside the vibration side second bonding pattern 123).
  • the connection bonding patterns 115 on the first main surface 11 side and the connection bonding patterns 125 on the second main surface 12 side are provided in areas near the four corners (corners) of the outer frame portion 14, respectively.
  • the piezoelectric diaphragm 10 has a plurality of through holes 16 formed between the first main surface 11 and the second main surface 12, and a through electrode is formed on the inner wall surface of each through hole 16 to provide electrical continuity between the first main surface 11 and the second main surface 12.
  • a through electrode is formed on the inner wall surface of each through hole 16 to provide electrical continuity between the first main surface 11 and the second main surface 12.
  • four through holes 16 and through electrodes are formed to provide electrical continuity between the connection bonding pattern 115 and the connection bonding pattern 125, and one through hole 16 and through electrode is formed to provide electrical continuity between the connection bonding pattern 116 and the connection bonding pattern 124.
  • the first excitation electrode 111, the second excitation electrode 121, the first extraction electrode 112, the second extraction electrode 122, the vibration side first bonding pattern 113, the vibration side second bonding pattern 123, and the connection bonding patterns 114 to 116, 124, and 125 can be formed in the same process. Specifically, they can be formed from an underlayer (Ti film) formed by physical vapor deposition on both main surfaces (first main surface 11, second main surface 12) of the piezoelectric diaphragm 10, and a bonding film (Au film) formed by physical vapor deposition on the underlayer.
  • the configuration of the laminated film forming the bonding pattern is not limited to a two-layer structure of a Ti film and an Au film, but may be a three-layer or more structure including other films (for example, a barrier film formed between the Ti film and the Au film).
  • Figure 7(a) is a plan view showing the first main surface 21, which is one of the main surfaces (outer surface) of the single first sealing member 20 before bonding.
  • Figure 7(b) is a plan view showing the second main surface 22, which is the other main surface (the bonding surface with the piezoelectric diaphragm 10) of the single first sealing member 20 before bonding.
  • the first sealing member 20 is a rectangular substrate formed from a single glass wafer or quartz wafer, and the second main surface 22 of this first sealing member 20 is formed as a flat and smooth surface (mirror finish).
  • the electrode pattern 211 is a mounting pad for mounting the thin plate thermistor 5 (see FIG. 4).
  • the wiring pattern 212 is a wiring pattern that is part of the wiring path that connects the second excitation electrode 121 to the external electrode terminal 321 (see FIG. 8(b)).
  • the wiring pattern 213 is a wiring pattern that is part of the wiring path that connects the first excitation electrode 111 to the external electrode terminal 321.
  • a bonding pattern is formed on the second main surface 22 of the first sealing member 20 for bonding the first sealing member 20 to the piezoelectric diaphragm 10.
  • This bonding pattern includes a sealing pattern for hermetically sealing the internal space of the package, and a conductive pattern for conducting wiring and electrodes.
  • the sealing pattern in the first sealing member 20 is a sealing-side first bonding pattern 221.
  • the sealing-side first bonding pattern 221 is formed in a ring shape in a plan view, and its inner region becomes the sealing region.
  • four connection bonding patterns 222 are formed near the four corners (corners) outside the sealing region (outside the sealing-side first bonding pattern 221), and connection bonding patterns 223 to 225 are formed within the sealing region (inside the sealing-side first bonding pattern 221).
  • the connection bonding pattern 224 and the connection bonding pattern 225 are connected by a wiring pattern 226.
  • the first sealing member 20 has a plurality of through holes 23 formed between the first main surface 21 and the second main surface 22, and a through electrode is formed on the inner wall surface of each through hole 23 to provide electrical continuity between the first main surface 21 and the second main surface 22.
  • four through holes 23 and through electrodes are formed to provide electrical continuity between the electrode pattern 211 or the wiring patterns 212, 213 and the connection bonding pattern 222, one through hole 23 and through electrode are formed to provide electrical continuity between the wiring pattern 212 and the connection bonding pattern 223, and one through hole 23 and through electrode are formed to provide electrical continuity between the wiring pattern 213 and the connection bonding pattern 225.
  • the sealing-side first bonding pattern 221, the connection bonding patterns 222 to 225, and the wiring pattern 226 can be formed in the same process. Specifically, they can be formed from an underlayer (Ti film) formed by physical vapor deposition on the second main surface 22 of the first sealing member 20, and a bonding film (Au film) formed by physical vapor deposition on the underlayer.
  • underlayer Ti film
  • Au film bonding film
  • Figure 8(a) is a plan view showing the first main surface 31, which is one of the main surfaces (the surface to be bonded to the piezoelectric diaphragm 10), of the second sealing member 30 alone before bonding.
  • Figure 8(b) is a plan view showing the second main surface 32, which is the other main surface (outer surface) of the second sealing member 30 alone before bonding.
  • the second sealing member 30 is a rectangular substrate formed from a single glass wafer or quartz wafer, and the first main surface 31 of this second sealing member 30 is formed as a flat and smooth surface (mirror-finished).
  • a bonding pattern is formed on the first main surface 31 of the second sealing member 30 for bonding the second sealing member 30 to the piezoelectric diaphragm 10.
  • This bonding pattern includes a sealing pattern for hermetically sealing the internal space of the package, and a conductive pattern for conducting wiring and electrodes.
  • the sealing pattern in the second sealing member 30 is a sealing-side second bonding pattern 311.
  • the sealing-side second bonding pattern 311 is formed in a ring shape in a plan view, and its inner region becomes the sealing region.
  • four connection bonding patterns 312 are formed near the four corners (corners) outside the sealing region (outside the sealing-side second bonding pattern 311).
  • the second main surface 32 of the second sealing member 30 is provided with four external electrode terminals 321 that electrically connect the device 1 to the outside.
  • the external electrode terminals 321 are located at the four corners (corner portions) of the second sealing member 30.
  • the second sealing member 30 has a plurality of through holes 33 formed between the first main surface 31 and the second main surface 32, and a through electrode is formed on the inner wall surface of each through hole 33 to provide electrical continuity between the first main surface 31 and the second main surface 32. Specifically, four through holes 33 and through electrodes are formed to provide electrical continuity between the connection bonding pattern 312 and the external electrode terminal 321.
  • the sealing-side second bonding pattern 311 and the bonding bonding pattern 312 can be formed by the same process. Specifically, they can be formed from a base layer (Ti film) formed by physical vapor deposition on the first main surface 31 of the second sealing member 30, and a bonding film (Au film) formed by physical vapor deposition on the base layer.
  • a base layer Ti film
  • Au film bonding film
  • the piezoelectric diaphragm 10 and the first sealing member 20 are diffusion bonded with the vibration side first bonding pattern 113 and the sealing side first bonding pattern 221 overlapping each other, and the piezoelectric diaphragm 10 and the second sealing member 30 are diffusion bonded with the vibration side second bonding pattern 123 and the sealing side second bonding pattern 311 overlapping each other, to manufacture a sandwich structure package.
  • the vibration side first bonding pattern 113 and the sealing side first bonding pattern 221 are bonded to form a sealing pattern layer between the piezoelectric diaphragm 10 and the first sealing member 20, and the vibration side second bonding pattern 123 and the sealing side second bonding pattern 311 are bonded to form a sealing pattern layer between the piezoelectric diaphragm 10 and the second sealing member 30.
  • connection bonding patterns which are conductive patterns
  • the connection bonding patterns are also bonded together, and the bonded conductive patterns form a conductive pattern layer between the piezoelectric diaphragm 10 and the first sealing member 20 or between the piezoelectric diaphragm 10 and the second sealing member 30.
  • electrical conduction is achieved between the first excitation electrode 111 and the second excitation electrode 121 and the external electrode terminals 321 at the lower right and upper left of Figure 8 (b).
  • the thin plate thermistor 5 is mounted on the sandwich structure device 2 with the second main surface 51b, on which the split electrode 53 is formed, as the underside (the joining surface with the sandwich structure device 2), and the split electrode 53 is electrically joined to the electrode pattern 211 of the first sealing member 20.
  • the thin plate thermistor 5 mounted on the sandwich structure device 2 is also arranged to be electrically conductive with the external electrode terminals 321 at the upper right and lower left of Figure 8 (b).
  • the thin plate thermistor 5 has wide-area metal electrodes (common electrode 52, split electrodes 53), and thus can act advantageously as a shielding member for the sandwich structure device 2.
  • the thin plate thermistor 5 is arranged in the sandwich structure device 2 so that, in a plan view of the device 1, at least a portion of the thin plate thermistor 5 overlaps with the vibrating portion 13 of the sandwich structure device 2 (see FIG. 4).
  • the thin plate thermistor 5 is arranged so that it overlaps with the entire first excitation electrode 111 and the second excitation electrode 121 in a plan view, the shielding effect of the thin plate thermistor 5 can be maximized, which is more preferable.
  • the thin plate thermistor 5 is arranged in the sandwich structure device 2 so that both ends overlap the outer frame portion 14 at least on two opposing sides of the sandwich structure device 2.
  • the first sealing member 20 and the second sealing member 30 in the sandwich structure device 2 are extremely thin substrates, and brittle materials such as glass and quartz are used. For this reason, the strength of the sandwich structure device 2 is particularly low in the center (the area where the outer frame portion 14 of the piezoelectric diaphragm 10 does not exist). In such a sandwich structure device 2, if the thin plate thermistor 5 is arranged in the center area of the sandwich structure device 2, there is a risk that the first sealing member 20 will crack due to the pressing force when mounting the thin plate thermistor 5.
  • the thin plate thermistor 5 may also overlap the outer frame portion 14 on two sides facing in the long direction of the sandwich structure device 2. Furthermore, the thin plate thermistor 5 may be arranged so as to overlap not only two opposing sides of the sandwich structure device 2, but also three or four sides.
  • the split electrodes 53 and the electrode patterns 211 are electrically connected by a conductive resin adhesive 61 (see FIG. 5). However, this is not limited to this, and the split electrodes 53 and the electrode patterns 211 may be connected by Au (gold) bumps. Furthermore, the gap between the thin plate thermistor 5 and the sandwich structure device 2 (the gap where the conductive resin adhesive 61 is not present) is filled with a non-conductive resin adhesive 62 (see FIG. 5).
  • the non-conductive resin adhesive 62 may not only be filled on the underside of the thin plate thermistor 5, but may also be used as a sealing resin that seals the entire thin plate thermistor 5. Note that a silicone-based resin can be used as the conductive resin adhesive 61, and an epoxy-based resin can be used as the non-conductive resin adhesive 62.
  • the thermal conductivity between the thin plate thermistor 5 and the sandwich structure device 2 can be improved. This allows the thin plate thermistor 5 to be maintained at a temperature close to that of the vibrating part 13 of the sandwich structure device 2.
  • Surface bonding between the sandwich structure device 2 and the thin plate thermistor 5 also has the advantage of improving the strength of the device 1.
  • the conductive resin adhesive 61 and the non-conductive resin adhesive 62 are used to bond the thin plate thermistor 5, it is preferable that the conductive resin adhesive 61 has a higher thermal conductivity than the non-conductive resin adhesive 62. This can further improve the thermal conductivity between the thin plate thermistor 5 and the sandwich structure device 2.
  • the thin plate thermistor 5 is surface-bonded to the first main surface 21 of the first sealing member 20 by the conductive resin adhesive 61 and the non-conductive resin adhesive 62 over more than half (50% to 100%) of the area of the thin plate thermistor 5 in a plan view.
  • the above-mentioned piezoelectric vibration device 1 equipped with a thin plate thermistor is less likely to crack or chip at the end of the thermistor plate 51, and by providing the thin plate thermistor 5 of the first embodiment, which has excellent resistance characteristics, it is possible to improve the temperature detection accuracy.
  • the first main surface 51a of the thin plate thermistor 5 is arranged so as to be the surface opposite to the surface facing the sandwich structure device 2 (piezoelectric vibration plate 10), and by arranging at least a solidified portion 51D (curved surface) on the outer surface of the thin plate thermistor 5, the end of the thin plate thermistor 5 is less likely to crack or chip, which is desirable in terms of increasing mechanical strength.
  • Fig. 9 is an exploded perspective view of a thin plate thermistor-mounted piezoelectric vibration device XcX.
  • Fig. 10 is a bottom view of the thin plate thermistor-mounted piezoelectric vibration device XcX shown in the exploded perspective view of Fig. 9.
  • Fig. 11 is a CC cross-sectional view of the thin plate thermistor-mounted piezoelectric vibration device XcX of Fig. 10.
  • the thin plate thermistor-mounted piezoelectric vibration device XcX is a device having a package 1X with an upper storage section 11AX and a lower storage section 11BX, a piezoelectric vibration plate 2X stored in the upper storage section 11AX, the above-mentioned thin plate thermistor 5 stored in the lower storage section 11BX, and a lid 3X that hermetically seals the upper storage section 11A.
  • the package 1X is made of ceramic and has a rectangular parallelepiped shape overall, with an upper storage section 11AX that opens upward and a lower storage section 11BX that opens downward.
  • the upper storage section 11AX and the lower storage section 11BX are configured so that their closed portions (bottoms) are back-to-back with respect to the substrate 11CX.
  • the upper storage section 11AX has a concave rectangular storage configuration that opens upward, and mounting electrodes 16X, 17X made of a metal film are formed on the bottom of the upper storage section 11AX.
  • the mounting electrodes 16X, 17X are formed side by side in a direction that follows the short side of the package 1X.
  • a rectangular sealing section 10X is provided on the outer periphery of the upper storage section 11AX, and is located higher than the bottom, and a metal film layer is formed on the sealing section 10X.
  • Mount electrodes 16X, 17X are made of multiple metal films, and are laminated in the order of a W (tungsten) layer, a Ni (nickel) layer, and a Au (gold) layer.
  • the W layer is integrally formed by firing with the ceramic material that constitutes the package, and the Ni layer and Au layer are formed on the W layer by plating.
  • Sealing section 10X also has a metal layer configuration similar to that of mounting electrodes 16X, 17X, with a laminated configuration of a W layer, a Ni layer, and a Au layer laminated in that order.
  • mounting electrodes 18X, 19X and mounting electrodes 12X, 13X, 14X, and 15X are also manufactured using the same manufacturing method, and each has a laminated configuration of a W layer, a Ni layer, and a Au layer laminated in that order.
  • Lower storage section 11BX has a concave rectangular storage configuration that opens downward, and mounting electrodes 18X, 19X made of metal film are formed on the bottom of lower storage section 11BX.
  • Mounting electrodes 18X, 19X are rectangular with long and short sides, and are formed so that the long side of mounting electrode 18X faces the long side of mounting electrode 19X in the direction along the long side of package 1X.
  • Mounting electrodes 18X, 19X may also be formed so that they are aligned in the direction along the short side of package 1X.
  • the four corners of the lower storage section 11BX are provided with mounting electrodes 12X, 13X, 14X, and 15X that are located higher than the bottom.
  • Each of the mounting electrodes 12X, 13X, 14X, and 15X has a rectangular shape, and the mounting electrodes 12X and 14X are electrically connected to the mounting electrodes 16X and 17X, and the mounting electrodes 13X and 15X are electrically connected to the mounting electrodes 18X and 19X by internal wiring within the package 1X.
  • Excitation electrodes 21X and 22X are formed in the center of the front and back of the piezoelectric diaphragm 2X, and the excitation electrodes 21X and 22X are drawn to the outer periphery of the piezoelectric diaphragm 2X by strip-shaped lead electrodes 21aX and 22aX having a width.
  • the excitation electrodes 21X and 22X are rectangular, and on one main surface of the piezoelectric diaphragm 2X, the excitation electrode 21X is drawn from one short corner to an end of one main surface of the piezoelectric diaphragm 2X by the lead electrode 21aX, and on the other main surface of the piezoelectric diaphragm 2X, the excitation electrode 22X is drawn from one short corner to an end of the other main surface of the piezoelectric diaphragm 2X by the lead electrode 22aX. As a result, the excitation electrodes 21X and 22X are drawn to one short side of the piezoelectric diaphragm 2X.
  • the excitation electrodes 21X, 22X and the extraction electrodes 21aX, 22aX are configured by laminating thin metal films, with a Ti (titanium) layer formed in contact with the piezoelectric diaphragm 2X and an Au (gold) layer formed on top of that.
  • the metal film configuration may be other than that described above, and well-known metal film configurations may be used, such as a Cr (chromium) layer as the base metal and an Ag (silver) layer as the upper layer.
  • the excitation electrodes 21X, 22X and the extraction electrodes 21aX, 22aX may be PVD films formed by a PVD film formation method such as sputtering or vacuum deposition.
  • the thin plate thermistor 5 has the second main surface 51b on which the split electrodes 53 are formed as the upper surface (the surface to be joined to the package 1X), and the split electrodes 53 (the first and second split electrodes 53
  • the semiconductor device is mounted on the package 1X by electrically connecting the mounting electrodes 18X and 19X at the bottom of the lower storage portion 11BX to the mounting electrodes 18X and 19X at the bottom of the lower storage portion 11BX.
  • the lid 3X is made of a thin metal or ceramic plate and has a rectangular shape corresponding to the outer size of the sealing portion 10X of the package 1X.
  • the configurations of the lid 3X and the sealing portion 10X differ depending on the airtight sealing method of the package 1X. For example, when the lid 3X and the sealing portion 10X are joined by seam welding, the lid 3X uses Kovar as the core material and has a Ni plating film formed on its surface.
  • the sealing portion 10X is configured by soldering a ring-shaped metal frame, and the lid 3X and the metal frame (sealing portion 10X) are joined by seam welding in a vacuum atmosphere or an inert gas atmosphere, for example. This allows the inside of the package 1X (inside the upper storage portion 11AX) to be in a steady state of a vacuum atmosphere or an inert gas atmosphere.
  • the AuSu brazing material When hermetically sealing by soldering with a metal brazing material, for example an AuSu brazing material, the AuSu brazing material is preformed around the lid 3X, and the upper layer of the sealing portion 10X is plated with Au. By heating both of them in a specified atmosphere and temperature environment, a hermetic seal can be achieved by metal brazing.
  • a metal brazing material for example an AuSu brazing material
  • a paste-like conductive resin adhesive S1 is applied to the mounting electrodes 16X and 17X of the upper storage section 11AX of the package 1X using a dispenser or the like.
  • the conductive resin adhesive S1 is made of, for example, a silicone resin adhesive containing metal filler, but other resin materials such as polyimide-based resin materials may also be used.
  • the piezoelectric diaphragm 2X with electrodes formed thereon is mounted on the applied conductive resin adhesive S1. Specifically, the piezoelectric diaphragm 2X is mounted on the upper storage section 11AX so that the extraction electrodes 21aX and 22aX are bonded to the conductive resin adhesive S1.
  • the conductive resin adhesive S1 is then hardened by heating to conductively bond (electrically and mechanically bond) the piezoelectric diaphragm 2X and the mounting electrodes 16X and 17X. Note that the conductive resin adhesive S1 may be applied again from above the piezoelectric diaphragm 2X as necessary. In this embodiment, a configuration in which the adhesive is applied again is illustrated.
  • the upper storage section 11AX is hermetically sealed by the lid 3X, which is achieved by joining the lid 3X to the sealing section 10X.
  • the metal brazing material sealing is achieved by using the metal brazing material S2, which is, for example, an AuSu brazing material.
  • the thin plate thermistor 5 is conductively joined to the lower storage section 11BX of the package 1X.
  • a conductive resin adhesive S1 is applied to the mounting electrodes 18X and 19X using a dispenser or the like.
  • the thin plate thermistor 5 is stored in the lower storage section 11BX so that the split electrodes 53 (first split electrode 53a, second split electrode 53b) correspond to the applied conductive resin adhesive S1.
  • the conductive resin adhesive S1 is then hardened by heating to conductively join (electrically and mechanically join) the first split electrode 53a and second split electrode 53b of the thin plate thermistor 5 to the mounting electrodes 18X and 19X.
  • the conductive joining of the thin plate thermistor 5 may be performed by soldering.
  • Resin material M is injected into the lower storage section 11BX containing the thin plate thermistor 5 using a dispenser or the like to cover the thin plate thermistor 5 with the resin material M, and then the resin material M is hardened by heating.
  • a polyimide resin is used as the resin material M, but other resin materials may also be used. This protects the thin plate thermistor 5 from the outside air, allowing for stable temperature detection.
  • the above-mentioned piezoelectric vibration device XcX equipped with a thin plate thermistor is less likely to crack or chip at the end of the thermistor plate 51, and by being equipped with the thin plate thermistor 5 of the first embodiment, which has excellent resistance characteristics, it is possible to improve the accuracy of temperature detection.
  • Fig. 12 is a cross-sectional view of a thin plate thermistor mounted piezoelectric vibrating device XcY.
  • a piezoelectric vibration plate 2X and a thin plate thermistor 5 are stored inside a storage section 51Y of a package 1Y of the thin plate thermistor mounted piezoelectric vibration device XcY.
  • the package 1Y is made of ceramic with internal wiring formed therein, and has a storage section 51Y with an opening at the top.
  • Mounting electrodes 54Y, 55Y (mounting electrode 55Y not shown) for the piezoelectric vibration plate 2X and mounting electrodes 56Y, 57Y for the thin plate thermistor 5 are formed on the bottom of the storage section 51Y.
  • Mounting electrodes 52Y, 53Y are also formed on the bottom surface.
  • the extraction electrodes 21aX, 22aX (see FIG. 9) formed on both main surfaces of the piezoelectric diaphragm 2X are conductively bonded (electrically and mechanically bonded) to the mounting electrodes 54Y, 55Y by the conductive resin adhesive S1, and the piezoelectric diaphragm 2X is stored inside the storage section 51Y of the package 1Y.
  • the first and second split electrodes 53a, 53b formed on the second main surface 51b of the thin plate thermistor 5 are conductively bonded (electrically and mechanically bonded) to the mounting electrodes 56Y, 57Y by the conductive resin adhesive S1, and the thin plate thermistor 5 is stored inside the storage section 51Y of the package 1Y.
  • the piezoelectric diaphragm 2X and thin plate thermistor 5 are stored in parallel inside the storage section 51Y of the package 1Y and are hermetically sealed by the lid 3X.
  • the above-mentioned piezoelectric vibration device XcY equipped with a thin plate thermistor is less likely to crack or chip at the end of the thermistor plate 51, and by being equipped with the thin plate thermistor 5 of the first embodiment, which has excellent resistance characteristics, it is possible to improve the temperature detection accuracy.
  • the thin plate thermistor is not limited to the thin plate thermistor 5 of the above embodiment, but can be modified in various ways.
  • the first stage laser irradiation and the second stage laser irradiation can be performed from the second surface 51bA side, which has the lesser surface roughness, so that the end portion of the second main surface 51b of the thermistor plate 51 has a smaller surface roughness than the central portion, and at least a portion of the end portion is raised, and the thermistor plate 51 may have a solidified portion (another solidified portion) at the end portion of the second main surface 52b.
  • the surface roughness is smaller at the end portion than at the center portion of the first main surface 51a and the second main surface 51b of the thermistor flat plate 51, and at least a part of the end portion is raised, and the thermistor flat plate 51 may have a solidified portion and another solidified portion at each end portion of the first main surface 51a and the second main surface 51b.
  • the thermistor flat plate 51 is less likely to crack or chip on both the first main surface 51a side and the second main surface 51b side of the end portion of the thermistor flat plate 51, and as a result, the mechanical strength of the thin plate thermistor 5 can be further improved.
  • the thin plate thermistor 5 may not include the common electrode 52.
  • the thin plate thermistor 5 may not include the common electrode 52, and the first split electrode 53a and the second split electrode 53b may be replaced with a first split electrode and a second split electrode including a second main surface portion disposed on a part of the second main surface 51b of the thermistor plate 51, a side surface portion connected to the second main surface portion and disposed on a side surface of the thermistor plate 51, and a first main surface portion connected to the side surface portion and disposed on the first main surface 51a of the thermistor plate 51.
  • the advantage of using the thin plate thermistor 5 is that it can be made smaller and thinner, and by combining it with the sandwich structure device 2, it is advantageous to make the device smaller and thinner, and from this perspective, it is preferable to combine the thin plate thermistor 5 with the sandwich structure device 2.
  • the thin plate thermistor 5 of the above embodiment can be applied to existing packages other than the above-mentioned packages, such as sandwich structure devices. For example, it can also be applied to a molded resin sealed package.
  • a piezoelectric vibration device and a thin plate thermistor are mounted flat on top of a glass epoxy substrate, which serves as a base substrate, in a state where they are arranged in parallel with a bonding material, and are electrically connected to the terminal portion of the substrate by wire bonding or the like. Then, the top including each of these components is covered with molded resin. With such a configuration, it is possible to expect improved thermal conductivity.
  • a laser is used to form the solidified portion 51D at the end of the thermistor plate 51, but this is not limited to the above, and for example, a means other than a laser, such as an electron beam, may be used to form the solidified portion 51D at the end of the thermistor plate 51.
  • a means other than a laser such as an electron beam
  • the surface roughness of one side and the other side of the thermistor plate can be made different by flat surface polishing with different surface roughness.
  • a reinforcing member that is thin and has a certain degree of structural strength such as a quartz wafer or aluminum foil, may be attached to the common electrode 52 of the thin plate thermistor 5 of the above embodiment. If a hard material, such as a quartz wafer, is used as the reinforcing member, the strength of the thin plate thermistor 5 is greatly increased, making it easier to attach the thin plate thermistor 5 to the sandwich structure device 2. When a quartz wafer is used as the reinforcing member, it is desirable to form a film on the common electrode 52 to improve adhesion.
  • the reinforcing member if an insulating material is used as the reinforcing member, it is not necessary to perform an insulating process on the top surface of the device 1 (the surface opposite (back side) of the reinforcing member to the surface facing the common electrode 52) after mounting the thin plate thermistor 5 on the sandwich structure device 2.
  • a sintered product obtained by sintering a pure metal such as molybdenum or tungsten as a sintering material may be disposed on the first main surface 51a of the thermistor plate 51 to serve as a common electrode.
  • This improves the strength of the thin plate thermistor 5 and allows the thickness of the thermistor plate 51 to be reduced by the thickness of the sintered product used as the common electrode 52.
  • Tungsten has thermal conductivity comparable to that of aluminum, which speeds up heat transfer throughout the thin plate thermistor 5 and improves the thermal response of the thin plate thermistor 5.
  • Ag paste may be applied to the entire or almost entire first main surface 51a of the thermistor plate 51 and baked to form a common electrode 52 on the first main surface 51a of the thermistor plate 51.
  • the common electrode 52 functions as an original relay electrode and also functions as a reinforcing member that improves the strength of the thin plate thermistor 5.
  • the common electrode 52 may be formed of Cr-Au on the first main surface 51a of the thermistor plate 51, and then an epoxy resin may be provided as a reinforcing member on the surface of the common electrode 52 opposite to the surface facing the thermistor plate 51 (back side). In these cases, the strength of the thin plate thermistor 5 can be improved while preventing deterioration of the resistance characteristics of the thin plate thermistor 5.
  • the present invention can be widely applied to thin plate thermistors used as temperature sensors and piezoelectric vibration devices equipped with thin plate thermistors.
  • Piezoelectric vibration device with thin plate thermistor 2 Sandwich structure device 5: Thin plate thermistor 51: Thermistor plate 51a: First main surface 51b: Second main surface 52: Common electrode 53, 53a, 53b: Split electrodes

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Abstract

Provided is a thin-plate thermistor in which the resistance characteristics of the thin-plate thermistor are improved in consideration of the surface roughness of one surface and the other surface of a thermistor flat plate. A thin-plate thermistor 5 comprises: a single-plate thermistor flat plate 51 including a second main surface 51b and a first main surface 51a that is on the opposite to the second main surface 51b and has a greater surface roughness than that of the second main surface 51b; a first split electrode 53a and a second split electrode 53b that are formed on the second main surface 51b and are split on the second main surface 51b; and a common electrode 52 formed on the first main surface 51a.

Description

薄板サーミスタおよび薄板サーミスタ搭載型圧電振動デバイスThin plate thermistor and piezoelectric vibration device equipped with thin plate thermistor
 本発明は、温度センサとして用いる薄板サーミスタおよび薄板サーミスタを搭載した薄板サーミスタ搭載型圧電振動デバイスに関する。 The present invention relates to a thin plate thermistor used as a temperature sensor and a piezoelectric vibration device equipped with a thin plate thermistor.
 近年、各種電子機器の高精度化に伴い、環境温度の変化に伴う周波数変動を補償する温度補償型の圧電振動デバイスが求められており、圧電振動デバイスに温度センサとしてのサーミスタを搭載したサーミスタ搭載型圧電振動デバイスが幅広く使用されている。 In recent years, with the increasing precision of various electronic devices, there is a demand for temperature-compensated piezoelectric vibration devices that compensate for frequency fluctuations caused by changes in environmental temperature, and thermistor-equipped piezoelectric vibration devices, which are piezoelectric vibration devices equipped with a thermistor as a temperature sensor, are widely used.
 圧電振動デバイスの環境温度をサーミスタにて測定し、周波数情報と温度情報とを外部実装された温度補償回路に伝送することにより、温度補償された周波数情報を得ることができ、電子機器の動作を高精度に保つことができる。 By measuring the ambient temperature of the piezoelectric vibration device with a thermistor and transmitting frequency and temperature information to an externally mounted temperature compensation circuit, temperature-compensated frequency information can be obtained, enabling the operation of electronic devices to be maintained with high precision.
 このようなサーミスタ搭載型圧電振動デバイスは、セラミックからなるパッケージに励振電極が形成された水晶振動板が収納されるとともに、その外側にサーミスタが取り付けられ、水晶振動子を取り巻く環境温度を検出する構成となっている(例えば、特許文献1参照)。 Such a thermistor-equipped piezoelectric vibration device is configured such that a quartz crystal plate with an excitation electrode formed thereon is housed in a ceramic package, and a thermistor is attached to the outside of the plate to detect the environmental temperature surrounding the quartz crystal unit (see, for example, Patent Document 1).
 サーミスタは、複数のサーミスタ素材層と動作電極とが複数積層された積層構成であり、厚さが0.3ミリメートル~0.1ミリメートル程度のものが市販され、使用されている。 Thermistors have a laminated structure in which multiple layers of thermistor material and operating electrodes are stacked together, and those with a thickness of about 0.3 mm to 0.1 mm are commercially available and in use.
特開2016-100737号公報JP 2016-100737 A
 ところで、サーミスタは水晶振動子を取り巻く温度環境を、小さいタイムラグで検出することが求められる。しかしながら、これまで使用されているサーミスタは、積層構成ということもあり、一定の厚さ(高さ)が必要な構成となっている。加えて、積層構成のサーミスタの電極は、スクリーン印刷などによる厚膜電極により構成されており、サーミスタの薄型化に不向きな構成となっている。 Thermistors are required to detect the temperature environment surrounding the quartz crystal unit with a small time lag. However, the thermistors used to date have a laminated structure, which means that they require a certain thickness (height). In addition, the electrodes of laminated thermistors are made of thick film electrodes produced by screen printing, etc., making the structure unsuitable for making thin thermistors.
 このため、サーミスタを複数のサーミスタ素材層と動作電極とを複数積層した積層構成とする代わりに、サーミスタを単板のサーミスタ平板の表面に電極を形成した構成とすることが考えられるが、これまでのところ単板のサーミスタ平板の表面に電極を形成した構成のサーミスタは実用化されていない。このような単板のサーミスタ平板の表面に電極を形成した構成のサーミスタでは、サーミスタ平板の一の面に当該一の面上で2つに分割され、それぞれが動作電極となる第1分割電極および第2分割電極が形成され、サーミスタ平板の他の面(一の面と反対側の面)に中継電極となる共通電極が形成される場合があり、このような場合にサーミスタ平板の一の面と他の面との表面粗さを考慮して第1分割電極および第2分割電極並びに共通電極を配置することで、サーミスタの抵抗特性の向上を図ることが望まれる。 For this reason, instead of forming the thermistor in a laminated configuration in which multiple thermistor material layers and operating electrodes are stacked in multiple layers, it is conceivable to form the thermistor in a configuration in which electrodes are formed on the surface of a single thermistor plate, but so far no thermistors in a configuration in which electrodes are formed on the surface of a single thermistor plate have been put to practical use. In such a thermistor in a configuration in which electrodes are formed on the surface of a single thermistor plate, a first split electrode and a second split electrode that are split into two on one surface and each serve as an operating electrode may be formed, and a common electrode that serves as a relay electrode may be formed on the other surface of the thermistor plate (the surface opposite to the first surface). In such cases, it is desirable to improve the resistance characteristics of the thermistor by arranging the first split electrode, the second split electrode, and the common electrode in consideration of the surface roughness of the one surface and the other surface of the thermistor plate.
 本発明は、上記の課題に鑑み、サーミスタ平板の一の面と他の面との表面粗さを考慮して薄板サーミスタの抵抗特性の向上を図った薄板サーミスタ、および、当該薄板サーミスタを搭載した薄板サーミスタ搭載型圧電振動デバイスを提供することを目的とする。 In view of the above problems, the present invention aims to provide a thin plate thermistor that improves the resistance characteristics of the thin plate thermistor by taking into account the surface roughness between one side and the other side of the thermistor plate, and a piezoelectric vibration device equipped with such a thin plate thermistor.
 前記の目的を達成するため、本発明に係る薄板サーミスタは、一の面、および、当該一の面と反対側であって当該一の面よりも表面粗さが大きい他の面を含む、単板のサーミスタ平板と、前記一の面に形成され、当該一の面上で分割された第1分割電極および第2分割電極と、前記他の面に形成された共通電極と、を有することを特徴としている。 In order to achieve the above object, the thin plate thermistor of the present invention is characterized by having a single thermistor plate including one surface and another surface opposite to the first surface and having a surface roughness greater than that of the first surface, a first split electrode and a second split electrode formed on the first surface and split on the first surface, and a common electrode formed on the other surface.
 この構成によれば、サーミスタ平板の表面粗さの小さい方の一の面に動作電極となる第1分割電極および第2分割電極を形成しているため、表面粗さの大きい方の他の面に動作電極となる第1分割電極および第2分割電極を形成する場合に比べて、第1分割電極および第2分割電極の形成される面積のばらつきが生じにくく、薄板サーミスタの抵抗特性のばらつきを抑えることができる。特に、薄板サーミスタでは第1分割電極および第2分割電極のサーミスタ平板に対向する面積により抵抗特性が決定づけられるため、表面粗さの小さい方の一の面に面積の厳密さを要する第1分割電極および第2分割電極を形成することは薄板サーミスタの抵抗特性の安定化に有利な構成となっている。  With this configuration, the first and second split electrodes, which serve as the working electrodes, are formed on one side of the thermistor plate with the smaller surface roughness, so there is less variation in the area in which the first and second split electrodes are formed compared to when the first and second split electrodes, which serve as the working electrodes, are formed on the other side with the larger surface roughness, and this makes it possible to suppress variation in the resistance characteristics of the thin plate thermistor. In particular, since the resistance characteristics of a thin plate thermistor are determined by the area of the first and second split electrodes facing the thermistor plate, forming the first and second split electrodes, which require precise areas, on the one side with the smaller surface roughness is an advantageous configuration for stabilizing the resistance characteristics of the thin plate thermistor.
 また、表面粗さの小さい方の一の面に第1分割電極および第2分割電極を形成することでサーミスタ平板の当該一の面への第1分割電極および第2分割電極の密着性も高まって導通性が安定するので、第1分割電極および第2分割電極に対して測定プローブなどを接触させる際に安定した接続が可能となり、薄板サーミスタの抵抗特性を正確に計測することが可能になる。 In addition, by forming the first and second split electrodes on the surface with the smaller surface roughness, the adhesion of the first and second split electrodes to that surface of the thermistor plate is improved and electrical conductivity is stabilized, allowing for a stable connection when a measurement probe or the like is brought into contact with the first and second split electrodes, making it possible to accurately measure the resistance characteristics of the thin plate thermistor.
 さらに、サーミスタ平板の表面粗さの大きい方の他の面に中継電極となる共通電極を形成することで、共通電極が形成される部分の表面積が見た目の面積に対して増加する分、共通電極に関わる導電体の総量が増加するため、導通性能が高まる。共通電極は薄板サーミスタに不要な抵抗値を生じさせない役割を担っており、共通電極の表面積が増える分だけ導通性能が低下することがないため、薄板サーミスタの抵抗値を悪化させることがない。特に、小型化された薄板サーミスタでは、共通電極の抵抗値が大きくなると所定の抵抗値以下の特性を満足することが難しくなるが、サーミスタ平板の表面粗さの大きい方の他の面に共通電極を形成することで、所定の抵抗値以下の特性を満足なものにすることができる。 Furthermore, by forming a common electrode that serves as a relay electrode on the other side of the thermistor plate with the greater surface roughness, the surface area of the portion where the common electrode is formed increases relative to the apparent area, and the total amount of conductors involved in the common electrode increases accordingly, improving conductivity. The common electrode plays a role in preventing unnecessary resistance values from occurring in the thin plate thermistor, and since conductivity does not decrease as the surface area of the common electrode increases, the resistance value of the thin plate thermistor is not deteriorated. In particular, with miniaturized thin plate thermistors, as the resistance value of the common electrode increases, it becomes difficult to satisfy characteristics below a specified resistance value, but by forming a common electrode on the other side of the thermistor plate with the greater surface roughness, characteristics below a specified resistance value can be satisfied.
 また、前記第1分割電極および前記第2分割電極、並びに、前記共通電極は、PVD(Physical Vapor Desposition)膜であるとしてもよい。 The first and second divided electrodes, as well as the common electrode, may be PVD (Physical Vapor Deposition) films.
 この構成によれば、電極(第1分割電極、第2分割電極、共通電極)は緻密な膜構成となり、導電性およびサーミスタ平板への密着性の点で優れた電極にすることができ、また、電極の面積が所望の面積となるように電極を形成することができ、その結果、薄板サーミスタの抵抗特性を安定させることができる。特に、小型化された薄板サーミスタの抵抗特性の安定に有効である。 With this configuration, the electrodes (first split electrode, second split electrode, common electrode) have a dense film configuration, making them excellent in terms of conductivity and adhesion to the thermistor plate. Also, the electrodes can be formed so that their area is the desired area, which results in stabilizing the resistance characteristics of the thin plate thermistor. This is particularly effective in stabilizing the resistance characteristics of miniaturized thin plate thermistors.
 また、本発明に係る一の薄板サーミスタ搭載型圧電振動デバイスは、表面に複数の金属膜層からなる励振電極が形成された圧電振動板、前記圧電振動板の一方の主面に接合された第1封止部材、および、前記圧電振動板の他方の主面に接合された第2封止部材を備える圧電振動デバイスと、前記薄板サーミスタと、を有し、前記薄板サーミスタが前記圧電振動デバイスの表面に接合されていることを特徴としている。 A piezoelectric vibration device equipped with a thin plate thermistor according to the present invention comprises a piezoelectric vibration device including a piezoelectric vibration plate having an excitation electrode formed on its surface and made of a plurality of metal film layers, a first sealing member bonded to one main surface of the piezoelectric vibration plate, and a second sealing member bonded to the other main surface of the piezoelectric vibration plate; and the thin plate thermistor, and is characterized in that the thin plate thermistor is bonded to the surface of the piezoelectric vibration device.
 この構成によれば、抵抗特性に優れた薄板サーミスタを利用することで、圧電振動板の温度の検出精度の向上を図ることができる。 With this configuration, the use of a thin-plate thermistor with excellent resistance characteristics can improve the accuracy of detecting the temperature of the piezoelectric diaphragm.
 また、本発明に係る他の薄板サーミスタ搭載型圧電振動デバイスは、表面に複数の金属膜層からなる励振電極が形成された圧電振動板と、前記薄板サーミスタと、前記圧電振動板および前記薄板サーミスタを収納するパッケージと、を有することを特徴としている。 Another thin plate thermistor-mounted piezoelectric vibration device according to the present invention is characterized in that it has a piezoelectric vibration plate having an excitation electrode made of multiple metal film layers formed on its surface, the thin plate thermistor, and a package that houses the piezoelectric vibration plate and the thin plate thermistor.
 この構成によれば、抵抗特性に優れた薄板サーミスタを利用することで、圧電振動板の温度の検出精度の向上を図ることができる。 With this configuration, the use of a thin-plate thermistor with excellent resistance characteristics can improve the accuracy of detecting the temperature of the piezoelectric diaphragm.
 本発明によれば、サーミスタ平板の表面粗さの小さい方の一の面に動作電極となる第1分割電極および第2分割電極を形成しているため、表面粗さの大きい方の他の面に動作電極となる第1分割電極および第2分割電極を形成する場合に比べて、第1分割電極および第2分割電極の形成される面積のばらつきが生じにくく、薄板サーミスタの抵抗特性のばらつきを抑えることができる。特に、薄板サーミスタでは第1分割電極および第2分割電極がサーミスタ平板に対向する面積により抵抗特性が決定づけられるため、表面粗さの小さい方の一の面に面積の厳密さを要する第1分割電極および第2分割電極を形成することは薄板サーミスタの抵抗特性の安定化に有利な構成となっている。 In accordance with the present invention, the first and second split electrodes serving as the working electrodes are formed on one side of the thermistor plate with the smaller surface roughness, so that the areas in which the first and second split electrodes are formed are less likely to vary compared to when the first and second split electrodes serving as the working electrodes are formed on the other side with the larger surface roughness, and the variation in the resistance characteristics of the thin plate thermistor can be suppressed. In particular, since the resistance characteristics of a thin plate thermistor are determined by the areas of the first and second split electrodes facing the thermistor plate, forming the first and second split electrodes, which require precise areas, on one side with the smaller surface roughness is advantageous for stabilizing the resistance characteristics of the thin plate thermistor.
(a)は本発明の第1実施形態に係る薄板サーミスタの斜視図であり、(b)は(a)の薄板サーミスタのB-B断面図である。1A is a perspective view of a thin plate thermistor according to a first embodiment of the present invention, and FIG. 1B is a cross-sectional view of the thin plate thermistor of FIG. 1A taken along the line BB. (a)は図1の薄板サーミスタの第1主面を示す平面図であり、(b)は図1の薄板サーミスタの第2主面を示す平面図である。2A is a plan view showing a first main surface of the thin plate thermistor of FIG. 1, and FIG. 2B is a plan view showing a second main surface of the thin plate thermistor of FIG. 図1の薄板サーミスタの製造プロセスにおける一部(サーミスタ平板用ウエハに対するレーザ照射)を説明するための図である。2 is a diagram for explaining a part (laser irradiation onto a thermistor flat plate wafer) in the manufacturing process of the thin plate thermistor of FIG. 1 . FIG. 本発明の第2実施形態に係る一の薄板サーミスタ搭載型圧電振動デバイスの平面図である。10 is a plan view of a thin plate thermistor-equipped piezoelectric vibration device according to a second embodiment of the present invention. FIG. 図4の薄板サーミスタ搭載型圧電振動デバイスのA-A断面図である。5 is a cross-sectional view of the thin plate thermistor mounted piezoelectric vibration device shown in FIG. 4 along line AA. (a)は図4のサンドイッチ構造デバイスにおける圧電振動板の第1主面を示す平面図であり、(b)は図4のサンドイッチ構造デバイスにおける圧電振動板の第2主面を示す平面図である。5A is a plan view showing a first main surface of a piezoelectric diaphragm in the sandwich structure device of FIG. 4, and FIG. 5B is a plan view showing a second main surface of the piezoelectric diaphragm in the sandwich structure device of FIG. 4. (a)は図4のサンドイッチ構造デバイスにおける第1封止部材の第1主面を示す平面図であり、(b)は図4のサンドイッチ構造デバイスにおける第1封止部材の第2主面を示す平面図である。5A is a plan view showing a first main surface of a first sealing member in the sandwich structure device of FIG. 4, and FIG. 5B is a plan view showing a second main surface of the first sealing member in the sandwich structure device of FIG. 4. (a)は図4のサンドイッチ構造デバイスにおける第2封止部材の第1主面を示す平面図であり、(b)は図4のサンドイッチ構造デバイスにおける第2封止部材の第2主面を示す平面図である。5A is a plan view showing a first main surface of a second sealing member in the sandwich structure device of FIG. 4, and FIG. 5B is a plan view showing a second main surface of the second sealing member in the sandwich structure device of FIG. 4. 本発明の第3実施形態に係る薄板サーミスタ搭載型圧電振動デバイスの分解斜視図である。FIG. 11 is an exploded perspective view of a thin plate thermistor-equipped piezoelectric vibration device according to a third embodiment of the present invention. 図9の薄板サーミスタ搭載型圧電振動デバイスを組み立て際の底面図である。10 is a bottom view of the thin plate thermistor mounted piezoelectric vibration device of FIG. 9 during assembly. 図10の薄板サーミスタ搭載型圧電振動デバイスのC-C断面図である。11 is a cross-sectional view of the thin plate thermistor-equipped piezoelectric vibration device shown in FIG. 10 along the line CC. 本発明の第4実施形態に係る薄板サーミスタ搭載型圧電振動デバイスの断面図である。A cross-sectional view of a thin plate thermistor-equipped piezoelectric vibration device according to a fourth embodiment of the present invention.
 ≪第1実施形態≫
 以下、本発明の第1実施形態に係る薄板サーミスタについて、図1から図3を参照して詳細に説明する。なお、図1から図3および後の説明において用いる図4から図8の各図は同じX軸、Y軸およびZ軸を利用して図示している。
First Embodiment
A thin plate thermistor according to a first embodiment of the present invention will be described in detail below with reference to Figures 1 to 3. Note that Figures 1 to 3 and Figures 4 to 8 used in the following description are illustrated using the same X-axis, Y-axis, and Z-axis.
 まず、薄板サーミスタ5の構成について図1から図2を参照して説明する。図1(a)は、薄板サーミスタ5の斜視図であり、図1(b)は、図1(a)に斜視図を示す薄板サーミスタ5のB-B断面図である。図2(a)は、図1に示す薄板サーミスタ5において、一方の主面である第1主面51aを示す平面図であり、図2(b)は、図1に示す薄板サーミスタ5において、第1主面51aと反対側(裏側)の主面(他方の主面)である第2主面51bを示す平面図である。なお、図1および図2では電極(共通電極52、分割電極53)にハッチングをいれ、サーミスタ平板51にハッチングをいれずに、描いている。 First, the structure of the thin plate thermistor 5 will be described with reference to Figs. 1 and 2. Fig. 1(a) is a perspective view of the thin plate thermistor 5, and Fig. 1(b) is a cross-sectional view taken along line B-B of the thin plate thermistor 5 shown in Fig. 1(a). Fig. 2(a) is a plan view showing the first main surface 51a, which is one of the main surfaces, of the thin plate thermistor 5 shown in Fig. 1, and Fig. 2(b) is a plan view showing the second main surface 51b, which is the main surface (other main surface) on the opposite side (back side) to the first main surface 51a, of the thin plate thermistor 5 shown in Fig. 1. Note that in Figs. 1 and 2, the electrodes (common electrode 52, split electrodes 53) are hatched, and the thermistor plate 51 is not hatched.
 薄板サーミスタ5は、薄型化されたNTC(Negative Temperature Coefficient)サーミスタである。NTCサーミスタは温度の上昇により抵抗値が低下するタイプのサーミスタである。 The thin plate thermistor 5 is a thin NTC (Negative Temperature Coefficient) thermistor. An NTC thermistor is a type of thermistor whose resistance value decreases as the temperature increases.
 薄板サーミスタ5は、図1(a),(b)に示すように、1枚の単板であるサーミスタ平板51と、サーミスタ平板51の第1主面51aに形成され、中継電極となる共通電極52と、サーミスタ平板51の第2主面51bに第2主面51b上で分割して形成され、動作電極となる分極電極53とを有するように構成されている。 As shown in Figures 1(a) and (b), the thin plate thermistor 5 is configured to have a thermistor plate 51 which is a single plate, a common electrode 52 which is formed on the first main surface 51a of the thermistor plate 51 and serves as a relay electrode, and a polarized electrode 53 which is formed on the second main surface 51b of the thermistor plate 51 by dividing it on the second main surface 51b and serves as an operating electrode.
 サーミスタ平板51は、厚みが薄く、平面視で矩形状をしており、サーミスタ平板51としては、例えば、マンガンを主成分とする半導体セラミック板やマンガンおよびニッケルを主成分とする半導体セラミック板が使用される。 The thermistor plate 51 is thin and rectangular in plan view. For example, a semiconductor ceramic plate whose main component is manganese or a semiconductor ceramic plate whose main components are manganese and nickel is used as the thermistor plate 51.
 サーミスタ平板51では、第2主面51bよりも第1主面51a(第1主面51aの中央部)の方が、表面粗さが大きい。なお、第1主面51aと第2主面51bとの表面粗さを比較する場合、特に断りがない限り、電極(共通電極52、分割電極53)の大部分が形成される主面(第1主面51a、第2主面51b)の中央部の表面粗さを比較するものとする。また、サーミスタ平板51の第1主面51aでは、中央部よりも端部の方が、表面粗さが小さい。表面粗さは、第1主面51aの中央部、第2主面51b、第1主面51aの端部の順に大きい(第1主面51aの中央部の表面粗さ>第2主面51bの表面粗さ>第1主面51aの端部の表面粗さ)。別の言い方をすれば、第1主面51aの端部、第2主面51b、第1主面51aの中央部の順に滑らかな面(滑面)となっている。 In the thermistor plate 51, the first main surface 51a (the center of the first main surface 51a) has a larger surface roughness than the second main surface 51b. When comparing the surface roughness of the first main surface 51a and the second main surface 51b, unless otherwise specified, the surface roughness of the center of the main surface (first main surface 51a, second main surface 51b) on which most of the electrodes (common electrode 52, split electrode 53) are formed is compared. In addition, in the first main surface 51a of the thermistor plate 51, the surface roughness is smaller at the ends than at the center. The surface roughness is greatest in the order of the center of the first main surface 51a, the second main surface 51b, and the ends of the first main surface 51a (surface roughness of the center of the first main surface 51a > surface roughness of the second main surface 51b > surface roughness of the ends of the first main surface 51a). In other words, the ends of the first main surface 51a, the second main surface 51b, and the center of the first main surface 51a are smooth surfaces in that order.
 また、サーミスタ平板51の第1主面51aでは、端部の少なくとも一部に盛り上がりがある。この盛り上がりは、サーミスタ平板51(サーミスタ平板51の元となるサーミスタ平板用ウエハ51A)が溶融した後に凝固した凝固部51Dにより形作られ、凝固部51Dはレーザ痕である(図3参照)。 Also, the first main surface 51a of the thermistor plate 51 has a protuberance at least on a part of the edge. This protuberance is formed by a solidified portion 51D that solidifies after the thermistor plate 51 (the thermistor plate wafer 51A that is the basis of the thermistor plate 51) melts, and the solidified portion 51D is a laser mark (see FIG. 3).
 共通電極52は、図2(a)に示すように、サーミスタ平板51の第1主面51aの全面(もしくは、ほぼ全面)に形成されている。共通電極52は、金属の薄膜であり、スパッタリングまたは真空蒸着法などのPVD(Physical Vapor Desposition)成膜法にて形成されるPVD膜である。 As shown in FIG. 2(a), the common electrode 52 is formed on the entire surface (or almost the entire surface) of the first main surface 51a of the thermistor plate 51. The common electrode 52 is a thin metal film, and is a PVD (Physical Vapor Deposition) film formed by a PVD film formation method such as sputtering or vacuum deposition.
 分割電極53は、図2(b)に示すように、サーミスタ平板51の第2主面51bの一方向に沿って一定の間隔を空けて両端2箇所に分割されて配置されている。なお、以下では、分割電極53の一方を「第1分割電極53a」と称し、分割電極53の他方を「第2分割電極53b」と称することもある。分割電極53(第1分割電極53a、第2分割電極53b)は、金属の薄膜であり、スパッタリングまたは真空蒸着法などのPVD成膜法にて形成されるPVD膜である。上記の共通電極52および分割電極53(第1分割電極53a、第2分割電極53b)をPVD膜とすることで、極めて薄肉の薄板サーミスタ5を作ることができる。 As shown in FIG. 2(b), the split electrodes 53 are arranged along one direction of the second main surface 51b of the thermistor plate 51, split into two at both ends with a certain distance between them. In the following, one of the split electrodes 53 may be referred to as the "first split electrode 53a" and the other as the "second split electrode 53b". The split electrodes 53 (first split electrode 53a, second split electrode 53b) are thin metal films, and are PVD films formed by a PVD film formation method such as sputtering or vacuum deposition. By forming the common electrode 52 and split electrodes 53 (first split electrode 53a, second split electrode 53b) as PVD films, an extremely thin plate thermistor 5 can be made.
 薄板サーミスタ5は、サーミスタ平板51の第2主面51bに形成された第1分割電極53aおよび第2分極電極53bにより抵抗体としての端子を構成する。薄板サーミスタ5の導電経路は、第1分割電極53aおよび第2分極電極53bのうちの一方の分割電極から共通電極52を介して第1分割電極53aおよび第2分極電極53bのうちの他方の分割電極に至る経路である。このような構成により、導電経路の断面積を大きくすることができ、また、導電経路を第1分極電極53aおよび第2分割電極53bと共通電極52との面同士で対向する経路とすることができる。このため、小さい面積の電極(共通電極52、第1分割電極53a、第2分割電極53b)で抵抗値を下げることができ、薄板サーミスタ5の抵抗特性が安定しやすく、薄板サーミスタ5の耐電圧の性能が向上する。 The thin plate thermistor 5 has terminals as resistors formed by the first split electrode 53a and the second polarized electrode 53b formed on the second main surface 51b of the thermistor plate 51. The conductive path of the thin plate thermistor 5 is a path from one of the first split electrode 53a and the second polarized electrode 53b to the other of the first split electrode 53a and the second polarized electrode 53b via the common electrode 52. This configuration allows the cross-sectional area of the conductive path to be increased, and also allows the conductive path to be a path in which the first polarized electrode 53a and the second split electrode 53b and the common electrode 52 face each other. For this reason, the resistance value can be reduced with electrodes of small area (the common electrode 52, the first split electrode 53a, the second split electrode 53b), the resistance characteristics of the thin plate thermistor 5 are easily stabilized, and the voltage resistance performance of the thin plate thermistor 5 is improved.
 ところで、薄板サーミスタ5を第1分割電極53aと第2分割電極53bとの間の距離が小さい構成とした場合、印加する電圧にも依存するが、導電経路として第1分極電極53aおよび第2分極電極53bのうちの一方の分割電極から第1分割電極53aおよび第2分極電極53bのうちの他方の分割電極に至る経路(当該経路は共通電極52が介在しない経路である)が支配的となり、所望の抵抗値が得られないことがある。したがって、図1(b)に示すように、第1分極電極53aと共通電極52との間の距離をG2aとし、第2分極電極53bと共通電極52との間の距離をG2bとし、第1分極電極53aと第2分極電極53bとの間の距離をG1とした場合、G2a+G2b<G1を満たすように設定することが好ましい。このように設定した場合、所望の抵抗値を得ることができ、薄板サーミスタ5が検出する温度の精度を安定化させることができる。 When the thin plate thermistor 5 is configured such that the distance between the first divided electrode 53a and the second divided electrode 53b is small, depending on the applied voltage, the conductive path from one of the first and second polarized electrodes 53a and 53b to the other of the first and second polarized electrodes 53a and 53b (this path does not include the common electrode 52) becomes dominant, and the desired resistance value may not be obtained. Therefore, as shown in FIG. 1(b), if the distance between the first polarized electrode 53a and the common electrode 52 is G2a, the distance between the second polarized electrode 53b and the common electrode 52 is G2b, and the distance between the first polarized electrode 53a and the second polarized electrode 53b is G1, it is preferable to set them so that G2a+G2b<G1 is satisfied. When set in this way, the desired resistance value can be obtained, and the accuracy of the temperature detected by the thin plate thermistor 5 can be stabilized.
 また、薄板サーミスタ5は、第1分割電極53aおよび第2分割電極53bの温度検出対象デバイスとの接触面積が大きい程、温度検出対象デバイスの温度を正確に検出することができる。このため、第1分割電極53aおよび第2分割電極53bはその面積が大きい方が良いが、面積を大きくしすぎると第1分割電極53aと第2分割電極53bとの間での短絡などが生じやすくなる。一方で、第1分割電極53aおよび第2分割電極53bの温度検出対象デバイスとの接触面積が小さくなると、薄板サーミスタ5が検出する温度検出対象デバイスの温度の精度が低下する。したがって、所望する抵抗値にもよるが、第1分割電極53aおよび第2分割電極53bの合計面積を、サーミスタ平板51の第2主面51bの面積の40%から85%の範囲内とすることが好ましい。このように設定した場合、薄板サーミスタ5は安定的な温度検出を行うことができる。第1分割電極53aおよび第2分割電極53bの合計面積がサーミスタ平板51の第2主面51bの面積の40%未満である場合、薄板サーミスタ5の第1分割電極53aおよび第2分割電極53bが小さくなりすぎることで薄板サーミスタ5の抵抗値が高くなりすぎて温度検出対象デバイスの温度を正確に検出できなくなる虞がある。また、第1分割電極53aおよび第2分割電極53bの合計面積がサーミスタ平板51の第2主面51bの面積の85%を超える場合、第1分割電極53aと第2分割電極53bとの間での短絡などが生じてサーミスタとして機能しなくなる虞がある。 Furthermore, the larger the contact area of the first split electrode 53a and the second split electrode 53b with the temperature detection target device, the more accurately the thin plate thermistor 5 can detect the temperature of the temperature detection target device. For this reason, it is better for the first split electrode 53a and the second split electrode 53b to have a large area, but if the area is made too large, a short circuit between the first split electrode 53a and the second split electrode 53b is likely to occur. On the other hand, if the contact area of the first split electrode 53a and the second split electrode 53b with the temperature detection target device becomes small, the accuracy of the temperature of the temperature detection target device detected by the thin plate thermistor 5 decreases. Therefore, depending on the desired resistance value, it is preferable that the total area of the first split electrode 53a and the second split electrode 53b is within the range of 40% to 85% of the area of the second main surface 51b of the thermistor plate 51. When set in this manner, the thin plate thermistor 5 can perform stable temperature detection. If the total area of the first split electrode 53a and the second split electrode 53b is less than 40% of the area of the second main surface 51b of the thermistor plate 51, the first split electrode 53a and the second split electrode 53b of the thin plate thermistor 5 will be too small, and the resistance value of the thin plate thermistor 5 will be too high, which may make it impossible to accurately detect the temperature of the device to be detected. Also, if the total area of the first split electrode 53a and the second split electrode 53b exceeds 85% of the area of the second main surface 51b of the thermistor plate 51, a short circuit may occur between the first split electrode 53a and the second split electrode 53b, causing the thermistor to no longer function as a thermistor.
 続いて、薄板サーミスタ5の製造プロセスについて説明する。薄板サーミスタ5の製造プロセスにおいて、マンガンを主成分とする、または、マンガンおよびニッケルを主成分とする材料(Mn-Fe-Ni-Ti系材料、Mn-Fe系材料など)をバインダーなどとともにスラリー状にし、スクリーン印刷技術あるいはドクターブレード技術等の圧膜形成技術を用いてサーミスタ平板51のウエハ状態のものをグリーンシートで作成し、これを焼成技術によりサーミスタ平板51の元となるウエハ51Aを焼結成形する(焼結成形工程)。なお、以下では、サーミス平板51の元となるウエハ51Aを、「サーミスタ平板用ウエハ51A」と称することもある。 Next, the manufacturing process of the thin plate thermistor 5 will be described. In the manufacturing process of the thin plate thermistor 5, a material mainly composed of manganese or mainly composed of manganese and nickel (such as Mn-Fe-Ni-Ti material or Mn-Fe material) is made into a slurry with a binder or the like, and a wafer-like green sheet of the thermistor plate 51 is created using a pressure film forming technique such as screen printing or doctor blade technology, and this is then sintered and molded into the wafer 51A that will become the thermistor plate 51 using a firing technique (sintering and molding process). Note that, hereinafter, the wafer 51A that will become the thermistor plate 51 is sometimes referred to as the "thermistor plate wafer 51A".
 この焼結成形工程では、アルミナ(Al)で作られた焼成用セッタにグリーンシートを載せて焼成を行うが、焼成温度がマンガンの融点より高い場合には、グリーンシートに含まれるマンガンが焼成用セッタに溶け出す。このため、サーミスタ平板用ウエハ51Aの焼成用セッタと接していた面である第1面51aA(サーミスタ平板51の第1主面51aとなる面)とサーミスタ平板用ウエハ51Aの焼成用セッタと接していた面と反対側(裏側)の面である第2面51bA(サーミスタ平板51の第2主面51bとなる面)との表面粗さを比較した場合、サーミスタ平板用ウエハ51Aの第1面51aAではマンガンが溶け出したため、第1面51aAの方が、第2面51bAよりも、表面粗さが大きい。 In this sintering process, the green sheet is placed on a firing setter made of alumina (Al 2 O 3 ) and fired, but if the firing temperature is higher than the melting point of manganese, the manganese contained in the green sheet melts into the firing setter. Therefore, when comparing the surface roughness of the first surface 51aA (the surface that becomes the first main surface 51a of the thermistor flat plate 51), which is the surface of the thermistor flat plate wafer 51A that was in contact with the firing setter, and the second surface 51bA (the surface that becomes the second main surface 51b of the thermistor flat plate 51), which is the surface opposite (back side) to the surface that was in contact with the firing setter, the first surface 51aA of the thermistor flat plate wafer 51A has a larger surface roughness than the second surface 51bA because manganese has melted out of the first surface 51aA.
 焼結成形工程に続いて、サーミスタ平板用ウエハ51Aに対してブレイクライン(小割溝)51Bを形成するブレイクライン形成工程が行われる。 Following the sintering process, a break line forming process is carried out to form break lines (small grooves) 51B in the thermistor plate wafer 51A.
 ブレイクライン形成工程では、まず、サーミスタ平板用ウエハ51Aに対して、第1面51aA側から、図3(a)に点線が描かれた部分に、図3(b)に示すように照射面積が小さく、パワー密度(W/cm)が大きいレーザLA1を照射し、第1面51aAに、サーミスタ平板用ウエハ51Aを貫通しない図3(c)に示すブレイクライン51Bを形成する(第1段階のレーザ照射)。この第1段階のレーザ照射によるブレイクライン51Bの形成後には、図3(c)に示すように、サーミスタ平板用ウエハ51Aのブレイクライン51bの両端部分に急峻で背の高いバリ51Cができており、バリ51C部分では欠けなどが発生しやすい。 In the break line forming process, first, the thermistor flat plate wafer 51A is irradiated from the first surface 51aA with a laser LA1 having a small irradiation area and a large power density (W/ cm2 ) as shown in Fig. 3(b) at the portion indicated by the dotted line in Fig. 3(a), and a break line 51B shown in Fig. 3(c) that does not penetrate the thermistor flat plate wafer 51A is formed on the first surface 51aA (first stage laser irradiation). After the break line 51B is formed by this first stage laser irradiation, as shown in Fig. 3(c), steep and tall burrs 51C are formed at both ends of the break line 51b of the thermistor flat plate wafer 51A, and chipping is likely to occur at the burr 51C portion.
 第1段階のレーザ照射に続いて、第1段階のレーザ照射によりできたバリ51Cを除去するために、サーミスタ平板用ウエハ51Aに対して、ブレイクライン51Bが形成された第1面51aA側から、図3(a)に点線が描かれた部分に、図3(d)に示すように照射面積が大きく、パワー密度(W/cm)が小さいレーザLA2を照射する(第2段階のレーザ照射)。第1段階のレーザ照射と第2段階のレーザ照射とを比較すると、第2段階のレーサ照射での照射面積は第1段階のレーザ照射での照射面積よりも大きく、第2段階のレーサ照射でのパワー密度(W/cm)は第1段階のレーザ照射でのパワー密度(W/cm)よりも小さい。第2段階のレーザ照射でバリ51Cが溶け、溶けた部分がその後に凝固することで、レーザ痕として凝固部51Dが形成される。凝固部51D形成後のサーミスタ平板用ウエハ51Aの第1面51aAの、ブレイクライン51Bで囲まれる領域(1枚のサーミスタ平板51となる領域)の各々では、中央部よりも端部の方が、表面粗さが小さく、端部の少なくとも一部で若干の盛り上がり(バリ51Cの高さよりも低い盛り上がり)が形成され、これにより端部に曲面を確保できる。 Following the first-stage laser irradiation, in order to remove the burrs 51C created by the first-stage laser irradiation, the thermistor flat plate wafer 51A is irradiated with a laser LA2 having a large irradiation area and a small power density (W/cm 2 ) as shown in FIG. 3(d) from the first surface 51aA side on which the break lines 51B are formed, at the portion indicated by the dotted line in FIG. 3(a) (second-stage laser irradiation). Comparing the first-stage laser irradiation with the second-stage laser irradiation, the irradiation area in the second-stage laser irradiation is larger than that in the first-stage laser irradiation, and the power density (W/cm 2 ) in the second-stage laser irradiation is smaller than that in the first-stage laser irradiation. The second-stage laser irradiation melts the burrs 51C, and the melted portion subsequently solidifies, forming a solidified portion 51D as a laser mark. In each of the areas surrounded by the break lines 51B (areas that will become one thermistor flat plate 51) on the first surface 51aA of the thermistor flat plate wafer 51A after the formation of the solidified portion 51D, the surface roughness is smaller at the ends than at the center, and a slight protrusion (a protrusion lower than the height of the burrs 51C) is formed in at least a portion of the ends, thereby ensuring a curved surface at the ends.
 ここで、ブレイクライン形成工程後のサーミスタ平板用ウエハ51Aでは、第1面51aAのうちのブレイクライン51Bで囲まれた領域の端部の表面粗さが最も小さく、第2面51bAの表面粗さが2番目に小さく、第1面51aAのうちのブレイクライン51Bで囲まれた領域の中央部の表面粗さが最も大きい。 Here, in the thermistor plate wafer 51A after the break line formation process, the surface roughness of the end of the area surrounded by the break lines 51B on the first surface 51aA is the smallest, the surface roughness of the second surface 51bA is the second smallest, and the surface roughness of the center of the area surrounded by the break lines 51B on the first surface 51aA is the largest.
 なお、ブレイクライン形成工程において、第1段階のレーザ照射と第2段階のレーザ照射の間に、サーミスタ平板用ウエハ51Aに対して、ブレイクライン51Bが形成された第1面51aA側から、図3(a)の一点鎖線内の点線が描かれた部分に、レーザ照射してレーザ照射部分のブレイクライン51Bの深さをより深くまたは貫通するようにしてもよい(中間段階のレーザ照射)。このようにすることにより、サーミスタ平板用ウエハ51をブレイクライン51Bに沿ってブレイクする時に、薄板サーミスタ5が破損するのを抑えることができる。中間段階のレーザ照射を第1段階のレーザ照射および第2段階のレーザ照射と比較すると、例えば、中間段階のレーザ照射での照射面積=第1段階のレーザ照射での照射面積<第2段階のレーザ照射での照射面積であり、中間段階のレーザ照射での単位面積当たりの光強度の値≧第1段階のレーザ照射でのパワー密度(W/cm)>第2段階のレーザ照射でのパワー密度(W/cm)である。 In the break line forming process, between the first and second laser irradiations, the thermistor flat plate wafer 51A may be irradiated with a laser from the first surface 51aA side on which the break line 51B is formed to the dotted line in the dashed line in FIG. 3(a) to make the depth of the break line 51B deeper or penetrate the laser irradiated portion (intermediate stage laser irradiation). In this way, when the thermistor flat plate wafer 51 is broken along the break line 51B, damage to the thin plate thermistor 5 can be suppressed. When the intermediate stage laser irradiation is compared with the first stage laser irradiation and the second stage laser irradiation, for example, the irradiation area in the intermediate stage laser irradiation = the irradiation area in the first stage laser irradiation < the irradiation area in the second stage laser irradiation, and the value of the light intensity per unit area in the intermediate stage laser irradiation ≥ the power density in the first stage laser irradiation (W/cm 2 ) > the power density in the second stage laser irradiation (W/cm 2 ).
 ブレイクライン形成工程に続いて、サーミスタ平板用ウエハ51Aに対して電極(共通電極52、第1分割電極53a、第2分割電極53b)を形成する電極形成工程が行われる。電極形成工程では、ブレイクライン形成工程後のサーミスタ平板用ウエハ51Aの第1面51aAの所定の領域(第1面51aAのブレイクライン51Bで囲まれる領域)に対して、電極膜(金属膜)をスパッタリングにて形成し、フォトリソグラフィティ技術を用いてパターニングを行うことにより共通電極52が形成され、ブレイクライン形成工程後のサーミスタ平板用ウエハ51Aの第2面51bAの所定の領域(第1面51aAのブレイクライン51Bで囲まれる領域の裏側の領域)に対して、電極膜(金属膜)をスパッタリングにて形成し、フォトリソグラフィティ技術を用いてパターニングを行うことにより第1分割電極53aおよび第2分割電極53bが形成される。 Following the break line forming process, an electrode forming process is performed in which electrodes (common electrode 52, first divided electrode 53a, second divided electrode 53b) are formed on the thermistor flat plate wafer 51A. In the electrode forming process, an electrode film (metal film) is formed by sputtering on a predetermined area (area surrounded by break lines 51B on the first surface 51aA) of the thermistor flat plate wafer 51A after the break line forming process, and patterned using photolithography technology to form the common electrode 52, and an electrode film (metal film) is formed by sputtering on a predetermined area (area behind the area surrounded by break lines 51B on the first surface 51aA) of the thermistor flat plate wafer 51A after the break line forming process, and patterned using photolithography technology to form the first divided electrode 53a and the second divided electrode 53b.
 共通電極52、第1分極電極53aおよび第2分極電極53bの具体的な金属材料としては、例えば、下地層としてTi膜を形成し、その上層(中間層)にNiとTiの合金からなるNiTi膜を形成し、表面に主層(最上層)としてAu膜を形成した、積層膜構成を採用する。Ti膜とNiTi膜とAu膜の積層膜構成を採用した場合、最終的に薄板サーミスタ5を実装基板にハンダ接合した場合に、ハンダ喰われが生じにくく安定した導電接合を行うことができる。なお、上記積層膜構成において下地層(Ti膜)と中間層(NiTi膜)との間にTiO膜を形成した構成であってもよい。また、第1分極電極53aおよび第2分割電極53bと共通電極52との金属膜構成を異ならせてもよく、例えば、第1分極電極53aおよび第2分割電極53bの金属膜構成をTi膜とNiTi膜とAu膜の積層膜構成とし、共通電極52の膜構成をTi膜とAu膜の積層膜構成としてもよい。 As a specific metal material for the common electrode 52, the first polarized electrode 53a, and the second polarized electrode 53b, for example, a laminated film structure is adopted in which a Ti film is formed as a base layer, a NiTi film made of an alloy of Ni and Ti is formed as an upper layer (middle layer), and an Au film is formed as a main layer (top layer) on the surface. When a laminated film structure of a Ti film, a NiTi film, and a Au film is adopted, when the thin plate thermistor 5 is finally soldered to a mounting board, solder erosion is unlikely to occur and a stable conductive bond can be achieved. Note that in the above laminated film structure, a TiO2 film may be formed between the base layer (Ti film) and the middle layer (NiTi film). In addition, the metal film configurations of the first polarization electrode 53 a and the second split electrode 53 b may be different from those of the common electrode 52. For example, the metal film configurations of the first polarization electrode 53 a and the second split electrode 53 b may be a laminated film configuration of a Ti film, a NiTi film, and an Au film, and the film configuration of the common electrode 52 may be a laminated film configuration of a Ti film and an Au film.
 さらに、上記電極膜構成において、下地層としてCr膜やTi膜を形成し、その上層にAu膜やAg膜、Pt膜などの積層膜構成として形成してもよく、Cu膜のみを適用した膜構成として形成してもよい。なお、Cr膜またはTi膜の下地層と、Au膜、Ag膜、Pt膜との積層膜構成、あるいはCu膜の単層膜構成を採用する場合、導電性樹脂接着剤により接合することができる。 Furthermore, in the above electrode film configuration, a Cr film or Ti film may be formed as an underlayer, and a laminated film configuration of an Au film, an Ag film, a Pt film, etc. may be formed on top of it, or a film configuration using only a Cu film may be formed. Note that when a laminated film configuration of an underlayer of a Cr film or Ti film and an Au film, an Ag film, a Pt film, or a single layer film configuration of a Cu film is adopted, they can be joined with a conductive resin adhesive.
 電極形成工程に続いて、共通電極52、第1分割電極53aおよび第2分割電極53bが形成されたサーミスタ平板用ウエハ51Aをブレイクライン51Bに沿ってブレイクする(ブレイキング工程)。これにより、共通電極52、第1分割電極53aおよび第2分割電極53bが形成された薄板サーミスタ5が個片化されて、これにより薄板サーミスタ5が完成する。 Following the electrode formation process, the thermistor plate wafer 51A on which the common electrode 52, the first divided electrode 53a, and the second divided electrode 53b are formed is broken along the break lines 51B (breaking process). This results in individual thin plate thermistors 5 on which the common electrode 52, the first divided electrode 53a, and the second divided electrode 53b are formed, thereby completing the thin plate thermistors 5.
 上記した薄板サーミスタ5によれば、サーミスタ平板51の第1主面51aでは、表面粗さは中央部よりも端部の方が小さくなっているため、サーミスタ平板51の端部の第1主面51a側での割れや欠けが発生しにくく、その結果、薄板サーミスタ5の機械的強度を向上させることができる。また、サーミスタ平板51の第1主面51aでは、端部の少なくとも一部に盛り上がりがあるため、サーミスタ平板51の端部の第1主面51a側での割れや欠けが発生しにくく、その結果、薄板サーミスタ5の機械的強度を向上させることができる。 In the thin plate thermistor 5 described above, the surface roughness of the first main surface 51a of the thermistor plate 51 is smaller at the ends than at the center, so cracks and chips are less likely to occur on the first main surface 51a side of the ends of the thermistor plate 51, and as a result, the mechanical strength of the thin plate thermistor 5 can be improved. In addition, at least a portion of the end of the first main surface 51a of the thermistor plate 51 is raised, so cracks and chips are less likely to occur on the first main surface 51a side of the ends of the thermistor plate 51, and as a result, the mechanical strength of the thin plate thermistor 5 can be improved.
 また、サーミスタ平板51の第1主面51aの端部に凝固部51Dを有するようにすることで、サーミスタ平板51の第1主面51aの端部の表面状態を滑面化して曲面を確保することができ、これにより、サーミスタ平板51の端部の第1主面51a側での割れや欠けが発生しにくく、その結果、薄板サーミスタ5の機械的強度を向上させることができる。また、凝固部51Dをレーザ痕とすることで、凝固部51Dでの曲面を容易に形成することができる。 Furthermore, by providing a solidified portion 51D at the end of the first main surface 51a of the thermistor plate 51, the surface condition of the end of the first main surface 51a of the thermistor plate 51 can be smoothed to ensure a curved surface, which makes it less likely for cracks or chips to occur on the first main surface 51a side of the end of the thermistor plate 51, thereby improving the mechanical strength of the thin plate thermistor 5. Furthermore, by forming the solidified portion 51D as a laser mark, a curved surface can be easily formed at the solidified portion 51D.
 また、サーミスタ平板51の表面粗さの小さい方の第2主面51bに動作電極となる第1分割電極53aおよび第2分割電極53bを形成しているため、表面粗さの大きい方の第1主面51aに動作電極となる第1分割電極53aおよび第2分割電極53bを形成する場合に比べて、第1分割電極53aおよび第2分割電極53bの形成される面積のばらつきが生じにくく、薄板サーミスタ5の抵抗特性のばらつきを抑えることができる。特に、薄板サーミスタ5では第1分割電極53aおよび第2分割電極53bのサーミスタ平板51に対向する面積により抵抗特性が決定づけられるため、表面粗さの小さい方の第2主面51bに面積の厳密さを要する第1分割電極53aおよび第2分割電極53bを形成することは薄板サーミスタ5の抵抗特性の安定化に有利な構成となっている。 In addition, since the first and second split electrodes 53a and 53b, which serve as the working electrodes, are formed on the second main surface 51b of the thermistor plate 51, which has the smaller surface roughness, the areas on which the first and second split electrodes 53a and 53b are formed are less likely to vary compared to when the first and second split electrodes 53a and 53b, which serve as the working electrodes, are formed on the first main surface 51a, which has the larger surface roughness, and this makes it possible to suppress variations in the resistance characteristics of the thin plate thermistor 5. In particular, since the resistance characteristics of the thin plate thermistor 5 are determined by the areas of the first and second split electrodes 53a and 53b facing the thermistor plate 51, forming the first and second split electrodes 53a and 53b, which require precise areas, on the second main surface 51b, which has the smaller surface roughness, is advantageous for stabilizing the resistance characteristics of the thin plate thermistor 5.
 また、サーミスタ平板51の表面粗さの小さい方の第2主面51bに第1分割電極53aおよび第2分割電極53bを形成することでサーミスタ平板5の第2主面51bへの第1分割電極53aおよび第2分割電極53bの密着性も高まって導通性が安定するので、第1分割電極53aおよび第2分割電極53bに対して測定プローブなどを接触させる際に安定した接続が可能となり、薄板サーミスタ5の抵抗特性を正確に計測することが可能になる。 In addition, by forming the first split electrode 53a and the second split electrode 53b on the second main surface 51b of the thermistor plate 51, which has the smaller surface roughness, the adhesion of the first split electrode 53a and the second split electrode 53b to the second main surface 51b of the thermistor plate 5 is improved and the conductivity is stabilized, allowing a stable connection when a measurement probe or the like is brought into contact with the first split electrode 53a and the second split electrode 53b, making it possible to accurately measure the resistance characteristics of the thin plate thermistor 5.
 また、サーミスタ平板51の表面粗さの大きい方の第1主面51aに中継電極となる共通電極52を形成することで、共通電極52が形成される部分の表面積が見た目の面積に対して増加する分、共通電極52に関わる導電体の総量が増加するため、導通性能が高まる。共通電極52は薄板サーミスタ5に不要な抵抗値を生じさせない役割を担っており、共通電極52の表面積が増える分だけ導通性能が低下することがないため、薄板サーミスタ5の抵抗値を悪化させることがない。特に、小型化された薄板サーミスタ5では、共通電極52の抵抗値が大きくなると所定の抵抗値以下の特性を満足することが難しくなるが、サーミスタ平板5の表面粗さの大きい方の第1主面51aに共通電極52を形成することで、所定の抵抗値以下の特性を満足なものにすることができる。 In addition, by forming the common electrode 52, which serves as a relay electrode, on the first main surface 51a of the thermistor plate 51, which has the greater surface roughness, the surface area of the portion where the common electrode 52 is formed increases relative to the apparent area, and the total amount of conductors related to the common electrode 52 increases accordingly, improving the electrical conductivity. The common electrode 52 plays a role in preventing unnecessary resistance values from occurring in the thin plate thermistor 5, and the electrical conductivity does not decrease as the surface area of the common electrode 52 increases, so the resistance value of the thin plate thermistor 5 is not deteriorated. In particular, in a miniaturized thin plate thermistor 5, if the resistance value of the common electrode 52 increases, it becomes difficult to satisfy the characteristics below a predetermined resistance value. However, by forming the common electrode 52 on the first main surface 51a of the thermistor plate 5, which has the greater surface roughness, the characteristics below a predetermined resistance value can be satisfied.
 また、第1分割電極53a、第2分割電極53bおよび共通電極52をスパッタリングまたは真空蒸着法などのPVD成膜法にて形成されるPVD膜とすることで、第1分割電極53a、第2分割電極53bおよび共通電極52は緻密な膜構成となり、導電性およびサーミスタ平板5への密着性の点で優れた電極にすることができ、また、電極の面積が所望の面積となるように電極を形成することができ、その結果、薄板サーミスタ5の抵抗特性を安定させることができる。特に、小型化された薄板サーミスタ5の抵抗特性の安定に有効である。 Furthermore, by forming the first split electrode 53a, the second split electrode 53b, and the common electrode 52 as PVD films formed by a PVD film formation method such as sputtering or vacuum deposition, the first split electrode 53a, the second split electrode 53b, and the common electrode 52 have a dense film configuration, making them electrodes with excellent conductivity and adhesion to the thermistor plate 5.Furthermore, the electrodes can be formed so that they have a desired area, and as a result, the resistance characteristics of the thin plate thermistor 5 can be stabilized.This is particularly effective in stabilizing the resistance characteristics of a miniaturized thin plate thermistor 5.
 ≪第2実施形態≫
 以下、本発明の第2実施形態に係る薄板サーミスタ搭載型圧電振動デバイスについて、図4から図8を参照して詳細に説明する。
Second Embodiment
Hereinafter, a thin plate thermistor mounted piezoelectric vibration device according to a second embodiment of the present invention will be described in detail with reference to FIGS.
 図4は、薄板サーミスタ搭載型圧電振動デバイス1の平面図である。図5は、図4に平面図を示すデバイス1のA-A断面図である。薄板サーミスタ搭載型圧電振動デバイス1は、図4および図5に示すように、サンドイッチ構造の圧電振動デバイス(以下、「サンドイッチ構造デバイス」と称することもある。)2と、サンドイッチ構造デバイス2の上に搭載された上記した薄板サーミスタ5とを有するデバイスである。なお、以下では、「薄板サーミスタ搭載型圧電振動デバイス1」を、単に、「デバイス1」と称することもある。デバイス1では、例えば、サンドイッチ構造デバイス2の厚みが120μm程度であるのに対し、薄板サーミスタ5はサンドイッチ構造デバイス2の半分以下の厚み(50μm程度)とすることができる。 FIG. 4 is a plan view of a piezoelectric vibration device 1 equipped with a thin plate thermistor. FIG. 5 is a cross-sectional view of the device 1 shown in the plan view in FIG. 4, taken along the line A-A. As shown in FIGS. 4 and 5, the piezoelectric vibration device 1 equipped with a thin plate thermistor is a device having a sandwich-structured piezoelectric vibration device (hereinafter also referred to as a "sandwich-structured device") 2 and the above-mentioned thin plate thermistor 5 mounted on the sandwich-structured device 2. Note that hereinafter, the "thin plate thermistor-equipped piezoelectric vibration device 1" may simply be referred to as "device 1." In device 1, for example, the thickness of the sandwich-structured device 2 is about 120 μm, while the thin plate thermistor 5 can be less than half the thickness of the sandwich-structured device 2 (about 50 μm).
 サンドイッチ構造デバイス2は、図5に示すように、圧電振動板10、第1封止部材20および第2封止部材30を備えて構成されている。サンドイッチ構造デバイス2では、圧電振動板10と第1封止部材20とが接合され、圧電振動板10と第2封止部材30とが接合されることによって、略直方体のサンドイッチ構造のパッケージが構成される。 As shown in FIG. 5, the sandwich structure device 2 is configured with a piezoelectric diaphragm 10, a first sealing member 20, and a second sealing member 30. In the sandwich structure device 2, the piezoelectric diaphragm 10 and the first sealing member 20 are bonded together, and the piezoelectric diaphragm 10 and the second sealing member 30 are bonded together, thereby forming a substantially rectangular sandwich structure package.
 図6(a)は、接合前の単体の圧電振動板10において、一方の主面(第1封止部材20との接合面)である第1主面11を示す平面図である。図6(b)は、接合前の単体の圧電振動板10において、他方の主面(第2封止部材30との接合面)である第2主面12を示す平面図である。圧電振動板10は、水晶などの圧電材料からなる圧電基板であって、その両主面(第1主面11、第2主面12)が平坦平滑面(鏡面加工)として形成されている。本実施形態では、圧電振動板10として、厚みすべり振動を行うATカット水晶板が用いられている。 FIG. 6(a) is a plan view showing the first main surface 11, which is one of the main surfaces (the surface to be bonded to the first sealing member 20) of the single piezoelectric diaphragm 10 before bonding. FIG. 6(b) is a plan view showing the second main surface 12, which is the other main surface (the surface to be bonded to the second sealing member 30) of the single piezoelectric diaphragm 10 before bonding. The piezoelectric diaphragm 10 is a piezoelectric substrate made of a piezoelectric material such as quartz, and both main surfaces (first main surface 11, second main surface 12) are formed as flat, smooth surfaces (mirror-finished). In this embodiment, an AT-cut quartz plate that performs thickness-shear vibration is used as the piezoelectric diaphragm 10.
 なお、図4から図8の各図に関して、圧電振動板10では、圧電振動板10の両主面がXZ平面とされ、短手方向に平行な方向がX軸方向とされ、長手方向に平行な方向がZ軸方向とされ、XZ平面と垂直な方向がY軸方向とされている。 With regard to each of Figures 4 to 8, in the piezoelectric diaphragm 10, both main surfaces of the piezoelectric diaphragm 10 are in the XZ plane, the direction parallel to the short side direction is the X-axis direction, the direction parallel to the long side direction is the Z-axis direction, and the direction perpendicular to the XZ plane is the Y-axis direction.
 圧電振動板10は、略矩形に形成された振動部13と、この振動部13の外周を取り囲む外枠部14と、振動部13と外枠部14とを連結することで振動部13を保持する保持部15とを有している。なお、振動部13と外枠部14との間は、保持部15の形成箇所を除いて切抜き部(圧電振動板10を厚み方向に貫通する開口部)となっている。これにより、圧電振動板10は、振動部13、外枠部14および保持部15が一体的に設けられた構成となっている。圧電振動板10の第1主面11および第2主面12には、一対の励振電極(第1主面11側の第1励振電極111、第2主面12側の第2励振電極121)が形成されている。 The piezoelectric diaphragm 10 has a vibration part 13 formed in a substantially rectangular shape, an outer frame part 14 that surrounds the outer periphery of the vibration part 13, and a holding part 15 that holds the vibration part 13 by connecting the vibration part 13 and the outer frame part 14. The area between the vibration part 13 and the outer frame part 14 is a cutout part (an opening that penetrates the piezoelectric diaphragm 10 in the thickness direction) except for the part where the holding part 15 is formed. As a result, the piezoelectric diaphragm 10 is configured such that the vibration part 13, the outer frame part 14, and the holding part 15 are integrally provided. A pair of excitation electrodes (a first excitation electrode 111 on the first main surface 11 side and a second excitation electrode 121 on the second main surface 12 side) are formed on the first main surface 11 and the second main surface 12 of the piezoelectric diaphragm 10.
 本実施形態では、保持部15は、振動部13と外枠部14との間の1箇所のみに設けられている。また、振動部13および保持部15は、外枠部14よりも薄く形成されている。このような外枠部14と保持部15との厚みの違いにより、外枠部14と保持部15の圧電振動の固有振動数が異なることになり、外枠部14に圧電振動が伝搬しない。なお、保持部15の形成箇所は1箇所に限定されるものではなく、保持部15は、振動部13と外枠部14との間の2箇所に設けられていてもよい。 In this embodiment, the holding portion 15 is provided at only one location between the vibration portion 13 and the outer frame portion 14. Furthermore, the vibration portion 13 and the holding portion 15 are formed thinner than the outer frame portion 14. Due to this difference in thickness between the outer frame portion 14 and the holding portion 15, the natural frequencies of the piezoelectric vibrations of the outer frame portion 14 and the holding portion 15 are different, and the piezoelectric vibrations are not propagated to the outer frame portion 14. Note that the location where the holding portion 15 is formed is not limited to one location, and the holding portion 15 may be provided at two locations between the vibration portion 13 and the outer frame portion 14.
 第1励振電極111は振動部13の第1主面11側に設けられ、第2励振電極121は振動部13の第2主面12側に設けられている。第1励振電極111および第2励振電極121のそれぞれには、これらの励振電極を外部電極端子に接続するための引出電極(引出配線電極膜)(第1主面11側の第1引出電極112、第2主面12側の第2引出電極122)が接続されている。第1引出電極112は、第1励振電極111から引き出され、保持部15を経由して、外枠部14に形成された接続用接合パターン114に繋がっている。第2引出電極122は、第2励振電極121から引き出され、保持部15を経由して、外枠部14に形成された接続用接合パターン124に繋がっている。 The first excitation electrode 111 is provided on the first main surface 11 side of the vibration part 13, and the second excitation electrode 121 is provided on the second main surface 12 side of the vibration part 13. The first excitation electrode 111 and the second excitation electrode 121 are each connected to an extraction electrode (extraction wiring electrode film) (the first extraction electrode 112 on the first main surface 11 side, and the second extraction electrode 122 on the second main surface 12 side) for connecting these excitation electrodes to external electrode terminals. The first extraction electrode 112 is extracted from the first excitation electrode 111 and connected to the connection bonding pattern 114 formed on the outer frame part 14 via the holding part 15. The second extraction electrode 122 is extracted from the second excitation electrode 121 and connected to the connection bonding pattern 124 formed on the outer frame part 14 via the holding part 15.
 圧電振動板10の第1主面11および第2主面12のそれぞれには、圧電振動板10を第1封止部材20および第2封止部材30に接合するための接合パターンが形成されている。この接合パターンには、パッケージの内部空間を気密封止するための封止用パターンと、配線や電極を導通させるための導電用パターンとが含まれている。なお、図6(a),(b)、図7(b)および図8(a)では、接合パターンが形成される接合領域を斜線ハッチングにて示している。 The first main surface 11 and the second main surface 12 of the piezoelectric diaphragm 10 are each formed with a bonding pattern for bonding the piezoelectric diaphragm 10 to the first sealing member 20 and the second sealing member 30. The bonding pattern includes a sealing pattern for hermetically sealing the internal space of the package, and a conductive pattern for conducting wiring and electrodes. Note that in Figures 6(a), (b), 7(b), and 8(a), the bonding regions where the bonding patterns are formed are indicated by diagonal hatching.
 圧電振動板10における封止用パターンとして、第1主面11には振動側第1接合パターン113が形成され、第2主面12には振動側第2接合パターン123が形成される。振動側第1接合パターン113および振動側第2接合パターン123は、外枠部14に設けられており、平面視で環状に形成されている。振動側第1接合パターン113および振動側第2接合パターン123の内側の領域は、振動部13の封止領域(接合後にパッケージの内部空間となる領域)となる。第1励振電極111および第2励振電極121は、振動側第1接合パターン113および振動側第2接合パターン123とは電気的に接続されていない。 As sealing patterns in the piezoelectric diaphragm 10, a vibration-side first bonding pattern 113 is formed on the first main surface 11, and a vibration-side second bonding pattern 123 is formed on the second main surface 12. The vibration-side first bonding pattern 113 and the vibration-side second bonding pattern 123 are provided on the outer frame portion 14 and are formed in a ring shape in a planar view. The area inside the vibration-side first bonding pattern 113 and the vibration-side second bonding pattern 123 becomes the sealing area of the vibration portion 13 (the area that becomes the internal space of the package after bonding). The first excitation electrode 111 and the second excitation electrode 121 are not electrically connected to the vibration-side first bonding pattern 113 and the vibration-side second bonding pattern 123.
 圧電振動板10における導電用パターンとして、第1主面11には、封止領域外(振動側第1接合パターン113の外側)に4つの接続用接合パターン115が形成され、封止領域内(振動側第1接合パターン113の内側)に接続用接合パターン114、116が形成されている。また、第2主面12には、封止領域外(振動側第2接合パターン123の外側)に4つの接続用接合パターン125が形成され、封止領域内(振動側第2接合パターン123の内側)に接続用接合パターン124が形成されている。第1主面11側の接続用接合パターン115および第2主面12側の接続用接合パターン125は、それぞれ、外枠部14の4隅(角部)付近の領域に設けられている。 As conductive patterns in the piezoelectric diaphragm 10, on the first main surface 11, four connection bonding patterns 115 are formed outside the sealing area (outside the vibration side first bonding pattern 113), and connection bonding patterns 114 and 116 are formed within the sealing area (inside the vibration side first bonding pattern 113). On the second main surface 12, four connection bonding patterns 125 are formed outside the sealing area (outside the vibration side second bonding pattern 123), and connection bonding pattern 124 is formed within the sealing area (inside the vibration side second bonding pattern 123). The connection bonding patterns 115 on the first main surface 11 side and the connection bonding patterns 125 on the second main surface 12 side are provided in areas near the four corners (corners) of the outer frame portion 14, respectively.
 また、圧電振動板10には、第1主面11と第2主面12との間で複数の貫通孔16が形成されており、各貫通孔16の内壁面には第1主面11と第2主面12との間での導通を図るための貫通電極が形成されている。具体的には、接続用接合パターン115と接続用接合パターン125との導通を図るために4つの貫通孔16および貫通電極が形成され、接続用接合パターン116と接続用接合パターン124との導通を図るために1つの貫通孔16および貫通電極が形成されている。 In addition, the piezoelectric diaphragm 10 has a plurality of through holes 16 formed between the first main surface 11 and the second main surface 12, and a through electrode is formed on the inner wall surface of each through hole 16 to provide electrical continuity between the first main surface 11 and the second main surface 12. Specifically, four through holes 16 and through electrodes are formed to provide electrical continuity between the connection bonding pattern 115 and the connection bonding pattern 125, and one through hole 16 and through electrode is formed to provide electrical continuity between the connection bonding pattern 116 and the connection bonding pattern 124.
 圧電振動板10において、第1励振電極111、第2励振電極121、第1引出電極112、第2引出電極122、振動側第1接合パターン113、振動側第2接合パターン123、および、接続用接合パターン114~116、124、125は、同一のプロセスで形成することができる。具体的には、圧電振動板10の両主面(第1主面11、第2主面12)上に物理的気相成長させて形成された下地層(Ti膜)と、当該下地層上に物理的気相成長させて積層形成された接合膜(Au膜)とから形成することができる。また、接合パターンを形成する積層膜の構成は、Ti膜とAu膜との2層構造に限定されるものではなく、他の膜(例えばTi膜とAu膜との間に形成されるバリア膜)を含んだ3層以上の構造であってもよい。 In the piezoelectric diaphragm 10, the first excitation electrode 111, the second excitation electrode 121, the first extraction electrode 112, the second extraction electrode 122, the vibration side first bonding pattern 113, the vibration side second bonding pattern 123, and the connection bonding patterns 114 to 116, 124, and 125 can be formed in the same process. Specifically, they can be formed from an underlayer (Ti film) formed by physical vapor deposition on both main surfaces (first main surface 11, second main surface 12) of the piezoelectric diaphragm 10, and a bonding film (Au film) formed by physical vapor deposition on the underlayer. In addition, the configuration of the laminated film forming the bonding pattern is not limited to a two-layer structure of a Ti film and an Au film, but may be a three-layer or more structure including other films (for example, a barrier film formed between the Ti film and the Au film).
 図7(a)は、接合前の単体の第1封止部材20において、一方の主面(外面)である第1主面21を示す平面図である。図7(b)は、接合前の単体の第1封止部材20において、他方の主面(圧電振動板10との接合面)である第2主面22を示す平面図である。第1封止部材20は、1枚のガラスウエハまたは水晶ウエハから形成された直方体の基板であり、この第1封止部材20の第2主面22は平坦平滑面(鏡面加工)として形成されている。 Figure 7(a) is a plan view showing the first main surface 21, which is one of the main surfaces (outer surface) of the single first sealing member 20 before bonding. Figure 7(b) is a plan view showing the second main surface 22, which is the other main surface (the bonding surface with the piezoelectric diaphragm 10) of the single first sealing member 20 before bonding. The first sealing member 20 is a rectangular substrate formed from a single glass wafer or quartz wafer, and the second main surface 22 of this first sealing member 20 is formed as a flat and smooth surface (mirror finish).
 第1封止部材20の第1主面21には、図7(a)に示すように、2つの電極パターン211と、配線パターン212、213とが形成されている。電極パターン211は、薄板サーミスタ5を搭載するための搭載パッドである(図4参照)。配線パターン212は、第2励振電極121を外部電極端子321(図8(b)参照)に接続する配線経路の一部となる配線パターンである。配線パターン213は、第1励振電極111を外部電極端子321に接続する配線経路の一部となる配線パターンである。 As shown in FIG. 7(a), two electrode patterns 211 and wiring patterns 212 and 213 are formed on the first main surface 21 of the first sealing member 20. The electrode pattern 211 is a mounting pad for mounting the thin plate thermistor 5 (see FIG. 4). The wiring pattern 212 is a wiring pattern that is part of the wiring path that connects the second excitation electrode 121 to the external electrode terminal 321 (see FIG. 8(b)). The wiring pattern 213 is a wiring pattern that is part of the wiring path that connects the first excitation electrode 111 to the external electrode terminal 321.
 第1封止部材20の第2主面22には、図7(b)に示すように、第1封止部材20を圧電振動板10に接合するための接合パターンが形成されている。この接合パターンには、パッケージの内部空間を気密封止するための封止用パターンと、配線や電極を導通させるための導電用パターンとが含まれる。 As shown in FIG. 7(b), a bonding pattern is formed on the second main surface 22 of the first sealing member 20 for bonding the first sealing member 20 to the piezoelectric diaphragm 10. This bonding pattern includes a sealing pattern for hermetically sealing the internal space of the package, and a conductive pattern for conducting wiring and electrodes.
 第1封止部材20における封止用パターンとしては、封止側第1接合パターン221が形成される。封止側第1接合パターン221は、平面視で環状に形成されており、その内側の領域が封止領域となる。第1封止部材20における導電用パターンとしては、封止領域外(封止側第1接合パターン221の外側)の4隅(角部)付近に4つの接続用接合パターン222が形成され、封止領域内(封止側第1接合パターン221の内側)に接続用接合パターン223~225が形成されている。なお、接続用接合パターン224と接続用接合パターン225とは配線パターン226によって接続されている。 The sealing pattern in the first sealing member 20 is a sealing-side first bonding pattern 221. The sealing-side first bonding pattern 221 is formed in a ring shape in a plan view, and its inner region becomes the sealing region. As the conductive pattern in the first sealing member 20, four connection bonding patterns 222 are formed near the four corners (corners) outside the sealing region (outside the sealing-side first bonding pattern 221), and connection bonding patterns 223 to 225 are formed within the sealing region (inside the sealing-side first bonding pattern 221). The connection bonding pattern 224 and the connection bonding pattern 225 are connected by a wiring pattern 226.
 また、第1封止部材20には、第1主面21と第2主面22との間で複数の貫通孔23が形成されており、各貫通孔23の内壁面には第1主面21と第2主面22との間での導通を図るための貫通電極が形成されている。具体的には、電極パターン211または配線パターン212、213と接続用接合パターン222との導通を図るために4つの貫通孔23および貫通電極が形成され、配線パターン212と接続用接合パターン223との導通を図るために1つの貫通孔23および貫通電極が形成され、配線パターン213と接続用接合パターン225との導通を図るために1つの貫通孔23および貫通電極が形成されている。 Furthermore, the first sealing member 20 has a plurality of through holes 23 formed between the first main surface 21 and the second main surface 22, and a through electrode is formed on the inner wall surface of each through hole 23 to provide electrical continuity between the first main surface 21 and the second main surface 22. Specifically, four through holes 23 and through electrodes are formed to provide electrical continuity between the electrode pattern 211 or the wiring patterns 212, 213 and the connection bonding pattern 222, one through hole 23 and through electrode are formed to provide electrical continuity between the wiring pattern 212 and the connection bonding pattern 223, and one through hole 23 and through electrode are formed to provide electrical continuity between the wiring pattern 213 and the connection bonding pattern 225.
 第1封止部材20において、封止側第1接合パターン221、接続用接合パターン222~225、および、配線パターン226は、同一のプロセスで形成することができる。具体的には、これらは、第1封止部材20の第2主面22上に物理的気相成長させて形成された下地層(Ti膜)と、当該下地層上に物理的気相成長させて積層形成された接合膜(Au膜)とから形成することができる。 In the first sealing member 20, the sealing-side first bonding pattern 221, the connection bonding patterns 222 to 225, and the wiring pattern 226 can be formed in the same process. Specifically, they can be formed from an underlayer (Ti film) formed by physical vapor deposition on the second main surface 22 of the first sealing member 20, and a bonding film (Au film) formed by physical vapor deposition on the underlayer.
 図8(a)は、接合前の単体の第2封止部材30において、一方の主面(圧電振動板10との接合面)である第1主面31を示す平面図である。図8(b)は、接合前の単体の第2封止部材30において、他方の主面(外面)である第2主面32を示す平面図である。第2封止部材30は、1枚のガラスウエハまたは水晶ウエハから形成された直方体の基板であり、この第2封止部材30の第1主面31は平坦平滑面(鏡面加工)として形成されている。 Figure 8(a) is a plan view showing the first main surface 31, which is one of the main surfaces (the surface to be bonded to the piezoelectric diaphragm 10), of the second sealing member 30 alone before bonding. Figure 8(b) is a plan view showing the second main surface 32, which is the other main surface (outer surface) of the second sealing member 30 alone before bonding. The second sealing member 30 is a rectangular substrate formed from a single glass wafer or quartz wafer, and the first main surface 31 of this second sealing member 30 is formed as a flat and smooth surface (mirror-finished).
 第2封止部材30の第1主面31には、図8(a)に示すように、第2封止部材30を圧電振動板10に接合するための接合パターンが形成されている。この接合パターンには、パッケージの内部空間を気密封止するための封止用パターンと、配線や電極を導通させるための導電用パターンとが含まれる。 As shown in FIG. 8(a), a bonding pattern is formed on the first main surface 31 of the second sealing member 30 for bonding the second sealing member 30 to the piezoelectric diaphragm 10. This bonding pattern includes a sealing pattern for hermetically sealing the internal space of the package, and a conductive pattern for conducting wiring and electrodes.
 第2封止部材30における封止用パターンとしては、封止側第2接合パターン311が形成される。封止側第2接合パターン311は、平面視で環状に形成されており、その内側の領域が封止領域となる。第2封止部材30における導電用パターンとしては、封止領域外(封止側第2接合パターン311の外側)の4隅(角部)付近に4つの接続用接合パターン312が形成されている。 The sealing pattern in the second sealing member 30 is a sealing-side second bonding pattern 311. The sealing-side second bonding pattern 311 is formed in a ring shape in a plan view, and its inner region becomes the sealing region. As the conductive pattern in the second sealing member 30, four connection bonding patterns 312 are formed near the four corners (corners) outside the sealing region (outside the sealing-side second bonding pattern 311).
 第2封止部材30の第2主面32には、図8(b)に示すように、デバイス1を外部に電気的に接続する4つの外部電極端子321が設けられている。外部電極端子321は、第2封止部材30の4隅(角部)にそれぞれ位置する。 As shown in FIG. 8(b), the second main surface 32 of the second sealing member 30 is provided with four external electrode terminals 321 that electrically connect the device 1 to the outside. The external electrode terminals 321 are located at the four corners (corner portions) of the second sealing member 30.
 また、第2封止部材30には、第1主面31と第2主面32との間で複数の貫通孔33が形成されており、各貫通孔33の内壁面には第1主面31と第2主面32との間での導通を図るための貫通電極が形成されている。具体的には、接続用接合パターン312と外部電極端子321との導通を図るために4つの貫通孔33および貫通電極が形成されている。 The second sealing member 30 has a plurality of through holes 33 formed between the first main surface 31 and the second main surface 32, and a through electrode is formed on the inner wall surface of each through hole 33 to provide electrical continuity between the first main surface 31 and the second main surface 32. Specifically, four through holes 33 and through electrodes are formed to provide electrical continuity between the connection bonding pattern 312 and the external electrode terminal 321.
 第2封止部材30において、封止側第2接合パターン311および接合用接合パターン312は、同一のプロセスで形成することができる。具体的には、これらは、第2封止部材30の第1主面31上に物理的気相成長させて形成された下地層(Ti膜)と、当該下地層上に物理的気相成長させて積層形成された接合膜(Au膜)とから形成することができる。 In the second sealing member 30, the sealing-side second bonding pattern 311 and the bonding bonding pattern 312 can be formed by the same process. Specifically, they can be formed from a base layer (Ti film) formed by physical vapor deposition on the first main surface 31 of the second sealing member 30, and a bonding film (Au film) formed by physical vapor deposition on the base layer.
 サンドイッチ構造デバイス2では、圧電振動板10と第1封止部材20とが封止用パターンである振動側第1接合パターン113および封止側第1接合パターン221を重ね合わせた状態で拡散接合され、圧電振動板10と第2封止部材30とが封止用パターンである振動側第2接合パターン123および封止側第2接合パターン311を重ね合わせた状態で拡散接合されて、サンドイッチ構造のパッケージが製造される。すなわち、振動側第1接合パターン113および封止側第1接合パターン221が接合されて圧電振動板10と第1封止部材20との間の封止用パターン層となり、振動側第2接合パターン123および封止側第2接合パターン311が接合されて圧電振動板10と第2封止部材30との間の封止用パターン層となる。これにより、パッケージの内部空間、つまり、振動板13の収容空間が気密封止される。 In the sandwich structure device 2, the piezoelectric diaphragm 10 and the first sealing member 20 are diffusion bonded with the vibration side first bonding pattern 113 and the sealing side first bonding pattern 221 overlapping each other, and the piezoelectric diaphragm 10 and the second sealing member 30 are diffusion bonded with the vibration side second bonding pattern 123 and the sealing side second bonding pattern 311 overlapping each other, to manufacture a sandwich structure package. That is, the vibration side first bonding pattern 113 and the sealing side first bonding pattern 221 are bonded to form a sealing pattern layer between the piezoelectric diaphragm 10 and the first sealing member 20, and the vibration side second bonding pattern 123 and the sealing side second bonding pattern 311 are bonded to form a sealing pattern layer between the piezoelectric diaphragm 10 and the second sealing member 30. This hermetically seals the internal space of the package, that is, the space in which the diaphragm 13 is housed.
 この際、導電用パターンである接続用接合パターン同士も接合され、接合された導電用パターン同士は、圧電振動板10と第1封止部材20との間または圧電振動板10と第2封止部材30との間で導電用パターン層となる。サンドイッチ構造デバイス2では、第1励振電極111および第2励振電極121と図8(b)の右下および左上の外部電極端子321との電気的導通が得られるようになっている。 At this time, the connection bonding patterns, which are conductive patterns, are also bonded together, and the bonded conductive patterns form a conductive pattern layer between the piezoelectric diaphragm 10 and the first sealing member 20 or between the piezoelectric diaphragm 10 and the second sealing member 30. In the sandwich structure device 2, electrical conduction is achieved between the first excitation electrode 111 and the second excitation electrode 121 and the external electrode terminals 321 at the lower right and upper left of Figure 8 (b).
 薄板サーミスタ5は、分割電極53が形成された第2主面51bを下面(サンドイッチ構造デバイス2との接合面)とし、分割電極53と第1封止部材20の電極パターン211とを電気的に接合してサンドイッチ構造デバイス2に搭載される。また、サンドイッチ構造デバイス2の上に搭載される薄板サーミスタ5は、図8(b)の右上および左下の外部電極端子321との電気的導通が得られるようになっている。 The thin plate thermistor 5 is mounted on the sandwich structure device 2 with the second main surface 51b, on which the split electrode 53 is formed, as the underside (the joining surface with the sandwich structure device 2), and the split electrode 53 is electrically joined to the electrode pattern 211 of the first sealing member 20. The thin plate thermistor 5 mounted on the sandwich structure device 2 is also arranged to be electrically conductive with the external electrode terminals 321 at the upper right and lower left of Figure 8 (b).
 上述したように、薄板サーミスタ5は広面積の金属電極(共通電極52、分割電極53)を有することにより、サンドイッチ構造デバイス2に対してのシールド部材として優位に作用させることができる。薄板サーミスタ5をシールド部材としても利用するために、デバイス1の平面視において、薄板サーミスタ5はサンドイッチ構造デバイス2の振動部13と少なくとも一部が重畳するようにサンドイッチ構造デバイス2に配置される(図4参照)。また、薄板サーミスタ5は、平面視で第1励振電極111および第2励振電極の121全体と重畳するように配置されれば、薄板サーミスタ5のシールド効果を最大限に発揮でき、より好ましい。 As described above, the thin plate thermistor 5 has wide-area metal electrodes (common electrode 52, split electrodes 53), and thus can act advantageously as a shielding member for the sandwich structure device 2. In order to utilize the thin plate thermistor 5 also as a shielding member, the thin plate thermistor 5 is arranged in the sandwich structure device 2 so that, in a plan view of the device 1, at least a portion of the thin plate thermistor 5 overlaps with the vibrating portion 13 of the sandwich structure device 2 (see FIG. 4). Furthermore, if the thin plate thermistor 5 is arranged so that it overlaps with the entire first excitation electrode 111 and the second excitation electrode 121 in a plan view, the shielding effect of the thin plate thermistor 5 can be maximized, which is more preferable.
 また、薄板サーミスタ5は、少なくともサンドイッチ構造デバイス2の互いに対向する2辺において、その両端が外枠部14に重畳するようにサンドイッチ構造デバイス2に配置される。サンドイッチ構造デバイス2における第1封止部材20および第2封止部材30は、極めて薄い基板であり、かつ、ガラスや水晶などの脆性材料が使用されている。このため、サンドイッチ構造デバイス2は、中央部(圧電振動板10における外枠部14が存在しない領域)における強度が特に低くなる。このようなサンドイッチ構造デバイス2において、薄板サーミスタ5をサンドイッチ構造デバイス2の中央部の領域内に配置すると、薄板サーミスタ5を搭載するときの押圧力によって第1封止部材20の割れが発生する虞がある。これに対し、薄板サーミスタ5をサンドイッチ構造デバイス2の外周部(圧電振動板10における外枠部14が存在する領域)に接合することで、すなわち、薄板サーミスタ5の端部を外枠部14に重畳するように配置することで、第1封止部材20の割れを抑制でき、デバイス1における強度を確保できる。特に、薄板サーミスタ5がサンドイッチ構造デバイス2の封止部(振動側第1接合パターン113などの封止用パターン)と重なるようにすることで、デバイス1が強度的に安定する。なお、図4および図5では、サンドイッチ構造デバイス2の短手方向に対向する2辺において薄板サーミスタ5の両端を外枠部14に重畳するように配置した例を示しているが、薄板サーミスタ5はサンドイッチ構造デバイス2の長手方向に対向する2辺において外枠部14に重畳していてもよい。また、薄板サーミスタ5は、サンドイッチ構造デバイス2の互いに対向する2辺だけでなく、3辺または4辺に重畳させて配置されていてもよい。 The thin plate thermistor 5 is arranged in the sandwich structure device 2 so that both ends overlap the outer frame portion 14 at least on two opposing sides of the sandwich structure device 2. The first sealing member 20 and the second sealing member 30 in the sandwich structure device 2 are extremely thin substrates, and brittle materials such as glass and quartz are used. For this reason, the strength of the sandwich structure device 2 is particularly low in the center (the area where the outer frame portion 14 of the piezoelectric diaphragm 10 does not exist). In such a sandwich structure device 2, if the thin plate thermistor 5 is arranged in the center area of the sandwich structure device 2, there is a risk that the first sealing member 20 will crack due to the pressing force when mounting the thin plate thermistor 5. In response to this, by joining the thin plate thermistor 5 to the outer periphery of the sandwich structure device 2 (the area where the outer frame portion 14 of the piezoelectric diaphragm 10 exists), that is, by arranging the ends of the thin plate thermistor 5 so as to overlap the outer frame portion 14, it is possible to suppress cracking of the first sealing member 20 and ensure the strength of the device 1. In particular, by overlapping the thin plate thermistor 5 with the sealing portion (sealing pattern such as the vibration-side first bonding pattern 113) of the sandwich structure device 2, the strength of the device 1 is stabilized. Note that, although Figs. 4 and 5 show an example in which both ends of the thin plate thermistor 5 are arranged so as to overlap the outer frame portion 14 on two sides facing in the short direction of the sandwich structure device 2, the thin plate thermistor 5 may also overlap the outer frame portion 14 on two sides facing in the long direction of the sandwich structure device 2. Furthermore, the thin plate thermistor 5 may be arranged so as to overlap not only two opposing sides of the sandwich structure device 2, but also three or four sides.
 分割電極53と電極パターン211との間は、導電性樹脂接着剤61(図5参照)によって電気的接合が得られる構成としている。但し、これに限定されるものではなく、分割電極53と電極パターン211との間はAu(金)バンプによる接合が行われるものであってもよい。さらに、薄板サーミスタ5とサンドイッチ構造デバイス2との間の隙間(導電性樹脂接着剤61が存在しない隙間)に、非導電性樹脂接着剤62(図5参照)が充填されている。非導電性樹脂接着剤62は、薄板サーミスタ5の下面に充填されるだけでなく、薄板サーミスタ5の全体を封止する封止樹脂とされていてもよい。なお、導電性樹脂接着剤61としてはシリコーン系の樹脂を使用でき、非導電性樹脂接着剤62としてはエポキシ系の樹脂を使用できる。 The split electrodes 53 and the electrode patterns 211 are electrically connected by a conductive resin adhesive 61 (see FIG. 5). However, this is not limited to this, and the split electrodes 53 and the electrode patterns 211 may be connected by Au (gold) bumps. Furthermore, the gap between the thin plate thermistor 5 and the sandwich structure device 2 (the gap where the conductive resin adhesive 61 is not present) is filled with a non-conductive resin adhesive 62 (see FIG. 5). The non-conductive resin adhesive 62 may not only be filled on the underside of the thin plate thermistor 5, but may also be used as a sealing resin that seals the entire thin plate thermistor 5. Note that a silicone-based resin can be used as the conductive resin adhesive 61, and an epoxy-based resin can be used as the non-conductive resin adhesive 62.
 このように、導電性樹脂接着剤61および非導電性樹脂接着剤62によってサンドイッチ構造デバイス2に対して薄板サーミスタ5を面接合させた場合、薄板サーミスタ5とサンドイッチ構造デバイス2との間の熱伝導性を向上させることができる。これにより、薄板サーミスタ5をサンドイッチ構造デバイス2の振動部13と近い温度に保持することができる。また、サンドイッチ構造デバイス2と薄板サーミスタ5との面接合には、デバイス1の強度を向上させるメリットもある。 In this way, when the thin plate thermistor 5 is surface-bonded to the sandwich structure device 2 using the conductive resin adhesive 61 and the non-conductive resin adhesive 62, the thermal conductivity between the thin plate thermistor 5 and the sandwich structure device 2 can be improved. This allows the thin plate thermistor 5 to be maintained at a temperature close to that of the vibrating part 13 of the sandwich structure device 2. Surface bonding between the sandwich structure device 2 and the thin plate thermistor 5 also has the advantage of improving the strength of the device 1.
 薄板サーミスタ5の接合に導電性樹脂接着剤61および非導電性樹脂接着剤62を使用する場合、導電性樹脂接着剤61は、非導電性樹脂接着剤62よりも熱伝導性が高いものとすることが好ましい。これにより、薄板サーミスタ5とサンドイッチ構造デバイス2との間の熱伝導性をより向上させることができる。また、薄板サーミスタ5は、薄板サーミスタ5の平面視での面積の半分以上(50%~100%)で、導電性樹脂接着剤61および非導電性樹脂接着剤62により、第1封止部材20の第1主面21に面接合されていることが好ましい。これにより、薄板サーミスタ5とサンドイッチ構造デバイス2との間の熱伝導を十分に確保でき、薄板サーミスタ5が検出するサンドイッチ構造デバイス2の温度の精度を十分なものとすることができる。また、非導電性樹脂接着剤62は、導電性樹脂接着剤61よりも硬度が高いものとすることが好ましい。これにより、薄板サーミスタ5とサンドイッチ構造デバイス2との間の応力を緩和できるとともに、デバイス1のパッケージ強度を向上させることができる。 When the conductive resin adhesive 61 and the non-conductive resin adhesive 62 are used to bond the thin plate thermistor 5, it is preferable that the conductive resin adhesive 61 has a higher thermal conductivity than the non-conductive resin adhesive 62. This can further improve the thermal conductivity between the thin plate thermistor 5 and the sandwich structure device 2. In addition, it is preferable that the thin plate thermistor 5 is surface-bonded to the first main surface 21 of the first sealing member 20 by the conductive resin adhesive 61 and the non-conductive resin adhesive 62 over more than half (50% to 100%) of the area of the thin plate thermistor 5 in a plan view. This can ensure sufficient thermal conduction between the thin plate thermistor 5 and the sandwich structure device 2, and the accuracy of the temperature of the sandwich structure device 2 detected by the thin plate thermistor 5 can be sufficient. In addition, it is preferable that the non-conductive resin adhesive 62 has a higher hardness than the conductive resin adhesive 61. This can relieve stress between the thin plate thermistor 5 and the sandwich structure device 2 and improve the package strength of the device 1.
 上記した薄板サーミスタ搭載型圧電振動デバイス1によれば、サーミスタ平板51の端部で割れや欠けが発生しにくく、抵抗特性に優れた第1実施形態の薄板サーミスタ5を備えることにより、温度の検出精度の向上を図ることができる。特に、薄板サーミスタ5の表面粗さが小さい第2主面51bで、サンドイッチ構造デバイス2と電気的機械的に接合することで、上記薄板サーミスタ5の第1主面51aが、サンドイッチ構造デバイス2(圧電振動板10)と対向する面と反対側の面となるように配置され、薄板サーミスタ5の外表面には少なくとも凝固部51D(曲面)が配置されることで、薄板サーミスタ5の端部で割れや欠けが発生しにくい面側となるので、機械的な強度を高めることができる上で望ましい。 The above-mentioned piezoelectric vibration device 1 equipped with a thin plate thermistor is less likely to crack or chip at the end of the thermistor plate 51, and by providing the thin plate thermistor 5 of the first embodiment, which has excellent resistance characteristics, it is possible to improve the temperature detection accuracy. In particular, by electrically and mechanically joining the sandwich structure device 2 with the second main surface 51b of the thin plate thermistor 5, which has a small surface roughness, the first main surface 51a of the thin plate thermistor 5 is arranged so as to be the surface opposite to the surface facing the sandwich structure device 2 (piezoelectric vibration plate 10), and by arranging at least a solidified portion 51D (curved surface) on the outer surface of the thin plate thermistor 5, the end of the thin plate thermistor 5 is less likely to crack or chip, which is desirable in terms of increasing mechanical strength.
 ≪第3実施形態≫
 以下、本発明の第3実施形態に係る薄板サーミスタ搭載型圧電振動デバイスについて、図9から図11を参照して詳細に説明する。図9は、薄板サーミスタ搭載型圧電振動デバイスXcXの分解斜視図である。図10は、図9に分解斜視図を示した薄板サーミスタ搭載型圧電振動デバイスXcXの底面図である。図11は、図10の薄板サーミスタ搭載型圧電振動デバイスXcXのC-C断面図である。
Third Embodiment
Hereinafter, a thin plate thermistor-mounted piezoelectric vibration device according to a third embodiment of the present invention will be described in detail with reference to Fig. 9 to Fig. 11. Fig. 9 is an exploded perspective view of a thin plate thermistor-mounted piezoelectric vibration device XcX. Fig. 10 is a bottom view of the thin plate thermistor-mounted piezoelectric vibration device XcX shown in the exploded perspective view of Fig. 9. Fig. 11 is a CC cross-sectional view of the thin plate thermistor-mounted piezoelectric vibration device XcX of Fig. 10.
 薄板サーミスタ搭載型圧電振動デバイスXcXは、図9から図11に示すように、上部収納部11AXおよび下部収納部11BXを有するパッケージ1Xと、上部収納部11AXに収納される圧電振動板2Xと、下部収納部11BXに収納される上記した薄板サーミスタ5と、上部収納部11Aを気密封止するリッド3Xとを有するデバイスである。 As shown in Figures 9 to 11, the thin plate thermistor-mounted piezoelectric vibration device XcX is a device having a package 1X with an upper storage section 11AX and a lower storage section 11BX, a piezoelectric vibration plate 2X stored in the upper storage section 11AX, the above-mentioned thin plate thermistor 5 stored in the lower storage section 11BX, and a lid 3X that hermetically seals the upper storage section 11A.
 パッケージ1Xは、セラミックからなり、全体として直方体形状で、上方に開口する上部収納部11AXと下方に開口する下部収納部11BXを有している。上部収納部11AXと下部収納部11BXとは、基板11CXに対して閉口部分(底部)が背中合わせになった構成である。 The package 1X is made of ceramic and has a rectangular parallelepiped shape overall, with an upper storage section 11AX that opens upward and a lower storage section 11BX that opens downward. The upper storage section 11AX and the lower storage section 11BX are configured so that their closed portions (bottoms) are back-to-back with respect to the substrate 11CX.
 上部収納部11AXは上方に開口する凹形の直方体収納構成で、上部収納部11AXの底部に金属膜からなる搭載電極16X、17Xが形成されている。搭載電極16X、17Xは、パッケージ1Xの短辺に沿った方向に並んで形成されている。上部収納部11AXの外周部分には底部より高い位置にある矩形状の封止部10Xが設けられ、封止部10Xには金属膜層が形成されている。 The upper storage section 11AX has a concave rectangular storage configuration that opens upward, and mounting electrodes 16X, 17X made of a metal film are formed on the bottom of the upper storage section 11AX. The mounting electrodes 16X, 17X are formed side by side in a direction that follows the short side of the package 1X. A rectangular sealing section 10X is provided on the outer periphery of the upper storage section 11AX, and is located higher than the bottom, and a metal film layer is formed on the sealing section 10X.
 搭載電極16X、17Xは、複数の金属膜からなり、W(タングステン)層、Ni(ニッケル)層、Au(金)層の順で積層されている。W層はパッケージを構成するセラミックス材料とともに焼成にて一体形成され、Ni層とAu層はメッキにてW層上に形成されている。封止部10Xも搭載電極16X、17Xと同様の金属層構成でW層、Ni層、Au層の順で積層された積層構成を有している。なお、後述する搭載電極18X、19X並びに実装電極12X、13X、14X、15Xにおいても同様の製法にて製造し、それぞれW層、Ni層、Au層の順で積層された積層構成を有している。 Mount electrodes 16X, 17X are made of multiple metal films, and are laminated in the order of a W (tungsten) layer, a Ni (nickel) layer, and a Au (gold) layer. The W layer is integrally formed by firing with the ceramic material that constitutes the package, and the Ni layer and Au layer are formed on the W layer by plating. Sealing section 10X also has a metal layer configuration similar to that of mounting electrodes 16X, 17X, with a laminated configuration of a W layer, a Ni layer, and a Au layer laminated in that order. Note that mounting electrodes 18X, 19X and mounting electrodes 12X, 13X, 14X, and 15X, which will be described later, are also manufactured using the same manufacturing method, and each has a laminated configuration of a W layer, a Ni layer, and a Au layer laminated in that order.
 下部収納部11BXは下方に開口する凹形の直方体収納構成で、下部収納部11BXの底部に金属膜からなる搭載電極18X、19Xが形成されている。搭載電極18X、19Xは、長辺と短辺とを有する矩形形状で、パッケージ1Xの長辺に沿った方向で搭載電極18Xの長辺側と搭載電極19Xの長辺側とが対向するように形成されている。なお、搭載電極18X、19Xをパッケージ1Xの短辺に沿った方向に並ぶように形成してもよい。 Lower storage section 11BX has a concave rectangular storage configuration that opens downward, and mounting electrodes 18X, 19X made of metal film are formed on the bottom of lower storage section 11BX. Mounting electrodes 18X, 19X are rectangular with long and short sides, and are formed so that the long side of mounting electrode 18X faces the long side of mounting electrode 19X in the direction along the long side of package 1X. Mounting electrodes 18X, 19X may also be formed so that they are aligned in the direction along the short side of package 1X.
 下部収納部11BXの4つの角部には底部より高い位置にある実装電極12X、13X、14X、15Xが設けられている。実装電極12X、13X、14X、15Xの各々は矩形形状であり、実装電極12X、14Xは搭載電極16X、17Xと、実装電極13X、15Xは搭載電極18X、19Xと、パッケージ1X内の内部配線により、電気的に接続されている。 The four corners of the lower storage section 11BX are provided with mounting electrodes 12X, 13X, 14X, and 15X that are located higher than the bottom. Each of the mounting electrodes 12X, 13X, 14X, and 15X has a rectangular shape, and the mounting electrodes 12X and 14X are electrically connected to the mounting electrodes 16X and 17X, and the mounting electrodes 13X and 15X are electrically connected to the mounting electrodes 18X and 19X by internal wiring within the package 1X.
 圧電振動板2XにはATカット水晶板が用いられており、圧電振動板2Xは全体として矩形の板状である。圧電振動板2Xはその表裏の中央部分に励振電極21X、22Xが形成されており、励振電極21X、22Xは幅を有する帯状の引出電極21aX、22aXにより圧電振動板2Xの外周部分に引き出されている。励振電極21X、22Xは矩形形状であり、圧電振動板2Xの一方の主面において励振電極21Xは、一つの短辺角部から引出電極21aXにより、圧電振動板2Xの一方の主面の端部に引き出され、圧電振動板2Xの他方の主面において励振電極22Xは、一つの短辺角部から引出電極22aXにより、圧電振動板2Xの他方の主面の端部に引き出されている。これにより、励振電極21X、22Xは圧電振動板2Xの一方の短辺に引き出されている。 An AT-cut quartz plate is used for the piezoelectric diaphragm 2X, and the piezoelectric diaphragm 2X is generally rectangular. Excitation electrodes 21X and 22X are formed in the center of the front and back of the piezoelectric diaphragm 2X, and the excitation electrodes 21X and 22X are drawn to the outer periphery of the piezoelectric diaphragm 2X by strip-shaped lead electrodes 21aX and 22aX having a width. The excitation electrodes 21X and 22X are rectangular, and on one main surface of the piezoelectric diaphragm 2X, the excitation electrode 21X is drawn from one short corner to an end of one main surface of the piezoelectric diaphragm 2X by the lead electrode 21aX, and on the other main surface of the piezoelectric diaphragm 2X, the excitation electrode 22X is drawn from one short corner to an end of the other main surface of the piezoelectric diaphragm 2X by the lead electrode 22aX. As a result, the excitation electrodes 21X and 22X are drawn to one short side of the piezoelectric diaphragm 2X.
 励振電極21X、22Xと引出電極21aX、22aXとは、薄膜の金属膜が積層形成された構成で、圧電振動板2Xに接してTi(チタン)層が形成され、その上部にAu(金)層が形成された積層構成を有している。なお、金属膜構成は上記構成以外であってもよく、例えば下地金属をCr(クロム)層としたり、上層をAg(銀)層としたりするなど、周知の金属膜構成を用いることができる。励振電極21X、22Xや引出電極21aX、22aXを、スパッタリングまたは真空蒸着法などのPVD成膜法にて形成されるPVD膜とすることができる。 The excitation electrodes 21X, 22X and the extraction electrodes 21aX, 22aX are configured by laminating thin metal films, with a Ti (titanium) layer formed in contact with the piezoelectric diaphragm 2X and an Au (gold) layer formed on top of that. Note that the metal film configuration may be other than that described above, and well-known metal film configurations may be used, such as a Cr (chromium) layer as the base metal and an Ag (silver) layer as the upper layer. The excitation electrodes 21X, 22X and the extraction electrodes 21aX, 22aX may be PVD films formed by a PVD film formation method such as sputtering or vacuum deposition.
 薄板サーミスタ5は、分割電極53が形成された第2主面51bを上面(パッケージ1Xとの接合面)とし、分割電極53(第1および第2分割電極53
a、53b)と下部収納部11BXの底部の搭載電極18X、19Xとを電気的に接合してパッケージ1Xに搭載される。
The thin plate thermistor 5 has the second main surface 51b on which the split electrodes 53 are formed as the upper surface (the surface to be joined to the package 1X), and the split electrodes 53 (the first and second split electrodes 53
The semiconductor device is mounted on the package 1X by electrically connecting the mounting electrodes 18X and 19X at the bottom of the lower storage portion 11BX to the mounting electrodes 18X and 19X at the bottom of the lower storage portion 11BX.
 リッド3Xは薄型の金属板またはセラミック板からなり、パッケージ1Xの封止部10Xの外形サイズに対応した矩形形状を有している。なお、リッド3Xおよび封止部10Xの構成は、パッケージ1Xの気密封止方法により構成が異なる。例えば、シーム溶接によりリッド3Xと封止部10Xとを接合する場合は、リッド3Xはコア材にコバールを用い、その表面にNiメッキ膜が形成された構成を採る。そして、封止部10Xにはリング状の金属枠をろう接した構成を用い、例えば真空雰囲気または不活性ガス雰囲気中でリッド3Xと金属枠(封止部10X)をシーム溶接にて接合する。これによりパッケージ1Xの内部(上部収納部11AXの内部)は真空雰囲気または不活性ガス雰囲気の定常状態とすることができる。 The lid 3X is made of a thin metal or ceramic plate and has a rectangular shape corresponding to the outer size of the sealing portion 10X of the package 1X. The configurations of the lid 3X and the sealing portion 10X differ depending on the airtight sealing method of the package 1X. For example, when the lid 3X and the sealing portion 10X are joined by seam welding, the lid 3X uses Kovar as the core material and has a Ni plating film formed on its surface. The sealing portion 10X is configured by soldering a ring-shaped metal frame, and the lid 3X and the metal frame (sealing portion 10X) are joined by seam welding in a vacuum atmosphere or an inert gas atmosphere, for example. This allows the inside of the package 1X (inside the upper storage portion 11AX) to be in a steady state of a vacuum atmosphere or an inert gas atmosphere.
 金属ろう材、例えばAuSuろう材でろう接により気密封止する場合は、例えばリッド3XにAuSuろう材を周状にプリフォーム形成しておき、また封止部10Xの上層にはAuメッキを施しておき、両者を所定雰囲気および温度環境下で加熱することにより、金属ろう接による気密封止をすることができる。 When hermetically sealing by soldering with a metal brazing material, for example an AuSu brazing material, the AuSu brazing material is preformed around the lid 3X, and the upper layer of the sealing portion 10X is plated with Au. By heating both of them in a specified atmosphere and temperature environment, a hermetic seal can be achieved by metal brazing.
 パッケージ1Xの上部収納部11AXの搭載電極16X、17Xにペースト状の導電性樹脂接着剤S1をディスペンサ等で塗布する。導電性樹脂接着剤S1は例えば金属フィラーが含まれたシリコーン樹脂接着剤からなるが、ポリイミド系の樹脂材など他の樹脂材を用いてもよい。塗布した導電性樹脂接着剤S1上に電極形成された圧電振動板2Xを搭載する。具体的には引出電極21aX、22aX部分が導電性樹脂接着剤S1と接合されるように圧電振動板2Xを上部収納部11AXに搭載する。そして、導電性樹脂接着剤S1を加熱により硬化させ圧電振動板2Xと搭載電極16X、17Xを導電接合(電気的機械的接合)する。なお、導電性樹脂接着剤S1は、必要に応じて、圧電振動板2Xの上から再度塗布してもよい。本実施形態においては再度塗布した構成を例示している。 A paste-like conductive resin adhesive S1 is applied to the mounting electrodes 16X and 17X of the upper storage section 11AX of the package 1X using a dispenser or the like. The conductive resin adhesive S1 is made of, for example, a silicone resin adhesive containing metal filler, but other resin materials such as polyimide-based resin materials may also be used. The piezoelectric diaphragm 2X with electrodes formed thereon is mounted on the applied conductive resin adhesive S1. Specifically, the piezoelectric diaphragm 2X is mounted on the upper storage section 11AX so that the extraction electrodes 21aX and 22aX are bonded to the conductive resin adhesive S1. The conductive resin adhesive S1 is then hardened by heating to conductively bond (electrically and mechanically bond) the piezoelectric diaphragm 2X and the mounting electrodes 16X and 17X. Note that the conductive resin adhesive S1 may be applied again from above the piezoelectric diaphragm 2X as necessary. In this embodiment, a configuration in which the adhesive is applied again is illustrated.
 リッド3Xにより上部収納部11AXを気密封止するが、リッド3Xを封止部10Xに接合することにより気密封止を行う。本実施形態では金属ろう材S2により金属ろう材封止を行っており、金属ろう材S2は例えばAuSuろう材である。 The upper storage section 11AX is hermetically sealed by the lid 3X, which is achieved by joining the lid 3X to the sealing section 10X. In this embodiment, the metal brazing material sealing is achieved by using the metal brazing material S2, which is, for example, an AuSu brazing material.
 パッケージ1Xの下部収納部11BXに薄板サーミスタ5を導電接合する。搭載電極18X、19Xに導電性樹脂接着剤S1をディスペンサ等で塗布する。塗布した導電性樹脂接着剤S1上に分割電極53(第1分割電極53a、第2分割電極53b)が対応するように薄板サーミスタ5を下部収納部11BXに収納する。そして、導電性樹脂接着剤S1を加熱により硬化させ薄板サーミスタ5の第1分割電極53aおよび第2分割電極53bと搭載電極18Xおよび搭載電極19Xとを導電接合(電気的機械的接合)する。なお、薄板サーミスタ5の導電接合ははんだ接合を行ってもよい。 The thin plate thermistor 5 is conductively joined to the lower storage section 11BX of the package 1X. A conductive resin adhesive S1 is applied to the mounting electrodes 18X and 19X using a dispenser or the like. The thin plate thermistor 5 is stored in the lower storage section 11BX so that the split electrodes 53 (first split electrode 53a, second split electrode 53b) correspond to the applied conductive resin adhesive S1. The conductive resin adhesive S1 is then hardened by heating to conductively join (electrically and mechanically join) the first split electrode 53a and second split electrode 53b of the thin plate thermistor 5 to the mounting electrodes 18X and 19X. The conductive joining of the thin plate thermistor 5 may be performed by soldering.
 薄板サーミスタ5が収納された下部収納部11BXに樹脂材Mをディスペンサ等で注入して薄板サーミスタ5を樹脂材Mで被覆し、その後、樹脂材Mを加熱により硬化させる。本実施形態においては樹脂材Mとしてポリイミド系樹脂を用いているが、これ以外の樹脂材を用いてもよい。これにより、薄板サーミスタ5を外気から保護されるので、安定した温度検出を行うことができる。 Resin material M is injected into the lower storage section 11BX containing the thin plate thermistor 5 using a dispenser or the like to cover the thin plate thermistor 5 with the resin material M, and then the resin material M is hardened by heating. In this embodiment, a polyimide resin is used as the resin material M, but other resin materials may also be used. This protects the thin plate thermistor 5 from the outside air, allowing for stable temperature detection.
 上記した薄板サーミスタ搭載型圧電振動デバイスXcXによれば、サーミスタ平板51の端部で割れや欠けが発生しにくく、抵抗特性に優れた第1実施形態の薄板サーミスタ5を備えることにより、温度の検出精度の向上を図ることができる。 The above-mentioned piezoelectric vibration device XcX equipped with a thin plate thermistor is less likely to crack or chip at the end of the thermistor plate 51, and by being equipped with the thin plate thermistor 5 of the first embodiment, which has excellent resistance characteristics, it is possible to improve the accuracy of temperature detection.
 ≪第4実施形態≫
 以下、本発明の第4実施形態に係る薄板サーミスタ搭載型圧電振動デバイスについて、図12を参照して詳細に説明する。図12は、薄板サーミスタ搭載型圧電振動デバイスXcYの断面図である。
Fourth Embodiment
A thin plate thermistor mounted piezoelectric vibrating device according to a fourth embodiment of the present invention will now be described in detail with reference to Fig. 12. Fig. 12 is a cross-sectional view of a thin plate thermistor mounted piezoelectric vibrating device XcY.
 薄板サーミスタ搭載型圧電振動デバイスXcYでは、薄板サーミスタ搭載型圧電振動デバイスXcYのパッケージ1Yの収納部51Yの内部に圧電振動板2Xと薄板サーミスタ5が収納された構成である。パッケージ1Yは内部配線が形成されたセラミックからなり、上部に開口を有する収納部51Yを有している。収納部51Yの底部には圧電振動板2X用の搭載電極54Y、55Y(搭載電極55Yは不図示)と、薄板サーミスタ5用の搭載電極56Y、57Yが形成されている。また、底面には実装電極52Y、53Yが形成されている。 In the thin plate thermistor mounted piezoelectric vibration device XcY, a piezoelectric vibration plate 2X and a thin plate thermistor 5 are stored inside a storage section 51Y of a package 1Y of the thin plate thermistor mounted piezoelectric vibration device XcY. The package 1Y is made of ceramic with internal wiring formed therein, and has a storage section 51Y with an opening at the top. Mounting electrodes 54Y, 55Y (mounting electrode 55Y not shown) for the piezoelectric vibration plate 2X and mounting electrodes 56Y, 57Y for the thin plate thermistor 5 are formed on the bottom of the storage section 51Y. Mounting electrodes 52Y, 53Y are also formed on the bottom surface.
 圧電振動板2Xの両主面に形成された引出電極21aX、22aX(図9参照)が導電性樹脂接着剤S1により搭載電極54Y、55Yに導電接合(電気的機械的接合)され、圧電振動板2Xはパッケージ1Yの収納部51Yの内部に収納される。また、薄板サーミスタ5の第2主面51bに形成された第1、第2分割電極53a、53bが導電性樹脂接着剤S1により搭載電極56Y、57Yに導電接合(電気的機械的接合)され、薄板サーミスタ5はパッケージ1Yの収納部51Yの内部に収納される。 The extraction electrodes 21aX, 22aX (see FIG. 9) formed on both main surfaces of the piezoelectric diaphragm 2X are conductively bonded (electrically and mechanically bonded) to the mounting electrodes 54Y, 55Y by the conductive resin adhesive S1, and the piezoelectric diaphragm 2X is stored inside the storage section 51Y of the package 1Y. In addition, the first and second split electrodes 53a, 53b formed on the second main surface 51b of the thin plate thermistor 5 are conductively bonded (electrically and mechanically bonded) to the mounting electrodes 56Y, 57Y by the conductive resin adhesive S1, and the thin plate thermistor 5 is stored inside the storage section 51Y of the package 1Y.
 パッケージ1Yの収納部51Yの内部に圧電振動板2Xと薄板サーミスタ5とが並列した状態で収納され、リッド3Xにより気密封止される。 The piezoelectric diaphragm 2X and thin plate thermistor 5 are stored in parallel inside the storage section 51Y of the package 1Y and are hermetically sealed by the lid 3X.
 上記した薄板サーミスタ搭載型圧電振動デバイスXcYによれば、サーミスタ平板51の端部で割れや欠けが発生しにくく、抵抗特性に優れた第1実施形態の薄板サーミスタ5を備えることにより、温度の検出精度の向上を図ることができる。 The above-mentioned piezoelectric vibration device XcY equipped with a thin plate thermistor is less likely to crack or chip at the end of the thermistor plate 51, and by being equipped with the thin plate thermistor 5 of the first embodiment, which has excellent resistance characteristics, it is possible to improve the temperature detection accuracy.
 なお、薄板サーミスタは上記した実施形態の薄板サーミスタ5に限定されるものではなく、種々の変更を加えたものとすることができる。 The thin plate thermistor is not limited to the thin plate thermistor 5 of the above embodiment, but can be modified in various ways.
 例えば、上記実施形態において、例えば、サーミスタ平板用ウエハ51に対して、表面粗さが大きい方の第1面51aA側から第1段階のレーザ照射および第2段階のレーザ照射を行う代わりに、表面粗さが小さい方の第2面51bA側から第1段階のレーザ照射および第2段階のレーザ照射を行うことで、サーミスタ平板51の第2主面51bでは、中央部よりも端部の方が、表面粗さが小さく、端部の少なくとも一部で盛り上がっており、サーミスタ平板51は第2主面52bの端部に凝固部(他の凝固部)を有するようにしてもよい。また、サーミスタ平板用ウエハ51に対して第1面51aA側および第2面51bA側のそれぞれから第1段階のレーザ照射および第2段階のレーザ照射を行うことで、サーミスタ平板51の第1主面51aおよび第2主面51bのそれぞれでは、中央部よりも端部の方が、表面粗さが小さく、端部の少なくとも一部で盛り上がっており、サーミスタ平板51は第1主面51aおよび第2主面51bのそれぞれの端部に凝固部と他の凝固部を有するようにしてもよい。後者の場合、サーミスタ平板51は第1主面51aおよび第2主面51bのそれぞれの端部に凝固部を有することにより、サーミスタ平板51の端部の第1主面51a側および第2主面51b側の双方での割れや欠けが発生しにくく、その結果、薄板サーミスタ5の機械的強度をさらに向上させることができる。 For example, in the above embodiment, instead of performing the first stage laser irradiation and the second stage laser irradiation on the thermistor plate wafer 51 from the first surface 51aA side, which has the greater surface roughness, the first stage laser irradiation and the second stage laser irradiation can be performed from the second surface 51bA side, which has the lesser surface roughness, so that the end portion of the second main surface 51b of the thermistor plate 51 has a smaller surface roughness than the central portion, and at least a portion of the end portion is raised, and the thermistor plate 51 may have a solidified portion (another solidified portion) at the end portion of the second main surface 52b. In addition, by performing the first stage laser irradiation and the second stage laser irradiation on the thermistor flat plate wafer 51 from the first surface 51aA side and the second surface 51bA side, respectively, the surface roughness is smaller at the end portion than at the center portion of the first main surface 51a and the second main surface 51b of the thermistor flat plate 51, and at least a part of the end portion is raised, and the thermistor flat plate 51 may have a solidified portion and another solidified portion at each end portion of the first main surface 51a and the second main surface 51b. In the latter case, by having a solidified portion at each end portion of the first main surface 51a and the second main surface 51b, the thermistor flat plate 51 is less likely to crack or chip on both the first main surface 51a side and the second main surface 51b side of the end portion of the thermistor flat plate 51, and as a result, the mechanical strength of the thin plate thermistor 5 can be further improved.
 また、上記実施形態において、例えば、薄板サーミスタ5は共通電極52を備えないようにしてもよい。また、例えば、薄板サーミスタ5は、共通電極52を備えず、第1分割電極53aおよび第2分割電極53bを、サーミスタ平板51の第2主面51bの一部に配置された第2主面部分、第2主面部分と繋がっており、サーミスタ平板51の側面に配置された側面部分、および、側面部分と繋がっており、サーミスタ平板51の第1主面51aに配置された第1主面部分を含む第1分割電極および第2分割電極に置き換えてもよい。 Furthermore, in the above embodiment, for example, the thin plate thermistor 5 may not include the common electrode 52. For example, the thin plate thermistor 5 may not include the common electrode 52, and the first split electrode 53a and the second split electrode 53b may be replaced with a first split electrode and a second split electrode including a second main surface portion disposed on a part of the second main surface 51b of the thermistor plate 51, a side surface portion connected to the second main surface portion and disposed on a side surface of the thermistor plate 51, and a first main surface portion connected to the side surface portion and disposed on the first main surface 51a of the thermistor plate 51.
 上記薄板サーミスタ5を用いる利点は小型化と薄型化であり、サンドイッチ構造デバイス2と組み合わせることによってデバイスの小型化、薄型化には有利であり、このような観点から薄板サーミスタ5をサンドイッチ構造デバイス2に組わせることが好ましい。なお、上記実施形態の薄板サーミスタ5は、サンドイッチ構造デバイスなどの上述したパッケージ以外の既存のパッケージなどに適用可能である。例えば、モールド樹脂封止パッケージにも適用することが可能である。モールド樹脂封止パッケージでは、ベース基板となるガラスエポキシ基板の上部に圧電振動デバイスと薄板サーミスタを接合材により並列した状態で平置き搭載し、ワイヤボンディングなどにより基板の端子部と電気的に接続される。そして、これらの各部材を含む上部にモールド樹脂にて被覆した構成となる。このような構成では、熱伝導性の改善を望むことができる。 The advantage of using the thin plate thermistor 5 is that it can be made smaller and thinner, and by combining it with the sandwich structure device 2, it is advantageous to make the device smaller and thinner, and from this perspective, it is preferable to combine the thin plate thermistor 5 with the sandwich structure device 2. The thin plate thermistor 5 of the above embodiment can be applied to existing packages other than the above-mentioned packages, such as sandwich structure devices. For example, it can also be applied to a molded resin sealed package. In a molded resin sealed package, a piezoelectric vibration device and a thin plate thermistor are mounted flat on top of a glass epoxy substrate, which serves as a base substrate, in a state where they are arranged in parallel with a bonding material, and are electrically connected to the terminal portion of the substrate by wire bonding or the like. Then, the top including each of these components is covered with molded resin. With such a configuration, it is possible to expect improved thermal conductivity.
 また、上記実施形態では、サーミスタ平板51の端部に凝固部51Dを形成するためにレーザを用いているが、これに限定されるものではなく、例えば、電子ビームを用いるなどレーザ以外を用いてサーミスタ平板51の端部に凝固部51Dを形成するようにしてもよい。さらに、面粗さの異なる平面研磨により、サーミスタ平板の一の面および他の面の表面粗さを異ならせることもできる。 In addition, in the above embodiment, a laser is used to form the solidified portion 51D at the end of the thermistor plate 51, but this is not limited to the above, and for example, a means other than a laser, such as an electron beam, may be used to form the solidified portion 51D at the end of the thermistor plate 51. Furthermore, the surface roughness of one side and the other side of the thermistor plate can be made different by flat surface polishing with different surface roughness.
 また、上記実施形態の薄板サーミスタ5の共通電極52の上に、水晶ウエハやアルミホイルなど、薄くかつ構造強度がある程度得られる補強部材を貼り合わせるようにしてもよい。補強部材として特に水晶ウエハなどの硬質材料を用いれば薄板サーミスタ5の強度が大きく上昇し、サンドイッチ構造デバイス2への薄板サーミスタ5の取り付けが容易となる。補強部材として水晶ウエハを用いる場合には共通電極52に対して密着性を向上させるための膜を成膜しておくことが望ましい。また、補強部材として特に絶縁物を用いれば薄板サーミスタ5をサンドイッチ構造デバイス2に搭載した後に、デバイス1の天面(補強部材の共通電極52と対向する面と反対側(裏側)の面)に絶縁処理を施さなくてもよくなる。 In addition, a reinforcing member that is thin and has a certain degree of structural strength, such as a quartz wafer or aluminum foil, may be attached to the common electrode 52 of the thin plate thermistor 5 of the above embodiment. If a hard material, such as a quartz wafer, is used as the reinforcing member, the strength of the thin plate thermistor 5 is greatly increased, making it easier to attach the thin plate thermistor 5 to the sandwich structure device 2. When a quartz wafer is used as the reinforcing member, it is desirable to form a film on the common electrode 52 to improve adhesion. In addition, if an insulating material is used as the reinforcing member, it is not necessary to perform an insulating process on the top surface of the device 1 (the surface opposite (back side) of the reinforcing member to the surface facing the common electrode 52) after mounting the thin plate thermistor 5 on the sandwich structure device 2.
 また、上記実施形態において、モリブデンやタングステンなどの純金属を焼結材料として焼結することで得られた焼結物をサーミスタ平板51の第1主面51aに配置して共通電極とするようにしてもよい。これにより、薄板サーミスタ5の強度を向上させることができるとともに、共通電極52としての焼結物の厚み分サーミスタ平板51の厚みを薄くすることができる。また、タングステンはアルミニウムと同程度の熱伝導性があるため、薄板サーミスタ5全体の熱移動が速やかになり、薄板サーミスタ5の熱応答性の向上が図られる。 In the above embodiment, a sintered product obtained by sintering a pure metal such as molybdenum or tungsten as a sintering material may be disposed on the first main surface 51a of the thermistor plate 51 to serve as a common electrode. This improves the strength of the thin plate thermistor 5 and allows the thickness of the thermistor plate 51 to be reduced by the thickness of the sintered product used as the common electrode 52. Tungsten has thermal conductivity comparable to that of aluminum, which speeds up heat transfer throughout the thin plate thermistor 5 and improves the thermal response of the thin plate thermistor 5.
 また、上記実施形態において、例えば、Agペーストをサーミスタ平板51の第1主面51aの全面またはほぼ全面に塗布して焼き付けることでサーミスタ平板51の第1主面51aに共通電極52を形成するようにしてもよい。この場合、共通電極52は、本来の中継電極として機能するとともに、薄板サーミスタ5の強度を向上させる補強部材としても機能する。Agペーストの代わりに、サーミスタ平板51の第1主面51aにCr-Auで共通電極52を形成し、その後、共通電極52のサーミスタ平板51と対向する面と反対側(裏側)の面に補強部材としてのエポキシ樹脂を設けるようにしてもよい。これらの場合、薄板サーミスタ5の抵抗特性の劣化を防ぎつつ、薄板サーミスタ5の強度の向上を図ることができる。 In addition, in the above embodiment, for example, Ag paste may be applied to the entire or almost entire first main surface 51a of the thermistor plate 51 and baked to form a common electrode 52 on the first main surface 51a of the thermistor plate 51. In this case, the common electrode 52 functions as an original relay electrode and also functions as a reinforcing member that improves the strength of the thin plate thermistor 5. Instead of Ag paste, the common electrode 52 may be formed of Cr-Au on the first main surface 51a of the thermistor plate 51, and then an epoxy resin may be provided as a reinforcing member on the surface of the common electrode 52 opposite to the surface facing the thermistor plate 51 (back side). In these cases, the strength of the thin plate thermistor 5 can be improved while preventing deterioration of the resistance characteristics of the thin plate thermistor 5.
 また、上記実施形態の内容および変形例の内容を適宜組み合わせてもよい The above embodiments and variations may be combined as appropriate.
 本発明は、温度センサとして用いる薄板サーミスタおよび薄板サーミスタを搭載した薄板サーミスタ搭載型圧電振動デバイスに広く適用することができる。 The present invention can be widely applied to thin plate thermistors used as temperature sensors and piezoelectric vibration devices equipped with thin plate thermistors.
1:薄板サーミスタ搭載型圧電振動デバイス
2:サンドイッチ構造デバイス
5:薄板サーミスタ
51:サーミスタ平板
51a:第1主面
51b:第2主面
52:共通電極
53、53a、53b:分割電極
 
1: Piezoelectric vibration device with thin plate thermistor 2: Sandwich structure device 5: Thin plate thermistor 51: Thermistor plate 51a: First main surface 51b: Second main surface 52: Common electrode 53, 53a, 53b: Split electrodes

Claims (4)

  1.  一の面、および、当該一の面と反対側であって当該一の面よりも表面粗さが大きい他の面を含む、単板のサーミスタ平板と、
     前記一の面に形成され、当該一の面上で分割された第1分割電極および第2分割電極と、
     前記他の面に形成された共通電極と、
     を有することを特徴とする薄板サーミスタ。
    A single thermistor plate including a first surface and another surface opposite to the first surface and having a surface roughness greater than that of the first surface;
    a first divided electrode and a second divided electrode formed on the one surface and divided on the one surface;
    a common electrode formed on the other surface;
    A thin plate thermistor comprising:
  2.  前記第1分割電極および前記第2分割電極、並びに、前記共通電極は、PVD(Physical Vapor Desposition)膜であることを特徴とする請求項1に記載の薄板サーミスタ。 The thin plate thermistor according to claim 1, characterized in that the first and second split electrodes, and the common electrode are PVD (Physical Vapor Deposition) films.
  3.  表面に複数の金属膜層からなる励振電極が形成された圧電振動板、前記圧電振動板の一方の主面に接合された第1封止部材、および、前記圧電振動板の他方の主面に接合された第2封止部材を備える圧電振動デバイスと、
     請求項1または請求項2に記載の前記薄板サーミスタと、
     を有し、
     前記薄板サーミスタが前記圧電振動デバイスの表面に接合されている
     ことを特徴とする薄板サーミスタ搭載型圧電振動デバイス。
    A piezoelectric vibration device including a piezoelectric diaphragm having an excitation electrode formed on a surface thereof and made of a plurality of metal film layers, a first sealing member bonded to one main surface of the piezoelectric diaphragm, and a second sealing member bonded to the other main surface of the piezoelectric diaphragm;
    The thin plate thermistor according to claim 1 or 2;
    having
    A thin plate thermistor-mounted piezoelectric vibration device, characterized in that the thin plate thermistor is bonded to a surface of the piezoelectric vibration device.
  4.  表面に複数の金属膜層からなる励振電極が形成された圧電振動板と、
     請求項1または請求項2に記載の前記薄板サーミスタと、
     前記圧電振動板および前記薄板サーミスタを収納するパッケージと、
     を有することを特徴とする薄板サーミスタ搭載型圧電振動デバイス。
     
    A piezoelectric diaphragm having an excitation electrode formed of a plurality of metal film layers on its surface;
    The thin plate thermistor according to claim 1 or 2;
    a package that houses the piezoelectric diaphragm and the thin plate thermistor;
    A piezoelectric vibration device equipped with a thin plate thermistor, comprising:
PCT/JP2023/041212 2022-11-22 2023-11-16 Thin-plate thermistor and thin-plate thermistor-mounted piezoelectric vibration device WO2024111495A1 (en)

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JP2022-186194 2022-11-22

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012070336A1 (en) * 2010-11-22 2012-05-31 Tdk株式会社 Chip thermistor and thermistor assembly board
JP2013106054A (en) * 2011-11-10 2013-05-30 Daishinku Corp Piezoelectric device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012070336A1 (en) * 2010-11-22 2012-05-31 Tdk株式会社 Chip thermistor and thermistor assembly board
JP2013106054A (en) * 2011-11-10 2013-05-30 Daishinku Corp Piezoelectric device

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