WO2024111034A1

WO2024111034A1 - Frequency detection circuit and frequency detection system

Info

Publication number: WO2024111034A1
Application number: PCT/JP2022/043084
Authority: WO
Inventors: 平和田; 英之中溝; 達也萩原
Original assignee: 三菱電機株式会社
Priority date: 2022-11-22
Filing date: 2022-11-22
Publication date: 2024-05-30

Abstract

The present invention comprises: a frequency conversion circuit for employing each of a first LO signal and a second LO signal having the same frequency but a different phase with respect to said first LO signal to perform frequency conversion of an input signal, the first and second LO signals being two LO signals that can be switched in accordance with time; and a frequency calculation circuit (14) for calculating the frequency of an input signal on the basis of the phase difference between the first LO signal and the second LO signal, and the phase difference between a signal that is frequency-converted by the frequency conversion circuit employing the first LO signal and a signal that is frequency-converted employing the second LO signal.

Description

Frequency detection circuit and frequency detection system

This disclosure relates to a frequency detection circuit and a frequency detection system that detect the frequency of an input signal.

The frequency detection circuit is a circuit that detects the frequency of an arbitrary input signal.
For example, the frequency detection circuit is configured using a frequency converter such as a mixer, an analog to digital converter (ADC), and an arithmetic circuit (also called a logic circuit or a digital circuit) such as a field programmable gate array (FPGA).

As a conventional frequency detection circuit, for example, Patent Document 1 shows a configuration in which a plurality of systems, each of which is made up of a mixer, a low pass filter (LPF), and a digitizer, are connected in parallel.
In this frequency detection circuit, LO (Local Oscillator) signals with different frequencies, amplitudes, and initial phases are input to a plurality of mixers to convert the frequency of the input signal.The frequency detection circuit detects the frequency of the input signal by formulating and solving simultaneous equations based on information on the frequency, amplitude, and phase of the LO signal used for frequency conversion in each system and the signal after frequency conversion in each system.

JP 2013-83652 A

However, in the frequency detection circuit of Patent Document 1, when the input signal becomes higher frequency, it is necessary to increase the frequency of the LO signal. As a result, in this frequency detection circuit, it is necessary to increase the number of parallel systems in order to solve the simultaneous equations, which poses the problem of an increase in the size of the frequency detection circuit.

This disclosure has been made to solve the problems described above, and aims to provide a frequency detection circuit that can detect the frequency of the input signal without increasing the circuit size, regardless of the frequency.

The frequency detection circuit according to the present disclosure is characterized by comprising a frequency conversion circuit that converts the frequency of an input signal using two LO signals that are switched over time, a first LO signal and a second LO signal that has the same frequency but a different phase from the first LO signal, and a frequency calculation circuit that calculates the frequency of the input signal based on the phase difference between the signal after frequency conversion using the first LO signal by the frequency conversion circuit and the signal after frequency conversion using the second LO signal, and the phase difference between the first LO signal and the second LO signal.

　According to the present disclosure, the above configuration makes it possible to detect the frequency of the input signal without increasing the circuit size, regardless of the frequency of the input signal.

1 is a block diagram showing a configuration example (when an input signal has one wave) of a frequency detection circuit according to a first embodiment; 4 is a block diagram showing a configuration example (when the input signal has one wave) of a frequency calculation circuit in the first embodiment; FIG. 11 is a diagram showing an example of a frequency spectrum of a signal after frequency conversion using a first LO signal by the mixer in the first embodiment (when the input signal has one wave). FIG. 11 is a diagram showing an example of a frequency spectrum of a signal after frequency conversion using a second LO signal by the mixer in the first embodiment (when the input signal has one wave). FIG. FIG. 5A is a diagram showing an example of a signal after passing through a filter in the first embodiment, and FIG. 5B is a diagram explaining an example of the operation of a phase calculation circuit. 1 is a block diagram showing a configuration example (when an input signal has two waves) of a frequency detection circuit according to a first embodiment; 1 is a diagram showing an example of a frequency spectrum of a signal after frequency conversion using a first LO signal by the mixer in the first embodiment (when the input signal has two waves). FIG. 11 is a diagram showing an example of a frequency spectrum of a signal after frequency conversion using a second LO signal by the mixer in the first embodiment (when the input signal has two waves). FIG. 4 is a diagram showing an example of a phase difference calculated by the phase difference calculation circuit in the first embodiment (when the input signal has two waves). FIG. 13 is a block diagram showing another configuration example (when the input signal has one wave) of the frequency detection circuit according to the first embodiment; FIG. FIG. 13 is a block diagram showing another configuration example (when the input signal has one wave) of the frequency calculation circuit in the first embodiment. FIG. 13 is a block diagram showing another configuration example (when the input signal has one wave) of the frequency calculation circuit in the first embodiment. FIG. 11 is a block diagram showing a configuration example (when the input signal has one wave) of a frequency detection circuit according to a second embodiment; FIG. 11 is a diagram showing an example of the behavior of frequency conversion related to f _LO1 by the quadrature mixer in the second embodiment (when the input signal has one wave). FIG. 11 is a diagram showing an example of the behavior of frequency conversion related to f _LO2 by the quadrature mixer in the second embodiment (when the input signal has one wave). FIG. 11 is a diagram showing an example of the behavior of frequency conversion related to f _LO1 by the quadrature mixer in the second embodiment (when the input signal has one wave). FIG. 11 is a diagram showing an example of the behavior of frequency conversion related to f _LO2 by the quadrature mixer in the second embodiment (when the input signal has one wave). FIG. 11 is a block diagram showing a configuration example (when the input signal has one wave) of a frequency detection system according to a third embodiment; 13 is a flowchart showing an example of a setting example of the frequencies of the first LO signal and the second LO signal used in the first frequency detection circuit by the arithmetic circuit in embodiment 3, and the frequencies of the first LO signal and the second LO signal for the second frequency detection circuit.

Hereinafter, the embodiments will be described in detail with reference to the drawings.
Embodiment 1.
FIG. 1 is a block diagram showing an example of the configuration of a frequency detection circuit 1 according to a first embodiment.
The frequency detection circuit 1 is a circuit for detecting the frequency of an input signal, and includes a signal source 11, a mixer 12, a filter 13, and a frequency calculation circuit 14, as shown in FIG.

In FIG. 1, f _RF denotes the frequency of the input signal, and θ _RF denotes the initial phase of the input signal.
1, f _LOi indicates the frequencies of the first LO signal and the second LO signal generated by the signal source 11, θ _{LOi_1} indicates the initial phase of each frequency component included in the first LO signal generated by the signal source 11, and θ _{LOi_2} indicates the initial phase of each frequency component included in the second LO signal generated by the signal source 11. Note that θ _{LOi_1} ≠ θ _{LOi_2} .
Also, in FIG. 1, f _out indicates the frequency of the signal passing through filter 13, θ _out1 indicates the initial phase of the signal based on the first LO signal passing through filter 13, and θ _out2 indicates the initial phase of the signal based on the second LO signal passing through filter 13.
Here, i is 1, 2, . . . , m, and m is an integer of 2 or more.

The signal source 11 is a circuit capable of generating a signal of any signal waveform or any frequency. In the first embodiment, the signal source 11 generates an LO signal having the same frequency (including substantially the same meaning) as the frequency and the same initial phase (including substantially the same meaning) as the initial phase of the signal output by the frequency calculation circuit 14 according to the frequency and initial phase indicated by the signal output by the frequency calculation circuit 14. The LO signals generated by the signal source 11 are a first LO signal and a second LO signal. It is preferable that the first LO signal and the second LO signal each have a plurality of frequency components. The second LO signal is a signal having the same frequency as the first LO signal but a different phase. The LO signal generated by the signal source 11 is switched to the first LO signal or the second LO signal depending on time. Although omitted in FIG. 1, the signal source 11 may generate an LO signal using a control signal or a reference signal input from the outside. The LO signal generated by the signal source 11 is output to the mixer 12.

In this signal source 11, the control terminal is connected to the output terminal of the frequency calculation circuit 14, and the output terminal is connected to the LO terminal of the mixer 12.

As this signal source 11, for example, a DAC (Digital-to-Analog Converter), a DDS (Direct Digital Synthesizer), or a PLL (Phase Locked Loop) circuit is used. In addition, since the first LO signal and the second LO signal have multiple frequency components, a configuration in which multiple PLL circuits and a synthesizer that synthesizes the signals output by the PLL circuits are combined may be used as the signal source 11.

Note that any circuit may be used as the signal source 11 as long as it is capable of generating a signal of any signal waveform or any frequency.

Mixer 12 is a mixer that converts the frequency by mixing two input signals. In embodiment 1, mixer 12 converts the frequency of an input signal by mixing the input signal with an LO signal (first LO signal or second LO signal) output by signal source 11. The mixed signal, which is the signal after frequency conversion by mixer 12, is output to filter 13.

In this mixer 12, an input signal is input to the RF terminal, the LO terminal is connected to the output terminal of the signal source 11, and the IF (Intermediate Frequency) terminal is connected to the input terminal of the filter 13. Note that in this connection, the RF terminal and the LO terminal of the mixer 12 may be connected in reverse.

As this mixer 12, for example, a diode mixer that uses the nonlinearity of diodes to perform mixing, or a switching mixer that uses switching transistors, etc., can be used.

Note that any configuration may be used for the mixer 12 as long as it is capable of converting the frequency by mixing two input signals.

Filter 13 has a predetermined passband and passes signals in the frequency band within the passband among the input signals and suppresses signals in the frequency band outside the passband. In embodiment 1, filter 13 passes signals in the frequency band within the passband among the signals after frequency conversion by mixer 12 and suppresses signals in the frequency band outside the passband and unwanted waves. The signal that has passed through filter 13 is output to frequency calculation circuit 14.

The input terminal of this filter 13 is connected to the IF terminal of the mixer 12, and the output terminal is connected to the input terminal of the frequency calculation circuit 14.

For example, an LPF, a HPF (High Pass Filter), or a BPF (Band Pass Filter) may be used as the filter 13. The filter 13 is implemented using a chip inductor or a chip capacitor. The filter 13 may also be configured using other resonators such as a microstrip or a coaxial resonator depending on the frequency band to be passed or the required amount of suppression.

The frequency calculation circuit 14 is a circuit that calculates the frequency of the input signal based on the phase difference between a signal based on the first LO signal passed through the filter 13 and a signal based on the second LO signal, and based on the phase difference between the first LO signal and the second LO signal generated by the signal source 11. A signal indicating the calculation result by this frequency calculation circuit 14 is output to the outside.
Furthermore, the frequency calculation circuit 14 outputs to the signal source 11 a signal indicating the frequency and initial phase of the first LO signal generated by the signal source 11 and a signal indicating the frequency and initial phase of the second LO signal.

The input terminal of this frequency calculation circuit 14 is connected to the output terminal of the filter 13, and the output terminal is connected to the control terminal of the signal source 11.

FIG. 2 is a block diagram showing an example of the configuration of the frequency calculation circuit 14 according to the first embodiment.
As shown in FIG. 2, the frequency calculation circuit 14 has a quantizer 1401, a first frequency calculation circuit 1402, a phase calculation circuit 1403, a signal source control circuit 1404, a phase difference calculation circuit 1405, a phase comparison circuit 1406, and a second frequency calculation circuit 1407.

Quantizer 1401 is a circuit that quantizes an input signal. In the first embodiment, quantizer 1401 quantizes a signal that has passed through filter 13. The signal quantized by quantizer 1401 is output to first frequency calculation circuit 1402 and phase calculation circuit 1403.

The input terminal of this quantizer 1401 is connected to the output terminal of the filter 13, and the output terminal is connected to the input terminal of the first frequency calculation circuit 1402 and the input terminal of the phase calculation circuit 1403.

For example, an ADC can be used as the quantizer 1401. When an ADC is used as the quantizer 1401, the quantizer 1401 may perform quantization in synchronization with a clock signal input from the outside.
It should be noted that the quantizer 1401 may have any configuration as long as it is capable of quantizing an input signal.

The first frequency calculation circuit 1402 is a circuit that calculates the frequency of an input signal. The first frequency calculation circuit 1402 in the first embodiment calculates the frequency (f _out ) of the signal based on the signal quantized by the quantizer 1401. A signal indicating the frequency calculated by the first frequency calculation circuit 1402 is output to the second frequency calculation circuit 1407.

The input terminal of this first frequency calculation circuit 1402 is connected to the output terminal of the quantizer 1401, and the output terminal is connected to the first input terminal of the second frequency calculation circuit 1407.

This first frequency calculation circuit 1402 can be, for example, a logic circuit (also called a digital circuit) such as an FPGA. When an FPGA is used as the first frequency calculation circuit 1402, the first frequency calculation circuit 1402 calculates the frequency by, for example, arithmetic processing such as FFT (Fast Fourier Transform).

The first frequency calculation circuit 1402 may have any configuration as long as it is capable of calculating the frequency of the input signal.

The first frequency calculation circuit 1402 is capable of calculating the frequency of the input signal. In other words, since the frequency band of the signal input to the first frequency calculation circuit 1402 is within a frequency band expected in advance and there are no problems due to high frequencies, such as with the input signal to the frequency detection circuit 1, the first frequency calculation circuit 1402 can calculate the frequency of the signal using existing technology.

The phase calculation circuit 1403 is a circuit that calculates the initial phase of an input signal, and in the first embodiment, the phase calculation circuit 1403 calculates the initial phase of the signal based on the signal after quantization by the quantizer 1401. The signal indicating the initial phase calculated by this phase calculation circuit 1403 is output to the phase difference calculation circuit 1405.

The input terminal of this phase calculation circuit 1403 is connected to the output terminal of the quantizer 1401, and the output terminal is connected to the first input terminal of the phase difference calculation circuit 1405.

For example, an FPGA can be used as the phase calculation circuit 1403. When an FPGA is used as the phase calculation circuit 1403, the phase calculation circuit 1403 calculates the initial phase by, for example, arithmetic processing such as FFT.

Note that any configuration may be used for the phase calculation circuit 1403 as long as it is capable of calculating the initial phase of the input signal.

The signal source control circuit 1404 outputs to the signal source 11 a signal indicating the frequency (f _LOi ) and initial phase (θ _{LOi_1} ) of the first LO signal generated by the signal source 11, and a signal indicating the frequency (f _LOi ) and initial phase (θ _{LOi_2} ) of the second LO signal.
Moreover, the signal source control circuit 1404 outputs a signal indicating time ( _t0 , _t1 , t) to the phase difference calculation circuit 1405. Here, t is the current time, _t0 is the time when the signal source 11 starts generating the first LO signal, and _t1 is the time when the signal source 11 starts generating the second LO signal.
Furthermore, the signal source control circuit 1404 outputs a signal indicating the phase difference (θ _{LOi — 1} −θ _{LOi — 2} ) between the first LO signal and the second LO signal generated by the signal source 11 to the phase comparison circuit 1406 .

The signal source control circuit 1404 has a first output terminal connected to the control terminal of the signal source 11, a second output terminal connected to the second input terminal of the phase difference calculation circuit 1405, and a third output terminal connected to the second input terminal of the phase comparison circuit 1406.

For example, an FPGA or a memory can be used as the signal source control circuit 1404. Note that the signal source control circuit 1404 may determine f _LOi , θ _{LOi_1} , and θ _{LOi_2} by calculation, or may read data stored in advance in a memory or the like.

Note that the signal source control circuit 1404 may have any configuration as long as it is capable of outputting signals indicating f _LOi and θ _{LOi_1} , signals indicating f _LOi and θ _{LOi_2} , signals indicating t ₀ , t ₁ , and t, and signals indicating θ _{LOi_1} -θ _{LOi_2} .

The phase difference calculation circuit 1405 is a circuit that calculates the phase difference between two signals input at different times. The phase difference calculation circuit 1405 in the first embodiment calculates the phase difference (θ out2 - θ out1 ) from the initial phase calculated by the phase calculation circuit 1403, based on the time (t ₀ , _t ₁ , _t ) indicated by the signal output by the signal source control circuit 1404. The signal indicating the phase difference calculated by this phase difference calculation circuit 1405 is output to the phase comparison circuit 1406.

This phase difference calculation circuit 1405 has a first input terminal connected to the output terminal of the phase calculation circuit 1403, a second input terminal connected to the output terminal of the signal source control circuit 1404, and an output terminal connected to the first input terminal of the phase comparison circuit 1406.

This phase difference calculation circuit 1405 can be configured, for example, by combining a memory that stores signals indicating the time ( _t0 , _t1 , t) and the initial phase (θ _out1 , θ _out2 ), and a logic circuit such as an FPGA that calculates the phase difference based on the time and initial phase indicated by the signal stored in the memory.

Note that the phase difference calculation circuit 1405 may have any configuration as long as it is capable of calculating the phase difference between two signals input at different times.

The phase comparator circuit 1406 specifies a conversion frequency based on the phase difference (θ _out2 - θ _out1 ) calculated by the phase difference calculation circuit 1405 and the phase difference (θ _{LOi_1} - θ _{LOi_2} ) indicated by the signal output by the signal source control circuit 1404. The conversion frequency is a frequency component used for frequency conversion of the input signal among a plurality of frequency components included in the first LO signal and the second LO signal. At this time, the phase comparator circuit 1406 compares the absolute value of the phase difference calculated by the phase difference calculation circuit 1405 with the absolute value of the phase difference indicated by the signal output by the signal source control circuit 1404. Then, the phase comparison circuit 1406 identifies, among the multiple frequency components contained in the first LO signal and the second LO signal, a frequency component where the absolute value of the phase difference calculated by the phase difference calculation circuit 1405 matches (including the meaning of approximately matching) the absolute value of the phase difference indicated by the signal output by the signal source control circuit 1404, as the conversion frequency.

Further, the phase comparison circuit 1406 specifies the sign based on the phase difference (θ _out2 -θ _out1 ) calculated by the phase difference calculation circuit 1405 and the phase difference (θ _{LOi_1} -θ _{LOi_2} ) indicated by the signal output by the signal source control circuit 1404. The sign indicates the direction of phase rotation due to the frequency conversion of the input signal, and indicates f _RF >f _LOi or f _RF <f _LOi . At this time, the phase comparison circuit 1406 compares the sign of the phase difference calculated by the phase difference calculation circuit 1405 with the sign of the phase difference at the conversion frequency. Then, if the signs of both phase differences are the same, the phase comparison circuit 1406 determines that the phase has rotated in the forward direction (f _RF >f _LOi ) due to the frequency conversion of the input signal, and if the signs of both phase differences are different, the phase comparison circuit 1406 determines that the phase has rotated in the reverse direction (f _RF <f _LOi ) due to the frequency conversion of the input signal.

The signal indicating the result of the determination by the phase comparison circuit 1406 is sent to the second frequency calculation circuit 1407.

This phase comparison circuit 1406 has a first input terminal connected to the output terminal of the phase difference calculation circuit 1405, a second input terminal connected to the first output terminal of the signal source control circuit 1404, and an output terminal connected to the second input terminal of the second frequency calculation circuit 1407.

This phase comparison circuit 1406 can be, for example, a combination of an FPGA and a memory. The signal indicating the phase difference output by the signal source control circuit 1404 is stored in advance in the memory.

The phase comparison circuit 1406 may have any configuration as long as it is capable of identifying the conversion frequency and code based on the phase difference calculated by the phase difference calculation circuit 1405 and the phase difference indicated by the signal output by the signal source control circuit 1404.

The second frequency calculation circuit 1407 is a circuit that calculates the frequency (f RF ) of the input signal based on the frequency ( _{f out} ₎ calculated by the first frequency calculation circuit 1402 and the frequency component and sign specified by the phase comparison circuit 1406. A signal indicating the frequency calculated by this second frequency calculation circuit 1407 is output to the outside.

The first input terminal of this second frequency calculation circuit 1407 is connected to the output terminal of the first frequency calculation circuit 1402, and the second input terminal is connected to the output terminal of the phase comparison circuit 1406.

This second frequency calculation circuit 1407 can be, for example, an FPGA.

The second frequency calculation circuit 1407 may have any configuration as long as it is capable of calculating the frequency of the input signal based on the frequency calculated by the first frequency calculation circuit 1402 and the frequency component and code identified by the phase comparison circuit 1406.

Next, an example of the operation of the frequency detection circuit 1 according to the first embodiment shown in FIG. 1 will be described.
Here, for the sake of simplicity, the input signal to the frequency detection circuit 1 is one wave (one frequency component), f _RF = 3 GHz, and θ _RF = 0°. The first LO signal and the second LO signal each contain two frequency components (m = 2). As the signal source 11, two PLL circuits and a synthesizer that synthesizes the signals output by the PLL circuits are used. As the filter 13, f _LO1 = 5 GHz, f _LO2 = 10 GHz, θ _{LO1_1} = 0°, θ _{LO2_1} = 0°, θ _{LO1_2} = 30°, and θ _{LO2_2} = 60° are used. As the frequency calculation circuit 14, the configuration shown in FIG. 2 is used. As the quantizer 1401, an ADC is used. Moreover, FPGAs are used as the first frequency calculation circuit 1402, the phase calculation circuit 1403, the signal source control circuit 1404, and the second frequency calculation circuit 1407. Moreover, FPGAs and memories are used as the phase difference calculation circuit 1405 and the phase comparison circuit 1406. The memories may be memories inside the FPGA or outside the FPGA. Moreover, the ADCs used as the quantizer 1401 are assumed to perform quantization in synchronization with a clock signal input from the outside, and to perform oversampling.

In an example of operation of the frequency detection circuit 1 according to the first embodiment shown in Fig. 1, first, when time is _t0 ≤ t ≤ _t1 , the signal source 11 generates a first LO signal. Here, the signal source 11 generates, as the first LO signal, a signal having a frequency of 5 GHz and an initial phase of 0°, and a signal having a frequency of 10 GHz and an initial phase of 0°. The first LO signal generated by the signal source 11 is output to the mixer 12.

Then, the mixer 12 mixes the input signal with the first LO signal generated by the signal source 11 to convert the frequency of the input signal. The signal after frequency conversion by the mixer 12 using the first LO signal is output to the filter 13.

Next, when the time is _t1 <t≦ _t2 , the signal source 11 generates a second LO signal. Here, the signal source 11 generates, as the second LO signal, a signal having a frequency of 5 GHz and an initial phase of 30°, and a signal having a frequency of 10 GHz and an initial phase of 60°. The second LO signal generated by the signal source 11 is output to the mixer 12.

Then, the mixer 12 frequency-converts the input signal by mixing the input signal with the second LO signal generated by the signal source 11. The signal after frequency conversion by the mixer 12 using the second LO signal is output to the filter 13.

Here, if the frequency of the signal after frequency conversion by the mixer 12 is f _mix1 , f _mix1 is expressed by the following equation (1).
Here, k and l are 0 or positive integers, and α=+1 or −1.
f _mix1 =α(k f _RF ±l f _LOi ) (1)

Furthermore, if the initial phase of the signal after frequency conversion using the first LO signal by mixer 12 is θ _mix1 and the initial phase of the signal after frequency conversion using the second LO signal by mixer 12 is θ _mix2 , θ _mix1 is expressed by the following equation (2), and θ _mix2 is expressed by the following equation (3).
θ _mix1 =α(k·θ _RF ±l·θ _{LOi_1} ) (2)
θ _mix2 =α(k·θ _RF ±l·θ _{LOi_2} ) (3)

Furthermore, here, mixer 12 performs frequency conversion by subtracting the frequency of the LO signal from the frequency of the input signal, i.e., the signs of the second terms on the right-hand sides of equations (1), (2), and (3) are negative.

Next, filter 13, which is an LPF, passes the signal with low frequency components among the signals that have been frequency converted using the first LO signal by mixer 12. Therefore, the frequency of the desired output signal based on the first LO signal that passes through filter 13 is f _out =α(f _RF -f _LO1 ), but according to equation (1), the output signal contains a large number of spurious components.

Next, filter 13, which is an LPF, passes the signal with low frequency components among the signals that have been frequency converted using the second LO signal by mixer 12. Therefore, the frequency of the desired output signal based on the second LO signal that passes through filter 13 is f _out =α(f _RF -f _LO1 ), but according to equation (1), the output signal contains many spurious components.

In the following, for ease of explanation, k=l=1, and the signs of the second terms on the right-hand sides of formulas (1), (2) and (3) are negative. In this case, the following formula (4) holds.
θ _mix2 −θ _mix1 =α (θ _{LOi_1} −θ _{LOi_2} ) (4)

From equation (4), it can be seen that the absolute value of the phase difference between the signal after frequency conversion using the first LO signal by mixer 12 and the signal after frequency conversion using the second LO signal is equal to the absolute value of the phase difference between the first LO signal and the second LO signal. However, care must be taken because the left side of equation (4) is the value obtained by subtracting the initial phase of the signal after frequency conversion using the first LO signal from the initial phase of the signal after frequency conversion using the second LO signal, whereas the right side is the value obtained by subtracting the initial phase of the second LO signal from the initial phase of the first LO signal.

3 is a diagram showing an example of a frequency spectrum of a signal after frequency conversion using the first LO signal by the mixer 12. In FIG. 3, the horizontal axis represents frequency and the vertical axis represents power. Also, reference numeral 301 denotes the passband of the filter 13.
The mixer 12 performs frequency conversion of an input signal having a frequency of 3 GHz and an initial phase of 0° by mixing the input signal with a first LO signal including a signal having a frequency of 5 GHz and an initial phase of 0° and a signal having a frequency of 10 GHz and an initial phase of 0°.

Here, according to equation (1), the mixer 12 frequency-converts an input signal having a frequency of 3 GHz into a signal having a frequency of 2 GHz by using the first LO signal having a frequency of 5 GHz. In this case, α=−1.
Furthermore, from equation (2), in mixer 12, the initial phase of the input signal having a frequency of 3 GHz is 0°, and the initial phase of the first LO signal having a frequency of 5 GHz is 0°, so that the initial phase of the signal having a frequency of 2 GHz after frequency conversion is 0°.

Furthermore, from equation (1), the mixer 12 converts the input signal having a frequency of 3 GHz into a signal having a frequency of 7 GHz by using the first LO signal having a frequency of 10 GHz. In this case, α=−1.
Furthermore, from equation (2), in mixer 12, the initial phase of the input signal having a frequency of 3 GHz is 0°, and the initial phase of the first LO signal having a frequency of 10 GHz is 0°, so that the initial phase of the signal having a frequency of 7 GHz after frequency conversion is 0°.

Then, the filter 13 passes a signal having a frequency of 2 GHz within the pass band of 2.5 GHz, among the signals after frequency conversion by the mixer 12, and suppresses a signal having a frequency of 7 GHz outside the pass band of 2.5 GHz. That is, in this case, f _out =2 GHz, and θ _out1 =0°.

4 is a diagram showing an example of a frequency spectrum of a signal after frequency conversion using the second LO signal by the mixer 12. In FIG. 4, the horizontal axis represents frequency and the vertical axis represents power. Also, reference numeral 401 denotes the pass band of the filter 13.
Mixer 12 performs frequency conversion of an input signal having a frequency of 3 GHz and an initial phase of 0° by mixing the input signal with a second LO signal including a signal having a frequency of 5 GHz and an initial phase of 30° and a signal having a frequency of 10 GHz and an initial phase of 60°.

Here, from equation (1), the mixer 12 converts the input signal having a frequency of 3 GHz into a signal having a frequency of 2 GHz by using the second LO signal having a frequency of 5 GHz. In this case, α=−1.
Furthermore, from equation (3), in mixer 12, the initial phase of the input signal having a frequency of 3 GHz is 0°, and the initial phase of the signal among the second LO signals having a frequency of 5 GHz is 30°, so that the initial phase of the signal having a frequency of 2 GHz after frequency conversion is 30°.

Furthermore, from equation (1), the mixer 12 converts the input signal having a frequency of 3 GHz into a signal having a frequency of 7 GHz by using the second LO signal having a frequency of 10 GHz. In this case, α=−1.
Furthermore, from equation (3), in mixer 12, the initial phase of the input signal having a frequency of 3 GHz is 0°, and the initial phase of the second LO signal having a frequency of 10 GHz is 60°, so that the initial phase of the signal having a frequency of 7 GHz after frequency conversion is 60°.

Then, the filter 13 passes a signal having a frequency of 2 GHz that is within the pass band of 2.5 GHz, among the signals after frequency conversion by the mixer 12, and suppresses a signal having a frequency of 7 GHz that is outside the pass band of 2.5 GHz. That is, in this case, f _out =2 GHz, and θ _out2 =30°.

In this way, the signal based on the first LO signal and the signal based on the second LO signal that have passed through the filter 13 have the same frequency but different initial phases.
The filter 13 is provided to prevent malfunction due to a signal with a large number of frequency components being input to the frequency calculation circuit 14, or to prevent failure due to a signal with a high power frequency component being input.
Since many frequency components other than _fout exist in the signal after frequency conversion by the mixer 12, the passband or implementation method of the filter 13 is determined so that the components other than _fout can be sufficiently suppressed. In this case, the filter 13 may be a BPF or HPF.
Furthermore, in cases where frequency components other than f _out contained in the signal after frequency conversion by the mixer 12 are frequencies other than those at which the frequency calculation circuit 14 can operate, or where the power of these frequency components is low, and so on, the frequency calculation circuit 14 will not malfunction or fail, the filter 13 may be omitted and a through circuit may be used.

As described above, when the time is t ₀ ≦t≦t ₁ , the filter 13 outputs a signal whose frequency is f _out and whose initial phase is θ _out1 due to frequency conversion in the mixer 12 by the first LO signal.
Furthermore, when the time is t ₁ <t≦t ₂ , the filter 13 outputs a signal whose frequency is f _out and whose initial phase is θ _out2 as a result of frequency conversion in the mixer 12 using the second LO signal.

Next, the quantizer 1401 quantizes the analog signal that has passed through the filter 13. The digital signal that is the signal after quantization by the quantizer 1401 is output to the first frequency calculation circuit 1402 and the phase calculation circuit 1403.

Next, the first frequency calculation circuit 1402 calculates the frequency (f _out ) of the signal based on the signal after quantization by the quantizer 1401. A signal indicating the frequency calculated by this first frequency calculation circuit 1402 is output to the second frequency calculation circuit 1407. Here, a signal indicating f _out = 2 GHz is output from the first frequency calculation circuit 1402 to the second frequency calculation circuit 1407.

Then, the phase calculation circuit 1403 calculates the initial phase of the signal based on the signal after quantization by the quantizer 1401. At this time, the phase calculation circuit 1403 calculates the initial phase by FFT, and calculates the initial phase at the start time of monitoring by monitoring the signal for a certain period of time (Δt). Note that Δt is a real number. The signal indicating the initial phase calculated by this phase calculation circuit 1403 is output to the phase difference calculation circuit 1405.

Next, the phase difference calculation circuit 1405 calculates a phase difference (θ out2 - θ out1 ) from the initial phase calculated by the phase calculation circuit 1403 based on the time (t ₀ , t ₁ , t) indicated by the signal output by the signal source control circuit 1404. At this time, the phase difference calculation circuit 1405 first extracts θ _out1 and θ _out2 from the initial phase calculated by the phase calculation circuit 1403 based on the time indicated by the signal output by the signal source control circuit 1404. Then, the phase difference calculation circuit 1405 calculates the phase difference (θ _out2 - _{θ out1} ₎ . A signal indicating the phase difference calculated by this phase difference calculation circuit 1405 is output to the phase comparison circuit 1406. Here, θ _out2 - _{θ out1} ₌ 30° - 0° = 30°.

Fig. 5A is a diagram showing an example of a signal after passing through the filter 13 in the first embodiment, and Fig. 5B is a diagram explaining an example of the operation of the phase calculation circuit 1403. In Fig. 5A, reference numeral 501 indicates an example of a signal based on the first LO signal after passing through the filter 13, and reference numeral 502 indicates an example of a signal based on the second LO signal after passing through the filter 13. Note that the waveform indicated by the dashed line in Fig. 5A indicates a waveform in the case where the signal based on the second LO signal is virtually extended to the period during which the signal based on the first LO signal passes through the filter 13.
5A and 5B, first, the phase difference calculation circuit 1405 extracts θ _out1 from t ₀ and the initial phase calculated by the phase calculation circuit 1403, and stores a signal indicating this θ _out1 in memory. Here, information on Δt is necessary to calculate θ _out1 , and the phase difference calculation circuit 1405 may store this Δt as information in advance in the memory, or may calculate Δt from the time when the signal is input from the phase calculation circuit 1403.
Next, when the time is _t1 , the initial phase changes, so the phase difference calculation circuit 1405 extracts θ _out2 from t ₀ , t ₁ and the initial phase calculated by the phase calculation circuit 1403, and stores a signal indicating θ _out2 in memory.
In addition, when the monitor section in the phase calculation circuit 1403 crosses _t1 , as in the monitor section k in Fig. 5B, the output signal from the filter 13 is discontinuous within the monitor section, and the phase calculation circuit 1403 cannot correctly calculate the initial phase. Therefore, the phase calculation circuit 1403 judges whether the monitor section crosses _t1 , and when it is judged that the monitor section crosses _t1 , it does not calculate the initial phase. That is, the phase calculation circuit 1403 excludes the monitor section including _t1 based on _t1 so as not to use it in the calculation of the initial phase.
Finally, the phase difference calculation circuit 1405 calculates the phase difference (θ _out2 -θ _out1 ) from θ _out1 and θ _out2 stored in the memory. In this case, if a plurality of θ _out1 and a plurality of θ _out2 are stored in the memory, the phase difference calculation circuit 1405 may calculate the average value of each of θ _out1 and θ _out2 , and calculate the phase difference (θ _out2 -θ _out1 ) from the two average values. Alternatively, if a plurality of θ _out1 and a plurality of θ _out2 are stored in the memory, the phase difference calculation circuit 1405 may extract one value each from θ _out1 and θ _out2 , and calculate the phase difference (θ _out2 -θ _out1 ) from the extracted values.

5B illustrates a case where the monitor section starts from t ₀ , but the monitor section may span t _0. In that case, however, the phase difference calculation circuit 1405 does not calculate the initial phase for the monitor section including t ₀ .

Next, the phase comparator circuit 1406 compares the absolute value of the phase difference (θ _out2 - θ _out1 ) calculated by the phase difference calculation circuit 1405 with the absolute value of the phase difference (θ _{LOi_1} - θ _{LOi_2} ) indicated by the signal output by the signal source control circuit 1404, and identifies a conversion frequency which is a frequency component used for frequency conversion of the input signal among a plurality of frequency components contained in the first LO signal and the second LO signal. The signal indicating the frequency component identified by this phase comparator circuit 1406 is output to the second frequency calculation circuit 1407.
Here, θ _out2 - θ _out1 = 30°, θ _{LO1_1} - θ _{LO1_2} = -0° - 30° = -30°, and θ _{LO2_1} - θ _{LO2_2} = 0° - 60° = -60°. In this case, the absolute value of θ _out2 - θ _out1 matches the absolute value of θ _{LO1_1} - θ _{LO1_2} , so the phase comparator circuit 1406 specifies f _LO1 (= 5 GHz) corresponding to θ _{LO1_1} and θ _{LO1_2} as the conversion frequency from among the multiple frequency components included in the first LO signal and the second LO signal.

Furthermore, the phase comparator circuit 1406 compares the sign of the phase difference (θ _out2 - θ _out1 ) calculated by the phase difference calculation circuit 1405 with the sign of the phase difference at the conversion frequency to identify the sign indicating the phase rotation direction due to the frequency conversion of the input signal. The signal indicating the sign identified by this phase comparator circuit 1406 is output to the second frequency calculation circuit 1407.
Here, since the sign of θ _out2 -θ _out1 is different from the sign of θ _{LO1_1} -θ _{LO1_2} , the phase comparator circuit 1406 determines that the phase has rotated in the opposite direction due to frequency conversion of the input signal (f _RF <5 GHz, ie α=-1).

Next, the second frequency calculation circuit 1407 calculates the frequency (f RF ) of the input signal using the following equation (5) based on the frequency (f _out ) calculated by the first frequency calculation circuit 1402 and the frequency component and sign specified by the phase comparison circuit 1406. Note that here, the sign of the second term on the right side of equation (5) is _negative . A signal indicating the frequency calculated by this second frequency calculation circuit 1407 is output to the outside of the frequency detection circuit 1.
Here, based on f _out =2 GHz calculated by the first frequency calculation circuit 1402, and f _LO1 (=5 GHz) and α=-1 determined by the phase comparison circuit 1406, f _RF =3 GHz is calculated as the frequency of the input signal from equation (5).
f _out =α(f _RF ±f _LOi ) (5)

Next, an example of the operation of the frequency detection circuit 1 in the case where the input signal to the frequency detection circuit 1 has two waves (two frequency components) as shown in FIG. 6 will be described.
Here, of the two waves of input signals, one input signal has a frequency of f _RF1 and an initial phase of θ _RF1 , and the other input signal has a frequency of f _RF2 and an initial phase of θ _RF2 . When the input signal has multiple waves, the signal passing through the filter 13 also has multiple waves. Here, the signals based on the first LO signal passing through the filter 13 are two waves, a signal with a frequency of f _OUT1 and an initial phase of θ _{OUT1_1} , and a signal with a frequency of f _OUT2 and an initial phase of θ _{OUT1_2} . Moreover, the signals based on the second LO signal passing through the filter 13 are two waves, a signal with a frequency of f _OUT1 and an initial phase of θ _{OUT2_1} , and a signal with a frequency of f _OUT2 and an initial phase of θ _{OUT2_2} .
For simplicity of explanation, f _RF1 = 3 GHz, θ _RF1 = 0°, f _RF2 = 6 GHz, and θ _RF2 = 0°. The first LO signal and the second LO signal each contain two frequency components (m = 2). Also, f _LO1 = 5 GHz, f _LO2 = 10 GHz, θ _{LO1_1} = 0°, θ _{LO2_1} = 0°, θ _{LO1_2} = 30°, and θ _{LO2_2} = 60°. Other conditions are the same as those in the operation example of the frequency detection circuit 1 when the input signal to the frequency detection circuit 1 is one wave.

In the operation example of the frequency detection circuit 1 according to the first embodiment shown in Fig. 6, first, when the time is _t0 ≤ t ≤ _t1 , the signal source 11 generates a first LO signal. Here, the signal source 11 generates, as the first LO signal, a signal having a frequency of 5 GHz and an initial phase of 0°, and a signal having a frequency of 10 GHz and an initial phase of 0°. The first LO signal generated by the signal source 11 is output to the mixer 12.

Fig. 7 is a diagram showing an example of a frequency spectrum of a signal after frequency conversion using the first LO signal by the mixer 12. In Fig. 7, the horizontal axis is frequency, and the vertical axis is power. Reference numeral 701 indicates the passband of the filter 13. In Fig. 7, a signal with a triangular tip indicates a signal obtained by frequency conversion of an input signal having a frequency of 3 GHz and an initial phase of 0°. In Fig. 7, a signal with a round tip indicates a signal obtained by frequency conversion of an input signal having a frequency of 6 GHz and an initial phase of 0°.
The mixer 12 performs frequency conversion of an input signal having a frequency of 3 GHz and an initial phase of 0° by mixing the input signal with a first LO signal including a signal having a frequency of 5 GHz and an initial phase of 0° and a signal having a frequency of 10 GHz and an initial phase of 0°.
Similarly, mixer 12 frequency-converts an input signal having a frequency of 6 GHz and an initial phase of 0° by mixing the input signal with a first LO signal including a signal having a frequency of 5 GHz and an initial phase of 0° and a signal having a frequency of 10 GHz and an initial phase of 0°.

Here, according to equation (1), the mixer 12 frequency-converts an input signal having a frequency of 3 GHz into a signal having a frequency of 2 GHz by using the first LO signal having a frequency of 5 GHz. In this case, α=−1.
Furthermore, from equation (2), in mixer 12, the initial phase of the input signal having a frequency of 3 GHz is 0°, and the initial phase of the first LO signal having a frequency of 5 GHz is 0°, so that the initial phase of the signal having a frequency of 2 GHz after frequency conversion is 0°.
Similarly, from equation (1), the mixer 12 converts the input signal having a frequency of 6 GHz into a signal having a frequency of 1 GHz by using the first LO signal having a frequency of 5 GHz. In this case, α=+1.
Furthermore, from equation (2), in mixer 12, the initial phase of the input signal having a frequency of 6 GHz is 0°, and the initial phase of the first LO signal having a frequency of 5 GHz is 0°, so that the initial phase of the signal having a frequency of 1 GHz after frequency conversion is 0°.

Furthermore, from equation (1), the mixer 12 converts the input signal having a frequency of 3 GHz into a signal having a frequency of 7 GHz by using the first LO signal having a frequency of 10 GHz. In this case, α=−1.
Furthermore, from equation (2), in mixer 12, the initial phase of the input signal having a frequency of 3 GHz is 0°, and the initial phase of the first LO signal having a frequency of 10 GHz is 0°, so that the initial phase of the signal having a frequency of 7 GHz after frequency conversion is 0°.
Similarly, from equation (1), the mixer 12 frequency-converts an input signal having a frequency of 6 GHz into a signal having a frequency of 4 GHz by using the first LO signal having a frequency of 10 GHz. In this case, α=−1.
Furthermore, from equation (2), in mixer 12, the initial phase of the input signal having a frequency of 6 GHz is 0°, and the initial phase of the first LO signal having a frequency of 10 GHz is 0°, so that the initial phase of the signal having a frequency of 4 GHz after frequency conversion is 0°.

The filter 13 passes signals having frequencies of 2 GHz and 1 GHz that are within the 2.5 GHz pass band among the signals after frequency conversion by the mixer 12, and suppresses signals having frequencies of 7 GHz and 4 GHz that are outside the 2.5 GHz pass band. That is, in this case, f _out1 =1 GHz, θ _{out1_1} =0°, f _out2 =2 GHz, and θ _{out1_2} =0°. Note that, since the magnitude relationship between f _out1 and f _out2 is not defined here, f _out1 =2 GHz, θ _{out1_1} =0°, f _out2 =1 GHz, and θ _{out1_2} =0° may also be used.

Fig. 8 is a diagram showing an example of a frequency spectrum of a signal after frequency conversion using the second LO signal by the mixer 12. In Fig. 8, the horizontal axis is frequency, and the vertical axis is power. Reference numeral 801 indicates the passband of the filter 13. In Fig. 8, a signal with a triangular tip indicates a signal obtained by frequency conversion of an input signal having a frequency of 3 GHz and an initial phase of 0°. In Fig. 8, a signal with a round tip indicates a signal obtained by frequency conversion of an input signal having a frequency of 6 GHz and an initial phase of 0°.
Mixer 12 performs frequency conversion of an input signal having a frequency of 3 GHz and an initial phase of 0° by mixing the input signal with a second LO signal including a signal having a frequency of 5 GHz and an initial phase of 30° and a signal having a frequency of 10 GHz and an initial phase of 60°.
Similarly, mixer 12 frequency converts an input signal having a frequency of 6 GHz and an initial phase of 0° by mixing the input signal with a second LO signal including a signal having a frequency of 5 GHz and an initial phase of 30° and a signal having a frequency of 10 GHz and an initial phase of 60°.

Here, from equation (1), the mixer 12 converts the input signal having a frequency of 3 GHz into a signal having a frequency of 2 GHz by using the second LO signal having a frequency of 5 GHz. In this case, α=−1.
Furthermore, from equation (3), in mixer 12, the initial phase of the input signal having a frequency of 3 GHz is 0°, and the initial phase of the signal among the second LO signals having a frequency of 5 GHz is 30°, so that the initial phase of the signal having a frequency of 2 GHz after frequency conversion is 30°.
Similarly, from equation (1), the mixer 12 frequency-converts an input signal having a frequency of 6 GHz into a signal having a frequency of 1 GHz by using the second LO signal having a frequency of 5 GHz. In this case, α=+1.
Furthermore, from equation (3), in mixer 12, the initial phase of the input signal having a frequency of 6 GHz is 0°, and the initial phase of the second LO signal having a frequency of 5 GHz is 30°, so that the initial phase of the signal having a frequency of 1 GHz after frequency conversion is -30°.

Furthermore, from equation (1), the mixer 12 converts the input signal having a frequency of 3 GHz into a signal having a frequency of 7 GHz by using the second LO signal having a frequency of 10 GHz. In this case, α=−1.
Furthermore, from equation (3), in mixer 12, the initial phase of the input signal having a frequency of 3 GHz is 0°, and the initial phase of the second LO signal having a frequency of 10 GHz is 60°, so that the initial phase of the signal having a frequency of 7 GHz after frequency conversion is 60°.
Similarly, from equation (1), the mixer 12 frequency-converts an input signal having a frequency of 6 GHz into a signal having a frequency of 4 GHz by using the second LO signal having a frequency of 10 GHz. In this case, α=−1.
Furthermore, from equation (3), in mixer 12, the initial phase of the input signal having a frequency of 6 GHz is 0°, and the initial phase of the second LO signal having a frequency of 10 GHz is 60°, so that the initial phase of the signal having a frequency of 4 GHz after frequency conversion is 60°.

Then, the filter 13 passes signals having frequencies of 2 GHz and 1 GHz that are within the 2.5 GHz pass band among the signals after frequency conversion by the mixer 12, and suppresses signals having frequencies of 7 GHz and 4 GHz that are outside the 2.5 GHz pass band. That is, in this case, f _out1 =1 GHz, θ _{out2_1} =-30°, f _out2 =2 GHz, and θ _{out2_2} =30°. Note that, when f _out1 =2 GHz and f _out2 =1 GHz, f _out1 =2 GHz, θ _{out2_1} =30°, f _out2 =1 GHz, and θ _{out2_2} =-30°.

As described above, when the time is _t0 ≦t≦ _t1 , the filter 13 outputs a signal having a frequency _fout1 and an initial phase _{θout1_1} , and a signal having a frequency _fout2 and an initial phase _{θout1_2} , due to frequency conversion in the mixer 12 using the first LO signal.
In addition, when the time is _t1 < t ≦ _t2 , the filter 13 outputs a signal whose frequency is f _out1 and whose initial phase is θ _{out2_1} , and a signal whose frequency is f _out2 and whose initial phase is θ _{out2_2} , due to frequency conversion in the mixer 12 using the second LO signal.

Thereafter, the frequency detection circuit 1 (phase difference calculation circuit 1405) performs the same operation as when the input signal to the frequency detection circuit 1 is one wave, thereby calculating the phase difference (θ _{out2_1} - θ _{out1_1} , θ _{out2_2} - θ _{out1_2} ) between the signals that have passed through the filter 13, as shown in Figure 9.

Next, the phase comparison circuit 1406 compares the absolute value of the phase difference (θ _{out2_1} - θ _{out1_1} , θ _{out2_2} - θ _{out1_2} ) calculated by the phase difference calculation circuit 1405 with the absolute value of the phase difference (θ _{LOi_1} - θ _{LOi_2} ) indicated by the signal output by the signal source control circuit 1404, and identifies a conversion frequency which is a frequency component used for frequency conversion of the input signal among multiple frequency components contained in the first LO signal and the second LO signal. The signal indicating the frequency component identified by this phase comparison circuit 1406 is output to the second frequency calculation circuit 1407.
Here, θ _{out2_1} - θ _{out1_1} = -30°, θ _{out2_2} - θ _{out1_2} = 30°, θ _{LO1_1} - θ _{LO1_2} = -0° - 30° = -30°, and θ _{LO2_1} - θ _{LO2_2} = 0° - 60° = -60°. In this case, since the absolute values of θ _{out2_1} - θ _{out1_1} and θ _{out2_2} - θ _{out1_2} match with the absolute value of θ _{LO1_1} - θ _{LO1_2} , the phase comparison circuit 1406 identifies f _LO1 (= 5 GHz) corresponding to θ _{LO1_1} and θ _{LO1_2} as the conversion frequency among the multiple frequency components contained in the first LO signal and the second LO signal.

Furthermore, the phase comparator circuit 1406 compares the sign of the phase difference (θ _{out2_1} - θ _{out1_1} , θ _{out2_2} - θ _{out1_2} ) calculated by the phase difference calculation circuit 1405 with the sign of the phase difference at the conversion frequency, and specifies the sign indicating the phase rotation direction due to the frequency conversion of the input signal. The signal indicating the sign specified by this phase comparator circuit 1406 is output to the second frequency calculation circuit 1407.
Here, because the signs of θ _{out2_1} -θ _{out1_1} and θ _{LO1_1} -θ _{LO1_2} are the same, the phase comparator circuit 1406 determines that the phase of f _out1 has rotated in the positive direction (f _RF1 ≧5 GHz, i.e., α=+1) due to the frequency conversion of the input signal. Also, because the signs of θ _{out2_2} -θ _{out1_2} and θ _{LO1_1} -θ _{LO1_2} are different, the phase comparator circuit 1406 determines that the phase of f _out2 has rotated in the negative direction (f _RF2 <5 GHz, i.e., α=-1) due to the frequency conversion of the input signal.

Next, the second frequency calculation circuit 1407 calculates the frequency (f RF1 , f RF2 ) of the input _signal using equation (5) based on the frequency (f _out1 , f _out2 ) calculated by the first frequency calculation circuit ₁₄₀₂ and the frequency component and sign specified by the phase comparison circuit 1406. Although not described here, the first frequency calculation circuit 1402 can calculate the frequencies of the signal that has passed through the filter 13 even if it is a plurality of waves by using an operation such as FFT. The signal indicating the frequency calculated by this second frequency calculation circuit 1407 is output to the outside of the frequency detection circuit 1.
Here, based on f _out1 = 1 GHz and f _out2 = 2 GHz calculated by the first frequency calculation circuit 1402, and f _LO1 (= 5 GHz) determined by the phase comparison circuit 1406, the code for f _out1 being α = +1, and the code for f _out2 being α = -1, the frequencies of the input signal are calculated as f _RF1 = 6 GHz and f _RF2 = 3 GHz using equation (5).

Note that in the above, the frequencies of the first LO signal and the second LO signal are 5 GHz and 10 GHz. However, this is not limited thereto, and the frequencies of the first LO signal and the second LO signal may be any value.

In the above description, the first LO signal and the second LO signal each include two frequency components, but the present invention is not limited to this. The first LO signal and the second LO signal each may include one frequency component or three or more frequency components.
In addition, by having two or more frequency components contained in the first LO signal and the second LO signal, it is believed that it becomes easier to enable the mixer 12 to frequency convert at least one of the signals into a signal in a frequency band that can pass through the filter 13, regardless of the frequency of the input signal.
Furthermore, if the first LO signal and the second LO signal each contain one frequency component, the frequency of that frequency component becomes the conversion frequency as is.

In the above description, the phase difference calculation circuit 1405 calculates θ _out2 - θ _out1 as the phase difference. However, this is not limiting, and the phase difference calculation circuit 1405 may calculate θ _out1 - θ _out2 as the phase difference. In this case, however, the phase comparison circuit 1406 compares θ _out1 - θ _out2 with θ _{LOi_2} - θ _{LOi_1} .

In the above description, the filter 13 suppresses high-frequency signals and passes low-frequency signals among the signals after frequency conversion by the mixer 12, and the frequency calculation circuit 14 calculates _fRF from the phase difference. However, the present invention is not limited to this, and the filter 13 may suppress low-frequency signals and pass high-frequency signals among the signals after frequency conversion by the mixer 12, and the frequency calculation circuit 14 may calculate _fRF from the phase difference.
Moreover, the frequency detection circuit 1 may pass signals of both frequency components and calculate f _RF from the phase difference between the respective frequency components.

In the above, a case has been shown in which the mixer 12 is used as a frequency conversion circuit that converts the frequency of the input signal. However, this is not limiting, and a circuit other than a mixer (e.g., a frequency divider, a multiplier, or an S/H (Sample and Hold) circuit, etc.) may be used as the frequency conversion circuit.

In the above, the frequency conversion circuit (the mixer 12 in FIG. 1 and FIG. 6) is provided in one stage, but the present invention is not limited to this and multiple stages of frequency conversion circuits may be provided.
10, the frequency detection circuit 1 may further include a frequency conversion circuit in front of the mixer 12. In this case, the frequency and phase of the RF signal input to the mixer 12 must be the same, and the frequency of the signal passing through the filter 13 must be the same.

10 shows a case where a second mixer 16 is provided as the frequency conversion circuit in the frequency detection circuit 1. Also, in FIG. 10, a second signal source 15 is provided in the frequency detection circuit 1.
10, a frequency calculation circuit 14 outputs a signal indicating the frequency and initial phase of an LO signal generated by a second signal source 15 to the second signal source 15. Then, the second signal source 15 generates an LO signal having the same frequency (including substantially the same meaning) as the frequency and initial phase (including substantially the same meaning) as the initial phase according to the frequency and initial phase indicated by the signal output by the frequency calculation circuit 14. Then, a second mixer 16 mixes an input signal with the LO signal output by the second signal source 15 to frequency convert the input signal.

In this case, the frequency calculation circuit 14 calculates the frequency (f RF ) of the input signal based on the phase difference between the signal based on the first LO signal that has passed through the filter 13 and the signal based on the second LO signal, the phase difference between the first LO signal and the second LO signal generated by the signal source ₁₁ , and the frequency of the LO signal used in the frequency conversion circuit (the second mixer 16 in Figure 10) provided in the preceding stage of the mixer 12.
That is, first, in the same manner as described above, frequency calculation circuit 14 calculates the frequency (f RF ') of the input signal to mixer 12 based on the phase difference between the signal based on the first LO signal passed through filter 13 and the signal based on the second LO signal, and the phase difference between the first LO signal and the second LO signal generated by signal source 11. In this way, frequency calculation circuit 14 can calculate the frequency (f _RF ') of the input signal to mixer 12. Meanwhile, the frequency (f _RF ') of _this signal is the frequency of the signal after frequency conversion by a frequency conversion circuit (second mixer 16 in FIG. 10 ) provided in the stage preceding mixer 12.
Therefore, the frequency calculation circuit 14 performs an inverse frequency conversion on the calculated frequency of the signal based on the calculated frequency of the signal (f _RF ') and the frequency (f _{LO ) of an LO signal used in a frequency conversion circuit (second mixer 16 in FIG. 10 ) provided in front of the mixer 12. This allows the frequency calculation circuit 14 to calculate the frequency (f RF} ₎ of the signal input to the frequency conversion circuit (frequency detection circuit 1).

In the above description, the frequency calculation circuit 14 has the quantizer 1401 quantizing the signal that has passed through the filter 13, and then the digital circuit calculates θ _out2 - θ _out1 . However, the present invention is not limited to this, and the frequency calculation circuit 14 may extract θ _out2 - θ _out1 using an analog circuit and then quantize it, as shown in FIG.

FIG. 11 is a block diagram showing another example of the configuration of the frequency calculation circuit 14 according to the first embodiment.
In the frequency calculation circuit 14 shown in FIG. 11 , compared to the frequency calculation circuit 14 shown in FIG. 2 , the quantizer 1401 and the first frequency calculation circuit 1402 are changed to a first frequency calculation circuit 1408, and the phase calculation circuit 1403 and the phase difference calculation circuit 1405 are changed to a phase difference calculation circuit 1409.

The first frequency calculation circuit 1408 has a first quantizer 1410 and a first calculator 1411.

The first quantizer 1410 quantizes the signal that has passed through the filter 13. The signal quantized by the first quantizer 1410 is output to the first calculator 1411.

The first calculator 1411 performs arithmetic processing such as FFT on the signal quantized by the first quantizer 1410 to calculate the frequency (f _out ) of the quantized signal. A signal indicating the frequency calculated by the first calculator 1411 is output to the second frequency calculation circuit 1407. Note that, for example, an FPGA or the like is used as the first calculator 1411.

The phase difference calculation circuit 1409 has a delay circuit 1412, a mixer 1413, a second quantizer 1414, a memory 1415, and a second calculator 1416.

The delay circuit 1412 delays the signal that has passed through the filter 13. The signal delayed by the delay circuit 1412 is output to the mixer 1413.

The mixer 1413 calculates the phase difference between the signal that has passed through the filter 13 and the signal that has been delayed by the delay circuit 1412 by mixing the two signals. The analog signal indicating the phase difference calculated by the mixer 1413 is output to the second quantizer 1414.

The second quantizer 1414 quantizes the signal indicating the phase difference calculated by the mixer 1413. The digital signal, which is the signal after quantization by the second quantizer 1414, is output to the second calculator 1416. Here, the phase difference calculated by the mixer 1413 is not the value of θ _out2 - θ _out1 itself, but is a value that uniquely corresponds to θ _out2 - θ _out1 .

The memory 1415 pre-stores information indicating the correspondence between the phase difference calculated by the mixer 1413 and θ _out2 −θ _out1 .

The second calculator 1416 reads out θ _out2 - θ _out1 corresponding to the signal quantized by the second quantizer 1414 from the memory 1415. The signal indicating θ _out2 - θ _out1 read out by the second calculator 1416 is output to the phase comparison circuit 1406. Note that, for example, an FPGA or the like is used as the second calculator 1416.

FIG. 12 is a block diagram showing another example of the configuration of the frequency calculation circuit 14 in the first embodiment.
In the frequency calculation circuit 14 shown in FIG. 12, the phase calculation circuit 1403 and the phase difference calculation circuit 1405 are changed to a phase difference calculation circuit 1417 in comparison with the frequency calculation circuit 14 shown in FIG.

The phase difference calculation circuit 1417 includes a delay circuit 1418, a mixer 1419, a memory 1420, and a calculator 1421.

The delay circuit 1418 delays the signal quantized by the quantizer 1401. The signal delayed by the delay circuit 1418 is output to the mixer 1419.

Mixer 1419 calculates the phase difference between the signal quantized by quantizer 1401 and the signal delayed by delay circuit 1418 by mixing them. An analog signal indicating the phase difference calculated by mixer 1419 is output to calculator 1421. Here, the phase difference calculated by mixer 1419 is not the value of θ _out2 - θ _out1 itself, but is a value that uniquely corresponds to θ _out2 - θ _out1 .

The memory 1420 pre-stores information indicating the correspondence between the phase difference calculated by the mixer 1419 and θ _out2 −θ _out1 .

The calculator 1421 reads out θ _out2 - θ _out1 corresponding to the phase difference calculated by the mixer 1419 from the memory 1420. A signal indicating θ _out2 - θ _out1 read out by the calculator 1421 is output to the phase comparison circuit 1406. Note that, for example, an FPGA or the like is used as the calculator 1421.

In the above description, the phase comparator circuit 1406 determines whether the absolute value of θ _out2 -θ _out1 matches the absolute value of θ _{LOi_1} -θ _{LOi_2} to specify the conversion frequency. However, due to variations in circuit performance or noise generated in the circuit, the absolute value of θ _out2 -θ _out1 may not match the absolute value of θ _{LOi_1} -θ _{LOi_2} . In such a case, the phase comparator circuit 1406 may select θ _{LOi_1} -θ _{LOi_2} whose absolute value is closest to the absolute value of θ _out2 -θ _out1 , and specify the corresponding frequency component as the conversion frequency.

Also, consider the case where the frequency of the input signal to the frequency detection circuit 1 is exactly in the middle of the frequencies of any two frequency components in the first LO signal and the second LO signal (hereinafter referred to as event A). In the case of this event A, the signals obtained by frequency-converting the input signal in each of the two frequency components have the same frequency. For example, in the above, the frequencies of the first LO signal and the second LO signal are 5 GHz and 10 GHz, so that when f _RF is 7.5 GHz, the signals obtained by frequency-converting at 5 GHz and at 10 GHz are both 2.5 GHz. In this case, since the phase relationship cannot be expressed by equations (2) and (3), θ _out2 -θ _out1 and θ _{LOi_1} -θ _{LOi_2} are significantly different values. Therefore, in this case, the frequency detection circuit 1 cannot detect the frequency correctly.

Although not shown in the figure, a circuit for monitoring the result of the determination by the phase comparison circuit 1406 may be provided in the frequency detection circuit 1. When the phase comparison circuit 1406 determines that θ _out2 - θ _out1 and θ _{LOi_1} - θ _{LOi_2} are significantly different values, this circuit notifies the outside.
Furthermore, if the phase comparison circuit 1406 determines that θ _out2 - θ _out1 and θ _{LOi_1} - θ _{LOi_2} are significantly different values, at least one of the frequencies of the LO signals may be changed to an arbitrary value, either manually or automatically by the frequency detection circuit 1, and control may be applied to avoid the frequency relationship of event A.

Also, consider a case where the frequency of the input signal to the frequency detection circuit 1 becomes the same as the frequencies of the first LO signal and the second LO signal (hereinafter referred to as event B). In the case of event B, f _out becomes DC (Direct Current). In this case, since there is no phase information, the frequency detection circuit 1 cannot detect f _RF .

In response to this, although not shown in the figure, a circuit for monitoring the calculation results by the first

frequency calculation circuits

1402 and 1408 may be provided in the frequency detection circuit 1. When this circuit determines that the f _out calculated by the first

frequency calculation circuits

1402 and 1408 is DC, it notifies the outside to that effect.
Furthermore, when the above circuit determines that the f _out calculated by the first

frequency calculation circuits

1402, 1408 is DC, at least one of the frequencies of the LO signals may be changed to an arbitrary value manually or automatically by the frequency detection circuit 1, and control may be applied to avoid the frequency relationship of event B.

As described above, according to the first embodiment, the frequency detection circuit 1 includes a frequency conversion circuit that converts the frequency of an input signal using two LO signals that are switched over time, a first LO signal and a second LO signal that has the same frequency but a different phase from the first LO signal, and a frequency calculation circuit 14 that calculates the frequency of the input signal based on the phase difference between the signal after frequency conversion using the first LO signal by the frequency conversion circuit and the signal after frequency conversion using the second LO signal, and the phase difference between the first LO signal and the second LO signal. This makes it possible for the frequency detection circuit 1 according to the first embodiment to detect the frequency without increasing the circuit size, regardless of the frequency of the input signal.

Embodiment 2.
In the frequency detection circuit 1 according to the first embodiment, in the case of a frequency relationship that results in event A, it takes time to detect the correct f _RF because it cannot detect f _RF correctly, or after it is determined that f RF cannot be detected, f _LOi is changed so as to avoid the _frequency relationship that results in event A. In contrast, in the frequency detection circuit 1 according to the second embodiment, a quadrature mixer is used as the mixer, and an image component is suppressed, so that the correct f _RF can be detected even if event A occurs.

FIG. 13 is a block diagram showing a configuration example of a frequency detection circuit 1 according to embodiment 2. In the frequency detection circuit 1 according to embodiment 2 shown in FIG. 13, the mixer 12 in the frequency detection circuit 1 according to embodiment 1 shown in FIG. 1 is changed to a quadrature mixer 17. The other configuration examples of the frequency detection circuit 1 according to embodiment 2 shown in FIG. 13 are similar to the configuration example of the frequency detection circuit 1 according to embodiment 1 shown in FIG. 1, so the same reference numerals are used and the description thereof is omitted.

The orthogonal mixer 17 is a mixer that converts the frequency by mixing two input signals while suppressing the image component. This mixer is also called an image rejection mixer or IRM (Image Rejection Mixer). The orthogonal mixer 17 in the second embodiment converts the frequency of the input signal by mixing the input signal with the LO signal (first LO signal or second LO signal) output by the signal source 11, while suppressing the input signal that exists at either a higher or lower frequency than the frequency of the frequency component contained in the LO signal (first LO signal or second LO signal). The signal after frequency conversion by the orthogonal mixer 17 is output to the filter 13.

This quadrature mixer 17 has an RF terminal to which an input signal is input, an LO terminal connected to the output terminal of the signal source 11, and an IF terminal connected to the input terminal of the filter 13. Note that in this connection, the RF terminal and the LO terminal of the quadrature mixer 17 may be connected in reverse.

This quadrature mixer 17 can be, for example, a combination of a diode mixer that uses the nonlinearity of diodes to perform mixing, and a 90° phase shifter.

The quadrature mixer 17 may have any configuration as long as it can convert the frequency by mixing the two input signals while suppressing the image component.

Next, an example of the operation of the frequency detection circuit 1 according to the second embodiment shown in FIG. 13 will be described.
Here, only the operation in the case of the frequency relationship resulting in event A will be described. In addition, among the operation examples of the frequency detection circuit 1 according to the second embodiment, the operation examples other than the quadrature mixer 17 are similar to the operation examples of the frequency detection circuit 1 according to the first embodiment, and therefore the description thereof will be omitted.
Here, for the sake of simplicity, the input signal to the frequency detection circuit 1 is one wave (one frequency component), f _RF = 7.5 GHz, and θ _RF = 0°. The first LO signal and the second LO signal each contain two frequency components (m = 2). As the signal source 11, two PLL circuits and a synthesizer that synthesizes the signals output by the PLL circuits are used. As the filter 13, f _LO1 = 5 GHz, f _LO2 = 10 GHz, θ _{LO1_1} = 0°, θ _{LO2_1} = 0°, θ _{LO1_2} = 30°, and θ _{LO2_2} = 60° are used. As the filter 13, an LPF with a passband of 3 GHz is used. Here, the quadrature mixer 17 converts the frequency of the input signal while suppressing the input signal that exists at a frequency lower than the frequencies of the first LO signal and the second LO signal.

13, the quadrature mixer 17 mixes an input signal with an LO signal (first LO signal or second LO signal) output by the signal source 11 to convert the frequency of the input signal, while suppressing an input signal that exists at a frequency lower than the frequency of the frequency component contained in the LO signal (first LO signal or second LO signal). The signal after frequency conversion by the quadrature mixer 17 is output to the filter 13.
The detailed circuit configuration of the quadrature mixer 17 and the operation principle of suppression are well known to those skilled in the art and are not directly related to the present disclosure, so a detailed description thereof will be omitted.

14 is a diagram showing an example of the behavior of frequency conversion related to f _LO1 by the quadrature mixer 17. In FIG. 14, the horizontal axis represents frequency and the vertical axis represents power. Also, reference numeral 1401 denotes the passband of the filter 13.
In Fig. 14, the quadrature mixer 17 mixes an input signal having a frequency of 7.5 GHz and an initial phase of 0° with a signal having a frequency of 5 GHz and an initial phase of 0° among the frequency components contained in the first LO signal, thereby converting the frequency of the input signal. Here, since f _RF (7.5 GHz) is a higher frequency than f _LO1 (5 GHz), in the frequency conversion by f _LO1 , the quadrature mixer 17 outputs the signal after frequency conversion without suppressing it. In this case, according to the formula (2), the initial phase of the signal having a frequency of 2.5 GHz after frequency conversion is 0°.

15 is a diagram showing an example of the behavior of frequency conversion related to f _LO2 by the quadrature mixer 17. In FIG. 15, the horizontal axis represents frequency, and the vertical axis represents power. Also, reference numeral 1501 represents the passband of the filter 13.
15 , quadrature mixer 17 mixes an input signal having a frequency of 7.5 GHz and an initial phase of 0° with a signal having a frequency of 10 GHz and an initial phase of 0° among frequency components contained in the first LO signal, thereby converting the frequency of the input signal. Here, since f _RF (7.5 GHz) is a lower frequency than f _LO2 (10 GHz), in frequency conversion using f _LO2 , quadrature mixer 17 suppresses and outputs the signal after frequency conversion.

14 and 15, the signal having a frequency of 2.5 GHz after frequency conversion by the quadrature mixer 17 is the input signal frequency-converted by a signal having a frequency f _LO1 (5 GHz) among the frequency components contained in the first LO signal.

16 is a diagram showing an example of the behavior of frequency conversion related to f _LO1 by the quadrature mixer 17. In FIG. 16, the horizontal axis represents frequency, and the vertical axis represents power. Also, reference numeral 1601 represents the passband of the filter 13.
16, the quadrature mixer 17 mixes an input signal having a frequency of 7.5 GHz and an initial phase of 0° with a signal having a frequency of 5 GHz and an initial phase of 30° among frequency components contained in the second LO signal, thereby converting the frequency of the input signal. Here, since f _RF (7.5 GHz) is a higher frequency than f _LO1 (5 GHz), in the frequency conversion by f _LO1 , the quadrature mixer 17 outputs the signal after frequency conversion without suppressing it. In this case, according to the formula (3), the initial phase of the signal having a frequency of 2.5 GHz after frequency conversion is −30°.

17 is a diagram showing an example of the behavior of frequency conversion related to f _LO2 by the quadrature mixer 17. In FIG. 17, the horizontal axis represents frequency, and the vertical axis represents power. Also, reference numeral 1701 represents the passband of the filter 13.
17 , quadrature mixer 17 mixes an input signal having a frequency of 7.5 GHz and an initial phase of 0° with a signal having a frequency of 10 GHz and an initial phase of 60° among frequency components contained in the second LO signal, thereby converting the frequency of the input signal. Here, since f _RF (7.5 GHz) is a lower frequency than f _LO2 (10 GHz), in frequency conversion using f _LO2 , quadrature mixer 17 suppresses and outputs the signal after frequency conversion.

16 and 17, the signal having a frequency of 2.5 GHz after frequency conversion by the quadrature mixer 17 is the input signal frequency-converted by a signal having a frequency f _LO1 (5 GHz) among the frequency components contained in the second LO signal.

Furthermore, the signals that have passed through the filter 13 have the same frequency but different initial phases.
Here, the signal based on the first LO signal that has passed through the filter 13 has a frequency of 2.5 GHz and an initial phase of 0°. Also, the signal based on the second LO signal that has passed through the filter 13 has a frequency of 2.5 GHz and an initial phase of −30°.
Then, the frequency calculation circuit 14 performs the same operation as that described in the first embodiment to calculate f _RF =7.5 GHz as the frequency of the input signal.

In the above, the quadrature mixer 17 has been described as suppressing an input signal that exists at a lower frequency than the first LO signal and the second LO signal while converting the frequency of the input signal. However, this is not limited thereto, and the quadrature mixer 17 may suppress an input signal that exists at a higher frequency than the first LO signal and the second LO signal while converting the frequency of the input signal.

As described above, according to the second embodiment, the frequency conversion circuit is a quadrature mixer 17 that converts the frequency of an input signal by using the first LO signal and the second LO signal, and suppresses the image component of the signal after the frequency conversion. As a result, the frequency detection circuit 1 according to the second embodiment can obtain the same effect as the frequency detection circuit 1 according to the first embodiment. In addition, the frequency detection circuit 1 according to the second embodiment can correctly detect f _RF even when the frequency relationship of the event A occurs by using a quadrature mixer as the mixer and suppressing the image component. As a result, the frequency detection circuit 1 according to the second embodiment can improve the reliability of frequency detection.

Embodiment 3.
In the frequency detection circuit 1 according to the first embodiment, in the case of a frequency relationship resulting in events A and B, it takes time to detect the correct f _RF because it cannot detect f _{RF correctly, or after it is determined that f RF} _cannot be detected, f _LOi is changed so as to avoid the frequency relationship resulting in events A and B. In contrast, in the frequency detection system according to the third embodiment, two frequency detection circuits 1 are used, and the LO signals used in the respective frequency detection circuits 1 are set to different frequencies, thereby making it possible to detect the correct f _RF by avoiding events A and B in at least one of the frequency detection circuits 1.

FIG. 18 is a block diagram illustrating a configuration example of a frequency detection system according to the third embodiment.
The frequency detection system includes a first frequency detection circuit 1 - 1 , a second frequency detection circuit 1 - 2 , a determination circuit 2 , and an arithmetic circuit 3 .

In FIG. 18, f _2LOi indicates the frequencies of the first LO signal and the second LO signal generated by the signal source 11-2, θ _{2LOi_1} indicates the initial phase of each frequency component contained in the first LO signal generated by the signal source 11-2, and θ _{2LOi_2} indicates the initial phase of each frequency component contained in the second LO signal generated by the signal source 11-2.
Also, in FIG. 18, f _2out indicates the frequency of the signal passing through filter 13-2, θ _2out1 indicates the initial phase of the signal based on the first LO signal passing through filter 13-2, and θ _2out2 indicates the initial phase of the signal based on the second LO signal passing through filter 13-2.

The first frequency detection circuit 1-1 is a circuit that detects the frequency of the input signal. A signal indicating the frequency detected by this first frequency detection circuit 1-1 is output to the judgment circuit 2.

This first frequency detection circuit 1-1 (frequency calculation circuit 14-1) has a control terminal connected to the first output terminal of the calculation circuit 3, and an output terminal connected to the first input terminal of the judgment circuit 2.

The frequency detection circuit 1 according to the first embodiment can be used as this first frequency detection circuit 1-1.
That is, in the first frequency detection circuit 1-1, the signal source 11-1 is the same as the signal source 11, the mixer 12-1 is the same as the mixer 12, the filter 13-1 is the same as the filter 13, and the frequency calculation circuit 14-1 is the same as the frequency calculation circuit .

The second frequency detection circuit 1-2 is a circuit that detects the frequency of the input signal. The frequencies of the first LO signal and the second LO signal used in the second frequency detection circuit 1-2 are different from the frequencies of the first LO signal and the second LO signal used in the first frequency detection circuit 1-1. A signal indicating the frequency detected by this second frequency detection circuit 1-2 is output to the determination circuit 2.

This second frequency detection circuit 1-2 (frequency calculation circuit 14-2) has a control terminal connected to the second output terminal of the calculation circuit 3, and an output terminal connected to the second input terminal of the judgment circuit 2.

The frequency detection circuit 1 according to the first embodiment can be used as the second frequency detection circuit 1-2.
That is, in the second frequency detection circuit 1-2, the signal source 11-2 is the same as the signal source 11, the mixer 12-2 is the same as the mixer 12, the filter 13-2 is the same as the filter 13, and the frequency calculation circuit 14-2 is the same as the frequency calculation circuit 14.

The determination circuit 2 is a circuit that identifies the correct frequency from among the frequencies detected by the first frequency detection circuit 1-1 and the second frequency detection circuit 1-2.

This determination circuit 2 has a first input terminal connected to the output terminal of the first frequency detection circuit 1-1 (frequency calculation circuit 14-1) and a second input terminal connected to the output terminal of the second frequency detection circuit 1-2 (frequency calculation circuit 14-2).
The determination circuit 2 may be, for example, an FPGA.

The arithmetic circuit 3 calculates f _LOi and f _2LOi so as to avoid the frequency relationship resulting in event A and event B. A signal indicating f _LOi calculated by this arithmetic circuit 3 is output to the signal source 11-1 via a frequency calculation circuit 14-1. In addition, a signal indicating f _2LOi calculated by the arithmetic circuit 3 is output to the signal source 11-2 via a frequency calculation circuit 14-2.

The first output terminal of this calculation circuit 3 is connected to the control terminal of the first frequency detection circuit 1-1 (frequency calculation circuit 14-1), and the second output terminal is connected to the control terminal of the second frequency detection circuit 1-2 (frequency calculation circuit 14-2).

The arithmetic circuit 3 can be, for example, a computer consisting of a CPU (Central Processing Unit) and memory, a microcomputer, or an FPGA.

Any type of arithmetic circuit may be used as the arithmetic circuit 3 as long as it is configured to execute the determination flow of f _LOi and f _2LOi shown below.

Note that FIG. 18 shows a case where the arithmetic circuit 3 is provided inside the frequency detection system. However, this is not limiting, and the arithmetic circuit 3 may be provided outside the frequency detection system.

Next, an operation example of the frequency detection system according to the third embodiment shown in FIG. 18 will be described.
Here, only the operation in the case of the frequency relationship resulting in the events A and B will be described.
Moreover, the frequency calculation circuit 14-1 and the frequency calculation circuit 14-2 have the configuration shown in FIG.

Here, in one of the first frequency detection circuit 1-1 and the second frequency detection circuit 1-2, when the frequency relationship of event A and event B occurs, the one frequency detection circuit 1 cannot correctly detect f _RF . In contrast, in the other frequency detection circuit 1, the frequencies of the first LO signal and the second LO signal used for frequency conversion are different from the frequencies of the first LO signal and the second LO signal used in the one frequency detection circuit 1 that cannot correctly detect f _RF . Therefore, the other frequency detection circuit 1 can avoid the frequency relationship of event A or event B and can correctly detect f _RF .
Events A and B occur when there is a certain combination of the frequency of the input signal and the frequencies of the first LO signal and the second LO signal. In contrast, in the two frequency detection circuits 1, the frequency of the input signal does not change and the frequencies of the first LO signal and the second LO signal are different. Therefore, when the above relationship is satisfied in one frequency detection circuit 1, the above relationship is not satisfied in the other frequency detection circuit 1.

Therefore, the determination circuit 2 identifies the correct frequency (f _RF ) from the frequency detected by the first frequency detection circuit 1-1 and the frequency detected by the second frequency detection circuit 1-2.
At this time, for example, the judgment circuit 2 first compares the frequency detected by the first frequency detection circuit 1-1 with the frequency detected by the second frequency detection circuit 1-2. If the two frequencies are the same (including the meaning of approximately the same), the judgment circuit 2 judges that both frequencies are correct. On the other hand, if the two frequencies are different, the judgment circuit 2 judges whether the frequency is within the correct frequency range and selects the correct frequency.

Even if one of the first frequency detection circuit 1-1 and the second frequency detection circuit 1-2 has a frequency relationship corresponding to the event A or the event B, the detected frequency may be correct.
In response to this, the judgment circuit 2 may use the phase difference (θ _out2 - θ _out1 ) calculated by the first frequency detection circuit 1-1 and the phase difference (θ _{LOi_1} - θ _{LOi_2} ) at the specified conversion frequency, as well as the phase difference (θ _2out2 - θ _2out1 ) calculated by the second frequency detection circuit 1-2 and the phase difference (θ _{2LOi_1} - θ _{2LOi_2} ) at the specified conversion frequency, to judge the validity of the frequency (f _RF ) detected by the first frequency detection circuit 1-1 and the frequency (f _RF ) detected by the second frequency detection circuit 1-2. In this case, for example, if the judgment circuit 2 determines that the difference between the phase difference (θ _out2 - θ _out1 ) calculated by the first frequency detection circuit 1-1 and the phase difference (θ _{LOi_1} - θ _{LOi_2} ) at the identified conversion frequency is less than or equal to a threshold value, it determines that the frequency calculated by the first frequency detection circuit 1-1 is correct, and if it determines that the difference is greater than the threshold value, it determines that the frequency calculated by the first frequency detection circuit 1-1 is incorrect. Similarly, if the judgment circuit 2 determines that the difference between the phase difference (θ _2out2 - θ _2out1 ) calculated by the second frequency detection circuit 1-2 and the phase difference (θ _{2LOi_1} - θ _{2LOi_2} ) at the specified conversion frequency is equal to or smaller than a threshold value, it determines that the frequency calculated by the second frequency detection circuit 1-2 is correct, and if it determines that the difference is greater than the threshold value, it determines that the frequency calculated by the second frequency detection circuit 1-2 is incorrect. Then, the judgment circuit 2 selects only the frequencies that it has determined to be correct based on the above judgment results.

In addition, in both the first frequency detection circuit 1-1 and the second frequency detection circuit 1-2, f _RF cannot be detected correctly when the frequency relationship of event A or event B occurs. For this reason, in the third embodiment, it is necessary to set f _LOi and f _2LOi so as to avoid the frequency relationship of event A or event B.

FIG. 19 is a flowchart showing an example of a procedure for setting f _LOi and f _2LOi by the arithmetic circuit 3 according to the third embodiment shown in FIG.
Here, the frequency detection range in the first frequency detection circuit 1-1 and the frequency detection range in the second frequency detection circuit 1-2 are from _fmin to _fmax .

In the procedure for setting f _LOi and f _2LOi by the arithmetic circuit 3 in the third embodiment shown in FIG. 18, first, as shown in FIG. 19, for example, the arithmetic circuit 3 sets f _LOi (step ST1901).

Next, the arithmetic circuit 3 calculates f _RF where f _out becomes DC in the range from f _min to f _max from f _LOi set in step ST1901 (step ST1902). Note that there are a plurality of values of f _RF .

Next, arithmetic circuit 3 sets f _2LOi (step ST1903).

Next, the arithmetic circuit 3 calculates _fRF from _f2LOi set in step ST1903, at which _f2out becomes DC in the range from _fmin to _fmax (step ST1904). Note that there are a plurality of values of _fRF .

Next, arithmetic circuit 3 compares f _RF calculated in step ST1902 with f _RF calculated in step ST1904 to determine whether or not they have the same value (step ST1905).
If it is determined in step ST1905 that there is no _fRF with the same value, the sequence proceeds to step ST1906.
On the other hand, if in step ST1905 arithmetic circuit 3 determines that there is f _RF with the same value, the sequence returns to step ST1903, and arithmetic circuit 3 sets f _2LOi to a value other than the value previously set in step ST1903.

Next, the arithmetic circuit 3 calculates a combination of f _RF that is exactly in the middle between any two f _LOi using the f _LOi set in step ST1901 (step ST1906). For example, when m=3, f _LO1 =3 GHz, f _LO2 =7 GHz, and f _LO3 =9 GHz, f _RF =5 GHz, f _RF =6 GHz, and f _RF =8 GHz are exactly in the middle between any two f _LOi .

Next, the arithmetic circuit 3 calculates a combination of f _RF that is exactly in the middle between any two f ₂ _{LO i} using the f 2 LO i set in step ST1903 (step ST1907). For example, when n=3, f _{2 LO i} =4 GHz, f _{2 LO i} =8 GHz, and f _{2 LO i} =10 GHz, f _RF =6 GHz, f _RF =7 GHz, and f _RF =9 GHz are exactly in the middle between any two f _{2 LO i} .

Next, the arithmetic circuit 3 compares the calculation result in step ST1906 with the calculation result in step ST1907, and judges whether or not there is the same combination of _fRF (step ST1908).
In step ST1908, if the arithmetic circuit 3 determines that there is no identical combination, the sequence ends. After that, the arithmetic circuit 3 outputs a signal indicating f _LOi to the first frequency detection circuit 1-1 (frequency calculation circuit 14-1) and outputs a signal indicating f _2LOi to the second frequency detection circuit 1-2 (frequency calculation circuit 14-2).
Thereafter, frequency calculation circuit 14-1 outputs f _LOi to signal source 11-1, and signal source 11-1 sets the frequency of the LO signal it generates to f _LOi .
Similarly, frequency calculation circuit 14-2 outputs f _2LOi to signal source 11-2, and signal source 11-2 sets the LO signal it generates to f _2LOi .

On the other hand, if the arithmetic circuit 3 determines in step ST1908 that the same combination exists, the sequence proceeds to step ST1909.
Next, the arithmetic circuit 3 judges whether or not f _2LOi can be set to a value other than the f _2LOi set in the previous flow (step ST1909). At this time, the arithmetic circuit 3 makes the above judgment while taking into consideration the f _2LOi set in the previous flow and the frequency setting range of the signal source 11-2.
If the arithmetic circuit 3 determines in step ST1909 that _f2LOi can be set to another value within the frequency setting range, the sequence returns to step ST1903, and the arithmetic circuit 3 sets _f2LOi to another value.
On the other hand, if in step ST1909 the arithmetic circuit 3 determines that f _2LOi cannot be set to another value within the frequency setting range, the sequence returns to step ST1901, and the arithmetic circuit 3 sets f _LOi to a value other than the previously set value.

In the above, the first frequency detection circuit 1-1 uses the mixer 12-1, and the second frequency detection circuit 1-2 uses the mixer 12-2.
However, the present invention is not limited to this, and the second embodiment may be applied to the third embodiment, so that the first frequency detection circuit 1-1 uses the quadrature mixer 17-1, and the second frequency detection circuit 1-2 uses the quadrature mixer 17-2. In this case, the processes in steps ST1906 to ST1909 in the flowchart shown in FIG. 19 are not required.

As described above, according to the third embodiment, the frequency detection system includes a first frequency detection circuit 1-1 that has the same configuration as the frequency detection circuit 1 and detects the frequency of an input signal, a second frequency detection circuit 1-2 that has the same configuration as the frequency detection circuit 1 and detects the frequency of an input signal using a first LO signal and a second LO signal that are different in frequency from the frequencies of the first LO signal and the second LO signal used in the first frequency detection circuit 1-1, and a determination circuit 2 that specifies the correct frequency of the input signal based on the frequency of the input signal detected by the first frequency detection circuit 1-1 and the frequency of the input signal detected by the second frequency detection circuit 1-2. As a result, the frequency detection system according to the third embodiment can obtain the same effect as the frequency detection circuit 1 of the first embodiment. In addition, in the frequency detection system according to the third embodiment, two frequency detection circuits 1 are used, and the LO signals input to the frequency conversion circuits in the respective frequency detection circuits 1 are set to different frequencies, so that even if one of the frequency detection circuits 1 has a frequency relationship of event A or event B, the other frequency detection circuit 1 can correctly detect f _RF . As a result, in the frequency detection system according to the third embodiment, the reliability of frequency detection can be improved.

Furthermore, it is possible to freely combine the embodiments, modify any of the components in each embodiment, or omit any of the components in each embodiment.

The frequency detection circuit disclosed herein is capable of detecting the frequency of an input signal without increasing the circuit size, regardless of the frequency of the input signal, and is suitable for use in frequency detection circuits that detect the frequency of an input signal.

1 Frequency detection circuit, 1-1 First frequency detection circuit, 1-2 Second frequency detection circuit, 2 Judgment circuit, 3 Arithmetic circuit, 11 Signal source, 12 Mixer, 13 Filter, 14 Frequency calculation circuit, 15 Second signal source, 16 Second mixer, 17 Quadrature mixer, 1401 Quantizer, 1402 First frequency calculation circuit, 1403 Phase calculation circuit, 1404 Signal source control circuit, 1405 Phase difference calculation circuit, 1406 phase comparison circuit, 1407 second frequency calculation circuit, 1408 first frequency calculation circuit, 1409 phase difference calculation circuit, 1410 first quantizer, 1411 first calculator, 1412 delay circuit, 1413 mixer, 1414 second quantizer, 1415 memory, 1416 second calculator, 1417 phase difference calculation circuit, 1418 delay circuit, 1419 mixer, 1420 memory, 1421 calculator.

Claims

a frequency conversion circuit that converts the frequency of an input signal by using two LO signals that are switched over with time, a first LO signal and a second LO signal that has the same frequency as the first LO signal but a different phase from the first LO signal;
a frequency calculation circuit that calculates a frequency of the input signal based on a phase difference between a signal after frequency conversion using a first LO signal by the frequency conversion circuit and a signal after frequency conversion using a second LO signal, and a phase difference between the first LO signal and the second LO signal.
the first LO signal and the second LO signal each include a plurality of frequency components;
2. The frequency detection circuit according to claim 1, wherein the frequency calculation circuit identifies a conversion frequency, which is a frequency component used in the frequency conversion of the input signal among frequency components contained in the first LO signal and the second LO signal, and a sign indicating a phase rotation direction due to the frequency conversion of the input signal, based on a phase difference between a signal after frequency conversion using a first LO signal by the frequency conversion circuit and a signal after frequency conversion using a second LO signal, and a phase difference between the first LO signal and the second LO signal, calculates a frequency of the signal after frequency conversion by the frequency conversion circuit, and calculates the frequency of the input signal based on the conversion frequency, the sign, and the frequency.
3. The frequency detection circuit according to claim 2, wherein the frequency calculation circuit identifies, as the conversion frequency, a frequency component among the frequency components contained in the first LO signal and the second LO signal, where an absolute value of a phase difference between a signal after frequency conversion using the first LO signal by the frequency conversion circuit and a signal after frequency conversion using the second LO signal matches an absolute value of a phase difference between the first LO signal and the second LO signal.
The frequency calculation circuit calculates f RF, which is the frequency of the input signal, from the following equation (1): where a conversion frequency is f LOi and a frequency of a signal after frequency conversion by the frequency conversion circuit is f out , if a sign of a phase difference between a signal after frequency conversion using a first LO signal by the frequency conversion circuit and a signal after frequency conversion using a second LO signal matches a sign of the phase difference at the conversion frequency, and if a sign of a phase difference between a signal after frequency conversion using a first LO signal by the frequency conversion circuit and a signal after frequency conversion using a second LO signal does not match a sign of the phase difference at the conversion frequency, the frequency calculation circuit calculates f RF , which is the frequency of the input signal, from the following equation (1):
f out =α(f RF ±f LOi ) (1)
a signal source that generates a first LO signal and a second LO signal in response to the signal output by the frequency calculation circuit;
the frequency calculation circuit outputs to the signal source a signal indicating a frequency and an initial phase of a first LO signal and a signal indicating a frequency and an initial phase of a second LO signal;
2. The frequency detection circuit according to claim 1, wherein the frequency conversion circuit uses a first LO signal and a second LO signal generated by the signal source.
6. The frequency detection circuit according to claim 1, wherein the frequency conversion circuit is a quadrature mixer that converts the frequency of the input signal by using a first LO signal and a second LO signal, respectively, and suppresses an image component of the signal after the frequency conversion.
A first frequency detection circuit having the same configuration as the frequency detection circuit according to any one of claims 1 to 6, which detects a frequency of an input signal;
a second frequency detection circuit having the same configuration as the frequency detection circuit according to any one of claims 1 to 6, and configured to detect a frequency of the input signal by using a first LO signal and a second LO signal having frequencies different from those of a first LO signal and a second LO signal used in the first frequency detection circuit;
a determination circuit that identifies a correct frequency of the input signal based on the frequency of the input signal detected by the first frequency detection circuit and the frequency of the input signal detected by the second frequency detection circuit.
8. The frequency detection system according to claim 7, wherein the determination circuit determines a correct frequency of the input signal based on a phase difference at a conversion frequency determined by the first frequency detection circuit and a phase difference at a conversion frequency determined by the second frequency detection circuit.