WO2024099124A1 - 充电控制方法、装置及电子设备 - Google Patents

充电控制方法、装置及电子设备 Download PDF

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Publication number
WO2024099124A1
WO2024099124A1 PCT/CN2023/127461 CN2023127461W WO2024099124A1 WO 2024099124 A1 WO2024099124 A1 WO 2024099124A1 CN 2023127461 W CN2023127461 W CN 2023127461W WO 2024099124 A1 WO2024099124 A1 WO 2024099124A1
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Prior art keywords
value
flag bit
charging
stage
voltage
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PCT/CN2023/127461
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English (en)
French (fr)
Inventor
姚成伟
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维沃移动通信有限公司
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Application filed by 维沃移动通信有限公司 filed Critical 维沃移动通信有限公司
Publication of WO2024099124A1 publication Critical patent/WO2024099124A1/zh

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M10/00—Secondary cells; Manufacture thereof
    • H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
    • H01M10/44—Methods for charging or discharging
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/10—Energy storage using batteries

Definitions

  • the present application belongs to the field of communication technology, and specifically relates to a charging control method, device and electronic equipment.
  • an analog-to-digital converter (ADC) module is needed to detect the changes in the external signal in order to control the process of different charging stages.
  • a voltage divider network is constructed by pull-up resistors R1 and pull-down resistors R2.
  • the voltage divider network is connected to the general purpose input and output (GPIO) interface of the system IC (this interface has ADC function) to provide power supply for the system IC.
  • GPIO general purpose input and output
  • the hardware of the system IC may fail or the terminal may fail to start up.
  • the purpose of the embodiments of the present application is to provide a charging control method, device and electronic device, which can avoid hardware failure of the system IC or the inability to power on the terminal during charging using a charging IC without an ADC module, thereby improving the reliability of the terminal.
  • an embodiment of the present application provides a charging control method, the method comprising:
  • the values of the first flag bit and the second flag bit of the charger chip register are detected; the first flag bit is used to indicate the charging state; the second flag bit is used to indicate the magnitude relationship between the battery voltage and the system voltage;
  • the current charging stage is changed based on a change in the value of at least one of the first flag bit and the second flag bit.
  • an embodiment of the present application provides a charging control device, including:
  • a detection module used for detecting the values of a first flag bit and a second flag bit of a charging chip register when a charger is connected; the first flag bit is used to indicate a charging state; the second flag bit is used to indicate a magnitude relationship between a battery voltage and a system voltage;
  • a control module is used to change the current charging stage based on a change in the value of at least one of the first flag bit and the second flag bit.
  • an embodiment of the present application provides an electronic device, which includes a processor, a memory, and a program or instruction stored in the memory and executable on the processor, wherein the program or instruction, when executed by the processor, implements the method described in the first aspect.
  • an embodiment of the present application provides a readable storage medium, on which a program or instruction is stored, and when the program or instruction is executed by a processor, the method described in the first aspect is implemented.
  • an embodiment of the present application provides a chip, comprising a processor and a communication interface, wherein the communication interface is coupled to the processor, and the processor is used to run a program or instruction to implement the method described in the first aspect.
  • an embodiment of the present application provides a computer program product, which is stored in a storage medium and is executed by at least one processor to implement the method described in the first aspect.
  • the current charging stage is changed by changing the value of at least one of the first flag bit and the second flag bit of the charging IC register, thereby avoiding the situation where current is mistakenly fed into the system IC, causing hardware failure of the system IC, or the terminal cannot be powered on, thereby improving the reliability of the terminal.
  • FIG1 is a schematic diagram of the principle of a charging chip without an ADC module in the prior art
  • FIG2 is a flow chart of a charging control method provided in an embodiment of the present application.
  • FIG3 is one of the charging control logic schematic diagrams provided in an embodiment of the present application.
  • FIG4 is a second schematic diagram of charging control logic provided in an embodiment of the present application.
  • FIG5 is a third schematic diagram of charging control logic provided in an embodiment of the present application.
  • FIG6 is a schematic diagram of the structure of a charging control device provided in an embodiment of the present application.
  • FIG. 7 is a schematic diagram of the hardware structure of an electronic device provided in an embodiment of the present application.
  • first, second, etc. in the specification and claims of this application are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable under appropriate circumstances, so that the embodiments of the present application can be implemented in an order other than those illustrated or described here, and the objects distinguished by "first”, “second”, etc. are generally of one type, and the number of objects is not limited.
  • the first object can be one or more.
  • “and/or” in the specification and claims represents at least one of the connected objects, and the character “/" generally indicates that the objects associated with each other are in an "or” relationship.
  • FIG2 is a flow chart of a charging control method provided in an embodiment of the present application.
  • an embodiment of the present application provides a charging control method, which is applied to an electronic device.
  • the electronic device may be a terminal, such as a mobile phone, etc.
  • the method includes:
  • Step 101 when the charger is connected, detect the values of the first flag bit and the second flag bit of the charger chip register; the first flag bit is used to indicate the charging state; the second flag bit is used to indicate the magnitude relationship between the battery voltage and the system voltage.
  • Step 102 Change the current charging stage based on a change in the value of at least one of the first flag bit and the second flag bit.
  • the charging process can be divided into the SBL (Secondary boot loader) stage, the UFEI (Unified Extensible Firmware Interface) stage, and the kernel (kernel driver loading) stage.
  • the SBL stage and the UFEI stage belong to the pre-charging state (also called the pre-charging mode), and the kernel stage belongs to the fast charging state (also called the fast charging mode, i.e., the constant current and constant voltage state).
  • the embodiment of the present application realizes a new charging scheme by configuring the register flag bit in the internal controller of the charging IC.
  • the turning point voltage from the SBL stage to the UFEI stage is a first voltage threshold, denoted by V1, and the turning point voltage from the UFEI stage to the kernel stage is a second voltage threshold, denoted by V2.
  • V2 is greater than V1.
  • Figure 3 is one of the charging control logic schematics provided by an embodiment of the present application.
  • the first flag bit and the second flag bit are used together to judge.
  • the value of the first flag bit is a first numerical value (for example, the value of the first flag bit is equal to 1)
  • the value of the second flag bit is a second numerical value (for example, the value of the second flag bit is equal to 1)
  • Vbat battery voltage
  • Vsysmin system minimum fixed voltage
  • the value of the first flag bit is the third numerical value (for example, the value of the first flag bit is equal to 2), it indicates that the fast charging state has been entered, or the value of the second flag bit is the fourth numerical value (for example, the value of the second flag bit is equal to 0), it indicates that Vbat is greater than Vsysmin. In this case, it is judged that the voltage condition is met, and the charging enters and remains in the UFEI stage.
  • the value of the second flag bit is related to the size of Vbat and Vsysmin. When Vbat is greater than Vsysmin, the value of the second flag bit is equal to 0, and when Vbat is less than Vsysmin, the value of the second flag bit is equal to 1, where V1 is less than Vsysmin.
  • Vbat and Vsysmin are connected to the input pin of the comparator module inside the charging IC. The Vbat input voltage value is compared with the reference voltage value set by Vsysmin. As the charging process progresses, the Vbat voltage continues to rise, and it is judged to be greater than Vsysmin or less than Vsysmin.
  • the value of the first flag bit determines the charging status through the current threshold and the voltage threshold.
  • the register in the internal controller of the charging IC indicates different charging status: the value of the register is 00 (binary) indicating that charging is off, the value of the register is 01 (binary) indicating the pre-charging status, the value of the register is 10 (binary) indicating the fast charging status (constant current and constant voltage status), and the value of the register is 11 (binary) indicating that charging is complete.
  • FIG4 is a second schematic diagram of the charging control logic provided by an embodiment of the present application.
  • the charging stage is determined based on the value of the second flag bit.
  • the value of Vbat may fluctuate. If the value of the second flag bit is the second value, it means that Vbat is less than Vsysmin. In this case, it will be determined that the current voltage is still relatively low. At this time, if the voltage of V2 is greater than the voltage value of Vsysmin, charging will continue in the UFEI stage. If the value of the second flag bit is the fourth value, it means that Vbat is greater than Vsysmin. At this time, if Vbat is greater than the voltage value of V2, Then enter and maintain charging in the kernel stage; at this time, if Vbat is less than or equal to the voltage value of V2, continue to maintain charging in the UFEI stage.
  • FIG. 5 is the third charging control logic diagram provided by the embodiment of the present application.
  • the fuel gauge IC collects the Vbat voltage and current and performs power calculations inside the fuel gauge IC.
  • the charging progress is reported to the processor through the IIC (Inter-Integrated Circuit) serial communication bus to display the charging progress.
  • the charging percentage can be displayed, or the charging percentage animation can be displayed.
  • the current charging stage is changed by changing the values of the first flag bit and the second flag bit of the charging IC register, thereby avoiding the situation where current is mistakenly fed into the system IC, causing hardware failure of the system IC, or the terminal cannot be powered on, thereby improving the reliability of the terminal.
  • FIG6 is a schematic diagram of the structure of a charging control device provided in an embodiment of the present application.
  • an embodiment of the present application provides a charging control device, which includes a detection module 601 and a control module 602, wherein:
  • a detection module used for detecting the values of a first flag bit and a second flag bit of a charging chip register when a charger is connected; the first flag bit is used to indicate a charging state; the second flag bit is used to indicate a magnitude relationship between a battery voltage and a system voltage;
  • a control module is used to change the current charging stage based on a change in the value of at least one of the first flag bit and the second flag bit.
  • the value of the second flag bit is a second numerical value
  • the value of the first flag bit is a first value
  • control module is specifically configured to enter and maintain charging in a secondary boot loader stage when the value of the first flag bit is a first numerical value and the value of the second flag bit is a second numerical value.
  • the value of the first flag bit is a third value
  • the value of the second flag bit is a fourth value
  • control module is specifically configured to enter and maintain charging in the UEFI stage when it is detected that the value of the first flag bit is a third value or the value of the second flag bit is a fourth value during charging in the secondary boot loader stage.
  • control module is specifically used to continue charging in the Unified Extensible Firmware Interface stage when it is detected that the value of the second flag bit is a second numerical value and the second voltage threshold is greater than the minimum fixed voltage of the system during the Unified Extensible Firmware Interface stage charging process, wherein the second voltage threshold is the turning point voltage from the Unified Extensible Firmware Interface stage to the kernel driver loading stage.
  • control module is specifically configured to enter and maintain charging in a kernel driver loading phase when it is detected that the value of the second flag bit is a fourth value and the battery voltage is greater than the second voltage threshold during charging in a UEFI phase.
  • the device further comprises a display module
  • the display module is used to obtain the battery voltage or current during the charging process in the kernel driver loading stage and display the charging progress.
  • the above-mentioned charging control device provided in the embodiment of the present application can implement all the method steps implemented by the method embodiment in which the execution subject is an electronic device, and can achieve the same technical effect.
  • the parts and beneficial effects of this embodiment that are the same as those of the method embodiment will not be described in detail here.
  • the charging control device in the embodiment of the present application can be a device, or a component, integrated circuit, or chip in a terminal.
  • the device can be a mobile electronic device or a non-mobile electronic device.
  • the mobile electronic device can be a mobile phone, a tablet computer, a laptop computer, a PDA, an in-vehicle electronic device, a wearable device, an ultra-mobile personal computer (UMPC), a netbook or a personal digital assistant (PDA), etc.
  • the non-mobile electronic device can be a server, a network attached storage (NAS), a personal computer (PC), a television (TV), a teller machine or a self-service machine, etc., which is not specifically limited in the embodiment of the present application.
  • the charging control device in the embodiment of the present application may be a device having an operating system.
  • the operating system may be an Android operating system, an iOS operating system, or other possible operating systems, which are not specifically limited in the embodiment of the present application.
  • an embodiment of the present application also provides an electronic device, including a processor, a memory, and a program or instruction stored in the memory and executable on the processor.
  • the program or instruction is executed by the processor, the various processes of the above-mentioned charging control method embodiment are implemented and the same technical effect can be achieved. To avoid repetition, it will not be repeated here.
  • the electronic devices in the embodiments of the present application include the mobile electronic devices and non-mobile electronic devices mentioned above.
  • Figure 7 is a schematic diagram of the hardware structure of an electronic device provided in an embodiment of the present application.
  • the electronic device 700 includes but is not limited to: a radio frequency unit 701, a network module 702, an audio output unit 703, an input unit 704, a sensor 705, a display unit 706, a user input unit 707, an interface unit 708, a memory 709, and a processor 710 and other components.
  • the electronic device 700 may also include a power source (such as a battery) for supplying power to each component, and the power source may be logically connected to the processor 710 through a power management system, so that the power management system can manage charging, discharging, and power consumption management.
  • a power source such as a battery
  • the electronic device structure shown in FIG7 does not constitute a limitation on the electronic device, and the electronic device may include more or fewer components than shown, or combine certain components, or arrange components differently, which will not be described in detail here.
  • the input unit 704 may include a graphics processor (GPU) 7041 and a microphone 7042, and the graphics processor 7041 processes the image data of a static picture or video obtained by an image capture device (such as a camera) in a video capture mode or an image capture mode.
  • the display unit 706 may include a display panel 7061, and the display panel 7061 may be configured in the form of a liquid crystal display, an organic light emitting diode, etc.
  • the user input unit 707 includes a touch panel 7071 and at least one of other input devices 7072.
  • the touch panel 7071 is also called a touch screen.
  • the touch panel 7071 may include two parts: a touch detection device and a touch controller.
  • the memory 709 can be used to store software programs and various data. Storage The memory 709 may mainly include a first storage area for storing programs or instructions and a second storage area for storing data, wherein the first storage area may store an operating system, an application program or instructions required for at least one function (such as a sound playback function, an image playback function, etc.), etc. In addition, the memory 709 may include a volatile memory or a non-volatile memory, or the memory 709 may include both a volatile and a non-volatile memory.
  • the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory.
  • the volatile memory may be a random access memory (RAM), a static random access memory (SRAM), a dynamic random access memory (DRAM), a synchronous dynamic random access memory (SDRAM), a double data rate synchronous dynamic random access memory (DDRSDRAM), an enhanced synchronous dynamic random access memory (ESDRAM), a synchronous link dynamic random access memory (SLDRAM) and a direct memory bus random access memory (DRRAM).
  • the memory 709 in the embodiment of the present application includes but is not limited to these and any other suitable types of memory.
  • the processor 710 may include one or more processing units; optionally, the processor 110 integrates an application processor and a modem processor, wherein the application processor mainly processes operations related to the operating system, user interface, and application programs, and the modem processor mainly processes wireless communication signals, such as a baseband processor. It is understandable that the modem processor may not be integrated into the processor 710.
  • the processor 710 is used to detect the values of the first flag bit and the second flag bit of the charging chip register when the charger is connected; the first flag bit is used to indicate the charging status; the second flag bit is used to indicate the relationship between the battery voltage and the system voltage; and the current charging stage is changed based on the change of the value of at least one of the first flag bit and the second flag bit.
  • the processor 710 is also used to enter and maintain charging in the secondary boot loader stage when the value of the first flag bit is a first numerical value and the value of the second flag bit is a second numerical value; when the battery voltage is less than the minimum fixed voltage of the system, the value of the second flag bit is the second numerical value; in the pre-charging state, the value of the first flag bit is the first numerical value.
  • the processor 710 is also used to enter and maintain charging in the unified extensible firmware interface stage when it is detected that the value of the first flag bit is a third value or the value of the second flag bit is a fourth value during the charging process of the secondary boot loader stage; in the fast charging state, the value of the first flag bit is the third value; when the battery voltage is greater than the minimum fixed voltage of the system, the value of the second flag bit is the fourth value.
  • the processor 710 is also used to continue charging in the Unified Extensible Firmware Interface stage when it is detected that the value of the second flag bit is a second numerical value and the second voltage threshold is greater than the minimum fixed voltage of the system during the Unified Extensible Firmware Interface stage charging process, wherein the second voltage threshold is the turning point voltage from the Unified Extensible Firmware Interface stage to the kernel driver loading stage.
  • the processor 710 is further configured to enter and maintain the kernel state when detecting that the value of the second flag bit is a fourth value and the battery voltage is greater than the second voltage threshold during the charging process of the unified extensible firmware interface stage. Charging during the driver loading phase.
  • the display unit 706 is used to obtain the battery voltage or current during the charging process in the kernel driver loading phase and display the charging progress.
  • An embodiment of the present application also provides a readable storage medium, on which a program or instruction is stored.
  • a program or instruction is stored.
  • each process of the charging control method embodiment in which the execution subject is an electronic device is implemented, and the same technical effect can be achieved. To avoid repetition, it will not be repeated here.
  • the processor is the processor in the electronic device described in the above embodiment.
  • the readable storage medium includes a computer readable storage medium, such as a computer read-only memory ROM, a random access memory RAM, a magnetic disk or an optical disk.
  • An embodiment of the present application further provides a chip, which includes a processor and a communication interface, wherein the communication interface is coupled to the processor, and the processor is used to run programs or instructions to implement the various processes of the above-mentioned charging control method embodiment, and can achieve the same technical effect. To avoid repetition, it will not be repeated here.
  • the chip mentioned in the embodiments of the present application can also be called a system-level chip, a system chip, a chip system or a system-on-chip chip, etc.
  • An embodiment of the present application provides a computer program product, which is stored in a storage medium.
  • the program product is executed by at least one processor to implement the various processes of the above-mentioned charging control method embodiment and can achieve the same technical effect. To avoid repetition, it will not be repeated here.
  • the technical solution of the present application can be embodied in the form of a computer software product, which is stored in a storage medium (such as ROM/RAM, a magnetic disk, or an optical disk), and includes a number of instructions for a terminal (which can be a mobile phone, a computer, a server, or a network device, etc.) to execute the methods described in each embodiment of the present application.
  • a storage medium such as ROM/RAM, a magnetic disk, or an optical disk
  • a terminal which can be a mobile phone, a computer, a server, or a network device, etc.

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  • Charge And Discharge Circuits For Batteries Or The Like (AREA)

Abstract

本申请公开了一种充电控制方法、装置及电子设备，属于通信技术领域。其中方法包括：在连接充电器的情况下，检测充电芯片寄存器第一标志位和第二标志位的值；所述第一标志位用于表示充电状态；所述第二标志位用于表示电池电压和系统电压的大小关系；基于所述第一标志位和所述第二标志位中至少一者值的变化改变当前的充电阶段。

Description

充电控制方法、装置及电子设备
相关申请的交叉引用
本申请要求于2022年11月10日提交的申请号为202211406693.5，发明名称为“充电控制方法、装置及电子设备”的中国专利申请的优先权，其通过引用方式全部并入本申请。
技术领域
本申请属于通信技术领域，具体涉及一种充电控制方法、装置及电子设备。
背景技术
在终端充电过程中，需要模拟数字转换器(Analog-to-Digital Converter，ADC)模块检测外部信号的变化过程，以控制不同充电阶段的流程进程。
针对不带ADC模块的充电芯片/集成电路(Integrated Circuit，IC)，要想实现充电功能，一种方案是通过在充电芯片外部搭建检测电路来实现检测外部信号的变化过程。如图1所示，通过上拉电阻R1和下拉电阻R2构建分压网络，分压网络连接到系统IC的通用输入输出(General Purpose Input Output，GPIO)接口上(此接口具备ADC功能)，为系统IC提供供电电源。
但是，当电池电压Vbat大于零(GPIO接口已经带电)，系统电压Vsys为零(电源芯片没有正常供电)时，会导致系统IC的硬件失效，或终端无法开机。
发明内容
本申请实施例的目的是提供一种充电控制方法、装置及电子设备，能够避免在使用不带ADC模块的充电IC进行充电的过程中系统IC的硬件失效，或终端无法开机的情况，提高了终端的可靠性。
第一方面，本申请实施例提供了一种充电控制方法，该方法包括：
在连接充电器的情况下，检测充电芯片寄存器第一标志位和第二标志位的值；所述第一标志位用于表示充电状态；所述第二标志位用于表示电池电压和系统电压的大小关系；
基于所述第一标志位和所述第二标志位中至少一者值的变化改变当前的充电阶段。
第二方面，本申请实施例提供了一种充电控制装置，包括：
检测模块，用于在连接充电器的情况下，检测充电芯片寄存器第一标志位和第二标志位的值；所述第一标志位用于表示充电状态；所述第二标志位用于表示电池电压和系统电压的大小关系；
控制模块，用于基于所述第一标志位和所述第二标志位中至少一者值的变化改变当前的充电阶段。
第三方面，本申请实施例提供了一种电子设备，该电子设备包括处理器、存储器及存储在所述存储器上并可在所述处理器上运行的程序或指令，所述程序或指令被所述处理器执行时实现如第一方面所述的方法。
第四方面，本申请实施例提供了一种可读存储介质，所述可读存储介质上存储程序或指令，所述程序或指令被处理器执行时实现如第一方面所述的方法。
第五方面，本申请实施例提供了一种芯片，所述芯片包括处理器和通信接口，所述通信接口和所述处理器耦合，所述处理器用于运行程序或指令，实现如第一方面所述的方法。
第六方面，本申请实施例提供一种计算机程序产品，该程序产品被存储在存储介质中，该程序产品被至少一个处理器执行以实现如第一方面所述的方法。
在本申请实施例中，通过充电IC寄存器第一标志位和第二标志位至少一者值的变化改变当前的充电阶段，避免了电流误灌入系统IC，导致系统IC的硬件失效，或终端无法开机的情况，提高了终端的可靠性。
附图说明
图1是现有技术中不带ADC模块的充电芯片的原理示意图；
图2是本申请实施例提供的充电控制方法的流程示意图；
图3是本申请实施例提供的充电控制逻辑示意图之一；
图4是本申请实施例提供的充电控制逻辑示意图之二；
图5是本申请实施例提供的充电控制逻辑示意图之三；
图6是本申请实施例提供的充电控制装置的结构示意图；
图7是本申请实施例提供的电子设备的硬件结构示意图。
具体实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚地描述，显然，所描述的实施例是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员获得的所有其他实施例，都属于本申请保护的范围。
本申请的说明书和权利要求书中的术语“第一”、“第二”等是用于区别类似的对象，而不用于描述特定的顺序或先后次序。应该理解这样使用的数据在适当情况下可以互换，以便本申请的实施例能够以除了在这里图示或描述的那些以外的顺序实施，且“第一”、“第二”等所区分的对象通常为一类，并不限定对象的个数，例如第一对象可以是一个，也可以是多个。此外，说明书以及权利要求中“和/或”表示所连接对象的至少其中之一，字符“/”，一般表示前后关联对象是一种“或”的关系。
图2是本申请实施例提供的充电控制方法的流程示意图，如图2所示，本申请实施例提供一种充电控制方法，应用于电子设备，电子设备可以为终端，例如，手机等，该方法包括：
步骤101、在连接充电器的情况下，检测充电芯片寄存器第一标志位和第二标志位的值；所述第一标志位用于表示充电状态；所述第二标志位用于表示电池电压和系统电压的大小关系。
步骤102、基于所述第一标志位和所述第二标志位中至少一者值的变化改变当前的充电阶段。
具体来说，充电过程可以分别为SBL(Secondary boot loader，二级引导加载程序)阶段，UFEI(Unified Extensible Firmware Interface，统一可扩展固件接口)阶段，kernel(内核驱动加载)阶段，SBL阶段和UFEI阶段属于预充电状态(也称预充电模式)，kernel阶段属于快速充电状态(也称快速充电模式，即恒流和恒压状态)。本申请实施例通过配置充电IC内部控制器中的寄存器标志位来实现新的充电方案。
SBL阶段到UFEI阶段的转折点电压为第一电压阈值，用V1表示，UFEI阶段到kernel阶段的转折点电压为第二电压阈值，用V2表示。V2大于V1。
图3是本申请实施例提供的充电控制逻辑示意图之一，如图3所示，在充电的第一阶段的充电过程中，使用第一标志位和第二标志位一起判断，在连接充电器的情况下，如果第一标志位的值为第一数值(例如，第一标志位的值等于1)，表示还处于预充电状态，且第二标志位的值为第二数值(例如，第二标志为的值等于1)，表示电池电压(用Vbat表示)小于系统最小固定电压(用Vsysmin表示)，这种情况会判断为当前电池电压还比较低，可以认为还没有到V1，则进入并保持在SBL阶段充电。
如果第一标志位的值为第三数值(例如，第一标志位的值等于2)，表示进入快速充电状态，或者第二标志位的值为第四数值(例如，第二标志位的值等于0)，表示Vbat大于Vsysmin，这种情况判断为满足电压条件，则进入并保持在UFEI阶段充电。
第二标志位的值与Vbat和Vsysmin的大小相关，当Vbat大于Vsysmin时第二标志位的值等于0，当Vbat小于Vsysmin时第二标志位的值等于1，其中，V1小于Vsysmin。Vbat与Vsysmin在充电IC内部连接到比较器模块输入管脚，Vbat输入电压值与Vsysmin设定参考电压值作比较，随着充电过程中，Vbat电压持续升高，大于Vsysmin或小于Vsysmin进行判断得出。
第一标志位的值通过电流阀值和电压阀值进行判定充电状态，充电IC内部控制器中的寄存器表示不同的充电状态：该寄存器的值为00(二进制)表示充电关闭，该寄存器的值为01(二进制)表示预充电状态，该寄存器的值为10(二进制)表示快速充电状态(恒流和恒压状态)，该寄存器的值为11(二进制)表示充电完成。
图4是本申请实施例提供的充电控制逻辑示意图之二，如图4所示，在充电的第二阶段的过程中，基于第二标志位的值判断充电阶段，在充电过程中Vbat的值可能会存在波动，如果第二标志位的值为第二数值，表示Vbat小于Vsysmin，这种情况会判断为当前电压还比较低，此时如果V2电压大于Vsysmin的电压值，则继续保持在UFEI阶段充电。如果第二标志位的值为第四数值，表示Vbat大于Vsysmin，此时如果Vbat大于V2的电压值， 则进入并保持在kernel阶段充电；此时如果Vbat小于等于V2的电压值，则继续保持在UFEI阶段充电。
图5是本申请实施例提供的充电控制逻辑示意图之三，如图5所示，在充电的第三阶段的过程中，进到kernel阶段之后，这个阶段通过电量计IC工作采集Vbat电压和电流并在电量计IC内部做电量计算，通过IIC(Inter-Integrated Circuit，集成电路总线)串行通讯总线上报到处理器显示充电进程，例如，可以显示充电百分比，或者显示充电百分比动画。
在本申请实施例中，通过充电IC寄存器第一标志位和第二标志位的值的变化改变当前的充电阶段，避免了电流误灌入系统IC，导致系统IC的硬件失效，或终端无法开机的情况，提高了终端的可靠性。
图6是本申请实施例提供的充电控制装置的结构示意图，如图6所示，本申请实施例提供一种充电控制装置，该装置包括检测模块601和控制模块602，其中：
检测模块，用于在连接充电器的情况下，检测充电芯片寄存器第一标志位和第二标志位的值；所述第一标志位用于表示充电状态；所述第二标志位用于表示电池电压和系统电压的大小关系；
控制模块，用于基于所述第一标志位和所述第二标志位中至少一者值的变化改变当前的充电阶段。
在所述电池电压小于系统最小固定电压时，所述第二标志位的值为第二数值；
在预充电状态下，所述第一标志位的值为第一数值，
可选地，所述控制模块具体用于在所述第一标志位的值为第一数值且所述第二标志位的值为第二数值的情况下，进入并保持在二级引导加载程序阶段充电。
在快速充电状态下，所述第一标志位的值为第三数值；
在所述电池电压大于所述系统最小固定电压时，所述第二标志位的值为第四数值；
可选地，所述控制模块具体用于在二级引导加载程序阶段充电过程中检测到所述第一标志位的值为第三数值或者所述第二标志位的值为第四数值的情况下，进入并保持在统一可扩展固件接口阶段充电。
可选地，所述控制模块具体用于在统一可扩展固件接口阶段充电过程中检测到所述第二标志位的值为第二数值且第二电压阈值大于所述系统最小固定电压的情况下，继续保持在统一可扩展固件接口阶段充电，其中，所述第二电压阈值为统一可扩展固件接口阶段到内核驱动加载阶段的转折点电压。
可选地，所述控制模块具体用于在统一可扩展固件接口阶段充电过程中检测到所述第二标志位的值为第四数值且所述电池电压大于所述第二电压阈值的情况下，进入并保持在内核驱动加载阶段充电。
可选地，所述装置还包括显示模块；
所述显示模块用于在内核驱动加载阶段充电过程中获取电池电压或电流，并显示充电进度。
具体来说，本申请实施例提供的上述充电控制装置，能够实现上述执行主体为电子设备的方法实施例所实现的所有方法步骤，且能够达到相同的技术效果，在此不再对本实施例中与方法实施例相同的部分及有益效果进行具体赘述。
本申请实施例中的充电控制装置可以是装置，也可以是终端中的部件、集成电路、或芯片。该装置可以是移动电子设备，也可以为非移动电子设备。示例性的，移动电子设备可以为手机、平板电脑、笔记本电脑、掌上电脑、车载电子设备、可穿戴设备、超级移动个人计算机(ultra-mobile personal computer，UMPC)、上网本或者个人数字助理(personal digital assistant，PDA)等，非移动电子设备可以为服务器、网络附属存储器(Network Attached Storage，NAS)、个人计算机(personal computer，PC)、电视机(television，TV)、柜员机或者自助机等，本申请实施例不作具体限定。
本申请实施例中的充电控制装置可以为具有操作系统的装置。该操作系统可以为安卓(Android)操作系统，可以为ios操作系统，还可以为其他可能的操作系统，本申请实施例不作具体限定。
可选地，本申请实施例还提供一种电子设备，包括处理器，存储器，存储在存储器上并可在所述处理器上运行的程序或指令，该程序或指令被处理器执行时实现上述充电控制方法实施例的各个过程，且能达到相同的技术效果，为避免重复，这里不再赘述。
需要说明的是，本申请实施例中的电子设备包括上述所述的移动电子设备和非移动电子设备。
图7是本申请实施例提供的电子设备的硬件结构示意图，如图7所示，该电子设备700包括但不限于：射频单元701、网络模块702、音频输出单元703、输入单元704、传感器705、显示单元706、用户输入单元707、接口单元708、存储器709、以及处理器710等部件。
本领域技术人员可以理解，电子设备700还可以包括给各个部件供电的电源(比如电池)，电源可以通过电源管理系统与处理器710逻辑相连，从而通过电源管理系统实现管理充电、放电、以及功耗管理等功能。图7中示出的电子设备结构并不构成对电子设备的限定，电子设备可以包括比图示更多或更少的部件，或者组合某些部件，或者不同的部件布置，在此不再赘述。
应理解的是，本申请实施例中，输入单元704可以包括图形处理器(Graphics Processing Unit，GPU)7041和麦克风7042，图形处理器7041对在视频捕获模式或图像捕获模式中由图像捕获装置(如摄像头)获得的静态图片或视频的图像数据进行处理。显示单元706可包括显示面板7061，可以采用液晶显示器、有机发光二极管等形式来配置显示面板7061。用户输入单元707包括触控面板7071以及其他输入设备7072中的至少一种。触控面板7071，也称为触摸屏。触控面板7071可包括触摸检测装置和触摸控制器两个部分。其他输入设备7072可以包括但不限于物理键盘、功能键(比如音量控制按键、开关按键等)、轨迹控件、鼠标、操作杆，在此不再赘述。存储器709可用于存储软件程序以及各种数据。存储 器709可主要包括存储程序或指令的第一存储区和存储数据的第二存储区，其中，第一存储区可存储操作系统、至少一个功能所需的应用程序或指令(比如声音播放功能、图像播放功能等)等。此外，存储器709可以包括易失性存储器或非易失性存储器，或者，存储器709可以包括易失性和非易失性存储器两者。其中，非易失性存储器可以是只读存储器(Read-Only Memory，ROM)、可编程只读存储器(Programmable ROM，PROM)、可擦除可编程只读存储器(Erasable PROM，EPROM)、电可擦除可编程只读存储器(Electrically EPROM，EEPROM)或闪存。易失性存储器可以是随机存取存储器(Random Access Memory，RAM)，静态随机存取存储器(Static RAM，SRAM)、动态随机存取存储器(Dynamic RAM，DRAM)、同步动态随机存取存储器(Synchronous DRAM，SDRAM)、双倍数据速率同步动态随机存取存储器(Double Data Rate SDRAM，DDRSDRAM)、增强型同步动态随机存取存储器(Enhanced SDRAM，ESDRAM)、同步连接动态随机存取存储器(Synch link DRAM，SLDRAM)和直接内存总线随机存取存储器(Direct Rambus RAM，DRRAM)。本申请实施例中的存储器709包括但不限于这些和任意其它适合类型的存储器。
处理器710可包括一个或多个处理单元；可选的，处理器110集成应用处理器和调制解调处理器，其中，应用处理器主要处理涉及操作系统、用户界面和应用程序等的操作，调制解调处理器主要处理无线通信信号，如基带处理器。可以理解的是，上述调制解调处理器也可以不集成到处理器710中。
其中，处理器710用于在连接充电器的情况下，检测充电芯片寄存器第一标志位和第二标志位的值；所述第一标志位用于表示充电状态；所述第二标志位用于表示电池电压和系统电压的大小关系；基于所述第一标志位和所述第二标志位中至少一者值的变化改变当前的充电阶段。
可选地，处理器710还用于在所述第一标志位的值为第一数值且所述第二标志位的值为第二数值的情况下，进入并保持在二级引导加载程序阶段充电；在所述电池电压小于系统最小固定电压时，所述第二标志位的值为第二数值；在预充电状态下，所述第一标志位的值为第一数值。
可选地，处理器710还用于在二级引导加载程序阶段充电过程中检测到所述第一标志位的值为第三数值或者所述第二标志位的值为第四数值的情况下，进入并保持在统一可扩展固件接口阶段充电；在快速充电状态下，所述第一标志位的值为第三数值；在所述电池电压大于所述系统最小固定电压时，所述第二标志位的值为第四数值。
可选地，处理器710还用于在统一可扩展固件接口阶段充电过程中检测到所述第二标志位的值为第二数值且第二电压阈值大于所述系统最小固定电压的情况下，继续保持在统一可扩展固件接口阶段充电，其中，所述第二电压阈值为统一可扩展固件接口阶段到内核驱动加载阶段的转折点电压。
可选地，处理器710还用于在统一可扩展固件接口阶段充电过程中检测到所述第二标志位的值为第四数值且所述电池电压大于所述第二电压阈值的情况下，进入并保持在内核 驱动加载阶段充电。
可选地，显示单元706用于在内核驱动加载阶段充电过程中获取电池电压或电流，并显示充电进度。
本申请实施例还提供一种可读存储介质，所述可读存储介质上存储有程序或指令，该程序或指令被处理器执行时实现上述执行主体为电子设备的充电控制方法实施例的各个过程，且能达到相同的技术效果，为避免重复，这里不再赘述。
其中，所述处理器为上述实施例中所述的电子设备中的处理器。所述可读存储介质，包括计算机可读存储介质，如计算机只读存储器ROM、随机存取存储器RAM、磁碟或者光盘等。
本申请实施例另提供了一种芯片，所述芯片包括处理器和通信接口，所述通信接口和所述处理器耦合，所述处理器用于运行程序或指令，实现上述充电控制方法实施例的各个过程，且能达到相同的技术效果，为避免重复，这里不再赘述。
应理解，本申请实施例提到的芯片还可以称为系统级芯片、系统芯片、芯片系统或片上系统芯片等。
本申请实施例提供一种计算机程序产品，该程序产品被存储在存储介质中，该程序产品被至少一个处理器执行以实现如上述充电控制方法实施例的各个过程，且能达到相同的技术效果，为避免重复，这里不再赘述。
需要说明的是，在本文中，术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含，从而使得包括一系列要素的过程、方法、物品或者装置不仅包括那些要素，而且还包括没有明确列出的其他要素，或者是还包括为这种过程、方法、物品或者装置所固有的要素。在没有更多限制的情况下，由语句“包括一个……”限定的要素，并不排除在包括该要素的过程、方法、物品或者装置中还存在另外的相同要素。此外，需要指出的是，本申请实施方式中的方法和装置的范围不限按示出或讨论的顺序来执行功能，还可包括根据所涉及的功能按基本同时的方式或按相反的顺序来执行功能，例如，可以按不同于所描述的次序来执行所描述的方法，并且还可以添加、省去、或组合各种步骤。另外，参照某些示例所描述的特征可在其他示例中被组合。
通过以上的实施方式的描述，本领域的技术人员可以清楚地了解到上述实施例方法可借助软件加必需的通用硬件平台的方式来实现，当然也可以通过硬件，但很多情况下前者是更佳的实施方式。基于这样的理解，本申请的技术方案本质上或者说对现有技术做出贡献的部分可以以计算机软件产品的形式体现出来，该计算机软件产品存储在一个存储介质(如ROM/RAM、磁碟、光盘)中，包括若干指令用以使得一台终端(可以是手机，计算机，服务器，或者网络设备等)执行本申请各个实施例所述的方法。
上面结合附图对本申请的实施例进行了描述，但是本申请并不局限于上述的具体实施方式，上述的具体实施方式仅仅是示意性的，而不是限制性的，本领域的普通技术人员在本申请的启示下，在不脱离本申请宗旨和权利要求所保护的范围情况下，还可做出很多形 式，均属于本申请的保护之内。

Claims (16)

  1. 一种充电控制方法，包括：
    在连接充电器的情况下，检测充电芯片寄存器第一标志位和第二标志位的值；所述第一标志位用于表示充电状态；所述第二标志位用于表示电池电压和系统电压的大小关系；
    基于所述第一标志位和所述第二标志位中至少一者值的变化改变当前的充电阶段。
  2. 根据权利要求1所述的充电控制方法，其中，基于所述第一标志位和所述第二标志位中至少一者值的变化改变当前的充电阶段，包括：
    在预充电状态下，所述第一标志位的值为第一数值；
    在所述电池电压小于系统最小固定电压时，所述第二标志位的值为第二数值；
    在所述第一标志位的值为第一数值且所述第二标志位的值为第二数值的情况下，进入并保持在二级引导加载程序阶段充电。
  3. 根据权利要求2所述的充电控制方法，其中，基于所述第一标志位和所述第二标志位中至少一者值的变化改变当前的充电阶段，还包括：
    在快速充电状态下，所述第一标志位的值为第三数值；
    在所述电池电压大于所述系统最小固定电压时，所述第二标志位的值为第四数值；
    在二级引导加载程序阶段充电过程中检测到所述第一标志位的值为第三数值或者所述第二标志位的值为第四数值的情况下，进入并保持在统一可扩展固件接口阶段充电。
  4. 根据权利要求3所述的充电控制方法，其中，基于所述第一标志位和所述第二标志位中至少一者值的变化改变当前的充电阶段，还包括：
    在统一可扩展固件接口阶段充电过程中检测到所述第二标志位的值为第二数值且第二电压阈值大于所述系统最小固定电压的情况下，继续保持在统一可扩展固件接口阶段充电，其中，所述第二电压阈值为统一可扩展固件接口阶段到内核驱动加载阶段的转折点电压。
  5. 根据权利要求4所述的充电控制方法，其中，基于所述第一标志位和所述第二标志位中至少一者值的变化改变当前的充电阶段，还包括：
    在统一可扩展固件接口阶段充电过程中检测到所述第二标志位的值为第四数值且所述电池电压大于所述第二电压阈值的情况下，进入并保持在内核驱动加载阶段充电。
  6. 根据权利要求5所述的充电控制方法，其中，所述方法还包括：
    在内核驱动加载阶段充电过程中获取电池电压或电流，并显示充电进度。
  7. 一种充电控制装置，包括：
    检测模块，用于在连接充电器的情况下，检测充电芯片寄存器第一标志位和第二标志位的值；所述第一标志位用于表示充电状态；所述第二标志位用于表示电池电压和系统电压的大小关系；
    控制模块，用于基于所述第一标志位和所述第二标志位中至少一者值的变化改变当前 的充电阶段。
  8. 根据权利要求7所述的充电控制装置，其中
    在所述电池电压小于系统最小固定电压时，所述第二标志位的值为第二数值；
    在预充电状态下，所述第一标志位的值为第一数值；
    所述控制模块具体用于在所述第一标志位的值为第一数值且所述第二标志位的值为第二数值的情况下，进入并保持在二级引导加载程序阶段充电。
  9. 根据权利要求8所述的充电控制装置，其中
    在快速充电状态下，所述第一标志位的值为第三数值；
    在所述电池电压大于所述系统最小固定电压时，所述第二标志位的值为第四数值；
    所述控制模块具体用于在二级引导加载程序阶段充电过程中检测到所述第一标志位的值为第三数值或者所述第二标志位的值为第四数值的情况下，进入并保持在统一可扩展固件接口阶段充电。
  10. 根据权利要求9所述的充电控制装置，其中，所述控制模块具体用于在统一可扩展固件接口阶段充电过程中检测到所述第二标志位的值为第二数值且第二电压阈值大于所述系统最小固定电压的情况下，继续保持在统一可扩展固件接口阶段充电，其中，所述第二电压阈值为统一可扩展固件接口阶段到内核驱动加载阶段的转折点电压。
  11. 根据权利要求10所述的充电控制装置，其中，所述控制模块具体用于在统一可扩展固件接口阶段充电过程中检测到所述第二标志位的值为第四数值且所述电池电压大于所述第二电压阈值的情况下，进入并保持在内核驱动加载阶段充电。
  12. 根据权利要求11所述的充电控制装置，其中，所述装置还包括显示模块；
    所述显示模块用于在内核驱动加载阶段充电过程中获取电池电压或电流，并显示充电进度。
  13. 一种电子设备，其特征在于，包括处理器，存储器及存储在所述存储器上并可在所述处理器上运行的程序或指令，所述程序或指令被所述处理器执行时实现如权利要求1至6中的任一项所述的方法。
  14. 一种可读存储介质，所述可读存储介质上存储程序或指令，所述程序或指令被处理器执行时实现如权利要求1至6任一项所述的方法。
  15. 一种芯片，所述芯片包括处理器和通信接口，所述通信接口和所述处理器耦合，所述处理器用于运行程序或指令，实现如权利要求1至6任一项所述的方法。
  16. 一种计算机程序产品，所述计算机程序产品被至少一个处理器执行以实现如权利要求1-6任一项所述的方法。
PCT/CN2023/127461 2022-11-10 2023-10-30 充电控制方法、装置及电子设备 WO2024099124A1 (zh)

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