WO2024087724A1 - Garbage collection method, page storage method, and electronic device - Google Patents

Abstract

The present application provides a garbage collection method, a page storage method, and an electronic device. The garbage collection method comprises: obtaining a first score according to the number of garbage pages in a first erase block and an increase rate of the number of garbage pages in a second erase block; obtaining a second score according to the number of the garbage pages in the second erase block and an increase rate of the number of the garbage pages in the first erase block; and when the first score is greater than the second score, performing garbage collection on the first erase block. On the basis of the described solution, the garbage collection efficiency for a flash memory is improved, the garbage collection speed is increased, the write amplification coefficient is reduced, the number of flash memory erasures is decreased, and the service life of the flash memory is prolonged.

Description

Garbage collection method, page storage method and electronic device

This application claims priority to the Chinese patent application filed with the China Patent Office on October 28, 2022, with application number 202211337526.X and application name “Garbage Recovery Method, Page Storage Method and Electronic Device”, the entire contents of which are incorporated by reference in this application.

Technical Field

The present application relates to the field of electronic devices, and more specifically, to a garbage collection method, a page storage method and an electronic device.

Background technique

Flash memory is an electrically erasable programmable read-only memory (EEPROM).

The storage space of flash memory is divided into many erase blocks, each of which contains several data pages. New data pages can be written to the free positions of the erase blocks in an append-write manner. However, when the flash memory space is full, garbage collection (GC) operations need to be performed on some erase blocks of the flash memory. When performing garbage collection, free space can only be released by erasing the entire erase block, that is, clearing the garbage pages in the erase block, and then writing the valid pages in the erase block and the new data pages into the new erase block together.

Garbage collection efficiency refers to the proportion of garbage pages in the erased erase block. The higher the garbage collection efficiency, the fewer valid pages need to be written, the faster the garbage collection operation is performed, and the fewer the number of erases, the longer the service life of the flash memory.

Therefore, how to improve the efficiency of garbage collection of flash memory is a problem that needs to be solved urgently.

Summary of the invention

The embodiments of the present application provide a garbage collection method, a page storage method and an electronic device, which are beneficial to improving the efficiency of flash memory garbage collection, increasing the speed of garbage collection and extending the service life of the flash memory.

In a first aspect, a method for garbage collection is provided, the method comprising: obtaining a first score based on the number of garbage pages in a first erase block and a growth rate of garbage pages in a second erase block; obtaining a second score based on the number of garbage pages in the second erase block and a growth rate of garbage pages in the first erase block; and performing garbage collection on the first erase block when the first score is greater than the second score.

It should be understood that the first erase block and the second erase block are any two different erase blocks in the flash memory.

Based on the above scheme, the erase block with the fastest growth rate of garbage pages will not necessarily be the object of garbage collection. In this way, during the next garbage collection, a large number of garbage pages may be accumulated in the erase block with the fastest growth rate of garbage pages, so that the efficiency of garbage collection of the erase block is higher, thereby improving the efficiency of garbage collection. On the other hand, the efficiency of garbage collection is higher, the write amplification factor is reduced, and the number of flash memory erases is reduced, which is conducive to improving the service life of the flash memory.

In combination with the first aspect, in a possible implementation, the first erase block belongs to a first erase block set, the first erase block is the erase block with the largest number of junk pages in the first erase block set, the erase blocks in the first erase block set are used to store pages of a first heat level, the second erase block belongs to a second erase block set, the second erase block is the erase block with the largest number of junk pages in the second erase block set, the erase blocks in the second erase block set are used to store pages of a second heat level, and the frequency of updating pages of the first heat level is different from the frequency of updating pages of the second heat level.

It should be understood that the erase blocks corresponding to each heat level store pages of the corresponding heat level. Since the pages of each heat level are updated at different frequencies, the growth rate of garbage pages in the erase blocks corresponding to each heat level is also different, and can even be clearly distinguished.

Based on the above scheme, the erase block with the fastest growth rate of garbage pages will not necessarily be the object of garbage collection. In this way, during the next garbage collection, the erase block with the fastest growth rate of garbage pages may accumulate a large number of garbage pages, so that the efficiency of garbage collection of this erase block is higher, thereby improving the efficiency of garbage collection. On the other hand, the higher the efficiency of garbage collection, the higher the write amplification factor. The number of flash memory erases is reduced, which is beneficial to improving the service life of the flash memory. In addition, since the erase blocks are classified according to the heat level, the number of erase blocks that need to calculate the scores is small, and the speed of determining the target erase blocks for garbage collection is faster, which is beneficial to improving the speed of garbage collection.

In combination with the first aspect, in a possible implementation, the method also includes: determining at least two thermal levels, and a range of reuse distances corresponding to each of the at least two thermal levels, the reuse distance being the number of write operations performed on pages other than the first page between two adjacent updates of the first page, the at least two thermal levels including the first thermal level and the second thermal level; determining a set of erase blocks corresponding to each thermal level.

It should be understood that the first page is any page. The erase block set includes one or more erase blocks.

It should be understood that each heat level corresponds to each reuse distance range one by one. The reuse distance range corresponding to each heat level can be preset by the user or the system, or can be determined based on historical reuse distance data.

Based on the above solution, the heat level of the page is divided based on the reuse distance, which can more accurately quantify the division of heat levels and is conducive to improving the efficiency of garbage collection.

In combination with the first aspect, in a possible implementation, the determining of at least two heat levels, and the range of reuse distances corresponding to each of the at least two heat levels, includes: obtaining the reuse distances of multiple pages written within a first time period; and determining the range of reuse distances corresponding to each heat level by clustering the reuse distances of the multiple pages.

Based on the above scheme, the range of reuse distances corresponding to the heat level can be divided according to the reuse distances of multiple pages written in the first time period. Therefore, the division of heat levels is more reasonable, so as to facilitate the classified storage of data in the flash memory, which is conducive to improving the efficiency of garbage collection. On the other hand, the range of reuse distances corresponding to the heat level can also be regularly updated to reflect the changes in the flash memory load hotspot.

In combination with the first aspect, in a possible implementation, the method also includes: predicting a second reuse distance of the second page based on one or more first reuse distances of the second page within a second time period, the second reuse distance being used to indicate the number of write operations performed by the second page on pages other than the second page between the current moment and the next update moment; determining the thermal level to which the second page belongs based on the second reuse distance and the range of reuse distances corresponding to each thermal level; and writing the second page to an erase block in an erase block set corresponding to the thermal level to which the second page belongs.

It should be understood that when the second reuse distance of the second page is within the range of the reuse distance corresponding to the first heat level, the page belongs to the first heat level.

Based on the above scheme, all pages that need to be written or updated can be distinguished based on the heat level, so as to write into the erase blocks of the corresponding heat level, thereby making the growth rate of garbage pages in the erase blocks corresponding to different heat levels clearly distinguishable, which is conducive to improving the efficiency of garbage collection.

In combination with the first aspect, in a possible implementation, the garbage collection of the first erase block includes: extracting valid pages in the first erase block; writing the valid pages into a third erase block; and erasing all pages in the first erase block.

In combination with the first aspect, in a possible implementation, after performing garbage collection on the first erase block, the method further includes: writing a third page into the first erase block, the third page belonging to a third heat level; adding the first erase block to an erase block set corresponding to the third heat level.

In a second aspect, a method for storing pages is provided, the method comprising: determining at least two heat levels and a range of a reuse distance corresponding to each of the at least two heat levels, the reuse distance being the number of write operations performed on pages other than the first page between two adjacent update moments of the first page;

An erase block set corresponding to each thermal level is determined, the erase block set includes a first erase block set, the at least two thermal levels include a first thermal level, and the erase blocks in the first erase block set are used to store pages of the first thermal level.

It should be understood that the first page is any page. The erase block set includes one or more erase blocks.

It should be understood that each heat level corresponds to each reuse distance range one by one. The reuse distance range corresponding to each heat level can be preset by the user or the system, or can be determined based on historical reuse distance data.

Based on the above scheme, the use of dividing the heat level of pages based on reuse distance can more accurately quantify the division of heat levels, which is conducive to improving the efficiency of garbage collection. In combination with the second aspect, in a possible implementation, the determination of at least two heat levels and the range of reuse distances corresponding to each of the at least two heat levels includes: obtaining the reuse distances of multiple pages written in a first time period; clustering the reuse distances of the multiple pages to determine the range of reuse distances corresponding to each heat level; The range of reuse distance.

Based on the above scheme, the range of reuse distances corresponding to the heat level can be divided according to the reuse distances of multiple pages written in the first time period. Therefore, the division of heat levels is more reasonable, so as to facilitate the classified storage of data in the flash memory, which is conducive to improving the efficiency of garbage collection. On the other hand, the range of reuse distances corresponding to the heat level can also be regularly updated to reflect the changes in the flash memory load hotspot.

In combination with the second aspect, in a possible implementation, the method also includes: predicting a second reuse distance of the second page based on a first reuse distance of the second page within a first time period, the second reuse distance being used to indicate the number of times the second page performs write operations on pages other than the second page between the current moment and the next update moment; determining that the second page belongs to the first heat level based on the second reuse distance and the range of reuse distances corresponding to each heat level; and writing the second page to an erase block in the first erase block set.

It should be understood that when the second reuse distance of the second page is within the range of the reuse distance corresponding to the first heat level, the page belongs to the first heat level.

Based on the above scheme, all pages that need to be written or updated can be distinguished based on the heat level, so as to write into the erase blocks of the corresponding heat level, thereby making the growth rate of garbage pages in the erase blocks corresponding to different heat levels clearly distinguishable, which is conducive to improving the efficiency of garbage collection.

According to a third aspect, an electronic device is provided, the electronic device comprising:

one or more processors;

one or more memories;

The one or more memories store one or more computer programs, and the one or more computer programs include instructions. When the instructions are executed by the one or more processors, the electronic device performs the following steps:

A first score is obtained according to the number of garbage pages in a first erase block and a growth rate of garbage pages in a second erase block; a second score is obtained according to the number of garbage pages in the second erase block and a growth rate of garbage pages in the first erase block; and when the first score is greater than the second score, garbage collection is performed on the first erase block.

In combination with the third aspect, in a possible implementation, the first erase block belongs to a first erase block set, the first erase block is the erase block with the largest number of junk pages in the first erase block set, and the erase blocks in the first erase block set are used to store pages of a first heat level, the second erase block belongs to a second erase block set, the second erase block is the erase block with the largest number of junk pages in the second erase block set, and the erase blocks in the second erase block set are used to store pages of a second heat level, and the frequency of updating pages of the first heat level is different from the frequency of updating pages of the second heat level.

In combination with the third aspect, in a possible implementation, when the instruction is executed by the one or more processors, the electronic device performs the following steps: determine at least two thermal levels, and a range of reuse distances corresponding to each of the at least two thermal levels, the reuse distance being the number of write operations performed on pages other than the first page between two adjacent updates of the first page, the at least two thermal levels including the first thermal level and the second thermal level; determine a set of erase blocks corresponding to each thermal level.

In combination with the third aspect, in one possible implementation, when the instruction is executed by the one or more processors, the electronic device performs the following steps: obtaining the reuse distances of multiple pages written within a first time period; and determining the range of the reuse distances corresponding to each heat level by clustering the reuse distances of the multiple pages.

In combination with the third aspect, in a possible implementation, when the instruction is executed by the one or more processors, the electronic device performs the following steps: predicting a second reuse distance of the second page based on one or more first reuse distances of the second page within a second time period, the second reuse distance being used to indicate the number of write operations performed by the second page on pages other than the second page between the current moment and the next update moment; determining the thermal level to which the second page belongs based on the second reuse distance and the range of reuse distances corresponding to each thermal level; and writing the second page to an erase block in an erase block set corresponding to the thermal level to which the second page belongs.

In combination with the third aspect, in one possible implementation, when the instruction is executed by the one or more processors, the electronic device performs the following steps: extracting valid pages in the first erase block; writing the valid pages into a third erase block; and erasing all pages in the first erase block.

In conjunction with the third aspect, in a possible implementation manner, when the instruction is executed by the one or more processors, the electronic device performs the following steps: writing a third page into the first erase block, the third page belonging to a third thermal level; The first erase block is added to an erase block set corresponding to the third thermal level.

In a fourth aspect, an electronic device is provided, the electronic device comprising:

one or more processors;

one or more memories;

The one or more memories store one or more computer programs, and the one or more computer programs include instructions. When the instructions are executed by the one or more processors, the electronic device performs the following steps: determining at least two thermal levels and a range of reuse distances corresponding to each of the at least two thermal levels, the reuse distance being the number of write operations performed on pages other than the first page between two adjacent updates of the first page; determining an erase block set corresponding to each thermal level, the erase block set including a first erase block set, the at least two thermal levels including the first thermal level, and the erase blocks in the first erase block set being used to store pages of the first thermal level.

In combination with the fourth aspect, in a possible implementation, when the instruction is executed by the one or more processors, the electronic device performs the following steps: obtaining the reuse distances of multiple pages written within a first time period; and determining the range of the reuse distances corresponding to each heat level by clustering the reuse distances of the multiple pages.

In combination with the fourth aspect, in a possible implementation, when the instruction is executed by the one or more processors, the electronic device performs the following steps: predicting a second reuse distance of the second page based on the first reuse distance of the second page within the first time period, the second reuse distance being used to indicate the number of write operations performed by the second page on pages other than the second page between the current moment and the next update moment; determining that the second page belongs to the first heat level based on the second reuse distance and the range of reuse distances corresponding to each heat level; and writing the second page to an erase block in the first erase block set.

It should be understood that the specific implementation methods and beneficial effects corresponding to the above-mentioned devices have been described in detail in the above-mentioned method embodiments. For details, please refer to the above-mentioned method embodiments. For the sake of brevity, they will not be repeated here.

In a fifth aspect, a chip is provided, comprising a processor and a communication interface, wherein the communication interface is used to receive a signal and transmit the signal to the processor, and the processor processes the signal so that the method described in the first aspect and any possible implementation of the first aspect is executed, or the method described in the second aspect and any possible implementation of the second aspect is executed.

In the sixth aspect, a computer-readable storage medium is provided, characterized in that it includes computer instructions, and when the computer instructions are executed on an electronic device, the electronic device executes the method described in the first aspect and any possible implementation of the first aspect, or executes the method described in the second aspect and any possible implementation of the second aspect.

In the seventh aspect, a computer program product is provided, characterized in that the computer program product includes: a computer program code, which, when executed, implements the method described in the first aspect and any possible implementation manner of the first aspect, or implements the method described in the second aspect and any possible implementation manner of the second aspect.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG1 is a schematic diagram of the structure of an electronic device provided by this embodiment.

FIG. 2 is a software structure block diagram of the electronic device according to an embodiment of the present application.

FIG. 3 is a schematic diagram of the structure of a flash memory applicable to an embodiment of the present application.

FIG. 4 is a schematic diagram of garbage collection applicable to an embodiment of the present application.

FIG. 5 is a schematic diagram of a reuse distance of a data page according to an embodiment of the present application.

FIG. 6 is a schematic flowchart of a page storage method provided in an embodiment of the present application.

FIG. 7 is a schematic flowchart of another example of a page storage method provided in an embodiment of the present application.

FIG8 is a schematic flowchart of a garbage collection method provided in an embodiment of the present application.

FIG. 9 is a schematic diagram of an example process of writing a page provided in an embodiment of the present application.

FIG. 10 is a schematic diagram of another example of a process of writing a page provided in an embodiment of the present application.

FIG. 11 is a schematic diagram of the effects of garbage collection under different strategies provided in an embodiment of the present application.

FIG. 12 is a schematic diagram of another example of the effect of garbage collection under different strategies provided in an embodiment of the present application.

FIG. 13 is a schematic diagram of the effect of garbage collection under different space utilizations provided in an embodiment of the present application.

FIG. 14 is a schematic diagram of the hardware structure of the device provided in an embodiment of the present application.

Detailed ways

The terms used in the following embodiments are only for the purpose of describing specific embodiments, and are not intended to be used as limitations on the present application. As used in the specification and the appended claims of the present application, the singular expressions "one", "a kind of", "said", "above", "the" and "this" are intended to also include expressions such as "one or more", unless there is a clear contrary indication in the context. It should also be understood that in the following embodiments of the present application, "at least one", "one or more" refer to one, two or more. The term "and/or" is used to describe the association relationship of associated objects, indicating that three relationships may exist; for example, A and/or B can represent: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural. The character "/" generally indicates that the objects associated before and after are in an "or" relationship.

References to "one embodiment" or "some embodiments" etc. described in this specification mean that a particular feature, structure or characteristic described in conjunction with the embodiment is included in one or more embodiments of the present application. Thus, the phrases "in one embodiment", "in some embodiments", "in some other embodiments", "in some other embodiments", etc. appearing in different places in this specification do not necessarily all refer to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in other ways. The terms "including", "comprising", "having" and their variations all mean "including but not limited to", unless otherwise specifically emphasized in other ways.

The following describes electronic devices and embodiments for using such electronic devices. In some embodiments, the electronic device may be a portable electronic device that also includes other functions such as a personal digital assistant and/or a music player, such as a mobile phone, a tablet computer, a wearable electronic device with wireless communication functions (such as a smart watch), etc. Exemplary embodiments of portable electronic devices include but are not limited to devices equipped with Or a portable electronic device with other operating systems. The portable electronic device may also be other portable electronic devices, such as a laptop computer, etc. It should also be understood that in some other embodiments, the electronic device may not be a portable electronic device, but a desktop computer.

Exemplarily, FIG1 shows a schematic diagram of the structure of an electronic device 100 provided in an embodiment of the present application. For example, as shown in FIG1 , the electronic device 100 may include a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (USB) interface 130, a charging management module 140, a power management module 141, a battery 142, an antenna 1, an antenna 2, a mobile communication module 150, a wireless communication module 160, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, an earphone interface 170D, a sensor module 180, a button 190, a motor 191, an indicator 192, a camera 193, a display screen 194, and a subscriber identification module (SIM) card interface 195, etc. The sensor module 180 may include a pressure sensor 180A, a gyroscope sensor 180B, an air pressure sensor 180C, a magnetic sensor 180D, an acceleration sensor 180E, a distance sensor 180F, a proximity light sensor 180G, a fingerprint sensor 180H, a temperature sensor 180J, a touch sensor 180K, an ambient light sensor 180L, a bone conduction sensor 180M, etc.

It is to be understood that the structure illustrated in the embodiment of the present application does not constitute a specific limitation on the electronic device 100. In other embodiments of the present application, the electronic device 100 may include more or fewer components than shown in the figure, or combine some components, or split some components, or arrange the components differently. The components shown in the figure may be implemented in hardware, software, or a combination of software and hardware.

The processor 110 may include one or more processing units, for example, the processor 110 may include an application processor (AP), a modem processor, a graphics processor (GPU), an image signal processor (ISP), a controller, a memory, a video codec, a digital signal processor (DSP), a baseband processor, and/or a neural-network processing unit (NPU), etc. Different processing units may be independent devices or integrated in one or more processors.

The controller may be the nerve center and command center of the electronic device 100. The controller may generate an operation control signal according to the instruction operation code and the timing signal to complete the control of fetching and executing instructions.

The processor 110 may also be provided with a memory for storing instructions and data. In some embodiments, the memory in the processor 110 is a cache memory. The memory may store instructions or data that the processor 110 has just used or cyclically used. If the processor 110 needs to use the instruction or data again, it may be directly called from the memory. This avoids repeated access, reduces the waiting time of the processor 110, and thus improves the efficiency of the system.

In some embodiments, the processor 110 may include one or more interfaces. The interfaces may include an inter-integrated circuit (I2C) interface, an inter-integrated circuit sound (I2S) interface, a pulse code modulation (PCM) interface, a universal asynchronous receiver/transmitter (UART) interface, a interface, a mobile industry processor interface (MIPI), a general-purpose input/output (GPIO) interface, a subscriber identity module (SIM) interface, and/or a universal serial bus (USB) interface, etc.

Among them, the I2C interface is a bidirectional synchronous serial bus, including a serial data line (SDA) and a serial clock line (SCL).

The I2S interface can be used for audio communication. In some embodiments, the processor 110 can include multiple I2S buses. The processor 110 can be coupled to the audio module 170 via the I2S bus to achieve communication between the processor 110 and the audio module 170.

The PCM interface can also be used for audio communication, sampling, quantizing and encoding analog signals. In some embodiments, the audio module 170 and the wireless communication module 160 can be coupled via a PCM bus interface.

The UART interface is a universal serial data bus for asynchronous communication. The bus can be a bidirectional communication bus. It converts the data to be transmitted between serial communication and parallel communication. In some embodiments, the UART interface is generally used to connect the processor 110 and the wireless communication module 160.

The MIPI interface can be used to connect the processor 110 with peripheral devices such as the display screen 194 and the camera 193. The GPIO interface can be configured by software.

The GPIO interface can be configured as a control signal or a data signal. In some embodiments, the GPIO interface can be used to connect the processor 110 with the camera 193, the display screen 194, the wireless communication module 160, the audio module 170, the sensor module 180, etc.

The USB interface 130 is an interface that complies with USB standard specifications, and may be a Mini USB interface, a Micro USB interface, a USB Type C interface, etc. The USB interface 130 may be used to connect a charger to charge the electronic device 100, and may also be used to transmit data between the electronic device 100 and a peripheral device.

It is understandable that the interface connection relationship between the modules illustrated in the embodiment of the present application is only a schematic illustration and does not constitute a structural limitation on the electronic device 100. In other embodiments of the present application, the electronic device 100 may also adopt different interface connection methods in the above embodiments, or a combination of multiple interface connection methods.

The charging management module 140 is used to receive charging input from a charger. The charger may be a wireless charger or a wired charger. In some wired charging embodiments, the charging management module 140 may receive charging input from a wired charger through the USB interface 130. In some wireless charging embodiments, the charging management module 140 may receive wireless charging input through a wireless charging coil of the electronic device 100. While the charging management module 140 is charging the battery 142, it may also power the electronic device through the power management module 141.

The power management module 141 is used to connect the battery 142 , the charging management module 140 and the processor 110 .

The wireless communication function of the electronic device 100 can be implemented through the antenna 1, the antenna 2, the mobile communication module 150, the wireless communication module 160, the modem processor and the baseband processor.

The mobile communication module 150 can provide wireless communication solutions including 2G/3G/4G/5G etc. applied on the electronic device 100 .

The modem processor may include a modulator and a demodulator. Among them, the modulator is used to modulate the low-frequency baseband signal to be sent into a medium-high frequency signal. The demodulator is used to demodulate the received electromagnetic wave signal into a low-frequency baseband signal. The demodulator then transmits the demodulated low-frequency baseband signal to the baseband processor for processing. After the low-frequency baseband signal is processed by the baseband processor, it is passed to the application processor. The application processor outputs a sound signal through an audio device (not limited to a speaker 170A, a receiver 170B, etc.), or displays an image or video through a display screen 194. In some embodiments, the modem processor may be an independent device. In other embodiments, the modem processor may be independent of the processor 110 and be set in the same device as the mobile communication module 150 or other functional modules.

The wireless communication module 160 can provide wireless communication solutions for application in the electronic device 100, including wireless local area networks (WLAN) (such as wireless fidelity (Wi-Fi) network), Bluetooth (BT), global navigation satellite system (GNSS), frequency modulation (FM), near field communication technology (NFC), infrared technology (IR), etc.

In some embodiments, antenna 1 of electronic device 100 is coupled to mobile communication module 150, and antenna 2 is coupled to wireless communication module 160, so that electronic device 100 can communicate with the network and other devices through wireless communication technology.

The electronic device 100 implements the display function through a GPU, a display screen 194, and an application processor. The GPU is a microprocessor for image processing, which connects the display screen 194 and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. The processor 110 may include one or more GPUs that execute program instructions to generate or change display information.

The display screen 194 is used to display images, videos, etc. The display screen 194 includes a display panel. The display panel can be a liquid crystal display (liquid In some embodiments, the electronic device 100 may include one or N display screens 194, where N is a positive integer greater than 1. In some embodiments, the display screen 194 may also be integrated with a touch function, which may also be called a touch screen.

The electronic device 100 can realize the shooting function through ISP, camera 193, video codec, GPU, display screen 194 and application processor.

The external memory interface 120 can be used to connect an external memory card, such as a Micro SD card, to expand the storage capacity of the electronic device 100.

The internal memory 121 may be used to store computer executable program codes, which include instructions. The processor 110 executes various functional applications and data processing of the electronic device 100 by running the instructions stored in the internal memory 121 .

The electronic device 100 can implement audio functions such as music playing and recording through the audio module 170, the speaker 170A, the receiver 170B, the microphone 170C, the headphone jack 170D, and the application processor.

The audio module 170 is used to convert digital audio information into analog audio signal output, and is also used to convert analog audio input into digital audio signals. The speaker 170A, also called "speaker", is used to convert audio electrical signals into sound signals. The receiver 170B, also called "earpiece", is used to convert audio electrical signals into sound signals. The microphone 170C, also called "microphone", "microphone", is used to convert sound signals into electrical signals. The headphone interface 170D is used to connect wired headphones.

The pressure sensor 180A is used to sense the pressure signal and can convert the pressure signal into an electrical signal. In some embodiments, the pressure sensor 180A can be set on the display screen 194. The gyroscope sensor 180B can be used to determine the motion posture of the electronic device 100. The air pressure sensor 180C is used to measure the air pressure. In some embodiments, the electronic device 100 calculates the altitude through the air pressure value measured by the air pressure sensor 180C to assist in positioning and navigation. The acceleration sensor 180E can detect the magnitude of the acceleration of the electronic device 100 in all directions (generally three axes). The distance sensor 180F is used to measure the distance. The fingerprint sensor 180H is used to collect fingerprints. The touch sensor 180K is also called a "touch panel". The touch sensor 180K can be set on the display screen 194, and the touch sensor 180K and the display screen 194 form a touch screen, also called a "touch screen". The bone conduction sensor 180M can obtain a vibration signal. In some embodiments, the bone conduction sensor 180M can obtain a vibration signal of a vibrating bone block of the human vocal part. The bone conduction sensor 180M can also contact the human pulse and receive blood pressure beat signals.

The buttons 190 include a power button, a volume button, etc. The motor 191 can generate a vibration prompt. The indicator 192 can be an indicator light, which can be used to indicate the charging status, power change, messages, missed calls, notifications, etc. The SIM card interface 195 is used to connect a SIM card.

FIG2 is a software structure diagram of the electronic device 100 of an embodiment of the present application. The layered architecture divides the software into several layers, each layer has a clear role and division of labor. The layers communicate with each other through software interfaces. In some embodiments, the Android system is divided into four layers, from top to bottom, namely, the application layer, the application framework layer, the Android runtime (Android runtime) and the system library, and the kernel layer. The application layer can include a series of application packages.

As shown in FIG. 2 , the application package may include applications such as camera, gallery, calendar, call, map, navigation, WLAN, Bluetooth, music, video, short message, APP1, and APP2.

The application framework layer provides application programming interface (API) and programming framework for the applications in the application layer. The application framework layer includes some predefined functions.

As shown in FIG. 2 , the application framework layer may include a window manager, a content provider, a view system, a telephony manager, a resource manager, a notification manager, and the like.

The window manager is used to manage window programs. The window manager can obtain the display screen size, determine whether there is a status bar, lock the screen, capture the screen, etc.

Content providers are used to store and retrieve data and make it accessible to applications. This data can include video, images, audio, calls made and received, browsing history and bookmarks, phone books, etc.

The view system includes visual controls, such as controls for displaying text, controls for displaying images, etc. The view system can be used to build applications. A display interface can be composed of one or more views. For example, a display interface including a text notification icon can include a view for displaying text and a view for displaying images.

The phone manager is used to provide communication functions of the electronic device 100, such as management of call status (including connecting, hanging up, etc.).

The resource manager provides various resources for applications, such as localized strings, icons, images, layout files, video files, and so on.

The notification manager enables applications to display notification information in the status bar. It can be used to convey notification-type messages and can disappear automatically after a short stay without user interaction. For example, the notification manager is used to notify download completion, message reminders, etc. The notification manager can also be a notification that appears in the system top status bar in the form of a chart or scroll bar text, such as notifications of applications running in the background, or a notification that appears on the screen in the form of a dialog window. For example, a text message is displayed in the status bar, a prompt sound is emitted, an electronic device vibrates, an indicator light flashes, etc.

Android runtime includes core libraries and virtual machines. Android runtime is responsible for scheduling and management of the Android system.

The core library consists of two parts: one part is the function that needs to be called by the Java language, and the other part is the Android core library.

The application layer and the application framework layer run in a virtual machine. The virtual machine executes the Java files of the application layer and the application framework layer as binary files. The virtual machine is used to perform functions such as object life cycle management, stack management, thread management, security and exception management, and garbage collection.

The system library can include multiple functional modules, such as surface manager, media libraries, 3D graphics processing library (such as OpenGL ES), 2D graphics engine (such as SGL), etc.

The surface manager is used to manage the display subsystem and provide the fusion of 2D and 3D layers for multiple applications.

The media library supports playback and recording of a variety of commonly used audio and video formats, as well as static image files, etc. The media library can support a variety of audio and video encoding formats, such as: MPEG4, H.264, MP3, AAC, AMR, JPG, PNG, etc.

The 3D graphics processing library is used to implement 3D graphics drawing, image rendering, synthesis and layer processing.

A 2D graphics engine is a drawing engine for 2D drawings.

The kernel layer is the layer between hardware and software. The kernel layer can include display drivers, camera drivers, audio drivers, and sensor drivers.

It should be understood that the electronic device in the embodiments of the present application may also be an electronic device installed with an operating system such as Windows, Linux, Android, Hongmeng or Apple.

For ease of understanding, the technical terms involved in this application are explained and described below in conjunction with Figures 3, 4 and 5.

FIG3 is a schematic diagram of the structure of a flash memory applicable to an embodiment of the present application. A square filled with white may represent an erase block, and a square filled with a dot pattern may represent a data page. Referring to FIG3 , the entire storage space of the flash memory device is divided into a plurality of erase blocks, and each erase block may store a plurality of data pages. The data page is usually written to the free position of the erase block in an append write manner. When the storage space of the flash memory device is insufficient, garbage collection may be required for some of the erase blocks therein. That is, garbage collection is performed in units of erase blocks, and free space is released by erasing the entire erase block.

4 is a schematic diagram of garbage collection applicable to an embodiment of the present application, wherein a square filled with a diagonal pattern may represent a garbage page, a square filled with a dot pattern may represent a valid page, and a square filled with a grid pattern may represent an idle page or idle space.

The bare flash file system is a file system for the onboard NAND bare flash chip on the embedded system, such as UBIFS, YAFFS2, JFFS and other bare flash file systems. Data pages can be written into the erase block in a log structure. In order to avoid interference with other data stored on the erase block during garbage collection, a remote update strategy can be adopted. When a data page needs to be updated, the bare flash file system will write the new data page to a new erase block, and by modifying the index pointer corresponding to the data page, replace the old page with the page containing the new data, making the page containing the old data invalid.

In the embodiment of the present application, the page containing new data is marked as a valid page, and the page containing old data is marked as a garbage page. The garbage page can also be called a dirty page or an invalid page. The garbage page becomes a free page after garbage collection, and data can be rewritten.

In the embodiment of the present application, pages and data pages may also be referred to as data blocks, valid pages may also be referred to as valid data, and junk pages may also be referred to as invalid data.

Referring to Figure 4, when performing garbage collection, first select the target erase block as the object of garbage collection, then read and identify the valid pages in the target erase block, and write the valid pages in the target erase block to a new erase block with free space, or load the valid pages into the main memory, or load the valid pages into other storage spaces, and finally clear all data in the target erase block to free up space.

Garbage collection efficiency is defined as the ratio of the number of garbage pages to the total number of default pages in the erase block. The higher the garbage collection efficiency, the more garbage pages there are in the erase block, which means that fewer valid pages need to be moved each time garbage collection occurs, and the faster the garbage collection process. In addition, a higher garbage collection efficiency also means fewer erase times and a longer flash life. If the garbage collection efficiency is low, it may also lead to This leads to a serious write amplification problem. Write amplification (WA), also known as write amplification, is an undesirable phenomenon in flash memory and solid-state drives (SSDs), where the actual amount of physical data written is multiple times the amount of data written.

In the traditional solution, pages of different temperatures are placed in different erase blocks by separating hot and cold data pages. For example, data pages can be divided into hot pages and cold pages according to the access frequency, and hot pages are concentrated in hot erase blocks, and cold pages are concentrated in cold erase blocks, so that hot erase blocks have a higher proportion of garbage pages than cold erase blocks. When the file system triggers garbage collection, it often selects the erase block with the most garbage pages. However, this selection strategy will make the number of garbage pages in the selected target erase block decrease, and the garbage collection efficiency will decrease. Even if the hot and cold separation of data pages is used, the garbage collection efficiency will decrease rapidly.

In addition, the existing hot and cold separation methods have problems such as high resource overhead, inaccurate heat level classification, and inability to quickly identify hot spot changes. For example, the least recently used page replacement algorithm (LRU) and the least frequently used page replacement algorithm (LFU) need to maintain heat management metadata for all pages in the file system, which takes up a lot of memory. For LFU, a method based on access frequency sorting, when faced with changes in data set hot spots, data pages with a high historical cumulative access frequency will still be considered hot pages for a period of time in the future, resulting in a certain lag in identifying page heat changes.

The solution provided by the embodiment of the present application is introduced below in conjunction with Figures 5-13.

FIG5 is a schematic diagram of the reuse distance of a data page in an embodiment of the present application. In an embodiment of the present application, the number of file system write operations between two consecutive updates of a data page in the file system is defined as the reuse distance of the data page. Referring to FIG5, the horizontal axis represents the write sequence number of the file system, and the vertical axis represents the heat of the page.

It is understandable that, between two consecutive updates of a certain page, the file system may perform write operations on other pages, and the number of times the file system performs write operations on other pages is taken as the reuse distance of the page.

Exemplarily, each time a page is written, the write sequence number of the page is recorded, and when the page is written again, a reuse distance of the page can be obtained based on the write sequence numbers when the page is written twice.

For example, as shown in FIG5 , between the first update and the second update of page 501, the file system performs 5 write operations on other pages, and the reuse distance between the first update and the second update of page 501 is 5; between the first update and the second update of page 502, the file system performs 11 write operations on other pages, and the reuse distance between the first update and the second update of page 502 is 11; between the first update and the second update of page 503, the file system performs 100 write operations on other pages, and the reuse distance between the first update and the second update of page 503 is 100. Among them, the average reuse distance between two adjacent updates of page 501 is the shortest, the average reuse distance between two adjacent updates of page 502 is in the middle, and the average reuse distance between two adjacent updates of page 503 is the longest. Page 501 has the highest heat, page 502 has the second highest heat, and page 503 has the lowest heat.

It should be understood that a page with a shorter reuse distance has a higher frequency of page updates, that is, the page has a higher popularity. A page with a longer reuse distance has a lower frequency of page updates, that is, the page has a lower popularity.

It should be understood that the number of write operations performed by the file system on other pages may also be the number of updates performed on other pages.

FIG6 is a schematic flow chart of a method 600 provided in an embodiment of the present application. The method 600 is mainly used for classifying the heat levels when flash memory data is stored in a classified manner. Referring to FIG6 , the method 600 may include the following steps:

S610, obtaining reuse distances of multiple pages written in a first time period.

Exemplarily, during the first time period, each time a page is written, the reuse distance between the current update and the last update of the page is recorded.

S620, determining at least two heat levels by clustering reuse distances of multiple pages.

In an embodiment of the present application, a data set of multiple page reuse distances can be divided into multiple subsets by a clustering method, so that the difference in reuse distance of each subset is maximized. The user or the system can preset the number of subsets, that is, the number of heat levels, such as two groups of cold and hot, or three groups of cold, warm, and hot. In other words, the user or the system can predetermine at least two heat levels, and then determine the range of reuse distances corresponding to each heat level by a clustering method.

It should be understood that the reuse distance range corresponding to the subset obtained by clustering is used as the basis for dividing each heat level.

It should be understood that each subset corresponds to a range of reuse distances and also corresponds to a heat level.

Exemplarily, in the first time period, the UBIFS file system performs 16,000 write operations. The reuse intervals of the pages written the most recently for 16,000 times are clustered. The reuse distances of the pages written the most recently for 16,000 times are clustered. When the number of heat levels is specified as 3, the pages with a reuse distance less than 3,500 times are classified as hot pages; the pages with a reuse distance between 3,500 and 11,000 times are classified as warm pages, and the pages with a reuse distance greater than 11,000 times are classified as cold pages.

In the embodiments of the present application, the clustering method may use, for example, the K-means clustering algorithm (K-Means) and the natural breakpoint method (natural breaks). The present application does not limit the clustering method.

In some embodiments, step S620 is performed again at intervals of the first time period. That is, the embodiment of the present application can regularly update the range of reuse distances corresponding to each heat level.

In some embodiments, the system and the user can preset the range of reuse distances corresponding to each heat level. For example, the user can estimate the range of reuse distances corresponding to each heat level based on experience or experimental conclusions. For example, pages with a reuse distance of less than 4,000 times are classified as hot pages; pages with a reuse distance between 4,000 and 10,000 times are classified as warm pages; and pages with a reuse distance greater than 10,000 times are classified as cold pages.

In some embodiments, the heat levels may be divided in other ways, and the heat level to which the data page belongs may be determined.

In a possible implementation, the heat levels may be divided and the heat levels of the data pages may be determined according to the number of times the data pages are updated within a unit time.

Exemplarily, a data page whose number of updates per unit time is less than a first threshold is a cold page; a data page whose number of updates per unit time is greater than or equal to the first threshold and less than or equal to a second threshold is a warm page; and a data page whose number of updates per unit time is greater than the second threshold is a hot page.

In a possible implementation, the heat level may be divided and the heat level of the data page may be determined according to the historical accumulated access (update) frequency of the data page.

Exemplarily, a data page whose historical accumulated access frequency is greater than a first threshold is a hot page; and a data page whose historical accumulated access frequency is less than the first threshold is a cold page.

In a possible implementation, the heat level of the data page may be determined according to the number of write operations performed on the data page in the most recent N operations of the file system.

Exemplarily, in the N most recent write operations on data pages of the file system, a certain page is written M times, and the heat of the page is M/N. When the heat is greater than a first threshold, the page is a hot page; when the heat is less than the first threshold, the page is a cold page.

S630: Determine the erase block set corresponding to each thermal level.

In S630, a corresponding erase block set may be allocated to each of the at least two thermal levels.

It should be understood that each thermal level may correspond to an erase block set, and each erase block set may include one or more erase blocks.

In some embodiments, the number of erase blocks corresponding to each heat level can be determined based on the distribution of the number of pages of each heat level in the first time period. For example, in the first time period, the number of pages of the first heat level is the largest, so the number of erase blocks corresponding to the first heat level is the largest; the number of pages of the second heat level is the smallest, so the number of erase blocks corresponding to the second heat level is the smallest.

In some embodiments, when determining the erase block corresponding to the first thermal level, the erase block that once corresponded to other thermal levels other than the first thermal level is preferentially selected. For example, if the first erase block once corresponded to a cold page, the first erase block is preferentially selected when determining the erase block corresponding to the hot page.

It should be understood that the erase blocks in the erase block set corresponding to each thermal level are used to store pages of the thermal level. For example, the erase blocks in the erase block set corresponding to the first thermal level are used to store pages of the first thermal level. Alternatively, the hot erase blocks in the hot erase block set are used to store hot pages, and the cold erase blocks in the cold erase block set are used to store cold pages.

FIG7 is a schematic flow chart of a method 700 provided in an embodiment of the present application. The method 700 is mainly used to store written pages into erase blocks of corresponding thermal levels. Referring to FIG7 , the method 700 may include the following steps:

S710 , predicting a second reuse distance of a second page according to a first reuse distance of the second page in a second time period.

Before the second page is written into the flash memory, it is necessary to predict the possible reuse distance of the second page in the future, so as to determine the thermal level to which the second page belongs.

It should be understood that the second page is any page that needs to be written or updated.

It should be understood that the first reuse distance is the reuse distance of the second page in the second time period. In the second time period, the second page may be updated multiple times, that is, the number of the first reuse distances may be multiple.

It should be understood that the second reuse distance is the number of times the file system performs write operations on other pages between the current time and the time when the second page is next updated.

When predicting the second reuse distance of the second page, a weighted average of multiple first reuse distances within the first time period, or time series prediction, or historical data exponential smoothing method and other methods may be adopted.

It should be noted that time series forecasting, also known as time series forecasting, is a process of predicting the historical value changes of a certain indicator. Predict its value in the future. The historical data exponential smoothing method is similar to it, both of which predict the value of the indicator in the future based on historical data.

S720: Determine the heat level to which the second page belongs according to the second reuse distance and the range of the reuse distance corresponding to each heat level.

Specifically, when the second reuse distance is within a range of reuse distances corresponding to a certain heat level, it is determined that the second page belongs to the heat level.

Exemplarily, when the second reuse distance is less than or equal to 3500 times, the second page is determined to be at the first heat level, or the second page is determined to be a hot page.

S730, writing the second page into the erase block corresponding to the thermal level to which the second page belongs.

In S630, a corresponding erase block set is determined for each thermal level, or a corresponding erase block is determined for each thermal level. In S730, when writing the second page, it is possible to first check whether there is enough space in the erase block corresponding to the thermal level to which the second page belongs to store the second page, and if so, write the second page in the erase block.

Exemplarily, the second page belongs to the first heat level, the first heat level corresponds to the first erase block set, the first erase block set includes the first erase block, and when writing the second page, the erase blocks in the first erase block set are traversed, and if it is found that the first erase block has sufficient space, the second page is written to the first erase block.

In some embodiments, if there is insufficient space in the erase blocks corresponding to the thermal levels described in the second page, a garbage collection operation may be triggered to erase the target erase block and write the second page into the target erase block.

In some embodiments, when the second page is written to the target erase block, the target erase block is added to the erase block set corresponding to the thermal level to which the second page belongs.

FIG8 is a schematic flow chart of a method 800 provided in an embodiment of the present application. The method 800 is mainly used to determine a target erase block for garbage collection. Referring to FIG8 , the method 800 includes:

S810: Obtain a first score according to the number of garbage pages in the first erase block and the growth rate of garbage pages in the second erase block.

S820: Obtain a second score according to the number of garbage pages in the second erase block and the growth rate of garbage pages in the first erase block.

When performing garbage collection, the target erase block for garbage collection can be determined in the following manner. Assume that there are q erase blocks in the flash memory, record the total erase block set EB = {EB ₁ , EB ₂ , EB ₃ ······EB _q }, record the number of garbage pages of each erase block in the total erase block set as Garbage(EB _i ), record the growth rate of garbage pages of each erase block as V(EB _i ), score each erase block in the total erase block set according to the following formula, and perform garbage collection on the erase block with the largest score.
Score(EB _i )＝max{Garbage(EB _i )×(1+V(EB _j ))}

Wherein, Score(EB _i ) represents the score of erase block EB _i , Garbage(EB _i ) represents the number of garbage pages of erase block EB _i , V(EB _j ) represents the growth rate of garbage pages of erase block EB _j , EB _i ∈EB, EB _j ∈EB, and EB _j ≠EB _i , i≤q, j≤q.

In an embodiment of the present application, for a certain erase block, in the most recent N write operations of the file system, the increase in the number of garbage pages in the erase block is P, and the growth rate of the garbage pages in the erase block is P/N.

In some embodiments, the growth rate of garbage pages in an erase block is: the number of garbage pages added in the erase block per unit time.

Exemplarily, when the flash memory is running, the number of garbage pages in the erase block at a first moment is recorded, and then the number of garbage pages in the erase block at a second moment is recorded, and the growth rate of the garbage pages in the erase block can be calculated.

In some embodiments, the growth rate of garbage pages in an erase block is: the number of increased garbage pages in the erase block in the most recent N write operations of the file system.

Exemplarily, when the flash memory is running, the number of garbage pages in the erase block when the file system writes for the first time (or the Xth time, where X is a positive integer greater than or equal to zero) is recorded, and then the number of garbage pages in the erase block when the file system writes for the Nth time (N is a positive integer greater than X) is recorded, and the growth rate of the garbage pages in the erase block can be calculated.

In an embodiment of the present application, the growth rate of garbage pages in a certain erase block can be calculated multiple times, and the average value, weighted average, historical data exponential smoothing algorithm, etc. can be used as the real growth rate of garbage pages in the erase block.

Based on the above scheme, the erase block with the fastest growth rate of garbage pages will not necessarily be the object of garbage collection. In this way, during the next garbage collection, a large number of garbage pages may be accumulated in the erase block with the fastest growth rate of garbage pages, so that the erase block is garbage collected. The efficiency of garbage collection is higher, thereby improving the efficiency of garbage collection. On the other hand, the efficiency of garbage collection is higher, the write amplification factor is reduced, and the number of flash memory erases is reduced, which is beneficial to improving the service life of the flash memory.

In some embodiments, it is assumed that there are K heat levels, which are numbered {1, 2, ·····, K}. For the erase block set corresponding to each heat level, the erase block with the largest number of garbage pages in each erase block set is taken out to form a candidate erase block set CEB={CEB ₁ , CEB ₂ , CEB ₃ ······CEB _k }, the number of garbage pages of each erase block in the candidate erase block set is recorded as Garbage(CEB _i ), the growth rate of garbage pages of each erase block is recorded as V(CEB _i ), each erase block in the candidate erase block set is scored according to the following formula, and the erase block with the largest score is garbage collected.
Score(CEB _i )=max{Garbage(CEB _i )×(1+V(CEB _j ))}

Wherein, Score(CEB _i ) represents the score of erase block CEB _i , Garbage(CEB _i ) represents the number of garbage pages of erase block CEB _i , V(CEB _j ) represents the growth rate of garbage pages of erase block CEB _j , CEB _i ∈CEB, CEB _j ∈CEB, and CEB _j ≠CEB _i , i≤q, j≤q.

It should be understood that the erase blocks corresponding to each heat level store pages of the corresponding heat level. Since the pages of each heat level are updated at different frequencies, the growth rate of garbage pages in the erase blocks corresponding to each heat level is also different, and can even be clearly distinguished.

Based on the above scheme, the erase block with the fastest growth rate of garbage pages will not necessarily be the object of garbage collection. In this way, during the next garbage collection, a large number of garbage pages may be accumulated in the erase block with the fastest growth rate of garbage pages, so that the efficiency of garbage collection of the erase block is higher, thereby improving the efficiency of garbage collection. On the other hand, the efficiency of garbage collection is higher, the write amplification factor is reduced, and the number of flash memory erases is reduced, which is beneficial to improving the service life of the flash memory. In addition, since the erase blocks are classified according to the heat level, the number of erase blocks in the candidate erase block set is small, and the speed of determining the target erase block for garbage collection is faster, which is beneficial to improving the speed of garbage collection.

S830: When the first score is greater than the second score, garbage collection is performed on the first erase block.

Optionally, when performing garbage collection on the first erase block, valid pages in the first erase block may be extracted first, and the valid pages may be written into the third erase block, and all pages in the first erase block may be erased.

Optionally, when performing garbage collection on the first erase block, valid pages in the first erase block may be first extracted, and the valid pages may be loaded into other storage spaces, and all pages in the first erase block may be erased.

Optionally, after garbage collection of the first erase block, the third page that needs to be written or updated may be written into the first erase block. If the third page belongs to the third heat level, the first erase block is added to the erase block set corresponding to the third heat level.

It should be understood that garbage collection can be performed at any time, and is not limited to when there is insufficient space in the flash memory or the erase block. For example, garbage collection can also be performed when the file system is idle.

FIG. 9 is a schematic diagram of the process of writing a page to a file system according to an embodiment of the present application.

S901, searching for meta information of the fourth page according to the index of the fourth page.

When writing the fourth page, the file system first searches for the meta information of the page according to the index. If the fourth page has no index, an index is created, the write sequence number of the fourth page is recorded, and the future reuse distance of the fourth page is reset to -1.

It should be understood that the fourth page may be any page that needs to be written or updated.

S902: predicting the future reuse distance of the fourth page according to the information related to the reuse distance in the meta information.

For step S902, reference may be made to the relevant description of step S710, which will not be repeated here for the sake of brevity.

S903: Determine the popularity level of the fourth page according to the future reuse distance of the fourth page.

For step S903, reference may be made to the relevant description of step S720, which will not be repeated here for the sake of brevity.

It should be understood that the fourth page can be a page of any popularity level, and the present application does not limit the popularity level of the fourth page.

It should be noted that if the future reuse distance of the fourth page is reset to -1, the page is a cold page.

The following description will be made by taking the fourth page as a hot page as an example.

S904, determining whether the erase block corresponding to the hot log header has sufficient space.

Since the file system writes pages into the erase block of the flash memory in a log structured manner, and the fourth page is a hot page, when writing the fourth page, it is first determined whether the erase block corresponding to the hot log header has enough space.

S905: If the erase block corresponding to the hot log header has enough space, write the fourth page into the write buffer of the hot log header, and write the fourth page into the erase block corresponding to the hot log header.

S906 , updating the physical address of the fourth page in the meta-information of the fourth page.

Specifically, after the fourth page is successfully written into the erase block corresponding to the hot log header, the number is recorded in the file system page index structure. According to the mapping relationship between the page logical address and the physical position, that is, the file pointer of the fourth page is pointed to the erase block written in step S905.

S907: If the erase block corresponding to the hot log header does not have enough space, determine whether there is a hot erase block with enough space in the hot erase block set.

S908: If there is a hot erase block with sufficient space in the hot erase block set, the hot log head is switched to a new hot erase block with sufficient space.

It should be noted that after step S907 and step S908, the process returns to step S904.

S909: If there is no hot erase block with sufficient space in the hot erase block set, garbage collection is triggered to erase all data pages of the target erase block and switch the hot log header to the target erase block.

Specifically, the garbage collection method provided in the embodiment of the present application can be used to perform garbage collection. For example, the erase block with the largest number of garbage pages in the erase block set corresponding to each heat level can be selected to form a candidate erase block set, and then each erase block in the candidate erase block is scored, and the erase block with the highest score is selected as the target erase block, and garbage collection is performed. After all data pages of the target erase block are erased, the erase block corresponding to the hot log header is switched to the target erase block.

It should be noted that after step S907 and step S909, the process returns to step S904.

Fig. 10 is a schematic diagram of the process of writing pages provided by an embodiment of the present application. Referring to Fig. 10, when the fifth page needs to be written or updated, the reuse distance between the time of the fifth page being updated this time and the time of the last update is recorded and transmitted to the heat level classification module.

The heat level division module can periodically divide the heat levels and determine the range of reuse distances corresponding to each heat level. For example, the heat level division module clusters the reuse distances of multiple pages written in the first time period every first time period to obtain at least two groups of reuse distance ranges, and each group of reuse distance ranges corresponds to a heat level.

The reuse distance prediction module can predict the future reuse distance of the fifth page according to one or more historical reuse distances of the fifth page, that is, predict how many write operations the file system may perform between the current update and the next update of the fifth page.

According to the future reuse distance of the fifth page and the range of the reuse distance corresponding to each heat level, the heat level of the fifth page can be determined, and the fifth page is written into an erase block with sufficient space in the erase block set of the corresponding heat level. For example, if the fifth page is a cold page, the fifth page is written into a cold erase block.

If any erase block in the erase block set corresponding to the heat level does not have enough space, the target erase block selection module will select the target erase block for garbage collection operation. When performing garbage collection operation, the target erase block can be selected by the method of the embodiment shown in Figure 8. For brevity, it will not be repeated here. After garbage collection is performed on the target erase block, the fifth page is written into the target erase block.

Optionally, after the fifth page is written into the target erase block, the target erase block is added to an erase block set corresponding to the thermal level to which the fifth page belongs.

FIG11 is a schematic diagram of the effect of garbage collection under different strategies provided in an embodiment of the present application. FIG12 is a schematic diagram of the effect of garbage collection under another different strategy provided in an embodiment of the present application. FIG11 and FIG12 respectively show the results of write-only tests on UBIFS file systems of 64MB and 128MB space sizes. Among them, the solution provided in the embodiment of the present application is to fill in black patterns; to fill in white patterns means that there is no heat level division, and the garbage collection strategy is a greedy strategy, that is, the erase block with the largest number of garbage pages is always selected for garbage collection; to fill in left-slash patterns means that heat levels are divided, and the garbage collection strategy is a greedy strategy; to fill in right-slash patterns means that heat levels are divided, and the garbage collection strategy is a trade-off strategy.

In contrast, in the solution provided in the embodiment of the present application, the write amplification factor is reduced by 9% to 16%, the garbage collection efficiency is improved by 10% to 19%, and the number of flash memory erase times is reduced by 10% to 17%.

FIG13 is a schematic diagram of the effect of garbage collection under different space utilizations provided by an embodiment of the present application. Among them, the solution of the present application and the traditional solution are implemented on the UBIFS file system. As shown in FIG13 , the solution of the present application (dashed line in the figure) has different degrees of performance optimization compared with the traditional solution (solid line in the figure). As the space utilization increases, the write amplification of the two file systems becomes more serious, the efficiency of garbage collection decreases, and the number of erasures increases. However, it can be seen that the solution of the present application has an optimization effect compared with the traditional solution under different file system space utilizations.

The various embodiments described herein may be independent solutions or may be combined according to internal logic, and these solutions all fall within the scope of protection of this application. For example, method 600, method 700, and method 800 may be used in combination or independently. For example, method 600 and method 700 may be used to implement the classification of heat levels and the classified storage of flash memory data, and other methods may be used to determine the objects for garbage collection. (target erase block); or, using other methods to implement the division of thermal levels and classified storage of flash memory data, and using method 800 to determine the object of garbage collection (target erase block); or, using method 600 or method 700 to implement the division of thermal levels and classified storage of flash memory data, and using method 800 to determine the object of garbage collection (target erase block).

The method provided by the embodiment of the present application is described in detail above in conjunction with Figures 5 to 13. The device provided by the embodiment of the present application is described in detail below in conjunction with Figure 14. It should be understood that the description of the device embodiment corresponds to the description of the method embodiment. Therefore, the content not described in detail can be referred to the method embodiment above, and for the sake of brevity, it will not be repeated here.

FIG14 is a schematic diagram of the hardware structure of the device 1400 provided in an embodiment of the present application. The device 1400 shown in FIG14 (the device 1400 may be an electronic device) includes a memory 1410, a processor 1420, a communication interface 1430, and a bus 1440. The memory 1410, the processor 1420, and the communication interface 1430 are connected to each other through the bus 1440.

The memory 1410 may be a ROM, a static storage device, a dynamic storage device or a RAM. The memory 1410 may store a program. When the program stored in the memory 1410 is executed by the processor 1420, the processor 1420 is used to execute the various steps of the garbage collection method and the page storage method of the embodiment of the present application.

Processor 1420 can adopt a general-purpose CPU, microprocessor, ASIC, GPU or one or more integrated circuits to execute relevant programs to implement the functions required to be performed by the units in the device 1400 of the embodiment of the present application, or to execute the garbage collection method and page storage method of the method embodiment of the present application.

The processor 1420 may also be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the garbage collection method and the page storage method of the present application may be completed by an integrated logic circuit of hardware or software instructions in the processor 1420. The above-mentioned processor 1420 may also be a general-purpose processor, DSP, ASIC, FPGA or other programmable logic device, discrete gate or transistor logic device, discrete hardware component. The methods, steps and logic block diagrams disclosed in the embodiments of the present application may be implemented or executed. The general-purpose processor may be a microprocessor or the processor may also be any conventional processor, etc. The steps of the method disclosed in the embodiments of the present application may be directly embodied as being executed by a hardware decoding processor, or may be executed by a combination of hardware and software modules in a decoding processor. The software module may be located in a mature storage medium in the art such as a random access memory, a flash memory, a read-only memory, a programmable read-only memory or an electrically erasable programmable memory, a register, etc. The storage medium is located in the memory 1410, and the processor 1420 reads the information in the memory 1410, and combines its hardware to complete the functions required to be performed by the units included in the device 1400 of the embodiment of the present application, or executes the garbage collection method and page storage method of the method embodiment of the present application.

The communication interface 1430 uses a transceiver device such as but not limited to a transceiver to implement communication between the apparatus 1400 and other devices or a communication network.

The bus 1440 may include a path for transmitting information between the various components of the device 1400 (eg, the memory 1410 , the processor 1420 , and the communication interface 1430 ).

It should be noted that although the device 1400 shown in FIG. 14 only shows a memory, a processor, and a communication interface, in the specific implementation process, those skilled in the art should understand that the device 1400 also includes other devices necessary for normal operation. At the same time, according to specific needs, those skilled in the art should understand that the device 1400 may also include hardware devices for implementing other additional functions. In addition, those skilled in the art should understand that the device 1400 may also only include the devices necessary for implementing the embodiments of the present application, and does not necessarily include all the devices shown in FIG. 14.

An embodiment of the present application also provides a chip, which includes a processor and a communication interface, wherein the communication interface is used to receive a signal and transmit the signal to the processor, and the processor processes the signal so that the garbage collection method and the page storage method described in any possible implementation method in the foregoing text are executed.

This embodiment further provides a computer-readable storage medium, in which computer instructions are stored. When the computer instructions are executed on a computer, the garbage collection method and the page storage method in the above embodiments are executed.

This embodiment also provides a computer program product. When the computer program product runs on a computer, it enables the computer to execute the above-mentioned related steps, so that the garbage collection method and the page storage method in the above-mentioned embodiment are executed.

The above embodiments may be used alone or in combination with each other to achieve different technical effects.

Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

In this embodiment, the electronic device can be divided into functional modules according to the above method example. For example, each functional module can be divided into Each functional module may also integrate two or more functions into one processing module. The above integrated modules may be implemented in the form of hardware. It should be noted that the division of modules in this embodiment is schematic and is only a logical function division. There may be other division methods in actual implementation.

Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

In the several embodiments provided in the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions for a computer device (which can be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods described in each embodiment of the present application. The aforementioned storage media include: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), disk or optical disk, and other media that can store program codes.

The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims (23)

1. A method for garbage collection, characterized in that the method comprises:

   Obtaining a first score according to the number of garbage pages in the first erase block and the growth rate of garbage pages in the second erase block;

   Obtaining a second score according to the number of garbage pages in the second erase block and the growth rate of garbage pages in the first erase block;

   When the first score is greater than the second score, garbage collection is performed on the first erase block.
2. The method according to claim 1, characterized in that the first erase block belongs to a first erase block set, the first erase block is an erase block with the largest number of junk pages in the first erase block set, and the erase blocks in the first erase block set are used to store pages of a first heat level,

   The second erase block belongs to a second erase block set, the second erase block is the erase block with the largest number of garbage pages in the second erase block set, the erase blocks in the second erase block set are used to store pages of a second heat level, and the frequency of updating pages of the first heat level is different from the frequency of updating pages of the second heat level.
3. The method according to claim 2, characterized in that the method further comprises:

   Determine at least two heat levels and a range of reuse distances corresponding to each of the at least two heat levels, the reuse distance being the number of write operations performed on pages other than the first page between two adjacent update moments of the first page, the at least two heat levels including the first heat level and the second heat level;

   Determine the erase block set corresponding to each thermal level.
4. The method according to claim 3, characterized in that the determining of at least two heat levels and a range of reuse distances corresponding to each of the at least two heat levels comprises:

   Obtaining reuse distances of a plurality of pages written in a first time period;

   The reuse distance range corresponding to each heat level is determined by clustering the reuse distances of the multiple pages.
5. The method according to claim 3 or 4, characterized in that the method further comprises:

   Predicting a second reuse distance of the second page according to one or more first reuse distances of the second page in a second time period, the second reuse distance being used to indicate the number of write operations performed by the second page on pages other than the second page between a current moment and a next update moment;

   Determining the heat level to which the second page belongs according to the second reuse distance and the range of the reuse distances corresponding to each heat level;

   The second page is written into an erase block in an erase block set corresponding to a thermal level to which the second page belongs.
6. The method according to any one of claims 1 to 5, characterized in that the garbage collection of the first erase block comprises:

   extracting valid pages in the first erase block;

   Writing the valid page into a third erase block;

   All pages in the first erase block are erased.
7. The method according to any one of claims 1 to 6, characterized in that after performing garbage collection on the first erase block, the method further comprises:

   writing a third page into the first erase block, the third page belonging to a third thermal level;

   The first erase block is added to an erase block set corresponding to the third thermal level.
8. A method for storing a page, characterized in that the method comprises:

   Determine at least two heat levels and a range of reuse distances corresponding to each of the at least two heat levels, wherein the reuse distance is the number of write operations performed on pages other than the first page between two adjacent update moments of the first page;

   An erase block set corresponding to each thermal level is determined, the erase block set includes a first erase block set, the at least two thermal levels include a first thermal level, and the erase blocks in the first erase block set are used to store pages of the first thermal level.
9. The method according to claim 8, characterized in that the determining of at least two heat levels and a range of reuse distances corresponding to each of the at least two heat levels comprises:

   Obtaining reuse distances of a plurality of pages written in a first time period;

   The reuse distance range corresponding to each heat level is determined by clustering the reuse distances of the multiple pages.
10. The method according to claim 8 or 9, characterized in that the method further comprises:

    Predicting a second reuse distance of the second page according to a first reuse distance of the second page in the first time period, wherein the second reuse distance is used to indicate the number of write operations performed by the second page on pages other than the second page between a current moment and a next update moment;

    Determining, according to the second reuse distance and a range of reuse distances corresponding to each heat level, that the second page belongs to the first heat level;

    The second page is written to an erase block in the first set of erase blocks.
11. An electronic device, characterized in that the electronic device comprises:

    one or more processors;

    one or more memories;

    The one or more memories store one or more computer programs, and the one or more computer programs include instructions. When the instructions are executed by the one or more processors, the electronic device performs the following steps:

    Obtaining a first score according to the number of garbage pages in the first erase block and the growth rate of garbage pages in the second erase block;

    Obtaining a second score according to the number of garbage pages in the second erase block and the growth rate of garbage pages in the first erase block;

    When the first score is greater than the second score, garbage collection is performed on the first erase block.
12. The electronic device according to claim 11, characterized in that the first erase block belongs to a first erase block set, the first erase block is an erase block with the largest number of junk pages in the first erase block set, and the erase blocks in the first erase block set are used to store pages of a first heat level,

    The second erase block belongs to a second erase block set, the second erase block is the erase block with the largest number of garbage pages in the second erase block set, the erase blocks in the second erase block set are used to store pages of a second heat level, and the frequency of updating pages of the first heat level is different from the frequency of updating pages of the second heat level.
13. The electronic device according to claim 12, characterized in that when the instruction is executed by the one or more processors, the electronic device performs the following steps:

    Determine at least two heat levels and a range of reuse distances corresponding to each of the at least two heat levels, the reuse distance being the number of write operations performed on pages other than the first page between two adjacent update moments of the first page, the at least two heat levels including the first heat level and the second heat level;

    Determine the erase block set corresponding to each thermal level.
14. The electronic device according to claim 13, characterized in that when the instruction is executed by the one or more processors, the electronic device performs the following steps:

    Obtaining reuse distances of a plurality of pages written in a first time period;

    The reuse distance range corresponding to each heat level is determined by clustering the reuse distances of the multiple pages.
15. The electronic device according to claim 13 or 14, characterized in that when the instruction is executed by the one or more processors, the electronic device performs the following steps:

    Predicting a second reuse distance of the second page according to one or more first reuse distances of the second page in a second time period, the second reuse distance being used to indicate the number of write operations performed by the second page on pages other than the second page between a current moment and a next update moment;

    Determining the heat level to which the second page belongs according to the second reuse distance and the range of the reuse distances corresponding to each heat level;

    The second page is written into an erase block in an erase block set corresponding to a thermal level to which the second page belongs.
16. The electronic device according to any one of claims 11 to 15, characterized in that when the instruction is executed by the one or more processors, the electronic device performs the following steps:

    extracting valid pages in the first erase block;

    Writing the valid page into a third erase block;

    All pages in the first erase block are erased.
17. The electronic device according to any one of claims 11 to 16, characterized in that when the instruction is executed by the one or more processors, the electronic device performs the following steps:

    writing a third page into the first erase block, the third page belonging to a third thermal level;

    The first erase block is added to an erase block set corresponding to the third thermal level.
18. An electronic device, characterized in that the electronic device comprises:

    one or more processors;

    one or more memories;

    The one or more memories store one or more computer programs, and the one or more computer programs include instructions. When the instructions are executed by the one or more processors, the electronic device performs the following steps:

    Determine at least two heat levels and a range of reuse distances corresponding to each of the at least two heat levels, wherein the reuse distance is the number of write operations performed on pages other than the first page between two adjacent update moments of the first page;

    An erase block set corresponding to each thermal level is determined, the erase block set includes a first erase block set, the at least two thermal levels include a first thermal level, and the erase blocks in the first erase block set are used to store pages of the first thermal level.
19. The electronic device according to claim 18, wherein when the instruction is executed by the one or more processors, the electronic device performs the following steps:

    Obtaining reuse distances of a plurality of pages written in a first time period;

    The reuse distance range corresponding to each heat level is determined by clustering the reuse distances of the multiple pages.
20. The electronic device according to claim 18 or 19, characterized in that when the instruction is executed by the one or more processors, the electronic device performs the following steps:

    Predicting a second reuse distance of the second page according to a first reuse distance of the second page in the first time period, wherein the second reuse distance is used to indicate the number of write operations performed by the second page on pages other than the second page between a current moment and a next update moment;

    Determining, according to the second reuse distance and a range of reuse distances corresponding to each heat level, that the second page belongs to the first heat level;

    The second page is written to an erase block in the first set of erase blocks.
21. A chip, characterized in that the chip includes a processor and a communication interface, the communication interface is used to receive a signal and transmit the signal to the processor, and the processor processes the signal so that the method as described in any one of claims 1 to 10 is executed.
22. A computer-readable storage medium, characterized in that it includes computer instructions, and when the computer instructions are executed on an electronic device, the electronic device executes the method as claimed in any one of claims 1 to 10.
23. A computer program product, characterized in that the computer program product comprises: a computer program code, and when the computer program code is executed, the method according to any one of claims 1 to 10 is implemented.