CN117369712A - Garbage recycling method, page storage method and electronic equipment - Google Patents
Garbage recycling method, page storage method and electronic equipment Download PDFInfo
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- 238000000034 method Methods 0.000 title claims abstract description 110
- 238000004064 recycling Methods 0.000 title description 7
- 230000015654 memory Effects 0.000 claims abstract description 77
- 238000004891 communication Methods 0.000 claims description 35
- 230000006854 communication Effects 0.000 claims description 35
- 238000012545 processing Methods 0.000 claims description 15
- 238000004590 computer program Methods 0.000 claims description 12
- 239000002699 waste material Substances 0.000 claims description 4
- 238000011084 recovery Methods 0.000 claims description 3
- 230000003321 amplification Effects 0.000 abstract description 11
- 238000003199 nucleic acid amplification method Methods 0.000 abstract description 11
- 230000002035 prolonged effect Effects 0.000 abstract description 5
- 238000010586 diagram Methods 0.000 description 22
- 230000006870 function Effects 0.000 description 16
- 230000000694 effects Effects 0.000 description 8
- 230000001133 acceleration Effects 0.000 description 7
- 230000008859 change Effects 0.000 description 7
- 230000005236 sound signal Effects 0.000 description 6
- 210000000988 bone and bone Anatomy 0.000 description 5
- 238000004422 calculation algorithm Methods 0.000 description 5
- 238000010295 mobile communication Methods 0.000 description 5
- 238000004364 calculation method Methods 0.000 description 3
- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 238000009499 grossing Methods 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 238000000926 separation method Methods 0.000 description 3
- 229920001621 AMOLED Polymers 0.000 description 2
- 238000013528 artificial neural network Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 238000005457 optimization Methods 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 239000002096 quantum dot Substances 0.000 description 2
- 238000009877 rendering Methods 0.000 description 2
- 238000006467 substitution reaction Methods 0.000 description 2
- 101150053844 APP1 gene Proteins 0.000 description 1
- 101100055496 Arabidopsis thaliana APP2 gene Proteins 0.000 description 1
- 101100189105 Homo sapiens PABPC4 gene Proteins 0.000 description 1
- 102100039424 Polyadenylate-binding protein 4 Human genes 0.000 description 1
- 101100016250 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) GYL1 gene Proteins 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- 230000007175 bidirectional communication Effects 0.000 description 1
- 230000002457 bidirectional effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000036772 blood pressure Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000004927 fusion Effects 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 238000003064 k means clustering Methods 0.000 description 1
- 230000004807 localization Effects 0.000 description 1
- 238000013507 mapping Methods 0.000 description 1
- 230000001537 neural effect Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000010349 pulsation Effects 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
- 238000003786 synthesis reaction Methods 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
- 230000001960 triggered effect Effects 0.000 description 1
- 230000000007 visual effect Effects 0.000 description 1
- 230000001755 vocal effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0646—Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems
- G06F3/0652—Erasing, e.g. deleting, data cleaning, moving of data to a wastebasket
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0614—Improving the reliability of storage systems
- G06F3/0616—Improving the reliability of storage systems in relation to life time, e.g. increasing Mean Time Between Failures [MTBF]
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0638—Organizing or formatting or addressing of data
- G06F3/064—Management of blocks
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Human Computer Interaction (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Memory System (AREA)
- Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
Abstract
The application provides a garbage collection method, a page storage method and electronic equipment, wherein the garbage collection method comprises the following steps: obtaining a first score according to the number of the garbage pages in the first erase block and the speed increase of the garbage pages in the second erase block; obtaining a second fraction according to the number of the garbage pages in the second erase block and the speed increase of the garbage pages in the first erase block; and garbage collection is performed on the first erasing block under the condition that the first score is larger than the second score. Based on the scheme, the flash memory garbage collection efficiency is improved, the garbage collection speed is improved, the write amplification factor is reduced, the flash memory erasing times are reduced, and the service life of the flash memory is prolonged.
Description
Technical Field
The present application relates to the field of electronic devices, and more particularly, to a method for garbage collection, a method for page storage, and an electronic device.
Background
Flash memory is an electrically erasable programmable read-only memory (Electrically Erasable ProgrammableRead Only Memory, EEPROM).
The memory space of flash memory is divided into a number of erase blocks (erase blocks), each erase block containing a number of data pages, where new data pages can be written to free locations of the erase block in an append write. However, when the flash memory space is full, garbage collection (garbage collection, GC) operations need to be performed on certain erase blocks of the flash memory. When garbage collection is performed, the free space can be released only by erasing the whole erasing block, namely, the garbage pages in the erasing block are cleared, and then the effective pages in the erasing block and the new data pages are written into the new erasing block together.
Garbage collection efficiency refers to the proportion of garbage pages in an erased block. The higher the garbage collection efficiency is, the fewer effective pages need to be written, the faster the garbage collection operation is performed, and the fewer the erasing times are, the longer the service life of the flash memory is.
Therefore, how to improve the garbage collection efficiency of the flash memory is a problem to be solved.
Disclosure of Invention
The embodiment of the application provides a garbage collection method, a page storage method and electronic equipment, which are beneficial to improving the garbage collection efficiency of a flash memory, improving the garbage collection speed and prolonging the service life of the flash memory.
In a first aspect, there is provided a method of waste reclamation, the method comprising: obtaining a first score according to the number of the garbage pages in the first erase block and the speed increase of the garbage pages in the second erase block; obtaining a second fraction according to the number of the garbage pages in the second erase block and the speed increase of the garbage pages in the first erase block; and garbage collection is performed on the first erasing block under the condition that the first score is larger than the second score.
It should be appreciated that the first erase block and the second erase block are any two different erase blocks in the flash memory.
Based on the scheme, the erase block with the largest speed increase of the garbage page is not necessarily taken as the object of garbage collection, so that when garbage is collected next time, a large number of garbage pages can be accumulated in the erase block with the largest speed increase of the garbage page, the efficiency of the erase block when garbage is collected is higher, and the garbage collection efficiency is improved. On the other hand, the garbage collection efficiency is higher, the write amplification coefficient is reduced, the flash memory erasing times are reduced, and the service life of the flash memory is prolonged.
With reference to the first aspect, in one possible implementation manner, the first erase block belongs to a first erase block set, the first erase block is an erase block with the largest number of garbage pages in the first erase block set, the erase block in the first erase block set is used for storing pages with a first heat level, the second erase block belongs to a second erase block set, the second erase block is an erase block with the largest number of garbage pages in the second erase block set, and the erase block in the second erase block set is used for storing pages with a second heat level, and the frequency of page update with the first heat level is different from the frequency of page update with the second heat level.
It should be appreciated that each level of heat corresponds to a page stored in the erase block for the respective level of heat. Since the frequency of page update of each heat level is different, the speed increase of the garbage page in the erase block corresponding to each heat level is also different, and even obvious distinction can be realized.
Based on the scheme, the erase block with the largest speed increase of the garbage pages is not necessarily taken as the object of garbage collection, so that when garbage collection is performed next time, a large number of garbage pages can be accumulated in the erase block with the largest speed increase of the garbage pages, the efficiency of garbage collection of the erase block is high, and the garbage collection efficiency is improved. On the other hand, the garbage collection efficiency is higher, the write amplification coefficient is reduced, the flash memory erasing times are reduced, and the service life of the flash memory is prolonged. And, because the erase blocks are classified according to the heat level, the number of the erase blocks needing to be calculated is small, and the speed of determining the target erase block for garbage collection is high, so that the garbage collection speed is improved.
With reference to the first aspect, in a possible implementation manner, the method further includes: determining at least two heat levels and a range of reuse distances corresponding to each of the at least two heat levels, wherein the reuse distances are the number of write operations performed on other pages except a first page between adjacent two updating moments of the first page, and the at least two heat levels comprise the first heat level and the second heat level; and determining an erase block set corresponding to each heat level.
It should be understood that the first page is any one page. The set of erase blocks includes one or more erase blocks.
It should be appreciated that each heat level corresponds one-to-one to each range of reuse distances. The range of reuse distances corresponding to each heat level may be preset by a user or a system, or may be determined according to data of historical reuse distances.
Based on the scheme, the heat level of the page is divided based on the reuse distance, so that division of the heat level can be more accurately quantized, and garbage recycling efficiency is improved.
With reference to the first aspect, in one possible implementation manner, the determining at least two heat levels, and a range of reuse distances corresponding to each of the at least two heat levels includes: acquiring reuse distances of a plurality of pages written in a first time period; and determining the range of the reuse distance corresponding to each heat level by clustering the reuse distances of the plurality of pages.
Based on the above scheme, the range of reuse distances corresponding to the heat level can be divided according to the reuse distances of the plurality of pages written in the first time period. Therefore, the heat level is more reasonable in division, so that the data of the flash memory can be stored in a classified mode, and the garbage collection efficiency can be improved. On the other hand, the range of the reuse distance corresponding to the heat level can be updated periodically, so that the change of the hot spot of the flash memory load can be reflected.
With reference to the first aspect, in a possible implementation manner, the method further includes: predicting a second reuse distance of the second page according to one or more first reuse distances of the second page in a second time period, wherein the second reuse distance is used for indicating the number of times of writing operation on other pages except the second page between the current time and the next updated time of the second page; determining the heat level to which the second page belongs according to the second reuse distance and the range of the reuse distance corresponding to each heat level; and writing the second page into an erase block in an erase block set corresponding to the heat level to which the second page belongs.
It should be appreciated that when the second reuse distance of the second page is within the range of reuse distances corresponding to the first heat level, the page belongs to the first heat level.
Based on the scheme, all pages to be written or updated can be distinguished on the heat level, so that the erasing blocks corresponding to the heat level are written, and further, the speed increase of the garbage pages in the erasing blocks corresponding to different heat levels is obviously distinguished, and the garbage recycling efficiency is improved.
With reference to the first aspect, in one possible implementation manner, the garbage collection on the first erase block includes: extracting a valid page in the first erase block; writing the valid page into a third erase block; and erasing all pages in the first erase block.
With reference to the first aspect, in one possible implementation manner, after garbage collection is performed on the first erase block, the method further includes: writing a third page into the first erase block, the third page belonging to a third heat level; and adding the first erase block into an erase block set corresponding to the third heat level.
In a second aspect, there is provided a method of page storage, the method comprising: determining at least two heat levels and a range of reuse distances corresponding to each heat level in the at least two heat levels, wherein the reuse distances are the number of write operations performed on other pages except a first page between adjacent update moments of the first page;
and determining an erase block set corresponding to each heat level, wherein the erase block set comprises a first erase block set, the at least two heat levels comprise a first heat level, and erase blocks in the first erase block set are used for storing pages of the first heat level.
It should be understood that the first page is any one page. The set of erase blocks includes one or more erase blocks.
It should be appreciated that each heat level corresponds one-to-one to each range of reuse distances. The range of reuse distances corresponding to each heat level may be preset by a user or a system, or may be determined according to data of historical reuse distances.
Based on the scheme, the heat level of the page is divided based on the reuse distance, so that division of the heat level can be more accurately quantized, and garbage recycling efficiency is improved. With reference to the second aspect, in one possible implementation manner, the determining at least two heat levels, and a range of reuse distances corresponding to each of the at least two heat levels includes: acquiring reuse distances of a plurality of pages written in a first time period; and determining the range of the reuse distance corresponding to each heat level by clustering the reuse distances of the plurality of pages.
Based on the above scheme, the range of reuse distances corresponding to the heat level can be divided according to the reuse distances of the plurality of pages written in the first time period. Therefore, the heat level is more reasonable in division, so that the data of the flash memory can be stored in a classified mode, and the garbage collection efficiency can be improved. On the other hand, the range of the reuse distance corresponding to the heat level can be updated periodically, so that the change of the hot spot of the flash memory load can be reflected.
With reference to the second aspect, in a possible implementation manner, the method further includes: predicting a second reuse distance of a second page according to a first reuse distance of the second page in a first time period, wherein the second reuse distance is used for indicating the times of writing operation on other pages except the second page between the current time and the next updated time of the second page; determining that the second page belongs to a first heat level according to the second reuse distance and the reuse distance range corresponding to each heat level; the second page is written to an erase block in the first set of erase blocks.
It should be appreciated that when the second reuse distance of the second page is within the range of reuse distances corresponding to the first heat level, the page belongs to the first heat level.
Based on the scheme, all pages to be written or updated can be distinguished on the heat level, so that the erasing blocks corresponding to the heat level are written, and further, the speed increase of the garbage pages in the erasing blocks corresponding to different heat levels is obviously distinguished, and the garbage recycling efficiency is improved.
In a third aspect, an electronic device is provided, the electronic device comprising:
One or more processors;
one or more memories;
the one or more memories store one or more computer programs comprising instructions that, when executed by the one or more processors, cause the electronic device to:
obtaining a first score according to the number of the garbage pages in the first erase block and the speed increase of the garbage pages in the second erase block; obtaining a second fraction according to the number of the garbage pages in the second erase block and the speed increase of the garbage pages in the first erase block; and garbage collection is performed on the first erasing block under the condition that the first score is larger than the second score.
With reference to the third aspect, in one possible implementation manner, the first erase block belongs to a first erase block set, the first erase block is an erase block with the largest number of garbage pages in the first erase block set, the erase block in the first erase block set is used for storing pages with a first heat level, the second erase block belongs to a second erase block set, the second erase block is an erase block with the largest number of garbage pages in the second erase block set, and the erase block in the second erase block set is used for storing pages with a second heat level, and the frequency of page update with the first heat level is different from the frequency of page update with the second heat level.
With reference to the third aspect, in a possible implementation manner, the instructions, when executed by the one or more processors, cause the electronic device to perform the steps of: determining at least two heat levels and a range of reuse distances corresponding to each of the at least two heat levels, wherein the reuse distances are the number of write operations performed on other pages except a first page between adjacent two updating moments of the first page, and the at least two heat levels comprise the first heat level and the second heat level; and determining an erase block set corresponding to each heat level.
With reference to the third aspect, in a possible implementation manner, the instructions, when executed by the one or more processors, cause the electronic device to perform the steps of: acquiring reuse distances of a plurality of pages written in a first time period; and determining the range of the reuse distance corresponding to each heat level by clustering the reuse distances of the plurality of pages.
With reference to the third aspect, in a possible implementation manner, the instructions, when executed by the one or more processors, cause the electronic device to perform the steps of: predicting a second reuse distance of the second page according to one or more first reuse distances of the second page in a second time period, wherein the second reuse distance is used for indicating the number of times of writing operation on other pages except the second page between the current time and the next updated time of the second page; determining the heat level to which the second page belongs according to the second reuse distance and the range of the reuse distance corresponding to each heat level; and writing the second page into an erase block in an erase block set corresponding to the heat level to which the second page belongs.
With reference to the third aspect, in a possible implementation manner, the instructions, when executed by the one or more processors, cause the electronic device to perform the steps of: extracting a valid page in the first erase block; writing the valid page into a third erase block; and erasing all pages in the first erase block.
With reference to the third aspect, in a possible implementation manner, the instructions, when executed by the one or more processors, cause the electronic device to perform the steps of: writing a third page into the first erase block, the third page belonging to a third heat level; and adding the first erase block into an erase block set corresponding to the third heat level.
In a fourth aspect, there is provided an electronic device comprising:
one or more processors;
one or more memories;
the one or more memories store one or more computer programs comprising instructions that, when executed by the one or more processors, cause the electronic device to: determining at least two heat levels and a range of reuse distances corresponding to each heat level in the at least two heat levels, wherein the reuse distances are the number of write operations performed on other pages except a first page between adjacent update moments of the first page; and determining an erase block set corresponding to each heat level, wherein the erase block set comprises a first erase block set, the at least two heat levels comprise a first heat level, and erase blocks in the first erase block set are used for storing pages of the first heat level.
With reference to the fourth aspect, in a possible implementation manner, the instructions, when executed by the one or more processors, cause the electronic device to perform the following steps: acquiring reuse distances of a plurality of pages written in a first time period; and determining the range of the reuse distance corresponding to each heat level by clustering the reuse distances of the plurality of pages.
With reference to the fourth aspect, in a possible implementation manner, the instructions, when executed by the one or more processors, cause the electronic device to perform the following steps: predicting a second reuse distance of a second page according to a first reuse distance of the second page in a first time period, wherein the second reuse distance is used for indicating the times of writing operation on other pages except the second page between the current time and the next updated time of the second page; determining that the second page belongs to a first heat level according to the second reuse distance and the reuse distance range corresponding to each heat level; the second page is written to an erase block in the first set of erase blocks.
It should be understood that, specific implementation manners and beneficial effects corresponding to the above devices are described in detail in the above method embodiments, and specific reference may be made to the above method embodiments, which are not repeated herein for brevity.
In a fifth aspect, a chip is provided, the chip comprising a processor and a communication interface for receiving signals and transmitting the signals to the processor, the processor processing the signals such that the method of the first aspect and any one of the possible implementations of the first aspect is performed or such that the method of the second aspect and any one of the possible implementations of the second aspect is performed.
In a sixth aspect, a computer readable storage medium is provided, comprising computer instructions which, when run on an electronic device, cause the electronic device to perform the method as described in the first aspect and any one of the possible implementations of the first aspect, or to perform the method as described in the second aspect and any one of the possible implementations of the second aspect.
In a seventh aspect, a computer program product is provided, characterized in that the computer program product comprises: computer program code implementing the method as described in the first aspect and any possible implementation manner of the first aspect, or implementing the method as described in the second aspect and any possible implementation manner of the second aspect, when the computer program code is executed.
Drawings
Fig. 1 is a schematic structural diagram of an electronic device according to the present embodiment.
Fig. 2 is a software configuration block diagram of an electronic device according to an embodiment of the present application.
Fig. 3 is a schematic diagram of a structure of a flash memory suitable for use in embodiments of the present application.
Fig. 4 is a schematic diagram of a waste reclamation suitable for use in embodiments of the present application.
Fig. 5 is a schematic diagram of reuse distances of data pages according to an embodiment of the present application.
FIG. 6 is a schematic flow chart of a method for storing pages according to an embodiment of the present application.
FIG. 7 is a schematic flow chart diagram of another example page store method provided by an embodiment of the present application.
Fig. 8 is a schematic flow chart of a method for garbage collection provided in an embodiment of the present application.
Fig. 9 is a schematic diagram of an example of a procedure for writing a page according to an embodiment of the present application.
Fig. 10 is a schematic diagram of another example of a page writing process according to an embodiment of the present application.
Fig. 11 is a schematic diagram of an example of garbage collection effect under different policies according to an embodiment of the present application.
Fig. 12 is a schematic diagram of an effect of garbage collection under different policies according to another embodiment of the present application.
Fig. 13 is a schematic diagram of the effect of garbage collection under different space utilization rates according to the embodiment of the present application.
Fig. 14 is a schematic diagram of a hardware structure of an apparatus provided in an embodiment of the present application.
Detailed Description
The terminology used in the following embodiments is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in the specification and the appended claims, the singular forms "a," "an," "the," and "the" are intended to include, for example, "one or more" such forms of expression, unless the context clearly indicates to the contrary. It should also be understood that in the various embodiments herein below, "at least one", "one or more" means one, two or more than two. The term "and/or" is used to describe an association relationship of associated objects, meaning that there may be three relationships; for example, a and/or B may represent: a alone, a and B together, and B alone, wherein A, B may be singular or plural. The character "/" generally indicates that the context-dependent object is an "or" relationship.
Reference in the specification to "one embodiment" or "some embodiments" or the like means that a particular feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the application. Thus, appearances of the phrases "in one embodiment," "in some embodiments," "in other embodiments," and the like in the specification are not necessarily all referring to the same embodiment, but mean "one or more but not all embodiments" unless expressly specified otherwise. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless expressly specified otherwise.
Embodiments of electronic devices and methods for using such electronic devices are described below. In some embodiments, the electronic device may be a portable electronic device such as a cell phone, tablet computer, wearable electronic device (e.g., smart watch) with wireless communication capabilities, etc., that also includes other functionality such as personal digital assistant and/or music player functionality. Exemplary embodiments of portable electronic devices include, but are not limited to, a tapLoad carrierOr other operating system. The portable electronic device may also be other portable electronic devices such as a Laptop computer (Laptop) or the like. It should also be appreciated that in other embodiments, the electronic device described above may not be a portable electronic device, but rather a desktop computer.
Exemplary, fig. 1 shows a schematic structural diagram of an electronic device 100 according to an embodiment of the present application. For example, as shown in fig. 1, the electronic device 100 may include a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (universal serial bus, USB) interface 130, a charge management module 140, a power management module 141, a battery 142, an antenna 1, an antenna 2, a mobile communication module 150, a wireless communication module 160, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, an earphone interface 170D, a sensor module 180, keys 190, a motor 191, an indicator 192, a camera 193, a display 194, a subscriber identity module (subscriber identification module, SIM) card interface 195, and the like. The sensor module 180 may include a pressure sensor 180A, a gyro sensor 180B, an air pressure sensor 180C, a magnetic sensor 180D, an acceleration sensor 180E, a distance sensor 180F, a proximity sensor 180G, a fingerprint sensor 180H, a temperature sensor 180J, a touch sensor 180K, an ambient light sensor 180L, a bone conduction sensor 180M, and the like.
It is to be understood that the structure illustrated in the embodiments of the present application does not constitute a specific limitation on the electronic device 100. In other embodiments of the present application, electronic device 100 may include more or fewer components than shown, or certain components may be combined, or certain components may be split, or different arrangements of components. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.
The processor 110 may include one or more processing units, such as: the processor 110 may include an application processor (application processor, AP), a modem processor, a graphics processor (graphics processing unit, GPU), an image signal processor (image signal processor, ISP), a controller, a memory, a video codec, a digital signal processor (digital signal processor, DSP), a baseband processor, and/or a neural network processor (neural-network processing unit, NPU), etc. Wherein the different processing units may be separate devices or may be integrated in one or more processors.
The controller may be a neural hub and a command center of the electronic device 100, among others. The controller can generate operation control signals according to the instruction operation codes and the time sequence signals to finish the control of instruction fetching and instruction execution.
A memory may also be provided in the processor 110 for storing instructions and data. In some embodiments, the memory in the processor 110 is a cache memory. The memory may hold instructions or data that the processor 110 has just used or recycled. If the processor 110 needs to reuse the instruction or data, it can be called directly from the memory. Repeated accesses are avoided and the latency of the processor 110 is reduced, thereby improving the efficiency of the system.
In some embodiments, the processor 110 may include one or more interfaces. The interfaces may include an integrated circuit (inter-integrated circuit, I2C) interface, an integrated circuit built-in audio (inter-integrated circuit sound, I2S) interface, a pulse code modulation (pulse code modulation, PCM) interface, a universal asynchronous receiver transmitter (universal asynchronous receiver/transmitter, UART) interface, a mobile industry processor interface (mobile industry processor interface, MIPI), a general-purpose input/output (GPIO) interface, a subscriber identity module (subscriber identity module, SIM) interface, and/or a universal serial bus (universal serial bus, USB) interface, among others.
The I2C interface is a bidirectional synchronous serial bus, and includes a serial data line (SDA) and a serial clock line (derail clock line, SCL).
The I2S interface may be used for audio communication. In some embodiments, the processor 110 may contain multiple sets of I2S buses. The processor 110 may be coupled to the audio module 170 via an I2S bus to enable communication between the processor 110 and the audio module 170.
PCM interfaces may also be used for audio communication to sample, quantize and encode analog signals. In some embodiments, the audio module 170 and the wireless communication module 160 may be coupled through a PCM bus interface.
The UART interface is a universal serial data bus for asynchronous communications. The bus may be a bi-directional communication bus. It converts the data to be transmitted between serial communication and parallel communication. In some embodiments, a UART interface is typically used to connect the processor 110 with the wireless communication module 160.
The MIPI interface may be used to connect the processor 110 to peripheral devices such as a display 194, a camera 193, and the like. The GPIO interface may be configured by software.
The GPIO interface may be configured as a control signal or as a data signal. In some embodiments, a GPIO interface may be used to connect the processor 110 with the camera 193, the display 194, the wireless communication module 160, the audio module 170, the sensor module 180, and the like.
The USB interface 130 is an interface conforming to the USB standard specification, and may specifically be a Mini USB interface, a Micro USB interface, a USB Type C interface, or the like. The USB interface 130 may be used to connect a charger to charge the electronic device 100, and may also be used to transfer data between the electronic device 100 and a peripheral device.
It should be understood that the interfacing relationship between the modules illustrated in the embodiments of the present application is only illustrative, and does not limit the structure of the electronic device 100. In other embodiments of the present application, the electronic device 100 may also use different interfacing manners, or a combination of multiple interfacing manners in the foregoing embodiments.
The charge management module 140 is configured to receive a charge input from a charger. The charger can be a wireless charger or a wired charger. In some wired charging embodiments, the charge management module 140 may receive a charging input of a wired charger through the USB interface 130. In some wireless charging embodiments, the charge management module 140 may receive wireless charging input through a wireless charging coil of the electronic device 100. The charging management module 140 may also supply power to the electronic device through the power management module 141 while charging the battery 142.
The power management module 141 is used for connecting the battery 142, and the charge management module 140 and the processor 110.
The wireless communication function of the electronic device 100 may be implemented by the antenna 1, the antenna 2, the mobile communication module 150, the wireless communication module 160, a modem processor, a baseband processor, and the like.
The mobile communication module 150 may provide a solution for wireless communication including 2G/3G/4G/5G, etc., applied to the electronic device 100.
The modem processor may include a modulator and a demodulator. The modulator is used for modulating the low-frequency baseband signal to be transmitted into a medium-high frequency signal. The demodulator is used for demodulating the received electromagnetic wave signal into a low-frequency baseband signal. The demodulator then transmits the demodulated low frequency baseband signal to the baseband processor for processing. The low frequency baseband signal is processed by the baseband processor and then transferred to the application processor. The application processor outputs sound signals through an audio device (not limited to the speaker 170A, the receiver 170B, etc.), or displays images or video through the display screen 194. In some embodiments, the modem processor may be a stand-alone device. In other embodiments, the modem processor may be provided in the same device as the mobile communication module 150 or other functional module, independent of the processor 110.
The wireless communication module 160 may provide solutions for wireless communication including wireless local area network (wireless local area networks, WLAN) (e.g., wireless fidelity (wireless fidelity, wi-Fi) network), bluetooth (BT), global navigation satellite system (global navigation satellite system, GNSS), frequency modulation (frequency modulation, FM), near field wireless communication technology (near field communication, NFC), infrared technology (IR), etc., as applied to the electronic device 100.
In some embodiments, antenna 1 and mobile communication module 150 of electronic device 100 are coupled, and antenna 2 and wireless communication module 160 are coupled, such that electronic device 100 may communicate with a network and other devices through wireless communication techniques.
The electronic device 100 implements display functions through a GPU, a display screen 194, an application processor, and the like. The GPU is a microprocessor for image processing, and is connected to the display 194 and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. Processor 110 may include one or more GPUs that execute program instructions to generate or change display information.
The display screen 194 is used to display images, videos, and the like. The display 194 includes a display panel. The display panel may be a liquid crystal display (liquid crystal display, LCD), or a display panel made of one of organic light-emitting diode (OLED), active-matrix organic light-emitting diode (AMOLED), flexible light-emitting diode (flex), miniled, microLed, micro-OLED, or quantum dot light-emitting diode (quantum dot light emitting diodes, QLED). In some embodiments, the electronic device 100 may include 1 or N display screens 194, N being a positive integer greater than 1. In some embodiments, the display screen 194 may also integrate touch functionality, which may also be referred to as a touch screen.
The electronic device 100 may implement photographing functions through an ISP, a camera 193, a video codec, a GPU, a display screen 194, an application processor, and the like.
The external memory interface 120 may be used to connect an external memory card, such as a Micro SD card, to enable expansion of the memory capabilities of the electronic device 100.
The internal memory 121 may be used to store computer executable program code that includes instructions. The processor 110 executes various functional applications of the electronic device 100 and data processing by executing instructions stored in the internal memory 121.
The electronic device 100 may implement audio functions through an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, an earphone interface 170D, an application processor, and the like. Such as music playing, recording, etc.
The audio module 170 is used to convert digital audio information into an analog audio signal output and also to convert an analog audio input into a digital audio signal. The speaker 170A, also referred to as a "horn," is used to convert audio electrical signals into sound signals. A receiver 170B, also referred to as a "earpiece", is used to convert the audio electrical signal into a sound signal. Microphone 170C, also referred to as a "microphone" or "microphone", is used to convert sound signals into electrical signals. The earphone interface 170D is used to connect a wired earphone.
The pressure sensor 180A is used to sense a pressure signal, and may convert the pressure signal into an electrical signal. In some embodiments, the pressure sensor 180A may be disposed on the display screen 194. The gyro sensor 180B may be used to determine a motion gesture of the electronic device 100. The air pressure sensor 180C is used to measure air pressure. In some embodiments, electronic device 100 calculates altitude from barometric pressure values measured by barometric pressure sensor 180C, aiding in positioning and navigation. The acceleration sensor 180E may detect the magnitude of acceleration of the electronic device 100 in various directions (typically three axes). A distance sensor 180F for measuring a distance. The fingerprint sensor 180H is used to collect a fingerprint. The touch sensor 180K, also referred to as a "touch panel". The touch sensor 180K may be disposed on the display screen 194, and the touch sensor 180K and the display screen 194 form a touch screen, which is also called a "touch screen". The bone conduction sensor 180M may acquire a vibration signal. In some embodiments, bone conduction sensor 180M may acquire a vibration signal of a human vocal tract vibrating bone pieces. The bone conduction sensor 180M may also contact the pulse of the human body to receive the blood pressure pulsation signal.
The keys 190 include a power-on key, a volume key, etc. The motor 191 may generate a vibration cue. The indicator 192 may be an indicator light, may be used to indicate a state of charge, a change in charge, a message indicating a missed call, a notification, etc. The SIM card interface 195 is used to connect a SIM card.
Fig. 2 is a software configuration block diagram of the electronic device 100 according to the embodiment of the present application. The layered architecture divides the software into several layers, each with distinct roles and branches. The layers communicate with each other through a software interface. In some embodiments, the Android system is divided into four layers, from top to bottom, an application layer, an application framework layer, an Zhuoyun row (Android run) and system libraries, and a kernel layer, respectively. The application layer may include a series of application packages.
As shown in fig. 2, the application package may include applications such as camera, gallery, calendar, phone call, map, navigation, WLAN, bluetooth, music, video, short message, APP1, APP2, etc.
The application framework layer provides an application programming interface (application programming interface, API) and programming framework for application programs of the application layer. The application framework layer includes a number of predefined functions.
As shown in FIG. 2, the application framework layer may include a window manager, a content provider, a view system, a telephony manager, a resource manager, a notification manager, and the like.
The window manager is used for managing window programs. The window manager can acquire the size of the display screen, judge whether a status bar exists, lock the screen, intercept the screen and the like.
The content provider is used to store and retrieve data and make such data accessible to applications. The data may include video, images, audio, calls made and received, browsing history and bookmarks, phonebooks, etc.
The view system includes visual controls, such as controls to display text, controls to display pictures, and the like. The view system may be used to build applications. The display interface may be composed of one or more views. For example, a display interface including a text message notification icon may include a view displaying text and a view displaying a picture.
The telephony manager is used to provide the communication functions of the electronic device 100. Such as the management of call status (including on, hung-up, etc.).
The resource manager provides various resources for the application program, such as localization strings, icons, pictures, layout files, video files, and the like.
The notification manager allows the application to display notification information in a status bar, can be used to communicate notification type messages, can automatically disappear after a short dwell, and does not require user interaction. Such as notification manager is used to inform that the download is complete, message alerts, etc. The notification manager may also be a notification in the form of a chart or scroll bar text that appears on the system top status bar, such as a notification of a background running application, or a notification that appears on the screen in the form of a dialog window. For example, a text message is prompted in a status bar, a prompt tone is emitted, the electronic device vibrates, and an indicator light blinks, etc.
Android runtimes include core libraries and virtual machines. Android run time is responsible for scheduling and management of the Android system.
The core library consists of two parts: one part is a function which needs to be called by java language, and the other part is a core library of android.
The application layer and the application framework layer run in a virtual machine. The virtual machine executes java files of the application program layer and the application program framework layer as binary files. The virtual machine is used for executing the functions of object life cycle management, stack management, thread management, security and exception management, garbage collection and the like.
The system library may include a plurality of functional modules. For example: surface manager (surface manager), media library (media library), three-dimensional graphics processing library (e.g., openGL ES), 2D graphics engine (e.g., SGL), etc.
The surface manager is used to manage the display subsystem and provides a fusion of 2D and 3D layers for multiple applications.
Media libraries support a variety of commonly used audio, video format playback and recording, still image files, and the like. The media library may support a variety of audio video encoding formats, such as: MPEG4, h.264, MP3, AAC, AMR, JPG, PNG, etc.
The three-dimensional graphic processing library is used for realizing three-dimensional graphic drawing, image rendering, synthesis, layer processing and the like.
The 2D graphics engine is a drawing engine for 2D drawing.
The kernel layer is a layer between hardware and software. The kernel layer may contain display drivers, camera drivers, audio drivers, sensor drivers.
It should be understood that the electronic device in the embodiment of the present application may also be an electronic device with an operating system such as Windows, linux, android, hong, apple, or the like.
For ease of understanding, the technical terms referred to in this application are explained and described below in connection with fig. 3, 4 and 5.
Fig. 3 is a schematic diagram of a structure of a flash memory suitable for use in embodiments of the present application. Wherein blocks filled with white may represent erase blocks and blocks filled with dot patterns may represent pages of data. Referring to fig. 3, the entire storage space of a flash memory device is divided into a number of erase blocks, each of which may store a number of pages of data. The page of data is typically written to the free location of the erase block in an append write. When the memory space of the flash memory device is insufficient, garbage collection may be required for some of the erase blocks therein. I.e. garbage collection is performed in units of erase blocks, free space is freed by erasing the entire erase block.
Fig. 4 is a schematic diagram of a waste reclamation suitable for use in embodiments of the present application. Wherein the squares filled with diagonal patterns may represent garbage pages, the squares filled with dot patterns may represent valid pages, and the squares filled with dot patterns may represent free pages or free space.
The bare flash file system is a file system of an on-board NAND bare flash chip on an embedded system, such as bare flash file systems of UBIFS, YAFFS2, JFFS, and the like. Pages of data may be written into erase blocks in a log structured manner. To avoid interference with other data stored on the erase block during garbage collection, a policy may be employed for off-site updating. When the data page needs to be updated, the bare flash file system writes the new data page into a new erasing block, and replaces the old page with the page containing the new data by modifying the index pointer corresponding to the data page, so that the page containing the old data is invalid.
In the embodiment of the application, the page containing new data is marked as a valid page, and the page containing old data is marked as a garbage page. A garbage page may also be referred to as a dirty page, an invalid page. The garbage page becomes a free page after garbage recovery, and the data can be rewritten.
In the embodiment of the application, the page and the data page may also be called a data block, the valid page may also be called valid data, and the garbage page may also be called invalid data.
Referring to fig. 4, when garbage collection is performed, a target erase block is first selected as an object of garbage collection, then valid pages in the target erase block are read and identified, and the valid pages in the target erase block are written into a new erase block with free space, or the valid pages are loaded into a main memory, or the valid pages are loaded into other memory spaces, and finally all data in the target erase block are cleared to free space.
Garbage collection efficiency is defined as the ratio of the number of garbage pages to the default total number of pages of an erase block. The higher garbage collection efficiency, the more garbage pages in the erase block, meaning that the fewer valid pages that need to be moved each time garbage is collected, the faster the garbage collection speed. Further, higher garbage collection efficiency means fewer erasures and longer flash life. If the garbage collection is inefficient, it may also cause serious write amplification problems. The write amplification (write amplification, WA), abbreviated as write amplification, is a bad phenomenon in flash memory and Solid State Disk (SSD), i.e., the amount of physical data actually written is multiple times the amount of data written.
In the traditional scheme, pages with different heat degrees are placed in different erase blocks through cold-hot separation placement of data pages. For example, data pages may be divided into hot pages and cold pages according to access frequency, and hot pages are concentrated within a hot erase block and cold pages are concentrated in a cold erase block, such that the hot erase block has a higher proportion of junk pages than the cold erase block. When the file system triggers garbage collection, the most erased blocks of the garbage page are often selected. However, this selection strategy may result in a smaller number of garbage pages for the selected target erase block, and lower garbage collection efficiency. Even if the data pages are placed in a cold-hot separation mode, the garbage collection efficiency can be rapidly reduced.
In addition, the existing cold-hot separation method has the problems of high resource cost, inaccurate classification of heat level, incapability of quickly identifying hot spot changes and the like. For example, least recently used page replacement algorithm (least recently used, LRU), least recently used page replacement algorithm (least frequently used, LFU) ordering requires maintaining hot management meta-information for all pages of the file system, which is more memory intensive. For LFU, when the condition of hot spot change of the data set is faced, the data page with high access frequency history accumulation amount can still be regarded as a hot page in a future period, so that a certain hysteresis exists in identifying the page hot change.
The following describes the solution provided in the embodiments of the present application with reference to fig. 5-13.
Fig. 5 is a schematic diagram of reuse distances of data pages according to an embodiment of the present application. In the embodiment of the application, the number of writing operations of the file system between two continuous updating of a certain data page in the file system is defined as the reuse distance of the data page. Referring to fig. 5, the horizontal axis represents the write sequence number of the file system, and the vertical axis represents the heat of the page.
It will be appreciated that between two successive updates of a page, the file system may also write to other pages, taking the number of times the file system writes to other pages as the reuse distance for that page.
Illustratively, each time a page is written, the write sequence number of the page is recorded, and when the page is written again, a reuse distance of the page can be obtained according to the write sequence number when the page is written twice.
Illustratively, as shown in FIG. 5, where page 501 is between the first update and the second update, the file system has written to other pages 5 times, and then the reuse distance of page 501 between the first update and the second update is 5; page 502 is written 11 times to other pages by the file system between the first update and the second update, and then the reuse distance of page 502 between the first update and the second update is 11; page 503 has been written 100 times to other pages by the file system between the first update and the second update, and then page 503 has a reuse distance of 100 between the first update and the second update. Wherein the average reuse distance of page 501 between two adjacent updates is the shortest, the average reuse distance of page 502 between two adjacent updates is centered, and the average reuse distance of page 503 between two adjacent updates is the longest. The heat of page 501 is highest, and the heat of page 502 is next lowest, page 503.
It will be appreciated that a page with a shorter reuse distance represents a higher frequency of updates to the page, i.e., a higher heat level for the page. The longer the reuse distance of a page, the lower the frequency of updating the page, i.e., the lower the heat of the page.
It should be appreciated that the number of write operations performed by the file system to other pages may also be the number of updates to other pages.
Fig. 6 is a schematic flow chart of a method 600 provided by an embodiment of the present application. The method 600 is mainly used for classifying heat levels when flash data is classified and stored. Referring to fig. 6, the method 600 may include the steps of:
s610, obtaining reuse distances of a plurality of pages written in a first time period.
Illustratively, during a first period of time, each time a page is written, the reuse distance between the current update and the last update of the page is recorded.
S620, determining at least two heat levels by clustering reuse distances of a plurality of pages.
In the embodiment of the application, the data set of the multiple page reuse distances can be divided into multiple subsets through a clustering method, so that the difference of the reuse distances of each subset is maximum. The user or system may preset the number of subsets, i.e. the number of heat levels, e.g. two cold, hot, or three cold, warm, hot. That is, the user or system may pre-determine at least two heat levels and then determine a range of reuse distances corresponding to each heat level by a clustering method.
It should be understood that the reuse distance range corresponding to the subset obtained by clustering is used as the division basis of each heat level.
It should be appreciated that each subset corresponds to a range of reuse distances and also to a heat level.
Illustratively, the UBIFS file system performs 16000 writes during a first time period. Reuse interval clustering for pages written last 16000 times. Clustering reuse distances of pages written for 16000 times, and dividing the reuse distances into hot pages with the reuse distances smaller than 3500 times when the number of the designated hot grades is 3; the reuse distance is between 3500 times and 11000 times, which is warm page, and the reuse distance is more than 11000 times, which is cold page.
In the embodiment of the present application, the clustering method may use, for example, a K-Means clustering algorithm (K-Means) or a natural breakpoint method (natural break), and the clustering method is not limited in the present application.
In some embodiments, step S620 is re-performed every first period of time. That is, embodiments of the present application may periodically update the range of reuse distances corresponding to each heat level.
In some embodiments, the system and user may preset a range of reuse distances for each heat level. For example, the user may estimate the range of reuse distances for each heat level based on empirically or experimentally derived conclusions, with exemplary reuse distances less than 4000 divided into hot pages; the reuse distance is between 4000 and 10000 times as warm pages, and the reuse distance is more than 10000 times as cold pages.
In some embodiments, the heat level may also be divided by other means and the heat level to which the data page belongs is determined.
In one possible implementation, the heat level may also be divided according to the number of data page updates per unit time, and the heat level of the data page is determined.
Illustratively, the data page having a number of updates per unit time less than the first threshold is a cold page; the number of times of updating in unit time is larger than or equal to a first threshold value, and the data page smaller than or equal to a second threshold value is Wen Yemian; the data page with the number of updates per unit time being greater than the second threshold is a hot page.
In one possible implementation, the heat level may also be divided according to the accumulated access (update) frequency of the data page history, and the heat level of the data page is determined.
Illustratively, the data pages for which the historically accumulated access frequency is greater than the first threshold are hot pages; the data page with the history accumulated access frequency smaller than the first threshold value is a cold page.
In one possible implementation, the number of write operations to the data page and the heat level may also be divided and the heat level of the data page may be determined based on the last N operations of the file system.
For example, in the last N writing operations of the file system to a data page, if M writing operations are performed to a certain page, the heat of the page is M/N. When the heat is greater than a first threshold, the page is a hot page; when the heat is less than the first threshold, the page is a cold page.
S630, determining an erasure block set corresponding to each heat level.
In S630, each of the at least two heat levels may be assigned its corresponding set of erase blocks.
It should be appreciated that each heat level may correspond to a set of erase blocks, each of which may include one or more erase blocks.
In some embodiments, the number of erase blocks corresponding to each heat level may be determined from a distribution of the number of pages of each heat level over a first period of time. For example, in the first time period, the number of pages of the first heat level is the largest, and the number of erase blocks corresponding to the first heat level is the largest; the number of pages of the second heat level is the smallest, and the number of erase blocks corresponding to the second heat level is the smallest.
In some embodiments, in determining the erase block to which the first heat level corresponds, the erase blocks that once correspond to other heat levels than the first heat level are preferentially selected. For example, if the first erase block corresponds to a cold page, then the first erase block is preferentially selected when determining the erase block corresponding to the hot page.
It should be appreciated that the erase blocks in the set of erase blocks corresponding to each level of heat are used to store pages for that level of heat. For example, an erase block in the set of erase blocks corresponding to the first level of heat is used to store pages of the first level of heat. Alternatively, the hot erase blocks in the hot erase block set are used to store hot pages and the cold erase blocks in the cold erase block set are used to store cold pages.
Fig. 7 is a schematic flow chart of a method 700 provided by an embodiment of the present application. The method 700 is primarily used to store written pages into erase blocks of a corresponding heat level. Referring to fig. 7, the method 700 may include the steps of:
s710, predicting a second reuse distance of the second page according to the first reuse distance of the second page in the second time period.
Before the second page is written into the flash memory, a possible reuse distance of the second page in the future needs to be predicted in order to determine the heat level to which the second page belongs.
It should be appreciated that the second page is any page that needs to be written or updated.
It should be appreciated that the first reuse distance is a reuse distance of the second page over a second period of time. The second page may be updated multiple times during the second period, that is, the number of first reuse distances may be multiple.
It should be appreciated that the second reuse distance is the number of times the file system writes to other pages between the current time and the time the second page is next updated.
In predicting the second reuse distance of the second page, a method of taking a weighted average of the plurality of first reuse distances in the first time period, or predicting the time sequence, or a historical data index smoothing method, etc. may be adopted.
It should be noted that, time series prediction, which may also be called time series prediction, may be used to predict the value of a certain index in a future period of time given its historical value change. Similar to the historical data exponential smoothing method, the numerical value of the index in a future period is predicted according to the historical data.
S720, determining the heat level to which the second page belongs according to the second reuse distance and the range of the reuse distance corresponding to each heat level.
Specifically, when the second reuse distance is within the reuse distance range corresponding to a certain heat level, it is determined that the second page belongs to the heat level.
For example, when the second reuse distance is less than or equal to 3500 times, the second page is determined to be the first heat level, or the second page is determined to be a hot page.
And S730, writing the second page into the erase block corresponding to the heat level to which the second page belongs.
In S630, its corresponding set of erase blocks is determined for each heat level, or its corresponding erase block is determined for each heat level. In S730, when writing the second page, it may be first searched whether there is enough space in the erase block corresponding to the heat level to which the second page belongs to store the second page, and if so, the second page is written in the erase block.
The second page is illustratively of a first heat level, the first heat level corresponding to a first set of erase blocks, the first set of erase blocks including a first erase block, when the second page is written, traversing erase blocks in the first set of erase blocks, and writing the second page to the first erase block if the first erase block has sufficient space.
In some embodiments, if there is not enough space in the erase block corresponding to the heat level of the second page, a garbage collection operation may be triggered to erase the target erase block, and the second page is written into the target erase block.
In some embodiments, when writing the second page to the target erase block, the target erase block is added to the set of erase blocks corresponding to the level of heat to which the second page belongs. Fig. 8 is a schematic flow chart of a method 800 provided by an embodiment of the present application. The method 800 is primarily for determining target erase blocks for garbage collection. Referring to fig. 8, the method 800 includes:
S810, obtaining a first score according to the number of the garbage pages in the first erasing block and the speed increase of the garbage pages in the second erasing block.
S820, obtaining a second fraction according to the number of the garbage pages in the second erase block and the speed increase of the garbage pages in the first erase block.
In performing garbage collection, a target erase block for garbage collection may be determined in the following manner. Assuming that q erase blocks exist in the flash memory, the total erase block set eb= { EB 1 ,EB 2 ,EB 3 ······EB q The number of Garbage pages per erase block in the total set of erase blocks is denoted as garge (EB i ) The acceleration of the garbage page of each erase block is noted as V (EB i ) Each erase block in the total set of erase blocks is scored according to the following formula, and the erase block with the largest score is garbage collected.
Score(EB i )=max{Garbage(EB i )×(1+V(EB i ))}
Wherein, score (EB i ) Representing erase block EB i Score, EB of (2) i ∈EB,EB j E EB, and EB j ≠EB i ,i≤q,j≤q。
In the embodiment of the present application, for a certain erase block, in the last N write operations of the file system, the increasing number of the garbage pages in the erase block is P, and then the increasing speed of the garbage pages in the erase block is P/N.
In some embodiments, the acceleration of the garbage page in the erase block is: the number of garbage pages in the erase block increases per unit time.
Illustratively, when the flash memory is running, the number of the garbage pages in the erase block is recorded at a first moment, and then the number of the garbage pages in the erase block is recorded at a second moment, so that the speed increase of the garbage pages in the erase block can be obtained through calculation.
In some embodiments, the acceleration of the garbage page in the erase block is: in the last N write operations of the file system, the increased number of garbage pages in the erase block.
Illustratively, when the flash memory is running, the number of the garbage pages in the erase block is recorded when the first writing operation of the file system (or the xth time, X is a positive integer greater than or equal to zero) is recorded, and then when the nth writing operation of the file system (N is a positive integer greater than X) is recorded, the number of the garbage pages in the erase block can be obtained through calculation.
In the embodiment of the application, the speed increase of the garbage page in a certain erase block can be calculated for multiple times, and the speed increase of the real garbage page of the erase block can be used as the speed increase of the garbage page by methods such as average value taking, weighted average, historical data index smoothing algorithm and the like.
Based on the scheme, the erase block with the largest speed increase of the garbage pages is not necessarily taken as the object of garbage collection, so that when garbage collection is performed next time, a large number of garbage pages can be accumulated in the erase block with the largest speed increase of the garbage pages, the efficiency of garbage collection of the erase block is high, and the garbage collection efficiency is improved. On the other hand, the garbage collection efficiency is higher, the write amplification coefficient is reduced, the flash memory erasing times are reduced, and the service life of the flash memory is prolonged.
In some embodiments, assume that there are K heat levels, numbered {1,2, & gtK }, respectively. For each erasure block set corresponding to each heat level, the erasure block with the largest number of junk pages in each erasure block set is taken out to form a candidate erasure block set CEB= { CEB 1 ,CEB 2 ,CEB 3 ······CEB k },
The number of junk pages for each erase block in the set of candidate erase blocks is noted as garba (CEB) i ) The acceleration of the garbage page of each erase block is noted as V (CEB i ) Each erase block in the candidate set of erase blocks is scored according to the following formula, and the erase block with the largest score is garbage collected.
Score(CEB i )=max{Garbage(CEB i )×(1+V(CEB i ))}
Wherein Score (CEB) i ) Representing erasure Block CEB i Score of CEB i ∈CEB,CEB j E CEB, and CEB j ≠CEB i ,i≤q,j≤q。
It should be appreciated that each level of heat corresponds to a page stored in the erase block for the respective level of heat. Since the frequency of page update of each heat level is different, the speed increase of the garbage page in the erase block corresponding to each heat level is also different, and even obvious distinction can be realized.
Based on the scheme, the erase block with the largest speed increase of the garbage pages is not necessarily taken as the object of garbage collection, so that when garbage collection is performed next time, a large number of garbage pages can be accumulated in the erase block with the largest speed increase of the garbage pages, the efficiency of garbage collection of the erase block is high, and the garbage collection efficiency is improved. On the other hand, the garbage collection efficiency is higher, the write amplification coefficient is reduced, the flash memory erasing times are reduced, and the service life of the flash memory is prolonged. And, because the erase blocks are classified according to the heat level, the number of the erase blocks in the candidate erase block set is small, and the speed of determining the target erase block for garbage collection is high, so that the garbage collection speed is improved.
And S830, garbage collection is carried out on the first erasing block under the condition that the first score is larger than the second score.
Alternatively, when garbage collection is performed on the first erase block, the valid pages in the first erase block may be first extracted, and the valid pages may be written into the third erase block, and all the pages in the first erase block may be erased.
Alternatively, when garbage collection is performed on the first erase block, the valid pages in the first erase block may be first extracted, and the valid pages are loaded into other storage spaces, and all pages in the first erase block are erased.
Optionally, after garbage collection is performed on the first erase block, a third page that needs to be written or needs to be updated may also be written into the first erase block, and if the third page belongs to the third heat level, the first erase block is added to the erase block set corresponding to the third heat level.
It should be appreciated that garbage collection may be performed at any time, and is not necessarily limited to when there is insufficient space in a flash or erase block, such as when the file system is idle.
Fig. 9 is a schematic diagram of a flow when a file system according to an embodiment of the present application writes a page.
S901, according to the index of the fourth page, the meta information of the fourth page is searched.
When writing the fourth page, the file system first looks for meta-information for that page based on the index. If the fourth page has no index, an index is created, the writing sequence number of the fourth page is recorded, and the future reuse distance of the fourth page is reset to-1.
It should be appreciated that the fourth page may be any page that needs to be written to or updated.
S902, predicting the future reuse distance of the fourth page according to the information related to the reuse distance in the meta-information.
Step S902 may refer to the related description of step S710, and is not described herein for brevity.
S903, determining the heat level of the fourth page according to the future reuse distance of the fourth page.
Step S903 may refer to the related description of step S720, which is not repeated herein for brevity.
It should be understood that the fourth page may be a page with any heat level, and the heat level of the fourth page is not limited in this application.
It should be noted that if the future reuse distance of the fourth page is reset to-1, the page is a cold page.
The fourth page is taken as a hot page as an example.
S904, judging whether the erasure block corresponding to the hot log head has enough space.
Because the file system writes the page into the erasing block of the flash memory in a log structure mode, and the fourth page is a hot page, when writing the fourth page, firstly judging whether the erasing block corresponding to the hot log head has enough space.
S905, if the erasure block corresponding to the hot log head has enough space, writing the fourth page into the write buffer of the hot log head, and writing the fourth page into the erasure block corresponding to the hot log head.
S906, updating the physical address of the fourth page in the meta information of the fourth page.
Specifically, after the fourth page is successfully written into the erase block corresponding to the hot log header, the mapping relationship from the logical address to the physical position of the data page is recorded in the file system page index structure. That is, the file pointer of the fourth page is pointed to the erase block written in step S905.
S907, if the corresponding erasing block of the thermal log head has insufficient space, judging whether the thermal erasing block set has the thermal erasing block with sufficient space.
S908, if there are enough hot erase blocks in the hot erase block set, the hot log head is switched to a new hot erase block with enough space.
After step S907 and step S908, the routine returns to step S904.
S909, if there is no thermal erase block with enough space in the set of thermal erase blocks, triggering garbage collection, erasing all data pages of the target erase block, and switching the thermal log head to the target erase block.
Specifically, the garbage collection method provided by the embodiment of the application can be used for garbage collection. For example, the erase block with the largest number of garbage pages in the erase block set corresponding to each heat level may be selected to form a candidate erase block set, then each erase block in the candidate erase blocks is scored, the erase block with the highest score is selected as the target erase block, and garbage collection is performed. And after all the data pages of the target erase block are erased, switching the erase block corresponding to the hot log head to the target erase block.
After step S907 and step S909, the process returns to step S904.
Fig. 10 is a schematic diagram of a flow of writing a page according to an embodiment of the present application. Referring to fig. 10, when the fifth page needs to be written or updated, a reuse distance between the time of the current update and the time of the last update of the fifth page is recorded and transferred to the heat ranking module.
The heat level classification module can periodically classify heat levels and determine the range of the reuse distance corresponding to each heat level. For example, the heat level classification module clusters reuse distances of a plurality of written pages in a first time period every first time period to obtain at least two sets of reuse distance ranges, wherein each set of reuse distance range corresponds to one heat level.
The reuse distance prediction module may predict a future reuse distance of the fifth page according to one or more historical reuse distances of the fifth page, that is, predict how many write operations may be performed by the file system between a current update and a next update of the fifth page.
And determining the heat level of the fifth page according to the future reuse distance of the fifth page and the range of the corresponding reuse distance of each heat level, and writing the fifth page into the erasing blocks with enough space in the erasing block set corresponding to the heat level. For example, the fifth page is a cold page, and the fifth page is written into a cold erase block.
If any one of the erase blocks in the set of erase blocks corresponding to the heat level does not have enough space, the target erase block selection module will select the target erase block for garbage collection. In performing garbage collection operations, a target erase block may be selected by the method of the embodiment shown in FIG. 8. For brevity, the description is omitted here. After garbage collection is performed on the target erase block, a fifth page is written into the target erase block.
Optionally, after writing the fifth page into the target erase block, adding the target erase block into the erase block set corresponding to the heat level to which the fifth page belongs.
Fig. 11 is a schematic diagram of the effect of garbage collection under different policies provided in the embodiments of the present application. Fig. 12 is a schematic diagram of the effect of garbage collection under another different strategy provided in the embodiment of the present application. Fig. 11 and 12 show write-only test results on the UBIFS file system of 64MB and 128MB spatial sizes, respectively. The scheme provided by the embodiment of the application is to fill the black pattern; filling white patterns, wherein the heat level is not divided, and the policy for garbage collection is a greedy policy, namely, always selecting the erase block with the largest garbage page number for garbage collection; the patterns filled with left oblique lines are classified into heat grades, and the strategy for garbage recovery is a greedy strategy; the right diagonal pattern is filled to divide the heat level, and the policy of garbage collection is a trade-off policy.
In contrast, in the scheme provided by the embodiment of the application, the write amplification factor is reduced by 9% -16%, the garbage recycling efficiency is improved by 10% -19%, and the flash memory erasing times are reduced by 10% -17%.
Fig. 13 is a schematic diagram of the effect of garbage collection under different space utilization rates according to the embodiment of the present application. The solution of the present application and the conventional solution are implemented on the UBIFS file system, as shown in fig. 13, where the solution using the present application (the dashed line in the figure) has a different degree of performance optimization compared to the conventional solution (the solid line in the figure). With the increase of space utilization, the write amplification of two file systems becomes more serious, the garbage collection efficiency is reduced, and the erasing times are increased, but the scheme of the application has an optimization effect under different file system space utilization compared with the traditional scheme.
The various embodiments described herein may be separate solutions or may be combined according to inherent logic, which fall within the scope of the present application. For example, method 600, method 700, method 800 may be used in combination or independently. For example, the method 600 and the method 700 are adopted to realize the division of heat level and the classified storage of flash memory data, and other manners are adopted to determine the object (target erasure block) of garbage collection; alternatively, the heat level classification and the classified storage of the flash memory data are realized in other manners, and the method 800 is adopted to determine the object (the target erase block) of garbage collection; alternatively, the method 600 and the method 700 are adopted to realize the division of heat level and the classified storage of flash memory data, and the method 800 is adopted to determine the object (target erase block) of garbage collection.
The method provided in the embodiment of the present application is described in detail above with reference to fig. 5 to 13. The device provided in the embodiment of the present application is described in detail below with reference to fig. 14. It should be understood that the descriptions of the apparatus embodiments and the descriptions of the method embodiments correspond to each other, and thus, descriptions of details not described may be referred to the above method embodiments, which are not repeated herein for brevity.
Fig. 14 is a schematic hardware structure of an apparatus 1400 according to an embodiment of the present application. The apparatus 1400 shown in fig. 14 (the apparatus 1400 may be an electronic device in particular) includes a memory 1410, a processor 1420, a communication interface 1430, and a bus 1440. Wherein the memory 1410, the processor 1420, and the communication interface 1430 implement communication connection therebetween through a bus 1440.
The memory 1410 may be a ROM, a static storage device, a dynamic storage device, or a RAM. The memory 1410 may store a program, and when the program stored in the memory 1410 is executed by the processor 1420, the processor 1420 is configured to perform the steps of the garbage collection method and the page storage method according to the embodiment of the present application.
The processor 1420 may employ a general-purpose CPU, microprocessor, ASIC, GPU, or one or more integrated circuits for executing associated programs to perform the functions required by the elements in the apparatus 1400 or to perform the methods of garbage collection, page storage, etc. of the method embodiments of the present application.
Processor 1420 may also be an integrated circuit chip with signal processing capabilities. In implementation, the steps of the garbage collection method and the page storage method of the present application may be implemented by hardware integrated logic circuits in the processor 1420 or instructions in the form of software. The processor 1420 may also be a general purpose processor, DSP, ASIC, FPGA or other programmable logic device, discrete gate or transistor logic device, discrete hardware components. The disclosed methods, steps, and logic blocks in the embodiments of the present application may be implemented or performed. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. The steps of a method disclosed in connection with the embodiments of the present application may be embodied directly in hardware, in a decoded processor, or in a combination of hardware and software modules in a decoded processor. The software modules may be located in a random access memory, flash memory, read only memory, programmable read only memory, or electrically erasable programmable memory, registers, etc. as well known in the art. The storage medium is located in the memory 1410, and the processor 1420 reads the information in the memory 1410, and in combination with its hardware, performs the functions required to be performed by the units included in the apparatus 1400 of the embodiment of the present application, or performs the method for garbage collection and the method for page storage of the embodiment of the method of the present application.
Communication interface 1430 enables communication between apparatus 1400 and other devices or communication networks using transceiving apparatus such as, but not limited to, transceivers.
Bus 1440 may include a path for transferring information between components of device 1400 (e.g., memory 1410, processor 1420, communication interface 1430).
It should be noted that although the apparatus 1400 shown in fig. 14 only shows memory, processor, communication interfaces, those skilled in the art will appreciate that in a particular implementation, the apparatus 1400 also includes other devices necessary to achieve proper operation. Also, as will be appreciated by those of skill in the art, the apparatus 1400 may also include hardware devices that implement other additional functions, as desired. Furthermore, it will be appreciated by those skilled in the art that the apparatus 1400 may also include only the devices necessary to implement the embodiments of the present application, and not necessarily all of the devices shown in fig. 14.
The embodiment of the application also provides a chip, which comprises a processor and a communication interface, wherein the communication interface is used for receiving signals and transmitting the signals to the processor, and the processor processes the signals so that the garbage collection method and the page storage method as described in any one of the possible implementation modes are executed.
The present embodiment also provides a computer-readable storage medium having stored therein computer instructions that, when executed on a computer, cause the garbage collection method and the page storage method in the above embodiments to be performed.
The present embodiment also provides a computer program product which, when run on a computer, causes the computer to perform the above-described related steps, such that the method of garbage collection, the method of page storage in the above-described embodiments are performed.
The above embodiments may be used alone or in combination with each other to achieve different technical effects.
Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
The present embodiment may divide the functional modules of the electronic device according to the above method example, for example, each functional module may be divided corresponding to each function, or two or more functions may be integrated into one processing module. The integrated modules described above may be implemented in hardware. It should be noted that, in this embodiment, the division of the modules is schematic, only one logic function is divided, and another division manner may be implemented in actual implementation.
It will be clear to those skilled in the art that, for convenience and brevity of description, specific working procedures of the above-described systems, apparatuses and units may refer to corresponding procedures in the foregoing method embodiments, and are not repeated herein.
In the several embodiments provided in this application, it should be understood that the disclosed systems, devices, and methods may be implemented in other manners. For example, the apparatus embodiments described above are merely illustrative, e.g., the division of the units is merely a logical function division, and there may be additional divisions when actually implemented, e.g., multiple units or components may be combined or integrated into another system, or some features may be omitted or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in each embodiment of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit.
The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer-readable storage medium. Based on such understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution, in the form of a software product stored in a storage medium, including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a read-only memory (ROM), a random access memory (random access memory, RAM), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
The foregoing is merely specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily think about changes or substitutions within the technical scope of the present application, and the changes and substitutions are intended to be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
Claims (23)
1. A method of waste recovery, the method comprising:
obtaining a first score according to the number of the garbage pages in the first erase block and the speed increase of the garbage pages in the second erase block;
obtaining a second fraction according to the number of the garbage pages in the second erase block and the speed increase of the garbage pages in the first erase block;
and garbage collection is performed on the first erasing block under the condition that the first score is larger than the second score.
2. The method of claim 1 wherein the first erase block belongs to a first set of erase blocks, the first erase block being the erase block of the first set of erase blocks having the largest number of garbage pages, the erase block of the first set of erase blocks being for storing pages of a first heat level,
The second erase block belongs to a second erase block set, the second erase block is the erase block with the largest number of garbage pages in the second erase block set, the erase block in the second erase block set is used for storing pages with a second heat level, and the frequency of updating the pages with the first heat level is different from the frequency of updating the pages with the second heat level.
3. The method according to claim 2, wherein the method further comprises:
determining at least two heat levels and a range of reuse distances corresponding to each of the at least two heat levels, wherein the reuse distances are the number of write operations performed on other pages except a first page between adjacent two updating moments of the first page, and the at least two heat levels comprise the first heat level and the second heat level;
and determining an erase block set corresponding to each heat level.
4. A method according to claim 3, wherein said determining at least two heat levels, and a range of reuse distances for each of said at least two heat levels, comprises:
Acquiring reuse distances of a plurality of pages written in a first time period;
and determining the range of the reuse distance corresponding to each heat level by clustering the reuse distances of the plurality of pages.
5. The method according to claim 3 or 4, characterized in that the method further comprises:
predicting a second reuse distance of the second page according to one or more first reuse distances of the second page in a second time period, wherein the second reuse distance is used for indicating the number of times of writing operation on other pages except the second page between the current time and the next updated time of the second page;
determining the heat level to which the second page belongs according to the second reuse distance and the range of the reuse distance corresponding to each heat level;
and writing the second page into an erase block in an erase block set corresponding to the heat level to which the second page belongs.
6. The method of any of claims 1-5, wherein garbage collection of the first erase block comprises:
extracting a valid page in the first erase block;
writing the valid page into a third erase block;
And erasing all pages in the first erase block.
7. The method of any of claims 1-6, wherein after garbage collection of the first erase block, the method further comprises:
writing a third page into the first erase block, the third page belonging to a third heat level;
and adding the first erase block into an erase block set corresponding to the third heat level.
8. A method of page storage, the method comprising:
determining at least two heat levels and a range of reuse distances corresponding to each heat level in the at least two heat levels, wherein the reuse distances are the number of write operations performed on other pages except a first page between adjacent update moments of the first page;
and determining an erase block set corresponding to each heat level, wherein the erase block set comprises a first erase block set, the at least two heat levels comprise a first heat level, and erase blocks in the first erase block set are used for storing pages of the first heat level.
9. The method of claim 8, wherein the determining at least two heat levels, and the range of reuse distances for each of the at least two heat levels, comprises:
Acquiring reuse distances of a plurality of pages written in a first time period;
and determining the range of the reuse distance corresponding to each heat level by clustering the reuse distances of the plurality of pages.
10. The method according to claim 8 or 9, characterized in that the method further comprises:
predicting a second reuse distance of a second page according to a first reuse distance of the second page in a first time period, wherein the second reuse distance is used for indicating the times of writing operation on other pages except the second page between the current time and the next updated time of the second page;
determining that the second page belongs to a first heat level according to the second reuse distance and the reuse distance range corresponding to each heat level;
the second page is written to an erase block in the first set of erase blocks.
11. An electronic device, the electronic device comprising:
one or more processors;
one or more memories;
the one or more memories store one or more computer programs comprising instructions that, when executed by the one or more processors, cause the electronic device to:
Obtaining a first score according to the number of the garbage pages in the first erase block and the speed increase of the garbage pages in the second erase block;
obtaining a second fraction according to the number of the garbage pages in the second erase block and the speed increase of the garbage pages in the first erase block;
and garbage collection is performed on the first erasing block under the condition that the first score is larger than the second score.
12. The electronic device of claim 11, wherein the first erase block belongs to a first set of erase blocks, the first erase block being the largest number of garbage pages in the first set of erase blocks, the erase blocks in the first set of erase blocks being for storing pages of a first heat level,
the second erase block belongs to a second erase block set, the second erase block is the erase block with the largest number of garbage pages in the second erase block set, the erase block in the second erase block set is used for storing pages with a second heat level, and the frequency of updating the pages with the first heat level is different from the frequency of updating the pages with the second heat level.
13. The electronic device of claim 12, wherein the instructions, when executed by the one or more processors, cause the electronic device to perform the steps of:
Determining at least two heat levels and a range of reuse distances corresponding to each of the at least two heat levels, wherein the reuse distances are the number of write operations performed on other pages except a first page between adjacent two updating moments of the first page, and the at least two heat levels comprise the first heat level and the second heat level;
and determining an erase block set corresponding to each heat level.
14. The electronic device of claim 13, wherein the instructions, when executed by the one or more processors, cause the electronic device to perform the steps of:
acquiring reuse distances of a plurality of pages written in a first time period;
and determining the range of the reuse distance corresponding to each heat level by clustering the reuse distances of the plurality of pages.
15. The electronic device of claim 13 or 14, wherein the instructions, when executed by the one or more processors, cause the electronic device to perform the steps of:
predicting a second reuse distance of the second page according to one or more first reuse distances of the second page in a second time period, wherein the second reuse distance is used for indicating the number of times of writing operation on other pages except the second page between the current time and the next updated time of the second page;
Determining the heat level to which the second page belongs according to the second reuse distance and the range of the reuse distance corresponding to each heat level;
and writing the second page into an erase block in an erase block set corresponding to the heat level to which the second page belongs.
16. The electronic device of claims 11-15, wherein the instructions, when executed by the one or more processors, cause the electronic device to perform the steps of:
extracting a valid page in the first erase block;
writing the valid page into a third erase block;
and erasing all pages in the first erase block.
17. The electronic device of claims 11-16, wherein the instructions, when executed by the one or more processors, cause the electronic device to perform the steps of:
writing a third page into the first erase block, the third page belonging to a third heat level;
and adding the first erase block into an erase block set corresponding to the third heat level.
18. An electronic device, the electronic device comprising:
one or more processors;
One or more memories;
the one or more memories store one or more computer programs comprising instructions that, when executed by the one or more processors, cause the electronic device to:
determining at least two heat levels and a range of reuse distances corresponding to each heat level in the at least two heat levels, wherein the reuse distances are the number of write operations performed on other pages except a first page between adjacent update moments of the first page;
and determining an erase block set corresponding to each heat level, wherein the erase block set comprises a first erase block set, the at least two heat levels comprise a first heat level, and erase blocks in the first erase block set are used for storing pages of the first heat level.
19. The electronic device of claim 18, wherein the instructions, when executed by the one or more processors, cause the electronic device to perform the steps of:
acquiring reuse distances of a plurality of pages written in a first time period;
and determining the range of the reuse distance corresponding to each heat level by clustering the reuse distances of the plurality of pages.
20. The electronic device of claim 18 or 19, wherein the instructions, when executed by the one or more processors, cause the electronic device to perform the steps of:
predicting a second reuse distance of a second page according to a first reuse distance of the second page in a first time period, wherein the second reuse distance is used for indicating the times of writing operation on other pages except the second page between the current time and the next updated time of the second page;
determining that the second page belongs to a first heat level according to the second reuse distance and the reuse distance range corresponding to each heat level;
the second page is written to an erase block in the first set of erase blocks.
21. A chip comprising a processor and a communication interface for receiving signals and transmitting the signals to the processor, the processor processing the signals such that the method of any of claims 1 to 10 is performed.
22. A computer readable storage medium comprising computer instructions which, when run on an electronic device, cause the electronic device to perform the method of any one of claims 1 to 10.
23. A computer program product, the computer program product comprising: computer program code which, when executed, implements the method according to any of claims 1 to 10.
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