WO2024078494A1 - 线程管理方法、装置、电子设备及存储介质 - Google Patents

线程管理方法、装置、电子设备及存储介质 Download PDF

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Publication number
WO2024078494A1
WO2024078494A1 PCT/CN2023/123780 CN2023123780W WO2024078494A1 WO 2024078494 A1 WO2024078494 A1 WO 2024078494A1 CN 2023123780 W CN2023123780 W CN 2023123780W WO 2024078494 A1 WO2024078494 A1 WO 2024078494A1
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thread
cpu
abnormal
small core
abnormal thread
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PCT/CN2023/123780
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English (en)
French (fr)
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李亮亮
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维沃移动通信有限公司
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Publication of WO2024078494A1 publication Critical patent/WO2024078494A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • G06F9/5044—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering hardware capabilities
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/329—Power saving characterised by the action undertaken by task scheduling
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Definitions

  • the present application belongs to the technical field of electronic equipment, and specifically relates to a thread management method, device, electronic equipment and storage medium.
  • the CPU Central Processing Unit
  • the CPU has insufficient computing power, and the threads are placed on the CPU's large core for execution, while the CPU's large core frequency is increased.
  • the above operations will cause a sharp increase in system power consumption, causing the temperature of electronic devices to rise, the standby time to decrease, and the phenomenon of freezing, resulting in reduced performance of electronic devices.
  • the purpose of the embodiments of the present application is to provide a thread management method, device, electronic device and storage medium, which can solve the problem of reduced performance of electronic devices when an application thread enters an infinite loop.
  • an embodiment of the present application provides a thread management method, the method comprising:
  • the type of the abnormal thread is obtained, wherein the duration of the abnormal thread occupying the central processing unit CPU exceeds a threshold;
  • the abnormal thread is adjusted to the small core of the CPU for processing, wherein the non-interactive thread includes at least one of the following: a thread unrelated to interface display and a thread unrelated to user interaction.
  • an embodiment of the present application provides a thread management device, the device comprising:
  • An acquisition module configured to acquire the type of an abnormal thread when an abnormal thread is detected, wherein the duration for which the abnormal thread occupies the CPU exceeds a threshold
  • a processing module is used to call the abnormal thread when the abnormal thread is a non-interactive thread.
  • the small core of the CPU is used for processing, wherein the non-interactive thread includes at least one of the following: a thread unrelated to interface display and a thread unrelated to user interaction.
  • an embodiment of the present application provides an electronic device, which includes a processor and a memory, wherein the memory stores programs or instructions that can be run on the processor, and when the program or instructions are executed by the processor, the steps of the method described in the first aspect are implemented.
  • an embodiment of the present application provides a readable storage medium, on which a program or instruction is stored.
  • the program or instruction is executed by a processor, the steps of the method described in the first aspect are implemented.
  • an embodiment of the present application provides a chip, comprising a processor and a communication interface, wherein the communication interface is coupled to the processor, and the processor is used to run a program or instruction to implement the method described in the first aspect.
  • an embodiment of the present application provides a computer program product, which is stored in a storage medium and is executed by at least one processor to implement the method described in the first aspect.
  • the type of the abnormal thread when an abnormal thread is detected, the type of the abnormal thread is obtained, wherein the length of time the abnormal thread occupies the CPU exceeds a threshold; when the type of the abnormal thread is a non-interactive thread, the abnormal thread is adjusted to a small core of the CPU for processing, wherein the non-interactive thread includes at least one of the following: a thread not related to interface display and a thread not related to user interaction.
  • the abnormal thread adjusted to be processed on the small core of the CPU is a thread that is irrelevant to the user's intuitive perception, and the power consumption of the small core of the CPU is much lower than the power consumption of the large core of the CPU, the above-mentioned abnormal thread that enters the dead loop is adjusted to the small core of the CPU for processing. This can save system power consumption without the user's perception, avoid device temperature rise, reduced battery life, and possible freezes, thereby improving the working performance of the electronic device.
  • FIG1 is a flowchart of a thread management method according to an embodiment of the present application.
  • FIG2 is a schematic diagram of an abnormal thread running on a small core of a CPU provided by an embodiment of the present application
  • FIG3 is a second flowchart of the thread management method provided in an embodiment of the present application.
  • FIG4 is a structural block diagram of a thread management device provided in an embodiment of the present application.
  • FIG5 is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application.
  • FIG. 6 is a schematic diagram of the hardware structure of an electronic device implementing various embodiments of the present application.
  • first”, “second”, etc. in the specification and claims of this application are used to distinguish similar objects, rather than to describe a particular order or precedence. It should be understood that the terms used in this way are interchangeable where appropriate, so that the embodiments of the application can be implemented in an order other than those illustrated or described herein, and that "first”, “second”, etc. are not used to describe a particular order or sequence.
  • the objects distinguished by “and/or” are usually of one type, and the number of objects is not limited.
  • the first object can be one or more.
  • “and/or” in the specification and claims means at least one of the connected objects, and the character “/" generally means that the related objects are in an "or” relationship.
  • the embodiments of the present application provide a thread management method, device, electronic device and storage medium, so as to save the power consumption of the system and improve the working performance of the electronic device without affecting the user experience.
  • the central processing unit is the computing and control core of the computer system and the final execution unit for information processing and program running.
  • An infinite loop also known as an abnormal infinite loop, is a behavior in which an application thread keeps executing a certain section of code without actively giving up the CPU for a long time.
  • the big and small cores of the CPU are a heterogeneous architecture used by electronic devices to balance performance and power consumption.
  • electronic devices usually contain a CPU, which includes a large core and a small core.
  • the large core of the CPU is used to perform heavy-load tasks through high frequency and hyper-threading, and the small core of the CPU is used to perform lighter-load tasks as well as multi-threaded performance throughput and coordination capabilities.
  • CPU computing power is the processing power of the CPU, which is related to the size of the CPU core and the frequency.
  • the thread management method provided in the embodiment of the present application is applicable to electronic devices.
  • the electronic devices may include: mobile terminals such as smart phones, tablet computers, personal digital assistants, etc., and the embodiment of the present application does not limit this.
  • FIG. 1 is one of the flowcharts of the thread management method provided in the embodiment of the present application. As shown in FIG. 1 , the method may include the following steps: step 101 and step 102;
  • step 101 when an abnormal thread is detected, the type of the abnormal thread is obtained, wherein the duration of the abnormal thread occupying the central processing unit exceeds a threshold.
  • the abnormal thread is a thread that enters an infinite loop.
  • the system service thread in the electronic device can monitor the length of time that the thread of the currently running application occupies the CPU, and compare the length of time that the CPU is occupied with a pre-set threshold. If the length of time that the thread of the application occupies the CPU exceeds the threshold, the thread is determined to have entered an infinite loop, that is, the thread is determined to be an abnormal thread.
  • the preset threshold is at the second level to determine whether the thread enters an infinite loop rather than insufficient computing power.
  • the resulting execution speed is slow.
  • the setting of the threshold is mainly based on the following considerations: the implementation logic of the thread is usually event-driven, or interacts with other threads, and the normal operation of the thread usually does not exceed a dozen milliseconds before giving up the CPU.
  • the system judges that the computing power is insufficient in milliseconds. Generally, if a CPU continues to run for more than tens of milliseconds, the system will give the computing power to the maximum. However, if a thread continues to run for more than tens of seconds, it will have a relatively large impact on power consumption. At this time, it is considered that the thread has entered an infinite loop and needs to be processed.
  • the threads of the application can be divided into two categories: interactive threads and non-interactive threads, wherein the interactive threads are threads that the user can intuitively perceive, and the non-interactive threads are threads that the user cannot intuitively perceive.
  • the non-interactive threads include at least one of the following: threads that are not related to the interface display and threads that are not related to user interaction.
  • interface display refers to displaying content on the screen of an electronic device, for example, displaying a video playback screen, a game interface, or a meeting interface
  • user interaction refers to contact operations, gesture operations, or voice interactions between a user and an electronic device, for example, clicking on the screen of an electronic device, sliding on the screen of an electronic device, or inputting voice commands.
  • step 102 when the abnormal thread is a non-interactive thread, the abnormal thread is adjusted to a small core of a central processing unit for processing, wherein the non-interactive thread includes at least one of the following: a thread not related to interface display and a thread not related to user interaction.
  • the abnormal thread for an abnormal thread that enters an infinite loop, it is determined whether the abnormal thread is a non-interactive thread. If the abnormal thread is a non-interactive thread, the abnormal thread is adjusted to the small core of the CPU for processing. Since the computing power and frequency of the small core of the CPU are much lower than those of the large core of the CPU, the purpose of saving power consumption of the system can be achieved without affecting the user experience.
  • the type of the abnormal thread when an abnormal thread is detected, the type of the abnormal thread is obtained, wherein the length of time the abnormal thread occupies the CPU exceeds a threshold; when the type of the abnormal thread is a non-interactive thread, the abnormal thread is adjusted to the small core of the CPU for processing, wherein the non-interactive thread includes at least one of the following: a thread that is not related to the interface display and a thread that is not related to user interaction.
  • the abnormal thread adjusted to be processed on the small core of the CPU is a thread that is not related to the user's intuitive perception, and the power consumption of the small core of the CPU is much lower than the power consumption of the large core of the CPU, the above abnormal thread that enters a dead loop is adjusted to the small core of the CPU for processing, which can save the system's power consumption without the user's perception, avoid the device temperature rising, the battery life reduction, and the possible jamming problem, and improve the working performance of the electronic device.
  • step 102 includes the following steps: step 201 and step 202;
  • step 201 the abnormal thread is migrated to a small core of the CPU.
  • the operating system of the electronic device such as the Android system
  • step 202 when the abnormal thread is running on the small core of the CPU, the time length for which the abnormal thread occupies the small core of the CPU is limited.
  • the abnormal thread when the abnormal thread runs on the small core of the CPU, the abnormal thread can be controlled to occupy the small core of the CPU in part of the time period and be in a dormant state in the remaining time period, giving up the small core of the CPU to reduce the CPU The power consumption of the small core is reduced, thereby reducing the power consumption of the system.
  • step 202 includes the following steps: step 2021 and step 2022;
  • step 221 the running time of the abnormal thread in each statistical period is set.
  • a statistical period can be set for the abnormal thread, and the statistical period is usually at the millisecond level, such as 32 milliseconds, 64 milliseconds, etc.
  • the running time is the accumulated running time, such as 8 milliseconds, 10 milliseconds, etc.
  • step 2022 in each statistical period, when the accumulated time duration of the abnormal thread occupying the small core of the CPU reaches the running time duration, the abnormal thread is controlled to enter a dormant state.
  • the abnormal thread is controlled to enter a dormant state.
  • the cumulative time that the abnormal thread occupies the small core of the CPU is restarted, and when the running time is reached, the abnormal thread is controlled to enter a dormant state.
  • the cumulative time that the abnormal thread occupies the small core of the CPU is restarted, and when the running time is reached, the abnormal thread is controlled to enter a dormant state.
  • the cumulative time that the abnormal thread occupies the small core of the CPU is restarted, and when the running time is reached, the abnormal thread is controlled to enter a dormant state. This process is repeated and continued until the application to which the abnormal thread belongs is closed.
  • step 202 includes the following steps: step 2023;
  • step 2023 when the system task has been completed, the length of time that the abnormal thread occupies the small core of the CPU is limited, wherein the system task is a task triggered by a system timer, and each time the system timer is interrupted, the system task is triggered once.
  • a system timer is set in the electronic device.
  • the system timer will be interrupted once at a certain period of time.
  • the system timer of an electronic device with an Android system is usually interrupted every 4 milliseconds. Every time the system timer is interrupted, the system will interrupt the running application, switch to the corresponding interrupt code, execute the corresponding system scheduling processing function, maintain some system status and other information, and after processing these system tasks, the interrupt will exit, return to the user state, and continue to run the application that was interrupted last time.
  • the kernel lock may be held when processing system tasks, in the locked state, forcibly limiting the length of time that the abnormal thread occupies the small core of the CPU, such as putting the thread into a dormant state, may cause a deadlock problem in the system. Therefore, in the embodiment of the present application, before completing each system task and returning to the user state, the length of time that the abnormal thread occupies the small core of the CPU is limited.
  • an appropriate time can be selected to limit the time that the abnormal thread occupies the CPU's small core, so as to avoid system operation abnormalities due to limiting the use time of the abnormal thread's CPU small core.
  • the provided thread management method may further include the following steps based on the embodiment shown in FIG. 1 : Step 103;
  • step 103 when the type of the abnormal thread is a non-interactive thread, the abnormal thread is marked.
  • an abnormal thread entering an infinite loop can be marked in a variety of ways.
  • the identifier of the abnormal thread may be saved in a thread control block of the kernel through a system interface.
  • abnormal threads may be stored in a specific group so that the system can distinguish whether a thread is an abnormal thread by grouping, wherein this approach does not require adding fields to the thread control block.
  • the abnormal thread that enters the dead loop is marked so that the abnormal thread to be marked can be adjusted to the small core of the CPU for processing according to the marking information, and before returning to the user state after executing the system task, it is convenient to determine whether the thread to be executed is an abnormal thread according to the marking information. If it is an abnormal thread, corresponding restriction processing is performed to improve the work efficiency of the system.
  • FIG3 is a second flowchart of the thread management method provided in an embodiment of the present application. As shown in FIG3 , the method may include the following steps: step 301, step 302, step 303, step 304, step 305, step 306, step 307 and step 308;
  • step 301 the length of time that a thread of a currently running application occupies a central processing unit is monitored.
  • step 302 based on the time the CPU is occupied, it is determined whether there is an abnormal thread that has entered an infinite loop; if so, step 303 is executed; otherwise, the process returns to step 301.
  • step 303 it is determined whether the abnormal thread is a non-interactive thread; if so, step 304 is executed; otherwise, the process returns to step 301 .
  • step 304 the abnormal thread is marked.
  • step 305 the abnormal thread is migrated to the small core of the central processing unit.
  • step 306 after the system task is completed and before returning to the user state, it is determined whether the currently running thread is a marked abnormal thread; if so, step 307 is executed, otherwise, the process returns to step 301 .
  • step 307 it is determined whether the accumulated time duration of the abnormal thread occupying the small core of the central processor in the current statistical period reaches the set running time duration; if so, step 308 is executed; otherwise, the process returns to step 301 .
  • step 308 the system's sleep interface is called to control the abnormal thread to enter a sleep state.
  • the above solution for limiting the time that the abnormal thread occupies the small core of the CPU can be reused on the large core of the CPU. That is, when the abnormal thread that enters a dead loop runs on the large core of the CPU, the time that the abnormal thread occupies the large core of the CPU can be limited to reduce system power consumption.
  • the thread management method provided in the embodiment of the present application can be executed by a thread management device.
  • the thread management device provided in the embodiment of the present application is described by taking the thread management method executed by the thread management device as an example.
  • FIG. 4 is a structural block diagram of a thread management device provided in an embodiment of the present application.
  • the thread management device 400 may include: an acquisition module 401 and a processing module 402;
  • the acquisition module 401 is used to acquire the type of the abnormal thread when an abnormal thread is detected, wherein the duration of the abnormal thread occupying the CPU exceeds a threshold;
  • the processing module 402 is used to adjust the abnormal thread to the small core of the CPU for processing when the type of the abnormal thread is a non-interactive thread, wherein the non-interactive thread includes at least one of the following: a thread unrelated to interface display and a thread unrelated to user interaction.
  • the type of the abnormal thread when an abnormal thread is detected, the type of the abnormal thread is obtained, wherein the length of time the abnormal thread occupies the CPU exceeds a threshold; when the type of the abnormal thread is a non-interactive thread, the abnormal thread is adjusted to the small core of the CPU for processing, wherein the non-interactive thread includes at least one of the following: a thread that is not related to the interface display and a thread that is not related to user interaction.
  • the abnormal thread adjusted to be processed on the small core of the CPU is a thread that is not related to the user's intuitive perception, and the power consumption of the small core of the CPU is much lower than the power consumption of the large core of the CPU, the above abnormal thread that enters a dead loop is adjusted to the small core of the CPU for processing, which can save the system's power consumption without the user's perception, avoid the device temperature rising, the battery life reduction, and the possible jamming problem, and improve the working performance of the electronic device.
  • the processing module 401 may include:
  • a migration submodule used for migrating the abnormal thread to a small core of the CPU
  • the control submodule is used to limit the time length that the abnormal thread occupies the small core of the CPU when the abnormal thread runs on the small core of the CPU.
  • control submodule may include:
  • a setting unit used to set the running time of the abnormal thread in each statistical period
  • the first control unit is used to control the abnormal thread to enter a dormant state when the accumulated time duration of the abnormal thread occupying the small core of the CPU reaches the running time duration in each statistical period.
  • control submodule may include:
  • the second control unit is used to limit the time period that the abnormal thread occupies the small core of the CPU when the system task has been completed, wherein the system task is a task triggered by a system timer, and each time the system timer is interrupted, the system task is triggered once.
  • the thread management device in the embodiment of the present application can be an electronic device or a component in the electronic device, such as an integrated circuit or a chip.
  • the electronic device can be a terminal or other devices other than a terminal.
  • the electronic device can be a mobile phone, a tablet computer, a laptop computer, a PDA, a car-mounted electronic device, a mobile Internet device (Mobile Internet Device, MID), an augmented reality (augmented reality, AR)/virtual reality (virtual reality, VR) device, a robot, a wearable device, an ultra-mobile personal computer (ultra-mobile personal computer, UMPC), a netbook or a personal digital assistant (personal digital assistant, PDA), etc.
  • NAS Network Attached Storage
  • PC personal computer
  • TV television
  • teller machine a self-service machine
  • the thread management device in the embodiment of the present application may be a device having an operating system.
  • the operating system may be an Android operating system, an iOS operating system, or other possible operating systems, which are not specifically limited in the embodiment of the present application.
  • the thread management device provided in the embodiment of the present application can implement each process implemented by the method embodiment of Figure 1. To avoid repetition, it will not be repeated here.
  • an embodiment of the present application also provides an electronic device 500, including a processor 501 and a memory 502, and the memory 502 stores a program or instruction that can be executed on the processor 501.
  • the program or instruction is executed by the processor 501, the various steps of the above-mentioned thread management method embodiment are implemented, and the same technical effect can be achieved. To avoid repetition, it will not be repeated here.
  • the electronic devices in the embodiments of the present application include the mobile electronic devices and non-mobile electronic devices mentioned above.
  • FIG. 6 is a schematic diagram of the hardware structure of an electronic device implementing various embodiments of the present application.
  • the electronic device 600 includes but is not limited to: a radio frequency unit 601, a network module 602, an audio output unit 603, an input unit 604, a sensor 605, a display unit 606, a user input unit 607, an interface unit 608, a memory 609, and a processor 610.
  • the electronic device 600 may also include a power source (such as a battery) for supplying power to each component, and the power source may be logically connected to the processor 610 through a power management system, so that the power management system can manage charging, discharging, and power consumption.
  • a power source such as a battery
  • the electronic device structure shown in FIG6 does not constitute a limitation on the electronic device, and the electronic device may include more or fewer components than shown, or combine certain components, or arrange components differently, which will not be described in detail here.
  • the processor 610 is used to obtain the type of the abnormal thread when an abnormal thread is detected, wherein the time duration occupied by the abnormal thread in the central processing unit CPU exceeds a threshold; when the type of the abnormal thread is a non-interactive thread, the abnormal thread is adjusted to the small core of the CPU for processing, wherein the non-interactive thread includes at least one of the following: a thread not related to the interface display and a thread not related to the user interaction.
  • the abnormal thread adjusted to be processed on the small core of the CPU is a thread that is irrelevant to the user's intuitive perception, and the power consumption of the small core of the CPU is much lower than the power consumption of the large core of the CPU, the above-mentioned abnormal thread that enters the dead loop is adjusted to the small core of the CPU for processing. This can save system power consumption without the user's perception, avoid device temperature rise, reduced battery life, and possible freezes, thereby improving the working performance of the electronic device.
  • the processor 610 is further used to migrate the abnormal thread to the small core of the CPU; when the abnormal thread runs on the small core of the CPU, limit the time the abnormal thread occupies the small core of the CPU.
  • the processor 610 is also used to set the running time of the abnormal thread in each statistical period; in each statistical period, when the cumulative time that the abnormal thread occupies the small core of the CPU reaches the running time, the abnormal thread is controlled to enter a sleep state.
  • the processor 610 is also used to limit the length of time that the abnormal thread occupies the small core of the CPU when the system task has been completed, wherein the system task is a task triggered by a system timer, and each time the system timer is interrupted, the system task is triggered once.
  • the input unit 604 may include a graphics processing unit (GPU) 6041 and a microphone 6042.
  • the graphics processing unit 6041 is used for the video capture mode or the image capture mode.
  • the image data of the static picture or video obtained by the image capture device (such as a camera) is processed.
  • the display unit 606 may include a display panel 6061, and the display panel 6061 may be configured in the form of a liquid crystal display, an organic light emitting diode, etc.
  • the user input unit 607 includes a touch panel 6071 and at least one of other input devices 6072.
  • the touch panel 6071 is also called a touch screen.
  • the touch panel 6071 may include two parts: a touch detection device and a touch controller.
  • Other input devices 6072 may include, but are not limited to, a physical keyboard, function keys (such as volume control keys, switch keys, etc.), a trackball, a mouse, and a joystick, which will not be repeated here.
  • the memory 609 can be used to store software programs and various data.
  • the memory 609 may mainly include a first storage area for storing programs or instructions and a second storage area for storing data, wherein the first storage area may store an operating system, an application program or instructions required for at least one function (such as a sound playback function, an image playback function, etc.), etc.
  • the memory 609 may include a volatile memory or a non-volatile memory, or the memory 609 may include both volatile and non-volatile memories.
  • the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory.
  • the volatile memory may be a random access memory (RAM), a static random access memory (SRAM), a dynamic random access memory (DRAM), a synchronous dynamic random access memory (SDRAM), a double data rate synchronous dynamic random access memory (DDRSDRAM), an enhanced synchronous dynamic random access memory (ESDRAM), a synchronous link dynamic random access memory (SLDRAM) and a direct memory bus random access memory (DRRAM).
  • the memory 609 in the embodiment of the present application includes but is not limited to these and any other suitable types of memories.
  • the processor 610 may include one or more processing units; optionally, the processor 610 integrates an application processor and a modem processor, wherein the application processor mainly processes operations related to an operating system, a user interface, and application programs, and the modem processor mainly processes wireless communication signals, such as a baseband processor. It is understandable that the modem processor may not be integrated into the processor 610.
  • An embodiment of the present application also provides a readable storage medium, on which a program or instruction is stored.
  • a program or instruction is stored.
  • the various processes of the above-mentioned thread management method embodiment are implemented and the same technical effect can be achieved. To avoid repetition, it will not be repeated here.
  • the processor is the processor in the electronic device described in the above embodiment.
  • the readable storage medium includes a computer readable storage medium, such as a computer read-only memory ROM, a random access memory RAM, a magnetic disk or an optical disk.
  • An embodiment of the present application further provides a chip, which includes a processor and a communication interface, wherein the communication interface is coupled to the processor, and the processor is used to run programs or instructions to implement the various processes of the above-mentioned thread management method embodiment, and can achieve the same technical effect. To avoid repetition, it will not be repeated here.
  • the chip mentioned in the embodiments of the present application can also be called a system-level chip, a system chip, a chip system or a system-on-chip chip, etc.
  • the present application provides a computer program product, which is stored in a storage medium.
  • the product is executed by at least one processor to implement the various processes of the above-mentioned thread management method embodiment, and can achieve the same technical effect. To avoid repetition, it will not be repeated here.
  • the technical solution of the present application can be embodied in the form of a computer software product, which is stored in a storage medium (such as ROM/RAM, a disk, or an optical disk), and includes a number of instructions for a terminal (which can be a mobile phone, a computer, a server, or a network device, etc.) to execute the methods described in each embodiment of the present application.
  • a storage medium such as ROM/RAM, a disk, or an optical disk
  • a terminal which can be a mobile phone, a computer, a server, or a network device, etc.

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Abstract

一种线程管理方法、装置、电子设备及存储介质，属于电子设备技术领域，该方法包括：在检测到异常线程的情况下，获取所述异常线程的类型，其中，所述异常线程占用CPU的时长超过阈值（101）；在所述异常线程的类型为非交互类线程的情况下，将所述异常线程调整至所述CPU的小核进行处理，其中，所述非交互类线程包括以下至少一项：与界面显示无关的线程和与用户交互无关的线程（102）。

Description

线程管理方法、装置、电子设备及存储介质
相关申请的交叉引用
本申请要求在2022年10月13日提交中国专利局、申请号为202211253554.3、名称为“线程管理方法、装置、电子设备及存储介质”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请属于电子设备技术领域，具体涉及一种线程管理方法、装置、电子设备及存储介质。
背景技术
随着移动互联网技术的不断发展，应用程序的种类和功能越来越丰富，为人们的生活带来了越来越多的便利，用户在电子设备中安装的应用程序也越来越多。目前，在用户日常使用电子设备中应用程序的过程中，可能会因应用程序中存在代码逻辑异常或者其他原因，导致应用程序的一些线程进入死循环的问题。
相关技术中，当线程进入死循环时，电子设备的系统会认为给线程的中央处理器
(Central Processing Unit，CPU)算力不够，而将线程放到CPU的大核上去执行，同时提高CPU的大核的频率。以上操作会导致系统功耗急剧增加，引起电子设备的温度上升、待机时间下降，以及卡顿现象，导致电子设备的工作性能降低。
发明内容
本申请实施例的目的是提供一种线程管理方法、装置、电子设备及存储介质，能够解决应用程序线程进入死循环时电子设备工作性能降低的问题。
第一方面，本申请实施例提供了一种线程管理方法，所述方法包括：
在检测到异常线程的情况下，获取所述异常线程的类型，其中，所述异常线程占用中央处理器CPU的时长超过阈值；
在所述异常线程的类型为非交互类线程的情况下，将所述异常线程调整至所述CPU的小核进行处理，其中，所述非交互类线程包括以下至少一项：与界面显示无关的线程和与用户交互无关的线程。
第二方面，本申请实施例提供了一种线程管理装置，所述装置包括：
获取模块，用于在检测到异常线程的情况下，获取所述异常线程的类型，其中，所述异常线程占用CPU的时长超过阈值；
处理模块，用于在所述异常线程的类型为非交互类线程的情况下，将所述异常线程调 整至所述CPU的小核进行处理，其中，所述非交互类线程包括以下至少一项：与界面显示无关的线程和与用户交互无关的线程。
第三方面，本申请实施例提供了一种电子设备，该电子设备包括处理器和存储器，所述存储器存储可在所述处理器上运行的程序或指令，所述程序或指令被所述处理器执行时实现如第一方面所述的方法的步骤。
第四方面，本申请实施例提供了一种可读存储介质，所述可读存储介质上存储程序或指令，所述程序或指令被处理器执行时实现如第一方面所述的方法的步骤。
第五方面，本申请实施例提供了一种芯片，所述芯片包括处理器和通信接口，所述通信接口和所述处理器耦合，所述处理器用于运行程序或指令，实现如第一方面所述的方法。
第六方面，本申请实施例提供一种计算机程序产品，该程序产品被存储在存储介质中，该程序产品被至少一个处理器执行以实现如第一方面所述的方法。
在本申请实施例中，在检测到异常线程的情况下，获取异常线程的类型，其中，异常线程占用CPU的时长超过阈值；在异常线程的类型为非交互类线程的情况下，将异常线程调整至CPU的小核进行处理，其中，非交互类线程包括以下至少一项：与界面显示无关的线程和与用户交互无关的线程。
可见，本申请实施例中，由于调整至CPU的小核上处理的异常线程为与用户直观感知无关的线程，且CPU的小核功耗远低于CPU的大核功耗，因此将进入死循环的上述异常线程，调整至CPU的小核上进行处理，可以实现在用户无感知的情况下，节省系统的功耗，避免设备温度上升，续航时间减少，以及可能出现的卡顿问题，提高电子设备的工作性能。
附图说明
图1是本申请实施例提供的线程管理方法的流程图之一；
图2是本申请实施例提供的异常线程在CPU的小核上运行情况的示意图；
图3是本申请实施例提供的线程管理方法的流程图之二；
图4是本申请实施例提供的一种线程管理装置的结构框图；
图5是本申请实施例提供的一种电子设备的结构示意图；
图6是实现本申请各个实施例的一种电子设备的硬件结构示意图。
具体实施例
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚地描述，显然，所描述的实施例是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员获得的所有其他实施例，都属于本申请保护的范围。
本申请的说明书和权利要求书中的术语“第一”、“第二”等是用于区别类似的对象，而不用于描述特定的顺序或先后次序。应该理解这样使用的数据在适当情况下可以互换，以便本申请的实施例能够以除了在这里图示或描述的那些以外的顺序实施，且“第一”、“第 二”等所区分的对象通常为一类，并不限定对象的个数，例如第一对象可以是一个，也可以是多个。此外，说明书以及权利要求中“和/或”表示所连接对象的至少其中之一，字符“/”，一般表示前后关联对象是一种“或”的关系。
在电子设备用户日常使用应用程序的过程中，当应用程序中存在代码逻辑异常或其他问题时，有时应用程序中的线程会进入死循环。而线程进入死循环时，电子设备的系统一般会因为线程长时间不能完成运行，认为给线程的CPU算力不够，从而将线程放到CPU的大核去执行，并且将CPU的大核频率提高。以上操作会导致系统功耗急剧增加，引起电子设备的温度上升和待机时间下降，而且CPU的大核被占满还可能会出现卡顿现象，导致电子设备的工作性能较低。为了处理系统异常高功耗的问题，会直接关闭功耗异常的应用程序，但这样会造成应用程序闪退问题，用户体验较差。如果问题重复出现，还会导致频繁闪退，应用无法使用的情况，难以被用户接受。
为解决上述技术问题，本申请实施例提供了一种线程管理方法、装置、电子设备及存储介质，以实现在不影响用户体验的前提下，节省系统的功耗，提高电子设备的工作性能。
首先为了便于理解，对本申请实施例中涉及到的一些概念进行介绍。
中央处理器(Central Processing Unit，CPU)，是计算机系统的运算和控制核心，是信息处理、程序运行的最终执行单元。
死循环，也称为异常死循环，是应用线程一直执行某段代码，长时间不主动让出CPU的行为。
CPU的大小核，是电子设备为平衡性能和功耗所使用的异构架构，目前，电子设备中通常包含一块CPU，一块CPU包括大核和小核，其中，CPU的大核用于通过高频率与超线程负责重负载任务，CPU的小核用于负责较轻负载任务以及多线程性能吞吐与协同能力。
CPU算力，是CPU的处理能力，与CPU的大小核和频率相关。
接下来结合附图，通过具体的实施例及其应用场景对本申请实施例提供的线程管理方法进行详细地说明。
需要说明的是，本申请实施例提供的线程管理方法适用于电子设备，在实际应用中，该电子设备可以包括：智能手机、平板电脑、个人数字助理等移动终端，本申请实施例对此不作限定。
图1是本申请实施例提供的线程管理方法的流程图之一，如图1所示，该方法可以包括以下步骤：步骤101和步骤102；
在步骤101中，在检测到异常线程的情况下，获取异常线程的类型，其中，异常线程占用中央处理器的时长超过阈值。
本申请实施例中，异常线程为进入死循环的线程。
本申请实施例中，电子设备中的系统服务线程可以监测当前运行的应用程序的线程占用CPU的时长，将占用CPU的时长与预先设定的阈值进行比较，如果应用程序的线程占用CPU的时长超过阈值，则确定该线程为进入死循环，也就是，确定该线程为异常线程。
本申请实施例中，预先设定的阈值为秒级别，以确定线程进入死循环而不是算力不足 导致的执行速度慢。其中，阈值的设定主要基于以下考虑：线程的实现逻辑通常是通过事件驱动的，或者是与其它线程有交互的，线程正常运行通常不会超过十几毫秒就会让出CPU。系统判断算力不足的单位是毫秒级的，一般一个CPU持续运行超过几十毫秒，系统就会把算力给到最大。但是如果一个线程持续运行超过几十秒，则会对功耗有比较大的影响，此时认为这个线程进入死循环，需要进行处理。
本申请实施例中，从用户感知的维度，可以将应用程序的线程分为两大类：交互类线程和非交互类线程，其中，交互类线程为用户可以直观感知的线程，非交互类线程为用户直观感知不到的线程，非交互类线程包括以下至少一项：与界面显示无关的线程和与用户交互无关的线程。
其中，界面显示指的在电子设备的屏幕上显示内容，例如，显示视频播放画面、显示游戏界面或者显示会议界面等；用户交互指的是用户与电子设备之间进行接触操作、手势操作或者语音交互，例如，点击电子设备的屏幕、在电子设备的屏幕上滑动或者输入语音指令等。
在步骤102中，在异常线程的类型为非交互类线程的情况下，将异常线程调整至中央处理器的小核进行处理，其中，非交互类线程包括以下至少一项：与界面显示无关的线程和与用户交互无关的线程。
本申请实施例中，对于进入死循环的异常线程，判断该异常线程是否为非交互类线程，如果该异常线程为非交互类线程，则将该异常线程调整至CPU的小核进行处理，由于CPU的小核算力和频率远低于CPU的大核，因此可以在不影响用户体验的前提下，达到节省系统的功耗的目的。
由上述实施例可见，该实施例中，在检测到异常线程的情况下，获取异常线程的类型，其中，异常线程占用CPU的时长超过阈值；在异常线程的类型为非交互类线程的情况下，将异常线程调整至CPU的小核进行处理，其中，非交互类线程包括以下至少一项：与界面显示无关的线程和与用户交互无关的线程。可见，本申请实施例中，由于调整至CPU的小核上处理的异常线程为与用户直观感知无关的线程，且CPU的小核功耗远低于CPU的大核功耗，因此将进入死循环的上述异常线程，调整至CPU的小核上进行处理，可以实现在用户无感知的情况下，节省系统的功耗，避免设备温度上升，续航时间减少，以及可能出现的卡顿问题，提高电子设备的工作性能。
在本申请提供的另一个实施例中，上述步骤102包括以下步骤：步骤201和步骤202；
在步骤201中，将异常线程迁移至CPU的小核。
本申请实施例中，电子设备的操作系统如安卓系统对于CPU的小核，都存在对应的分组，用于专门存放线程，因此可以将异常线程迁移至CPU的小核的分组中。
在步骤202中，在异常线程在CPU的小核上运行的情况下，限制异常线程占用CPU的小核的时长。
本申请实施例中，在异常线程在CPU的小核上运行的情况下，可以控制异常线程在部分时段内占用CPU的小核，在剩余时段内处于休眠状态，让出CPU的小核，以降低CPU 的小核的功耗，从而降低系统的功耗。
在本申请提供的另一个实施例中，上述步骤202包括以下步骤：步骤2021和步骤2022；
在步骤2021中，设置异常线程在每个统计周期内的运行时长。
本申请实施例中，为了便于管理异常线程占用CPU的小核的时长，可以为异常线程设置统计周期，统计周期通常为毫秒级别，例如32毫秒、64毫秒等。
本申请实施例中，运行时长为累计的运行时长，例如8毫秒、10毫秒等。
在步骤2022中，在每个统计周期内，在异常线程占用CPU的小核的累计时长达到运行时长的情况下，控制异常线程进入休眠状态。
如图2所示，从第一个统计周期开始，当异常线程占用CPU的小核的累计时长达到运行时长时，控制异常线程进入休眠状态。在进入第二个统计周期时，重新开始记录异常线程占用CPU的小核的累计时长，当达到运行时长时，控制异常线程进入休眠状态。在进入第三个统计周期时，再次重新开始记录异常线程占用CPU的小核的累计时长，当达到运行时长时，控制异常线程进入休眠状态。如此反复，继续执行，直至异常线程所属的应用程序被关闭。
例如，在每一个统计周期内，以设置的64毫秒为统计周期为例，允许异常线程累计运行10毫秒，其余时间64毫秒-10毫秒＝54毫秒，让线程处于休眠状态，让出CPU的小核。
可见，本申请实施例中，对于进入死循环的异常线程，可以给这些线程有限的CPU小核使用时长，限制其运行，节省功耗。
在本申请提供的另一个实施例中，上述步骤202包括以下步骤：步骤2023；
在步骤2023中，在系统任务已完成的情况下，限制异常线程占用CPU的小核的时长，其中，系统任务为系统定时器触发的任务，系统定时器每中断一次，触发一次系统任务。
目前，为保证电子设备系统的正常运行，电子设备中会设置一个系统定时器(timer)，系统定时器每隔一段时长会中断一次，例如安卓系统的电子设备，其系统定时器通常每隔4毫秒中断一次，系统定时器每一次中断时，系统会中断正在运行的应用程序，转去对应中断代码，去执行相应的系统调度处理函数，维护系统的一些状态等信息，处理完这些系统任务之后，中断退出，返回用户态，继续运行上次中断的应用程序。
由于在处理系统任务时，可能会持有内核锁，而在持锁的状态下，强制限制异常线程占用CPU的小核的时长例如让线程进入休眠状态，可能会导致系统出现死锁问题。因此，本申请实施例中，在每次完成系统任务，返回用户态之前，限制异常线程占用CPU的小核的时长。
可见，本申请实施例中，可以选择合适的时机，限制异常线程占用CPU的小核的时长，以避免因限制异常线程的CPU小核使用时长而出现系统工作异常。
在本申请提供的另一个实施例中，所提供的线程管理方法，还可以在图1所示实施例的基础上，增加以下步骤：步骤103；
在步骤103中，在异常线程的类型为非交互类线程的情况下，标记异常线程。
本申请实施例中，可以通过多种方式，标记进入死循环的异常线程。
可选地，在一些实施例中，可以通过系统接口，将异常线程的标识保存在内核的线程控制块中。
可选地，在一些实施例中，可以将异常线程存放至特定分组中，以便系统可以通过分组来区分线程是否为异常线程，其中，这种方式无需在线程控制块中增加字段。
本申请实施例中，通过对进入死循环的异常线程进行标记，以便于根据标记信息将待标记的异常线程，调整至CPU的小核进行处理，以及便于在执行完系统任务，返回用户态之前，根据标记信息判断继续要执行的线程是否为异常线程，如果是异常线程，则进行相应限制处理，提高系统的工作效率。
为了便于从整体上理解本申请实施例提供的技术方案，结合图3所示的流程图进行描述。
图3是本申请实施例提供的线程管理方法的流程图之二，如图3所示，该方法可以包括以下步骤：步骤301、步骤302、步骤303、步骤304、步骤305、步骤306、步骤307和步骤308；
在步骤301中，监测当前运行的应用程序的线程占用中央处理器的时长。
在步骤302中，根据占用中央处理器的时长，判断是否存在进入死循环的异常线程；若是，则执行步骤303，否则，返回执行步骤301。
在步骤303中，判断异常线程是否为非交互类线程；若是，则执行步骤304，否则，返回执行步骤301。
在步骤304中，对异常线程进行标记。
在步骤305中，将异常线程迁移至中央处理器的小核。
在步骤306中，在系统任务已完成，即将返回用户态之前，判断当前运行的线程是否为已标记的异常线程；若是，则执行步骤307，反之返回执行步骤301。
在步骤307中，判断异常线程在当前统计周期内占用中央处理器的小核的累计时长是否达到设定的运行时长；若是，则执行步骤308，否则，返回执行步骤301。
在步骤308中，调用系统的休眠接口，控制异常线程进入休眠状态。
可见，本申请实施例中，能够实现在用户使用的应用程序中有线程进入异常死循环时，在用户无感知的前提下，节省系统的功耗，避免设备温度上升，续航时间减少，以及可能出现的卡顿问题发生。
需要说明的是，以上限制异常线程占用CPU的小核的时长的方案，可以复用到CPU的大核上，也就是，当进入死循环的异常线程在CPU的大核上运行时，可以限制异常线程占用CPU的大核的时长，以降低系统功耗。
本申请实施例提供的线程管理方法，执行主体可以为线程管理装置。本申请实施例中以线程管理装置执行线程管理方法为例，说明本申请实施例提供的线程管理装置。
图4是本申请实施例提供的一种线程管理装置的结构框图，如图4所示，线程管理装置400，可以包括：获取模块401和处理模块402；
获取模块401，用于在检测到异常线程的情况下，获取所述异常线程的类型，其中，所述异常线程占用CPU的时长超过阈值；
处理模块402，用于在所述异常线程的类型为非交互类线程的情况下，将所述异常线程调整至所述CPU的小核进行处理，其中，所述非交互类线程包括以下至少一项：与界面显示无关的线程和与用户交互无关的线程。
由上述实施例可见，该实施例中，在检测到异常线程的情况下，获取异常线程的类型，其中，异常线程占用CPU的时长超过阈值；在异常线程的类型为非交互类线程的情况下，将异常线程调整至CPU的小核进行处理，其中，非交互类线程包括以下至少一项：与界面显示无关的线程和与用户交互无关的线程。可见，本申请实施例中，由于调整至CPU的小核上处理的异常线程为与用户直观感知无关的线程，且CPU的小核功耗远低于CPU的大核功耗，因此将进入死循环的上述异常线程，调整至CPU的小核上进行处理，可以实现在用户无感知的情况下，节省系统的功耗，避免设备温度上升，续航时间减少，以及可能出现的卡顿问题，提高电子设备的工作性能。
可选地，作为一个实施例，所述处理模块401，可以包括：
迁移子模块，用于将所述异常线程迁移至所述CPU的小核；
控制子模块，用于在所述异常线程在所述CPU的小核上运行的情况下，限制所述异常线程占用所述CPU的小核的时长。
可选地，作为一个实施例，所述控制子模块，可以包括：
设置单元，用于设置所述异常线程在每个统计周期内的运行时长；
第一控制单元，用于在每个所述统计周期内，在所述异常线程占用所述CPU的小核的累计时长达到所述运行时长的情况下，控制所述异常线程进入休眠状态。
可选地，作为一个实施例，所述控制子模块，可以包括：
第二控制单元，用于在系统任务已完成的情况下，限制所述异常线程占用所述CPU的小核的时长，其中，所述系统任务为系统定时器触发的任务，所述系统定时器每中断一次，触发一次所述系统任务。
本申请实施例中的线程管理装置可以是电子设备，也可以是电子设备中的部件，例如集成电路或芯片。该电子设备可以是终端，也可以为除终端之外的其他设备。示例性的，电子设备可以为手机、平板电脑、笔记本电脑、掌上电脑、车载电子设备、移动上网装置(Mobile Internet Device，MID)、增强现实(augmented reality，AR)/虚拟现实(virtual reality，VR)设备、机器人、可穿戴设备、超级移动个人计算机(ultra-mobile personal computer，UMPC)、上网本或者个人数字助理(personal digital assistant，PDA)等，还可以为服务器、网络附属存储器(Network Attached Storage，NAS)、个人计算机(personal computer，PC)、电视机(television，TV)、柜员机或者自助机等，本申请实施例不作具体限定。
本申请实施例中的线程管理装置可以为具有操作系统的装置。该操作系统可以为安卓(Android)操作系统，可以为ios操作系统，还可以为其他可能的操作系统，本申请实施例不作具体限定。
本申请实施例提供的线程管理装置能够实现图1的方法实施例实现的各个过程，为避免重复，这里不再赘述。
可选地，如图5所示，本申请实施例还提供一种电子设备500，包括处理器501和存储器502，存储器502上存储有可在所述处理器501上运行的程序或指令，该程序或指令被处理器501执行时实现上述线程管理方法实施例的各个步骤，且能达到相同的技术效果，为避免重复，这里不再赘述。
需要说明的是，本申请实施例中的电子设备包括上述所述的移动电子设备和非移动电子设备。
图6是实现本申请各个实施例的一种电子设备的硬件结构示意图。
该电子设备600包括但不限于：射频单元601、网络模块602、音频输出单元603、输入单元604、传感器605、显示单元606、用户输入单元607、接口单元608、存储器609、以及处理器610等部件。
本领域技术人员可以理解，电子设备600还可以包括给各个部件供电的电源(比如电池)，电源可以通过电源管理系统与处理器610逻辑相连，从而通过电源管理系统实现管理充电、放电、以及功耗管理等功能。图6中示出的电子设备结构并不构成对电子设备的限定，电子设备可以包括比图示更多或更少的部件，或者组合某些部件，或者不同的部件布置，在此不再赘述。
在一个实施例中，处理器610，用于在检测到异常线程的情况下，获取所述异常线程的类型，其中，所述异常线程占用中央处理器CPU的时长超过阈值；在所述异常线程的类型为非交互类线程的情况下，将所述异常线程调整至所述CPU的小核进行处理，其中，所述非交互类线程包括以下至少一项：与界面显示无关的线程和与用户交互无关的线程。
可见，本申请实施例中，由于调整至CPU的小核上处理的异常线程为与用户直观感知无关的线程，且CPU的小核功耗远低于CPU的大核功耗，因此将进入死循环的上述异常线程，调整至CPU的小核上进行处理，可以实现在用户无感知的情况下，节省系统的功耗，避免设备温度上升，续航时间减少，以及可能出现的卡顿问题，提高电子设备的工作性能。
可选地，作为一个实施例，处理器610，还用于将所述异常线程迁移至所述CPU的小核；在所述异常线程在所述CPU的小核上运行的情况下，限制所述异常线程占用所述CPU的小核的时长。
可选地，作为一个实施例，处理器610，还用于设置所述异常线程在每个统计周期内的运行时长；在每个所述统计周期内，在所述异常线程占用所述CPU的小核的累计时长达到所述运行时长的情况下，控制所述异常线程进入休眠状态。
可选地，作为一个实施例，处理器610，还用于在系统任务已完成的情况下，限制所述异常线程占用所述CPU的小核的时长，其中，所述系统任务为系统定时器触发的任务，所述系统定时器每中断一次，触发一次所述系统任务。
应理解的是，本申请实施例中，输入单元604可以包括图形处理器(Graphics Processing Unit，GPU)6041和麦克风6042，图形处理器6041对在视频捕获模式或图像捕获模式中 由图像捕获装置(如摄像头)获得的静态图片或视频的图像数据进行处理。显示单元606可包括显示面板6061，可以采用液晶显示器、有机发光二极管等形式来配置显示面板6061。用户输入单元607包括触控面板6071以及其他输入设备6072中的至少一种。触控面板6071，也称为触摸屏。触控面板6071可包括触摸检测装置和触摸控制器两个部分。其他输入设备6072可以包括但不限于物理键盘、功能键(比如音量控制按键、开关按键等)、轨迹球、鼠标、操作杆，在此不再赘述。
存储器609可用于存储软件程序以及各种数据。存储器609可主要包括存储程序或指令的第一存储区和存储数据的第二存储区，其中，第一存储区可存储操作系统、至少一个功能所需的应用程序或指令(比如声音播放功能、图像播放功能等)等。此外，存储器609可以包括易失性存储器或非易失性存储器，或者，存储器609可以包括易失性和非易失性存储器两者。其中，非易失性存储器可以是只读存储器(Read-OnlyMemory，ROM)、可编程只读存储器(Programmable ROM，PROM)、可擦除可编程只读存储器(Erasable PROM，EPROM)、电可擦除可编程只读存储器(Electrically EPROM，EEPROM)或闪存。易失性存储器可以是随机存取存储器(Random Access Memory，RAM)，静态随机存取存储器(Static RAM，SRAM)、动态随机存取存储器(Dynamic RAM，DRAM)、同步动态随机存取存储器(Synchronous DRAM，SDRAM)、双倍数据速率同步动态随机存取存储器(Double Data Rate SDRAM，DDRSDRAM)、增强型同步动态随机存取存储器(Enhanced SDRAM，ESDRAM)、同步连接动态随机存取存储器(Synchlink DRAM，SLDRAM)和直接内存总线随机存取存储器(Direct Rambus RAM，DRRAM)。本申请实施例中的存储器609包括但不限于这些和任意其它适合类型的存储器。
处理器610可包括一个或多个处理单元；可选地，处理器610集成应用处理器和调制解调处理器，其中，应用处理器主要处理涉及操作系统、用户界面和应用程序等的操作，调制解调处理器主要处理无线通信信号，如基带处理器。可以理解的是，上述调制解调处理器也可以不集成到处理器610中。
本申请实施例还提供一种可读存储介质，所述可读存储介质上存储有程序或指令，该程序或指令被处理器执行时实现上述线程管理方法实施例的各个过程，且能达到相同的技术效果，为避免重复，这里不再赘述。
其中，所述处理器为上述实施例中所述的电子设备中的处理器。所述可读存储介质，包括计算机可读存储介质，如计算机只读存储器ROM、随机存取存储器RAM、磁碟或者光盘等。
本申请实施例另提供了一种芯片，所述芯片包括处理器和通信接口，所述通信接口和所述处理器耦合，所述处理器用于运行程序或指令，实现上述线程管理方法实施例的各个过程，且能达到相同的技术效果，为避免重复，这里不再赘述。
应理解，本申请实施例提到的芯片还可以称为系统级芯片、系统芯片、芯片系统或片上系统芯片等。
本申请实施例提供一种计算机程序产品，该程序产品被存储在存储介质中，该程序产 品被至少一个处理器执行以实现如上述线程管理方法实施例的各个过程，且能达到相同的技术效果，为避免重复，这里不再赘述。
需要说明的是，在本文中，术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含，从而使得包括一系列要素的过程、方法、物品或者装置不仅包括那些要素，而且还包括没有明确列出的其他要素，或者是还包括为这种过程、方法、物品或者装置所固有的要素。在没有更多限制的情况下，由语句“包括一个……”限定的要素，并不排除在包括该要素的过程、方法、物品或者装置中还存在另外的相同要素。此外，需要指出的是，本申请实施方式中的方法和装置的范围不限按示出或讨论的顺序来执行功能，还可包括根据所涉及的功能按基本同时的方式或按相反的顺序来执行功能，例如，可以按不同于所描述的次序来执行所描述的方法，并且还可以添加、省去、或组合各种步骤。另外，参照某些示例所描述的特征可在其他示例中被组合。
通过以上的实施方式的描述，本领域的技术人员可以清楚地了解到上述实施例方法可借助软件加必需的通用硬件平台的方式来实现，当然也可以通过硬件，但很多情况下前者是更佳的实施方式。基于这样的理解，本申请的技术方案本质上或者说对现有技术做出贡献的部分可以以计算机软件产品的形式体现出来，该计算机软件产品存储在一个存储介质(如ROM/RAM、磁碟、光盘)中，包括若干指令用以使得一台终端(可以是手机，计算机，服务器，或者网络设备等)执行本申请各个实施例所述的方法。
上面结合附图对本申请的实施例进行了描述，但是本申请并不局限于上述的具体实施方式，上述的具体实施方式仅仅是示意性的，而不是限制性的，本领域的普通技术人员在本申请的启示下，在不脱离本申请宗旨和权利要求所保护的范围情况下，还可做出很多形式，均属于本申请的保护之内。

Claims (13)

  1. 一种线程管理方法，其中，所述方法包括：
    在检测到异常线程的情况下，获取所述异常线程的类型，其中，所述异常线程占用中央处理器CPU的时长超过阈值；
    在所述异常线程的类型为非交互类线程的情况下，将所述异常线程调整至所述CPU的小核进行处理，其中，所述非交互类线程包括以下至少一项：与界面显示无关的线程和与用户交互无关的线程。
  2. 根据权利要求1所述的方法，其中，所述将所述异常线程调整至所述CPU的小核进行处理，包括：
    将所述异常线程迁移至所述CPU的小核；
    在所述异常线程在所述CPU的小核上运行的情况下，限制所述异常线程占用所述CPU的小核的时长。
  3. 根据权利要求2所述的方法，其中，所述限制所述异常线程占用所述CPU的小核的时长，包括：
    设置所述异常线程在每个统计周期内的运行时长；
    在每个所述统计周期内，在所述异常线程占用所述CPU的小核的累计时长达到所述运行时长的情况下，控制所述异常线程进入休眠状态。
  4. 根据权利要求2所述的方法，其中，所述限制所述异常线程占用所述CPU的小核的时长，包括：
    在系统任务已完成的情况下，限制所述异常线程占用所述CPU的小核的时长，其中，所述系统任务为系统定时器触发的任务，所述系统定时器每中断一次，触发一次所述系统任务。
  5. 一种线程管理装置，其中，所述装置包括：
    获取模块，用于在检测到异常线程的情况下，获取所述异常线程的类型，其中，所述异常线程占用CPU的时长超过阈值；
    处理模块，用于在所述异常线程的类型为非交互类线程的情况下，将所述异常线程调整至所述CPU的小核进行处理，其中，所述非交互类线程包括以下至少一项：与界面显示无关的线程和与用户交互无关的线程。
  6. 根据权利要求5所述的装置，其中，所述处理模块包括：
    迁移子模块，用于将所述异常线程迁移至所述CPU的小核；
    控制子模块，用于在所述异常线程在所述CPU的小核上运行的情况下，限制所述异常线程占用所述CPU的小核的时长。
  7. 根据权利要求6所述的装置，其中，所述控制子模块包括：
    设置单元，用于设置所述异常线程在每个统计周期内的运行时长；
    第一控制单元，用于在每个所述统计周期内，在所述异常线程占用所述CPU的小核的累计时长达到所述运行时长的情况下，控制所述异常线程进入休眠状态。
  8. 根据权利要求6所述的装置，其中，所述控制子模块包括：
    第二控制单元，用于在系统任务已完成的情况下，限制所述异常线程占用所述CPU的小核的时长，其中，所述系统任务为系统定时器触发的任务，所述系统定时器每中断一次，触发一次所述系统任务。
  9. 一种电子设备，其中，包括处理器和存储器，所述存储器存储可在所述处理器上运行的程序或指令，所述程序或指令被所述处理器执行时实现如权利要求1至4任一项所述的线程管理方法的步骤。
  10. 一种可读存储介质，其中，所述可读存储介质上存储程序或指令，所述程序或指令被所述处理器执行时实现如权利要求1至4任一项所述的线程管理方法的步骤。
  11. 一种芯片，其中，所述芯片包括处理器和通信接口，所述通信接口和所述处理器耦合，所述处理器用于运行程序或指令，实现如权利要求1至4任一项所述的线程管理方法的步骤。
  12. 一种计算机程序产品，其中，所述程序产品被存储在非易失的存储介质中，所述程序产品被至少一个处理器执行以实现如权利要求1至4中任一项所述的线程管理方法的步骤。
  13. 一种电子设备，其中，所述电子设备被配置为实现如权利要求1至4中任一项所述的线程管理方法的步骤。
PCT/CN2023/123780 2022-10-13 2023-10-10 线程管理方法、装置、电子设备及存储介质 WO2024078494A1 (zh)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111077979A (zh) * 2019-12-09 2020-04-28 Oppo广东移动通信有限公司 功耗控制方法、存储介质及电子设备
US20210124615A1 (en) * 2019-10-29 2021-04-29 Thomas Klingenbrunn Thread scheduling based on performance metric information
CN115016885A (zh) * 2021-11-19 2022-09-06 荣耀终端有限公司 虚拟机垃圾回收运行方法及电子设备
CN115617518A (zh) * 2022-10-13 2023-01-17 维沃移动通信有限公司 线程管理方法、装置、电子设备及存储介质

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20210124615A1 (en) * 2019-10-29 2021-04-29 Thomas Klingenbrunn Thread scheduling based on performance metric information
CN111077979A (zh) * 2019-12-09 2020-04-28 Oppo广东移动通信有限公司 功耗控制方法、存储介质及电子设备
CN115016885A (zh) * 2021-11-19 2022-09-06 荣耀终端有限公司 虚拟机垃圾回收运行方法及电子设备
CN115617518A (zh) * 2022-10-13 2023-01-17 维沃移动通信有限公司 线程管理方法、装置、电子设备及存储介质

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