WO2024070957A1 - Dispositif de transmission de signal - Google Patents

Dispositif de transmission de signal Download PDF

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Publication number
WO2024070957A1
WO2024070957A1 PCT/JP2023/034534 JP2023034534W WO2024070957A1 WO 2024070957 A1 WO2024070957 A1 WO 2024070957A1 JP 2023034534 W JP2023034534 W JP 2023034534W WO 2024070957 A1 WO2024070957 A1 WO 2024070957A1
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WIPO (PCT)
Prior art keywords
lead
chip
die pad
wire
view
Prior art date
Application number
PCT/JP2023/034534
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English (en)
Japanese (ja)
Inventor
弘招 松原
嘉蔵 大角
登茂平 菊地
萌 山口
遼平 梅野
隆宏 根来
太郎 西岡
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ローム株式会社
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Publication of WO2024070957A1 publication Critical patent/WO2024070957A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body

Definitions

  • This disclosure relates to a signal transmission device.
  • a signal transmission device that includes a first die pad, a second die pad arranged at a distance from the first die pad, a first chip and a transformer chip mounted on the first die pad, a second chip mounted on the second die pad, and a sealing resin that seals the die pads and chips (see, for example, Patent Document 1).
  • the first chip and the transformer chip are electrically connected by a wire
  • the transformer chip and the second chip are electrically connected by another wire.
  • a signal transmission device includes a first chip including an isolation transformer, a second chip that receives a signal from the first chip and/or transmits a signal to the first chip, a first die pad on which the first chip is mounted, a second die pad that is spaced apart from the first die pad in a first direction and on which the second chip is mounted, a plurality of first lead terminals that are arranged on the opposite side of the second die pad from the first die pad in the first direction and are arranged in a second direction perpendicular to the first direction in a planar view, a plurality of second lead terminals that are arranged on the opposite side of the first die pad from the second die pad in the first direction and are arranged in the second direction, an inter-chip wire that electrically connects the first chip and the second chip, and a first lead wire that individually connects the first chip and the plurality of first lead terminals,
  • the second die pads are arranged at a distance from each other in the first direction, the multiple first lead terminals are arranged
  • the signal transmission device described above allows the wire height of the inter-chip wires to be inspected with greater precision.
  • FIG. 1 is a perspective view of a signal transmission device according to a first embodiment.
  • FIG. 2 is a side view of the signal transmission device of FIG.
  • FIG. 3 is a side view of the signal transmission device of FIG. 1, seen from a different direction than that of FIG.
  • FIG. 4 is an enlarged view of the first lead terminal and its periphery in FIG.
  • FIG. 5 is an enlarged view of an end surface of an outer lead of the first lead terminal of FIG.
  • FIG. 6 is a side view of the signal transmission device mounted on a circuit board.
  • FIG. 7 is a schematic plan view showing the internal configuration of the signal transmission device of FIG.
  • FIG. 8 is an enlarged view of the first lead terminal and its periphery in FIG. FIG.
  • FIG. 9 is a schematic cross-sectional view of a portion of the wire connection portion of the first lead terminal.
  • FIG. 10 is an enlarged view of the second lead terminal and its periphery in FIG.
  • FIG. 11 is a schematic cross-sectional view of a portion of the wire connection portion of the second lead terminal.
  • FIG. 12 is an enlarged view of the inter-chip wires and their surroundings in FIG.
  • FIG. 13 is a perspective view showing an enlarged structure of a portion of the second die pad wire.
  • FIG. 14 is a circuit diagram of the signal transmission device of the first embodiment.
  • FIG. 15 is a schematic plan view illustrating an example of the internal structure of the first chip in the signal transmission device according to the first embodiment.
  • FIG. 16 is an enlarged view of the insulating transformer region in the first chip of FIG.
  • FIG. 17 is a schematic plan view showing an example of the internal structure of the first chip at a position different from that in FIG. 15 in the thickness direction of the first chip.
  • FIG. 18 is an enlarged view of the insulating transformer region in the first chip of FIG.
  • FIG. 19 is a cross-sectional view of the first chip taken along line F19-F19 in FIG.
  • FIG. 20 is an enlarged view of a part of the first chip in FIG.
  • FIG. 21 is an enlarged view of the conductor of the first surface side coil in the first chip of FIG.
  • FIG. 22 is an enlarged view of the conductor wire of the first back side coil in the first chip of FIG. 20 .
  • FIG. 23 is a cross-sectional view of a portion of the circuit region of the first chip.
  • FIG. 24 is an enlarged view of the first via and its periphery in FIG.
  • FIG. 25 is an enlarged plan view of a first lead terminal and its periphery in a signal transmission device according to the second embodiment.
  • FIG. 26 is an enlarged plan view of the second lead terminal and its periphery in the signal transmission device of the second embodiment.
  • FIG. 27 is an enlarged plan view of a first lead terminal and its periphery in a signal transmission device according to the third embodiment.
  • FIG. 28 is an enlarged plan view of the second lead terminal and its periphery in the signal transmission device of the third embodiment.
  • FIG. 29 is an enlarged plan view of a first lead terminal and its periphery in a signal transmission device according to the fourth embodiment.
  • FIG. 30 is an enlarged plan view of the second lead terminal and its periphery in the signal transmission device of the fourth embodiment.
  • FIG. 31 is a perspective view showing an enlarged structure of a portion of the second lead wire.
  • FIG. 32 is a plan view illustrating a schematic internal structure of the signal transmission device according to the fifth embodiment.
  • FIG. 33 is an enlarged view of the inter-chip wire and its periphery in the signal transmission device of the sixth embodiment.
  • FIG. 34 is a schematic cross-sectional view of a first chip and a first die pad in a signal transmission device according to the seventh embodiment.
  • FIG. 35 is a schematic cross-sectional view of the first chip and the first die pad taken in a direction different from that of FIG. FIG.
  • FIG. 36 is a schematic cross-sectional view of the second chip and the second die pad.
  • FIG. 37 is a schematic cross-sectional view of the second chip and the second die pad taken in a direction different from that of FIG.
  • FIG. 38 is a cross-sectional view illustrating an example of a manufacturing process for the signal transmission device of the seventh embodiment.
  • FIG. 39 is a cross-sectional view showing a schematic example of a manufacturing process for the signal transmission device subsequent to FIG.
  • FIG. 40 is a cross-sectional view showing a schematic example of a manufacturing process for the signal transmission device subsequent to FIG.
  • FIG. 41 is a cross-sectional view showing a schematic example of a manufacturing process for the signal transmission device subsequent to FIG.
  • FIG. 39 is a cross-sectional view showing a schematic example of a manufacturing process for the signal transmission device subsequent to FIG.
  • FIG. 42 is a plan view illustrating a schematic internal structure of the signal transmission device according to the eighth embodiment.
  • FIG. 43 is a perspective view of a signal transmission device according to the ninth embodiment.
  • FIG. 44 is a plan view showing a schematic internal structure of the signal transmission device of FIG. 43.
  • FIG. 45 is an enlarged view of the first frame and its surroundings in FIG.
  • FIG. 46 is an enlarged view of the second frame and its surroundings in FIG.
  • FIG. 47 is a schematic plan view showing an example of the internal structure of the first chip.
  • FIG. 48 is a schematic plan view showing an example of the internal structure of the first chip at a position different from that in FIG. 47 in the thickness direction of the first chip.
  • FIG. 49 is a circuit diagram of a signal transmission device according to the ninth embodiment.
  • FIG. 49 is a circuit diagram of a signal transmission device according to the ninth embodiment.
  • FIG. 50 is an enlarged plan view of the second lead terminal and its periphery in the signal transmission device of the tenth embodiment.
  • FIG. 51 is an enlarged plan view of a first lead terminal and its periphery in a signal transmission device according to the eleventh embodiment.
  • FIG. 52 is an enlarged plan view of the second lead terminal and its periphery in the signal transmission device of the eleventh embodiment.
  • FIG. 53 is an enlarged plan view of a first lead terminal and its periphery in a signal transmission device according to the twelfth embodiment.
  • FIG. 54 is an enlarged plan view of the second lead terminal and its periphery in the signal transmission device of the twelfth embodiment.
  • FIG. 55 is a plan view illustrating a schematic internal structure of a signal transmission device according to the thirteenth embodiment.
  • FIG. 56 is an enlarged view of the inter-chip wire and its surroundings in the signal transmission device of the fourteenth embodiment.
  • FIG. 57 is a schematic plan view showing the internal structure of the signal transmission device according to the fifteenth embodiment.
  • FIG. 58 is a schematic plan view showing the internal structure of the signal transmission device according to the sixteenth embodiment.
  • FIG. 59 is an enlarged view of the first lead terminal and its periphery in FIG. 60 is an enlarged view of the second lead terminal and its periphery in FIG.
  • FIG. 61 is a schematic plan view showing an example of the internal structure of the second chip.
  • FIG. 62 is a schematic plan view showing an example of the internal structure of the second chip at a position different from that in FIG. 61 in the thickness direction of the second chip.
  • FIG. 63 is a circuit diagram of a signal transmission device according to the sixteenth embodiment.
  • FIG. 64 is an enlarged plan view of a first lead terminal and its periphery in a signal transmission device according to the seventeenth embodiment.
  • FIG. 65 is an enlarged plan view of the second lead terminal and its periphery in the signal transmission device of the seventeenth embodiment.
  • FIG. 66 is an enlarged plan view of a first lead terminal and its periphery in a signal transmission device according to the eighteenth embodiment.
  • FIG. 67 is an enlarged plan view of the second lead terminal and its periphery in the signal transmission device of the eighteenth embodiment.
  • FIG. 68 is an enlarged plan view of a first lead terminal and its periphery in a signal transmission device according to the nineteenth embodiment.
  • FIG. 69 is an enlarged plan view of the second lead terminal and its periphery in the signal transmission device of the nineteenth embodiment.
  • FIG. 70 is an enlarged plan view of the inter-chip wires and their surroundings in the signal transmission device of the twentieth embodiment.
  • FIG. 71 is a schematic plan view showing an example of the internal structure of the second chip.
  • FIG. 72 is a plan view showing typically one example of the internal structure of the second chip at a position different from that in FIG. 71 in the thickness direction of the second chip.
  • FIG. 71 is a schematic plan view showing an example of the internal structure of the second chip.
  • FIG. 72 is a plan view showing typically one example of the internal structure of the second chip at a position different from that
  • FIG. 73 is a circuit diagram of a signal transmission device according to the twentieth embodiment.
  • FIG. 74 is a cross-sectional view of a signal transmission device according to the twenty-first embodiment.
  • FIG. 75 is an enlarged view of a portion of FIG.
  • FIG. 76 is a cross-sectional view illustrating an example of a manufacturing process for the signal transmission device of the twenty-first embodiment.
  • FIG. 77 is a cross-sectional view showing a schematic example of a manufacturing process for the signal transmission device following FIG. 76.
  • 78 is a cross-sectional view showing a schematic example of a manufacturing process for the signal transmission device following FIG. 77. As shown in FIG. FIG. FIG.
  • FIG. 79 is an enlarged cross-sectional view of an insulating transformer region in the signal transmission device according to the twenty-second embodiment.
  • FIG. 80 is a cross-sectional view of a conductor and its surroundings in a signal transmission device according to the twenty-third embodiment.
  • FIG. 81 is a cross-sectional view illustrating an example of a manufacturing process for the signal transmission device of the twenty-third embodiment.
  • 82 is a cross-sectional view showing a schematic diagram of a part of the manufacturing process of the signal transmission device subsequent to FIG. 81.
  • FIG. 83 is a cross-sectional view showing a schematic diagram of a part of the manufacturing process of the signal transmission device subsequent to FIG. 82. As shown in FIG. FIG. FIG.
  • FIG. 84 is a cross-sectional view showing a schematic diagram of a part of the manufacturing process of the signal transmission device subsequent to FIG. 83.
  • FIG. 85 is a cross-sectional view showing a schematic diagram of a part of the manufacturing process of the signal transmission device subsequent to FIG.
  • FIG. 86 is a cross-sectional view showing a schematic diagram of a part of the manufacturing process of the signal transmission device subsequent to FIG. 85.
  • FIG. 87 is a cross-sectional view of a conductor and its surroundings in a signal transmission device according to the twenty-fourth embodiment.
  • FIG. 88 is a cross-sectional view illustrating an example of a manufacturing process for the signal transmission device of the twenty-fourth embodiment.
  • FIG. 89 is a cross-sectional view showing a schematic diagram of a part of the manufacturing process of the signal transmission device subsequent to FIG. 88.
  • 90 is a cross-sectional view showing a schematic diagram of a part of the manufacturing process of the signal transmission device subsequent to FIG. 91 is a cross-sectional view showing a schematic diagram of a part of the manufacturing process of the signal transmission device subsequent to FIG. 90.
  • FIG. 92 is a cross-sectional view showing a schematic diagram of a part of the manufacturing process of the signal transmission device subsequent to FIG. 91.
  • FIG. FIG. 93 is a schematic plan view showing an example of the internal structure of the first chip in a signal transmission device according to a modified example.
  • FIG. 94 is a schematic plan view showing an example of the internal structure of the first chip at a position different from that in FIG. 93 in the thickness direction of the first chip.
  • FIG. 95 is a schematic plan view showing the internal structure of a signal transmission device according to a modified example.
  • FIG. 1 to 6 show the external structure of the signal transmission device 10.
  • Figures 7 to 13 show the internal structure of the signal transmission device 10.
  • Figure 14 shows the circuit configuration of the signal transmission device 10.
  • Figures 15 to 24 show the internal structure of a first chip 60 (described later) of the signal transmission device 10.
  • FIG. 1 shows a perspective view of the signal transmission device 10.
  • Figs. 2 and 3 show a side view of the signal transmission device 10.
  • Fig. 4 shows an enlarged view of a portion of a first lead terminal 18 of the signal transmission device 10, which will be described later.
  • the package structure of the signal transmission device 10 is a small outline package (SOP).
  • SOP small outline package
  • the package structure of the signal transmission device 10 can be changed as desired, and may be a quad for non-lead package (QFN), dual flat package (DFP), dual inline package (DIP), quad flat package (QFP), single inline package (SIP), or small outline J-leaded package (SOJ), or various similar package structures.
  • QFN quad for non-lead package
  • DFP dual flat package
  • DIP dual inline package
  • QFP quad flat package
  • SIP single inline package
  • SOJ small outline J-leaded package
  • the signal transmission device 10 includes a sealing resin 90, a plurality of first lead terminals 11-18 (eight in the first embodiment) protruding from the sealing resin 90, and a plurality of second lead terminals 41-48 (eight in the first embodiment) protruding from the sealing resin 90.
  • the sealing resin 90 is formed in a rectangular plate shape.
  • the thickness direction of the sealing resin 90 is the "Z direction", and two mutually perpendicular directions among the directions perpendicular to the Z direction are the "X direction” and the "Y direction”.
  • the upper side of the Z direction is the "+Z direction", and the lower side is the "-Z direction”.
  • the front side of the X direction is the "+X direction”
  • the rear side is the "-X direction”.
  • the right side of the Y direction is the "+Y direction”
  • the left side is the "-Y direction”.
  • planar view refers to viewing the signal transmission device 10 from the thickness direction of the sealing resin 90. Unless otherwise specified, planar view refers to viewing the signal transmission device 10 from the +Z direction.
  • the shape of the sealing resin 90 in plan view is rectangular with the X direction being the long side and the Y direction being the short side.
  • the dimension of the sealing resin 90 in the X direction is about 7.5 mm
  • the dimension of the sealing resin 90 in the Y direction is about 6.4 mm
  • the dimension (thickness) of the sealing resin 90 in the Z direction is about 2.35 mm.
  • the sealing resin 90 has a sealing surface 91, a sealing back surface 92 opposite the sealing surface 91, and first to fourth sealing side surfaces 93 to 96 connecting the sealing surface 91 and the sealing back surface 92.
  • the sealing surface 91 is a surface facing the +Z direction
  • the sealing back surface 92 is a surface facing the -Z direction.
  • the first sealing side surface 93 and the second sealing side surface 94 form both end surfaces of the sealing resin 90 in the X direction
  • the third sealing side surface 95 and the fourth sealing side surface 96 form both end surfaces of the sealing resin 90 in the Y direction.
  • the first sealing side surface 93 is a surface facing the +X direction
  • the second sealing side surface 94 is a surface facing the -X direction.
  • the third sealing side surface 95 is a surface facing the +Y direction
  • the fourth sealing side surface 96 is a surface facing the -Y direction.
  • a recess 91A is formed in the sealing surface 91.
  • the recess 91A is circular in a plan view.
  • the recess 91A is recessed in a curved concave shape from the sealing surface 91.
  • the recess 91A is formed in a portion of the sealing surface 91 that is closer to the first sealing side surface 93 and the fourth sealing side surface 96.
  • the recess 91A serves as a marker for distinguishing the first lead terminals 11-18 from the second lead terminals 41-48.
  • the first sealing side 93 includes a first front side 93A that is continuous with the sealing surface 91, a first back side 93B that is continuous with the sealing back surface 92, and a first central side 93C.
  • the second sealing side 94 includes a second front side 94A that is continuous with the sealing surface 91, a second back side 94B that is continuous with the sealing back surface 92, and a second central side 94C.
  • the first front side 93A and the second front side 94A are inclined in a direction away from each other as they move from the sealing surface 91 toward the sealing back surface 92.
  • the connection portion between the first front side 93A and the sealing surface 91 is formed with an inclined surface 93AA.
  • the angle formed by the inclined surface 93AA and the Z direction is larger than the angle formed by the first front side 93A and the Z direction.
  • the angle formed by the inclined surface 93AA and the Z direction is, for example, 45°.
  • the connection portion between the second front surface side surface 94A and the sealing surface 91 is formed in a curved shape.
  • the first back surface side surface 93B and the second back surface side surface 94B are inclined in a direction away from each other as they move from the sealing back surface 92 to the sealing surface 91.
  • the connection portion between the first back surface side surface 93B and the second back surface side surface 94B and the sealing back surface 92 is formed in a curved shape.
  • the first central side surface 93C is formed between the first front surface side surface 93A and the first back surface side surface 93B in the Z direction.
  • the first central side surface 93C is connected to both the first front surface side surface 93A and the first back surface side surface 93B.
  • the first central side surface 93C is formed as a flat surface along, for example, the YZ plane.
  • the second central side surface 94C is formed between the second front surface side surface 94A and the second back surface side surface 94B in the Z direction.
  • the second central side surface 94C is connected to both the second front surface side surface 94A and the second back surface side surface 94B.
  • the second central side surface 94C is formed as a flat surface along the YZ plane, for example.
  • the third sealing side 95 includes a third front side 95A that is continuous with the sealing surface 91, a third back side 95B that is continuous with the sealing back surface 92, and a third central side 95C.
  • the fourth sealing side 96 includes a fourth front side 96A that is continuous with the sealing surface 91, a fourth back side 96B that is continuous with the sealing back surface 92, and a fourth central side 96C.
  • the third front side 95A and the fourth front side 96A are inclined in directions away from each other as they move from the sealing surface 91 to the sealing back surface 92.
  • the connection portions between the third front side 95A and the fourth front side 96A and the sealing surface 91 are formed in a curved shape.
  • the third back side 95B and the fourth back side 96B are inclined in directions away from each other as they move from the sealing back surface 92 to the sealing surface 91.
  • the connection portions between the third back side 95B and the fourth back side 96B and the sealing back surface 92 are formed in a curved shape.
  • the third central side surface 95C is connected to both the third front surface side surface 95A and the third back surface side surface 95B.
  • the third central side surface 95C is formed, for example, as a flat surface along the XZ plane.
  • the fourth central side surface 96C is formed between the fourth front surface side surface 96A and the fourth back surface side surface 96B in the Z direction.
  • the fourth central side surface 96C is connected to both the fourth front surface side surface 96A and the fourth back surface side surface 96B.
  • the fourth central side surface 96C is formed, for example, as a flat surface along the XZ plane.
  • the sealing resin 90 is formed, for example, by transfer molding.
  • the third sealing side surface 95 is provided with a trace (not shown) of the gate of the mold molding die. This trace is formed when the resin portion located at the gate of the mold molding die is separated from the sealing resin 90.
  • the trace is formed, for example, on the third central side surface 95C of the third sealing side surface 95.
  • the third central side surface 95C is partitioned into three regions R1 to R3 in the X direction.
  • the regions R1 to R3 are regions of the same size.
  • the region R1 is a region of the third central side surface 95C closer to the first sealing side surface 93
  • the region R3 is a region of the third central side surface 95C closer to the second sealing side surface 94
  • the region R2 is a region between the regions R1 and R3 in the X direction.
  • the above-mentioned trace may be provided in the region R1.
  • the above-mentioned trace may also be provided in the region R2.
  • the above-mentioned trace may also be provided in the region R3.
  • the gate trace of the molding die may be formed on the fourth sealing side surface 96 instead of the third sealing side surface 95. Even in this case, the trace is formed, for example, on the fourth central side surface 96C of the fourth sealing side surface 96.
  • the surface roughness Rz of each of the sealing surface 91, sealing back surface 92, and first to fourth sealing side surfaces 93 to 96 of the sealing resin 90 is, for example, 5 ⁇ m or more and 20 ⁇ m or less.
  • the surface roughness Rz over the entire surface of each of the sealing surface 91 and sealing back surface 92 is, for example, 5 ⁇ m or more and 20 ⁇ m or less.
  • the surface roughness Rz over the entire surface of each of the first to fourth front side surfaces 93A to 96A and the first to fourth back side surfaces 93B to 96B of the first to fourth sealing side surfaces 93 to 96 is, for example, 5 ⁇ m or more and 20 ⁇ m or less.
  • the surface roughness Rz can be expressed as the sum of the height of the highest peak and the depth of the deepest valley among the contour curves at the reference length.
  • the sealing surface 91, sealing back surface 92, and first to fourth sealing side surfaces 93 to 96 are roughened to have each surface roughness Rz of, for example, 5 ⁇ m or more and 20 ⁇ m or less.
  • An example of surface roughening is shot blasting.
  • the surface roughness Rz of each of the sealing surface 91, the sealing back surface 92, and the first to fourth sealing side surfaces 93 to 96 is, for example, 8 ⁇ m or more. In one example, the surface roughness Rz of each of the sealing surface 91, the sealing back surface 92, and the first to fourth sealing side surfaces 93 to 96 is, for example, 8 ⁇ m or more and 20 ⁇ m or less.
  • the surface roughness Rz of the sealing surface 91 and the sealing back surface 92, and the first to fourth front side surfaces 93A to 96A and the first to fourth back side surfaces 93B to 96B may be greater than that of the first to fourth central side surfaces 93C to 95C. In one example, the surface roughness Rz of the sealing surface 91 and the sealing back surface 92, and the first to fourth front side surfaces 93A to 96A and the first to fourth back side surfaces 93B to 96B may be greater than the surface roughness Rz of the surfaces that make up the recess 91A.
  • the surface roughness Rz of the sealing surface 91, the sealing back surface 92, and the first to fourth sealing side surfaces 93 to 96 was 5 ⁇ m or more and 20 ⁇ m or less, but this is not limited to this.
  • the surface roughness Rz of each of the third sealing side surface 95 and the fourth sealing side surface 96 may be less than 5 ⁇ m or greater than 20 ⁇ m.
  • the surface roughness Rz of each of the first sealing side surface 93 and the second sealing side surface 94 may be less than 5 ⁇ m or greater than 20 ⁇ m.
  • the surface roughness Rz of each of the first to fourth sealing side surfaces 93 to 96 may be less than 5 ⁇ m or greater than 20 ⁇ m.
  • the surface roughness Rz of the sealing surface 91 may be less than 5 ⁇ m or greater than 20 ⁇ m. In short, it is sufficient that the surface roughness Rz of at least one of the sealing surface 91, the sealing back surface 92, and the first to fourth sealing side surfaces 93 to 96 is 5 ⁇ m or more and 20 ⁇ m or less.
  • the sealing resin 90 is made of an insulating material.
  • One example of the insulating material is black epoxy resin.
  • the sealing resin 90 contains sulfur (S) as an additive. By containing sulfur, the sealing resin 90 can increase the adhesive strength with the first frame 10A and the second frame 10B described below. On the other hand, by containing sulfur, the sealing resin 90 may cause sulfide corrosion of the copper-based components in the signal transmission device 10.
  • the concentration of sulfur added to the sealing resin 90 is set in consideration of the balance between improving the adhesive strength between the first frame 10A and the second frame 10B and the sealing resin 90 and suppressing sulfide corrosion. In one example, the concentration of sulfur added to the sealing resin 90 is set to 300 ⁇ g/g or less.
  • the first lead terminals 11-18 include first outer lead portions 11B-18B protruding outward from the sealing resin 90.
  • the first outer lead portions 11B-18B protrude from the first sealing side surface 93 toward the +X direction.
  • the first outer lead portions 11B-18B are arranged at a distance from each other in the Y direction. It can be said that the first outer lead portions 11B-18B are arranged in the short direction of the sealing resin 90.
  • the first outer lead portions 11B-18B are arranged in the order of the first outer lead portions 11B, 12B, 13B, 14B, 15B, 16B, 17B, and 18B from the fourth sealing side surface 96 toward the third sealing side surface 95.
  • the Y direction can be said to be the arrangement direction of the first outer lead portions 11B-18B.
  • the Y direction can be said to be the arrangement direction of the first lead terminals 11-18.
  • the first outer lead portions 11B to 18B have the same shape.
  • the second lead terminals 41 to 48 include second outer lead portions 41B to 48B that protrude from the sealing resin 90 to the outside.
  • the second outer lead portions 41B to 48B protrude from the second sealing side surface 94 toward the -X direction.
  • the second outer lead portions 41B to 48B are arranged at a distance from each other in the Y direction. It can be said that the second outer lead portions 41B to 48B are arranged in the short direction of the sealing resin 90.
  • the second outer lead portions 41B to 48B are arranged in the order of the second outer lead portions 41B, 42B, 43B, 44B, 45B, 46B, 47B, and 48B from the third sealing side surface 95 toward the fourth sealing side surface 96.
  • the Y direction can be said to be the arrangement direction of the second outer lead portions 41B to 48B.
  • the Y direction can be said to be the arrangement direction of the second lead terminals 41 to 48.
  • the second outer lead portions 41B to 48B have the same shape.
  • the width dimension (size in the Y direction) of the first outer lead portions 11B to 18B and the width dimension (size in the Y direction) of the second outer lead portions 41B to 48B are equal to each other.
  • the width dimension of the first outer lead portions 11B to 18B and the width dimension of the second outer lead portions 41B to 48B are, for example, about 0.33 mm.
  • the pitch of the first outer lead portions 11B to 18B and the pitch of the second outer lead portions 41B to 48B are equal to each other.
  • the pitch of the first outer lead portions 11B to 18B can be defined by the center-to-center distance between two outer lead portions adjacent in the Y direction among the first outer lead portions 11B to 18B.
  • the pitch of the second outer lead portions 41B to 48B can be defined by the center-to-center distance between two outer lead portions adjacent in the Y direction among the second outer lead portions 41B to 48B.
  • the pitch of the first outer lead portions 11B to 18B and the pitch of the second outer lead portions 41B to 48B are each, for example, approximately 0.65 mm.
  • the shape of the first outer lead portion 18B and the shape of the second outer lead portion 41B when viewed from the Y direction are the same. Therefore, it can be said that the shapes of the first outer lead portions 11B to 18B and the shapes of the second outer lead portions 41B to 48B are the same.
  • first outer lead portions 11B to 18B The configuration of the first outer lead portions 11B to 18B will be described. Below, the detailed configuration of the first outer lead portion 18B will be described, and the detailed configuration of the first outer lead portions 11B to 17B will be omitted.
  • the first outer lead portion 18B includes a protruding portion 18P extending in the +X direction from the first sealing side surface 93, an intermediate portion 18Q extending in the -Z direction from the protruding portion 18P, and a connecting portion 18R extending in the +X direction from the intermediate portion 18Q.
  • a curved first bend is formed between the protruding portion 18P and the intermediate portion 18Q
  • a curved second bend is formed between the intermediate portion 18Q and the connecting portion 18R.
  • the connecting portion 18R may be inclined toward the -Z direction as it approaches the +X direction.
  • the acute angle formed by the connecting portion 18R and the X direction is, for example, greater than 0° and equal to or less than 8°.
  • the first outer lead portion 18B includes an outer lead body 20A made of a metal material.
  • metal materials include copper and aluminum.
  • the outer lead body 20A has an outer lead surface 21A, an outer lead back surface 22A opposite the outer lead surface 21A, a pair of outer lead side surfaces 23A (see FIG. 5) connecting the outer lead surface 21A and the outer lead back surface 22A, and an outer lead end surface 24A.
  • the outer lead end surface 24A forms the tip surface of the connection portion 18R.
  • the pair of outer lead side surfaces 23A are formed in a curved concave shape.
  • the deepest position of the curved concave outer lead side surface 23A (the position where the pair of outer lead side surfaces 23A are closest in the Y direction) is closer to the outer lead back surface 22A than the center in the Z direction of the outer lead end surface 24A.
  • the outer lead body 20A has a backside curved portion 25 formed at the connection between the outer lead backside 22A and the outer lead side surface 23A.
  • the backside curved portion 25 curves upward (+Z direction) as it moves outward in the width direction (Y direction) of the outer lead body 20A. Therefore, both ends of the outer lead backside 22A in the Y direction are curved upward (+Z direction) as they move toward the pair of outer lead side surfaces 23A.
  • the first outer lead portion 18B includes a plating layer 26 that covers the outer lead body 20A. More specifically, the plating layer 26 covers the entire surfaces of the outer lead surface 21A, the outer lead back surface 22A, and the outer lead side surface 23A, as well as a portion of the outer lead end surface 24A.
  • the plating layer 26 includes an end surface plating layer 27 that covers the outer lead end surface 24A continuously from the outer lead back surface 22A toward the outer lead surface 21A.
  • the end surface plating layer 27 is located away in the Z direction from the edge of the outer lead end surface 24A on the outer lead surface 21A side. Therefore, the outer lead end surface 24A is divided into an area covered by the end surface plating layer 27 and a main body exposed area 28 that is not covered by the end surface plating layer 27. In the main body exposed area 28, the outer lead main body 20A is exposed.
  • the end surface plating layer 27 extends from the outer lead back surface 22A to a position closer to the outer lead surface 21A than the center of the outer lead end surface 24A in the Z direction. In one example, the end surface plating layer 27 covers approximately 2/3 of the outer lead end surface 24A in the Z direction.
  • the tip edge 27A of the end surface plating layer 27 includes a shape that becomes uneven in the Z direction as it approaches the Y direction. In one example, the tip edge 27A of the end surface plating layer 27 includes a recess 27B near the center in the Y direction.
  • leading edge 27A of the end surface plating layer 27 can be changed as desired.
  • the leading edge 27A of the end surface plating layer 27 may include a plurality of recesses 27B.
  • the recesses 27B may be omitted from the leading edge 27A of the end surface plating layer 27.
  • the position of the tip edge 27A of the end surface plating layer 27 in the Z direction can be changed as desired.
  • the end surface plating layer 27 may cover approximately 1/2 of the outer lead end surface 24A in the Z direction.
  • the end surface plating layer 27 may cover approximately 1/4 of the outer lead end surface 24A in the Z direction.
  • the end surface plating layer 27 may cover approximately 3/4 of the outer lead end surface 24A in the Z direction. In this way, the end surface plating layer 27 may cover a range of 1/4 to 3/4 of the outer lead end surface 24A in the Z direction.
  • the configuration of the second outer lead portions 41B to 48B will be described. Below, the detailed configuration of the second outer lead portion 41B will be described, and the detailed configuration of the second outer lead portions 42B to 48B will be omitted.
  • the second outer lead portion 41B includes a protruding portion 41P extending in the -X direction from the second sealing side surface 94, an intermediate portion 41Q extending in the -Z direction from the protruding portion 41P, and a connecting portion 41R extending in the -X direction from the intermediate portion 41Q.
  • a curved first bend is formed between the protruding portion 41P and the intermediate portion 41Q
  • a curved second bend is formed between the intermediate portion 41Q and the connecting portion 41R.
  • the connecting portion 41R may be inclined toward the -Z direction as it approaches the -X direction.
  • the acute angle formed by the connecting portion 41R and the X direction is, for example, greater than 0° and equal to or less than 8°.
  • the second outer lead portion 41B like the first outer lead portion 18B, includes an outer lead body 20A and a plating layer 26 (see FIG. 4) that covers the outer lead body 20A.
  • the plating layer 26 of the second outer lead portion 41B like the first outer lead portion 18B, also includes an end face plating layer 27 (see FIG. 4).
  • a method for forming such an end surface plating layer 27 will be described below.
  • a first lead frame (not shown) constituting the first outer lead portion 18B and a second lead frame (not shown) constituting the second outer lead portion 41B are cut by a die (punch).
  • the cutting by the die can be performed, for example, on the first lead frame and the second lead frame connected to the frame.
  • the outer leads 11B to 18B, 41B to 48B formed by cutting are formed.
  • both the first lead frame and the second lead frame before being cut by the mold include an outer lead body 20A and a plating layer 26 that covers the outer lead surface 21A, the outer lead back surface 22A, and the pair of outer lead side surfaces 23A.
  • the mold cuts both the first and second lead frames, for example, in the +Z direction. This forms the first outer lead portion 18B and the second outer lead portion 41B, each of which includes the outer lead end surface 24A.
  • the corners of the cut portion in the mold are rounded and curved. In other words, the corners are chamfered.
  • the plating layer 26 on the back surface 22A of the outer lead is pulled toward the outer lead surface 21A, forming an end surface plating layer 27 on the outer lead end surface 24A.
  • the end surface plating layer 27 is formed on both the first outer lead portion 18B and the second outer lead portion 41B, so that when the signal transmission device 10 is mounted on the circuit board PCB by a conductive bonding material SD such as solder paste or silver (Ag) paste, as shown in FIG. 6, the bonding area between the first outer lead portion 18B and the second outer lead portion 41B and the conductive bonding material SD can be increased. More specifically, the outer lead back surface 22A of the connection portion 18R of the first outer lead portion 18B, the pair of outer lead side surfaces 23A (see FIG. 5), and the outer lead back surface 22A of the end of the intermediate portion 18Q on the connection portion 18R side are each bonded to the conductive bonding material SD.
  • a conductive bonding material SD such as solder paste or silver (Ag) paste
  • the end surface plating layer 27 of the first outer lead portion 18B bonds the outer lead end surface 24A (see FIG. 5) of the first outer lead portion 18B to the conductive bonding material SD.
  • the bonding area between the first outer lead portion 18B and the conductive bonding material SD is increased by the bonding area between the end surface plating layer 27 and the conductive bonding material SD.
  • the outer lead back surface 22A of the connection portion 41R of the second outer lead portion 41B, the pair of outer lead side surfaces 23A, and the outer lead back surface 22A of the end of the intermediate portion 41Q on the connection portion 41R side are each bonded to the conductive bonding material SD.
  • the end surface plating layer 27 of the second outer lead portion 41B bonds the outer lead end surface 24A of the second outer lead portion 41B to the conductive bonding material SD.
  • the bonding area between the second outer lead portion 41B and the conductive bonding material SD is increased by the bonding area between the end surface plating layer 27 and the conductive bonding material SD.
  • a fillet is formed by the conductive bonding material SD bonded to each end surface plating layer 27 of the first outer lead portion 18B and the second outer lead portion 41B.
  • the bonding area with the conductive bonding material SD is also increased and fillets are formed for the first outer lead portions 11B-17B and the second outer lead portions 42B-48B (both see FIG. 1).
  • FIG. 7 shows the entire internal structure of the signal transmission device 10.
  • the sealing resin 90 is shown by two-dot chain lines in order to make the drawings easier to understand.
  • the signal transmission device 10 includes a first frame 10A, a second frame 10B, a first chip 60 mounted on the first frame 10A, and a second chip 70 mounted on the second frame 10B.
  • the sealing resin 90 seals the first chip 60 and the second chip 70, and also partially seals the first frame 10A and the second frame 10B.
  • the first frame 10A includes first lead terminals 11-18.
  • the first frame 10A further includes a first die pad 30.
  • the first lead terminals 11-18 and the first die pad 30 are formed from the same metal material. Examples of metal materials include copper and aluminum.
  • the first lead terminals 11, 18 arranged at both ends in the Y direction are connected to the first die pad 30.
  • the first lead terminals 11, 18 and the first die pad 30 are integrated.
  • the first lead terminals 12 to 17 arranged between the first lead terminal 11 and the first lead terminal 18 in the Y direction are arranged closer to the first sealing side surface 93 than the first die pad 30 and spaced apart from the first die pad 30 in the X direction.
  • the first die pad 30 is disposed closer to the first sealing side surface 93 than the center of the sealing resin 90 in the X direction.
  • the first die pad 30 has a size in the Y direction such that it overlaps with all of the first lead terminals 11 to 18 when viewed from the X direction.
  • the size in the Y direction of the first die pad 30 is larger than the distance in the Y direction between the edge of the first lead terminal 11 on the fourth sealing side surface 96 side and the edge of the first lead terminal 18 on the third sealing side surface 95 side.
  • the first chip 60 mounted on the first die pad 30 is formed in a flat plate shape.
  • the shape of the first chip 60 in a plan view is a rectangle with the X direction as the short side direction and the Y direction as the long side direction.
  • the first chip 60 is mounted on the first die pad 30 by a first conductive bonding material SD1. More specifically, the first chip 60 is die-bonded to the first die pad 30.
  • the first chip 60 is disposed in the center of the first die pad 30 in the X direction and in the center of the Y direction. The position of the first chip 60 relative to the first die pad 30 can be changed as desired.
  • the second frame 10B is disposed at a distance from the first frame 10A in the X direction. That is, in the first embodiment, the X direction is the arrangement direction of the first frame 10A and the second frame 10B.
  • the second frame 10B includes second lead terminals 41-48.
  • the second frame 10B further includes a second die pad 50.
  • the second lead terminals 41-48 and the second die pad 50 are formed of the same metal material. Examples of metal materials include copper and aluminum.
  • the second lead terminals 41-48 and the second die pad 50 are formed of the same metal material as the first lead terminals 11-18 and the first die pad 30.
  • the second lead terminals 41, 48 arranged at both ends in the Y direction are connected to the second die pad 50.
  • the second lead terminals 41, 48 and the second die pad 50 are integrated.
  • the second lead terminals 42 to 47 arranged between the second lead terminal 41 and the second lead terminal 48 in the Y direction are arranged closer to the second sealing side surface 94 than the second die pad 50 and are spaced apart from the second die pad 50.
  • the second die pad 50 is disposed in the X direction away from the first die pad 30 and closer to the second sealing side surface 94 than the first die pad 30.
  • the X direction can be said to be the arrangement direction of the first die pad 30 and the second die pad 50.
  • the first die pad 30 and the second die pad 50 can also be said to be arranged in the longitudinal direction of the sealing resin 90.
  • the second die pad 50 is disposed in the X direction closer to the second sealing side surface 94 than the center of the sealing resin 90.
  • the second die pad 50 has a size in the Y direction such that it overlaps with all of the second lead terminals 41 to 48 when viewed from the X direction.
  • the size in the Y direction of the second die pad 50 is larger than the distance between the edge of the second lead terminal 41 on the third sealing side surface 95 side and the edge of the second lead terminal 48 on the fourth sealing side surface 96 side.
  • the size in the Y direction of the second die pad 50 is equal to the size in the Y direction of the first die pad 30.
  • the shape of the first frame 10A and the shape of the second frame 10B are symmetrical with respect to a virtual line along the Y direction at the center of the sealing resin 90 in the X direction.
  • the second chip 70 mounted on the second die pad 50 is formed in a flat plate shape.
  • the shape of the second chip 70 in a plan view is a rectangle with the X direction being the short side direction and the Y direction being the long side direction.
  • the size of the second chip 70 in the X direction is larger than the size of the first chip 60 in the X direction.
  • the size of the second chip 70 in the Y direction is larger than the size of the first chip 60 in the Y direction.
  • the second chip 70 is mounted on the second die pad 50 by the second conductive bonding material SD2. More specifically, the second chip 70 is die-bonded to the second die pad 50. Note that, for example, solder paste or silver paste is used as both the first conductive bonding material SD1 and the second conductive bonding material SD2.
  • the second chip 70 is disposed at the center of the second die pad 50 in the X direction and the center in the Y direction.
  • the second chip 70 is disposed at a position overlapping the first chip 60 when viewed from the X direction.
  • the center position of the second chip 70 in the Y direction and the center position of the first chip 60 in the Y direction are the same position in the Y direction. Note that the position of the second chip 70 relative to the second die pad 50 can be changed as desired.
  • the signal transmission device 10 further includes conductive members 10D and 10E.
  • the conductive members 10D and 10E are formed, for example, from the same metal material as the first frame 10A and the second frame 10B.
  • the conductive members 10D and 10E are disposed at a distance from each other. Furthermore, the conductive members 10D and 10E are disposed at a distance from both the first frame 10A and the second frame 10B. Therefore, both conductive members 10D and 10E are in an electrically floating state.
  • the conductive members 10D and 10E are disposed in positions overlapping each other when viewed from the Y direction.
  • the conductive members 10D and 10E are disposed in the center of the sealing resin 90 in the Y direction.
  • the conductive member 10D is disposed closer to the third sealing side surface 95 than the first frame 10A and the second frame 10B.
  • the conductive member 10D is exposed from the third sealing side surface 95. More specifically, a recess 95D is formed in a portion of the third sealing side surface 95 where the conductive member 10D is exposed.
  • the recess 95D is formed in the center of the third sealing side surface 95 in the Z direction. That is, the recess 95D is provided in the third central side surface 95C (see FIG. 2).
  • the recess 95D is recessed from the third sealing side surface 95 toward the fourth sealing side surface 96.
  • the recess 95D is open toward the +Y direction.
  • the conductive member 10D constitutes the bottom surface of the recess 95D.
  • the conductive member 10E is disposed closer to the fourth sealing side surface 96 than the first frame 10A and the second frame 10B.
  • the conductive member 10E is exposed from the fourth sealing side surface 96. More specifically, a recess 96D is formed in the portion of the fourth sealing side surface 96 where the conductive member 10E is exposed.
  • the recess 96D is formed in the center of the fourth sealing side surface 96 in the Z direction. In other words, the recess 96D is provided in the fourth central side surface 96C (see FIG. 2).
  • the recess 96D is recessed from the fourth sealing side surface 96 toward the third sealing side surface 95.
  • the recess 96D is open toward the -Y direction.
  • the conductive member 10E forms the bottom surface of the recess 96D.
  • the first die pad 30 has a first tip surface 31, a first base end surface 32, a first side surface 33, and a second side surface 34.
  • the first tip surface 31 is an end surface closer to the second sealing side surface 94 among both end surfaces of the first die pad 30 in the X direction
  • the first base end surface 32 is an end surface closer to the first sealing side surface 93 among both end surfaces of the first die pad 30 in the X direction.
  • the first side surface 33 is an end surface closer to the third sealing side surface 95 among both end surfaces of the first die pad 30 in the Y direction
  • the second side surface 34 is an end surface closer to the fourth sealing side surface 96 among both end surfaces of the first die pad 30 in the Y direction
  • the first tip surface 31 is a surface extending along the Y direction in a plan view.
  • the first base end surface 32 includes a recess 32A recessed from the first sealing side surface 93 toward the second sealing side surface 94 in a plan view.
  • the first die pad 30 further has a pair of protrusions 32B, 32C that form the recess 32A.
  • the pair of protrusions 32B, 32C form both ends of the first die pad 30 in the Y direction.
  • the protrusion 32B is the end of both ends of the first die pad 30 in the Y direction that is closer to the third sealing side surface 95
  • the protrusion 32C is the end of both ends of the first die pad 30 in the Y direction that is closer to the fourth sealing side surface 96.
  • Both the first side surface 33 and the second side surface 34 extend along the X direction in a plan view.
  • the first side surface 33 forms part of the protrusion 32B
  • the second side surface 34 forms part of the protrusion 32C.
  • the recess 32A includes a pair of side surfaces 32AA and a bottom surface 32AB.
  • the pair of side surfaces 32AA extend in the X direction in a plan view.
  • the bottom surface 32AB extends along the Y direction in a plan view.
  • Each side surface 32AA includes a step 32AC.
  • each step 32AC is formed such that the width dimension of the portion of the protruding portions 32B, 32C closer to the bottom surface 32AB is greater than the width dimension of the portion of the protruding portions 32B, 32C closer to the first sealing side surface 93.
  • the first side surface 33 and the second side surface 34 form the outer side surfaces of the recess 32A.
  • the first die pad 30 further has a first tip side inclined portion 35, a second tip side inclined portion 36 (both see FIG. 7), a first base side curved surface 37A, a second base side curved surface 37B, a first recess side curved surface 38A, and a second recess side curved surface 38B.
  • the first tip side inclined portion 35 is formed between the first tip surface 31 and the first side surface 33.
  • the first tip side inclined portion 35 is an inclined surface that inclines toward the third sealing side surface 95 as it moves from the first tip surface 31 toward the first base end surface 32.
  • the acute angle formed by the first tip side inclined portion 35 and the X direction is, for example, 45°.
  • the second tip side inclined portion 36 is formed between the first tip surface 31 and the second side surface 34.
  • the second tip side inclined portion 36 is an inclined surface that inclines from the first tip surface 31 toward the first base end surface 32 toward the fourth sealing side surface 96 in a plan view.
  • the length of the second tip side inclined portion 36 in a plan view is equal to the length of the first tip side inclined portion 35 in a plan view.
  • the length of the second tip side inclined portion 36 in a plan view is, for example, within 10% of the length of the first tip side inclined portion 35 in a plan view, it can be said that the length of the second tip side inclined portion 36 in a plan view is equal to the length of the first tip side inclined portion 35 in a plan view.
  • the acute angle formed by the second tip side inclined portion 36 and the X direction is, for example, 45°.
  • the first base end curved surface 37A is formed between the first base end surface 32 and the first side surface 33.
  • the first base end curved surface 37A has a shape in which the portion between the first base end surface 32 and the first side surface 33 is rounded.
  • the arc length of the first base end curved surface 37A in a plan view is shorter than the length of the first tip end inclined portion 35 (see FIG. 7) in a plan view. In other words, the length of the first tip end inclined portion 35 in a plan view is longer than the arc length of the first base end curved surface 37A in a plan view.
  • the second base end curved surface 37B is formed between the first base end surface 32 and the second side surface 34.
  • the second base end curved surface 37B has a shape in which the portion between the first base end surface 32 and the second side surface 34 is rounded.
  • the length of the arc of the second base end curved surface 37B in a plan view is shorter than the length of the second tip end inclined portion 36 (see FIG. 7) in a plan view. In other words, the length of the second tip end inclined portion 36 in a plan view is longer than the length of the arc of the second base end curved surface 37B in a plan view.
  • the first recess side curved surface 38A is formed between the side surface 32AA of the recess 32A on the protruding portion 32B side of the first base end surface 32 and the bottom surface 32AB of the recess 32A.
  • the first recess side curved surface 38A has a shape in which the portion between the side surface 32AA of the recess 32A on the protruding portion 32B side and the surface constituting the bottom surface 32AB of the recess 32A is R-chamfered.
  • the arc length of the first recess side curved surface 38A in a plan view is equal to or greater than the arc length of the first base end side curved surface 37A in a plan view.
  • the arc length of the first recess side curved surface 38A in a plan view is shorter than the length of the first tip side inclined portion 35 in a plan view. In other words, the length of the first tip side inclined portion 35 in a plan view is longer than the arc length of the first recess side curved surface 38A in a plan view.
  • the second recess side curved surface 38B is formed between the side surface 32AA of the recess 32A on the protruding portion 32C side of the first base end surface 32 and the surface constituting the bottom surface 32AB of the recess 32A.
  • the second recess side curved surface 38B has a shape in which the portion between the side surface 32AA of the recess 32A on the protruding portion 32C side and the surface constituting the bottom surface 32AB of the recess 32A is R-chamfered.
  • the arc length of the second recess side curved surface 38B in plan view is equal to or greater than the arc length of the second base end side curved surface 37B in plan view.
  • the arc length of the second recess side curved surface 38B in plan view is shorter than the length of the second tip side inclined portion 36 in plan view. In other words, the length of the second tip side inclined portion 36 in plan view is longer than the arc length of the second recess side curved surface 38B in plan view.
  • the first lead terminals 11 to 18 include first inner lead portions 11A to 18A provided in the sealing resin 90 and the above-mentioned first outer lead portions 11B to 18B.
  • the configuration of the first inner lead portions 11A to 18A will be described below.
  • the first inner lead portion 11A is positioned closer to the fourth sealing side surface 96 than the recess 32A of the first die pad 30.
  • the first inner lead portion 18A is positioned closer to the third sealing side surface 95 than the recess 32A of the first die pad 30.
  • the first inner lead portions 12A to 17A are positioned so as to overlap the recess 32A of the first die pad 30 when viewed from the X direction.
  • the tip portions of the first inner lead portions 12A to 17A are positioned within the recess 32A of the first die pad 30.
  • the first inner lead portion 11A is connected to the first base end surface 32 of the first die pad 30. More specifically, the first inner lead portion 11A is connected to the protruding portion 32C of the first die pad 30.
  • the first inner lead portion 11A extends along the X direction.
  • the width dimension (size in the Y direction) of the first inner lead portion 11A is smaller than the width dimension (size in the Y direction) of the protruding portion 32C.
  • the first inner lead portion 11A is disposed closer to the third sealing side surface 95 (closer to the first inner lead portion 12A) than the center of the protruding portion 32C in the Y direction.
  • the first inner lead portion 18A is connected to the first base end surface 32 of the first die pad 30. More specifically, the first inner lead portion 18A is connected to the protruding portion 32B of the first die pad 30.
  • the first inner lead portion 18A extends along the X direction.
  • the width dimension (size in the Y direction) of the first inner lead portion 18A is smaller than the width dimension (size in the Y direction) of the protruding portion 32B.
  • the first inner lead portion 18A is disposed closer to the fourth sealing side surface 96 (closer to the first inner lead portion 17A) than the center of the protruding portion 32B in the Y direction.
  • the first inner lead portion 12A extends along the X direction.
  • the first inner lead portion 12A includes a wire connection portion 12AA and a lead connection portion 12AB that extends from the wire connection portion 12AA toward the first sealing side surface 93.
  • the lead connection portion 12AB is connected to the first outer lead portion 12B.
  • the wire connection portion 12AA is disposed in the recess 32A of the first die pad 30.
  • the shape of the wire connection portion 12AA is substantially rectangular.
  • the portion of the wire connection portion 12AA closer to the lead connection portion 12AB is formed in a tapered shape such that the width dimension (size in the Y direction) of the wire connection portion 12AA decreases toward the lead connection portion 12AB.
  • the lead connection portion 12AB is disposed closer to the first sealing side surface 93 than the recess 32A of the first die pad 30.
  • the lead connection portion 12AB extends in the X direction in a plan view.
  • the size of the lead connection portion 12AB in the Y direction is smaller than the size of the wire connection portion 12AA in the Y direction. For this reason, it can be said that the wire connection portion 12AA extends in the Y direction relative to the lead connection portion 12AB.
  • the first inner lead portion 13A extends along the X direction.
  • the first inner lead portion 13A includes a wire connection portion 13AA and a lead connection portion 13AB that extends from the wire connection portion 13AA toward the first sealing side surface 93.
  • the lead connection portion 13AB is connected to the first outer lead portion 13B.
  • the wire connection portion 13AA is disposed in the recess 32A of the first die pad 30.
  • the shape of the wire connection portion 13AA is approximately rectangular.
  • the portion of the wire connection portion 13AA closer to the lead connection portion 13AB is tapered such that the width dimension (size in the Y direction) of the wire connection portion 13AA decreases toward the lead connection portion 13AB.
  • a corner portion of the wire connection portion 13AA closer to the bottom surface 32AB of the recess 32A and closer to the wire connection portion 12AA includes an inclined surface 13AC.
  • the inclined surface 13AC is inclined so as to move away from the wire connection portion 12AA in the Y direction toward the bottom surface 32AB of the recess 32A.
  • the lead connection portion 13AB is disposed closer to the first sealing side surface 93 than the recess 32A of the first die pad 30.
  • the lead connection portion 13AB extends in the X direction in a plan view.
  • the size of the lead connection portion 13AB in the Y direction is smaller than the size of the wire connection portion 13AA in the Y direction. For this reason, it can be said that the wire connection portion 13AA extends in the Y direction relative to the lead connection portion 13AB.
  • the first inner lead portion 14A has the same shape as the first inner lead portion 13A in a plan view. Therefore, we will only explain the general configuration of the first inner lead portion 14A, and will not explain the detailed configuration of the first inner lead portion 14A.
  • the first inner lead portion 14A includes a wire connection portion 14AA and a lead connection portion 14AB.
  • the wire connection portion 14AA is disposed within the recess 32A, and the lead connection portion 14AB is disposed closer to the first sealing side surface 93 than the recess 32A.
  • the lead connection portion 14AB extends in the X direction in a plan view, and is connected to the first outer lead portion 14B.
  • the wire connection portion 14AA extends in the Y direction relative to the lead connection portion 14AB.
  • the wire connection portion 14AA includes an inclined surface 14AC.
  • the inclined surface 14AC has the same shape as the inclined surface 13AC of the wire connection portion 13AA.
  • the first inner lead portions 15A to 17A are line-symmetrical with respect to the first inner lead portions 12A to 14A, with respect to an imaginary line that runs along the X direction at the center of the sealing resin 90 in the Y direction.
  • the first inner lead portion 15A is line-symmetrical with the first inner lead portion 14A with respect to the imaginary line.
  • the first inner lead portion 16A is line-symmetrical with the first inner lead portion 13A with respect to the imaginary line.
  • the first inner lead portion 17A is line-symmetrical with the first inner lead portion 12A with respect to the imaginary line.
  • the first inner lead portion 15A includes a wire connection portion 15AA and a lead connection portion 15AB.
  • the wire connection portion 15AA is disposed within the recess 32A, and the lead connection portion 15AB is disposed closer to the first sealing side surface 93 than the recess 32A.
  • the lead connection portion 15AB is connected to the first outer lead portion 15B.
  • the wire connection portion 15AA includes an inclined surface 15AC. In a plan view, the inclined surface 15AC is inclined so as to move away from the wire connection portion 16AA (described later) in the Y direction as it approaches the bottom surface 32AB of the recess 32A.
  • the first inner lead portion 16A includes a wire connection portion 16AA and a lead connection portion 16AB.
  • the wire connection portion 16AA is disposed within the recess 32A, and the lead connection portion 16AB is disposed closer to the first sealing side surface 93 than the recess 32A.
  • the lead connection portion 16AB is connected to the first outer lead portion 16B.
  • the wire connection portion 16AA includes an inclined surface 16AC.
  • the inclined surface 16AC has the same shape as the inclined surface 15AC of the wire connection portion 15AA.
  • the first inner lead portion 17A includes a wire connection portion 17AA and a lead connection portion 17AB.
  • the wire connection portion 17AA is disposed within the recess 32A, and the lead connection portion 17AB is disposed closer to the first sealing side surface 93 than the recess 32A.
  • the lead connection portion 17AB is connected to the first outer lead portion 17B.
  • the lead connection portions 12AB to 17AB correspond to the "first portion of the first lead terminal," and the wire connection portions 12AA to 17AA correspond to the "second portion of the first lead terminal.”
  • the X direction in which the lead connection portions 12AB to 17AB extend corresponds to the "first direction”
  • the Y direction in which the wire connection portions 12AA to 17AA extend corresponds to the "second direction.”
  • the wire connection portions 12AA to 17AA extend in a direction perpendicular to the direction in which the lead connection portions 12AB to 17AB extend in a plan view, but this is not limited to this.
  • the wire connection portions 12AA to 17AA may extend in a direction intersecting the direction in which the lead connection portions 12AB to 17AB extend in a plan view.
  • the second direction is not limited to a direction perpendicular to the first direction in a plan view, but may be a direction intersecting the first direction.
  • Figure 9 shows the cross-sectional structure of the wire connection portion 12AA of the first inner lead portion 12A. Note that the cross-sectional structure of the wire connection portions 13AA to 17AA of the first inner lead portions 13A to 17A is similar to the cross-sectional structure of the wire connection portion 12AA, so a detailed description thereof will be omitted.
  • the inner lead body 20B of the wire connection portion 12AA has an inner lead surface 21B, an inner lead back surface 22B opposite the inner lead surface 21B, and an inner lead side surface 23B connecting the inner lead surface 21B and the inner lead back surface 22B.
  • the inner lead side surface 23B includes a tip surface 24B facing the bottom surface 32AB (see FIG. 7) of the recess 32A of the first die pad 30.
  • the inner lead surface 21B is the surface to which the first lead wire WB described below is bonded, and faces the same side as the sealing surface 91 (see FIG. 1).
  • the tip surface 24B is formed in a concave shape that is recessed away from the first die pad 30 (see FIG. 8).
  • the tip surface 24B is recessed from both the end on the inner lead surface 21B side and the end on the inner lead back surface 22B side toward the center of the tip surface 24B in the Z direction.
  • the deepest position of the concave tip surface 24B is a position that is approximately 1/3 of the thickness of the wire connection portion 12AA from the inner lead back surface 22B.
  • the shape of the tip surface 24B in the cross-sectional view of FIG. 9 can be changed as desired.
  • a plating layer 29 is formed on the inner lead surface 21B.
  • the plating layer 29 is formed of a material containing silver, for example.
  • the plating layer 29 is formed over substantially the entire inner lead surface 21B in the wire connection portion 12AA.
  • the thickness of the plating layer 29 is thinner than the thickness of the inner lead body 20B in the wire connection portion 12AA.
  • End surface 29A of plating layer 29 closer to tip surface 24B is formed at a position closer to lead connection portion 12AB (see FIG. 8) than the edge of inner lead surface 21B closer to tip surface 24B.
  • plating layer 29 does not cover the end surface of inner lead surface 21B closer to tip surface 24B.
  • the end of inner lead surface 21B, including the edge closer to tip surface 24B, is in contact with sealing resin 90 (see FIG. 1).
  • End surface 29A of plating layer 29 is inclined away from the edge of inner lead surface 21B closer to tip surface 24B as it moves from the front surface to the back surface of plating layer 29.
  • the distance in the X direction between the back surface of plating layer 29 and the edge of inner lead surface 21B closer to tip surface 24B is, for example, equal to or greater than the thickness of plating layer 29. Note that the distance in the X direction between the back surface of plating layer 29 and the edge of inner lead surface 21B closer to tip surface 24B can be changed as desired.
  • the plating layer 29 does not cover the tip surface 24B of the wire connection portion 12AA. Therefore, the tip surface 24B is in contact with the sealing resin 90. Furthermore, although not shown, the plating layer 29 does not cover the inner lead side surface 23B other than the tip surface 24B. Therefore, the inner lead side surface 23B is in contact with the sealing resin 90.
  • the second die pad 50 has a second tip surface 51, a second base end surface 52, a third side surface 53, and a fourth side surface 54.
  • the second tip surface 51 is an end surface closer to the first sealing side surface 93 among both end surfaces of the second die pad 50 in the X direction
  • the second base end surface 52 is an end surface closer to the second sealing side surface 94 among both end surfaces of the second die pad 50 in the X direction.
  • the third side surface 53 is an end surface closer to the third sealing side surface 95 among both end surfaces of the second die pad 50 in the Y direction
  • the fourth side surface 54 is an end surface closer to the fourth sealing side surface 96 among both end surfaces of the second die pad 50 in the Y direction.
  • the second base end surface 52 includes a recess 52A recessed from the second sealing side surface 94 toward the first sealing side surface 93 in a plan view.
  • the second die pad 50 further has a pair of protrusions 52B, 52C that form the recess 52A.
  • the pair of protrusions 52B, 52C form both ends of the second die pad 50 in the Y direction.
  • the protrusion 52B is the end of the second die pad 50 in the Y direction that is closer to the third sealing side surface 95
  • the protrusion 52C is the end of the first die pad 30 in the Y direction that is closer to the fourth sealing side surface 96.
  • the third side surface 53 forms a part of the protrusion 52B
  • the fourth side surface 54 forms a part of the protrusion 52C.
  • the recess 52A includes a pair of inner side surfaces 52AA and a bottom surface 52AB. As shown in FIG. 10, each inner side surface 52AA includes a step 52AC.
  • the second die pad 50 further has a third tip side inclined portion 55, a fourth tip side inclined portion 56, a third base side curved surface 57A, a fourth base side curved surface 57B, a third recess side curved surface 58A, and a fourth recess side curved surface 58B.
  • the second tip surface 51, the second base end surface 52, the third side surface 53, and the fourth side surface 54 of the second die pad 50 have the same shapes as the first tip surface 31, the first base end surface 32, the first side surface 33, and the second side surface 34 of the first die pad 30. Therefore, the recess 52A has the same shape as the recess 32A.
  • the shape of the second die pad 50 may be different from the shape of the first die pad 30.
  • the second lead terminals 41 to 48 include second inner lead portions 41A to 48A provided in the sealing resin 90 and the above-mentioned second outer lead portions 41B to 48B.
  • the configuration of the second inner lead portions 41A to 48A will be described below.
  • the second inner lead portion 41A is positioned closer to the third sealing side surface 95 than the recess 52A of the second die pad 50.
  • the second inner lead portion 48A is positioned closer to the fourth sealing side surface 96 than the recess 52A of the second die pad 50.
  • the second inner lead portions 42A to 47A are positioned so as to overlap the recess 52A of the second die pad 50 when viewed from the X direction.
  • the tip portions of the second inner lead portions 42A to 47A are positioned within the recess 52A of the second die pad 50.
  • the second inner lead portion 41A is connected to the second base end surface 52 of the second die pad 50. More specifically, the second inner lead portion 41A is connected to the protruding portion 52B of the second die pad 50.
  • the second inner lead portion 41A extends along the X direction.
  • the width dimension (size in the Y direction) of the second inner lead portion 41A is smaller than the width dimension (size in the Y direction) of the protruding portion 52B.
  • the second inner lead portion 41A is disposed closer to the fourth sealing side surface 96 (closer to the second inner lead portion 42A) than the center of the protruding portion 52B in the Y direction.
  • the second inner lead portion 48A is connected to the second base end surface 52 of the second die pad 50. More specifically, the second inner lead portion 48A is connected to the protruding portion 52C of the second die pad 50.
  • the second inner lead portion 48A extends along the X direction.
  • the width dimension (size in the Y direction) of the second inner lead portion 48A is smaller than the width dimension (size in the Y direction) of the protruding portion 52C.
  • the second inner lead portion 48A is disposed closer to the fourth sealing side surface 96 (closer to the second inner lead portion 47A) than the center of the protruding portion 52C in the Y direction.
  • the second inner lead portion 42A extends along the X direction.
  • the second inner lead portion 42A includes a wire connection portion 42AA and a lead connection portion 42AB that extends from the wire connection portion 42AA toward the second sealing side surface 94.
  • the lead connection portion 42AB is connected to the second outer lead portion 42B.
  • the wire connection portion 42AA is disposed in the recess 52A of the second die pad 50.
  • the shape of the wire connection portion 42AA is substantially rectangular.
  • the portion of the wire connection portion 42AA closer to the lead connection portion 42AB is formed in a tapered shape such that the width dimension (size in the Y direction) of the wire connection portion 42AA decreases toward the lead connection portion 42AB.
  • the lead connection portion 42AB is disposed closer to the second sealing side surface 94 than the recess 52A of the second die pad 50.
  • the lead connection portion 42AB extends in the X direction.
  • the size of the lead connection portion 42AB in the Y direction is smaller than the size of the wire connection portion 42AA in the Y direction. For this reason, it can be said that the wire connection portion 42AA extends in the Y direction relative to the lead connection portion 42AB.
  • the second inner lead portion 43A extends along the X direction.
  • the second inner lead portion 43A includes a wire connection portion 43AA and a lead connection portion 43AB that extends from the wire connection portion 43AA toward the second sealing side surface 94.
  • the lead connection portion 43AB is connected to the second outer lead portion 43B.
  • the wire connection portion 43AA is disposed in the recess 52A of the second die pad 50.
  • the shape of the wire connection portion 43AA is substantially rectangular.
  • the portion of the wire connection portion 43AA closer to the lead connection portion 43AB is tapered such that the width dimension (size in the Y direction) of the wire connection portion 43AA decreases toward the lead connection portion 43AB.
  • a corner portion of the wire connection portion 43AA closer to the bottom surface 52AB of the recess 52A and closer to the wire connection portion 42AA includes an inclined surface 43AC.
  • the inclined surface 43AC is inclined so as to move away from the wire connection portion 42AA in the Y direction toward the bottom surface 52AB of the recess 52A.
  • the lead connection portion 43AB is disposed closer to the second sealing side surface 94 than the recess 52A of the second die pad 50.
  • the lead connection portion 43AB extends in the X direction.
  • the size of the lead connection portion 43AB in the Y direction is smaller than the size of the wire connection portion 43AA in the Y direction. For this reason, it can be said that the wire connection portion 43AA extends in the Y direction relative to the lead connection portion 43AB.
  • the second inner lead portion 44A has the same shape as the second inner lead portion 43A in a plan view. Therefore, the general configuration of the second inner lead portion 44A will be described, and a detailed description of the configuration of the second inner lead portion 44A will be omitted.
  • the second inner lead portion 44A includes a wire connection portion 44AA and a lead connection portion 44AB.
  • the wire connection portion 44AA is disposed within the recess 52A, and the lead connection portion 44AB is disposed closer to the second sealing side surface 94 than the recess 52A.
  • the lead connection portion 44AB extends in the X direction and is connected to the second outer lead portion 44B.
  • the wire connection portion 44AA extends in the Y direction relative to the lead connection portion 44AB.
  • the wire connection portion 44AA includes an inclined surface 44AC. In one example, the inclined surface 44AC has the same shape as the inclined surface 43AC of the wire connection portion 43AA.
  • the second inner lead portions 45A to 47A are symmetrical to the second inner lead portions 42A to 44A with respect to an imaginary line along the X direction at the center of the sealing resin 90 in the Y direction.
  • the second inner lead portion 45A is symmetrical to the second inner lead portion 44A with respect to the imaginary line.
  • the second inner lead portion 46A is symmetrical to the second inner lead portion 43A with respect to the imaginary line.
  • the second inner lead portion 47A is symmetrical to the second inner lead portion 42A with respect to the imaginary line.
  • the second inner lead portion 45A includes a wire connection portion 45AA and a lead connection portion 45AB.
  • the wire connection portion 45AA is disposed within the recess 52A, and the lead connection portion 45AB is disposed closer to the second sealing side surface 94 than the recess 52A.
  • the lead connection portion 45AB is connected to the second outer lead portion 45B.
  • the wire connection portion 45AA includes an inclined surface 45AC. In a plan view, the inclined surface 45AC is inclined so as to move away from the wire connection portion 46AA (described later) in the Y direction as it approaches the bottom surface 52AB of the recess 52A.
  • the second inner lead portion 46A includes a wire connection portion 46AA and a lead connection portion 46AB.
  • the wire connection portion 46AA is disposed within the recess 52A, and the lead connection portion 46AB is disposed closer to the second sealing side surface 94 than the recess 52A.
  • the lead connection portion 46AB is connected to the second outer lead portion 46B.
  • the wire connection portion 46AA includes an inclined surface 46AC.
  • the inclined surface 46AC has the same shape as the inclined surface 45AC of the wire connection portion 45AA.
  • the second inner lead portion 47A includes a wire connection portion 47AA and a lead connection portion 47AB.
  • the wire connection portion 47AA is disposed within the recess 52A, and the lead connection portion 47AB is disposed closer to the second sealing side surface 94 than the recess 52A.
  • the lead connection portion 47AB is connected to the second outer lead portion 47B.
  • the lead connection portions 42AB to 47AB correspond to the "third portion of the second lead terminal," and the wire connection portions 42AA to 47AA correspond to the "fourth portion of the second lead terminal.”
  • the X direction in which the lead connection portions 42AB to 47AB extend corresponds to the "first direction”
  • the Y direction in which the wire connection portions 42AA to 47AA extend corresponds to the "second direction.”
  • the wire connection portions 42AA to 47AA extend in a direction perpendicular to the direction in which the lead connection portions 42AB to 47AB extend in a plan view, but this is not limited to this.
  • the wire connection portions 42AA to 47AA may extend in a direction that intersects with the direction in which the lead connection portions 42AB to 47AB extend in a plan view.
  • FIG. 11 shows the cross-sectional structure of the wire connection portion 42AA of the second inner lead portion 42A.
  • the cross-sectional structure of the wire connection portions 43AA to 47AA of the second inner lead portions 43A to 47A is similar to the cross-sectional structure of the wire connection portion 42AA, so a detailed description thereof will be omitted.
  • the reference numerals relating to the second inner lead portion 42A are the same as those relating to the first inner lead portion 12A.
  • the inner lead body 20B of the wire connection portion 42AA has an inner lead surface 21B, an inner lead back surface 22B opposite the inner lead surface 21B, and an inner lead side surface 23B connecting the inner lead surface 21B and the inner lead back surface 22B.
  • the inner lead surface 21B of the wire connection portion 42AA faces the same side as the inner lead surface 21B of the wire connection portion 12AA (see Figure 9)
  • the inner lead back surface 22B of the wire connection portion 42AA faces the same side as the inner lead back surface 22B of the wire connection portion 12AA (see Figure 9).
  • the tip surface 24B is formed in a concave shape that is recessed away from the second die pad 50 (see FIG. 7).
  • the tip surface 24B is recessed from both the end on the inner lead surface 21B side and the end on the inner lead back surface 22B side toward the center of the tip surface 24B in the Z direction.
  • the deepest position of the concave tip surface 24B is approximately 1/3 of the thickness of the wire connection portion 42AA from the inner lead back surface 22B.
  • the shape of the tip surface 24B in the cross-sectional view of FIG. 11 can be changed as desired.
  • a plating layer 29 is formed on the inner lead surface 21B.
  • the plating layer 29 is formed of a material containing silver, for example.
  • the plating layer 29 is formed of the same material as the plating layer 29 of the wire connection portion 12AA (see FIG. 9).
  • the plating layer 29 is formed over almost the entire inner lead surface 21B.
  • the thickness of the plating layer 29 is thinner than the thickness of the inner lead body 20B of the wire connection portion 42AA.
  • the thickness of the plating layer 29 of the wire connection portion 42AA is equal to the thickness of the plating layer 29 of the wire connection portion 12AA.
  • the thickness of the plating layer 29 of the wire connection portion 42AA is within 20% of the thickness of the plating layer 29 of the wire connection portion 42AA, for example, it can be said that the thickness of the plating layer 29 of the wire connection portion 42AA is equal to the thickness of the plating layer 29 of the wire connection portion 12AA.
  • End surface 29A of plating layer 29 near tip surface 24B of wire connection portion 42AA is formed at a position closer to lead connection portion 42AB (see FIG. 10) than the edge of inner lead surface 21B near tip surface 24B.
  • plating layer 29 does not cover the edge of inner lead surface 21B near tip surface 24B.
  • the end of inner lead surface 21B, including the edge near tip surface 24B, is in contact with sealing resin 90 (see FIG. 1).
  • end surface 29A of plating layer 29 is inclined away from the end surface of inner lead surface 21B closer to tip surface 24B as it moves from the front surface to the back surface of plating layer 29.
  • the distance in the X direction between the back surface of plating layer 29 and the edge of inner lead surface 21B closer to tip surface 24B is, for example, equal to or greater than the thickness of plating layer 29. Note that the distance in the X direction between the back surface of plating layer 29 and the edge of inner lead surface 21B closer to tip surface 24B can be changed as desired.
  • the plating layer 29 does not cover the tip surface 24B of the wire connection portion 42AA. Therefore, the tip surface 24B is in contact with the sealing resin 90. Furthermore, although not shown, the plating layer 29 does not cover the inner lead side surface 23B other than the tip surface 24B. Therefore, the inner lead side surface 23B is in contact with the sealing resin 90.
  • the first chip 60 mounted on the first die pad 30 has a chip surface 61, a chip back surface 62 (see FIG. 19) facing the opposite side to the chip surface 61 in the Z direction, and first to fourth chip side surfaces 63 to 66 connecting the chip surface 61 and the chip back surface 62.
  • a chip front surface 61 faces the side opposite to the first die pad 30 side with respect to the first chip 60
  • a chip back surface 62 faces the side facing the first die pad 30
  • the first chip side surface 63 and the second chip side surface 64 constitute both end surfaces in the X direction of the first chip 60 in a plan view.
  • the first chip side surface 63 is the chip side surface on the side of the first chip 60 on which the first lead terminals 11 to 18 are arranged
  • the second chip side surface 64 is the chip side surface on the side of the first chip 60 on which the second chip 70 is arranged.
  • the third chip side surface 65 and the fourth chip side surface 66 constitute both end surfaces in the Y direction of the first chip 60 in a plan view.
  • the third chip side surface 65 is the chip side surface closer to the third sealing side surface 95 of the sealing resin 90
  • the fourth chip side surface 66 is the chip side surface closer to the fourth sealing side surface 96.
  • the first chip 60 has a plurality of first electrode pads 67 (six in the first embodiment), a plurality of second electrode pads 68 (seven in the first embodiment), and a plurality of third electrode pads 69 (two in the first embodiment).
  • Each of the first electrode pads 67, each of the second electrode pads 68, and each of the third electrode pads 69 are provided so as to be exposed from the chip surface 61.
  • Each of the first electrode pads 67, second electrode pads 68, and third electrode pads 69 may include at least one of titanium (Ti), titanium nitride (TiN), copper (Cu), aluminum (Al), and tungsten (W).
  • each of the first electrode pads 67, second electrode pads 68, and third electrode pads 69 has a laminated structure of titanium and copper.
  • the material constituting one or two types of electrode pads among each of the first electrode pads 67, second electrode pads 68, and third electrode pads 69 may be different from the material constituting the remaining types of electrode pads.
  • each of the first electrode pads 67, each of the second electrode pads 68, and each of the third electrode pads 69 includes aluminum.
  • each of the first electrode pads 67, each of the second electrode pads 68, and each of the third electrode pads 69 exposed from the chip surface 61 has a thickness of 2 ⁇ m or more. Note that the thickness of each of the first electrode pads 67, each of the second electrode pads 68, and each of the third electrode pads 69 can be changed as desired.
  • the multiple first electrode pads 67 are electrode pads electrically connected to the second chip 70.
  • the multiple first electrode pads 67 are provided in a position closer to the second chip side surface 64 than the center in the X direction of the chip surface 61 in a plan view.
  • the multiple first electrode pads 67 are arranged at the same positions as each other in the X direction and spaced apart from each other in the Y direction.
  • the second electrode pads 68 are electrode pads that are individually and electrically connected to the first lead terminals 12 to 17.
  • the second electrode pads 68 are provided at positions closer to the first chip side surface 63 than the center in the X direction of the chip surface 61 in a plan view.
  • the second electrode pads 68 are arranged at the same positions as one another in the X direction and spaced apart from one another in the Y direction, except for one second electrode pad 68 closest to the fourth chip side surface 66.
  • the one second electrode pad 68 closest to the fourth chip side surface 66 is shifted toward the second chip side surface 64 in the X direction relative to the other second electrode pads 68.
  • the multiple third electrode pads 69 are electrode pads electrically connected to the first die pad 30. Each third electrode pad 69 has the same potential as the first die pad 30, i.e., the first ground potential.
  • the multiple third electrode pads 69 are provided at both ends in the Y direction of the chip surface 61 in a plan view.
  • the multiple third electrode pads 69 are arranged between the multiple first electrode pads 67 and the multiple second electrode pads 68 in the X direction when viewed from the Y direction.
  • the multiple third electrode pads 69 are arranged in positions that overlap each other when viewed from the Y direction.
  • the second chip 70 mounted on the second die pad 50 has a chip surface 71, a chip back surface (not shown) facing the opposite side to the chip surface 71 in the Z direction, and first to fourth chip side surfaces 73 to 76 connecting the chip surface 71 and the chip back surface.
  • the chip front surface 71 faces the side opposite to the second die pad 50 side with respect to the second chip 70
  • the chip back surface faces the side facing the second die pad 50
  • the first chip side surface 73 and the second chip side surface 74 constitute both end surfaces in the X direction of the second chip 70 in a plan view.
  • the first chip side surface 73 is the chip side surface of the second chip 70 on the side where the first chip 60 is arranged
  • the second chip side surface 74 is the chip side surface of the second chip 70 on the side where the second lead terminals 41 to 48 are arranged.
  • the third chip side surface 75 and the fourth chip side surface 76 constitute both end surfaces in the Y direction of the second chip 70 in a plan view.
  • the third chip side surface 75 is the chip side surface closer to the third sealing side surface 95 of the sealing resin 90
  • the fourth chip side surface 76 is the chip side surface closer to the fourth sealing side surface 96.
  • the second chip 70 has a plurality of first electrode pads 77 (six in the first embodiment), a plurality of second electrode pads 78 (seven in the first embodiment), and a plurality of third electrode pads 79 (three in the first embodiment).
  • Each of the first electrode pads 77, each of the second electrode pads 78, and each of the third electrode pads 79 are provided so as to be exposed from the chip surface 71.
  • Each of the first electrode pads 77, second electrode pads 78, and third electrode pads 79 may include at least one of titanium, titanium nitride, copper, aluminum, and tungsten.
  • each of the first electrode pads 77, second electrode pads 78, and third electrode pads 79 has a laminated structure of titanium and copper. Note that the material constituting one or two types of electrode pads among each of the first electrode pads 77, second electrode pads 78, and third electrode pads 79 may be different from the material constituting the remaining types of electrode pads.
  • each of the first electrode pads 77, each of the second electrode pads 78, and each of the third electrode pads 79 includes aluminum.
  • each of the first electrode pads 77, each of the second electrode pads 78, and each of the third electrode pads 79 exposed from the chip surface 71 has a thickness of 2 ⁇ m or more. Note that the thickness of each of the first electrode pads 77, each of the second electrode pads 78, and each of the third electrode pads 79 can be changed as desired.
  • the multiple first electrode pads 77 are electrode pads that are individually and electrically connected to the multiple first electrode pads 67 of the first chip 60.
  • the multiple first electrode pads 77 are provided in a position closer to the first chip side surface 73 than the center in the X direction of the chip surface 71 in a plan view.
  • the multiple first electrode pads 77 are arranged at the same positions as each other in the X direction and spaced apart from each other in the Y direction.
  • the second electrode pads 78 are electrode pads that are individually and electrically connected to the second lead terminals 42 to 47.
  • the second electrode pads 78 are provided at positions closer to the second chip side surface 74 than the center of the chip surface 71 in the X direction in a plan view.
  • the multiple third electrode pads 79 are electrode pads electrically connected to the second die pad 50. Each third electrode pad 79 has the same potential as the second die pad 50, i.e., the second ground potential. The multiple third electrode pads 79 are provided closer to the third chip side surface 75 than the center in the Y direction of the chip surface 71 in a plan view. The multiple third electrode pads 79 are arranged spaced apart from each other in the X direction.
  • the first electrode pads 67 of the first chip 60 and the first electrode pads 77 of the second chip 70 are individually connected by a plurality of (six in the first embodiment) inter-chip wires WA, whereby the first electrode pads 67 and the first electrode pads 77 are individually and electrically connected.
  • the distance between two adjacent first electrode pads 67 in the Y direction among the three first electrode pads 67 near the third chip side surface 65 on the first chip 60 is greater than the distance between two adjacent first electrode pads 77 in the Y direction among the three first electrode pads 77 near the third chip side surface 75 on the second chip 70. Therefore, the distance between two adjacent inter-chip wires WA in the Y direction among the three inter-chip wires WA near the third chip side surface 65 (75) gradually increases from the first electrode pad 77 to the first electrode pad 67.
  • the three interchip wires WA are referred to as interchip wires WA1, WA2, and WA3 in the order from the third chip side surface 65 (75) to the fourth chip side surface 66 (76).
  • the interchip wire WA1 is inclined from the third chip side surface 65 (75) to the fourth chip side surface 66 (76) as it moves from the first electrode pad 67 to the first electrode pad 77.
  • the interchip wire WA2 extends along the X direction between the first electrode pad 67 and the first electrode pad 77.
  • the interchip wire WA3 is inclined from the fourth chip side surface 66 (76) to the third chip side surface 65 (75) as it moves from the first electrode pad 67 to the first electrode pad 77.
  • the acute angle formed between the inter-chip wire WA1 and the X direction is 10° or less. In one example, the acute angle formed between the inter-chip wire WA1 and the X direction is greater than 0° and less than 3°. In one example, the acute angle formed between the inter-chip wire WA1 and the X direction is greater than 3° and less than 5°. In one example, the acute angle formed between the inter-chip wire WA1 and the X direction is greater than 5° and less than 7°. In one example, the acute angle formed between the inter-chip wire WA1 and the X direction is greater than 7° and less than 10°.
  • the acute angle formed by the inter-chip wires WA1 and WA2 is 10° or less. In one example, the acute angle formed by the inter-chip wires WA1 and WA2 is greater than 0° and less than 3°. In one example, the acute angle formed by the inter-chip wires WA1 and WA2 is greater than 3° and less than 5°. In one example, the acute angle formed by the inter-chip wires WA1 and WA2 is greater than 5° and less than 7°. In one example, the acute angle formed by the inter-chip wires WA1 and WA2 is greater than 7° and less than 10°.
  • the acute angle formed between the inter-chip wire WA3 and the X direction is 10° or less. In one example, the acute angle formed between the inter-chip wire WA3 and the X direction is greater than 0° and less than 3°. In one example, the acute angle formed between the inter-chip wire WA3 and the X direction is greater than 3° and less than 5°. In one example, the acute angle formed between the inter-chip wire WA3 and the X direction is greater than 5° and less than 7°. In one example, the acute angle formed between the inter-chip wire WA3 and the X direction is greater than 7° and less than 10°.
  • the acute angle formed by the inter-chip wire WA3 and the inter-chip wire WA2 is 10° or less. In one example, the acute angle formed by the inter-chip wire WA3 and the inter-chip wire WA2 is greater than 0° and less than 3°. In one example, the acute angle formed by the inter-chip wire WA3 and the inter-chip wire WA2 is greater than 3° and less than 5°. In one example, the acute angle formed by the inter-chip wire WA3 and the inter-chip wire WA2 is greater than 5° and less than 7°. In one example, the acute angle formed by the inter-chip wire WA3 and the inter-chip wire WA2 is greater than 7° and less than 10°.
  • the acute angle formed by the inter-chip wires WA1 and WA3 is 10° or less. In one example, the acute angle formed by the inter-chip wires WA1 and WA3 is greater than 0° and less than 3°. In one example, the acute angle formed by the inter-chip wires WA1 and WA3 is greater than 3° and less than 5°. In one example, the acute angle formed by the inter-chip wires WA1 and WA3 is greater than 5° and less than 7°. In one example, the acute angle formed by the inter-chip wires WA1 and WA3 is greater than 7° and less than 10°.
  • the distance between two adjacent first electrode pads 67 in the Y direction among the three first electrode pads 67 near the fourth chip side surface 66 on the first chip 60 is greater than the distance between two adjacent first electrode pads 77 in the Y direction among the three first electrode pads 77 near the fourth chip side surface 76 on the second chip 70. Therefore, the distance between two adjacent inter-chip wires WA in the Y direction among the three inter-chip wires WA near the fourth chip side surface 66 (76) gradually increases from the first electrode pad 67 to the first electrode pad 77.
  • interchip wires WA are referred to as interchip wires WA4, WA5, and WA6 in the order from the third chip side surface 65 (75) to the fourth chip side surface 66 (76).
  • the interchip wire WA4 is inclined from the third chip side surface 65 (75) to the fourth chip side surface 66 (76) as it moves from the first electrode pad 67 to the first electrode pad 77.
  • the interchip wire WA5 extends along the X direction between the first electrode pad 67 and the first electrode pad 77.
  • the interchip wire WA6 is inclined from the fourth chip side surface 66 (76) to the third chip side surface 65 (75) as it moves from the first electrode pad 67 to the first electrode pad 77.
  • the acute angle formed between the inter-chip wire WA4 and the X direction is 10° or less. In one example, the acute angle formed between the inter-chip wire WA4 and the X direction is greater than 0° and less than 3°. In one example, the acute angle formed between the inter-chip wire WA4 and the X direction is greater than 3° and less than 5°. In one example, the acute angle formed between the inter-chip wire WA4 and the X direction is greater than 5° and less than 7°. In one example, the acute angle formed between the inter-chip wire WA4 and the X direction is greater than 7° and less than 10°.
  • the acute angle formed by the inter-chip wires WA4 and WA5 is 10° or less. In one example, the acute angle formed by the inter-chip wires WA4 and WA5 is greater than 0° and less than 3°. In one example, the acute angle formed by the inter-chip wires WA4 and WA5 is greater than 3° and less than 5°. In one example, the acute angle formed by the inter-chip wires WA4 and WA5 is greater than 5° and less than 7°. In one example, the acute angle formed by the inter-chip wires WA4 and WA5 is greater than 7° and less than 10°.
  • the acute angle formed between the inter-chip wire WA6 and the X direction is 10° or less. In one example, the acute angle formed between the inter-chip wire WA6 and the X direction is greater than 0° and less than 3°. In one example, the acute angle formed between the inter-chip wire WA6 and the X direction is greater than 3° and less than 5°. In one example, the acute angle formed between the inter-chip wire WA6 and the X direction is greater than 5° and less than 7°. In one example, the acute angle formed between the inter-chip wire WA6 and the X direction is greater than 7° and less than 10°.
  • the acute angle formed by the inter-chip wires WA6 and WA5 is 10° or less. In one example, the acute angle formed by the inter-chip wires WA6 and WA5 is greater than 0° and less than 3°. In one example, the acute angle formed by the inter-chip wires WA6 and WA5 is greater than 3° and less than 5°. In one example, the acute angle formed by the inter-chip wires WA6 and WA5 is greater than 5° and less than 7°. In one example, the acute angle formed by the inter-chip wires WA6 and WA5 is greater than 7° and less than 10°.
  • the acute angle formed by the inter-chip wire WA4 and the inter-chip wire WA6 is 10° or less. In one example, the acute angle formed by the inter-chip wire WA4 and the inter-chip wire WA6 is greater than 0° and less than 3°. In one example, the acute angle formed by the inter-chip wire WA4 and the inter-chip wire WA6 is greater than 3° and less than 5°. In one example, the acute angle formed by the inter-chip wire WA4 and the inter-chip wire WA6 is greater than 5° and less than 7°. In one example, the acute angle formed by the inter-chip wire WA4 and the inter-chip wire WA6 is greater than 7° and less than 10°.
  • the multiple second electrode pads 68 of the first chip 60 and the first lead terminals 12 to 17 are individually connected by multiple (seven in the first embodiment) first lead wires WB. This allows the first chip 60 and the first lead terminals 12 to 17 to be individually electrically connected.
  • Each of the first lead terminals 13 to 17 is individually connected to the multiple second electrode pads 68 by one first lead wire WB.
  • the first lead terminal 12 is connected to two second electrode pads 68 by two first lead wires WB.
  • the first lead wire WB is a bonding wire formed by a wire bonding device.
  • the bonded portion of the first lead wire WB with the second electrode pad 68 is a first bond portion
  • the bonded portion with the first lead terminals 12 to 17 is a second bond portion.
  • the first lead wire WB is connected to the wire connection portions 12AA to 17AA of the first inner lead portions 12A to 17A of the first lead terminals 12 to 17.
  • the multiple third electrode pads 69 of the first chip 60 and the first die pad 30 are individually connected by multiple (two in the first embodiment) first die pad wires WC.
  • the multiple third electrode pads 69 are electrically connected to the first die pad 30.
  • the multiple third electrode pads 69 are at the first ground potential. It can also be said that the multiple third electrode pads 69 are electrically connected to the first lead terminals 11, 18.
  • the wire WC for the first die pad connected to the third electrode pad 69 near the third chip side surface 65 of the first chip 60 is connected to the end of the first die pad 30 near the first side surface 33 of both ends in the Y direction.
  • the wire WC for the first die pad connected to the third electrode pad 69 near the fourth chip side surface 66 of the first chip 60 is connected to the end of the first die pad 30 near the second side surface 34 of both ends in the Y direction.
  • the wire WC for the first die pad is a bonding wire formed by a wire bonding device.
  • the bond portion of the wire WC for the first die pad with the third electrode pad 69 is a first bond portion
  • the bond portion of the wire WC for the first die pad with the first die pad 30 is a second bond portion.
  • the second electrode pads 78 of the second chip 70 and the second lead terminals 42 to 47 are individually connected by a plurality of second lead wires WD (seven in the first embodiment). This allows the second chip 70 and the second lead terminals 42 to 47 to be individually electrically connected.
  • Each of the second lead terminals 42 to 45, 47 is individually connected to the second electrode pads 78 by one second lead wire WD.
  • the second lead terminal 46 is connected to two second electrode pads 78 by two second lead wires WD.
  • the second lead wire WD is a bonding wire formed by a wire bonding device.
  • the bonded portion of the second lead wire WD with the second electrode pad 78 is a first bond portion
  • the bonded portion with the second lead terminals 42 to 47 is a second bond portion.
  • the second lead wire WD is connected to the wire connection portions 42AA to 47AA of the second inner lead portions 42A to 47A of the second lead terminals 42 to 47.
  • the multiple third electrode pads 79 of the second chip 70 and the second die pad 50 are individually connected by multiple (three in the first embodiment) second die pad wires WE. This electrically connects the second chip 70 and the second die pad 50. Therefore, the third electrode pads 79 of the second chip 70 are at the second ground potential. It can also be said that the third electrode pads 79 are electrically connected to the second lead terminals 41, 48.
  • Each of the multiple second die pad wires WE individually connected to the multiple third electrode pads 79 is connected to the end of the second die pad 50 in the Y direction that is closer to the third side surface 53.
  • the second die pad wire WE is a bonding wire formed by a wire bonding device.
  • the connection portion of the second die pad wire WE with the third electrode pad 79 is a first bond portion
  • the bond portion with the second die pad 50 is a second bond portion.
  • the material constituting the inter-chip wires WA1 to WA6 is different from the material constituting each of the first lead wire WB, the first die pad wire WC, the second lead wire WD, and the second die pad wire WE.
  • the first lead wire WB, the first die pad wire WC, the second lead wire WD, and the second die pad wire WE are each made of the same material.
  • the inter-chip wires WA1 to WA6 are formed from a material containing gold.
  • the first lead wire WB, the first die pad wire WC, the second lead wire WD, and the second die pad wire WE are each formed from a material containing copper.
  • the first lead wire WB, the first die pad wire WC, the second lead wire WD, and the second die pad wire WE are each configured with a copper wire surface coated with palladium (Pd). This can improve oxidation resistance and corrosion resistance compared to a copper wire surface not coated with palladium.
  • each of the first lead wire WB, the first die pad wire WC, the second lead wire WD, and the second die pad wire WE may be made of a material containing aluminum.
  • a security bond WC1 is formed on the second bond portion of each first die pad wire WC.
  • a security bond WE1 is formed on the second bond portion of each second die pad wire WE.
  • FIG. 13 shows an oblique view of the second bond portion of the wire WE for the second die pad and its surroundings. Note that since the configuration of the second bond portion of the wire WE for the second die pad and the configuration of the second bond portion of the wire WC for the first die pad are the same, the configuration of the second bond portion of the wire WE for the second die pad will be described in detail, and a detailed description of the configuration of the second bond portion of the wire WC for the first die pad will be omitted.
  • the second bond portion of the wire WE for the second die pad includes a joint WEP that is bonded to the second die pad 50.
  • the joint WEP is a portion that is crushed by being pressed against the second die pad 50 by the wire bonding device.
  • the thickness of the joint WEP is smaller than the diameter of the wire WE for the second die pad.
  • the security bond WE1 is formed, for example, by providing a stud bump SB on the joint WEP.
  • the stud bump SB is formed by ball bonding using a wire bonding device.
  • the joint WEP is sandwiched between the second die pad 50 and the stud bump SB.
  • the circuit configuration of the signal transmission device 10 of the first embodiment will be described with reference to FIG.
  • the signal transmission device 10 includes a first circuit 300, a second circuit 310, and a first transformer 321 and a second transformer 322 configured to provide insulation between the first circuit 300 and the second circuit 310 and to exchange signals between the first circuit 300 and the second circuit 310.
  • the first chip 60 includes the first circuit 300, the first transformer 321, and the second transformer 322, and the second chip 70 includes the second circuit 310.
  • the signal transmission device 10 also includes first terminals P1 to P8, which are external terminals electrically connected to the first circuit 300, and second terminals Q1 to Q8, which are external terminals electrically connected to the second circuit 310.
  • the first terminal P1 is a ground terminal (GND1)
  • the first terminal P2 is a positive power supply terminal (VCC1)
  • the first terminal P3 is an adjustment terminal (ADJA)
  • the first terminal P4 is an adjustment terminal (ADJB)
  • the first terminal P5 is a detection terminal (RDYC)
  • the first terminal P6 is a detection terminal (FLT_IN)
  • the first terminal P7 is an input terminal (IN)
  • the first terminal P8 is a ground terminal (GND2).
  • the first terminal P1 and the first terminal P8 are electrically connected to each other.
  • the first terminal P1 corresponds to the first lead terminal 11
  • the first terminal P2 corresponds to the first lead terminal 12
  • the first terminal P3 corresponds to the first lead terminal 13
  • the first terminal P4 corresponds to the first lead terminal 14
  • the first terminal P5 corresponds to the first lead terminal 15
  • the first terminal P6 corresponds to the first lead terminal 16
  • the first terminal P7 corresponds to the first lead terminal 17
  • the first terminal P8 corresponds to the first lead terminal 18.
  • the second terminal Q1 is a negative power supply terminal (VEE2)
  • the second terminal Q2 is a clamp terminal (CLAMP)
  • the second terminal Q3 is an off signal output terminal (OFF)
  • the second terminal Q4 is an on signal output terminal (ON)
  • the second terminal Q5 is a voltage detection terminal (DESAT)
  • the second terminal Q6 is a positive power supply terminal (VCC2)
  • the second terminal Q7 is a ground terminal (GND2)
  • the second terminal Q8 is a negative power supply terminal (VEE2).
  • the second terminal Q1 and the second terminal Q8 are electrically connected to each other.
  • the second terminal Q1 corresponds to the second lead terminal 41
  • the second terminal Q2 corresponds to the second lead terminal 42
  • the second terminal Q3 corresponds to the second lead terminal 43
  • the second terminal Q4 corresponds to the second lead terminal 44
  • the second terminal Q5 corresponds to the second lead terminal 45
  • the second terminal Q6 corresponds to the second lead terminal 46
  • the second terminal Q7 corresponds to the second lead terminal 47
  • the second terminal Q8 corresponds to the second lead terminal 48.
  • the first circuit 300 includes a transmitting unit 301, a transmitting/receiving unit 302, a PWM (Pulse Width Modulation) generating unit 303, a logic unit 304, a UVLO (Under Voltage Lock Out) unit 305, a resistor 306, a first switching element 307, and a second switching element 308.
  • the first terminal P2 is electrically connected to the UVLO unit 305
  • the first terminals P3 to P6 are electrically connected to the logic unit 304
  • the first terminal P7 is electrically connected to the PWM generating unit 303.
  • the logic unit 304 is electrically connected individually to the transmitting/receiving unit 302, the PWM generating unit 303, and the UVLO unit 305.
  • the PWM generating unit 303 is electrically connected to the transmitting unit 301.
  • the transmitting unit 301 is electrically connected to the first coil of the first transformer 321.
  • the transmitting unit 301 is configured to transmit the PWM signal input from the PWM generating unit 303 to the second circuit 310 using the first transformer 321.
  • the PWM generating unit 303 is configured to generate a PWM signal based on an external signal input to the first terminal P7, and output the PWM signal to the transmitting unit 301 and the logic unit 304.
  • a resistor 306 is electrically connected to the conductive path between the first terminal P7 and the PWM generating unit 303.
  • the resistor 306 is, for example, a pull-down resistor.
  • a first terminal of the resistor 306 is electrically connected to the conductive path, and a second terminal of the resistor 306 is electrically connected to the first terminal P1 (P8).
  • the transmitter/receiver 302 is electrically connected to the first coil of the second transformer 322.
  • the transmitter/receiver 302 is configured to transmit a signal input from the logic unit 304 to the second circuit 310 using the second transformer 322, and to receive a signal from the second circuit 310 using the second transformer 322.
  • the logic unit 304 is configured to exchange various signals with an external control device (not shown) of the signal transmission device 10 via the first terminals P3 to P6, and to exchange various signals with the second circuit 310 using the transmission unit 301 and the transmission/reception unit 302.
  • a switching element 307 is electrically connected to the conductive path between the first terminal P5 and the logic unit 304.
  • An n-channel MOSFET Metal-Oxide-Semiconductor Field-Effect Transistor
  • the drain of the switching element 307 is electrically connected to the conductive path (first terminal P5), and the source of the switching element 307 is electrically connected to the first terminal P1 (P8).
  • the gate of the switching element 307 is electrically connected to the logic unit 304. Therefore, the logic unit 304 controls the switching element 307.
  • a switching element 308 is electrically connected to the conductive path between the first terminal P6 and the logic unit 304.
  • an n-channel MOSFET is used as the switching element 308.
  • the drain of the switching element 308 is electrically connected to the conductive path (first terminal P6), and the source of the switching element 308 is electrically connected to the first terminal P1 (P8).
  • the gate of the switching element 308 is electrically connected to the logic unit 304. Therefore, the logic unit 304 controls the switching element 308.
  • the logic unit 304 changes the voltage at the first terminals P5 and P6 by turning on and off the switching elements 307 and 308.
  • the control device can grasp the state of the signal transmission device 10 by monitoring the first terminals P5 and P6.
  • the UVLO unit 305 stops the operation of the logic unit 304 when the voltage of the control power supply electrically connected to the first terminal P2 falls below a threshold voltage, thereby suppressing the occurrence of a malfunction.
  • the second circuit 310 includes a receiving section 311, a transmitting/receiving section 312, a logic section 313, a UVLO section 314, a clamp control section 315, an output control section 316, a desaturation fault detection section 317, a Miller clamp circuit 315A, a first output switching element 316A, a second output switching element 316B, a current source 317A, and a switching element 317B.
  • the second terminal Q2 is electrically connected to the clamp control unit 315
  • the second terminals Q3 and Q4 are electrically connected to the output control unit 316
  • the second terminals Q5 and Q7 are electrically connected to the desaturation fault detection unit 317
  • the second terminal Q6 is electrically connected to the UVLO unit 314.
  • the logic unit 313 is individually and electrically connected to the receiving unit 311, the transmitting/receiving unit 312, the UVLO unit 314, the clamp control unit 315, the output control unit 316, and the desaturation fault detection unit 317.
  • the receiving unit 311 is electrically connected to the second coil of the first transformer 321.
  • the receiving unit 311 is configured to receive a PWM signal from the transmitting unit 301 via the first transformer 321 and output the received PWM signal to the logic unit 313.
  • the logic unit 313 is configured to individually control the clamp control unit 315, the output control unit 316, and the desaturation fault detection unit 317.
  • the logic unit 313 is configured to output signals from the clamp control unit 315, the output control unit 316, and the desaturation fault detection unit 317 to the transceiver unit 312.
  • the UVLO unit 314 stops the operation of the logic unit 313 when the voltage of the control power supply electrically connected to the second terminal Q6 falls below a threshold voltage, thereby suppressing the occurrence of a malfunction.
  • the clamp control unit 315 is a circuit that controls the operation of the Miller clamp circuit 315A.
  • the Miller clamp circuit 315A includes a first switching element 315B and a second switching element 315C that are connected in series with each other, and a diode 315D.
  • the first switching element 315B is, for example, a p-channel MOSFET
  • the second switching element 315C is, for example, an n-channel MOSFET.
  • the source of the first switching element 315B is electrically connected to the second terminal Q6, and the drain of the first switching element 315B is electrically connected to the drain of the second switching element 315C.
  • the source of the second switching element 315C is electrically connected to the second terminal Q1 (Q8).
  • the connection point between the drain of the first switching element 315B and the drain of the second switching element 315C is electrically connected to the second terminal Q2.
  • the anode of the diode 315D is electrically connected to the second terminal Q2 and the drain of the first switching element 315B, and the cathode of the diode 315D is electrically connected to the second terminal Q6 and the source of the first switching element 315B.
  • the gate of the first switching element 315B and the gate of the second switching element 315C are each electrically connected to the clamp control unit 315. Therefore, the clamp control unit 315 controls the operation of each of the first switching element 315B and the second switching element 315C.
  • the output control section 316 is a circuit that controls the operation of the first output switching element 316A and the second output switching element 316B.
  • the voltage at the second terminal Q4 changes based on the on/off operation of the first output switching element 316A, and an on signal is output from the second terminal Q4.
  • the voltage at the second terminal Q3 changes based on the on/off operation of the second output switching element 316B, and an off signal is output from the second terminal Q3.
  • the first output switching element 316A may be, for example, a p-channel MOSFET, and the second output switching element 316B may be, for example, an n-channel MOSFET.
  • the gate of the first output switching element 316A and the gate of the second output switching element 316B are each electrically connected to the output control unit 316.
  • the source of the first output switching element 316A is electrically connected to the second terminal Q6, and the drain of the first output switching element 316A is electrically connected to both the second terminal Q4 and the output control unit 316.
  • the drain of the second output switching element 316B is electrically connected to both the second terminal Q3 and the output control unit 316, and the source of the second output switching element 316B is electrically connected to the second terminal Q1 (Q8).
  • the fault signal input to the second terminal Q5 is input to the non-saturation fault detection unit 317.
  • the non-saturation fault detection unit 317 outputs the input fault signal to the logic unit 313.
  • the non-saturation fault detection unit 317 is electrically connected to the current source 317A and the switching element 317B.
  • Current source 317A is electrically connected to second terminal Q6 and second terminal Q5.
  • Current source 317A supplies current to desaturation fault detection unit 317.
  • An n-channel MOSFET is used as switching element 317B.
  • the drain of switching element 317B is electrically connected to second terminal Q5, and the source of switching element 317B is electrically connected to second terminal Q7.
  • the gate of switching element 317B is electrically connected to desaturation fault detection unit 317. Therefore, desaturation fault detection unit 317 controls the operation of switching element 317B.
  • FIGS. 15 to 18 show a schematic planar structure of an example of the internal configuration of the first chip 60.
  • FIGS. 19 to 24 show a schematic cross-sectional structure of an example of the internal configuration of the first chip 60. Note that to make the drawings easier to understand, some of the hatched lines have been omitted from the schematic cross-sectional structures of the first chip 60 in FIGS. 19 to 24.
  • FIG. 15 shows a schematic planar structure of an example of the internal configuration close to the chip front surface 61 of the first chip 60.
  • Fig. 16 is an enlarged view of an insulating transformer region 110, described later, in Fig. 15.
  • Fig. 17 shows a schematic planar structure of an example of the internal structure close to the chip back surface 62 of the first chip 60.
  • Fig. 18 is an enlarged view of the insulating transformer region 110 in Fig. 17.
  • the first chip 60 has an insulating transformer region 110 and a circuit region 120 , and a peripheral guard ring 100 that is connected to the insulating transformer region 110 and surrounds the circuit region 120 .
  • the insulating transformer region 110 is a region that electrically insulates the circuit region 120 from the second chip 70 while allowing transmission of signals between the circuit region 120 and the second chip 70.
  • the insulating transformer region 110 is formed closer to the second chip side surface 64 than the center of the first chip 60 in the X direction in a plan view. In other words, the insulating transformer region 110 is formed in a region of the first chip 60 that is closer to the second chip 70 (see FIG. 7 ) in a plan view.
  • the insulating transformer region 110 extends over substantially the entire first chip 60 in the Y direction.
  • the components of the first circuit 300 in FIG. 14 other than the first transformer 321 and the second transformer 322 are formed. These components include a transmitter 301, a transceiver 302, a PWM generator 303, a logic unit 304, and a UVLO unit 305.
  • the components of the first circuit 300 other than the first transformer 321 and the second transformer 322 may be referred to as “multiple first functional units” and “multiple circuit elements.”
  • a plurality of second electrode pads 68 and a plurality of third electrode pads 69 are formed in the circuit region 120.
  • the plurality of second electrode pads 68 are electrically connected to at least one of the plurality of first function units and the plurality of circuit elements.
  • the plurality of third electrode pads 69 are electrically connected to the plurality of circuit elements.
  • a first transformer 321 and a second transformer 322 are formed in the insulating transformer region 110.
  • the first transformer 321 and the second transformer 322 are arranged at the same position in the X direction and spaced apart from each other in the Y direction.
  • the first transformer 321 is arranged closer to the third chip side surface 65 in the insulating transformer region 110
  • the second transformer 322 is arranged closer to the fourth chip side surface 66 in the insulating transformer region 110.
  • the first transformer 321 includes a first front side coil 111A and a first back side coil 111B, and a second front side coil 112A and a second back side coil 112B.
  • the second transformer 322 includes a third front side coil 113A and a third back side coil 113B, and a fourth front side coil 114A and a fourth back side coil 114B.
  • the first to fourth surface side coils 111A to 114A are arranged at the same positions in the X direction and spaced apart from each other in the Y direction.
  • the first to fourth surface side coils 111A to 114A are arranged in the following order from the third chip side surface 65 to the fourth chip side surface 66: first surface side coil 111A, second surface side coil 112A, third surface side coil 113A, and fourth surface side coil 114A.
  • the first to fourth back side coils 111B to 114B are arranged at the same positions in the X direction and spaced apart from each other in the Y direction.
  • the first to fourth back side coils 111B to 114B are arranged in the following order from the third chip side surface 65 to the fourth chip side surface 66: first back side coil 111B, second back side coil 112B, third back side coil 113B, and fourth back side coil 114B.
  • first surface side coil 111A, the second surface side coil 112A, the third surface side coil 113A, and the fourth surface side coil 114A are arranged at the same position in the Z direction.
  • the first back side coil 111B, the second back side coil 112B, the third back side coil 113B, and the fourth back side coil 114B are arranged at the same position in the Z direction.
  • Each of the first to fourth front side coils 111A to 114A and the first to fourth back side coils 111B to 114B may contain at least one of titanium, titanium nitride, copper, aluminum, and tungsten.
  • the first to fourth front side coils 111A to 114A contain copper
  • the first to fourth back side coils 111B to 114B contain aluminum.
  • the first to fourth front side coils 111A to 114A have a layered structure of titanium and copper
  • the first to fourth back side coils 111B to 114B have a layered structure of titanium nitride and aluminum.
  • a plurality of first electrode pads 67 are formed in the insulating transformer region 110.
  • the plurality of first electrode pads 67 are arranged at the same positions in the X direction and spaced apart from each other in the Y direction.
  • the plurality of first electrode pads 67 include six first electrode pads 67A to 67F.
  • the first electrode pads 67A to 67F are arranged in the order of first electrode pads 67A, 67B, 67C, 67D, 67E, and 67F from the third chip side surface 65 to the fourth chip side surface 66.
  • the first surface side coil 111A includes a first coil portion 111A1 that is spiral-shaped in a plan view, a first outer coil end portion 111A2, and a first inner coil end portion 111A3.
  • the first outer coil end portion 111A2 constitutes the end portion in the winding direction of the outermost periphery of the first coil portion 111A1
  • the first inner coil end portion 111A3 constitutes the end portion in the winding direction of the innermost periphery of the first coil portion 111A1.
  • the second surface side coil 112A includes a second coil portion 112A1 that is spiral-shaped in a plan view, a second outer coil end portion 112A2, and a second inner coil end portion 112A3.
  • the second outer coil end portion 112A2 constitutes the end portion in the winding direction at the outermost periphery of the second coil portion 112A1
  • the second inner coil end portion 112A3 constitutes the end portion in the winding direction at the innermost periphery of the second coil portion 112A1.
  • the first electrode pad 67A is disposed in an inner space including the winding center of the first coil portion 111A1 in a plan view. It can be said that the first electrode pad 67A is located more inward than the first coil portion 111A1.
  • the first electrode pad 67A is connected to the first inner coil end 111A3. Therefore, it can be said that the first electrode pad 67A is electrically connected to the first end of the first surface side coil 111A.
  • the first electrode pad 67B is disposed between the first surface side coil 111A and the second surface side coil 112A in the Y direction in a plan view.
  • the first electrode pad 67B is connected to the first outer coil end 111A2 of the first surface side coil 111A.
  • the first electrode pad 67B is also connected to the second outer coil end 112A2 of the second surface side coil 112A. Therefore, it can be said that the first electrode pad 67B is electrically connected to the second end of the first surface side coil 111A and the second end of the second surface side coil 112A.
  • the first electrode pad 67C is disposed in an inner space including the winding center of the second coil portion 112A1 in a plan view. It can be said that the first electrode pad 67C is located more inward than the second coil portion 112A1.
  • the first electrode pad 67C is connected to the second inner coil end portion 112A3. Therefore, it can be said that the first electrode pad 67C is electrically connected to the first end portion of the second surface side coil 112A.
  • the third surface side coil 113A includes a third coil portion 113A1 that is spiral-shaped in a plan view, a third outer coil end portion 113A2, and a third inner coil end portion 113A3.
  • the third outer coil end portion 113A2 constitutes the end portion in the winding direction at the outermost periphery of the third coil portion 113A1
  • the third inner coil end portion 113A3 constitutes the end portion in the winding direction at the innermost periphery of the third coil portion 113A1.
  • the fourth surface side coil 114A includes a fourth coil portion 114A1 that is spiral-shaped in a plan view, a fourth outer coil end portion 114A2, and a fourth inner coil end portion 114A3.
  • the fourth outer coil end portion 114A2 constitutes the end portion in the winding direction of the outermost periphery of the fourth coil portion 114A1
  • the fourth inner coil end portion 114A3 constitutes the end portion in the winding direction of the innermost periphery of the fourth coil portion 114A1.
  • the first electrode pad 67D is disposed in an inner space including the winding center of the third coil portion 113A1 in a plan view. It can be said that the first electrode pad 67D is located more inward than the third coil portion 113A1. The first electrode pad 67D is connected to the third inner coil end portion 113A3. Therefore, it can be said that the first electrode pad 67D is electrically connected to the first end portion of the third surface side coil 113A.
  • the first electrode pad 67E is disposed between the third surface side coil 113A and the fourth surface side coil 114A in the Y direction in a plan view.
  • the first electrode pad 67E is connected to the third outer coil end 113A2 of the third surface side coil 113A.
  • the first electrode pad 67E is also connected to the fourth outer coil end 114A2 of the fourth surface side coil 114A. Therefore, it can be said that the first electrode pad 67E is electrically connected to the second end of the third surface side coil 113A and the second end of the fourth surface side coil 114A.
  • the first electrode pad 67F is disposed in an inner space including the winding center of the fourth coil portion 114A1 in a plan view. It can be said that the first electrode pad 67F is located more inward than the fourth coil portion 114A1. The first electrode pad 67F is connected to the fourth inner coil end portion 114A3. Therefore, it can be said that the first electrode pad 67F is electrically connected to the first end portion of the fourth surface side coil 114A.
  • the first to fourth surface side coils 111A to 114A have the same number of turns.
  • the winding direction of the first surface side coil 111A and the winding direction of the second surface side coil 112A are opposite to each other, and the winding direction of the third surface side coil 113A and the winding direction of the fourth surface side coil 114A are opposite to each other.
  • the winding direction of the first surface side coil 111A and the winding direction of the third surface side coil 113A are the same direction, and the winding direction of the second surface side coil 112A and the winding direction of the fourth surface side coil 114A are the same direction.
  • the first back side coil 111B is arranged opposite the first front side coil 111A (see FIG. 15) in the Z direction.
  • the first back side coil 111B includes a first coil portion 111B1 that is spiral in plan view, a first outer coil end 111B2, and a first inner coil end 111B3.
  • the first outer coil end 111B2 constitutes the end of the first coil portion 111B1 in the winding direction at the outermost periphery
  • the first inner coil end 111B3 constitutes the end of the first coil portion 111B1 in the winding direction at the innermost periphery.
  • the first outer coil end 111B2 is connected to a first connection wiring 118A that extends in the X direction.
  • the first connection wiring 118A is electrically connected to the transmitting unit 301 (see FIG. 14) of the circuit area 120 (see FIG. 17).
  • the first inner coil end 111B3 is connected to a first wiring not shown.
  • the first wiring is electrically connected to the transmitter 301 of the circuit area 120.
  • the second back side coil 112B is arranged opposite the second front side coil 112A (see FIG. 15) in the Z direction.
  • the second back side coil 112B includes a second coil portion 112B1 that is spiral in plan view, a second outer coil end 112B2, and a second inner coil end 112B3.
  • the second outer coil end 112B2 constitutes the end of the second coil portion 112B1 in the winding direction at the outermost periphery
  • the second inner coil end 112B3 constitutes the end of the second coil portion 112B1 in the winding direction at the innermost periphery.
  • the second outer coil end 112B2 is connected to the second connection wiring 118B that extends in the X direction.
  • the second connection wiring 118B is arranged in a position adjacent to the first connection wiring 118A in the Y direction.
  • the second connection wiring 118B is arranged closer to the second back side coil 112B than the first connection wiring 118A.
  • the second connection wiring 118B is electrically connected to the transmitting section 301 of the circuit area 120.
  • the second inner coil end 112B3 is connected to a second wiring (not shown).
  • the second wiring is electrically connected to the transmitting section 301 of the circuit area 120.
  • the third back side coil 113B is arranged opposite the third front side coil 113A (see FIG. 15) in the Z direction.
  • the third back side coil 113B includes a third coil portion 113B1 that is spiral in plan view, a third outer coil end 113B2, and a third inner coil end 113B3.
  • the third outer coil end 113B2 constitutes the end of the third coil portion 113B1 in the winding direction at the outermost part
  • the third inner coil end 113B3 constitutes the end of the third coil portion 113B1 in the winding direction at the innermost part.
  • the third outer coil end 113B2 is connected to a third connection wiring 118C that extends in the X direction.
  • the third connection wiring 118C is electrically connected to the transceiver unit 302 (see FIG. 14) of the circuit area 120.
  • the third inner coil end 113B3 is connected to a third wiring not shown.
  • the third wiring is electrically connected to the transmitter/receiver unit 302 of the circuit area 120.
  • the fourth back side coil 114B is arranged opposite the fourth front side coil 114A (see FIG. 15) in the Z direction.
  • the fourth back side coil 114B includes a fourth coil portion 114B1 that is spiral in plan view, a fourth outer coil end 114B2, and a fourth inner coil end 114B3.
  • the fourth outer coil end 114B2 constitutes the end of the fourth coil portion 114B1 in the winding direction at the outermost part
  • the fourth inner coil end 114B3 constitutes the end of the fourth coil portion 114B1 in the winding direction at the innermost part.
  • the fourth outer coil end 114B2 is connected to a fourth connection wiring 118D that extends in the X direction.
  • the fourth connection wiring 118D is arranged in a position adjacent to the third connection wiring 118C in the Y direction.
  • the fourth connection wiring 118D is arranged closer to the fourth back side coil 114B than the third connection wiring 118C.
  • the fourth connection wiring 118D is electrically connected to the transceiver unit 302 of the circuit area 120.
  • the fourth inner coil end 114B3 is connected to a fourth wiring (not shown).
  • the fourth wiring is electrically connected to the transceiver unit 302 of the circuit area 120.
  • the number of turns of the first to fourth back side coils 111B to 114B are equal to each other.
  • the winding direction of the first back side coil 111B and the winding direction of the second back side coil 112B are opposite to each other, and the winding direction of the third back side coil 113B and the winding direction of the fourth back side coil 114B are opposite to each other.
  • the winding direction of the first back side coil 111B and the winding direction of the third back side coil 113B are the same direction, and the winding direction of the second back side coil 112B and the winding direction of the fourth back side coil 114B are the same direction.
  • the number of turns of the first to fourth back side coils 111B to 114B is equal to the number of turns of the first to fourth front side coils 111A to 114A.
  • a surface side guard ring 115 is formed in the insulating transformer region 110, surrounding the first to fourth surface side coils 111A to 114A and the first electrode pads 67A to 67F in a plan view.
  • the shape of the surface side guard ring 115 in a plan view is a track shape.
  • a back side guard ring 116 is formed in the insulating transformer region 110 to surround the first to fourth back side coils 111B to 114B in a plan view.
  • the shape of the back side guard ring 116 in a plan view is a track shape.
  • the shape and size of the back side guard ring 116 are the same as those of the front side guard ring 115.
  • the back side guard ring 116 is formed at a position that overlaps with the front side guard ring 115.
  • Vias 117 are formed to connect front-side guard ring 115 and back-side guard ring 116. Vias 117 are positioned so as to overlap both front-side guard ring 115 and back-side guard ring 116 in plan view.
  • the circuit region 120 is provided with a plurality of wiring layers 121.
  • the plurality of wiring layers 121 include a wiring layer that electrically connects the plurality of first functional units, and a wiring layer that electrically connects the plurality of functional units to the first transformer 321 and the second transformer 322 of the insulating transformer region 110.
  • the plurality of first functional units are formed in a position in the circuit region 120 closer to the chip back surface 62 (see FIG. 19) in the Z direction than the plurality of wiring layers 121. In one example, although not shown in FIG. 17, the plurality of first functional units are formed in the same position in the Z direction as the first to fourth back surface side coils 111B to 114B. Note that the position in the Z direction at which the plurality of first functional units are formed can be changed as desired.
  • the peripheral guard ring 100 includes a front-side peripheral guard ring 101 and a back-side peripheral guard ring 102 .
  • the front-side outer periphery guard ring 101 is connected to the front-side guard ring 115. More specifically, the front-side outer periphery guard ring 101 is connected to both ends of the front-side guard ring 115 in the Y direction.
  • the front-side outer periphery guard ring 101 includes a first portion extending in the X direction at a position adjacent to the third chip side surface 65 in the Y direction in a plan view, a second portion continuing from the first portion and extending in the Y direction at a position adjacent to the second chip side surface 64 in the X direction, and a third portion continuing from the second portion and extending in the X direction at a position adjacent to the fourth chip side surface 66 in the Y direction.
  • the front-side outer periphery guard ring 101 further includes a first connection portion extending in the Y direction from the first portion toward the front-side guard ring 115 and connected to the front-side guard ring 115, and a second connection portion extending in the Y direction from the third portion toward the front-side guard ring 115 and connected to the front-side guard ring 115. In this manner, the front-side outer peripheral guard ring 101 is electrically connected to the front-side guard ring 115 .
  • the rear outer periphery guard ring 102 is connected to the rear guard ring 116. More specifically, the rear outer periphery guard ring 102 is connected to both ends of the rear guard ring 116 in the Y direction.
  • the rear outer periphery guard ring 102 includes a first portion extending in the X direction at a position adjacent to the third chip side surface 65 in the Y direction in a plan view, a second portion continuing from the first portion and extending in the Y direction at a position adjacent to the second chip side surface 64 in the X direction, and a third portion continuing from the second portion and extending in the X direction at a position adjacent to the fourth chip side surface 66 in the Y direction.
  • the rear outer periphery guard ring 102 further includes a first connection portion extending in the Y direction from the first portion toward the rear guard ring 116 and connected to the rear guard ring 116, and a second connection portion extending in the Y direction from the third portion toward the rear guard ring 116 and connected to the rear guard ring 116.
  • the rear surface outer peripheral guard ring 102 is electrically connected to the rear surface outer peripheral guard ring 116.
  • the shape and size of the rear surface outer peripheral guard ring 102 in a plan view are the same as those of the front surface outer peripheral guard ring 101.
  • the rear surface outer peripheral guard ring 102 is disposed at a position that overlaps with the front surface outer peripheral guard ring 101 in a plan view.
  • the first chip 60 has multiple peripheral vias that connect the front-side peripheral guard ring 101 and the back-side peripheral guard ring 102.
  • the front-side peripheral guard ring 101 and the back-side peripheral guard ring 102 are electrically connected by the multiple peripheral vias.
  • Each peripheral via extends in the Z direction.
  • a cross-sectional structure of the insulating transformer region 110 will be described as an example of the internal configuration of the first chip 60. Since the first transformer 321 and the second transformer 322 have the same configuration in the insulating transformer region 110, the configuration of the first transformer 321 will be described in detail below, and a detailed description of the second transformer 322 will be omitted.
  • FIG. 19 shows a cross-sectional structure of a portion of the first transformer 321 cut along line F19-F19 in FIG. 15.
  • FIG. 20 is an enlarged view of a portion of the first transformer 321 in FIG. 19.
  • FIG. 21 is an enlarged view of the F21 portion of the first front surface side coil 111A of the first transformer 321 in FIG. 20, and
  • FIG. 22 is an enlarged view of the F22 portion of the first rear surface side coil 111B of the first transformer 321 in FIG. 20. Note that hatched lines have been omitted in FIG. 19 to make the drawing easier to understand.
  • the first chip 60 has the above-mentioned substrate 130 and an element insulating layer 150 formed on the substrate 130 .
  • the substrate 130 is formed of, for example, a semiconductor substrate.
  • the substrate 130 is a semiconductor substrate formed of a material containing silicon (Si).
  • the substrate 130 may use a wide band gap semiconductor or a compound semiconductor as a semiconductor substrate.
  • the substrate 130 may use an insulating substrate formed of a material containing glass, or an insulating substrate formed of a material containing ceramics such as alumina.
  • the wide bandgap semiconductor is a semiconductor substrate having a bandgap of 2.0 eV or more.
  • the wide bandgap semiconductor may be silicon carbide (SiC).
  • the compound semiconductor may be a III-V compound semiconductor.
  • the compound semiconductor may include at least one of aluminum nitride (AlN), indium nitride (InN), gallium nitride (GaN), and gallium arsenide (GaAs).
  • the substrate 130 is formed in a flat plate shape.
  • the substrate 130 has a substrate front surface 131 and a substrate back surface 132 opposite the substrate front surface 131.
  • the substrate back surface 132 constitutes the chip back surface 62 of the first chip 60.
  • the element insulating layer 150 is in contact with the substrate surface 131. In one example, the element insulating layer 150 is formed over the entire surface of the substrate surface 131. In one example, the element insulating layer 150 is an oxide film formed from a material containing silicon oxide (SiO 2 ). The element insulating layer 150 may be formed by stacking a plurality of such oxide films. Note that the material forming the element insulating layer 150 can be changed as desired.
  • the element insulating layer 150 has a layer surface 151 and a layer back surface 152 opposite the layer surface 151.
  • the layer surface 151 faces the same side as the substrate surface 131, and the layer back surface 152 faces the same side as the substrate back surface 132.
  • the layer back surface 152 is in contact with the substrate surface 131.
  • first electrode pads 67A to 67F are formed on the element insulating layer 150.
  • a passivation film 161 is formed on the element insulating layer 150.
  • a protective film 162 is formed on the element insulating layer 150.
  • the first electrode pads 67A to 67F are in contact with the layer surface 151 of the element insulating layer 150.
  • the first electrode pads 67A to 67F are formed at the same positions as each other in the Z direction.
  • the passivation film 161 is a film that protects the element insulating layer 150, and is formed to cover the layer surface 151.
  • the passivation film 161 is formed to cover the first electrode pads 67A to 67F.
  • the passivation film 161 has openings (not shown) that expose a part of the first electrode pads 67A to 67F in the Z direction.
  • the protective film 162 is formed on the passivation film 161.
  • the passivation film 161 is formed of a single layer of a silicon nitride (SiN) film or a silicon oxynitride (SiON) film.
  • the passivation film 161 is formed of a laminated structure of a silicon oxide film and a silicon nitride film. In this case, the silicon nitride film may be formed on the silicon oxide film. In another example, the passivation film 161 is formed of a laminated structure of a silicon oxide film and a silicon oxynitride film. In this case, the silicon oxynitride film may be formed on the silicon oxide film.
  • the thickness of the passivation film 161 (the size of the passivation film 161 in the Z direction) is thinner than the thickness of the protective film 162 (the size of the protective film 162 in the Z direction). In one example, the thickness of the passivation film 161 is 1 ⁇ 3 or less of the thickness of the protective film 162. In one example, the thickness of the passivation film 161 is 1 ⁇ 4 or less of the thickness of the protective film 162. In one example, the thickness of the passivation film 161 is 1 ⁇ 5 or more of the thickness of the protective film 162. In the example shown in FIG. 20, the thickness of the passivation film 161 is about 1.3 ⁇ m.
  • the protective film 162 is formed on the passivation film 161.
  • the protective film 162 is a film that protects the first chip 60, and is formed of a material that contains, for example, polyimide (PI).
  • the protective film 162 can also be said to be a layer that relieves stress between the sealing resin 90 and the element insulating layer 150 and between the sealing resin 90 and the substrate 130.
  • the protective film 162 constitutes the chip surface 61 of the first chip 60.
  • the first surface side coil 111A and the first back side coil 111B of the first transformer 321 are arranged opposite each other with a gap in the Z direction.
  • the element insulating layer 150 is interposed between the first surface side coil 111A and the first back side coil 111B in the Z direction.
  • the first surface side coil 111A and the first back side coil 111B are provided in the element insulating layer 150. It can also be said that the first back side coil 111B is embedded in the element insulating layer 150.
  • the first surface side coil 111A is arranged closer to the layer surface 151 of the element insulating layer 150 than the first back side coil 111B.
  • the first back side coil 111B is arranged closer to the layer back surface 152 of the element insulating layer 150 (closer to the substrate 130) than the first surface side coil 111A.
  • the first surface side coil 111A is exposed from the layer surface 151 of the element insulating layer 150 in the Z direction.
  • the first front surface side coil 111A is covered with a passivation film 161.
  • the first rear surface side coil 111B is disposed at a distance in the Z direction from the layer rear surface 152 of the element insulating layer 150. In other words, the first rear surface side coil 111B is disposed at a distance in the Z direction from the substrate 130.
  • the element insulating layer 150 is interposed between the first rear surface side coil 111B and the substrate 130.
  • the first surface side coil 111A is embedded in a recess 153 recessed from the layer front surface 151 of the element insulating layer 150 toward the layer back surface 152 (see FIG. 20).
  • the recess 153 is formed in a spiral shape in a plan view.
  • the first surface side coil 111A is formed by a single conductor 170 embedded in the recess 153. In other words, the first surface side coil 111A is configured by a single conductor 170 formed in a spiral shape in a plan view.
  • the conductor 170 has a coil surface 171, a coil back surface 172 opposite the coil surface 171, and a pair of coil side surfaces 173 connecting the coil surface 171 and the coil back surface 172.
  • the coil surface 171 faces the same side as the layer surface 151 of the element insulating layer 150, and the coil back surface 172 faces the same side as the layer back surface 152.
  • the pair of coil side surfaces 173 are formed in a tapered shape whose size in the X direction decreases from the coil surface 171 toward the coil back surface 172.
  • the coil back surface 172 and the pair of coil side surfaces 173 are in contact with the recess 153. In other words, the coil back surface 172 and the pair of coil side surfaces 173 are in contact with the element insulating layer 150.
  • the coil surface 171 is covered with a passivation film 161.
  • the conductive line 170 includes a barrier layer 174 and a metal layer 175 formed on the barrier layer 174 .
  • the barrier layer 174 is formed so as to be in contact with the recess 153.
  • the barrier layer 174 can be said to be a thin film interposed between the metal layer 175 and the element insulating layer 150.
  • the metal layer 175 is formed so as to fill the recess 153.
  • the metal layer 175 is formed of a material containing, for example, copper.
  • the barrier layer 174 has a function of suppressing the diffusion of copper, for example.
  • the barrier layer 174 may contain at least one of titanium, titanium nitride, tantalum (Ta), and tantalum nitride (TaN).
  • the metal layer 175 may contain at least one of aluminum, gold (Au), silver, and tungsten (W).
  • the thickness of the conductor 170 of the first front side coil 111A is thicker than the thickness of the passivation film 161 and thinner than the thickness of the protective film 162.
  • the thickness of the conductor 170 is thicker than the thickness of the first back side coil 111B (see FIG. 20).
  • the thickness of the conductor 170 is between two and three times the thickness of the passivation film 161.
  • the thickness of the conductor 170 is 1 ⁇ 2 or less the thickness of the protective film 162.
  • the thickness of the conductor 170 is 1 ⁇ 3 or more the thickness of the protective film 162.
  • the thickness of the conductor 170 can be defined by the distance between the coil front surface 171 and the coil back surface 172 in the Z direction.
  • the width dimension of the coil surface 171 of the conductor 170 (the length in the X direction in FIG. 21) is longer than the thickness of the conductor 170. In one example, the width dimension of the coil surface 171 is more than twice the thickness of the conductor 170. In one example, the width dimension of the coil surface 171 is less than three times the thickness of the conductor 170. In the example of FIG. 21, the width dimension of the coil surface 171 is approximately 6.8 ⁇ m.
  • an element insulating layer 150 is interposed between adjacent conductors 170 in the X direction.
  • the conductors 170 are spaced apart from each other in the X direction. The distance between adjacent conductors 170 in the X direction gradually increases from the coil surface 171 toward the coil back surface 172.
  • the distance between adjacent conductors 170 in the X direction is defined as the distance between the coil surfaces 171 of adjacent conductors 170 in the X direction. This distance between conductors refers to the minimum distance between adjacent conductors 170 in the X direction. The distance between conductors is smaller than the length of the coil surface 171 in the X direction. In one example, the distance between conductors is 1 ⁇ 2 or less of the width dimension of the coil surface 171. In one example, the distance between conductors is 1 ⁇ 3 or less of the width dimension of the coil surface 171. In one example, the distance between conductors is 1 ⁇ 4 or less of the width dimension of the coil surface 171. In one example, the distance between conductors is 1 ⁇ 5 or less of the width dimension of the coil surface 171.
  • the distance between conductors is 1 ⁇ 6 or less of the width dimension of the coil surface 171. In one example, the distance between conductors is 1 ⁇ 6 or less of the width dimension of the coil surface 171. In one example, the distance between conductors is 1 ⁇ 6 or less of the width dimension of the coil surface 171. In one example, the distance between conductors is 1 ⁇ 6 or more of the width dimension of the coil surface 171. The distance between conductors is smaller than the thickness of the conductors 170. In one example, the distance between the conductors is 1/2 or less of the thickness of the conductor 170. In another example, the distance between the conductors is 1/3 or more of the thickness of the conductor 170. In the example of FIG. 21, the distance between the conductors is about 1 ⁇ m.
  • the first back side coil 111B is composed of two coil layers 111BA and 111BB.
  • the coil layer 111BA constitutes a conductor closer to the layer front surface 151 of the element insulation layer 150
  • the coil layer 111BB constitutes a conductor closer to the layer back surface 152.
  • the coil layers 111BA and 111BB are arranged apart in the Z direction.
  • the element insulation layer 150 is interposed between the coil layers 111BA and 111BB in the Z direction.
  • Each of the coil layers 111BA and 111BB includes a conductor 180.
  • the coil layer 111BA is constituted by the conductor 180 being formed in a spiral shape in a planar view
  • the coil layer 111BB is constituted by another conductor 180 being formed in a spiral shape in a planar view.
  • the number of turns of the first back side coil 111B can be defined as the sum of the number of turns of the coil layer 111BA and the number of turns of the coil layer 111BB.
  • coil layer 111BA and coil layer 111BB are arranged to be offset from each other in the X direction.
  • coil layer 111BA and coil layer 111BB are arranged to be partially overlapping.
  • coil layer 111BA and coil layer 111BB are arranged to have portions that do not partially overlap.
  • coil layer 111BA is arranged to be offset in the X direction from coil layer 111BB by 1/2 the width dimension of conductor 180 (length in the X direction in FIG. 22).
  • Each of the coil layers 111BA, 111BB is arranged offset in the X direction with respect to the first surface side coil 111A.
  • the coil layers 111BA, 111BB are arranged so as to partially overlap with the first surface side coil 111A.
  • the coil layer 111BA is offset toward the first chip side surface 63 (see FIG. 15) with respect to the first surface side coil 111A (see FIG. 20).
  • the coil layer 111BB is offset toward the second chip side surface 64 (see FIG. 15) with respect to the first surface side coil 111A.
  • the number of turns of coil layer 111BA and the number of turns of coil layer 111BB are the same.
  • the number of turns of coil layers 111BA and 111BB is less than the number of turns of first surface side coil 111A.
  • the number of turns of coil layer 111BA is 1/2 the number of turns of first surface side coil 111A
  • the number of turns of coil layer 111BB is 1/2 the number of turns of first surface side coil 111A.
  • the sum of the number of turns of coil layer 111BA and the number of turns of coil layer 111BB is the same as the number of turns of first surface side coil 111A. Therefore, the number of turns of first back surface side coil 111B is the same as the number of turns of first surface side coil 111A.
  • the coil layers 111BA and 111BB are formed by conductors 180 of the same shape formed into a spiral shape in a planar view.
  • the conductor 180 has a coil front surface 181, a coil back surface 182 opposite the coil front surface 181, and a pair of coil side surfaces 183 connecting the coil front surface 181 and the coil back surface 182.
  • the coil front surface 181 faces the same side as the layer front surface 151 of the element insulating layer 150
  • the coil back surface 172 faces the same side as the layer back surface 152.
  • the pair of coil side surfaces 183 extend along the Z direction.
  • the coil front surface 181, the coil back surface 182, and the pair of coil side surfaces 183 each contact the element insulating layer 150.
  • the conductive wire 180 includes a back-side barrier layer 184 , a metal layer 185 formed on the back-side barrier layer 184 , and a front-side barrier layer 186 formed on the metal layer 185 .
  • the rear surface-side barrier layer 184 constitutes the coil rear surface 182 of the conductive wire 180.
  • the rear surface-side barrier layer 184 can be considered to be a thin film interposed between the rear surface of the metal layer 185 and the element insulating layer 150 in the Z direction.
  • the surface-side barrier layer 186 constitutes the coil surface 181 of the conductor 180.
  • the surface-side barrier layer 186 can be considered a thin film interposed between the surface of the metal layer 185 and the element insulating layer 150 in the Z direction.
  • the metal layer 185 has a thickness greater than that of the back-side barrier layer 184 and the front-side barrier layer 186.
  • a pair of side surfaces of the metal layer 185 are not covered by either the back-side barrier layer 184 or the front-side barrier layer 186, and are in contact with the element insulating layer 150.
  • the pair of side surfaces of the metal layer 185 form part of the Z direction of the pair of coil side surfaces 183.
  • the metal layer 185 is formed of a material containing, for example, aluminum. Both the back side barrier layer 184 and the front side barrier layer 186 may contain titanium or titanium nitride. In this way, the material constituting the first back side coil 111B is different from the material constituting the first front side coil 111A.
  • the material constituting the first front side coil 111A and the material constituting the first back side coil 111B can each be changed as desired.
  • the material constituting the first front side coil 111A and the material constituting the first back side coil 111B may be the same.
  • the thickness of the conductor 180 of the first back side coil 111B is thinner than the thickness of the protective film 162.
  • the thickness of the conductor 180 is thinner than the thickness of the conductor 170.
  • the thickness of the conductor 180 is 1 ⁇ 2 or less than the thickness of the conductor 170.
  • the thickness of the conductor 180 is about 1 ⁇ 3 of the thickness of the conductor 170.
  • the thickness of the conductor 180 is thinner than the thickness of the passivation film 161.
  • the thickness of the conductor 180 is 1 ⁇ 2 or more than the thickness of the passivation film 161.
  • the thickness of the conductor 180 can be defined by the distance in the Z direction between the coil front surface 181 and the coil back surface 182.
  • the width dimension of the conductor 180 (the length in the X direction in FIG. 20) is longer than the thickness of the conductor 180. In one example, the width dimension of the conductor 180 is more than twice the thickness of the conductor 180. In one example, the width dimension of the conductor 180 is more than five times the thickness of the conductor 180. In one example, the width dimension of the conductor 180 is more than ten times the thickness of the conductor 180. In one example, the width dimension of the conductor 180 is more than twelve times the thickness of the conductor 180. In one example, the width dimension of the conductor 180 is more than fifteen times the thickness of the conductor 180. In one example, the width dimension of the conductor 180 is more than sixteen times the thickness of the conductor 180. In one example, the width dimension of the conductor 180 is about seventeen times the thickness of the conductor 180.
  • the width dimension of conductor 180 is longer than the width dimension of conductor 170.
  • the width dimension of conductor 180 is more than twice the width dimension of conductor 170.
  • the width dimension of conductor 180 is less than three times the width dimension of conductor 170.
  • the width dimension of conductor 180 is approximately 15.8 ⁇ m.
  • the width dimension of conductor 170 can be defined as the size in a direction perpendicular to the direction in which conductor 170 extends in a planar view.
  • the width dimension of conductor 180 can be defined as the size in a direction perpendicular to the direction in which conductor 180 extends in a planar view.
  • an element insulating layer 150 is interposed between adjacent conductors 180 in the X direction.
  • the conductors 180 are spaced apart from each other in the X direction.
  • the distance between adjacent conductors 180 in the X direction (hereinafter, "inter-conductor distance") is the same from the coil surface 181 to the coil back surface 182.
  • the inter-conductor distance is smaller than the width dimension of the conductors 180. In one example, the inter-conductor distance is 1/2 or less of the width dimension of the conductors 180. In one example, the inter-conductor distance is 1/5 or less of the width dimension of the conductors 180.
  • the inter-conductor distance is 1/10 or less of the width dimension of the conductors 180. In one example, the inter-conductor distance is 1/15 or less of the width dimension of the conductors 180. In one example, the inter-conductor distance is 1/16 or less of the width dimension of the conductors 180. In one example, the distance between the conductors is 1/17 or less of the width dimension of the conductor 180. In one example, the distance between the conductors is 1/18 or less of the width dimension of the conductor 180. In one example, the distance between the conductors is 1/19 or less of the width dimension of the conductor 180. In one example, the distance between the conductors is 1/20 or more of the width dimension of the conductor 180.
  • the distance between the conductors is smaller than the thickness of the conductor 180.
  • the distance between the conductors is 1/2 or more of the thickness of the conductor 180.
  • the distance between the conductors of the coil layers 111BA and 111BB is smaller than the distance between the conductors of the first surface side coil 111A. In the example of FIG. 20, the distance between the conductors is about 0.8 ⁇ m.
  • the distance in the Z direction between the first surface side coil 111A and the first back side coil 111B is greater than the distance in the Z direction between the layer back surface 152 of the element insulating layer 150 and the first back side coil 111B. In one example, the distance in the Z direction between the first surface side coil 111A and the first back side coil 111B is smaller than the width dimension of the conductor 180. The distance in the Z direction between the first surface side coil 111A and the first back side coil 111B is, for example, about 12.8 ⁇ m.
  • the distance in the Z direction between the first surface side coil 111A and the first back side coil 111B can be defined by the distance in the Z direction between the coil back surface 172 of the conductor 170 and the coil front surface 181 of the conductor 180 of the coil layer 111BA.
  • the distance in the Z direction between the first front side coil 111A and the first back side coil 111B is set according to the desired dielectric strength and the electric field strength of each of the first front side coil 111A and the first back side coil 111B.
  • the conductor 170 of the first surface side coil 111A is formed so that its coil surface 171 is exposed in the Z direction from the element insulating layer 150, but this is not limited to the above.
  • the conductor 170 of the first surface side coil 111A may be embedded in the element insulating layer 150. In other words, the coil surface 171 of the conductor 170 may be in contact with the element insulating layer 150. In other words, the conductor 170 may be disposed closer to the layer back surface 152 than the layer surface 151 of the element insulating layer 150.
  • the circuit region 120 includes a wiring layer 121 shown in FIG. 15 and a substrate-side wiring layer 122 disposed closer to the substrate 130 than the wiring layer 121 .
  • the wiring layer 121 is formed at the same position in the Z direction as the first surface side coil 111A of the first transformer 321. In other words, the surface of the wiring layer 121 is exposed from the layer surface 151 of the element insulating layer 150 and is covered by the passivation film 161. In the example shown in FIG. 23, the thickness of the wiring layer 121 is 2.8 ⁇ m.
  • the substrate side wiring layer 122 is embedded in the element insulating layer 150.
  • the substrate side wiring layer 122 includes a first wiring layer 122A, a second wiring layer 122B, and a third wiring layer 122C.
  • the first wiring layer 122A is disposed closer to the substrate 130 in the Z direction than the second wiring layer 122B and the third wiring layer 122C.
  • the first wiring layer 122A is disposed spaced apart in the Z direction from the layer back surface 152 of the element insulating layer 150. In other words, the first wiring layer 122A is disposed spaced apart in the Z direction from the substrate 130.
  • the element insulating layer 150 is interposed between the first wiring layer 122A and the substrate 130 in the Z direction.
  • the circuit region 120 includes a first via 123 that connects the wiring layer 121 and the substrate-side wiring layer 122.
  • the first via 123 connects the wiring layer 121 and the first wiring layer 122A.
  • the first via 123 is formed, for example, from the same material as the wiring layer 121.
  • the first via 123 includes a barrier layer 123A and a metal layer 123B, similar to, for example, the conductor 170.
  • the materials constituting the barrier layer 123A and the metal layer 123B are, for example, the same as the barrier layer 174 and the metal layer 175 of the conductor 170 (both see FIG. 21).
  • the circuit region 120 includes a second via 124 that connects the first wiring layer 122A to the substrate 130, a third via 125 that connects the first wiring layer 122A to the second wiring layer 122B, and a fourth via 126 that connects the second wiring layer 122B to the third wiring layer 122C.
  • the substrate-side wiring layer 122 is electrically connected to the substrate 130.
  • the first to fourth vias 123 to 126 are formed of a material that contains, for example, tungsten.
  • the first wiring layer 122A, the second wiring layer 122B, and the third wiring layer 122C have different thicknesses.
  • the thickness of the first wiring layer 122A is thinner than both the thickness of the second wiring layer 122B and the thickness of the third wiring layer 122C.
  • the thickness of the second wiring layer 122B is the same as the thickness of the third wiring layer 122C.
  • the first to third wiring layers 122A to 122C are thinner in the Z direction near the substrate 130.
  • the first to third wiring layers 122A to 122C are thicker as they move away from the substrate 130 in the Z direction.
  • the thickness of the second wiring layer 122B and the third wiring layer 122C is less than twice the thickness of the first wiring layer 122A.
  • the thickness of the first wiring layer 122A is, for example, 0.52 ⁇ m
  • the thicknesses of the second wiring layer 122B and the third wiring layer 122C are, for example, 0.93 ⁇ m.
  • the second wiring layer 122B is formed at the same position in the Z direction as the coil layer 111BB of the first back side coil 111B
  • the third wiring layer 122C is formed at the same position in the Z direction as the coil layer 111BA.
  • Signal transmission device 10 includes inter-chip wires WA that electrically connect first chip 60 and second chip 70, and first lead wires WB that individually connect first chip 60 and first lead terminals 11.
  • Inter-chip wires WA are made of a material containing gold.
  • First lead wires WB are made of a material containing copper or aluminum.
  • the inter-chip wire WA is relatively important from the standpoint of the insulation reliability of the signal transmission device 10, and the height and shape of the wire must be inspected with high precision.
  • the inter-chip wire WA is formed from a material containing gold, and therefore when the height of the inter-chip wire WA is inspected, for example, using X-ray inspection, the inter-chip wire WA is displayed more clearly than when the inter-chip wire WA is formed from a material containing copper or aluminum. Therefore, the height of the inter-chip wire WA can be inspected accurately. Furthermore, the shape of the inter-chip wire WA can also be inspected accurately.
  • the first lead wire WB is less important than the inter-chip wire WA in terms of the insulation reliability of the signal transmission device 10.
  • the first lead wire WB is made of a material containing copper or aluminum, costs can be reduced compared to when the first lead wire WB is made of a material containing gold. In this way, it is possible to achieve both improved quality and reduced costs for the signal transmission device 10.
  • the first lead wire WB is a copper wire whose surface is coated with palladium. According to this configuration, the palladium coated on the surface of the copper wire can increase the bonding area of the bonding portion between the first lead wire WB, which serves as the second bond portion of the first lead wire WB, and the first lead terminals 11 to 18. This can increase the bonding strength between the first lead wire WB and the first lead terminals 11 to 18, thereby suppressing the occurrence of cracks in the bonding portions between the first lead wire WB and the first lead terminals 11 to 18.
  • the signal transmission device 10 further includes a plurality of second lead wires WD that individually connect the second chip 70 to the second lead terminals 41 to 48.
  • the second lead wires WD are formed from a material containing copper or aluminum.
  • the second lead wire WD which is less important than the inter-chip wire WA from the standpoint of insulation reliability of the signal transmission device 10, is made of a material containing copper or aluminum, which allows for cost reduction compared to when the second lead wire WD is made of a material containing gold.
  • the second lead wire WD is a copper wire whose surface is coated with palladium. According to this configuration, the same effect as that of (1-2) above can be obtained.
  • the signal transmission device 10 further includes a first die pad wire WC that connects the first chip 60 and the first die pad 30.
  • the first die pad wire WC is made of a material containing copper or aluminum.
  • the first die pad wire WC is a copper wire whose surface is coated with palladium. According to this configuration, the same effect as that of (1-2) above can be obtained.
  • a security bond WC1 is formed at the joint between the first die pad wire WC, which is the second bond portion of the first die pad wire WC, and the first die pad 30.
  • the security bond WC1 can thicken the second bond portion of the wire WC for the first die pad. This can prevent cracks from occurring in the second bond portion of the wire WC for the first die pad.
  • the signal transmission device 10 further includes a second die pad wire WE that connects the second chip 70 and the second die pad 50.
  • the second die pad wire WE is made of a material containing copper or aluminum. This configuration provides the same effect as that of (1-3) above.
  • the second die pad wire WE is a copper wire whose surface is coated with palladium. According to this configuration, the same effect as that of (1-2) above can be obtained.
  • a security bond WE1 is formed at the joint between the second die pad wire WE, which is the second bond portion of the second die pad wire WE, and the second die pad 50. This configuration provides the same effect as in (1-7) above.
  • Each of the first electrode pads 67, each of the second electrode pads 68, and each of the third electrode pads 69 of the first chip 60 has a thickness of 2 ⁇ m or more. According to this configuration, even if an inter-chip wire WA is bonded to each first electrode pad 67, it is possible to suppress the occurrence of cracks in the element insulating layer 150 directly below each first electrode pad 67. Even if a first lead wire WB is bonded to each second electrode pad 68, it is possible to similarly suppress the occurrence of cracks in the element insulating layer 150. Even if a first die pad wire WC is bonded to each third electrode pad 69, it is possible to similarly suppress the occurrence of cracks in the element insulating layer 150.
  • the sealing resin 90 contains sulfur as an additive.
  • the concentration of the sulfur added is 300 ⁇ g/g or less. This configuration can reduce sulfide corrosion of copper wires such as the first lead wire WB, the second lead wire WD, the first die pad wire WC, and the second die pad wire WE, whose surfaces are coated with palladium.
  • a plating layer 29 is formed on the inner lead surface 21B of the wire connection portion 12AA of the first inner lead portion 12A of the first lead terminal 12.
  • the plating layer 29 is not formed on the end of the inner lead surface 21B of the wire connection portion 12AA on the tip surface 24B side, and the end is in contact with the sealing resin 90.
  • the wire connection portions 13AA to 17AA of the first lead terminals 13 to 17 also have a similar configuration, and therefore the same effect can be obtained.
  • a plating layer 29 is formed on the inner lead surface 21B of the wire connection portion 42AA of the second inner lead portion 42A of the second lead terminal 42.
  • the plating layer 29 is not formed on the end of the inner lead surface 21B of the wire connection portion 42AA on the tip surface 24B side, and the end is in contact with the sealing resin 90.
  • This configuration can prevent peeling between the plating layer 29 at the end of the inner lead surface 21B of the wire connection portion 42AA near the tip surface 24B and the sealing resin 90.
  • the wire connection portions 43AA to 47AA of the second lead terminals 43 to 47 also have a similar configuration, and therefore the same effect can be obtained.
  • a plating layer 26 is formed on the outer lead surface 21A, outer lead back surface 22A, and outer lead side surface 23A of the outer lead body 20A of the first outer lead portions 11B to 18B.
  • the plating layer 26 is formed continuously from the outer lead back surface 22A to the outer lead surface 21A on the outer lead end surface 24A.
  • the plating layer 26 is separated from the outer lead surface 21A.
  • the conductive bonding material SD comes into contact with the plating layer 26 formed on the outer lead end surface 24A. This causes a fillet to be formed by the conductive bonding material SD in contact with the outer lead end surface 24A. Therefore, the mounting state of the signal transmission device 10 on the circuit board PCB can be easily confirmed.
  • the outer surface of the sealing resin 90 is formed so as to have a surface roughness Rz of 8 ⁇ m or more. According to this configuration, the creepage distance between the first lead terminals 11-18 and the second lead terminals 41-48 via the sealing resin 90 is increased. Therefore, the dielectric strength between the first lead terminals 11-18 and the second lead terminals 41-48 can be improved.
  • a signal transmission device 10 of the second embodiment will be described with reference to Fig. 25 and Fig. 26.
  • the signal transmission device 10 of the second embodiment is different from the signal transmission device 10 of the first embodiment in the configuration of the first frame 10A and the second frame 10B.
  • the configuration different from the first embodiment will be described in detail, and the components common to the first embodiment will be denoted by the same reference numerals and their description will be omitted.
  • the shape of the wire connection portions 12AA, 17AA of the first lead terminals 12, 17 of the first lead terminals 11-18 of the first frame 10A is different from that of the first embodiment. More specifically, the corner portion of the tip side of the wire connection portion 12AA that is closer to the first lead terminal 13 includes an inclined surface 12AC.
  • the inclined surface 12AC is inclined away from the first lead terminal 13 side surface of both sides of the wire connection portion 12AA toward the tip surface of the wire connection portion 12AA.
  • the corner portion of the tip side of the wire connection portion 17AA that is closer to the first lead terminal 16 includes an inclined surface 17AC.
  • the inclined surface 17AC is inclined away from the first lead terminal 16 side surface of both sides of the wire connection portion 17AA toward the tip surface of the wire connection portion 17AA.
  • each of the inclined surfaces 12AC and 17AC faces the first die pad 30. In a plan view, each of the inclined surfaces 12AC and 17AC can also be said to face the first die pad 30 side. In a plan view, each of the inclined surfaces 12AC and 17AC faces the first chip 60. In a plan view, each of the inclined surfaces 12AC and 17AC can also be said to face the first chip 60 side.
  • Two first lead wires WB are connected to the wire connection portion 12AA.
  • the first lead wire WB arranged closer to the first lead terminal 11 extends from the first bond portion of the first chip 60 so as to pass through the tip surface of the wire connection portion 12AA in a plan view.
  • the first lead wire WB that has passed through the tip surface of the wire connection portion 12AA in a plan view is joined to a portion of the wire connection portion 12AA closer to the first lead terminal 11 than the center in the Y direction.
  • the second bond portion of this first lead wire WB is formed at a position closer to the first lead terminal 11 than the center in the Y direction of the wire connection portion 12AA.
  • the first lead wire WB connected to the wire connection portion 12AA is perpendicular to the inclined surface 12AC.
  • the angle between the first lead wire WB connected to the wire connection portion 12AA and the inclined surface 12AC is 85° or more and 95° or less, it can be said that the first lead wire WB connected to the wire connection portion 12AA is perpendicular to the inclined surface 12AC.
  • the inclined surface 12AC corresponds to "the side surface that intersects with the first lead wire WB connected to the wire connection portion 12AA in a plan view.”
  • the relationship between the first lead wire WB connected to the wire connection portion 12AA and the inclined surface 12AC is not limited to being perpendicular. In plan view, the first lead wire WB connected to the wire connection portion 12AA only needs to extend so as to intersect with the inclined surface 12AC.
  • the first lead wire WB which is disposed closer to the first lead terminal 13, extends from the first bond portion of the first chip 60 so as to pass through the inclined surface 12AC of the wire connection portion 12AA in a planar view.
  • the first lead wire WB that has passed through the inclined surface 12AC of the wire connection portion 12AA in a planar view is joined to a portion of the wire connection portion 12AA closer to the first lead terminal 13 than the center in the Y direction.
  • the second bond portion of this first lead wire WB is formed at a position closer to the first lead terminal 13 than the center in the Y direction of the wire connection portion 12AA.
  • a first lead wire WB is connected to the wire connection portion 17AA.
  • This first lead wire WB extends from the first bond portion of the first chip 60 so as to pass through the inclined surface 17AC of the wire connection portion 17AA.
  • the first lead wire WB that has passed through the inclined surface 17AC of the wire connection portion 17AA is joined to the center of the wire connection portion 17AA in the Y direction.
  • the second bond portion of this first lead wire WB is formed at the center position of the wire connection portion 17AA in the Y direction.
  • the first lead wire WB connected to the wire connection portion 17AA and the inclined surface 17AC are perpendicular to each other.
  • the angle between the first lead wire WB connected to the wire connection portion 17AA and the inclined surface 17AC is 85° or more and 95° or less, it can be said that the first lead wire WB connected to the wire connection portion 17AA and the inclined surface 17AC are perpendicular to each other.
  • the inclined surface 17AC corresponds to "the side surface that intersects with the first lead wire WB connected to the wire connection portion 17AA in a plan view.”
  • the relationship between the first lead wire WB connected to the wire connection portion 17AA and the inclined surface 17AC is not limited to being perpendicular. In plan view, the first lead wire WB connected to the wire connection portion 17AA only needs to extend so as to intersect with the inclined surface 17AC.
  • the shapes of the wire connection parts 42AA, 45AA, 46AA of the second lead terminals 42, 45, 46 of the second lead terminals 41 to 48 of the second frame 10B are different from those of the first embodiment. More specifically, the corner part of the tip side of the wire connection part 42AA that is closer to the second lead terminal 43 includes an inclined surface 42AC.
  • the inclined surface 42AC is inclined away from the second lead terminal 43 side surface of both sides of the wire connection part 42AA toward the tip surface of the wire connection part 42AA.
  • the inclined surface 42AC faces the second die pad 50.
  • the inclined surface 42AC can be said to face the second die pad 50 side.
  • the inclined surface 42AC faces the second chip 70.
  • the inclined surface 42AC can be said to face the second chip 70 side.
  • the length of the inclined surface 45AC of the wire connection portion 45AA is shorter than the length of the inclined surface 45AC of the first embodiment.
  • the length of the tip surface of the wire connection portion 45AA (the length of the tip surface in the Y direction) is longer than the length of the tip surface of the wire connection portion 45AA of the first embodiment.
  • the length of the inclined surface 46AC of the wire connection portion 46AA is shorter than the length of the inclined surface 46AC of the first embodiment.
  • the length of the tip surface of the wire connection portion 46AA (the length of the tip surface in the Y direction) is longer than the length of the tip surface of the wire connection portion 46AA of the first embodiment.
  • One second lead wire WD is connected to the wire connection portion 42AA.
  • the second lead wire WD extends from the first bond portion of the second chip 70 so as to pass through the inclined surface 42AC of the wire connection portion 42AA.
  • the second lead wire WD that has passed through the inclined surface 42AC of the wire connection portion 42AA is joined to the center of the wire connection portion 42AA in the Y direction.
  • the second bond portion of this second lead wire WD is formed near the center position of the wire connection portion 42AA in the Y direction.
  • the second lead wire WD connected to the wire connection portion 42AA and the inclined surface 42AC are perpendicular to each other.
  • the angle between the second lead wire WD connected to the wire connection portion 42AA and the inclined surface 42AC is 85° or more and 95° or less, it can be said that the second lead wire WD connected to the wire connection portion 42AA and the inclined surface 42AC are perpendicular to each other.
  • the inclined surface 42AC corresponds to "the side surface that intersects with the second lead wire WD connected to the wire connection portion 42AA in a plan view.”
  • the relationship between the second lead wire WD connected to the wire connection portion 42AA and the inclined surface 42AC is not limited to being perpendicular.
  • the second lead wire WD connected to the wire connection portion 42AA only needs to extend so as to intersect with the inclined surface 42AC.
  • One second lead wire WD is connected to the wire connection portion 45AA.
  • the second lead wire WD extends from the first bond portion of the second chip 70 so as to pass through the tip surface of the wire connection portion 45AA.
  • the second lead wire WD that has passed through the tip surface of the wire connection portion 45AA is joined to the center of the wire connection portion 45AA in the Y direction.
  • the second bond portion of this second lead wire WD is formed at the center position of the wire connection portion 45AA in the Y direction.
  • Two second lead wires WD are connected to the wire connection portion 46AA.
  • Each of the two second lead wires WD extends from the first bond portion of the second chip 70 so as to pass through the tip surface of the wire connection portion 46AA in a plan view.
  • the two second lead wires WD that pass through the tip surface of the wire connection portion 46AA in a plan view are bonded to a portion of the wire connection portion 46AA closer to the second lead terminal 45 and a portion closer to the second lead terminal 47 than the center in the Y direction.
  • the second bond portions of these second lead wires WD are formed at positions closer to the second lead terminal 45 and a portion closer to the second lead terminal 47 than the center in the Y direction of the wire connection portion 46AA.
  • the first lead terminals 12, 17 include lead connection portions 12AB, 17AB extending in an X direction (first direction) perpendicular to a Y direction (second direction) in a plan view in which the first lead terminals 11 to 18 are arranged, and wire connection portions 12AA, 17AA provided continuously with the lead connection portions 12AB, 17AB and extending in a direction intersecting the X direction with respect to the lead connection portions 12AB, 17AB.
  • the wire connection portions 12AA, 17AA include inclined surfaces 12AC, 17AC intersecting in a plan view with a first lead wire WB connected to the wire connection portions 12AA, 17AA of the first lead terminals 12, 17.
  • the first lead wire WB extends so as to intersect with the inclined surfaces 12AC, 17AC of the wire connection parts 12AA, 17AA in a plan view, making it easier to confirm the joining position of the first lead wire WB with the wire connection parts 12AA, 17AA, compared to when the first lead wire WB extends roughly along the side of the wire connection parts 12AA, 17AA and enters from the corner of the wire connection part 12AA.
  • the second lead terminal 42 includes a lead connection portion 42AB that extends in an X direction (first direction) perpendicular to the Y direction (second direction) in plan view, which is the arrangement direction of the second lead terminals 41 to 48, and a wire connection portion 42AA that is provided continuously with the lead connection portion 42AB and extends in a direction intersecting the X direction relative to the lead connection portion 42AB.
  • the wire connection portion 42AA includes an inclined surface 42AC that intersects in plan view with the second lead wire WD that is connected to the wire connection portion 42AA of the second lead terminal 42.
  • the second lead wire WD extends so as to intersect with the inclined surface 42AC of the wire connection portion 42AA in a plan view, making it easier to confirm the joining position of the second lead wire WD with the wire connection portion 42AA, compared to when the second lead wire WD extends roughly along the side surface of the wire connection portion 42AA and enters from a corner portion of the wire connection portion 42AA.
  • a signal transmission device 10 of the third embodiment will be described with reference to Fig. 27 and Fig. 28.
  • the signal transmission device 10 of the third embodiment is different from the signal transmission device 10 of the first embodiment in the configuration of the first frame 10A and the second frame 10B.
  • the configuration different from the first embodiment will be described in detail, and the same reference numerals will be used to designate the same components as the first embodiment, and the description thereof will be omitted.
  • the first frame 10A of the third embodiment has a different configuration for the first lead terminals 12-17 among the first lead terminals 11-18. More specifically, as shown in FIG. 27, the first inner lead portions 12A-17A of the first lead terminals 12-17 have through holes 12AD-17AD formed therein, which penetrate the first inner lead portions 12A-17A in their thickness direction (Z direction).
  • the shape of the through holes 12AD-17AD in plan view is circular.
  • the diameters of the through holes 12AD-17AD are the same. The shape and size of the through holes 12AD-17AD in plan view can be changed as desired.
  • the through holes 12AD-17AD are filled with sealing resin 90.
  • the sealing resin 90 filled in the through holes 12AD-17AD connects the sealing resin 90 provided closer to the sealing surface 91 (see FIG. 2) than the first inner lead portions 12A-17A with the sealing resin 90 provided closer to the sealing back surface 92 (see FIG. 2) than the first inner lead portions 12A-17A.
  • the first lead terminals 11 and 18 are integrated with the first die pad 30, and therefore correspond to the "first connection terminals.”
  • the first lead terminals 12-17 are disposed away from the first die pad 30, and therefore correspond to the "first remote terminals.” Because the through holes 12AD-17AD are formed in the first lead terminals 12-17, it can be said that the first remote terminals have through holes that penetrate in the thickness direction of the first remote terminals. On the other hand, the first connection terminals do not have through holes.
  • the through hole 12AD is formed in a portion of the wire connection portion 12AA of the first inner lead portion 12A that is closer to the lead connection portion 12AB.
  • the first lead wire WB that corresponds to the wire connection portion 12AA is bonded to a portion of the wire connection portion 12AA that is closer to the first chip 60 than the through hole 12AD.
  • the second bond portion of the first lead wire WB is positioned away from the through hole 12AD in the X direction in a plan view.
  • the through hole 13AD is formed in a portion of the wire connection portion 13AA of the first inner lead portion 13A that is closer to the lead connection portion 13AB.
  • the first lead wire WB that corresponds to the wire connection portion 13AA is bonded to a portion of the wire connection portion 13AA that is closer to the first chip 60 than the through hole 13AD.
  • the second bond portion of the first lead wire WB is positioned away from the through hole 13AD in the X direction in a plan view.
  • the through hole 14AD is formed in a portion of the wire connection portion 14AA of the first inner lead portion 14A that is closer to the lead connection portion 14AB.
  • the first lead wire WB that corresponds to the wire connection portion 14AA is bonded to a portion of the wire connection portion 14AA that is closer to the first chip 60 than the through hole 14AD.
  • the second bond portion of the first lead wire WB is positioned away from the through hole 14AD in the X direction in a plan view.
  • the through hole 15AD is formed in a portion of the wire connection portion 15AA of the first inner lead portion 15A that is closer to the lead connection portion 15AB.
  • the first lead wire WB that corresponds to the wire connection portion 15AA is bonded to a portion of the wire connection portion 15AA that is closer to the first chip 60 than the through hole 15AD.
  • the second bond portion of the first lead wire WB is positioned away from the through hole 15AD in the X direction in a plan view.
  • the through hole 16AD is formed in a portion of the wire connection portion 16AA of the first inner lead portion 16A that is closer to the lead connection portion 16AB.
  • the first lead wire WB that corresponds to the wire connection portion 16AA is bonded to a portion of the wire connection portion 16AA that is closer to the first chip 60 than the through hole 16AD.
  • the second bond portion of the first lead wire WB is positioned away from the through hole 16AD in the X direction in a plan view.
  • the through hole 17AD is formed in a portion of the wire connection portion 17AA of the first inner lead portion 17A that is closer to the lead connection portion 17AB.
  • the first lead wire WB that corresponds to the wire connection portion 17AA is bonded to a portion of the wire connection portion 17AA that is closer to the first chip 60 than the through hole 17AD.
  • the second bond portion of the first lead wire WB is positioned away from the through hole 17AD in the X direction in a plan view.
  • the positions at which the through holes 12AD-17AD are formed can be changed as desired.
  • the through holes 12AD-17AD may be formed in the lead connection parts 12AB-17AB.
  • the through holes 12AD-17AD may also be formed across the wire connection parts 12AA-17AA and the lead connection parts 12AB-17AB.
  • the second frame 10B of the third embodiment has a different configuration for the second lead terminals 42-47 among the second lead terminals 41-48. More specifically, the second inner lead portions 42A-47A of the second lead terminals 42-47 have through holes 42AD-47AD formed therein, which penetrate the second inner lead portions 42A-47A in their thickness direction (Z direction).
  • the shape of the through holes 42AD-47AD in plan view is circular.
  • the diameters of the through holes 42AD-47AD are equal to each other.
  • the diameters of the through holes 42AD-47AD are equal to the diameters of the through holes 12AD-17AD.
  • the shape and size of the through holes 42AD-47AD in plan view can be changed as desired.
  • the through holes 42AD-47AD are filled with sealing resin 90.
  • the sealing resin 90 filled in the through holes 42AD-47AD connects the sealing resin 90 provided closer to the sealing surface 91 (see FIG. 2) than the second inner lead portions 42A-47A with the sealing resin 90 provided closer to the sealing back surface 92 (see FIG. 2) than the second inner lead portions 42A-47A.
  • the second lead terminals 41, 48 are integrated with the second die pad 50, and therefore correspond to the "second connection terminals.”
  • the second lead terminals 42-47 are disposed away from the second die pad 50, and therefore correspond to the "second remote terminals.” Because the through holes 42AD-47AD are formed in the second lead terminals 42-47, it can be said that the second remote terminals have through holes that penetrate in the thickness direction of the second remote terminals. On the other hand, the second connection terminals do not have through holes.
  • the through hole 42AD is formed in a portion of the wire connection portion 42AA of the second inner lead portion 42A that is closer to the lead connection portion 42AB.
  • the second lead wire WD that corresponds to the wire connection portion 42AA is bonded to a portion of the wire connection portion 42AA that is closer to the second chip 70 than the through hole 42AD.
  • the second bond portion of the second lead wire WD is positioned away from the through hole 42AD in the X direction in a plan view.
  • the through hole 43AD is formed in a portion of the wire connection portion 43AA of the second inner lead portion 43A that is closer to the lead connection portion 43AB.
  • the second lead wire WD that corresponds to the wire connection portion 43AA is bonded to a portion of the wire connection portion 43AA that is closer to the second chip 70 than the through hole 43AD.
  • the second bond portion of the second lead wire WD is positioned away from the through hole 43AD in the X direction in a plan view.
  • the through hole 44AD is formed in a portion of the wire connection portion 44AA of the second inner lead portion 44A that is closer to the lead connection portion 44AB.
  • the second lead wire WD that corresponds to the wire connection portion 44AA is bonded to a portion of the wire connection portion 44AA that is closer to the second chip 70 than the through hole 44AD.
  • the second bond portion of the second lead wire WD is positioned away from the through hole 44AD in the X direction in a plan view.
  • the through hole 45AD is formed in a portion of the wire connection portion 45AA of the second inner lead portion 45A that is closer to the lead connection portion 45AB.
  • the second lead wire WD that corresponds to the wire connection portion 45AA is bonded to a portion of the wire connection portion 45AA that is closer to the second chip 70 than the through hole 45AD.
  • the second bond portion of the second lead wire WD is positioned away from the through hole 45AD in the X direction in a plan view.
  • the through hole 46AD is formed in a portion of the wire connection portion 46AA of the second inner lead portion 46A that is closer to the lead connection portion 46AB.
  • Each of the two second lead wires WD that correspond to the wire connection portion 46AA is bonded to a portion of the wire connection portion 46AA that is closer to the second chip 70 than the through hole 46AD.
  • Each of the second bond portions of the two second lead wires WD is positioned away from the through hole 46AD in the X direction in a plan view.
  • the through hole 47AD is formed in a portion of the wire connection portion 47AA of the second inner lead portion 47A that is closer to the lead connection portion 47AB.
  • the second lead wire WD that corresponds to the wire connection portion 47AA is bonded to a portion of the wire connection portion 47AA that is closer to the second chip 70 than the through hole 47AD.
  • the second bond portion of the second lead wire WD is positioned away from the through hole 47AD in the X direction in a plan view.
  • the positions at which the through holes 42AD-47AD are formed can be changed as desired.
  • the through holes 42AD-47AD may be formed in the lead connection parts 42AB-47AB.
  • the through holes 42AD-47AD may also be formed across the wire connection parts 42AA-47AA and the lead connection parts 42AB-47AB.
  • the first lead terminals 12 to 17 have through holes 12AD to 17AD.
  • the through holes 12AD to 17AD are filled with a sealing resin 90.
  • the sealing resin 90 filled in the through holes 12AD-17AD can prevent the first lead terminals 12-17 from moving when an external force is applied to the first lead terminals 12-17. Therefore, it is possible to prevent force from being applied to the first lead wires WB due to the movement of the first lead terminals 12-17.
  • the second lead terminals 42 to 47 have through holes 42AD to 47AD.
  • the through holes 42AD to 47AD are filled with a sealing resin 90.
  • the sealing resin 90 filled in the through holes 42AD-47AD can suppress movement of the second lead terminals 42-47 when an external force is applied to the second lead terminals 42-47. Therefore, it is possible to suppress the application of force to the second lead wires WD due to the movement of the second lead terminals 42-47.
  • a signal transmission device 10 of the fourth embodiment will be described with reference to Figures 29 to 31.
  • the signal transmission device 10 of the fourth embodiment differs from the signal transmission device 10 of the third embodiment in the configuration of the first frame 10A and the second frame 10B and the configuration of the wires.
  • the configuration different from the third embodiment will be described in detail, and the components common to the third embodiment will be denoted by the same reference numerals and their description will be omitted.
  • the first frame 10A of the fourth embodiment is different from the third embodiment in the configuration of the first lead terminals 12, 17 among the first lead terminals 11 to 18. More specifically, as shown in FIG. 29, the through holes 12AD, 17AD (see FIG. 27) are omitted from the first inner lead portions 12A, 17A of the first lead terminals 12, 17.
  • the first frame 10A includes two types of first lead terminals: first specific terminals (first lead terminals 13-16 in the fourth embodiment) that have through holes formed in the first inner lead portions 12A-17A of the first lead terminals 12-17, and second specific terminals (first lead terminals 12, 17 in the fourth embodiment) that do not have through holes formed therein.
  • the configuration of the second bond portion of the first lead wire WB differs depending on the first specific terminal and the second specific terminal. More specifically, a security bond WB1 is formed on the second bond portion of the first lead wire WB connected to the wire connection portions 12AA, 17AA of the first inner lead portions 12A, 17A of the first lead terminals 12, 17 as the second specific terminals. On the other hand, a security bond WB1 is not formed on the second bond portion of the first lead wire WB connected to the wire connection portions 13AA-16AA of the first inner lead portions 13A-16A of the first lead terminals 13-16 as the first specific terminals.
  • the multiple first lead wires WB include a first specific wire joined to a first specific terminal (first lead terminals 13 to 16 in the fourth embodiment) and a second specific wire joined to a second specific terminal (first lead terminals 12, 17 in the fourth embodiment).
  • a security bond is formed at the joint (second bond portion) of the second specific wire joined to the second specific terminal.
  • the second frame 10B of the fourth embodiment is different from the third embodiment in the configuration of the second lead terminals 42, 46 among the second lead terminals 41-48. More specifically, as shown in FIG. 30, the through holes 42AD, 46AD are omitted from the second inner lead portions 42A, 46A of the second lead terminals 42, 46.
  • the second frame 10B includes two types of second lead terminals: second lead terminals having through holes among the second lead terminals 42-47 (second lead terminals 43-45, 47 in the fourth embodiment) and second lead terminals not having through holes (second lead terminals 42, 46 in the fourth embodiment).
  • the second frame 10B includes two types of second lead terminals: third specific terminals (second lead terminals 43-45, 47 in the fourth embodiment) that have through holes formed in the second inner lead portions 42A-47A of the second lead terminals 42-47, and fourth specific terminals (second lead terminals 42, 46 in the fourth embodiment) that do not have through holes formed.
  • third specific terminals second lead terminals 43-45, 47 in the fourth embodiment
  • fourth specific terminals second lead terminals 42, 46 in the fourth embodiment
  • the configuration of the second bond portion of the second lead wire WD differs depending on the third specific terminal and the fourth specific terminal. More specifically, a security bond WD1 is formed on the second bond portion of the second lead wire WD connected to the wire connection portions 42AA, 46AA of the second inner lead portions 42A, 46A of the second lead terminals 42, 46 as the fourth specific terminals. On the other hand, a security bond WD1 is not formed on the second bond portion of the second lead wire WD connected to the wire connection portions 43AA-45AA, 47AA of the second inner lead portions 43A-45A, 47A of the second lead terminals 43-45, 47 as the third specific terminals.
  • the multiple second lead wires WD include a third specific wire joined to a third specific terminal (second lead terminals 43 to 45, 47 in the fourth embodiment) and a fourth specific wire joined to a fourth specific terminal (second lead terminals 42, 46 in the fourth embodiment).
  • a security bond is formed at the joint (second bond portion) of the fourth specific wire joined to the fourth specific terminal.
  • Figure 31 shows an oblique view of the second bond portion of the second lead wire WD and its surroundings. Note that since the configuration of the second bond portion of the second lead wire WD and the configuration of the second bond portion of the first lead wire WB are the same, the configuration of the second bond portion of the second lead wire WD will be described in detail, and a detailed description of the configuration of the second bond portion of the first lead wire WB will be omitted.
  • the second bond portion of the second lead wire WD includes a joint portion WDP joined to the wire connection portion 46AA of the second lead terminal 46.
  • the joint portion WDP is a portion that is crushed by being pressed against the wire connection portion 46AA by the wire bonding device. Therefore, the thickness of the joint portion WDP is smaller than the diameter of the second lead wire WD.
  • the security bond WD1 is formed, for example, by providing a stud bump SB on the joint WDP.
  • the stud bump SB is formed by ball bonding using a wire bonding device.
  • the joint WDP is sandwiched between the wire connection portion 46AA and the stud bump SB.
  • the detailed structure of the stud bump SB is the same as that of the security bond WE1 of the second die pad wire WE of the first embodiment.
  • the security bond WB1 can prevent the first lead wire WB from peeling off from the wire connection portions 12AA, 17AA.
  • the sealing resin 90 filled in the through holes 13AD-16AD suppresses movement of the first lead terminals 13-16, making it difficult for force to be applied to the first lead wires WB joined to the first lead terminals 13-16.
  • a security bond WD1 is formed in the second bond portion of the second lead wire WD joined to the wire connection portions 42AA and 46AA of the second lead terminals 42 and 46.
  • the security bond WD1 can prevent the second lead wire WD from peeling off from the wire connection portions 42AA, 46AA.
  • the sealing resin 90 filled in the through holes 43AD-45AD, 47AD suppresses movement of the second lead terminals 43-45, 47, making it difficult for force to be applied to the second lead wire WD joined to the second lead terminals 43-45, 47.
  • the signal transmission device 10 of the fifth embodiment will be described with reference to Fig. 32.
  • the signal transmission device 10 of the fifth embodiment is different from the signal transmission device 10 of the first embodiment in the configuration of the first frame 10A and the second frame 10B.
  • the configuration different from the first embodiment will be described in detail, and the same reference numerals will be used to designate the same components as the first embodiment, and the description thereof will be omitted.
  • the first frame 10A and the second frame 10B of the fifth embodiment are different from those of the first embodiment in the shapes of the first die pad 30 and the second die pad 50. More specifically, the first die pad 30 includes a first tip side curved surface 35A and a second tip side curved surface 36A instead of the first tip side inclined portion 35 and the second tip side inclined portion 36.
  • the second die pad 50 includes a third tip side curved surface 55A and a fourth tip side curved surface 56A instead of the third tip side inclined portion 55 and the fourth tip side inclined portion 56.
  • the first tip side curved surface 35A has a shape in which the corner portion between the first tip surface 31 and the first side surface 33 is chamfered.
  • the arc length of the first tip side curved surface 35A is longer than the arc length of the first base end side curved surface 37A.
  • the arc length of the first tip side curved surface 35A is longer than the arc length of the first recess side curved surface 38A.
  • the radius of curvature of the first tip side curved surface 35A is larger than the radius of curvature of the first base end side curved surface 37A.
  • the radius of curvature of the first tip side curved surface 35A is larger than the radius of curvature of the first recess side curved surface 38A.
  • the arc length of the first distal curved surface 35A is at least twice the arc length of the first proximal curved surface 37A. In one example, in a plan view, the arc length of the first distal curved surface 35A is at least five times the arc length of the first proximal curved surface 37A. In one example, in a plan view, the arc length of the first distal curved surface 35A is at most ten times the arc length of the first proximal curved surface 37A.
  • the arc length of the first tip side curved surface 35A is at least twice the arc length of the first recess side curved surface 38A. In one example, in a plan view, the arc length of the first tip side curved surface 35A is at least five times the arc length of the first recess side curved surface 38A. In one example, in a plan view, the arc length of the first tip side curved surface 35A is no more than ten times the arc length of the first recess side curved surface 38A.
  • the second tip side curved surface 36A has a shape in which the corner portion between the first tip surface 31 and the second side surface 34 is chamfered.
  • the arc length of the second tip side curved surface 36A is longer than the arc length of the second base end side curved surface 37B.
  • the arc length of the second tip side curved surface 36A is longer than the arc length of the second recess side curved surface 38B.
  • the radius of curvature of the second tip side curved surface 36A is larger than the radius of curvature of the second base end side curved surface 37B.
  • the radius of curvature of the second tip side curved surface 36A is larger than the radius of curvature of the second recess side curved surface 38B.
  • the arc length of the second distal curved surface 36A is at least twice the arc length of the second proximal curved surface 37B. In one example, in a plan view, the arc length of the second distal curved surface 36A is at least five times the arc length of the second proximal curved surface 37B. In one example, in a plan view, the arc length of the second distal curved surface 36A is no more than ten times the arc length of the second proximal curved surface 37B.
  • the arc length of the second tip side curved surface 36A is at least twice the arc length of the second recess side curved surface 38B. In one example, in a plan view, the arc length of the second tip side curved surface 36A is at least five times the arc length of the second recess side curved surface 38B. In one example, in a plan view, the arc length of the second tip side curved surface 36A is no more than ten times the arc length of the second recess side curved surface 38B.
  • the arc length of the second tip side curved surface 36A is equal to the arc length of the first tip side curved surface 35A.
  • the difference between the arc length of the second tip side curved surface 36A and the arc length of the first tip side curved surface 35A is, for example, 10% or less of the arc length of the second tip side curved surface 36A, then the arc length of the second tip side curved surface 36A is equal to the arc length of the first tip side curved surface 35A.
  • the third tip side curved surface 55A has a shape in which the corner portion between the second tip surface 51 and the third side surface 53 is chamfered.
  • the arc length of the third tip side curved surface 55A is longer than the arc length of the third base end side curved surface 57A.
  • the arc length of the third tip side curved surface 55A is longer than the arc length of the third recess side curved surface 58A.
  • the radius of curvature of the third tip side curved surface 55A is larger than the radius of curvature of the third base end side curved surface 57A.
  • the radius of curvature of the third tip side curved surface 55A is larger than the radius of curvature of the third recess side curved surface 58A.
  • the arc length of the third distal curved surface 55A is at least twice the arc length of the third proximal curved surface 57A. In one example, in a plan view, the arc length of the third distal curved surface 55A is at least five times the arc length of the third proximal curved surface 57A. In one example, in a plan view, the arc length of the third distal curved surface 55A is no more than ten times the arc length of the third proximal curved surface 57A.
  • the arc length of the third tip side curved surface 55A is at least twice the arc length of the third recess side curved surface 58A. In one example, in a plan view, the arc length of the third tip side curved surface 55A is at least five times the arc length of the third recess side curved surface 58A. In one example, in a plan view, the arc length of the third tip side curved surface 55A is no more than ten times the arc length of the third recess side curved surface 58A.
  • the arc length of the third tip side curved surface 55A is equal to the arc length of the first tip side curved surface 35A of the first die pad 30.
  • the difference between the arc length of the third tip side curved surface 55A and the arc length of the first tip side curved surface 35A is, for example, 10% or less of the arc length of the third tip side curved surface 55A, it can be said that the arc length of the third tip side curved surface 55A is equal to the arc length of the first tip side curved surface 35A.
  • the fourth tip side curved surface 56A has a shape in which the corner portion between the second tip surface 51 and the fourth side surface 54 is chamfered.
  • the arc length of the fourth tip side curved surface 56A is longer than the arc length of the fourth base end side curved surface 57B.
  • the arc length of the fourth tip side curved surface 56A is longer than the arc length of the fourth recess side curved surface 58B.
  • the radius of curvature of the fourth tip side curved surface 56A is larger than the radius of curvature of the fourth base end side curved surface 57B.
  • the radius of curvature of the fourth tip side curved surface 56A is larger than the radius of curvature of the fourth recess side curved surface 58B.
  • the arc length of the fourth distal curved surface 56A is at least twice the arc length of the fourth proximal curved surface 57B. In one example, in a plan view, the arc length of the fourth distal curved surface 56A is at least five times the arc length of the fourth proximal curved surface 57B. In one example, in a plan view, the arc length of the fourth distal curved surface 56A is no more than ten times the arc length of the fourth proximal curved surface 57B.
  • the arc length of the fourth tip side curved surface 56A is at least twice the arc length of the fourth recess side curved surface 58B. In one example, in a plan view, the arc length of the fourth tip side curved surface 56A is at least five times the arc length of the fourth recess side curved surface 58B. In one example, in a plan view, the arc length of the fourth tip side curved surface 56A is no more than ten times the arc length of the fourth recess side curved surface 58B.
  • the arc length of the fourth tip side curved surface 56A is equal to the arc length of the second tip side curved surface 36A.
  • the difference between the arc length of the fourth tip side curved surface 56A and the arc length of the second tip side curved surface 36A is, for example, 10% or less of the arc length of the fourth tip side curved surface 56A, it can be said that the arc length of the fourth tip side curved surface 56A is equal to the arc length of the second tip side curved surface 36A.
  • the arc length of the fourth tip side curved surface 56A is equal to the arc length of the third tip side curved surface 55A.
  • the difference between the arc length of the fourth tip side curved surface 56A and the arc length of the third tip side curved surface 55A is, for example, 10% or less of the arc length of the fourth tip side curved surface 56A, it can be said that the arc length of the fourth tip side curved surface 56A is equal to the arc length of the third tip side curved surface 55A.
  • the arc length of the first distal curved surface 35A in plan view can be changed as desired within a range longer than the arc length of the first proximal curved surface 37A in plan view.
  • the arc length of the first distal curved surface 35A in plan view may be equal to the arc length of the first recessed curved surface 38A in plan view, or may be shorter than the arc length of the first recessed curved surface 38A in plan view.
  • the arc length of the second distal curved surface 36A in plan view can be changed as desired within a range longer than the arc length of the second proximal curved surface 37B in plan view.
  • the arc length of the second distal curved surface 36A in plan view may be equal to the arc length of the second recessed curved surface 38B in plan view, or may be shorter than the arc length of the second recessed curved surface 38B in plan view.
  • the arc length of the third tip side curved surface 55A in plan view can be changed as desired within a range longer than the arc length of the third base side curved surface 57A in plan view.
  • the arc length of the third tip side curved surface 55A in plan view may be equal to the arc length of the third recess side curved surface 58A in plan view, or may be shorter than the arc length of the third recess side curved surface 58A in plan view.
  • the arc length of the fourth tip side curved surface 56A in plan view can be changed as desired within a range longer than the arc length of the fourth base side curved surface 57B in plan view.
  • the arc length of the fourth tip side curved surface 56A in plan view may be equal to the arc length of the fourth recess side curved surface 58B in plan view, or may be shorter than the arc length of the fourth recess side curved surface 58B in plan view.
  • the arc length of each of the first distal curved surface 35A and the second distal curved surface 36A in a plan view may be different from the arc length of each of the third distal curved surface 55A and the fourth distal curved surface 56A in a plan view.
  • the arc length of each of the first distal curved surface 35A and the second distal curved surface 36A in a plan view may be shorter or longer than the arc length of each of the third distal curved surface 55A and the fourth distal curved surface 56A in a plan view.
  • the first die pad 30 has a first tip side curved surface 35A formed between the first tip surface 31 and the first side surface 33, a second tip side curved surface 36A formed between the first tip surface 31 and the second side surface 34, a first base side curved surface 37A formed between the first base end surface 32 and the first side surface 33, and a second base side curved surface 37B formed between the first base end surface 32 and the second side surface 34.
  • the arc lengths of both the first tip side curved surface 35A and the second tip side curved surface 36A are longer than the arc lengths of both the first base side curved surface 37A and the second base side curved surface 37B.
  • the first tip curved surface 35A and the second tip curved surface 36A can reduce electric field concentration at the corner portion of the tip of the first die pad 30 that is closest to the second die pad 50. This makes it possible to avoid dielectric breakdown between the first die pad 30 and the second die pad 50, thereby improving the dielectric strength of the signal transmission device 10.
  • the second die pad 50 has a third tip side curved surface 55A formed between the second tip surface 51 and the third side surface 53, a fourth tip side curved surface 56A formed between the second tip surface 51 and the fourth side surface 54, a third base side curved surface 57A formed between the second base surface 52 and the third side surface 53, and a fourth base side curved surface 57B formed between the second base surface 52 and the fourth side surface 54.
  • the arc lengths of both the third tip side curved surface 55A and the fourth tip side curved surface 56A are longer than the arc lengths of both the third base side curved surface 57A and the fourth base side curved surface 57B.
  • the third tip curved surface 55A and the fourth tip curved surface 56A can reduce electric field concentration at the corner portion of the tip of the second die pad 50 that is closest to the first die pad 30. This makes it possible to avoid dielectric breakdown between the first die pad 30 and the second die pad 50, thereby improving the dielectric strength of the signal transmission device 10.
  • a signal transmission device 10 of the sixth embodiment will be described with reference to Fig. 33.
  • the signal transmission device 10 of the sixth embodiment differs from the signal transmission device 10 of the fifth embodiment in the configuration of the first frame 10A and the second frame 10B.
  • the configuration different from the fifth embodiment will be described in detail, and the same reference numerals will be used to designate the same components as the fifth embodiment, and the description thereof will be omitted.
  • the signal transmission device 10 of the sixth embodiment is different from the signal transmission device 10 of the fifth embodiment in the shape of the first die pad 30 of the first frame 10A and the shape of the second die pad 50 of the second frame 10B.
  • the first die pad 30 includes a first tip side inclined portion 35, a second tip side inclined portion 36, a first tip side curved surface 35B, and a second tip side curved surface 36B instead of the first tip side curved surface 35A and the second tip side curved surface 36A.
  • the second die pad 50 includes a third tip side inclined portion 55, a fourth tip side inclined portion 56, a third tip side curved surface 55B, and a fourth tip side curved surface 56B instead of the third tip side curved surface 55A and the fourth tip side curved surface 56A.
  • the first tip side curved surface 35B has a shape in which the corner portion between the first tip side surface 31 and the first tip side inclined portion 35 is rounded.
  • the arc length of the first tip side curved surface 35B is longer than the arc length of the first base side curved surface 37A (see FIG. 32).
  • the arc length of the first tip side curved surface 35B is longer than the arc length of the first recess side curved surface 38A (see FIG. 32).
  • the arc length of the first tip side curved surface 35B in a plan view is more than twice the arc length of the first base side curved surface 37A in a plan view.
  • the second tip side curved surface 36B has a shape in which the corner portion between the first tip side surface 31 and the second tip side inclined portion 36 is rounded.
  • the arc length of the second tip side curved surface 36B is longer than the arc length of the second base side curved surface 37B (see FIG. 32).
  • the arc length of the second tip side curved surface 36B is longer than the arc length of the second recess side curved surface 38B (see FIG. 32).
  • the arc length of the second tip side curved surface 36B in a plan view is more than twice the arc length of the second base side curved surface 37B in a plan view.
  • the arc length of the second distal curved surface 36B in a plan view is equal to the arc length of the first distal curved surface 35B in a plan view.
  • the difference between the arc length of the second distal curved surface 36B in a plan view and the arc length of the first distal curved surface 35B in a plan view is, for example, within 10% of the arc length of the second distal curved surface 36B in a plan view, it can be said that the arc length of the second distal curved surface 36B in a plan view is equal to the arc length of the first distal curved surface 35B in a plan view.
  • the third tip side curved surface 55B has a shape in which the corner portion between the second tip surface 51 and the third tip side inclined portion 55 is rounded.
  • the arc length of the third tip side curved surface 55B is longer than the arc length of the third base side curved surface 57A (see FIG. 32).
  • the arc length of the third tip side curved surface 55B is longer than the arc length of the third recess side curved surface 58A (see FIG. 32).
  • the arc length of the third tip side curved surface 55B in a plan view is more than twice the arc length of the third base side curved surface 57A in a plan view.
  • the fourth tip side curved surface 56B has a shape in which the corner portion between the second tip surface 51 and the fourth tip side inclined portion 56 is rounded.
  • the arc length of the fourth tip side curved surface 56B is longer than the arc length of the fourth base side curved surface 57B (see FIG. 32).
  • the arc length of the fourth tip side curved surface 56B is longer than the arc length of the fourth recess side curved surface 58B (see FIG. 32).
  • the arc length of the fourth tip side curved surface 56B in a plan view is more than twice the arc length of the fourth base side curved surface 57B in a plan view.
  • the arc length of the fourth tip curved surface 56B in a plan view is equal to the arc length of the third tip curved surface 55B in a plan view.
  • the difference between the arc length of the fourth tip curved surface 56B in a plan view and the arc length of the third tip curved surface 55B in a plan view is, for example, within 10% of the arc length of the fourth tip curved surface 56B in a plan view, it can be said that the arc length of the fourth tip curved surface 56B in a plan view is equal to the arc length of the third tip curved surface 55B in a plan view.
  • the arc length of the first tip side curved surface 35B in plan view can be changed as desired within a range longer than the arc length of the first base side curved surface 37A in plan view.
  • the arc length of the first tip side curved surface 35B in plan view may be equal to the arc length of the first recess side curved surface 38A in plan view, or may be shorter than the arc length of the first recess side curved surface 38A in plan view.
  • the arc length of the second distal curved surface 36B in plan view can be changed as desired within a range longer than the arc length of the second proximal curved surface 37B in plan view.
  • the arc length of the second distal curved surface 36B in plan view may be equal to the arc length of the second recessed curved surface 38B in plan view, or may be shorter than the arc length of the second recessed curved surface 38B in plan view.
  • the arc length of the third tip side curved surface 55B in plan view can be changed as desired within a range longer than the arc length of the third base side curved surface 57A in plan view.
  • the arc length of the third tip side curved surface 55B in plan view may be equal to the arc length of the third recess side curved surface 58A in plan view, or may be shorter than the arc length of the third recess side curved surface 58A in plan view.
  • the arc length of the fourth tip side curved surface 56B in a plan view can be changed as desired within a range longer than the arc length of the fourth base side curved surface 57B in a plan view.
  • the arc length of the fourth tip side curved surface 56B in a plan view may be equal to the arc length of the fourth recess side curved surface 58B in a plan view, or may be shorter than the arc length of the fourth recess side curved surface 58B in a plan view.
  • the arc length of each of the first tip curved surface 35B and the second tip curved surface 36B in a plan view may be different from the arc length of each of the third tip curved surface 55B and the fourth tip curved surface 56B in a plan view.
  • the arc length of each of the first tip curved surface 35B and the second tip curved surface 36B in a plan view may be shorter or longer than the arc length of each of the third tip curved surface 55B and the fourth tip curved surface 56B in a plan view. Note that the signal transmission device 10 of the sixth embodiment provides the same effect as the fifth embodiment.
  • a signal transmission device 10 of the seventh embodiment will be described with reference to Figures 34 to 41.
  • the signal transmission device 10 of the seventh embodiment differs from the signal transmission device 10 of the first embodiment mainly in the configurations of the first chip 60 and the second chip 70.
  • configurations different from the first embodiment will be described in detail, and components common to the first embodiment will be denoted by the same reference numerals and descriptions thereof will be omitted.
  • FIG. 34 shows a schematic cross-sectional structure of the first die pad 30 and the first chip 60 cut in the XZ plane
  • FIG. 35 shows a schematic cross-sectional structure of the first die pad 30 and the first chip 60 cut in the YZ plane.
  • the substrate 130 of the first chip 60 has first to fourth substrate side surfaces 133 to 136 that connect the substrate front surface 131 and the substrate back surface 132.
  • the first substrate side surface 133 constitutes a part of the first chip side surface 63 of the first chip 60
  • the second substrate side surface 134 constitutes a part of the second chip side surface 64
  • the third substrate side surface 135 constitutes a part of the third chip side surface 65
  • the fourth substrate side surface 136 constitutes a part of the fourth chip side surface 66.
  • the substrate 130 can be divided into a first portion 137 and a second portion 138 by a step portion 139.
  • the first portion 137 is a portion of the substrate 130 that is closer to the first die pad 30.
  • the second portion 138 is a portion that is provided on the first portion 137.
  • the step portion 139 is formed around the entire periphery of the substrate 130.
  • the thickness dimension (size in the Z direction) of the first portion 137 is greater than the thickness dimension (size in the Z direction) of the second portion 138. In one example, the thickness dimension of the first portion 137 is more than twice the thickness dimension of the second portion 138. In one example, the thickness dimension of the first portion 137 is more than three times the thickness dimension of the second portion 138. In one example, the thickness dimension of the first portion 137 is less than four times the thickness dimension of the second portion 138.
  • the first conductive bonding material SD1 is interposed between the first portion 137 and the first die pad 30 in the Z direction, and has a portion that protrudes from the first chip 60 in a direction perpendicular to the Z direction.
  • This protruding portion forms a first fillet SDA between the first portion 137.
  • the first fillet SDA is not formed in the second portion 138 due to the step portion 139.
  • the first fillet SDA is formed over the entire first portion 137 in the Z direction.
  • the height dimension (size in the Z direction) of the first fillet SDA can be changed as desired within a range lower than the step portion 139.
  • the height dimension of the first fillet SDA may be approximately 1/2 the thickness dimension of the first portion 137.
  • the position of the step portion 139 in the first chip 60 in the Z direction can be changed arbitrarily.
  • the relationship between the thickness dimension of the first portion 137 and the thickness dimension of the second portion 138 can be changed arbitrarily.
  • the thickness dimension of the first portion 137 may be equal to the thickness dimension of the second portion 138.
  • the thickness dimension of the first portion 137 is 1/2 or less of the thickness dimension of the second portion 138.
  • the thickness dimension of the first portion 137 is 1/3 or less of the thickness dimension of the second portion 138.
  • the thickness dimension of the first portion 137 is 1/4 or more of the thickness dimension of the second portion 138.
  • the thickness dimension of the first portion 137 is 1/4 or more and 3/4 or less of the thickness dimension (size in the Z direction) of the first chip 60.
  • the width H1 of the step portion 139 is equal on the first to fourth substrate sides 133 to 136.
  • the width H1 of the step portion 139 is, for example, about 3 ⁇ m.
  • the width H1 of the step portion 139 can be defined, for example, by the distance between the portion of the first substrate side 133 that corresponds to the first portion 137 and the portion that corresponds to the second portion 138.
  • FIG. 36 shows a schematic cross-sectional structure of the second die pad 50 and the second chip 70 cut in the XZ plane
  • FIG. 37 shows a schematic cross-sectional structure of the second die pad 50 and the second chip 70 cut in the YZ plane.
  • the wires WD, WE and the sealing resin 90 are omitted in the cross-sectional structures of FIG. 36 and FIG. 37.
  • the second chip 70 mounted on the second die pad 50 includes a substrate 230 .
  • the substrate 230 is formed of, for example, a semiconductor substrate.
  • the substrate 230 is a semiconductor substrate formed of a material containing silicon. Note that the substrate 230 may use a wide band gap semiconductor or a compound semiconductor as a semiconductor substrate. Also, instead of a semiconductor substrate, the substrate 230 may use an insulating substrate formed of a material containing glass, or an insulating substrate formed of a material containing ceramics such as alumina.
  • the wide bandgap semiconductor is a semiconductor substrate having a bandgap of 2.0 eV or more.
  • the wide bandgap semiconductor may be silicon carbide.
  • the compound semiconductor may be a III-V compound semiconductor.
  • the compound semiconductor may include at least one of aluminum nitride, indium nitride, gallium nitride, and gallium arsenide.
  • the substrate 230 of the second chip 70 has first to fourth substrate side surfaces 233 to 236 that connect the substrate front surface 231 and substrate back surface 232.
  • the first substrate side surface 233 constitutes part of the first chip side surface 73 of the second chip 70
  • the second substrate side surface 234 constitutes part of the second chip side surface 74
  • the third substrate side surface 235 constitutes part of the third chip side surface 75
  • the fourth substrate side surface 236 constitutes part of the fourth chip side surface 76.
  • the substrate 230 can be divided into a first portion 237 and a second portion 238 by a step portion 239.
  • the first portion 237 is a portion of the substrate 230 that is closer to the second die pad 50.
  • the second portion 238 is a portion that is provided on the first portion 237.
  • the step portion 239 is formed around the entire periphery of the substrate 230.
  • the thickness dimension (size in the Z direction) of the first portion 237 is greater than the thickness dimension (size in the Z direction) of the second portion 238. In one example, the thickness dimension of the first portion 237 is more than twice the thickness dimension of the second portion 238. In one example, the thickness dimension of the first portion 237 is more than three times the thickness dimension of the second portion 238. In one example, the thickness dimension of the first portion 237 is less than four times the thickness dimension of the second portion 238.
  • the second conductive bonding material SD2 is interposed between the first portion 237 and the second die pad 50 in the Z direction, and has a portion that protrudes from the second chip 70 in a direction perpendicular to the Z direction.
  • This protruding portion forms a second fillet SDB between the first portion 237.
  • the second fillet SDB is not formed in the second portion 238 due to the step portion 239.
  • the second fillet SDB is formed over the entire first portion 237 in the Z direction.
  • the height dimension (size in the Z direction) of the second fillet SDB can be changed as desired within a range lower than the step portion 239.
  • the height dimension of the second fillet SDB may be approximately 1/2 the thickness dimension of the first portion 237.
  • the position of the step portion 239 in the second chip 70 in the Z direction can be changed arbitrarily.
  • the relationship between the thickness dimension of the first portion 237 and the thickness dimension of the second portion 238 can be changed arbitrarily.
  • the thickness dimension of the first portion 237 may be equal to the thickness dimension of the second portion 238.
  • the thickness dimension of the first portion 237 is 1/2 or less of the thickness dimension of the second portion 238.
  • the thickness dimension of the first portion 237 is 1/3 or less of the thickness dimension of the second portion 238.
  • the thickness dimension of the first portion 237 is 1/4 or more of the thickness dimension of the second portion 238.
  • the thickness dimension of the first portion 237 is 1/4 or more and 3/4 or less of the thickness dimension (size in the Z direction) of the second chip 70.
  • the width H2 of the step portion 239 is equal to each other on the first to fourth substrate side surfaces 233 to 236.
  • the width H2 of the step portion 239 is, for example, about 3 ⁇ m.
  • the width H2 of the step portion 239 can be defined, for example, by the distance between the portion of the first substrate side surface 233 that corresponds to the first portion 237 and the portion that corresponds to the second portion 238.
  • the manufacturing method of the first chip 60 includes a step of preparing a substrate 830, a step of forming an element insulating layer 850 on the substrate 830, a step of forming a passivation film 861, a step of forming a protective film 862, and a step of singulating. An overview of each step will be described below.
  • Figs. 38 to 41 show a schematic cross-sectional structure of the first chip 60.
  • the hatched lines of the passivation film 861 and the protective film 862 are omitted in order to facilitate understanding of the drawings.
  • the second chip 70 is also manufactured in the same manner as the first chip 60, and therefore an example of a manufacturing process for the second chip 70 will not be described.
  • a substrate 830 including a plurality of substrates 130 is prepared.
  • the transmitting unit 301, the transmitting/receiving unit 302, the PWM generating unit 303, the logic unit 304, the UVLO unit 305, the resistor 306, the first switching element 307, and the second switching element 308 shown in FIG. 14 are formed.
  • a SiO 2 film is laminated on a substrate surface 831 of the substrate 830 by, for example, a CVD method.
  • the SiO 2 film is a film that constitutes the element insulating layer 850.
  • the element insulating layer 850 is constituted by, for example, a laminated structure of a plurality of SiO 2 films.
  • a process of forming the first to fourth rear surface side coils 111B to 114B is carried out, for example, by sputtering and etching. Then, after the process of forming the first to fourth rear surface side coils 111B to 114B is carried out, the process of forming the element insulating layer 850 on the substrate 830 is carried out again.
  • a process is carried out to form the first to fourth surface side coils 111A to 114A and the first to third electrode pads 67 to 69 by sputtering and etching.
  • the passivation film 861 is formed on the element insulating layer 850 by, for example, a CVD method.
  • the passivation film 861 also covers the second to fourth surface side coils 112A to 114A and the first to third electrode pads 67 to 69.
  • the protective film 862 is formed on the passivation film 861, for example, by a CVD method.
  • the protective film 862 is formed, for example, over the entire surface of the passivation film 861.
  • openings are formed, for example by etching, in both the protective film 862 and the passivation film 861 at positions that overlap with portions of each of the first to third electrode pads 67 to 69. As a result, portions of the first to third electrode pads 67 to 69 are exposed in the Z direction from both the protective film 862 and the passivation film 861.
  • the step of dividing into individual pieces includes a first dicing step and a second dicing step.
  • the first dicing step first, the substrate 830 is placed on the dicing tape DT. The back surface 832 of the substrate 830 is in contact with the dicing tape DT.
  • the protective film 862, the passivation film 861, and the element insulating layer 850 are cut by the first dicing blade DB1, and a part of the substrate 830 in the Z direction is cut. As a result, a recess 833 is formed in the substrate 830.
  • the substrate 830 is cut by the second dicing blade DB2.
  • the second dicing blade DB2 is a blade that is narrower than the first dicing blade DB1.
  • the second dicing blade DB2 cuts the substrate 830 from the recess 833 of the substrate 830. As a result, a step portion 839 is formed in the substrate 830.
  • the dicing tape DT is then removed. Through the above processes, the first chip 60 is manufactured.
  • Substrate 130 of first chip 60 has a first portion 137 including a back surface 132 of the substrate, a second portion 138 provided on first portion 137, and a step portion 139 formed so that second portion 138 is positioned inside substrate 130 relative to first portion 137.
  • the step portion 139 can prevent the first conductive bonding material SD1 from creeping up onto the chip surface 61 of the first chip 60.
  • the substrate 230 of the second chip 70 has a first portion 237 including the substrate back surface 232, a second portion 238 provided on the first portion 237, and a step portion 239 formed so that the second portion 238 is positioned inside the substrate 230 relative to the first portion 237.
  • the step portion 239 can prevent the second conductive bonding material SD2 from creeping up onto the chip surface 71 of the second chip 70.
  • a signal transmission device 10 of the eighth embodiment will be described with reference to Fig. 42.
  • the signal transmission device 10 of the eighth embodiment differs from the signal transmission device 10 of the first embodiment in that the conductive members 10D and 10E are omitted.
  • configurations different from the first embodiment will be described in detail, and components common to the first embodiment will be denoted by the same reference numerals and descriptions thereof will be omitted.
  • the signal transmission device 10 does not include conductive members 10D, 10E (see FIG. 7). Therefore, conductive member 10D is not exposed from the third sealing side surface 95 of the sealing resin 90. Furthermore, conductive member 10E is not exposed from the fourth sealing side surface 96 of the sealing resin 90. In this way, both the third sealing side surface 95 and the fourth sealing side surface 96 are made only of the resin material that makes up the sealing resin 90.
  • the recess 95D (see FIG. 7) is omitted from the third sealing side surface 95
  • the recess 96D (see FIG. 7) is omitted from the fourth sealing side surface 96.
  • the portion of the third sealing side surface 95 between the third front side surface 95A and the third back side surface 95B forms a flat surface along the XZ plane over the entire X direction.
  • the portion of the fourth sealing side surface 96 between the fourth front side surface 96A and the fourth back side surface 96B forms a flat surface along the XZ plane over the entire X direction.
  • this configuration can prevent static electricity and the like from entering the sealing resin 90 via the conductive member.
  • the insulation distance between the first lead terminals 11-18 and the second lead terminals 41-48 can be made large. This can improve the dielectric strength of the signal transmission device 10.
  • the signal transmission device 10 of the ninth embodiment differs from the signal transmission device 10 of the first embodiment mainly in the configurations of the first frame 10A, the second frame 10B, the first chip 60, and the second chip 70.
  • configurations different from the first embodiment will be described in detail, and components common to the first embodiment will be denoted by the same reference numerals and descriptions thereof will be omitted.
  • the ninth embodiment includes a signal transmission device 10 having four first lead terminals 11 to 14 protruding from a first sealing side surface 93 of the sealing resin 90 and four second lead terminals 41 to 44 protruding from a second sealing side surface 94. That is, the ninth embodiment has fewer first lead terminals and second lead terminals than the first embodiment.
  • the configuration of the first outer lead portions 11B-14B of the first lead terminals 11-14 that are outside the sealing resin 90 is the same as the configuration of the first outer lead portions 11B-14B of the first embodiment.
  • the configuration of the second outer lead portions 41B-44B of the second lead terminals 41-44 that are outside the sealing resin 90 is the same as the configuration of the second outer lead portions 41B-44B of the first embodiment. For this reason, detailed descriptions of the configurations of the first outer lead portions 11B-14B and second outer lead portions 41B-44B will be omitted.
  • the configuration of the sealing resin 90 is the same as the configuration of the sealing resin 90 of the first embodiment, detailed descriptions thereof will be omitted.
  • the first frame 10A includes four first lead terminals 11 to 14, unlike the first embodiment.
  • the first lead terminals 11 to 14 are arranged at a distance from each other in the Y direction.
  • the first lead terminals 11 to 14 are arranged in the order of first lead terminals 11, 12, 13, 14 from the fourth sealing side surface 96 toward the third sealing side surface 95.
  • the first lead terminal 14 is connected to the first die pad 30.
  • the first lead terminal 14 is integrated with the first die pad 30.
  • the first lead terminals 11 to 13 are arranged closer to the first sealing side surface 93 of the first die pad 30 and spaced apart from the first die pad 30.
  • the first die pad 30 When viewed from the X direction, the first die pad 30 has a size in the Y direction such that it overlaps with all of the first lead terminals 11 to 14. In the ninth embodiment, the size in the Y direction of the first die pad 30 is greater than the distance in the Y direction between the edge of the first lead terminal 11 on the fourth sealing side surface 96 side and the edge of the first lead terminal 14 on the third sealing side surface 95 side.
  • the first die pad 30 of the ninth embodiment has a different configuration of the first base end surface 32 compared to the first embodiment.
  • the first base end surface 32 does not include the protruding portion 32C. Therefore, the recess 32A includes one side surface 32AA that constitutes the protruding portion 32B, and a bottom surface 32AB.
  • the first die pad 30 of the ninth embodiment includes a hanging lead portion 32D.
  • the hanging lead portion 32D is disposed closer to the fourth sealing side surface 96 than the first lead terminals 11-14.
  • the hanging lead portion 32D extends along the X direction from the first base end surface 32 toward the first sealing side surface 93.
  • the hanging lead portion 32D is exposed from the first sealing side surface 93.
  • the second recess side curved surface 38B is formed between the hanging lead portion 32D and the bottom surface 32AB of the recess 32A.
  • the configuration of the plating layer 29 and the formation range on the first die pad 30 are the same as those of the plating layer 29 of the first embodiment (see FIG. 9).
  • the first chip 60 mounted on the first die pad 30 is formed in a flat plate shape.
  • the shape of the first chip 60 in a plan view is rectangular with the X direction as the short side direction and the Y direction as the long side direction.
  • the first chip 60 is mounted on the first die pad 30 by a first conductive bonding material SD1. More specifically, the first chip 60 is die-bonded to the first die pad 30.
  • the first chip 60 is disposed at a position on the first die pad 30 closer to the second die pad 50 in the X direction.
  • the distance in the X direction between the first chip 60 and the first tip surface 31 of the first die pad 30 is smaller than the distance in the X direction between the first chip 60 and the bottom surface 32AB of the recess 32A in the first die pad 30.
  • the first chip 60 is disposed in a position closer to the third sealing side surface 95 of the first die pad 30 in the Y direction. That is, in a plan view, the distance between the first chip 60 and the first side surface 33 of the first die pad 30 is smaller than the distance between the first chip 60 and the second side surface 34 of the first die pad 30.
  • the first chip 60 is disposed in a position overlapping with the first lead terminals 12 and 13.
  • the first chip 60 can also be said to be disposed closer to the fourth sealing side surface 96 than the first lead terminal 14.
  • the first chip 60 can also be said to be disposed closer to the third sealing side surface 95 than the first lead terminal 11.
  • the second frame 10B unlike the first embodiment, includes four second lead terminals 41 to 44.
  • the second lead terminals 41 to 44 are arranged at a distance from each other in the Y direction.
  • the second lead terminals 41 to 44 are arranged in the order of second lead terminals 41, 42, 43, 44 from the third sealing side surface 95 toward the fourth sealing side surface 96.
  • the second lead terminal 41 is connected to the second die pad 50.
  • the second lead terminal 41 is integrated with the second die pad 50.
  • the second lead terminals 42 to 44 are arranged closer to the second sealing side surface 94 and spaced apart from the second die pad 50.
  • the second die pad 50 When viewed from the X direction, the second die pad 50 has a size in the Y direction such that it overlaps with all of the second lead terminals 41 to 44.
  • the size in the Y direction of the second die pad 50 is greater than the distance in the Y direction between the edge of the second lead terminal 41 on the third sealing side surface 95 side and the edge of the second lead terminal 44 on the fourth sealing side surface 96 side.
  • the second die pad 50 of the ninth embodiment has a different configuration of the second base end surface 52 compared to the first embodiment.
  • the second base end surface 52 does not include the protruding portion 52B. Therefore, the recess 52A includes one inner side surface 52AA that constitutes the protruding portion 52C, and a bottom surface 52AB.
  • the second die pad 50 of the ninth embodiment includes a hanging lead portion 52D.
  • the hanging lead portion 52D is disposed closer to the fourth sealing side surface 96 than the second lead terminals 41 to 44.
  • the hanging lead portion 52D extends in the X direction from the second base end surface 52 toward the second sealing side surface 94.
  • the hanging lead portion 52D is exposed from the second sealing side surface 94.
  • the fourth recess side curved surface 58B is formed between the hanging lead portion 52D and the bottom surface 52AB of the recess 52A.
  • the second chip 70 mounted on the second die pad 50 is formed in a flat plate shape.
  • the shape of the second chip 70 in a plan view is a rectangle with the X direction as the short side direction and the Y direction as the long side direction.
  • the area of the second chip 70 in a plan view is larger than the area of the first chip 60 in a plan view.
  • the second chip 70 is mounted on the second die pad 50 by the second conductive bonding material SD2. More specifically, the second chip 70 is die-bonded to the second die pad 50.
  • the second chip 70 is disposed at a position on the second die pad 50 closer to the first die pad 30 in the X direction.
  • the distance in the X direction between the second chip 70 and the second tip surface 51 of the second die pad 50 is smaller than the distance in the X direction between the second chip 70 and the bottom surface 52AB of the recess 52A in the second die pad 50.
  • the second chip 70 is disposed in a position closer to the third sealing side surface 95 of the second die pad 50 in the Y direction. That is, in a plan view, the distance between the second chip 70 and the third side surface 53 of the second die pad 50 is smaller than the distance between the second chip 70 and the fourth side surface 54 of the second die pad 50.
  • the second chip 70 is disposed in a position overlapping with the second lead terminal 42.
  • the second chip 70 can also be said to be disposed closer to the fourth sealing side surface 96 than the second lead terminal 41.
  • the second chip 70 can also be said to be disposed closer to the third sealing side surface 95 than the second lead terminal 44.
  • the second chip 70 can also be said to be disposed closer to the third sealing side surface 95 than the second lead terminal 43.
  • the second chip 70 is disposed in a position that partially overlaps with the first chip 60 when viewed from the X direction.
  • the second chip 70 is disposed offset toward the third sealing side surface 95 relative to the first chip 60 when viewed from the X direction.
  • the first chip 60 is disposed offset toward the fourth sealing side surface 96 relative to the second chip 70 when viewed from the X direction.
  • the first lead terminals 11 to 14 include first inner lead portions 11A to 14A and first outer lead portions 11B to 14B provided in a sealing resin 90.
  • the configuration of the first outer lead portions 11B to 14B is the same as that of the first outer lead portions 11B to 14B in the first embodiment.
  • the configuration of the first inner lead portions 11A to 14A will be described below.
  • the first inner lead portions 11A to 13A are positioned so as to overlap the recess 32A of the first die pad 30.
  • the tip portions of the first inner lead portions 11A to 13A are positioned within the recess 32A of the first die pad 30.
  • the first inner lead portions 11A to 13A are positioned between the protrusion 32B and the hanging lead portion 32D in the Y direction.
  • the first inner lead portion 14A is positioned closer to the third sealing side surface 95 than the recess 32A of the first die pad 30.
  • the first inner lead portion 11A is disposed away from the first die pad 30.
  • the shape of the first inner lead portion 11A in a plan view is approximately L-shaped.
  • the first inner lead portion 11A includes a wire connection portion 11AA and a lead connection portion 11AB extending from the wire connection portion 11AA toward the first sealing side surface 93.
  • the lead connection portion 11AB is connected to the first outer lead portion 11B.
  • the wire connection portion 11AA is disposed in the recess 32A of the first die pad 30.
  • the shape of the wire connection portion 11AA is substantially rectangular with the Y direction as the longitudinal direction and the X direction as the lateral direction.
  • the wire connection portion 11AA extends in the Y direction from the lead connection portion 11AB.
  • the wire connection portion 11AA extends from the lead connection portion 11AB toward the first inner lead portion 12A.
  • the corner portion of the tip of the wire connection portion 11AA near the hanging lead portion 32D includes a curved surface 11AE.
  • the lead connection portion 11AB is disposed closer to the first sealing side surface 93 than the recess 32A of the first die pad 30. In a plan view, the lead connection portion 11AB extends in the X direction. In one example, the size of the lead connection portion 11AB in the Y direction is smaller than the size of the wire connection portion 11AA in the Y direction.
  • the first inner lead portion 12A extends along the X direction.
  • the first inner lead portion 12A includes a wire connection portion 12AA and a lead connection portion 12AB that extends from the wire connection portion 12AA toward the first sealing side surface 93.
  • the lead connection portion 12AB is connected to the first outer lead portion 12B.
  • the wire connection portion 12AA is disposed in the recess 32A of the first die pad 30.
  • the shape of the wire connection portion 12AA is a substantially rectangular shape with the Y direction being the long side and the X direction being the short side.
  • the wire connection portion 12AA extends in the Y direction.
  • the portion of the wire connection portion 12AA closer to the lead connection portion 12AB is formed in a tapered shape such that the width dimension (size in the Y direction) of the wire connection portion 12AA decreases toward the lead connection portion 12AB.
  • the corner portion of the tip of the wire connection portion 12AA closer to the wire connection portion 11AA includes a curved surface 12AE.
  • the lead connection portion 12AB is disposed closer to the first sealing side surface 93 than the recess 32A of the first die pad 30. In a plan view, the lead connection portion 12AB extends in the X direction. In one example, the size of the lead connection portion 12AB in the Y direction is smaller than the size of the wire connection portion 12AA in the Y direction.
  • the first inner lead portion 13A has a generally T-shaped shape in a plan view.
  • the first inner lead portion 13A includes a wire connection portion 13AA and a lead connection portion 13AB that extends from the wire connection portion 13AA toward the first sealing side surface 93.
  • the lead connection portion 13AB is connected to the first outer lead portion 13B.
  • the wire connection portion 13AA is disposed in the recess 32A of the first die pad 30.
  • the shape of the wire connection portion 13AA in plan view is a substantially rectangular shape with the Y direction being the longitudinal direction and the X direction being the lateral direction. In plan view, the wire connection portion 13AA extends in the Y direction.
  • the portion of the wire connection portion 13AA closer to the lead connection portion 13AB is formed in a tapered shape in which the width dimension (size in the Y direction) of the wire connection portion 13AA decreases toward the lead connection portion 13AB.
  • the corner portion of the wire connection portion 13AA at the tip closer to the wire connection portion 12AA includes a curved surface 13AE.
  • the shape of the first lead terminal 12 in plan view is the same as the shape of the first lead terminal 13 in plan view.
  • the lead connection portion 13AB is disposed closer to the first sealing side surface 93 than the recess 32A of the first die pad 30. In a plan view, the lead connection portion 13AB extends in the X direction. In one example, the size of the lead connection portion 13AB in the Y direction is smaller than the size of the wire connection portion 13AA in the Y direction.
  • the lead connection portions 11AB to 13AB correspond to the "first portion of the first lead terminal," and the wire connection portions 11AA to 13AA correspond to the "second portion of the first lead terminal.”
  • the X direction in which the lead connection portions 11AB to 13AB extend corresponds to the "first direction”
  • the Y direction in which the wire connection portions 11AA to 13AA extend corresponds to the "second direction.”
  • the wire connection portions 11AA to 13AA extend in a direction perpendicular to the direction in which the lead connection portions 11AB to 13AB extend in a plan view, but this is not limited to this.
  • the wire connection portions 11AA to 13AA may extend in a direction intersecting the direction in which the lead connection portions 11AB to 13AB extend in a plan view.
  • the second direction is not limited to a direction perpendicular to the first direction in a plan view, but may be a direction intersecting the first direction.
  • the first inner lead portion 14A is connected to the first base end surface 32 of the first die pad 30, unlike the first embodiment. More specifically, the first inner lead portion 14A is connected to the protruding portion 32B of the first die pad 30.
  • the first inner lead portion 14A extends along the X direction.
  • the width dimension (size in the Y direction) of the first inner lead portion 14A is smaller than the width dimension (size in the Y direction) of the protruding portion 32B.
  • the first inner lead portion 14A is disposed closer to the fourth sealing side surface 96 (closer to the first inner lead portion 13A) than the center of the protruding portion 32B in the Y direction.
  • the second lead terminals 41 to 44 include second inner lead portions 41A to 44A and second outer lead portions 41B to 44B provided in the sealing resin 90.
  • the configuration of the second inner lead portions 41A to 44A will be described below.
  • the second inner lead portions 42A to 44A are positioned so as to overlap the recess 52A of the second die pad 50 when viewed from the X direction.
  • the tip portions of the second inner lead portions 42A to 44A are positioned within the recess 52A of the second die pad 50.
  • the second inner lead portion 41A is positioned closer to the third sealing side surface 95 than the recess 52A of the second die pad 50.
  • the second inner lead portion 41A is connected to the second base end surface 52 of the second die pad 50. More specifically, the second inner lead portion 41A is connected to the protruding portion 52B of the second die pad 50.
  • the second inner lead portion 41A extends along the X direction.
  • the width dimension (size in the Y direction) of the second inner lead portion 41A is smaller than the width dimension (size in the Y direction) of the protruding portion 52B.
  • the second inner lead portion 41A is disposed closer to the fourth sealing side surface 96 (closer to the second inner lead portion 42A) than the center of the protruding portion 52B in the Y direction.
  • the second inner lead portion 42A has a generally T-shaped shape in a plan view.
  • the second inner lead portion 42A includes a wire connection portion 42AA and a lead connection portion 42AB that extends from the wire connection portion 42AA toward the second sealing side surface 94.
  • the lead connection portion 42AB is connected to the second outer lead portion 42B.
  • the wire connection portion 42AA is disposed in the recess 52A of the second die pad 50.
  • the shape of the wire connection portion 42AA is a substantially rectangular shape with the Y direction being the long side and the X direction being the short side.
  • the wire connection portion 42AA extends in the Y direction.
  • the portion of the wire connection portion 42AA closer to the lead connection portion 42AB is formed in a tapered shape such that the width dimension (size in the Y direction) of the wire connection portion 42AA decreases toward the lead connection portion 42AB.
  • a corner portion of the wire connection portion 42AA closer to the bottom surface 52AB of the recess 52A and closer to the second inner lead portion 43A includes a curved surface 42AE.
  • the lead connection portion 42AB is disposed closer to the second sealing side surface 94 than the recess 52A of the second die pad 50. In a plan view, the lead connection portion 42AB extends in the X direction. In one example, the size of the lead connection portion 42AB in the Y direction is smaller than the size of the wire connection portion 42AA in the Y direction.
  • the second inner lead portion 43A has a generally T-shaped shape in a plan view.
  • the second inner lead portion 43A includes a wire connection portion 43AA and a lead connection portion 43AB that extends from the wire connection portion 43AA toward the second sealing side surface 94.
  • the lead connection portion 43AB is connected to the second outer lead portion 43B.
  • the wire connection portion 43AA is disposed in the recess 52A of the second die pad 50.
  • the shape of the wire connection portion 43AA is a substantially rectangular shape with the Y direction being the long side and the X direction being the short side.
  • the wire connection portion 43AA extends in the Y direction.
  • the portion of the wire connection portion 43AA closer to the lead connection portion 43AB is formed in a tapered shape such that the width dimension (size in the Y direction) of the wire connection portion 43AA decreases toward the lead connection portion 43AB.
  • a corner portion of the wire connection portion 43AA closer to the bottom surface 52AB of the recess 52A and closer to the second inner lead portion 44A includes a curved surface 43AE.
  • the lead connection portion 43AB is disposed closer to the second sealing side surface 94 than the recess 52A of the second die pad 50. In a plan view, the lead connection portion 43AB extends in the X direction. In one example, the size of the lead connection portion 43AB in the Y direction is smaller than the size of the wire connection portion 43AA in the Y direction.
  • the second inner lead portion 44A has a generally L-shaped shape in a plan view.
  • the second inner lead portion 44A includes a wire connection portion 44AA and a lead connection portion 44AB that extends from the wire connection portion 44AA toward the second sealing side surface 94.
  • the lead connection portion 44AB is connected to the second outer lead portion 44B.
  • the wire connection portion 44AA is disposed in the recess 52A of the second die pad 50.
  • the shape of the wire connection portion 44AA is a substantially rectangular shape with the Y direction being the longitudinal direction and the X direction being the lateral direction.
  • the wire connection portion 44AA extends in the Y direction from the lead connection portion 44AB.
  • the wire connection portion 44AA extends from the lead connection portion 44AB toward the second inner lead portion 43A.
  • a corner portion of the wire connection portion 44AA near the bottom surface 52AB of the recess 52A and near the hanging lead portion 52D includes a curved surface 44AE.
  • the lead connection portion 44AB is disposed closer to the second sealing side surface 94 than the recess 52A of the second die pad 50. In a plan view, the lead connection portion 44AB extends in the X direction. In one example, the size of the lead connection portion 44AB in the Y direction is smaller than the size of the wire connection portion 44AA in the Y direction.
  • the lead connection portions 42AB to 44AB correspond to the "third portion of the second lead terminal," and the wire connection portions 42AA to 44AA correspond to the "fourth portion of the second lead terminal.”
  • the X direction in which the lead connection portions 42AB to 44AB extend corresponds to the "first direction”
  • the Y direction in which the wire connection portions 42AA to 44AA extend corresponds to the "second direction.”
  • the wire connection portions 42AA to 44AA extend in a direction perpendicular to the direction in which the lead connection portions 42AB to 44AB extend in a plan view, but this is not limited to this.
  • the wire connection portions 42AA to 44AA only need to extend in a direction intersecting the direction in which the lead connection portions 42AB to 44AB extend in a plan view.
  • the cross-sectional structures of the wire connecting portions 11AA to 13AA and 42AA to 44AA are similar to those of the first embodiment.
  • the first chip 60 has a plurality of first electrode pads 67 (three in the ninth embodiment), a plurality of second electrode pads 68 (three in the ninth embodiment), and one third electrode pad 69.
  • Each of the first electrode pads 67, each of the second electrode pads 68, and the third electrode pad 69 are provided so as to be exposed from the chip surface 61.
  • Each of the first electrode pads 67, second electrode pads 68, and third electrode pads 69 may include at least one of titanium, titanium nitride, copper, aluminum, and tungsten.
  • each of the first electrode pads 67, second electrode pads 68, and third electrode pads 69 has a laminated structure of titanium and copper. Note that the material constituting one or two types of electrode pads among each of the first electrode pads 67, second electrode pads 68, and third electrode pads 69 may be different from the material constituting the remaining types of electrode pads.
  • the multiple first electrode pads 67 are provided in a position closer to the second chip side surface 64 than the center of the chip surface 61 in the X direction in a plan view.
  • the multiple first electrode pads 67 are provided in a position closer to the third chip side surface 65 of the chip surface 61 in a plan view.
  • the distance in the Y direction between the first electrode pad 67 closest to the third chip side surface 65 and the third chip side surface 65 in a plan view is smaller than the distance in the Y direction between the first electrode pad 67 closest to the fourth chip side surface 66 and the fourth chip side surface 66.
  • the second electrode pads 68 are electrode pads that are individually and electrically connected to the first lead terminals 11 to 13.
  • the second electrode pads 68 are provided at positions closer to the fourth chip side surface 66 than the center of the chip surface 61 in the Y direction in a plan view.
  • the third electrode pad 69 is located on the chip surface 61 closer to the third chip side surface 65 in the Y direction than the multiple second electrode pads 68 in a planar view.
  • the third electrode pad 69 is located on the chip surface 61 closer to the first chip side surface 63 in the X direction than the multiple first electrode pads 67 in a planar view.
  • the second chip 70 has a plurality of first electrode pads 77 (three in the ninth embodiment), a plurality of second electrode pads 78 (three in the ninth embodiment), and one third electrode pad 79.
  • Each of the first electrode pads 77, each of the second electrode pads 78, and the third electrode pad 79 are provided so as to be exposed from the chip surface 71.
  • Each of the first electrode pads 77, second electrode pads 78, and third electrode pads 79 may include at least one of titanium, titanium nitride, copper, aluminum, and tungsten.
  • each of the first electrode pads 77, second electrode pads 78, and third electrode pads 79 has a laminated structure of titanium and copper. Note that the material constituting one or two types of electrode pads among each of the first electrode pads 77, second electrode pads 78, and third electrode pads 79 may be different from the material constituting the remaining types of electrode pads.
  • the multiple first electrode pads 77 are provided in a position closer to the second chip side surface 74 than the center in the X direction of the chip surface 71 in a planar view.
  • the multiple first electrode pads 77 are provided in a position closer to the fourth chip side surface 76 on the chip surface 71 in a planar view.
  • the distance in the Y direction between the first electrode pad 77 closest to the fourth chip side surface 76 and the fourth chip side surface 76 in a planar view is smaller than the distance in the Y direction between the first electrode pad 77 closest to the third chip side surface 75 and the third chip side surface 75.
  • the second electrode pads 78 are provided at positions closer to the first chip side surface 73 than the center in the X direction of the chip surface 71 in a plan view.
  • the third electrode pad 79 is provided closer to the third sealing side surface 95 than the center in the Y direction of the chip surface 71 in a plan view.
  • the third electrode pad 79 is provided closer to the third sealing side surface 95 than the multiple first electrode pads 77 in a plan view.
  • the third electrode pad 79 is provided closer to the third sealing side surface 95 than the multiple second electrode pads 78 in a plan view.
  • the electrical connection configuration between the first chip 60 and the second chip 70 will be described. 44, the first electrode pads 67 of the first chip 60 and the first electrode pads 77 of the second chip 70 are individually connected by a plurality of (three in the ninth embodiment) inter-chip wires WA. As a result, the first electrode pads 67 and the first electrode pads 77 are individually and electrically connected.
  • the distance between two adjacent first electrode pads 67 in the Y direction among the three first electrode pads 67 on the first chip 60 is greater than the distance between two adjacent first electrode pads 77 in the Y direction among the three first electrode pads 77 on the second chip 70. Therefore, the distance between two adjacent inter-chip wires WA in the Y direction among the three inter-chip wires WA closer to the third sealing side surface 95 gradually increases from the first electrode pad 67 to the first electrode pad 77.
  • interchip wires WA are referred to as interchip wires WA1, WA2, and WA3, in order from the third sealing side surface 95 to the fourth sealing side surface 96.
  • the interchip wire WA1 is inclined from the third sealing side surface 95 to the fourth sealing side surface 96 as it moves from the first electrode pad 67 to the first electrode pad 77.
  • the interchip wire WA2 extends along the X direction between the first electrode pad 67 and the first electrode pad 77.
  • the interchip wire WA3 is inclined from the fourth sealing side surface 96 to the third sealing side surface 95 as it moves from the first electrode pad 67 to the first electrode pad 77.
  • the acute angle formed between the inter-chip wire WA1 and the X direction is 10° or less. In one example, the acute angle formed between the inter-chip wire WA1 and the X direction is greater than 0° and less than 3°. In one example, the acute angle formed between the inter-chip wire WA1 and the X direction is greater than 3° and less than 5°. In one example, the acute angle formed between the inter-chip wire WA1 and the X direction is greater than 5° and less than 7°. In one example, the acute angle formed between the inter-chip wire WA1 and the X direction is greater than 7° and less than 10°.
  • the acute angle formed by the inter-chip wires WA1 and WA2 is 10° or less. In one example, the acute angle formed by the inter-chip wires WA1 and WA2 is greater than 0° and less than 3°. In one example, the acute angle formed by the inter-chip wires WA1 and WA2 is greater than 3° and less than 5°. In one example, the acute angle formed by the inter-chip wires WA1 and WA2 is greater than 5° and less than 7°. In one example, the acute angle formed by the inter-chip wires WA1 and WA2 is greater than 7° and less than 10°.
  • the acute angle formed between the inter-chip wire WA3 and the X direction is 10° or less. In one example, the acute angle formed between the inter-chip wire WA3 and the X direction is greater than 0° and less than 3°. In one example, the acute angle formed between the inter-chip wire WA3 and the X direction is greater than 3° and less than 5°. In one example, the acute angle formed between the inter-chip wire WA3 and the X direction is greater than 5° and less than 7°. In one example, the acute angle formed between the inter-chip wire WA3 and the X direction is greater than 7° and less than 10°.
  • the acute angle formed by the inter-chip wire WA3 and the inter-chip wire WA2 is 10° or less. In one example, the acute angle formed by the inter-chip wire WA3 and the inter-chip wire WA2 is greater than 0° and less than 3°. In one example, the acute angle formed by the inter-chip wire WA3 and the inter-chip wire WA2 is greater than 3° and less than 5°. In one example, the acute angle formed by the inter-chip wire WA3 and the inter-chip wire WA2 is greater than 5° and less than 7°. In one example, the acute angle formed by the inter-chip wire WA3 and the inter-chip wire WA2 is greater than 7° and less than 10°.
  • the acute angle formed by the inter-chip wires WA1 and WA3 is 10° or less. In one example, the acute angle formed by the inter-chip wires WA1 and WA3 is greater than 0° and less than 3°. In one example, the acute angle formed by the inter-chip wires WA1 and WA3 is greater than 3° and less than 5°. In one example, the acute angle formed by the inter-chip wires WA1 and WA3 is greater than 5° and less than 7°. In one example, the acute angle formed by the inter-chip wires WA1 and WA3 is greater than 7° and less than 10°.
  • the multiple second electrode pads 68 of the first chip 60 and the first lead terminals 11 to 13 are individually connected by multiple (three in the ninth embodiment) first lead wires WB. This allows the first chip 60 and the first lead terminals 11 to 13 to be individually electrically connected. Each of the first lead terminals 11 to 13 is individually connected to the multiple second electrode pads 68 by one first lead wire WB.
  • the first lead wire WB is a bonding wire formed by a wire bonding device.
  • the bonded portion of the first lead wire WB with the second electrode pad 68 is a first bond portion
  • the bonded portion with the first lead terminals 11-13 is a second bond portion.
  • the first lead wire WB is connected to the wire connection portions 11AA-13AA of the first inner lead portions 11A-13A of the first lead terminals 11-13. No security wire is provided in the second bond portion of the first lead wire WB.
  • the multiple third electrode pads 69 of the first chip 60 and the first die pad 30 are individually connected by a single first die pad wire WC. As a result, the third electrode pads 69 are electrically connected to the first die pad 30. In other words, the third electrode pads 69 are at the first ground potential. It can also be said that the third electrode pads 69 are electrically connected to the first lead terminal 14.
  • the wire WC for the first die pad connected to the third electrode pad 69 of the first chip 60 closer to the third sealing side surface 95 is connected to the end of the first die pad 30 closer to the third sealing side surface 95 in the Y direction.
  • the wire WC for the first die pad connected to the third electrode pad 69 of the first chip 60 closer to the fourth sealing side surface 96 is connected to the end of the first die pad 30 closer to the fourth sealing side surface 96 in the Y direction.
  • the wire WC for the first die pad is a bonding wire formed by a wire bonding device.
  • the bond portion of the wire WC for the first die pad with the third electrode pad 69 is a first bond portion
  • the bond portion of the wire WC for the first die pad with the first die pad 30 is a second bond portion.
  • a security bond WC1 is provided on the second bond portion of the wire WC for the first die pad.
  • the second electrode pads 78 of the second chip 70 and the second lead terminals 42 to 44 are individually connected by multiple (three in the ninth embodiment) second lead wires WD. This electrically connects the second chip 70 and the second lead terminals 42 to 44 individually. Each of the second lead terminals 42 to 44 is individually connected to the second electrode pads 78 by one second lead wire WD.
  • the second lead wire WD is a bonding wire formed by a wire bonding device.
  • the bonded portion of the second lead wire WD with the second electrode pad 78 is a first bond portion
  • the bonded portion with the second lead terminals 42-44 is a second bond portion.
  • the second lead wire WD is connected to the wire connection portions 42AA-44AA of the second inner lead portions 42A-44A of the second lead terminals 42-44. No security wire is provided in the second bond portion of the second lead wire WD.
  • the multiple third electrode pads 79 of the second chip 70 and the second die pad 50 are connected by a single second die pad wire WE. This electrically connects the second chip 70 and the second die pad 50. Therefore, the third electrode pads 79 of the second chip 70 are at the second ground potential. It can also be said that the third electrode pads 79 are electrically connected to the second lead terminal 41.
  • the wire WE for the second die pad which is connected to the third electrode pad 79, is connected to the end of the second die pad 50 in the Y direction that is closer to the third sealing side surface 95.
  • the wire WE for the second die pad is a bonding wire formed by a wire bonding device.
  • the connection portion of the wire WE for the second die pad with the third electrode pad 79 is a first bond portion
  • the joint portion with the second die pad 50 is a second bond portion.
  • a security bond WE1 is provided on the second bond portion of the wire WE for the second die pad.
  • the material constituting the inter-chip wires WA1 to WA3 is different from the material constituting each of the first lead wire WB, the first die pad wire WC, the second lead wire WD, and the second die pad wire WE.
  • the first lead wire WB, the first die pad wire WC, the second lead wire WD, and the second die pad wire WE are each made of the same material.
  • the inter-chip wires WA1 to WA3 are formed from a material containing gold.
  • the first lead wire WB, the first die pad wire WC, the second lead wire WD, and the second die pad wire WE are each formed from a material containing copper.
  • the first lead wire WB, the first die pad wire WC, the second lead wire WD, and the second die pad wire WE are each configured such that the surface of the copper wire is coated with palladium.
  • the first chip 60 has an insulating transformer region 110, a circuit region 120, and a peripheral guard ring 100 that surrounds the insulating transformer region 110 and the circuit region 120.
  • the circuit region 120 can be defined as the region surrounded by the peripheral guard ring 100 in a plan view other than the insulating transformer region 110.
  • the insulating transformer region 110 is a region that electrically insulates the multiple first functional units of the circuit region 120 from the second chip 70 while allowing the transmission of signals between the multiple first functional units of the circuit region 120 and the second chip 70.
  • the insulating transformer region 110 is formed closer to the second chip side surface 64 than the center of the first chip 60 in the X direction in a plan view. In other words, the insulating transformer region 110 is formed in a region of the first chip 60 that is closer to the second chip 70 in a plan view.
  • the insulating transformer region 110 is formed closer to the third chip side surface 65 of the first chip 60. In other words, the distance between the insulating transformer region 110 and the third chip side surface 65 in the Y direction is smaller than the distance between the insulating transformer region 110 and the fourth chip side surface 66 in the Y direction.
  • a first transformer 321 is formed in the insulating transformer region 110. That is, unlike the first embodiment, the insulating transformer region 110 includes one transformer. As shown in FIG. 47 and FIG. 48, the first transformer 321 includes a first surface side coil 111A and a first back side coil 111B, and a second surface side coil 112A and a second back side coil 112B. Although not shown, the first surface side coil 111A and the second surface side coil 112A are disposed at the same position as each other in the Z direction. The first back side coil 111B and the second back side coil 112B are disposed at the same position as each other in the Z direction.
  • Each of the first surface side coil 111A, the second surface side coil 112A, the first back side coil 111B, and the second back side coil 112B may contain at least one of titanium, titanium nitride, copper, aluminum, and tungsten.
  • the first surface side coil 111A and the second surface side coil 112A each contain copper
  • the first back side coil 111B and the second back side coil 112B each contain aluminum.
  • the first surface side coil 111A and the second surface side coil 112A each have a laminated structure of titanium and copper
  • the first back side coil 111B and the second back side coil 112B each have a laminated structure of titanium nitride and aluminum.
  • the first surface side coil 111A and the second surface side coil 112A are arranged at the same position in the X direction and spaced apart from each other in the Y direction. In the example shown in FIG. 47, the first surface side coil 111A is arranged closer to the third chip side surface 65 than the second surface side coil 112A.
  • the first back side coil 111B and the second back side coil 112B are arranged at the same position in the X direction and spaced apart from each other in the Y direction.
  • the first back side coil 111B is arranged closer to the third chip side surface 65 than the second back side coil 112B.
  • a plurality of first electrode pads 67 are formed in the insulating transformer region 110.
  • the plurality of first electrode pads 67 are arranged at the same positions in the X direction and spaced apart from each other in the Y direction.
  • the plurality of first electrode pads 67 include three first electrode pads 67A to 67C.
  • the first electrode pads 67A to 67C are arranged in the order of first electrode pads 67A, 67B, 67C from the third chip side surface 65 to the fourth chip side surface 66.
  • the first surface side coil 111A includes a first coil portion 111A1 that is spiral-shaped in a plan view, a first outer coil end portion 111A2, and a first inner coil end portion 111A3.
  • the first outer coil end portion 111A2 constitutes the end portion in the winding direction of the outermost periphery of the first coil portion 111A1
  • the first inner coil end portion 111A3 constitutes the end portion in the winding direction of the innermost periphery of the first coil portion 111A1.
  • the second surface side coil 112A includes a second coil portion 112A1 that is spiral-shaped in a plan view, a second outer coil end portion 112A2, and a second inner coil end portion 112A3.
  • the second outer coil end portion 112A2 constitutes the end portion in the winding direction at the outermost periphery of the second coil portion 112A1
  • the second inner coil end portion 112A3 constitutes the end portion in the winding direction at the innermost periphery of the second coil portion 112A1.
  • the first electrode pad 67A is disposed in an inner space including the winding center of the first coil portion 111A1 in a plan view. It can be said that the first electrode pad 67A is located more inward than the first coil portion 111A1.
  • the first electrode pad 67A is connected to the first inner coil end 111A3. Therefore, it can be said that the first electrode pad 67A is electrically connected to the first end of the first surface side coil 111A.
  • the first electrode pad 67B is disposed between the first surface side coil 111A and the second surface side coil 112A in the Y direction in a plan view.
  • the first electrode pad 67B is connected to the first outer coil end 111A2 of the first surface side coil 111A.
  • the first electrode pad 67B is also connected to the second outer coil end 112A2 of the second surface side coil 112A. Therefore, it can be said that the first electrode pad 67B is electrically connected to the second end of the first surface side coil 111A and the second end of the second surface side coil 112A.
  • the first electrode pad 67C is disposed in an inner space including the winding center of the second coil portion 112A1 in a plan view. It can be said that the first electrode pad 67C is located more inward than the second coil portion 112A1.
  • the first electrode pad 67C is connected to the second inner coil end portion 112A3. Therefore, it can be said that the first electrode pad 67C is electrically connected to the first end portion of the second surface side coil 112A.
  • the number of turns of the first surface side coil 111A and the second surface side coil 112A are equal to each other.
  • the winding direction of the first surface side coil 111A and the winding direction of the second surface side coil 112A are opposite to each other.
  • the first back side coil 111B is disposed opposite the first front side coil 111A (see FIG. 47) in the Z direction.
  • the first back side coil 111B includes a first coil portion 111B1 that is spiral in plan view, a first outer coil end portion 111B2, and a first inner coil end portion 111B3.
  • the first outer coil end portion 111B2 constitutes an end portion in the winding direction at the outermost periphery of the first coil portion 111B1
  • the first inner coil end portion 111B3 constitutes an end portion in the winding direction at the innermost periphery of the first coil portion 111B1.
  • the first outer coil end portion 111B2 is electrically connected to a first functional portion of the circuit region 120.
  • the first inner coil end portion 111B3 is electrically connected to a first functional portion of the circuit region 120.
  • the second back side coil 112B is disposed opposite the second front side coil 112A (see FIG. 47) in the Z direction.
  • the second back side coil 112B includes a second coil portion 112B1 that is spiral in plan view, a second outer coil end portion 112B2, and a second inner coil end portion 112B3.
  • the second outer coil end portion 112B2 constitutes the end portion in the winding direction at the outermost periphery of the second coil portion 112B1
  • the second inner coil end portion 112B3 constitutes the end portion in the winding direction at the innermost periphery of the second coil portion 112B1.
  • the second outer coil end portion 112B2 is electrically connected to the first functional portion of the circuit region 120.
  • the second inner coil end portion 112B3 is electrically connected to the first functional portion of the circuit region 120.
  • the number of turns of the first back side coil 111B and the second back side coil 112B are equal to each other.
  • the winding direction of the first back side coil 111B and the winding direction of the second back side coil 112B are opposite to each other.
  • the number of turns of the first back side coil 111B and the second back side coil 112B is equal to the number of turns of the first surface side coil 111A and the second surface side coil 112A.
  • the insulating transformer region 110 is formed with a surface side guard ring 115 that surrounds the first surface side coil 111A, the second surface side coil 112A, and the first electrode pads 67A to 67C in a plan view.
  • the shape of the surface side guard ring 115 in a plan view is a track shape.
  • a back side guard ring 116 is formed in the insulating transformer region 110 to surround the first back side coil 111B and the second back side coil 112B in a plan view.
  • the shape of the back side guard ring 116 in a plan view is a track shape.
  • the shape and size of the back side guard ring 116 are the same as those of the front side guard ring 115.
  • the back side guard ring 116 is formed at a position overlapping the front side guard ring 115.
  • the insulating transformer region 110 has a plurality of vias 117 formed therein that connect the front-side guard ring 115 and the back-side guard ring 116.
  • the vias 117 are arranged in positions that overlap both the front-side guard ring 115 and the back-side guard ring 116 in a plan view.
  • the circuit region 120 is a region in which a plurality of first functional units and a plurality of circuit elements are formed.
  • the plurality of first functional units include a transmission unit 401, an active filter unit 402, and a UVLO unit 403, which will be described later in FIG. 49.
  • the circuit region 120 is provided with a plurality of wiring layers 121.
  • the plurality of wiring layers 121 includes a wiring layer that electrically connects the plurality of functional units, and a wiring layer that electrically connects the plurality of functional units and the first transformer 321 of the insulating transformer region 110.
  • the circuit region 120 is also provided with a plurality of second electrode pads 68 and one third electrode pad 69.
  • the peripheral guard ring 100 includes a front surface side peripheral guard ring 101 and a back surface side peripheral guard ring 102 .
  • the front-side outer periphery guard ring 101 is formed so as to go around the outer periphery of the first chip 60 in a plan view.
  • the front-side outer periphery guard ring 101 has a rectangular shape with four curved rounded corners.
  • the front-side guard ring 115 is connected to the front-side outer periphery guard ring 101. More specifically, a portion of the front-side guard ring 115 closer to the second chip side surface 64 is integrated with the front-side outer periphery guard ring 101. As a result, the front-side guard ring 115 is electrically connected to the front-side outer periphery guard ring 101.
  • the shape and size of the back-side outer peripheral guard ring 102 are the same as those of the front-side outer peripheral guard ring 101 (see FIG. 47).
  • the back-side guard ring 116 is connected to the back-side outer peripheral guard ring 102. More specifically, the portion of the back-side guard ring 116 closer to the second chip side surface 64 is integrated with the back-side outer peripheral guard ring 102. As a result, the back-side guard ring 116 is electrically connected to the back-side outer peripheral guard ring 102.
  • the first chip 60 has multiple peripheral vias that connect the front-side peripheral guard ring 101 and the back-side peripheral guard ring 102.
  • the front-side peripheral guard ring 101 and the back-side peripheral guard ring 102 are electrically connected by the multiple peripheral vias.
  • Each peripheral via extends in the Z direction.
  • the cross-sectional structures of the first surface side coil 111A and the second surface side coil 112A are the same as the cross-sectional structures of the first surface side coil 111A and the second surface side coil 112A in the first embodiment.
  • the cross-sectional structures of the first back side coil 111B and the second back side coil 112B are the same as the cross-sectional structures of the first back side coil 111B and the second back side coil 112B in the first embodiment.
  • the first transformer 321 has the same configuration as the first transformer 321 in the first embodiment.
  • the circuit configuration of the signal transmission device 10 of the ninth embodiment will be described with reference to FIG.
  • the signal transmission device 10 includes a transmitting circuit 400 and a receiving circuit 410.
  • the transmitting circuit 400 is a circuit that transmits a signal input to the signal transmission device 10 to the receiving circuit 410.
  • the receiving circuit 410 is a circuit that receives a signal from the transmitting circuit 400 and outputs an output signal based on the received signal to the outside of the signal transmission device 10.
  • the first chip 60 includes the transmitting circuit 400
  • the second chip 70 includes the receiving circuit 410.
  • the signal transmission device 10 also includes first terminals P1 to P4, which are external terminals electrically connected to the transmitting circuit 400, and second terminals Q1 to Q4, which are external terminals electrically connected to the receiving circuit 410.
  • the first terminal P1 is a power supply terminal (VCC1)
  • the first terminal P2 is a positive input terminal (IN+)
  • the first terminal P3 is a negative input terminal (IN-)
  • the first terminal P4 is a ground terminal (GND1).
  • the first terminal P1 corresponds to the first lead terminal 11
  • the first terminal P2 corresponds to the first lead terminal 12
  • the first terminal P3 corresponds to the first lead terminal 13
  • the first terminal P4 corresponds to the first lead terminal 14.
  • the second terminal Q1 is a negative power supply terminal (VEE2), the second terminal Q2 is a negative output terminal (OUT-), the second terminal Q3 is a positive output terminal (OUT+), and the second terminal Q4 is a positive power supply terminal (VCC2).
  • VEE2 negative power supply terminal
  • the second terminal Q2 is a negative output terminal (OUT-)
  • the second terminal Q3 is a positive output terminal (OUT+)
  • the second terminal Q4 is a positive power supply terminal (VCC2).
  • the second terminal Q1 corresponds to the second lead terminal 41
  • the second terminal Q2 corresponds to the second lead terminal 42
  • the second terminal Q3 corresponds to the second lead terminal 43
  • the second terminal Q4 corresponds to the second lead terminal 44.
  • the transmitting circuit 400 includes, as functional sections, a transmitting section 401, an active filter section 402, a UVLO section 403, input side filters 404 and 406, and resistors 405 and 407.
  • the first terminal P1 is electrically connected to the UVLO unit 403, the first terminal P2 is electrically connected to the input side filter unit 404, and the first terminal P3 is electrically connected to the input side filter unit 406.
  • the active filter unit 402 is electrically connected to the UVLO unit 403 and the input side filter units 404 and 406.
  • the transmitter 401 is electrically connected to the first transformer 321.
  • the transmitter 401 outputs a control signal to the receiver circuit 410 using the first transformer 321 based on a control signal from the active filter unit 402.
  • the signal from the first terminal P2 is input to the active filter unit 402 via the input side filter unit 404, and the signal from the first terminal P3 is input to the active filter unit 402 via the input side filter unit 406.
  • the active filter unit 402 is a circuit for extracting a signal of a specific frequency from the signals input to this circuit.
  • the active filter unit 402 is configured to output the signal of the specific frequency to the transmission unit 401 as a control signal.
  • the UVLO unit 403 stops the operation of the active filter unit 402 when the voltage of the control power supply electrically connected to the first terminal P1 falls below the threshold voltage, thereby preventing malfunction.
  • the input side filter section 404 is configured to remove noise from a signal input from, for example, the first terminal P2 and output the signal to the active filter section 402.
  • a resistor 405 is electrically connected to the conductive path between the first terminal P2 and the input side filter section 404.
  • the resistor 405 is, for example, a pull-down resistor.
  • a first terminal of the resistor 405 is electrically connected to the conductive path, and a second terminal is electrically connected to the first terminal P4.
  • the input side filter section 406 is configured to remove noise from a signal input from, for example, the first terminal P3 and output the signal to the active filter section 402.
  • a resistor 407 is electrically connected to the conductive path between the first terminal P3 and the input side filter section 406.
  • the resistor 407 is, for example, a pull-down resistor.
  • the first terminal of the resistor 407 is electrically connected to the first terminal P1, and the second terminal is electrically connected to the conductive path.
  • the receiving circuit 410 includes functional units, such as a receiving unit 411, a logic unit 412, and a UVLO unit 413, as well as driver circuits 414 and 415, a first output switching element 417, a second output switching element 418, and a resistor 419.
  • functional units such as a receiving unit 411, a logic unit 412, and a UVLO unit 413, as well as driver circuits 414 and 415, a first output switching element 417, a second output switching element 418, and a resistor 419.
  • the second terminal Q1 is electrically connected to the UVLO unit 413, and the second terminals Q2 to Q4 are electrically connected to the logic unit 412.
  • the logic unit 412 is electrically connected to the receiving unit 411 and the UVLO unit 413.
  • the UVLO unit 413 stops the operation of the logic unit 412 when the voltage of the control power supply electrically connected to the second terminal Q1 falls below a threshold voltage, thereby suppressing the occurrence of a malfunction.
  • the receiving unit 411 is electrically connected to the first transformer 321.
  • the receiving unit 411 receives a control signal from the transmitting unit 401 via the first transformer 321, and outputs the received control signal to the logic unit 412.
  • the logic unit 412 is a circuit for generating an output signal to be output by the signal transmission device 10 based on a control signal from the receiving unit 411 .
  • the logic unit 412 is electrically connected to the gate of the first output switching element 417 via the driver circuit 415.
  • a p-channel MOSFET is used as the first output switching element 417.
  • the source of the first output switching element 417 is electrically connected to the second terminal Q4.
  • the drain of the first output switching element 417 is electrically connected to the second terminal Q3.
  • a high-level output signal is generated based on the on/off operation of the first output switching element 417.
  • the logic unit 412 is electrically connected to the gate of the second output switching element 418 via the driver circuit 414.
  • the second output switching element 418 is, for example, an n-channel MOSFET.
  • the drain of the second output switching element 418 is electrically connected to the second terminal Q2, and the source of the second output switching element 418 is electrically connected to the second terminal Q1.
  • the resistor 419 is provided between the drain and gate of the second output switching element 418. A low-level output signal is generated based on the on/off operation of the second output switching element 418.
  • the acute angle formed by two adjacent wires among the inter-chip wires WA1 to WA3 connecting the first chip 60 and the second chip 70 is 10° or less. According to this configuration, when inspecting the wire heights of the inter-chip wires WA1 to WA3, variations in the wire heights of the inter-chip wires WA1 to WA3 are less likely to occur, and therefore the wire heights of the inter-chip wires WA1 to WA3 can be inspected with high accuracy.
  • the signal transmission device 10 of the tenth embodiment will be described with reference to Fig. 50.
  • the signal transmission device 10 of the tenth embodiment differs from the signal transmission device 10 of the tenth embodiment mainly in the configuration of the second frame 10B.
  • the configuration different from the ninth embodiment will be described in detail, and the same reference numerals will be used to designate the same components as the ninth embodiment, and the description thereof will be omitted.
  • the shape of the wire connection portion 44AA of the second lead terminal 44 of the second frame 10B is different from that of the ninth embodiment. More specifically, the corner portion of the tip side of the wire connection portion 44AA that is closer to the second lead terminal 43 includes an inclined surface 44AF.
  • the inclined surface 44AF is inclined away from the second lead terminal 43 side surface of both sides of the wire connection portion 44AA toward the tip surface of the wire connection portion 44AA.
  • the inclined surface 44AF faces the first die pad 30.
  • the inclined surface 44AF can also be said to face the first die pad 30 side.
  • the inclined surface 44AF faces the first chip 60.
  • the inclined surface 44AF can also be said to face the first chip 60 side.
  • One second lead wire WD is connected to the wire connection portion 44AA.
  • the second lead wire WD extends from the first bond portion of the second chip 70 so as to pass through the inclined surface 44AF of the wire connection portion 44AA.
  • the second lead wire WD that has passed through the inclined surface 44AF of the wire connection portion 44AA is joined to the center of the wire connection portion 44AA in the Y direction.
  • the second bond portion of this second lead wire WD is formed at the center position of the wire connection portion 44AA in the Y direction.
  • the second lead wire WD connected to the wire connection portion 44AA is perpendicular to the inclined surface 44AF.
  • the angle between the second lead wire WD connected to the wire connection portion 44AA and the inclined surface 44AF is 85° or more and 95° or less, it can be said that the second lead wire WD connected to the wire connection portion 44AA is perpendicular to the inclined surface 44AF.
  • the inclined surface 44AF corresponds to "the side surface that intersects with the second lead wire WD connected to the wire connection portion 44AA in a plan view.”
  • the relationship between the second lead wire WD connected to the wire connection portion 44AA and the inclined surface 44AF is not limited to being perpendicular.
  • the second lead wire WD connected to the wire connection portion 44AA only needs to extend so as to intersect with the inclined surface 44AF.
  • the signal transmission device 10 of the tenth embodiment the same effect as that of the second embodiment can be obtained.
  • a signal transmission device 10 of an eleventh embodiment will be described with reference to Fig. 51 and Fig. 52.
  • the signal transmission device 10 of the eleventh embodiment differs from the signal transmission device 10 of the ninth embodiment in the configuration of the first frame 10A and the second frame 10B.
  • the configuration different from the ninth embodiment will be described in detail, and the same reference numerals will be used to designate the same components as the ninth embodiment, and the description thereof will be omitted.
  • the first frame 10A of the eleventh embodiment differs from the ninth embodiment in the configuration of the first lead terminals 11-13 among the first lead terminals 11-14. More specifically, the first inner lead portions 11A-13A of the first lead terminals 11-13 are formed with through holes 11AD-13AD that penetrate the first inner lead portions 11A-13A in their thickness direction (Z direction).
  • the shape of the through holes 11AD-13AD in plan view is circular.
  • the diameters of the through holes 11AD-13AD are equal to each other. Note that the shape and size of the through holes 11AD-13AD in plan view can be changed as desired.
  • the through holes 11AD to 13AD are filled with sealing resin 90.
  • the sealing resin 90 filled in the through holes 11AD to 13AD connects the sealing resin 90 provided closer to the sealing surface 91 (see FIG. 43) than the first inner lead portions 11A to 13A with the sealing resin 90 provided closer to the sealing back surface than the first inner lead portions 11A to 13A.
  • the sealing back surface is the surface of the sealing resin 90 facing away from the sealing surface 91.
  • the first lead terminal 14 is integrated with the first die pad 30, and therefore corresponds to the "first connection terminal.”
  • the first lead terminals 11-13 are disposed away from the first die pad 30, and therefore correspond to the "first remote terminals.” Because the through holes 11AD-13AD are formed in the first lead terminals 11-13, it can be said that the first remote terminals have through holes that penetrate in the thickness direction of the first remote terminals. On the other hand, the first connection terminals do not have through holes.
  • the through hole 11AD is formed in a portion of the wire connection portion 11AA of the first inner lead portion 11A that is closer to the lead connection portion 11AB.
  • the first lead wire WB that corresponds to the wire connection portion 11AA is bonded to a portion of the wire connection portion 11AA that is closer to the first die pad 30 than the through hole 11AD.
  • the second bond portion of the first lead wire WB is positioned away from the through hole 11AD in the X direction in a plan view.
  • the through hole 12AD is formed in a portion of the wire connection portion 12AA of the first inner lead portion 12A that is closer to the lead connection portion 12AB.
  • the first lead wire WB that corresponds to the wire connection portion 12AA is bonded to a portion of the wire connection portion 12AA that is closer to the first die pad 30 than the through hole 12AD.
  • the second bond portion of the first lead wire WB is positioned away from the through hole 12AD in the X direction in a plan view.
  • the through hole 13AD is formed in a portion of the wire connection portion 13AA of the first inner lead portion 13A that is closer to the lead connection portion 13AB.
  • the first lead wire WB that corresponds to the wire connection portion 13AA is bonded to a portion of the wire connection portion 13AA that is closer to the first die pad 30 than the through hole 13AD.
  • the second bond portion of the first lead wire WB is positioned away from the through hole 13AD in the X direction in a plan view.
  • the positions at which the through holes 11AD-13AD are formed can be changed as desired.
  • the through holes 11AD-13AD may be formed in the lead connection parts 11AB-13AB.
  • the through holes 11AD-13AD may also be formed across the wire connection parts 11AA-13AA and the lead connection parts 11AB-13AB.
  • the second frame 10B of the eleventh embodiment has a different configuration for the second lead terminals 42-44 among the second lead terminals 41-44. More specifically, the second inner lead portions 42A-44A of the second lead terminals 42-44 have through holes 42AD-44AD formed therein, which penetrate the second inner lead portions 42A-44A in their thickness direction (Z direction).
  • the shape of the through holes 42AD-44AD in plan view is circular.
  • the diameters of the through holes 42AD-44AD are equal to each other.
  • the diameters of the through holes 42AD-44AD are equal to the diameters of the through holes 11AD-13AD.
  • the shape and size of the through holes 42AD-44AD in plan view can be changed as desired.
  • the through holes 42AD to 44AD are filled with sealing resin 90.
  • the sealing resin 90 filled in the through holes 42AD to 44AD connects the sealing resin 90 provided closer to the sealing surface 91 (see FIG. 43) than the second inner lead portions 42A to 44A with the sealing resin 90 provided closer to the sealing back surface than the second inner lead portions 42A to 44A.
  • the second lead terminal 41 is integrated with the second die pad 50, and therefore corresponds to the "second connection terminal.”
  • the second lead terminals 42-44 are disposed away from the second die pad 50, and therefore correspond to the "second remote terminals.” Because the through holes 42AD-44AD are formed in the second lead terminals 42-44, it can be said that the second remote terminals have through holes that penetrate in the thickness direction of the second remote terminal. On the other hand, the second connection terminal does not have a through hole.
  • the through hole 42AD is formed in a portion of the wire connection portion 42AA of the second inner lead portion 42A that is closer to the lead connection portion 42AB.
  • the second lead wire WD that corresponds to the wire connection portion 42AA is bonded to a portion of the wire connection portion 42AA that is closer to the second die pad 50 than the through hole 42AD.
  • the second bond portion of the second lead wire WD is disposed away from the through hole 42AD in the X direction in a plan view.
  • the through hole 43AD is formed in a portion of the wire connection portion 43AA of the second inner lead portion 43A that is closer to the lead connection portion 43AB.
  • the second lead wire WD that corresponds to the wire connection portion 43AA is bonded to a portion of the wire connection portion 43AA that is closer to the second die pad 50 than the through hole 43AD.
  • the second bond portion of the second lead wire WD is positioned away from the through hole 43AD in the X direction in a plan view.
  • the through hole 44AD is formed in a portion of the wire connection portion 44AA of the second inner lead portion 44A that is closer to the lead connection portion 44AB.
  • the second lead wire WD that corresponds to the wire connection portion 44AA is bonded to a portion of the wire connection portion 44AA that is closer to the second die pad 50 than the through hole 44AD.
  • the second bond portion of the second lead wire WD is disposed spaced apart from the through hole 44AD in the X direction in a plan view.
  • the signal transmission device 10 of the eleventh embodiment provides the same effects as the third embodiment.
  • the positions at which the through holes 42AD-44AD are formed can be changed as desired.
  • the through holes 42AD-44AD may be formed in the lead connection parts 42AB-44AB.
  • the through holes 42AD-44AD may also be formed across the wire connection parts 42AA-44AA and the lead connection parts 42AB-44AB.
  • a signal transmission device 10 of the 12th embodiment will be described with reference to Figures 53 and 54.
  • the signal transmission device 10 of the 12th embodiment is different from the signal transmission device 10 of the 11th embodiment in the configuration of the first frame 10A and the second frame 10B and the configuration of the wires.
  • the configuration different from the 11th embodiment will be described in detail, and the same reference numerals will be used to designate the same components as the 11th embodiment, and the description thereof will be omitted.
  • the first frame 10A of the 12th embodiment has a different configuration for the first lead terminal 11 among the first lead terminals 11 to 14. More specifically, the through hole 11AD (see FIG. 51) is omitted from the first inner lead portion 11A of the first lead terminal 11.
  • the first frame 10A includes two types of first lead terminals among the first lead terminals 11 to 14: first lead terminals having a through hole (first lead terminals 12, 13 in the 12th embodiment) and first lead terminals not having a through hole (first lead terminals 11, 14 in the 12th embodiment).
  • the first frame 10A includes two types of first lead terminals: a first specific terminal (first lead terminals 12, 13 in the 12th embodiment) with a through hole formed in the first inner lead portions 11A-13A of the first lead terminals 11-13, and a second specific terminal (first lead terminal 11 in the 12th embodiment) without a through hole formed therein.
  • the configuration of the second bond portion of the first lead wire WB differs depending on the first specific terminal and the second specific terminal. More specifically, a security bond WB1 is formed on the second bond portion of the first lead wire WB connected to the wire connection portion 11AA of the first inner lead portion 11A of the first lead terminal 11 serving as the second specific terminal. On the other hand, no security bond WB1 is formed on the second bond portion of the first lead wire WB connected to the wire connection portions 12AA, 13AA of the first inner lead portions 12A, 13A of the first lead terminals 12, 13 serving as the first specific terminals.
  • the multiple first lead wires WB include a first specific wire joined to a first specific terminal (first lead terminals 12, 13 in the twelfth embodiment) and a second specific wire joined to a second specific terminal (first lead terminal 11 in the twelfth embodiment).
  • a security bond is formed at the joint (second bond portion) of the second specific wire joined to the second specific terminal.
  • the second frame 10B of the 12th embodiment has a different configuration for the second lead terminal 44 among the second lead terminals 41 to 44. More specifically, the through hole 44AD (see FIG. 52) is omitted from the second inner lead portion 44A of the second lead terminal 44.
  • the second frame 10B includes two types of second lead terminals: second lead terminals having a through hole (second lead terminals 42, 43 in the 12th embodiment) among the second lead terminals 41 to 44, and second lead terminals not having a through hole (second lead terminals 41, 44 in the 12th embodiment).
  • the second frame 10B includes two types of second lead terminals: a third specific terminal (second lead terminals 42, 43 in the 12th embodiment) in which a through hole is formed among the second inner lead portions 42A-44A of the second lead terminals 42-44, and a fourth specific terminal (second lead terminal 44 in the 12th embodiment) in which a through hole is not formed.
  • the configuration of the second bond portion of the second lead wire WD differs depending on the third specific terminal and the fourth specific terminal. More specifically, a security bond WD1 is formed in the second bond portion of the second lead wire WD connected to the wire connection portion 44AA of the second inner lead portion 44A of the second lead terminal 44 serving as the fourth specific terminal. On the other hand, a security bond WD1 is not formed in the second bond portion of the second lead wire WD connected to the wire connection portions 42AA, 43AA of the second inner lead portions 42A, 43A of the second lead terminals 42, 43 serving as the third specific terminal.
  • the configurations of the security bonds WB1, WD1 are the same as those of the security bonds WB1, WD1 in the fourth embodiment.
  • the multiple second lead wires WD include a third specific wire joined to the third specific terminal (second lead terminals 42, 43 in the twelfth embodiment) and a fourth specific wire joined to the fourth specific terminal (second lead terminal 44 in the twelfth embodiment).
  • a security bond is formed at the joint (second bond portion) of the fourth specific wire joined to the fourth specific terminal.
  • the signal transmission device 10 of the twelfth embodiment provides the same effect as the fourth embodiment.
  • a signal transmission device 10 of the thirteenth embodiment will be described with reference to Fig. 55.
  • the signal transmission device 10 of the thirteenth embodiment differs from the signal transmission device 10 of the ninth embodiment in the configuration of the first frame 10A and the second frame 10B.
  • the configuration different from the ninth embodiment will be described in detail, and the same reference numerals will be used to designate the same components as the ninth embodiment, and the description thereof will be omitted.
  • the signal transmission device 10 of the thirteenth embodiment is different from the signal transmission device 10 of the ninth embodiment in the shape of the first die pad 30 of the first frame 10A and the shape of the second die pad 50 of the second frame 10B.
  • the first die pad 30 includes a first tip side curved surface 35A and a second tip side curved surface 36A instead of the first tip side inclined portion 35 and the second tip side inclined portion 36 (both see FIG. 44).
  • the second die pad 50 includes a third tip side curved surface 55A and a fourth tip side curved surface 56A instead of the third tip side inclined portion 55 and the fourth tip side inclined portion 56.
  • the first tip side curved surface 35A has a shape in which the corner portion between the first tip surface 31 and the first side surface 33 is chamfered.
  • the arc length of the first tip side curved surface 35A is longer than the arc length of the first base end side curved surface 37A.
  • the arc length of the first tip side curved surface 35A is longer than the arc length of the first recess side curved surface 38A.
  • the radius of curvature of the first tip side curved surface 35A is larger than the radius of curvature of the first base end side curved surface 37A.
  • the radius of curvature of the first tip side curved surface 35A is larger than the radius of curvature of the first recess side curved surface 38A.
  • the arc length of the first distal curved surface 35A is at least twice the arc length of the first proximal curved surface 37A. In one example, the arc length of the first distal curved surface 35A is at least five times the arc length of the first proximal curved surface 37A. In one example, the arc length of the first distal curved surface 35A is at most ten times the arc length of the first proximal curved surface 37A.
  • the arc length of the first tip side curved surface 35A is at least twice the arc length of the first recess side curved surface 38A. In one example, the arc length of the first tip side curved surface 35A is at least five times the arc length of the first recess side curved surface 38A. In one example, the arc length of the first tip side curved surface 35A is no more than ten times the arc length of the first recess side curved surface 38A.
  • the second tip side curved surface 36A has a shape in which the corner portion between the first tip surface 31 and the second side surface 34 is chamfered.
  • the arc length of the second tip side curved surface 36A is longer than the arc length of the second base end side curved surface 37B.
  • the arc length of the second tip side curved surface 36A is longer than the arc length of the second recess side curved surface 38B.
  • the radius of curvature of the second tip side curved surface 36A is larger than the radius of curvature of the second base end side curved surface 37B.
  • the radius of curvature of the second tip side curved surface 36A is larger than the radius of curvature of the second recess side curved surface 38B.
  • the arc length of the second distal curved surface 36A is at least twice the arc length of the second proximal curved surface 37B. In one example, the arc length of the second distal curved surface 36A is at least five times the arc length of the second proximal curved surface 37B. In one example, the arc length of the second distal curved surface 36A is no more than ten times the arc length of the second proximal curved surface 37B.
  • the arc length of the second tip side curved surface 36A is at least twice the arc length of the second recess side curved surface 38B. In one example, the arc length of the second tip side curved surface 36A is at least five times the arc length of the second recess side curved surface 38B. In one example, the arc length of the second tip side curved surface 36A is no more than ten times the arc length of the second recess side curved surface 38B.
  • the arc length of the second distal curved surface 36A is equal to the arc length of the first distal curved surface 35A.
  • the difference between the arc length of the second distal curved surface 36A and the arc length of the first distal curved surface 35A is, for example, 10% or less of the arc length of the second distal curved surface 36A, then the arc length of the second distal curved surface 36A is equal to the arc length of the first distal curved surface 35A.
  • the third tip side curved surface 55A has a shape in which the corner portion between the second tip surface 51 and the third side surface 53 is chamfered.
  • the arc length of the third tip side curved surface 55A is longer than the arc length of the third base end side curved surface 57A.
  • the arc length of the third tip side curved surface 55A is longer than the arc length of the third recess side curved surface 58A.
  • the radius of curvature of the third tip side curved surface 55A is larger than the radius of curvature of the third base end side curved surface 57A.
  • the radius of curvature of the third tip side curved surface 55A is larger than the radius of curvature of the third recess side curved surface 58A.
  • the arc length of the third distal curved surface 55A is at least twice the arc length of the third proximal curved surface 57A. In one example, the arc length of the third distal curved surface 55A is at least five times the arc length of the third proximal curved surface 57A. In one example, the arc length of the third distal curved surface 55A is no more than ten times the arc length of the third proximal curved surface 57A.
  • the arc length of the third tip side curved surface 55A is at least twice the arc length of the third recess side curved surface 58A. In one example, the arc length of the third tip side curved surface 55A is at least five times the arc length of the third recess side curved surface 58A. In one example, the arc length of the third tip side curved surface 55A is no more than ten times the arc length of the third recess side curved surface 58A.
  • the arc length of the third tip side curved surface 55A is equal to the arc length of the first tip side curved surface 35A of the first die pad 30.
  • the difference between the arc length of the third tip side curved surface 55A and the arc length of the first tip side curved surface 35A is, for example, 10% or less of the arc length of the third tip side curved surface 55A, then the arc length of the third tip side curved surface 55A is equal to the arc length of the first tip side curved surface 35A.
  • the fourth tip side curved surface 56A has a shape in which the corner portion between the second tip surface 51 and the fourth side surface 54 is chamfered.
  • the arc length of the fourth tip side curved surface 56A is longer than the arc length of the fourth base end side curved surface 57B.
  • the arc length of the fourth tip side curved surface 56A is longer than the arc length of the fourth recess side curved surface 58B.
  • the radius of curvature of the fourth tip side curved surface 56A is larger than the radius of curvature of the fourth base end side curved surface 57B.
  • the radius of curvature of the fourth tip side curved surface 56A is larger than the radius of curvature of the fourth recess side curved surface 58B.
  • the arc length of the fourth distal curved surface 56A is at least twice the arc length of the fourth proximal curved surface 57B. In one example, the arc length of the fourth distal curved surface 56A is at least five times the arc length of the fourth proximal curved surface 57B. In one example, the arc length of the fourth distal curved surface 56A is no more than ten times the arc length of the fourth proximal curved surface 57B.
  • the arc length of the fourth tip side curved surface 56A is at least twice the arc length of the fourth recess side curved surface 58B. In one example, the arc length of the fourth tip side curved surface 56A is at least five times the arc length of the fourth recess side curved surface 58B. In one example, the arc length of the fourth tip side curved surface 56A is no more than ten times the arc length of the fourth recess side curved surface 58B.
  • the arc length of the fourth tip curved surface 56A is equal to the arc length of the second tip curved surface 36A.
  • the difference between the arc length of the fourth tip curved surface 56A and the arc length of the second tip curved surface 36A is, for example, 10% or less of the arc length of the fourth tip curved surface 56A, then the arc length of the fourth tip curved surface 56A is equal to the arc length of the second tip curved surface 36A.
  • the arc length of the fourth tip side curved surface 56A is equal to the arc length of the third tip side curved surface 55A.
  • the difference between the arc length of the fourth tip side curved surface 56A and the arc length of the third tip side curved surface 55A is, for example, 10% or less of the arc length of the fourth tip side curved surface 56A, then the arc length of the fourth tip side curved surface 56A is equal to the arc length of the third tip side curved surface 55A.
  • the arc length of the first distal curved surface 35A in plan view can be changed as desired within a range longer than the arc length of the first proximal curved surface 37A in plan view.
  • the arc length of the first distal curved surface 35A in plan view may be equal to the arc length of the first recessed curved surface 38A in plan view, or may be shorter than the arc length of the first recessed curved surface 38A in plan view.
  • the arc length of the second distal curved surface 36A in plan view can be changed as desired within a range longer than the arc length of the second proximal curved surface 37B in plan view.
  • the arc length of the second distal curved surface 36A in plan view may be equal to the arc length of the second recessed curved surface 38B in plan view, or may be shorter than the arc length of the second recessed curved surface 38B in plan view.
  • the arc length of the third tip side curved surface 55A in plan view can be changed as desired within a range longer than the arc length of the third base side curved surface 57A in plan view.
  • the arc length of the third tip side curved surface 55A in plan view may be equal to the arc length of the third recess side curved surface 58A in plan view, or may be shorter than the arc length of the third recess side curved surface 58A in plan view.
  • the arc length of the fourth tip side curved surface 56A in plan view can be changed as desired within a range longer than the arc length of the fourth base side curved surface 57B in plan view.
  • the arc length of the fourth tip side curved surface 56A in plan view may be equal to the arc length of the fourth recess side curved surface 58B in plan view, or may be shorter than the arc length of the fourth recess side curved surface 58B in plan view.
  • the arc length of each of the first tip curved surface 35A and the second tip curved surface 36A in a plan view may be different from the arc length of each of the third tip curved surface 55A and the fourth tip curved surface 56A in a plan view.
  • the arc length of each of the first tip curved surface 35A and the second tip curved surface 36A in a plan view may be shorter or longer than the arc length of each of the third tip curved surface 55A and the fourth tip curved surface 56A in a plan view. Note that the signal transmission device 10 of the thirteenth embodiment provides the same effect as the signal transmission device 10 of the fifth embodiment.
  • a signal transmission device 10 of the 14th embodiment will be described with reference to Fig. 56.
  • the signal transmission device 10 of the 6th embodiment is different from the signal transmission device 10 of the 13th embodiment in the configuration of the first frame 10A and the second frame 10B.
  • the configuration different from the 13th embodiment will be described in detail, and the same reference numerals will be used to designate the same components as the 13th embodiment, and the description thereof will be omitted.
  • the signal transmission device 10 of the 14th embodiment is different from the signal transmission device 10 of the 13th embodiment in the shape of the first die pad 30 of the first frame 10A and the shape of the second die pad 50 of the second frame 10B. More specifically, the first die pad 30 includes a first tip side inclined portion 35, a second tip side inclined portion 36, a first tip side curved surface 35B, and a second tip side curved surface 36B instead of the first tip side curved surface 35A and the second tip side curved surface 36A (see FIG. 55).
  • the second die pad 50 includes a third tip side inclined portion 55, a fourth tip side inclined portion 56, a third tip side curved surface 55B, and a fourth tip side curved surface 56B instead of the third tip side curved surface 55A and the fourth tip side curved surface 56A.
  • the first tip side curved surface 35B has a shape in which the corner portion between the first tip side surface 31 and the first tip side inclined portion 35 is rounded.
  • the arc length of the first tip side curved surface 35B is longer than the arc length of the first base side curved surface 37A (see FIG. 55).
  • the arc length of the first tip side curved surface 35B is longer than the arc length of the first recess side curved surface 38A (see FIG. 55).
  • the arc length of the first tip side curved surface 35B in a plan view is more than twice the arc length of the first base side curved surface 37A in a plan view.
  • the second tip side curved surface 36B has a shape in which the corner portion between the first tip side surface 31 and the second tip side inclined portion 36 is rounded.
  • the arc length of the second tip side curved surface 36B is longer than the arc length of the second base side curved surface 37B (see FIG. 55).
  • the arc length of the second tip side curved surface 36B is longer than the arc length of the second recess side curved surface 38B (see FIG. 55).
  • the arc length of the second tip side curved surface 36B in a plan view is more than twice the arc length of the second base side curved surface 37B in a plan view.
  • the arc length of the second distal curved surface 36B in a plan view is equal to the arc length of the first distal curved surface 35B in a plan view.
  • the difference between the arc length of the second distal curved surface 36B in a plan view and the arc length of the first distal curved surface 35B in a plan view is, for example, within 10% of the arc length of the second distal curved surface 36B in a plan view, it can be said that the arc length of the second distal curved surface 36B in a plan view is equal to the arc length of the first distal curved surface 35B in a plan view.
  • the third tip side curved surface 55B has a shape in which the corner portion between the second tip side surface 51 and the third tip side inclined portion 55 is rounded.
  • the arc length of the third tip side curved surface 55B is longer than the arc length of the third base side curved surface 57A (see FIG. 55).
  • the arc length of the third tip side curved surface 55B is longer than the arc length of the third recess side curved surface 58A (see FIG. 55).
  • the arc length of the third tip side curved surface 55B in a plan view is more than twice the arc length of the third base side curved surface 57A in a plan view.
  • the fourth tip side curved surface 56B has a shape in which the corner portion between the second tip surface 51 and the fourth tip side inclined portion 56 is rounded.
  • the arc length of the fourth tip side curved surface 56B is longer than the arc length of the fourth base side curved surface 57B (see FIG. 55).
  • the arc length of the fourth tip side curved surface 56B is longer than the arc length of the fourth recess side curved surface 58B (see FIG. 55).
  • the arc length of the fourth tip side curved surface 56B in a plan view is more than twice the arc length of the fourth base side curved surface 57B in a plan view.
  • the arc length of the fourth tip curved surface 56B in a plan view is equal to the arc length of the third tip curved surface 55B in a plan view.
  • the difference between the arc length of the fourth tip curved surface 56B in a plan view and the arc length of the third tip curved surface 55B in a plan view is, for example, within 10% of the arc length of the fourth tip curved surface 56B in a plan view, it can be said that the arc length of the fourth tip curved surface 56B in a plan view is equal to the arc length of the third tip curved surface 55B in a plan view.
  • the arc length of the first tip side curved surface 35B in plan view can be changed as desired within a range longer than the arc length of the first base side curved surface 37A in plan view.
  • the arc length of the first tip side curved surface 35B in plan view may be equal to the arc length of the first recess side curved surface 38A in plan view, or may be shorter than the arc length of the first recess side curved surface 38A in plan view.
  • the arc length of the second distal curved surface 36B in plan view can be changed as desired within a range longer than the arc length of the second proximal curved surface 37B in plan view.
  • the arc length of the second distal curved surface 36B in plan view may be equal to the arc length of the second recessed curved surface 38B in plan view, or may be shorter than the arc length of the second recessed curved surface 38B in plan view.
  • the arc length of the third tip side curved surface 55B in plan view can be changed as desired within a range longer than the arc length of the third base side curved surface 57A in plan view.
  • the arc length of the third tip side curved surface 55B in plan view may be equal to the arc length of the third recess side curved surface 58A in plan view, or may be shorter than the arc length of the third recess side curved surface 58A in plan view.
  • the arc length of the fourth tip side curved surface 56B in a plan view can be changed as desired within a range longer than the arc length of the fourth base side curved surface 57B in a plan view.
  • the arc length of the fourth tip side curved surface 56B in a plan view may be equal to the arc length of the fourth recess side curved surface 58B in a plan view, or may be shorter than the arc length of the fourth recess side curved surface 58B in a plan view.
  • the arc length of each of the first tip curved surface 35B and the second tip curved surface 36B in a plan view may be different from the arc length of each of the third tip curved surface 55B and the fourth tip curved surface 56B in a plan view.
  • the arc length of each of the first tip curved surface 35B and the second tip curved surface 36B in a plan view may be shorter or longer than the arc length of each of the third tip curved surface 55B and the fourth tip curved surface 56B in a plan view. Note that the signal transmission device 10 of the fourteenth embodiment provides the same effect as the signal transmission device 10 of the sixth embodiment.
  • a signal transmission device 10 of the fifteenth embodiment will be described with reference to Fig. 57.
  • the signal transmission device 10 of the fifteenth embodiment differs from the signal transmission device 10 of the ninth embodiment in that the conductive members 10D and 10E are omitted.
  • the configuration different from the ninth embodiment will be described in detail, and the components common to the ninth embodiment will be denoted by the same reference numerals and their description will be omitted.
  • the signal transmission device 10 does not include conductive members 10D and 10E. Therefore, conductive member 10D is not exposed from the third sealing side 95 of the sealing resin 90. Furthermore, conductive member 10E is not exposed from the fourth sealing side 96 of the sealing resin 90. In this way, both the third sealing side 95 and the fourth sealing side 96 are made only of the resin material that makes up the sealing resin 90.
  • the recess 95D is omitted from the third sealing side surface 95
  • the recess 96D is omitted from the fourth sealing side surface 96. That is, the portion of the third sealing side surface 95 between the third front side surface 95A and the third back side surface 95B forms a flat surface along the XZ plane over the entire X direction.
  • the portion of the fourth sealing side surface 96 between the fourth front side surface 96A and the fourth back side surface 96B forms a flat surface along the XZ plane over the entire X direction.
  • the signal transmission device 10 of the fifteenth embodiment provides the same effect as the signal transmission device 10 of the eighth embodiment.
  • a signal transmission device 10 of the sixteenth embodiment will be described with reference to Figures 58 to 63.
  • the signal transmission device 10 of the sixteenth embodiment differs from the signal transmission device 10 of the ninth embodiment mainly in the configuration of the first chip 60 and the arrangement of the second chip 70.
  • configurations different from the ninth embodiment will be described in detail, and components common to the ninth embodiment will be denoted by the same reference numerals and descriptions thereof will be omitted.
  • the first frame 10A of the 16th embodiment includes four first lead terminals 11 to 14.
  • the first lead terminals 11 to 14 are arranged at a distance from each other in the Y direction.
  • the first lead terminals 11 to 14 are arranged in the order of first lead terminals 11, 12, 13, 14 from the fourth sealing side surface 96 toward the third sealing side surface 95.
  • the first lead terminal 14 is connected to the first die pad 30.
  • the first lead terminal 14 is integrated with the first die pad 30.
  • the first lead terminals 11 to 13 are arranged closer to the first sealing side surface 93 and spaced apart from the first die pad 30.
  • the first die pad 30 When viewed from the X direction, the first die pad 30 has a size in the Y direction such that it overlaps with all of the first lead terminals 11 to 14.
  • the size in the Y direction of the first die pad 30 is greater than the distance in the Y direction between the edge of the first lead terminal 11 on the fourth sealing side surface 96 side and the edge of the first lead terminal 14 on the third sealing side surface 95 side.
  • the shape of the first die pad 30 in the sixteenth embodiment is the same as the shape of the first die pad 30 in the ninth embodiment, and therefore a detailed description thereof will be omitted.
  • the first chip 60 mounted on the first die pad 30 is formed in a flat plate shape.
  • the shape of the first chip 60 in a plan view is a rectangle having a long side and a short side.
  • the area of the first chip 60 in a plan view is smaller than the area of the second chip 70 in a plan view.
  • the first chip 60 is mounted on the first die pad 30 by a first conductive bonding material SD1. More specifically, the first chip 60 is die-bonded to the first die pad 30.
  • the first chip 60 is arranged so that the first direction intersecting both the X direction and the Y direction in a plan view is the longitudinal direction, and the second direction perpendicular to the first direction in a plan view is the short direction. In other words, the first chip 60 is arranged at an angle.
  • the first direction is a direction that inclines from the fourth sealing side 96 to the third sealing side 95 as it moves from the first sealing side 93 to the second sealing side 94.
  • the second direction is a direction that inclines from the third sealing side 95 to the fourth sealing side 96 as it moves from the first sealing side 93 to the second sealing side 94.
  • the acute angle formed by the first direction and the X direction is 45°
  • the acute angle formed by the second direction and the X direction is 45°
  • the short side of the first chip 60 inclines from the third sealing side 95 to the fourth sealing side 96 as it moves from the first sealing side 93 to the second sealing side 94 at an angle of 45° with respect to the X direction.
  • the long side of the first chip 60 is inclined at an angle of 45° with respect to the X direction from the fourth sealing side 96 to the third sealing side 95 as it moves from the first sealing side 93 to the second sealing side 94.
  • the first chip 60 is disposed at a position on the first die pad 30 closer to the second die pad 50 in the X direction.
  • the shortest distance in the X direction between the first chip 60 and the first tip surface 31 of the first die pad 30 is smaller than the shortest distance in the X direction between the first chip 60 and the bottom surface 32AB of the recess 32A in the first die pad 30.
  • the first chip 60 is disposed in a position closer to the third sealing side surface 95 of the first die pad 30 in the Y direction. That is, in a plan view, the shortest distance between the first chip 60 and the first side surface 33 of the first die pad 30 is smaller than the shortest distance between the first chip 60 and the second side surface 34 of the first die pad 30.
  • the first chip 60 is disposed in a position overlapping with the first lead terminal 13.
  • the first chip 60 can also be said to be disposed closer to the third sealing side surface 95 than the first lead terminal 12.
  • the first chip 60 can also be said to be disposed closer to the fourth sealing side surface 96 than the first lead terminal 14.
  • the second frame 10B of the sixteenth embodiment includes four second lead terminals 41 to 44.
  • the second lead terminals 41 to 44 are arranged at a distance from each other in the Y direction.
  • the second lead terminals 41 to 44 are arranged in the order of the second lead terminals 41, 42, 43, 44 from the third sealing side surface 95 to the fourth sealing side surface 96.
  • the second lead terminal 41 is connected to the second die pad 50.
  • the second lead terminal 41 is integrated with the second die pad 50.
  • the second lead terminals 41 to 43 are arranged closer to the second sealing side surface 94 and spaced apart from the second die pad 50.
  • the second die pad 50 When viewed from the X direction, the second die pad 50 has a size in the Y direction such that it overlaps with all of the second lead terminals 41 to 44.
  • the size in the Y direction of the second die pad 50 is greater than the distance in the Y direction between the edge of the second lead terminal 41 on the third sealing side surface 95 side and the edge of the second lead terminal 44 on the fourth sealing side surface 96 side.
  • the shape of the second die pad 50 in the sixteenth embodiment is the same as the shape of the second die pad 50 in the ninth embodiment, and therefore a detailed description thereof will be omitted.
  • the second chip 70 mounted on the second die pad 50 is formed in a flat plate shape.
  • the shape of the second chip 70 in a planar view is rectangular.
  • the shape of the second chip 70 in a planar view is rectangular with the X direction as the long side and the Y direction as the short side.
  • the second chip 70 is mounted on the second die pad 50 by the second conductive bonding material SD2. More specifically, the second chip 70 is die-bonded to the second die pad 50.
  • the second chip 70 is disposed in a position closer to the second sealing side surface 94 in the X direction of the second die pad 50.
  • the distance in the X direction between the second chip 70 and the second tip surface 51 of the second die pad 50 is greater than the distance in the X direction between the second chip 70 and the bottom surface 52AB of the recess 52A in the second die pad 50.
  • the second chip 70 may be disposed in the center of the second die pad 50 in the X direction.
  • the second chip 70 is disposed in a position closer to the fourth sealing side surface 96 of the second die pad 50 in the Y direction. That is, in a plan view, the distance between the second chip 70 and the third side surface 53 of the second die pad 50 is greater than the distance between the second chip 70 and the fourth side surface 54 of the second die pad 50.
  • the second chip 70 is disposed in a position overlapping with the second lead terminal 42.
  • the second chip 70 can also be said to be disposed closer to the third sealing side surface 95 than the second lead terminal 44.
  • the second chip 70 can also be said to be disposed closer to the fourth sealing side surface 96 than the second lead terminal 41.
  • the second chip 70 is disposed in a position that partially overlaps with the first chip 60 when viewed from the X direction.
  • the second chip 70 is disposed offset toward the fourth sealing side surface 96 relative to the first chip 60 when viewed from the X direction.
  • the first chip 60 is disposed offset toward the third sealing side surface 95 relative to the second chip 70 when viewed from the X direction.
  • each of the first lead terminals 11 to 14 is the same as the configuration of the first lead terminals 11 to 14 in the ninth embodiment. Therefore, the following describes the general configuration of the first lead terminals 11 to 14.
  • the first lead terminals 11 to 14 include first inner lead portions 11A to 14A provided in a sealing resin 90 and first outer lead portions 11B to 14B.
  • the first inner lead portion 11A includes a wire connection portion 11AA, and a lead connection portion 11AB extending from the wire connection portion 11AA toward the first sealing side surface 93.
  • the lead connection portion 11AB is connected to the first outer lead portion 11B.
  • the first inner lead portion 11A includes a wire connection portion 11AA and a lead connection portion 11AB that extends from the wire connection portion 11AA toward the first sealing side surface 93.
  • the lead connection portion 11AB is connected to the first outer lead portion 11B.
  • the corner portion of the tip of the wire connection portion 11AA that is closer to the hanging lead portion 32D includes a curved surface 11AE.
  • the first inner lead portion 12A includes a wire connection portion 12AA and a lead connection portion 12AB extending from the wire connection portion 12AA toward the first sealing side surface 93.
  • the lead connection portion 12AB is connected to the first outer lead portion 12B.
  • the corner portion of the tip of the wire connection portion 12AA that is closer to the wire connection portion 11AA includes a curved surface 12AE.
  • the first inner lead portion 13A includes a wire connection portion 13AA and a lead connection portion 13AB that extends from the wire connection portion 13AA toward the first sealing side surface 93.
  • the lead connection portion 13AB is connected to the first outer lead portion 13B.
  • the corner portion of the tip of the wire connection portion 13AA that is closer to the first inner lead portion 14A includes a curved surface 13AE.
  • the first inner lead portion 14A is connected to the first base end surface 32 of the first die pad 30. More specifically, the first inner lead portion 14A is connected to the protruding portion 32B of the first die pad 30.
  • each of the second lead terminals 41 to 44 is the same as the configuration of the second lead terminals 41 to 44 in the ninth embodiment. Therefore, the general configuration of the second lead terminals 41 to 44 will be described below.
  • the second lead terminals 41-44 include second inner lead portions 41A-44A and second outer lead portions 41B-44B that are provided within the sealing resin 90.
  • the configuration of the second inner lead portions 41A-44A is described below.
  • the second inner lead portion 41A is connected to the second base end surface 52 of the second die pad 50. More specifically, the second inner lead portion 41A is connected to the protruding portion 52C of the second die pad 50.
  • the second inner lead portion 42A includes a wire connection portion 42AA and a lead connection portion 42AB extending from the wire connection portion 42AA toward the second sealing side surface 94.
  • the lead connection portion 42AB is connected to the second outer lead portion 42B.
  • a corner portion of the wire connection portion 42AA near the bottom surface 52AB of the recess 52A and near the second inner lead portion 43A includes a curved surface 42AE.
  • the second inner lead portion 43A includes a wire connection portion 43AA and a lead connection portion 43AB extending from the wire connection portion 43AA toward the second sealing side surface 94.
  • the lead connection portion 43AB is connected to the second outer lead portion 43B.
  • a corner portion of the wire connection portion 43AA near the bottom surface 52AB of the recess 52A and near the second inner lead portion 44A includes a curved surface 43AE.
  • the second inner lead portion 44A includes a wire connection portion 44AA and a lead connection portion 44AB extending from the wire connection portion 44AA toward the second sealing side surface 94.
  • the lead connection portion 44AB is connected to the second outer lead portion 44B.
  • the corner portion of the wire connection portion 44AA near the bottom surface 52AB of the recess 52A and near the hanging lead portion 52D includes a curved surface 44AE.
  • the first chip 60 has a plurality of first electrode pads 67 (two in the sixteenth embodiment), a plurality of second electrode pads 68 (three in the sixteenth embodiment), and one third electrode pad 69.
  • Each of the first electrode pads 67, each of the second electrode pads 68, and the third electrode pad 69 are provided so as to be exposed from the chip surface 61.
  • Each of the first electrode pads 67, second electrode pads 68, and third electrode pads 69 may include at least one of titanium, titanium nitride, copper, aluminum, and tungsten.
  • each of the first electrode pads 67, second electrode pads 68, and third electrode pads 69 has a laminated structure of titanium and copper. Note that the material constituting one or two types of electrode pads among each of the first electrode pads 67, second electrode pads 68, and third electrode pads 69 may be different from the material constituting the remaining types of electrode pads.
  • the multiple first electrode pads 67 are provided at a position closer to the second chip side surface 64 than the center of the short side of the chip surface 61 in a planar view.
  • the multiple first electrode pads 67 are provided at a position closer to the third chip side surface 65 than the center of the long side of the chip surface 61 in a planar view.
  • the second electrode pads 68 are located closer to the fourth chip side surface 66 than the center of the chip surface 61 in the X direction in a plan view.
  • the second electrode pads 68 are located at the same positions as one another in the longitudinal direction of the chip surface 61 in a plan view, and are arranged spaced apart from one another in the lateral direction of the chip surface 61.
  • the third electrode pad 69 is provided closer to the first chip side surface 63 than the center of the short side of the chip surface 61 in a plan view.
  • the third electrode pad 69 is provided in the center of the long side of the chip surface 61 in a plan view.
  • the second chip 70 has a plurality of first electrode pads 77 (two in the sixteenth embodiment), a plurality of second electrode pads 78 (three in the sixteenth embodiment), and one third electrode pad 79.
  • Each of the first electrode pads 77, each of the second electrode pads 78, and the third electrode pad 79 are provided so as to be exposed from the chip surface 71.
  • Each of the first electrode pads 77, second electrode pads 78, and third electrode pads 79 may include at least one of titanium, titanium nitride, copper, aluminum, and tungsten.
  • each of the first electrode pads 77, second electrode pads 78, and third electrode pads 79 has a laminated structure of titanium and copper. Note that the material constituting one or two types of electrode pads among each of the first electrode pads 77, second electrode pads 78, and third electrode pads 79 may be different from the material constituting the remaining types of electrode pads.
  • the first electrode pads 77 are located closer to the second chip side surface 74 than the center of the chip surface 71 in the X direction in a plan view.
  • the first electrode pads 77 are arranged at the same positions as each other in the Y direction and spaced apart from each other in the X direction.
  • the second electrode pads 78 are electrode pads that are individually and electrically connected to the second lead terminals 42 to 44.
  • the second electrode pads 78 are provided at positions closer to the first chip side surface 73 than the center of the chip surface 71 in the X direction in a plan view.
  • the third electrode pad 79 is located on the chip surface 71 closer to the third chip side surface 75 in the Y direction than the multiple second electrode pads 78 in a planar view.
  • the third electrode pad 79 is located on the chip surface 71 closer to the second chip side surface 74 in the X direction than the multiple first electrode pads 77 in a planar view.
  • the first electrode pads 67 of the first chip 60 and the first electrode pads 77 of the second chip 70 are individually connected by multiple (two in the sixteenth embodiment) inter-chip wires WA. This electrically connects the first electrode pads 67 and the first electrode pads 77 individually.
  • the two inter-chip wires WA are formed so as to be parallel to each other in a planar view.
  • the acute angle formed by the two inter-chip wires WA in a planar view is 5° or less, it can be said that the two inter-chip wires WA are parallel to each other.
  • the acute angle formed by the two inter-chip wires WA in a planar view is greater than 0° and less than 3°. In one example, the acute angle formed by the two inter-chip wires WA in a planar view is greater than 3° and less than 5°.
  • the acute angle formed between each interchip wire WA and the second chip side surface 74 of the second chip 70 is 70° or more and 90° or less. In one example, in a plan view, the acute angle formed between each interchip wire WA and the second chip side surface 74 of the second chip 70 is 70° or more and 75° or less. In one example, in a plan view, the acute angle formed between each interchip wire WA and the second chip side surface 74 of the second chip 70 is greater than 75° and less than 80°. In one example, in a plan view, the acute angle formed between each interchip wire WA and the second chip side surface 74 of the second chip 70 is greater than 80° and less than 85°.
  • each interchip wire WA is perpendicular to the second chip side surface 74.
  • the multiple second electrode pads 68 of the first chip 60 and the first lead terminals 11 to 13 are individually connected by multiple (three in the sixteenth embodiment) first lead wires WB. This allows the first chip 60 and the first lead terminals 11 to 13 to be individually electrically connected. Each of the first lead terminals 11 to 13 is individually connected to the multiple second electrode pads 68 by one first lead wire WB.
  • the first lead wire WB is a bonding wire formed by a wire bonding device.
  • the bonded portion of the first lead wire WB with the second electrode pad 68 is a first bond portion
  • the bonded portion with the first lead terminals 11 to 13 is a second bond portion.
  • the first lead wire WB is connected to the wire connection portions 11AA to 13AA of the first inner lead portions 11A to 13A of the first lead terminals 11 to 13.
  • the multiple third electrode pads 69 of the first chip 60 and the first die pad 30 are individually connected by one first die pad wire WC. As a result, the third electrode pads 69 are electrically connected to the first die pad 30. In other words, the third electrode pads 69 are at the first ground potential. The third electrode pads 69 can also be said to be electrically connected to the first lead terminals 14.
  • the first die pad wire WC connected to the third electrode pads 69 is connected to the end of the first die pad 30 closer to the third sealing side surface 95 than both ends in the Y direction.
  • the wire WC for the first die pad is a bonding wire formed by a wire bonding device.
  • the bond portion of the wire WC for the first die pad with the third electrode pad 69 is a first bond portion
  • the bond portion of the wire WC for the first die pad with the first die pad 30 is a second bond portion.
  • a security bond WC1 is provided on the second bond portion of the wire WC for the first die pad.
  • the second electrode pads 78 of the second chip 70 and the second lead terminals 42 to 44 are individually connected by multiple (three in the sixteenth embodiment) second lead wires WD. This electrically connects the second chip 70 and the second lead terminals 42 to 44 individually. Each of the second lead terminals 42 to 44 is individually connected to the second electrode pads 78 by one second lead wire WD.
  • the second lead wire WD is a bonding wire formed by a wire bonding device.
  • the bonded portion of the second lead wire WD with the second electrode pad 78 is a first bond portion
  • the bonded portion with the second lead terminals 42-44 is a second bond portion.
  • the second lead wire WD is connected to the wire connection portions 42AA-44AA of the second inner lead portions 42A-44A of the second lead terminals 42-44.
  • the multiple third electrode pads 79 of the second chip 70 and the second die pad 50 are connected by a single second die pad wire WE. This electrically connects the second chip 70 and the second die pad 50. Therefore, the third electrode pads 79 of the second chip 70 are at the second ground potential. It can also be said that the third electrode pads 79 are electrically connected to the second lead terminal 41.
  • the wire WE for the second die pad which is connected to the third electrode pad 79, is connected to the end of the second die pad 50 in the Y direction that is closer to the fourth side surface 54.
  • the wire WE for the second die pad is a bonding wire formed by a wire bonding device.
  • the connection portion of the wire WE for the second die pad with the third electrode pad 79 is a first bond portion
  • the joint portion with the second die pad 50 is a second bond portion.
  • a security bond WE1 is provided on the second bond portion of the wire WE for the second die pad.
  • the material constituting the inter-chip wire WA is different from the material constituting each of the first lead wire WB, the first die pad wire WC, the second lead wire WD, and the second die pad wire WE.
  • the first lead wire WB, the first die pad wire WC, the second lead wire WD, and the second die pad wire WE are each made of the same material.
  • the inter-chip wire WA is made of a material containing gold.
  • Each of the first lead wire WB, the first die pad wire WC, the second lead wire WD, and the second die pad wire WE is made of a material containing copper.
  • each of the first lead wire WB, the first die pad wire WC, the second lead wire WD, and the second die pad wire WE is made of a copper wire whose surface is coated with palladium.
  • the second chip 70 differs from the ninth embodiment in that it includes a first transformer 321 which is an isolation transformer.
  • the first chip 60 differs from the ninth embodiment in that it does not include the first transformer 321.
  • the second chip 70 has an insulating transformer region 210, a circuit region 220, and a peripheral guard ring 200 that surrounds the insulating transformer region 210 and the circuit region 220.
  • the circuit region 220 can be defined as the region surrounded by the peripheral guard ring 200 in a plan view other than the insulating transformer region 210.
  • the insulating transformer region 210 is a region that electrically insulates the multiple second functional units of the circuit region 220 from the first chip 60, while allowing the transmission of signals between the multiple second functional units of the circuit region 220 and the first chip 60.
  • the insulating transformer region 210 is formed closer to the second chip side surface 74 with respect to the center of the X direction of the second chip 70 in a plan view. That is, the distance between the insulating transformer region 210 and the second chip side surface 74 in the X direction is smaller than the distance between the insulating transformer region 210 and the first chip side surface 73 in the X direction.
  • the insulating transformer region 210 is formed closer to the third chip side surface 75 with respect to the center of the Y direction of the second chip 70 in a plan view. That is, the distance between the insulating transformer region 210 and the third chip side surface 75 in the Y direction is smaller than the distance between the insulating transformer region 210 and the fourth chip side surface 76 in the Y direction. In this way, the insulating transformer region 210 is formed in a region of the second chip 70 that is closer to the first chip 60 in a plan view.
  • a first transformer 321 is formed in the insulating transformer region 210.
  • one transformer is formed in the insulating transformer region 210.
  • a first electrode pad 77A and a first electrode pad 77B are formed in the insulating transformer region 210.
  • two first electrode pads 77 are formed in the insulating transformer region 210.
  • the first electrode pad 77A and the first electrode pad 77B are arranged at the same position in the Y direction and spaced apart from each other in the X direction.
  • the first transformer 321 includes a first front surface side coil 111A and a first back surface side coil 111B.
  • Each of the first front side coil 111A and the first back side coil 111B may contain at least one of titanium, titanium nitride, copper, aluminum, and tungsten.
  • the first front side coil 111A contains copper
  • the first back side coil 111B contains aluminum.
  • the first front side coil 111A has a laminated structure of titanium and copper
  • the first back side coil 111B has a laminated structure of titanium nitride and aluminum.
  • the first surface side coil 111A includes a first coil portion 111A1 that is spiral-shaped in a plan view, a first outer coil end portion 111A2, and a first inner coil end portion 111A3.
  • the first outer coil end portion 111A2 constitutes the end portion in the winding direction at the outermost periphery of the first coil portion 111A1
  • the first inner coil end portion 111A3 constitutes the end portion in the winding direction at the innermost periphery of the first coil portion 111A1.
  • the first electrode pad 77A is disposed in an inner space including the winding center of the first coil portion 111A1 in a plan view. It can be said that the first electrode pad 77A is located more inward than the first coil portion 111A1. The first electrode pad 77A is connected to the first inner coil end 111A3. Therefore, it can be said that the first electrode pad 77A is electrically connected to the first end of the first surface side coil 111A.
  • the first electrode pad 77B is positioned closer to the second chip side surface 74 than the first surface side coil 111A in a plan view.
  • the first electrode pad 77B is connected to the first outer coil end 111A2 of the first surface side coil 111A. Therefore, it can be said that the first electrode pad 77B is electrically connected to the second end of the first surface side coil 111A.
  • the first back side coil 111B is disposed opposite the first front side coil 111A (see FIG. 61) in the Z direction.
  • the first back side coil 111B includes a first coil portion 111B1 having a spiral shape in a plan view, a first outer coil end portion 111B2, and a first inner coil end portion 111B3.
  • the first outer coil end portion 111B2 constitutes an end portion in the winding direction at the outermost periphery of the first coil portion 111B1, and the first inner coil end portion 111B3 constitutes an end portion in the winding direction at the innermost periphery of the first coil portion 111B1.
  • the first outer coil end portion 111B2 is electrically connected to a first functional portion of the circuit region 220.
  • the first inner coil end portion 111B3 is electrically connected to a first functional portion of the circuit region 220.
  • a surface side guard ring 215 is formed in the insulating transformer region 210, surrounding the first surface side coil 111A and the first electrode pads 77A and 77B in a plan view.
  • the surface side guard ring 215 is configured to partition the insulating transformer region 210.
  • the surface side guard ring 215 includes a circular first ring portion 215A that surrounds the first surface side coil 111A and is concentric with the winding center of the first surface side coil 111A, and a semicircular second ring portion 215B that surrounds the first electrode pad 77B and is connected to the first ring portion 215A.
  • the first ring portion 215A is circular with an opening near the second chip side surface 74.
  • the second ring portion 215B is connected to this opening.
  • a back side guard ring 216 is formed in the insulating transformer region 210 to surround the first back side coil 111B in a plan view.
  • the shape and size of the back side guard ring 216 are the same as those of the front side guard ring 215 (see FIG. 61).
  • the back side guard ring 216 is formed at a position that overlaps with the front side guard ring 215.
  • a plurality of vias 217 are formed to connect front-side guard ring 215 and rear-side guard ring 216.
  • the vias 217 correspond to vias 117 (see FIG. 18) in the first embodiment.
  • Each via 217 is positioned so as to overlap both front-side guard ring 215 and rear-side guard ring 216 in plan view.
  • the circuit region 220 is a region in which a plurality of second functional units and a plurality of circuit elements are formed.
  • the plurality of second functional units include a receiver unit 411, a logic unit 412, and a UVLO unit 413 (see FIG. 63), which will be described later.
  • the circuit region 220 is disposed closer to the first chip side surface 73 than the insulating transformer region 210.
  • the circuit region 220 is provided with a plurality of wiring layers 221.
  • the plurality of wiring layers 221 includes a wiring layer that electrically connects the plurality of second function units, and a wiring layer that electrically connects the plurality of second function units and the first transformer 321 of the insulating transformer region 210. Note that the arrangement of the plurality of wiring layers 221 in the circuit region 220 shown in FIG. 61 is an example, and is not limited to this.
  • the outer periphery guard ring 200 includes a front surface side outer periphery guard ring 201 and a back surface side outer periphery guard ring 202 .
  • the front-side outer periphery guard ring 201 is formed so as to go around the outer periphery of the second chip 70 in a plan view.
  • the front-side outer periphery guard ring 201 has a rectangular shape with four chamfered corners in a plan view.
  • the front-side guard ring 215 is connected to the front-side outer periphery guard ring 201 by the front-side connection wiring 203. As a result, the front-side guard ring 215 is electrically connected to the front-side outer periphery guard ring 201.
  • the shape and size of the rear-side outer peripheral guard ring 202 are the same as those of the front-side outer peripheral guard ring 201 (see FIG. 61).
  • the rear-side guard ring 216 is connected to the rear-side outer peripheral guard ring 202 by rear-side connection wiring 204. In this way, the rear-side guard ring 216 is electrically connected to the rear-side outer peripheral guard ring 202.
  • the second chip 70 has multiple peripheral vias that connect the front-side peripheral guard ring 201 and the back-side peripheral guard ring 202.
  • the front-side peripheral guard ring 201 and the back-side peripheral guard ring 202 are electrically connected by the multiple peripheral vias.
  • Each peripheral via extends in the Z direction.
  • the cross-sectional structure of the first front surface side coil 111A is the same as the cross-sectional structure of the first front surface side coil 111A in the first embodiment.
  • the cross-sectional structure of the first back surface side coil 111B is the same as the cross-sectional structure of the first back surface side coil 111B in the first embodiment.
  • the first transformer 321 has the same configuration as the first transformer 321 in the first embodiment.
  • FIG. 63 shows a circuit configuration of a signal transmission device 10 according to the sixteenth embodiment. As shown in FIG. 63, the circuit configuration of the signal transmission device 10 of the sixteenth embodiment differs from the circuit configuration of the signal transmission device 10 of the ninth embodiment in the manner in which the second terminals Q1 to Q4 are connected.
  • the second terminal Q1 is a negative power supply terminal (GND2)
  • the second terminal Q2 is a positive power supply terminal (VCC2)
  • the second terminal Q3 is a positive output terminal (OUT+)
  • the second terminal Q4 is a negative output terminal (OUT-).
  • the second terminal Q1 corresponds to the second lead terminal 41
  • the second terminal Q2 corresponds to the second lead terminal 42
  • the second terminal Q3 corresponds to the second lead terminal 43
  • the second terminal Q4 corresponds to the second lead terminal 44.
  • the circuit configuration shown in FIG. 63 includes first output switching elements 416, 417 as output switching elements electrically connected to the driver circuit 415.
  • the first output switching element 417 is the same as that in the ninth embodiment.
  • An n-channel MOSFET is used as the first output switching element 416.
  • the gate of the first output switching element 416 is electrically connected to the driver circuit 415.
  • the drain of the first output switching element 416 is electrically connected to the second terminal Q2, and the source of the first output switching element 416 is electrically connected to the second terminal Q3.
  • the signal transmission device 10 of the sixteenth embodiment provides the same effects as those of the first embodiment.
  • a signal transmission device 10 of the 17th embodiment will be described with reference to Figures 64 and 65.
  • the signal transmission device 10 of the 17th embodiment is different from the signal transmission device 10 of the 16th embodiment mainly in the configuration of each of the first frame 10A and the second frame 10B.
  • the configuration different from the 16th embodiment will be described in detail, and the components common to the 16th embodiment will be denoted by the same reference numerals and their description will be omitted.
  • the shape of the wire connection portion 11AA of the first lead terminal 11 of the first frame 10A is different from that of the sixteenth embodiment. More specifically, the corner portion of the wire connection portion 11AA near the first lead terminal 12 and on the tip side includes an inclined surface 11AF.
  • the inclined surface 11AF is inclined away from the first lead terminal 12 side surface of both sides of the wire connection portion 11AA toward the tip surface of the wire connection portion 11AA.
  • the inclined surface 11AF faces the first die pad 30.
  • the inclined surface 11AF can also be said to face the first die pad 30 side.
  • the inclined surface 11AF faces the first chip 60.
  • the inclined surface 11AF can also be said to face the first chip 60 side.
  • a single first lead wire WB is connected to the wire connection portion 11AA.
  • the first lead wire WB extends from the first bond portion of the second chip 70 so as to pass through the inclined surface 11AF of the wire connection portion 11AA.
  • the first lead wire WB that has passed through the inclined surface 11AF of the wire connection portion 11AA is joined to the center of the wire connection portion 11AA in the Y direction.
  • the second bond portion of this first lead wire WB is formed at the center position of the wire connection portion 11AA in the Y direction.
  • the first lead wire WB connected to the wire connection portion 11AA is perpendicular to the inclined surface 11AF.
  • the angle between the first lead wire WB connected to the wire connection portion 11AA and the inclined surface 11AF is 85° or more and 95° or less, it can be said that the first lead wire WB connected to the wire connection portion 11AA is perpendicular to the inclined surface 11AF.
  • the inclined surface 11AF corresponds to "the side surface that intersects with the first lead wire WB connected to the wire connection portion 11AA in a plan view.”
  • the relationship between the first lead wire WB connected to the wire connection portion 11AA and the inclined surface 11AF is not limited to being perpendicular. In plan view, the first lead wire WB connected to the wire connection portion 11AA only needs to extend so as to intersect with the inclined surface 11AF.
  • the shape of the wire connection portion 44AA of the second lead terminal 44 of the second frame 10B is different from that of the 16th embodiment. More specifically, the corner portion of the wire connection portion 44AA closer to the second lead terminal 43 and on the tip side includes an inclined surface 44AF.
  • the inclined surface 44AF is inclined toward the side away from the second lead terminal 43 as it moves from the side surface of the wire connection portion 44AA that is closer to the second lead terminal 43 to the tip surface of the wire connection portion 44AA.
  • the inclined surface 44AF faces the second die pad 50.
  • the inclined surface 44AF can also be said to face the second die pad 50 side.
  • the inclined surface 44AF faces the second chip 70.
  • the inclined surface 44AF can also be said to face the second chip 70 side.
  • One second lead wire WD is connected to the wire connection portion 44AA.
  • the second lead wire WD extends from the first bond portion of the second chip 70 so as to pass through the inclined surface 44AF of the wire connection portion 44AA.
  • the second lead wire WD that has passed through the inclined surface 44AF of the wire connection portion 44AA is joined to the center of the wire connection portion 44AA in the Y direction.
  • the second bond portion of this second lead wire WD is formed at the center position of the wire connection portion 44AA in the Y direction.
  • the second lead wire WD connected to the wire connection portion 44AA is perpendicular to the inclined surface 44AF.
  • the angle between the second lead wire WD connected to the wire connection portion 44AA and the inclined surface 44AF is 85° or more and 95° or less, it can be said that the second lead wire WD connected to the wire connection portion 44AA is perpendicular to the inclined surface 44AF.
  • the inclined surface 44AF corresponds to "the side surface that intersects with the second lead wire WD connected to the wire connection portion 44AA in a plan view.”
  • the relationship between the second lead wire WD connected to the wire connection portion 44AA and the inclined surface 44AF is not limited to being perpendicular.
  • the second lead wire WD connected to the wire connection portion 44AA only needs to extend so as to intersect with the inclined surface 44AF.
  • the signal transmission device 10 of the 17th embodiment the same effect as the second embodiment can be obtained.
  • a signal transmission device 10 of the 18th embodiment will be described with reference to Fig. 66 and Fig. 67.
  • the signal transmission device 10 of the 18th embodiment differs from the signal transmission device 10 of the 16th embodiment in the configuration of the first frame 10A and the second frame 10B.
  • the configuration different from the 16th embodiment will be described in detail, and the same reference numerals will be used to designate the same components as the 16th embodiment, and the description thereof will be omitted.
  • the first frame 10A of the 18th embodiment differs from the 16th embodiment in the configuration of the first lead terminals 11-13 among the first lead terminals 11-14. More specifically, the first inner lead portions 11A-13A of the first lead terminals 11-13 have through holes 11AD-13AD formed therein, which penetrate the first inner lead portions 11A-13A in their thickness direction (Z direction).
  • the shape of the through holes 11AD-13AD in plan view is circular. In the 18th embodiment, the diameters of the through holes 11AD-13AD are equal to each other. Note that the shape and size of the through holes 11AD-13AD in plan view can be changed as desired.
  • the through holes 11AD to 13AD are filled with sealing resin 90.
  • the sealing resin 90 filled in the through holes 11AD to 13AD connects the sealing resin 90 provided closer to the sealing surface 91 (see FIG. 43) than the first inner lead portions 11A to 13A with the sealing resin 90 provided closer to the sealing back surface than the first inner lead portions 11A to 13A.
  • the sealing back surface is the surface of the sealing resin 90 facing away from the sealing surface 91.
  • the first lead terminal 14 is integrated with the first die pad 30, and therefore corresponds to the "first connection terminal.”
  • the first lead terminals 11-13 are disposed away from the first die pad 30, and therefore correspond to the "first remote terminals.” Because the through holes 11AD-13AD are formed in the first lead terminals 11-13, it can be said that the first remote terminals have through holes that penetrate in the thickness direction of the first remote terminals. On the other hand, the first connection terminals do not have through holes.
  • the through hole 11AD is formed in the wire connection portion 11AA of the first inner lead portion 11A, closer to the hanging lead portion 32D.
  • the first lead wire WB corresponding to the wire connection portion 11AA is bonded to a portion of the wire connection portion 11AA closer to the first inner lead portion 12A than the through hole 11AD.
  • the second bond portion of the first lead wire WB is positioned away from the through hole 11AD in the Y direction in a plan view.
  • the through hole 12AD is formed in a portion of the wire connection portion 12AA of the first inner lead portion 12A that is closer to the first inner lead portion 13A.
  • the first lead wire WB that corresponds to the wire connection portion 12AA is bonded to a portion of the wire connection portion 12AA that is closer to the first inner lead portion 13A than the through hole 12AD.
  • the second bond portion of the first lead wire WB is positioned away from the through hole 12AD in the Y direction in a plan view.
  • the through hole 13AD is formed in a portion of the wire connection portion 13AA of the first inner lead portion 13A that is closer to the protrusion 32C.
  • the first lead wire WB that corresponds to the wire connection portion 13AA is bonded to a portion of the wire connection portion 13AA that is closer to the tip of the wire connection portion 13AA than the through hole 13AD.
  • the second bond portion of the first lead wire WB is positioned away from the through hole 13AD in the X direction in a plan view.
  • the positions of the through holes 11AD to 13AD can be changed as desired.
  • the through holes 11AD to 13AD can be formed in the lead connection parts 11AB to 13AB.
  • the through holes 11AD to 13AD can also be formed across the wire connection parts 11AA to 13AA and the lead connection parts 12AB to 13AB.
  • the through hole 11AD can be formed closer to the wire connection part 12AA than the second bond part of the first lead wire WB connected to the wire connection part 11AA.
  • the through hole 12AD can be formed closer to the wire connection part 13AA than the second bond part of the first lead wire WB connected to the wire connection part 12AA.
  • the through hole 13AD can be formed closer to the wire connection part 12AA or closer to the protruding part 32C than the second bond part of the first lead wire WB connected to the wire connection part 13AA.
  • the second frame 10B of the 18th embodiment has a different configuration for the second lead terminals 42-44 among the second lead terminals 41-44. More specifically, the second inner lead portions 42A-44A of the second lead terminals 42-44 have through holes 42AD-44AD formed therein, which penetrate the second inner lead portions 42A-44A in their thickness direction (Z direction).
  • the shape of the through holes 42AD-44AD in plan view is circular.
  • the diameters of the through holes 42AD-44AD are equal to each other.
  • the diameters of the through holes 42AD-44AD are equal to the diameters of the through holes 11AD-13AD.
  • the shape and size of the through holes 42AD-44AD in plan view can be changed as desired.
  • the through holes 42AD to 44AD are filled with sealing resin 90.
  • the sealing resin 90 filled in the through holes 42AD to 44AD connects the sealing resin 90 provided closer to the sealing surface 91 (see FIG. 43) than the second inner lead portions 42A to 44A with the sealing resin 90 provided closer to the sealing back surface than the second inner lead portions 42A to 44A.
  • the second lead terminal 41 is integrated with the second die pad 50, and therefore corresponds to the "second connection terminal.”
  • the second lead terminals 42-44 are disposed away from the second die pad 50, and therefore correspond to the "second remote terminals.” Because the through holes 42AD-44AD are formed in the second lead terminals 42-44, it can be said that the second remote terminals have through holes that penetrate in the thickness direction of the second remote terminal. On the other hand, the second connection terminal does not have a through hole.
  • the through hole 42AD is formed in a portion of the wire connection portion 42AA of the second inner lead portion 42A that is closer to the protrusion 52C.
  • the second lead wire WD that corresponds to the wire connection portion 42AA is bonded to a portion of the wire connection portion 42AA that is closer to the second inner lead portion 43A than the through hole 42AD.
  • the second bond portion of the second lead wire WD is positioned away from the through hole 42AD in the Y direction in a plan view.
  • the through hole 43AD is formed in a portion of the wire connection portion 43AA of the second inner lead portion 43A that is closer to the second inner lead portion 44A.
  • the second lead wire WD that corresponds to the wire connection portion 43AA is bonded to a portion of the wire connection portion 43AA that is closer to the second inner lead portion 42A than the through hole 43AD.
  • the second bond portion of the second lead wire WD is positioned away from the through hole 43AD in the Y direction in a plan view.
  • the through hole 44AD is formed in a portion of the wire connection portion 44AA of the second inner lead portion 44A that is closer to the lead connection portion 44AB.
  • the second lead wire WD that corresponds to the wire connection portion 44AA is bonded to a portion of the wire connection portion 44AA that is closer to the second chip 70 than the through hole 44AD.
  • the second bond portion of the second lead wire WD is positioned away from the through hole 44AD in the X direction in a plan view.
  • the through holes 42AD to 44AD may be formed in the lead connection portions 42AB to 44AB.
  • the through holes 42AD to 44AD may also be formed across the wire connection portions 42AA to 44AA and the lead connection portions 42AB to 44AB.
  • the through hole 42AD may be formed closer to the protruding portion 52C than the second bond portion of the second lead wire WD connected to the wire connection portion 42AA.
  • the through hole 43AD may be formed closer to the wire connection portion 42AA than the second bond portion of the second lead wire WD connected to the wire connection portion 43AA.
  • the through hole 44AD may be formed closer to the wire connection portion 43AA than the second bond portion of the second lead wire WD connected to the wire connection portion 44AA.
  • the signal transmission device 10 of the 18th embodiment provides the same effects as the third embodiment.
  • a signal transmission device 10 of the 19th embodiment will be described with reference to Figures 68 and 69.
  • the signal transmission device 10 of the 19th embodiment differs from the signal transmission device 10 of the 18th embodiment in the configuration of the first frame 10A and the second frame 10B and the configuration of the wires.
  • the configuration different from the 18th embodiment will be described in detail, and the components common to the 18th embodiment will be denoted by the same reference numerals and their description will be omitted.
  • the first frame 10A of the 19th embodiment differs from the 18th embodiment in the configuration of the first lead terminals 11, 13 among the first lead terminals 11 to 14. More specifically, the through holes 11AD, 13AD (see FIG. 66) are omitted from the first inner lead portions 11A, 13A of the first lead terminals 11, 13.
  • the first frame 10A includes two types of first lead terminals: a first specific terminal (first lead terminal 12 in the 19th embodiment) among the first lead terminals 11 to 14 in which a through hole is formed, and a second specific terminal (first lead terminals 11, 13, 14 in the 19th embodiment) in which a through hole is not formed.
  • the configuration of the second bond portion of the first lead wire WB differs from that of the 18th embodiment depending on the first specific terminal and the second specific terminal. More specifically, a security bond WB1 is formed on the second bond portion of the first lead wire WB connected to the wire connection portion 11AA, 13AA of the first inner lead portion 11A, 13A of the first lead terminal 11, 13 as the second specific terminal. On the other hand, no security bond WB1 is formed on the second bond portion of the first lead wire WB connected to the wire connection portion 12AA of the first inner lead portion 12A of the first lead terminal 12 as the first specific terminal.
  • the second frame 10B of the 19th embodiment differs from the 18th embodiment in the configuration of the second lead terminals 43, 44 among the second lead terminals 41 to 44. More specifically, the through holes 43AD, 44AD (see FIG. 67) are omitted from the second inner lead portions 43A, 44A of the second lead terminals 43, 44.
  • the second frame 10B includes two types of second lead terminals: a third specific terminal (second lead terminal 42 in the 19th embodiment) among the second lead terminals 41 to 44 in which a through hole is formed, and a fourth specific terminal (second lead terminals 41, 43, 44 in the 19th embodiment) in which a through hole is not formed.
  • the configuration of the second bond portion of the second lead wire WD differs from that of the 18th embodiment depending on the third and fourth specific terminals. More specifically, a security bond WD1 is formed on the second bond portion of the second lead wire WD connected to the wire connection portion 43AA, 44AA of the second inner lead portion 43A, 44A of the second lead terminal 43, 44 as the fourth specific terminal. On the other hand, a security bond WD1 is not formed on the second bond portion of the second lead wire WD connected to the wire connection portion 42AA of the second inner lead portion 42A.
  • the configuration of the security bonds WB1, WD1 is the same as that of the security bonds WB1, WD1 of the fourth embodiment. According to the signal transmission device 10 of the 19th embodiment, the same effect as that of the fourth embodiment can be obtained.
  • a signal transmission device 10 of the twentieth embodiment will be described with reference to Figures 70 to 73.
  • the signal transmission device 10 of the twentieth embodiment differs from the signal transmission device 10 of the first embodiment mainly in the configurations of the first chip 60 and the second chip 70.
  • configurations different from the first embodiment will be described in detail, and components common to the first embodiment will be denoted by the same reference numerals and descriptions thereof will be omitted.
  • the internal structure of the first chip 60 is the same as that of the first chip 60 of the ninth embodiment (see FIGS. 47 and 48). That is, unlike the first embodiment, the first chip 60 includes a first transformer 321 as one transformer. Meanwhile, as shown in FIG. 70, unlike the first chip 60 of the ninth embodiment, the first chip 60 includes six first electrode pads 67A to 67F. The first electrode pads 67A to 67C are electrically connected to the first transformer 321. The first electrode pads 67D to 67F are electrically connected to the first function unit of the circuit region 120.
  • the second chip 70 has an insulating transformer region 210 , a circuit region 220 , and a peripheral guard ring 200 that surrounds the insulating transformer region 210 and the circuit region 220 .
  • the insulating transformer region 210 is a region that electrically insulates the control circuit and the like formed in the circuit region 220 from the first chip 60, while allowing the transmission of signals between the circuit region 220 and the first chip 60.
  • the insulating transformer region 210 is formed closer to the first chip side surface 73 with respect to the center of the second chip 70 in the X direction in a plan view. In other words, the insulating transformer region 210 is formed in a region of the second chip 70 that is closer to the first chip 60 (see FIG. 70) in a plan view.
  • the insulating transformer region 210 is formed closer to the fourth chip side surface 76 of the second chip 70. In other words, the distance between the insulating transformer region 210 and the fourth chip side surface 76 in the Y direction is smaller than the distance between the insulating transformer region 210 and the third chip side surface 75 in the Y direction.
  • a second transformer 322 is formed in the insulating transformer region 210. As shown in Figs. 71 and 72, the second transformer 322 includes a first surface side coil 211A and a first back side coil 211B, and a second surface side coil 212A and a second back side coil 212B. Although not shown, the first surface side coil 211A and the second surface side coil 212A are arranged at the same position as each other in the Z direction. The first back side coil 211B and the second back side coil 212B are arranged at the same position as each other in the Z direction.
  • Each of the first surface side coil 211A, the second surface side coil 212A, the first back side coil 211B, and the second back side coil 212B may contain at least one of titanium, titanium nitride, copper, aluminum, and tungsten.
  • the first surface side coil 211A and the second surface side coil 212A each contain copper
  • the first back side coil 211B and the second back side coil 212B each contain aluminum.
  • the first surface side coil 211A and the second surface side coil 212A each have a laminated structure of titanium and copper
  • the first back side coil 211B and the second back side coil 212B each have a laminated structure of titanium nitride and aluminum.
  • the first surface side coil 211A and the second surface side coil 212A are arranged at the same position in the X direction and spaced apart from each other in the Y direction. In the example shown in FIG. 71, the first surface side coil 211A is arranged closer to the fourth chip side surface 76 than the second surface side coil 212A.
  • the first back side coil 211B and the second back side coil 212B are arranged at the same position in the X direction and spaced apart from each other in the Y direction.
  • the first back side coil 211B is arranged closer to the fourth chip side surface 76 than the second back side coil 212B.
  • a plurality of first electrode pads 77 are formed in the insulating transformer region 210.
  • the plurality of first electrode pads 77 are arranged at the same positions in the X direction and spaced apart from each other in the Y direction.
  • the plurality of first electrode pads 77 include three first electrode pads 77A to 77C.
  • the first electrode pads 77A to 77C are arranged in the order of first electrode pads 77A, 77B, 77C from the fourth chip side surface 76 toward the third chip side surface 75.
  • the first electrode pad 77A is electrically connected to the first surface side coil 211A
  • the first electrode pad 77C is electrically connected to the second surface side coil 212A
  • the first electrode pad 77B is electrically connected to both the first surface side coil 211A and the second surface side coil 212A. It can be said that the first electrode pad 77A is electrically connected to the first end of the first surface side coil 211A. It can be said that the first electrode pad 77B is electrically connected to the second end of the first surface side coil 211A and the second end of the second surface side coil 212A. It can be said that the first electrode pad 77C is electrically connected to the first end of the second surface side coil 212A.
  • the configurations of the first surface side coil 211A and the second surface side coil 212A are the same as the configurations of the first surface side coil 111A and the second surface side coil 112A of the first chip 60 (see FIG. 47), so a detailed description thereof will be omitted.
  • the configurations of the first back side coil 211B and the second back side coil 212B are the same as the configurations of the first back side coil 111B and the second back side coil 112B of the first chip 60 (see FIG. 48), so a detailed description thereof will be omitted.
  • the configurations of the first transformer 321 and the second transformer 322 are the same as the configuration of the first transformer 321 of the first chip 60.
  • the second end of the first rear side coil 211B is electrically connected to the second functional unit of the circuit area 220.
  • the first end of the first rear side coil 211B is electrically connected to the second functional unit of the circuit area 220.
  • the second end of the second rear side coil 212B is electrically connected to the second functional unit of the circuit area 220.
  • the first end of the second rear side coil 212B is electrically connected to the second functional unit of the circuit area 220.
  • a surface side guard ring 215 is formed that surrounds the first surface side coil 211A, the second surface side coil 212A, and the first electrode pads 77A to 77C in a plan view.
  • the shape of the surface side guard ring 215 in a plan view is a track shape.
  • a back side guard ring 216 is formed in the insulating transformer region 210, surrounding the first back side coil 211B and the second back side coil 212B in a plan view.
  • the shape of the back side guard ring 216 in a plan view is a track shape.
  • the shape and size of the back side guard ring 216 are the same as those of the front side guard ring 215 (see FIG. 71).
  • the back side guard ring 216 is formed at a position overlapping with the front side guard ring 215.
  • a plurality of vias are formed in the insulating transformer region 210 to connect the front-side guard ring 215 and the back-side guard ring 216.
  • the vias correspond to the vias 117 in the first embodiment.
  • the vias are arranged in positions that overlap both the front-side guard ring 215 and the back-side guard ring 216 in a plan view.
  • the circuit region 220 is a region in which a plurality of second functional units and a plurality of circuit elements are formed.
  • the plurality of second functional units include a receiving unit 521, a transmitting unit 522, a logic unit 523, a UVLO unit 524, a clamp control unit 525, an output control unit 526, and a desaturation fault detection unit 527 (see FIG. 73).
  • the circuit region 220 is provided with a plurality of first electrode pads 77, a plurality of second electrode pads 78, and a plurality of third electrode pads 79.
  • the plurality of first electrode pads 77 include first electrode pads 77D, 77E, and 77F.
  • the first electrode pads 77D to 77F are arranged at the same positions in the X direction and spaced apart from each other in the Y direction.
  • the first electrode pads 77D to 77F are arranged in the order of first electrode pads 77D, 77E, and 77F from the fourth chip side surface 76 toward the third chip side surface 75.
  • the circuit region 220 is provided with multiple wiring layers (not shown).
  • the multiple wiring layers include a wiring layer that electrically connects the multiple functional units, and a wiring layer that electrically connects the multiple functional units to the first transformer 321 of the insulating transformer region 210.
  • the peripheral guard ring 200 includes a front surface side peripheral guard ring 201 and a back surface side peripheral guard ring 202 .
  • the front-side outer periphery guard ring 201 is formed so as to go around the outer periphery of the second chip 70 in a plan view.
  • the front-side outer periphery guard ring 201 has a rectangular shape with four curved rounded corners.
  • the front-side guard ring 215 is connected to the front-side outer periphery guard ring 201. More specifically, a portion of the front-side guard ring 215 closer to the first chip side surface 73 is integrated with the front-side outer periphery guard ring 201. As a result, the front-side guard ring 215 is electrically connected to the front-side outer periphery guard ring 201.
  • the shape and size of the back-side outer peripheral guard ring 202 are the same as those of the front-side outer peripheral guard ring 201 (see FIG. 71).
  • the back-side guard ring 216 is connected to the back-side outer peripheral guard ring 202. More specifically, the portion of the back-side guard ring 216 closer to the first chip side surface 73 is integrated with the back-side outer peripheral guard ring 202. As a result, the back-side guard ring 216 is electrically connected to the back-side outer peripheral guard ring 202.
  • the second chip 70 has multiple peripheral vias that connect the front-side peripheral guard ring 201 and the back-side peripheral guard ring 202.
  • the front-side peripheral guard ring 201 and the back-side peripheral guard ring 202 are electrically connected by the multiple peripheral vias.
  • Each peripheral via extends in the Z direction.
  • the first electrode pads 67A to 67F of the first chip 60 and the first electrode pads 77A to 77F of the second chip 70 are individually electrically connected by inter-chip wires WA1 to WA6.
  • the inter-chip wire WA1 connects the first electrode pad 67A of the first chip 60 and the first electrode pad 77F of the second chip 70. In other words, the inter-chip wire WA1 electrically connects the first electrode pad 67A and the first electrode pad 77F.
  • the inter-chip wire WA2 connects the first electrode pad 67B of the first chip 60 and the first electrode pad 77E of the second chip 70. In other words, the inter-chip wire WA2 electrically connects the first electrode pad 67B and the first electrode pad 77E.
  • the inter-chip wire WA3 connects the first electrode pad 67C of the first chip 60 and the first electrode pad 77D of the second chip 70. In other words, the inter-chip wire WA3 electrically connects the first electrode pad 67C and the first electrode pad 77D.
  • the inter-chip wire WA4 connects the first electrode pad 67D of the first chip 60 and the first electrode pad 77C of the second chip 70. In other words, the inter-chip wire WA4 electrically connects the first electrode pad 67D and the first electrode pad 77C.
  • the inter-chip wire WA5 connects the first electrode pad 67E of the first chip 60 and the first electrode pad 77B of the second chip 70. In other words, the inter-chip wire WA5 electrically connects the first electrode pad 67E and the first electrode pad 77B.
  • the inter-chip wire WA6 connects the first electrode pad 67F of the first chip 60 and the first electrode pad 77A of the second chip 70. In other words, the inter-chip wire WA6 electrically connects the first electrode pad 67F and the first electrode pad 77A.
  • the distance in the Y direction between the first electrode pad 67A and the first electrode pad 67B of the first chip 60 is equal to the distance in the Y direction between the first electrode pad 67B and the first electrode pad 67C.
  • the distance in the Y direction between the first electrode pad 67D and the first electrode pad 67E is equal to the distance in the Y direction between the first electrode pad 67E and the first electrode pad 67F.
  • the distance in the Y direction between the first electrode pad 67A and the first electrode pad 67B is equal to the distance in the Y direction between the first electrode pad 67D and the first electrode pad 67E.
  • the distance in the Y direction between the first electrode pad 77A and the first electrode pad 77B of the second chip 70 is equal to the distance in the Y direction between the first electrode pad 77B and the first electrode pad 77C.
  • the distance in the Y direction between the first electrode pad 77D and the first electrode pad 77E is equal to the distance in the Y direction between the first electrode pad 77E and the first electrode pad 77F.
  • the distance in the Y direction between the first electrode pad 77A and the first electrode pad 77B is equal to the distance in the Y direction between the first electrode pad 77D and the first electrode pad 77E.
  • the distance in the Y direction between the first electrode pad 67A and the first electrode pad 67B of the first chip 60 is equal to the distance in the Y direction between the first electrode pad 77D and the first electrode pad 77E of the second chip 70.
  • the distance in the Y direction between the first electrode pad 67B and the first electrode pad 67C of the first chip 60 is equal to the distance in the Y direction between the first electrode pad 77E and the first electrode pad 77F of the second chip 70.
  • the distance in the Y direction between the first electrode pad 77A and the first electrode pad 77B of the second chip 70 is equal to the distance in the Y direction between the first electrode pad 67D and the first electrode pad 67E of the first chip 60.
  • the distance in the Y direction between the first electrode pad 77B and the first electrode pad 77C of the second chip 70 is equal to the distance in the Y direction between the first electrode pad 67E and the first electrode pad 67F of the first chip 60.
  • the inter-chip wire WA1 connecting the first electrode pad 67A and the first electrode pad 77F and the inter-chip wire WA2 connecting the first electrode pad 67B and the first electrode pad 77E are parallel in a planar view.
  • the inter-chip wire WA2 and the inter-chip wire WA3 connecting the first electrode pad 67C and the first electrode pad 77D are parallel in a planar view.
  • the inter-chip wire WA4 and the inter-chip wire WA5 connecting the first electrode pad 67E and the first electrode pad 77B are parallel in a planar view.
  • the inter-chip wire WA5 and the inter-chip wire WA6 connecting the first electrode pad 67F and the first electrode pad 77A are parallel in a planar view.
  • the acute angle between inter-chip wire WA1 and inter-chip wire WA2 in a planar view is 5° or less, it can be said that inter-chip wire WA1 and inter-chip wire WA2 are parallel in a planar view. Therefore, the acute angle between inter-chip wire WA1 and inter-chip wire WA2 is 0° or more and 5° or less. In one example, the acute angle between inter-chip wire WA1 and inter-chip wire WA2 is 0° or more and 3° or less. In one example, the acute angle between inter-chip wire WA1 and inter-chip wire WA2 is greater than 3° and 5° or less.
  • the acute angle between inter-chip wire WA2 and inter-chip wire WA3 in a planar view is 5° or less, it can be said that inter-chip wire WA2 and inter-chip wire WA3 are parallel in a planar view. Therefore, the acute angle between inter-chip wire WA2 and inter-chip wire WA3 is 0° or more and 5° or less. In one example, the acute angle between inter-chip wire WA2 and inter-chip wire WA3 is 0° or more and 3° or less. In one example, the acute angle between inter-chip wire WA2 and inter-chip wire WA3 is more than 3° and 5° or less.
  • the acute angle between inter-chip wire WA4 and inter-chip wire WA5 in a plan view is 5° or less, it can be said that inter-chip wire WA4 and inter-chip wire WA5 are parallel in a plan view. Therefore, the acute angle between inter-chip wire WA4 and inter-chip wire WA5 is 0° or more and 5° or less. In one example, the acute angle between inter-chip wire WA4 and inter-chip wire WA5 is 0° or more and 3° or less. In one example, the acute angle between inter-chip wire WA4 and inter-chip wire WA5 is more than 3° and 5° or less.
  • the acute angle between inter-chip wire WA5 and inter-chip wire WA6 in a planar view is 5° or less, it can be said that inter-chip wire WA5 and inter-chip wire WA6 are parallel in a planar view. Therefore, the acute angle between inter-chip wire WA5 and inter-chip wire WA6 is 0° or more and 5° or less. In one example, the acute angle between inter-chip wire WA5 and inter-chip wire WA6 is 0° or more and 3° or less. In one example, the acute angle between inter-chip wire WA5 and inter-chip wire WA6 is more than 3° and 5° or less.
  • each of the inter-chip wires WA1 to WA3 extends along the X direction in a plan view.
  • each of the inter-chip wires WA4 to WA6 extends along the X direction in a plan view.
  • the acute angle between inter-chip wire WA1 and the X direction in a planar view is 5° or less, it can be said that inter-chip wire WA1 extends along the X direction in a planar view. Therefore, the acute angle between inter-chip wire WA1 and the X direction in a planar view is 0° or more and 5° or less. In one example, the acute angle between inter-chip wire WA1 and the X direction in a planar view is 0° or more and 3° or less. In one example, the acute angle between inter-chip wire WA1 and the X direction in a planar view is greater than 3° and 5° or less. The same applies to each of inter-chip wires WA2 to WA6.
  • the material constituting the inter-chip wires WA1 to WA6 is different from the material constituting each of the first lead wire WB, the first die pad wire WC, the second lead wire WD, and the second die pad wire WE.
  • the first lead wire WB, the first die pad wire WC, the second lead wire WD, and the second die pad wire WE are each made of the same material.
  • the inter-chip wires WA1 to WA6 are formed from a material containing gold.
  • the first lead wire WB, the first die pad wire WC, the second lead wire WD, and the second die pad wire WE are each formed from a material containing copper.
  • the first lead wire WB, the first die pad wire WC, the second lead wire WD, and the second die pad wire WE are each configured such that the surface of the copper wire is coated with lead (Pd).
  • a security bond WC1 is formed on the second bond portion of each first die pad wire WC.
  • a security bond WE1 is formed on the second bond portion of each second die pad wire WE.
  • the signal transmission device 10 includes a first circuit 500 and a second circuit 520.
  • the first chip 60 includes the first circuit 500
  • the second chip 70 includes the second circuit 520.
  • the signal transmission device 10 also includes first terminals P1 to P8, which are external terminals electrically connected to the first circuit 500, and second terminals Q1 to Q8, which are external terminals electrically connected to the second circuit 520.
  • the first terminal P1 is a ground terminal (GND1)
  • the first terminal P2 is a positive input terminal (IN+)
  • the first terminal P3 is a negative input terminal (IN-)
  • the first terminal P4 is an input/output terminal (RDYC)
  • the first terminal P5 is a detection terminal (/FLT)
  • the first terminal P6 is a reset terminal (/RST)
  • the first terminal P7 is a power supply terminal (VCC1)
  • the first terminal P8 is a ground terminal (GND1).
  • the first terminal P1 and the first terminal P8 are electrically connected to each other.
  • the second terminal Q1 is a negative power supply terminal (VEE2)
  • the second terminal Q2 is a voltage detection terminal (DESAT)
  • the second terminal Q3 is a ground terminal (GND2)
  • the second terminal Q4 is a set terminal (TLSET)
  • the second terminal Q5 is a positive power supply terminal (VCC2)
  • the second terminal Q6 is an output terminal (OUT)
  • the second terminal Q7 is a clamp terminal (CLAMP)
  • the second terminal Q8 is a negative power supply terminal (VEE2).
  • the second terminal Q1 and the second terminal Q8 are electrically connected to each other.
  • the first circuit 500 includes functional units, such as a transmitter unit 501, a receiver unit 502, a logic unit 503, and a UVLO unit 504, as well as resistors 505, 506, 507, 509, and 511, and switching elements 508 and 510.
  • functional units such as a transmitter unit 501, a receiver unit 502, a logic unit 503, and a UVLO unit 504, as well as resistors 505, 506, 507, 509, and 511, and switching elements 508 and 510.
  • the first terminals P2 to P6 are electrically connected to the logic unit 503, and the first terminal P7 is electrically connected to the UVLO unit 504.
  • the logic unit 503 is electrically connected to the transmission unit 501, the reception unit 502, and the UVLO unit 504 individually.
  • the transmitting unit 501 is electrically connected to the first transformer 321.
  • the transmitting unit 501 is configured to transmit the control signal input from the logic unit 503 to the second circuit 520 using the first transformer 321.
  • the receiving unit 502 is electrically connected to the second transformer 322.
  • the receiving unit 502 is configured to receive a signal from the second circuit 520 via the second transformer 322 and output the received signal to the logic unit 503.
  • the logic unit 503 is configured to exchange various signals with an external control device (not shown) of the signal transmission device 10 via the first terminals P2 to P6, and to exchange various signals with the second circuit 520 using the transmission unit 501 and reception unit 502.
  • the logic unit 503 includes, for example, a decoder electrically connected to the receiving unit 502, a first AND circuit electrically connected to the transmitting unit 501, a flip-flop circuit and a second AND circuit for generating a gate signal for the switching element 510, and a third AND circuit for generating a gate signal for the switching element 508.
  • the logic unit 503 includes, for example, a first delay circuit provided between the first AND circuit and the first terminal P2, a second delay circuit provided between the first AND circuit and the first terminal P3, and a third delay circuit provided between the flip-flop circuit and the first terminal P6.
  • the resistor 505 is electrically connected to the conductive path between the first terminal P2 and the logic unit 503.
  • the first terminal of the resistor 505 is electrically connected to the conductive path, and the second terminal is electrically connected to the first terminal P1 (P8). Therefore, the resistor 505 is a pull-down resistor.
  • Resistor 506 is electrically connected to the conductive path between first terminal P3 and logic unit 503.
  • the first terminal of resistor 506 is electrically connected to first terminal P7, and the second terminal is electrically connected to the conductive path. Therefore, resistor 506 is a pull-up resistor.
  • a switching element 508 and a resistor 507 are provided between the first terminal P4 and the logic unit 503.
  • an n-channel MOSFET is used as the switching element 508.
  • a first terminal of the resistor 506 is electrically connected to the first terminal P7, and a second terminal of the resistor 506 is electrically connected to the drain of the switching element 508.
  • the first terminal P4 is electrically connected to the connection point between the second terminal of the resistor 506 and the drain of the switching element 508.
  • the source of the switching element 508 is electrically connected to the first terminal P1 (P8).
  • the gate of the switching element 508 is electrically connected to the logic unit 503.
  • a switching element 510 and a resistor 509 are provided between the first terminal P5 and the logic unit 503.
  • an n-channel MOSFET is used as the switching element 510.
  • a first terminal of the resistor 509 is electrically connected to the first terminal P7, and a second terminal of the resistor 509 is electrically connected to the drain of the switching element 510.
  • the first terminal P5 is electrically connected to the connection point between the second terminal of the resistor 509 and the drain of the switching element 510.
  • the source of the switching element 510 is electrically connected to the first terminal P1 (P8).
  • the gate of the switching element 510 is electrically connected to the logic unit 503.
  • Resistor 511 is electrically connected to the conductive path between first terminal P6 and logic unit 503.
  • the first terminal of resistor 511 is electrically connected to first terminal P7, and the second terminal is electrically connected to the conductive path. Therefore, resistor 511 is a pull-up resistor.
  • the logic unit 503 changes the voltage at the first terminals P4 and P5 by turning on and off the switching elements 508 and 510.
  • the control device can grasp the state of the signal transmission device 10 by monitoring the first terminals P4 and P5.
  • the UVLO unit 504 stops the operation of the logic unit 503 when the voltage of the control power supply electrically connected to the first terminal P7 falls below a threshold voltage, thereby suppressing the occurrence of a malfunction.
  • the second circuit 520 includes a receiving unit 521, a transmitting unit 522, a logic unit 523, a UVLO unit 524, a clamp control unit 525, an output control unit 526, a desaturation fault detection unit 527, a switching element 528, a first output switching element 529, a second output switching element 530, a third output switching element 531, resistors 532, 534, 539, current sources 533, 537, switching elements 535, 538, and a comparator 536.
  • the second terminal Q2 is electrically connected to the desaturation fault detection unit 527
  • the second terminal Q4 is electrically connected to the comparator 536
  • the second terminal Q5 is electrically connected to the UVLO unit 524
  • the second terminal Q6 is electrically connected to the output control unit 526
  • the second terminal Q7 is electrically connected to the clamp control unit 525.
  • the logic unit 523 is individually electrically connected to the receiving unit 521, the transmitting unit 522, the UVLO unit 524, the clamp control unit 525, the output control unit 526, the desaturation fault detection unit 527, and the comparator 536.
  • the receiving unit 521 is electrically connected to the first transformer 321.
  • the receiving unit 521 is configured to receive a control signal from the transmitting unit 501 via the first transformer 321 and output the received control signal to the logic unit 523.
  • the transmitter 522 is electrically connected to the second transformer 322.
  • the transmitter 522 transmits the signal input from the logic unit 523 to the receiver 521 using the second transformer 322.
  • the logic unit 523 individually controls the clamp control unit 525, the output control unit 526, and the desaturation fault detection unit 527.
  • the logic unit 523 is configured to output signals from the clamp control unit 525, the output control unit 526, and the desaturation fault detection unit 527 to the transmission unit 522.
  • the UVLO unit 524 stops the operation of the logic unit 523 when the voltage of the control power supply electrically connected to the second terminal Q5 falls below a threshold voltage, thereby suppressing the occurrence of a malfunction.
  • the clamp control unit 525 is a circuit that controls the operation of the switching element 528.
  • an n-channel MOSFET is used as the switching element 528.
  • the drain of the switching element 528 is electrically connected to the second terminal Q7, and the source of the switching element 528 is electrically connected to the second terminal Q1 (Q8).
  • the gate of the switching element 528 is electrically connected to the clamp control unit 525.
  • the clamp control unit 525 includes an AND circuit and a buffer circuit that control the switching element 528, and a comparator that compares the voltage at the second terminal Q7 with a preset voltage and outputs the comparison result to the AND circuit.
  • the output control section 526 is a circuit that controls the operation of each of the first output switching element 529, the second output switching element 530, and the third output switching element 531.
  • a p-channel MOSFET is used as the first output switching element 529
  • an n-channel MOSFET is used as the second output switching element 530 and the third output switching element 531.
  • An output signal is output from the second terminal Q6 as the voltage at the second terminal Q6 changes based on the on/off operation of the first output switching element 529, the second output switching element 530, and the third output switching element 531.
  • the gates of the first output switching element 529, the second output switching element 530, and the third output switching element 531 are electrically connected to the output control unit 526.
  • the drain of the first output switching element 529 is electrically connected to the drain of the third output switching element 531.
  • the connection point between the drain of the first output switching element 529 and the drain of the third output switching element 531 is electrically connected to the second terminal Q6.
  • the source of the first output switching element 529 and the drain of the second output switching element 530 are electrically connected to the second terminal Q5.
  • the source of the second output switching element 530 is electrically connected to both the second terminal Q6 and the output control unit 526.
  • a resistor 532 is electrically connected between the source of the second output switching element 530 and the gate of the third output switching element 531.
  • the fault signal input to the second terminal Q2 is input to the non-saturation fault detection unit 527.
  • the non-saturation fault detection unit 527 outputs the input fault signal to the logic unit 523.
  • the non-saturation fault detection unit 527 is electrically connected to the current source 533 and the switching element 535.
  • the current source 533 is electrically connected to the second terminal Q5 and the second terminal Q2.
  • the current source 533 supplies a current to the desaturation fault detection unit 527.
  • An n-channel MOSFET is used as the switching element 535.
  • the drain of the switching element 535 is electrically connected to the second terminal Q2 via the resistor 534, and the source of the switching element 535 is electrically connected to the second terminal Q2.
  • the gate of the switching element 535 is electrically connected to the desaturation fault detection unit 527. Therefore, the desaturation fault detection unit 527 controls the operation of the switching element 535.
  • the desaturation fault detection unit 527 includes a comparator electrically connected to the second terminal Q2, a flip-flop circuit to which the output signal of the comparator is input, and an AND circuit that controls the switching element 535.
  • a current source 537, a switching element 538, and a resistor 539 are provided between the second terminal Q4 and the comparator 536.
  • the current source 537 is electrically connected to the second terminal Q5 and the second terminal Q4.
  • An n-channel MOSFET is used as the switching element 538.
  • the drain of the switching element 538 is electrically connected to the second terminal Q4, and the source of the switching element 538 is electrically connected to the second terminal Q1 (Q8).
  • the drain of the switching element 538 is electrically connected to the comparator 536.
  • the resistor 539 is provided between the current source 537 and the second terminal Q4.
  • the first terminal of the resistor 539 is electrically connected to the second terminal Q4, and the second terminal of the resistor 539 is electrically connected to the connection point between the current source 537 and the drain of the switching element 538.
  • the first chip 60 includes the first transformer 321, and the second chip 70 includes the second transformer 322, but this is not limited to the above.
  • the first chip 60 may include the second transformer 322, and the second chip 70 may include the first transformer 321.
  • the first chip 60 may include both the first transformer 321 and the second transformer 322.
  • the second chip 70 may include both the first transformer 321 and the second transformer 322.
  • Inter-chip wires WA1 to WA3 connecting first chip 60 and second chip 70 are parallel to each other in a plan view. According to this configuration, when inspecting the wire heights of the inter-chip wires WA1 to WA3, variations in the wire heights of the inter-chip wires WA1 to WA3 are less likely to occur, and therefore the wire heights of the inter-chip wires WA1 to WA3 can be inspected with high accuracy.
  • inter-chip wires WA4 to WA6 connecting first chip 60 and second chip 70 are parallel to each other in a plan view. According to this configuration, when inspecting the wire heights of the inter-chip wires WA4 to WA6, variations in the wire heights of the inter-chip wires WA4 to WA6 are less likely to occur, and therefore the wire heights of the inter-chip wires WA4 to WA6 can be inspected with high accuracy.
  • a signal transmission device 10 of the 21st embodiment will be described with reference to Figures 74 to 78.
  • the signal transmission device 10 of the 21st embodiment is different from the signal transmission device 10 of the first embodiment in the configuration of the first chip 60.
  • the differences in the configuration of the first chip 60 from the first embodiment will be described in detail. Also, the same reference numerals are used for the components common to the first embodiment, and the description thereof will be omitted.
  • a passivation film 161 is formed on the layer surface 151 of the element insulating layer 150, while a plurality of first electrode pads 67 are not formed on the layer surface 151.
  • the passivation film 161 is in contact with the layer surface 151, and the plurality of first electrode pads 67 are arranged spaced apart from the layer surface 151 in the Z direction.
  • the passivation film 161 is formed over the entire layer surface 151 of the element insulating layer 150.
  • the first chip 60 further includes a first organic insulating layer 191 formed on the passivation film 161, and a second organic insulating layer 192 formed on the first organic insulating layer 191.
  • the first organic insulating layer 191 corresponds to the "first resin layer”
  • the second organic insulating layer 192 corresponds to the "second resin layer.”
  • Both the first organic insulating layer 191 and the second organic insulating layer 192 are formed of an insulating material having a relative dielectric constant different from that of the element insulating layer 150.
  • Both the first organic insulating layer 191 and the second organic insulating layer 192 may contain at least one of polyimide, phenolic resin, and epoxy resin.
  • the first organic insulating layer 191 and the second organic insulating layer 192 may be formed of the same resin material or different resin materials.
  • the first organic insulating layer 191 is provided for the purpose of improving surge voltage resistance.
  • the thickness of the first organic insulating layer 191 is thinner than the thickness of the element insulating layer 150.
  • the thickness of the first organic insulating layer 191 is thinner than the distance in the Z direction between the coil surface 181 of the conductor 180 in the coil layer 111BA of the first back side coil 111B and the layer surface 151 of the element insulating layer 150.
  • the thickness of the first organic insulating layer 191 is thicker than the thickness of the conductor 180.
  • the thickness of the first organic insulating layer 191 is thicker than the thickness of the conductor 170 of the first front side coil 111A.
  • the thickness of the first organic insulating layer 191 is set according to, for example, a desired dielectric strength voltage (dielectric breakdown resistance).
  • the first surface side coil 111A and the first electrode pads 67 are formed on the first organic insulating layer 191. In other words, both the first surface side coil 111A and the first electrode pads 67 are provided outside the element insulating layer 150. It can also be said that both the first surface side coil 111A and the first electrode pads 67 are arranged at a distance from the element insulating layer 150 in the Z direction. The first surface side coil 111A and the first electrode pads 67 are provided at the same positions as each other in the Z direction.
  • the second to fourth surface side coils 112A to 114A are also formed on the first organic insulating layer 191. In this way, the first to fourth surface side coils 111A to 114A correspond to "surface side coils".
  • the first surface side coil 111A and the multiple first electrode pads 67 are covered by a second organic insulating layer 192.
  • the second organic insulating layer 192 has an opening 192A that exposes a portion of the surface of each first electrode pad 67 in the Z direction.
  • the second organic insulating layer 192 is a protective film that protects the first chip 60 and constitutes the chip surface 61.
  • the coil back surface 172 of the conductor 170 of the first surface side coil 111A is in contact with the first organic insulating layer 191.
  • the first surface side coil 111A is covered with the first organic insulating layer 191 and the second organic insulating layer 192.
  • the second organic insulating layer 192 is in contact with the coil front surface 171 and a pair of coil side surfaces 173 of the conductor 170.
  • the second organic insulating layer 192 is interposed between adjacent conductors 170 in the Y direction of the first surface side coil 111A.
  • the thickness of the second organic insulating layer 192 is thinner than the thickness of the element insulating layer 150.
  • the thickness of the second organic insulating layer 192 is thinner than the distance in the Z direction between the coil surface 181 of the conductor 180 in the coil layer 111BA of the first back side coil 111B and the layer surface 151 of the element insulating layer 150.
  • the thickness of the second organic insulating layer 192 is thicker than the thickness of the conductor 180.
  • the thickness of the second organic insulating layer 192 is thicker than the thickness of the conductor 170.
  • the thickness of the second organic insulating layer 192 is thicker than the thickness of the first electrode pad 67A (the size of the first electrode pad 67A in the Z direction).
  • the first back side coil 111B is embedded in the element insulating layer 150, as in the first embodiment.
  • the first back side coil 111B is disposed closer to the layer back surface 152 of the element insulating layer 150.
  • the second to fourth back side coils 112B to 114B are also embedded in the element insulating layer 150.
  • the first to fourth back side coils 111B to 114B correspond to "back side coils”.
  • both the element insulating layer 150 and the first organic insulating layer 191 are interposed between the first front side coil 111A and the first back side coil 111B in the Z direction.
  • both an inorganic insulating layer and an organic insulating layer are interposed between the first front side coil 111A and the first back side coil 111B in the Z direction.
  • three different layers, the element insulating layer 150, the passivation film 161, and the first organic insulating layer 191 are interposed between the first front side coil 111A and the first back side coil 111B in the Z direction.
  • the front-side guard ring 115 (see FIG. 15) is formed on the first organic insulating layer 191. That is, the front-side guard ring 115 is provided at the same position in the Z direction as the first front-side coil 111A and the first electrode pad 67A.
  • the via 117 is configured by a laminated structure of a first portion, a second portion, and a third portion. The first portion penetrates in the Z direction from the back-side guard ring 116 (see FIG. 17) to the layer surface 151 of the element insulating layer 150. The first portion is in contact with the back-side guard ring 116.
  • the second portion penetrates the passivation film 161 in the Z direction to connect to the first portion and is formed on the passivation film 161.
  • the second portion is covered by the first organic insulating layer 191.
  • the third portion penetrates in the Z direction through a portion of the first organic insulating layer 191 that covers the second portion and connects to both the second portion and the front-side guard ring 115.
  • the first chip 60 has a two-layer laminate structure of the first organic insulating layer 191 and the second organic insulating layer 192, but this is not limited to this.
  • the first chip 60 may have a structure in which three or more organic insulating layers are laminated.
  • FIG. 76 to 78 a method for manufacturing the first chip 60, in particular a method for manufacturing the first surface side coil 111A will be described.
  • Figures 76 to 78 mainly show a process for forming a part of the first surface side coil 111A in the element insulating layer 150.
  • the manufacturing method of the first chip 60 includes the steps of preparing a substrate 830, forming an element insulating layer 850 on the substrate 830, forming a first back side coil 111B on the element insulating layer 850, and forming a passivation film 861 on the element insulating layer 850.
  • the second to fourth back side coils 112B to 114B are formed simultaneously with the step of forming the first back side coil 111B.
  • the substrate 830 is a substrate that constitutes the multiple substrates 130.
  • the element insulating layer 850 is formed over an area that corresponds to the multiple substrates 130.
  • the element insulating layer 850 corresponds to the element insulating layer 150 of the first chip 60.
  • the passivation film 861 is formed over the entire surface of the element insulating layer 850.
  • the passivation film 861 corresponds to the passivation film 161 of the first chip 60.
  • the manufacturing method of the first chip 60 includes a step of forming a first organic insulating layer 891. More specifically, the first organic insulating layer 891 is formed on the passivation film 861 by, for example, a spin coating method.
  • the first organic insulating layer 891 may contain at least one of polyimide, phenolic resin, and epoxy resin.
  • the first organic insulating layer 891 corresponds to the first organic insulating layer 191 of the first chip 60.
  • the manufacturing method of the first chip 60 includes a step of forming the first surface side coil 111A and the first electrode pad 67A. More specifically, a barrier layer (not shown) constituting the first surface side coil 111A and the first electrode pad 67A is formed on the first organic insulating layer 191, for example, by sputtering.
  • the barrier layer is a base conductive layer for plating the conductor 170 and the first electrode pad 67.
  • the barrier layer may contain at least one of titanium, titanium nitride, tantalum, and tantalum nitride, for example.
  • the barrier layer is removed from the positions other than the positions where the conductor 170 and the first electrode pad 67 of the first surface side coil 111A are to be formed, for example, by lithography and etching.
  • a conductive material constituting the conductor 170 and the first electrode pad 67 is plated on the barrier layer.
  • copper is used as the conductive material.
  • the manufacturing method of the first chip 60 includes a step of forming a second organic insulating layer 892. More specifically, the second organic insulating layer 892 is formed on the first organic insulating layer 891 by, for example, spin coating. The second organic insulating layer 892 is formed so as to cover the first surface side coil 111A and the first electrode pad 67. Although not shown, the second organic insulating layer 892 is formed so as to cover the second to fourth surface side coils 112A to 114A and the other first electrode pads 67. Next, an opening 892A that opens a part of the first electrode pad 67 in the Z direction is formed in the second organic insulating layer 892 by lithography and etching. Note that openings that open a part of each of the other first electrode pads 67 in the Z direction are also formed at the same time.
  • the manufacturing method of the first chip 60 includes a singulation process.
  • the substrate 830, the passivation film 861, the first organic insulating layer 891, and the second organic insulating layer 892 are cut by dicing. Through the above processes, the first chip 60 is manufactured.
  • the first chip 60 includes a first organic insulating layer 191 provided on the element insulating layer 150, and a second organic insulating layer 192 provided on the first organic insulating layer 191.
  • the first transformer 321 includes first to fourth front surface side coils 111A to 114A that are disposed on the first organic insulating layer 191 and covered by the second organic insulating layer 192, and first to fourth back surface side coils 111B to 114B that are disposed opposite the first to fourth front surface side coils 111A to 114A in the Z direction and embedded in the element insulating layer 150.
  • the distance in the Z direction between the first to fourth front side coils 111A to 114A and the first to fourth back side coils 111B to 114B can be increased by thickening the first organic insulating layer 191.
  • the insulation withstand voltage between the first to fourth front side coils 111A to 114A and the first to fourth back side coils 111B to 114B can be improved by thickening the first organic insulating layer 191.
  • the configuration of the element insulating layer 150 can be simplified.
  • the first organic insulating layer 191 can be easily thickened by a spin coating method. As a result, the lead time can be shortened compared to when the element insulating layer 150 is thickened, and the manufacturing cost can be reduced.
  • a signal transmission device 10 of the 22nd embodiment will be described with reference to Fig. 79.
  • the signal transmission device 10 of the 22nd embodiment is different from the signal transmission device 10 of the first embodiment in the configuration of the first chip 60.
  • the differences in the configuration of the first chip 60 from the first embodiment will be described in detail. Also, the same reference numerals are used for the components common to the first embodiment, and the description thereof will be omitted.
  • the first chip 60 includes a low dielectric layer 193 having a lower dielectric constant than the passivation film 161.
  • the low dielectric layer 193 is formed on the passivation film 161.
  • the low dielectric layer 193 is formed over the entire surface of the passivation film 161.
  • the low dielectric layer 193 is in contact with the surface of the passivation film 161. It can be said that the low dielectric layer 193 is interposed between the passivation film 161 and the sealing resin 90 in the Z direction so that the passivation film 161 and the sealing resin 90 do not come into contact with each other.
  • the thickness of the low dielectric layer 193 (the size of the low dielectric layer 193 in the Z direction) is equal to or less than the thickness of the passivation film 161. In one example, the thickness of the low dielectric layer 193 is thinner than the thickness of the passivation film 161. The thickness of the low dielectric layer 193 can be changed as desired. In one example, the thickness of the low dielectric layer 193 may be thicker than the thickness of the passivation film 161.
  • the protective film 162 is formed on the low dielectric layer 193.
  • the protective film 162 is in contact with the surface of the low dielectric layer 193.
  • the low dielectric layer 193 is sandwiched in the Z direction between the passivation film 161 and the protective film 162.
  • the protective film 162 is in contact with the sealing resin 90.
  • the thickness of the protective film 162 is thicker than the thickness of the low dielectric layer 193. In other words, the thickness of the low dielectric layer 193 is thinner than the thickness of the protective film 162.
  • the element insulating layer 150 is made of a material containing silicon oxide (SiO 2 ), and therefore the relative dielectric constant of the element insulating layer 150 is about 4.1.
  • the passivation film 161 is made of a material containing silicon nitride (SiN), and therefore the relative dielectric constant of the passivation film 161 is about 7.0. In other words, the relative dielectric constant of the passivation film 161 is higher than the relative dielectric constant of the element insulating layer 150.
  • the relative dielectric constant of the protective film 162 is about 2.9.
  • the sealing resin 90 is made of a material containing epoxy resin, and therefore the relative dielectric constant of the sealing resin 90 is about 3.9. That is, the relative dielectric constant of the sealing resin 90 is lower than the dielectric constant of the passivation film 161. The relative dielectric constant of the sealing resin 90 is higher than the dielectric constant of the protective film 162.
  • the low dielectric layer 193 has a lower dielectric constant than the passivation film 161.
  • the low dielectric layer 193 is equal to or lower than the dielectric constant of the element insulating layer 150. More specifically, the low dielectric layer 193 is lower than the dielectric constant of the element insulating layer 150.
  • the low dielectric layer 193 may be equal to or lower than the dielectric constant of the sealing resin 90.
  • the low dielectric layer 193 may be formed of a material containing silicon oxide (SiO 2 ), for example. In this way, the low dielectric layer 193 may be formed of the same material as the element insulating layer 150. The low dielectric layer 193 may have a lower dielectric constant than the element insulating layer 150.
  • the low dielectric layer 193 may be formed of a low-K film.
  • the low-K film may be appropriately selected from, for example, a carbon-added silicon oxide film (SiOC), a fluorine-added silicon oxide film (SiOF), a porous film, and the like.
  • the low dielectric layer 193 When the low dielectric layer 193 is formed of a carbon-added silicon oxide film, the low dielectric layer 193 has a dielectric constant of 2.5 or more and 3.0 or less. When the low dielectric layer 193 is formed of a fluorine-added silicon oxide film, the low dielectric layer 193 has a dielectric constant of 3.4 or more and 3.8 or less. When the low dielectric layer 193 is formed of a porous film, the low dielectric layer 193 has a dielectric constant of less than 2.5. In this manner, by using a Low-K film for the low dielectric layer 193 , the relative dielectric constant of the low dielectric layer 193 can be made lower than those of the element insulating layer 150 and the sealing resin 90 .
  • the first chip 60 includes an element insulating layer 150, a passivation film 161 formed on the element insulating layer 150 so as to cover the element insulating layer 150, and a low dielectric layer 193 formed on the surface of the passivation film 161 and having a relative dielectric constant lower than that of the passivation film 161.
  • the sealing resin 90 covers the low dielectric layer 193.
  • the low dielectric layer 193 is interposed between the passivation film 161 and the sealing resin 90, thereby preventing contact between the passivation film 161 and the sealing resin 90. This makes it possible to prevent partial discharges, and in turn creeping discharges, caused by gaps that exist at the boundary between the sealing resin 90 and the passivation film 161. This makes it possible to improve the reliability of the first chip 60.
  • the relative dielectric constant of the low dielectric layer 193 is equal to or lower than the dielectric constant of the sealing resin 90 . According to this configuration, the inception voltage of partial discharge at the boundary between the low dielectric layer 193 and the sealing resin 90 can be increased, thereby suppressing the occurrence of partial discharge, and ultimately creeping discharge, due to gaps existing at the boundary between the low dielectric layer 193 and the sealing resin 90.
  • the thickness of the low dielectric layer 193 is equal to or less than the thickness of the passivation film 161. This configuration prevents the Z-direction dimension of the first chip 60 from increasing. In other words, the height of the first chip 60 can be reduced.
  • a signal transmission device 10 of the 23rd embodiment will be described with reference to Figures 80 to 86.
  • the signal transmission device 10 of the 23rd embodiment is different from the signal transmission device 10 of the first embodiment in the configuration of the first chip 60.
  • the differences in the configuration of the first chip 60 from the first embodiment will be described in detail.
  • the same reference numerals are used for the components common to the first embodiment, and the description thereof will be omitted.
  • Fig. 80 shows an enlarged cross-sectional structure of a part of the first surface side coil 111A and its surroundings in the first chip 60. Note that, in order to make the drawing easier to understand, hatching lines of some of the components of the first chip 60 are omitted in Fig. 80.
  • the surface side corner portion 176 formed by the coil surface 171 and the pair of coil side surfaces 173 of the conductor 170 of the first surface side coil 111A is formed in a rounded curved shape, unlike the first embodiment.
  • the surface side corner portion 176 can also be said to have an R surface (curved surface).
  • an R surface (curved surface) is formed in the portion between the coil surface 171 and the pair of coil side surfaces 173 of the conductor 170. More specifically, the R surface (curved surface) is formed by both the barrier layer 174 and the metal layer 175 that make up the surface side corner portion 176.
  • the coil surface 171 of the conductor 170 is located above the layer surface 151 of the element insulating layer 150. In other words, the conductor 170 protrudes from the layer surface 151 of the element insulating layer 150.
  • the passivation film 161 covers the surface side corner portion 176 and the coil surface 171 of the conductor 170. Therefore, the surface side corner portion 176 is not in contact with the element insulating layer 150, but is in contact with the passivation film 161.
  • the portion of the pair of coil side surfaces 173 of the conductor 170 that is closer to the coil back surface 172 than the surface side corner portion 176 is in contact with the element insulating layer 150.
  • the relationship between the conductor 170 and the element insulating layer 150 can be changed as desired.
  • the conductor 170 may be embedded in the element insulating layer 150.
  • the element insulating layer 150 may be provided so that the surface side corner portion 176 of the conductor 170 and the coil surface 171 are in contact with the element insulating layer 150.
  • a passivation film 161 is formed over the entire surface of the layer surface 151 of the element insulating layer 150.
  • the conductor 170 of the second to fourth surface side coils 112A to 114A also has a surface side corner portion 176 formed by the coil surface 171 and a pair of coil side surfaces 173, which is rounded and curved.
  • the configuration of the first to fourth surface side coils 111A to 114A can be changed as desired. In other words, in the 23rd embodiment, it is sufficient that the surface side corner portion 176 of at least one of the first to fourth surface side coils 111A to 114A is rounded and curved.
  • FIG. 81 to 86 a method for manufacturing the first chip 60, in particular a method for manufacturing the first surface side coil 111A will be described.
  • Figures 81 to 86 mainly show a process for forming a part of the first surface side coil 111A in the element insulating layer 850.
  • the method of manufacturing the first chip 60 includes the steps of preparing a substrate 830, forming an element insulating layer 850 on the substrate 830 (see FIG. 76, for example), and forming a first back surface side coil 111B (see FIG. 76) on the element insulating layer 850.
  • the second to fourth back surface side coils 112B to 114B are formed simultaneously with the step of forming the first back surface side coil 111B.
  • the manufacturing method of the first chip 60 includes a step of forming a recess 853 in the element insulating layer 850. More specifically, in this step, the layer surface 851 of the element insulating layer 850 is selectively etched to form the recess 853.
  • the recess 853 includes a bottom surface 853A and a pair of side surfaces 853B connecting the bottom surface 853A and the layer surface 851.
  • the pair of side surfaces 853B are formed in a tapered shape approaching each other in the Y direction from the layer surface 851 toward the bottom surface 853A.
  • the method for manufacturing the first chip 60 includes a step of forming a barrier layer 901. More specifically, the barrier layer 901 is formed on both the pair of side surfaces 853B and the bottom surface 853A of the recess 853 and the layer surface 851 of the element insulating layer 850, for example, by a sputtering method.
  • the barrier layer 901 may contain tantalum or tantalum nitride.
  • the barrier layer 901 is formed of a laminated structure (Ta/TaN/Ta) of a first layer containing tantalum, a second layer containing tantalum nitride laminated on the first layer, and a third layer containing tantalum laminated on the second layer.
  • the manufacturing method of the first chip 60 includes a step of forming a metal layer 902. More specifically, a conductive material for the conductor 170 is plated and grown from the barrier layer 901. In one example, copper is plated and grown from the barrier layer 901. This forms the metal layer 902 in the recess 853 and on the element insulating layer 850.
  • the metal layer 902 is formed, for example, from a material containing copper.
  • the method for manufacturing the first chip 60 includes a step of removing the barrier layer 901 and the metal layer 902 on the element insulating layer 850. More specifically, both the barrier layer 901 and the metal layer 902 on the element insulating layer 850 are removed by chemical mechanical polishing (CMP). This exposes the layer surface 851 of the element insulating layer 850.
  • CMP chemical mechanical polishing
  • the manufacturing method of the first chip 60 includes a step of removing the upper end of the element insulating layer 850. More specifically, the entire upper end of the element insulating layer 850 is removed by dry etching or wet etching. As a result, the layer surface 851 after the upper end of the element insulating layer 850 is removed is located lower (closer to the bottom surface 853A of the recess 853) than the respective upper end surfaces of the barrier layer 901 and the metal layer 902. In other words, the upper ends of the barrier layer 901 and the metal layer 902 protrude from the layer surface 851.
  • the manufacturing method of the first chip 60 includes a process of removing both ends in the Y direction (surface side corner portions 903 in FIG. 84) of the upper end portions of the barrier layer 901 and the metal layer 902. More specifically, a resist (not shown) is formed on the upper end surface of the metal layer 902. The resist is formed so that the surface side corner portions 903 are exposed in a plan view. Next, the barrier layer 901 and the metal layer 902 constituting the surface side corner portions 903 are removed by dry etching or wet etching. As a result, the surface side corner portions 903 are formed in a curved shape. Through the above process, the conductor 170 is formed. As a result, the first surface side coils 111A to 114A are formed. Although not shown, a plurality of first electrode pads 67 are formed in parallel with the process of forming the conductor 170 shown in FIG. 81 to FIG. 85.
  • the manufacturing method of the first chip 60 includes a step of forming a passivation film 861. More specifically, the passivation film 861 is formed so as to cover the coil surface 171 and the surface side corner portion 176 of the conductor 170 and the layer surface 851 of the element insulating layer 850, for example, by chemical vapor deposition (CVD) or sputtering.
  • the passivation film 861 is formed of a material containing, for example, silicon nitride.
  • the manufacturing method of the first chip 60 includes a process of forming a protective film 862 (see FIG. 39).
  • the protective film 862 is formed on the passivation film 861 by CVD or sputtering.
  • the protective film 862 is formed of a material containing silicon oxide, for example.
  • openings that expose parts of the first electrode pads 67 are formed in both the protective film 862 and the passivation film 861 by etching.
  • the protective film 862, the passivation film 861, the element insulating layer 850, and the substrate 830 are cut by dicing to separate them into individual chips. Through the above processes, the first chip 60 is manufactured.
  • the first to fourth surface side coils 111A to 114A of the first transformer 321 have a coil front surface 171, a coil back surface 172 opposite the coil front surface 171, and a coil side surface 173 connecting the coil front surface 171 and the coil back surface 172.
  • a curved surface is formed between the coil front surface 171 and the coil side surface 173.
  • This configuration can reduce electric field concentration at the surface corner portion 176, which is formed by the coil surface 171 and the coil side surface 173. This prevents the surface corner portion 176 from becoming the starting point of dielectric breakdown, thereby improving the dielectric strength of the first chip 60.
  • a signal transmission device 10 of the 24th embodiment will be described with reference to Figures 87 to 92.
  • the signal transmission device 10 of the 24th embodiment is different from the signal transmission device 10 of the 21st embodiment in the configuration of the first chip 60.
  • the differences in the configuration of the first chip 60 from the 21st embodiment will be described in detail.
  • the same reference numerals are used for the components common to the 21st embodiment, and the description thereof will be omitted.
  • Fig. 87 shows an enlarged cross-sectional structure of a part of the first surface side coil 111A and its surroundings in the first chip 60. Note that, in order to make the drawing easier to understand, hatching lines of some of the components of the first chip 60 are omitted in Fig. 87.
  • the first chip 60 of the 24th embodiment like the 21st embodiment, includes a first organic insulating layer 191 formed on the layer surface 151 of the element insulating layer 150, and a second organic insulating layer 192 formed on the first organic insulating layer 191. Both the first surface side coil 111A and the first electrode pad 67A are formed on the first organic insulating layer 191, like the 21st embodiment.
  • the surface side corner portion 176 formed by the coil surface 171 and the pair of coil side surfaces 173 of the conductor 170 of the first surface side coil 111A is formed in a rounded curved shape, unlike the first embodiment.
  • the surface side corner portion 176 can also be said to have an R surface (curved surface).
  • an R surface (curved surface) is formed in the portion between the coil surface 171 and the pair of coil side surfaces 173 of the conductor 170.
  • the coil surface 171 of the conductor 170 is located above the layer surface 151 of the element insulating layer 150. In other words, the conductor 170 protrudes from the layer surface 151 of the element insulating layer 150.
  • the passivation film 161 covers the surface side corner portion 176 and the coil surface 171 of the conductor 170. Therefore, the surface side corner portion 176 is not in contact with the element insulating layer 150, but is in contact with the passivation film 161.
  • the portion of the pair of coil side surfaces 173 of the conductor 170 that is closer to the coil back surface 172 than the surface side corner portion 176 is in contact with the element insulating layer 150.
  • the back side corner portion 177 formed by the coil back side 172 and the pair of coil side surfaces 173 of the conductor 170 is formed in a rounded curved shape, unlike the first embodiment.
  • the back side corner portion 177 can also be said to have an R surface (curved surface).
  • an R surface (curved surface) is formed in the portion of the conductor 170 between the coil back side 172 and the pair of coil side surfaces 173.
  • the conductor 170 is covered by the second organic insulating layer 192. More specifically, the coil surface 171, the pair of coil side surfaces 173, the front side corner portion 176, and the back side corner portion 177 of the conductor 170 are in contact with the second organic insulating layer 192.
  • the conductive wire 170 is formed by a laminated structure of a seed layer 178 and a metal layer 179 formed on the seed layer 178 .
  • the seed layer 178 constitutes the coil back surface 172. That is, the seed layer 178 is in contact with the first organic insulating layer 191.
  • the seed layer 178 may contain at least one of titanium, titanium nitride, and copper, for example.
  • the seed layer 178 is formed by a laminated structure of a first layer containing titanium and a second layer containing copper laminated on the first layer.
  • the metal layer 179 is disposed at a distance from the first organic insulating layer 191 in the Z direction.
  • the metal layer 179 includes a coil surface 171, a pair of coil side surfaces 173, a surface side corner portion 176, and a back side corner portion 177.
  • the metal layer 179 is covered with a second organic insulating layer 192.
  • Method of manufacturing the first chip A method for manufacturing the first chip 60, in particular, a method for manufacturing the first surface side coil 111A will be described with reference to FIGS.
  • the manufacturing method of the first chip 60 includes the steps of preparing a substrate 830 (see, for example, FIG. 76), forming an element insulating layer 850 on the substrate 130, forming a first back side coil 111B (see, for example, FIG. 76) on the element insulating layer 850, forming a passivation film 861, and forming a first organic insulating layer 891.
  • the second to fourth back side coils 112B to 114B are formed simultaneously with the step of forming the first back side coil 111B.
  • the passivation film 861 is formed on the layer surface 851 of the element insulating layer 850 by, for example, a CVD method or a sputtering method.
  • the first organic insulating layer 891 is formed on the passivation film 161 by, for example, a spin coating method.
  • the method for manufacturing the first chip 60 includes a step of forming a seed layer 911. More specifically, the seed layer 911 is formed on the first organic insulating layer 891 by, for example, a sputtering method.
  • the seed layer 911 may contain titanium and copper.
  • the seed layer 911 is formed of a laminated structure (Ti/Cu) of a first seed layer 911A containing titanium and a second seed layer 911B containing copper laminated on the first seed layer 911A.
  • the method for manufacturing the first chip 60 includes a step of forming a resist 920. More specifically, first, a resist 920 is formed on the seed layer 911. Next, the resist 920 is selectively exposed to light and developed to form openings 921 that expose the portions where the conductive wires 170 (see FIG. 87) are to be formed and the portions where the first electrode pads 67 (see FIG. 77) are to be formed.
  • Figure 88 shows an opening 921 where the conductor 170 is to be formed.
  • the surfaces of the resist 920 that form the opening 921 are tapered so that they approach each other toward the seed layer 911.
  • the portion of the opening 921 in the resist 920 that contacts the seed layer 911 has an inward protrusion 922 that is curved and concave.
  • the manufacturing method of the first chip 60 includes a step of forming a metal layer 912. More specifically, a conductive material for the conductor 170 is plated from the seed layer 911. In one example, copper is plated from the seed layer 911. This forms a metal layer 912 in the opening 921.
  • the metal layer 912 is formed of a material containing copper, for example.
  • the metal layer 912 is integrated with the second seed layer 911B.
  • the interface between the second seed layer 911B and the metal layer 912 is shown by a two-dot chain line to make the drawing easier to understand. However, in reality, this interface may not be formed.
  • the metal layer 912 is formed in the opening 921 where the first electrode pad 67 is to be formed. This produces the first electrode pad 67.
  • the end of the metal layer 912 on the seed layer 911 side has a rounded corner formed by the inward protrusion 922 of the resist 920 to form an R surface (curved surface).
  • the metal layer 912 is formed with an R surface (curved surface) that corresponds to the rear side corner portion 177 of the conductor 170.
  • the method for manufacturing the first chip 60 includes a step of removing the resist 920 (see FIG. 89), thereby exposing the seed layer 911 and the metal layer 912.
  • the manufacturing method of the first chip 60 includes a step of etching the seed layer 911 and the metal layer 912.
  • this step includes a step of forming curved surfaces at both ends in the Y direction of the upper end of the metal layer 912 (front surface side corner portions 913 in FIG. 90) and a step of removing the second seed layer 911B of the seed layer 911.
  • a resist (not shown) is formed on the upper end surface of the metal layer 912. The resist is formed so that the front surface side corner portions 913 are exposed in a plan view.
  • the metal layer 912 constituting the front surface side corner portions 913 is removed by dry etching or wet etching.
  • the front surface side corner portions 913 are formed with rounded R surfaces (curved surfaces). That is, in this step, the metal layer 912 is formed with R surfaces (curved surfaces) corresponding to the front surface side corner portions 176 of the conductive wire 170.
  • the second seed layer 911B is removed by dry etching or wet etching.
  • the method of manufacturing the first chip 60 involves removing the seed layer 911 except for the portion where the metal layer 912 is laminated. More specifically, the seed layer 911 except for the portion where the metal layer 912 is laminated is removed by, for example, etching. Through the above steps, the conductor 170 is formed. In this way, the first surface side coil 111A is formed. The second to fourth surface side coils 112A to 114A are also formed in a similar manner.
  • the manufacturing method of the first chip 60 includes a process of forming the second organic insulating layer 192.
  • the second organic insulating layer 192 is formed on the first organic insulating layer 191 by spin coating.
  • the second organic insulating layer 192 is formed so as to cover the conductive wires 170 and the first electrode pads 67A to 67F.
  • openings are formed in the second organic insulating layer 192 by etching, through which parts of the first electrode pads 67A to 67F are exposed.
  • the first to fourth surface side coils 111A to 114A of the first transformer 321 have a coil surface 171, a coil back surface 172 opposite the coil surface 171, and a coil side surface 173 connecting the coil surface 171 and the coil back surface 172.
  • a curved surface is formed between the coil surface 171 and the coil side surface 173.
  • a curved surface is formed between the coil back surface 172 and the coil side surface 173.
  • This configuration can alleviate electric field concentration at the front side corner portion 176 formed by the coil front surface 171 and the coil side surface 173, and can alleviate electric field concentration at the back side corner portion 177 formed by the coil back surface 172 and the coil side surface 173. This prevents the front side corner portion 176 and the back side corner portion 177 from becoming the starting point of dielectric breakdown, thereby improving the dielectric strength voltage of the first chip 60.
  • the signal transmission device 10 of the first embodiment may be combined with at least one of the configurations of the second, third, fifth, seventh, and eighth embodiments.
  • the signal transmission device 10 of the first embodiment may be combined with at least one of the configurations of the second, fourth, fifth, seventh, and eighth embodiments.
  • the signal transmission device 10 of the first embodiment may be combined with at least one of the configurations of the second, third, and sixth to eighth embodiments.
  • the signal transmission device 10 of the first embodiment may be combined with at least one of the configurations of the second, fourth, and sixth to eighth embodiments.
  • the signal transmission device 10 of the ninth embodiment may be combined with at least one of the configurations of the tenth, eleventh, thirteenth, and fifteenth embodiments.
  • the signal transmission device 10 of the ninth embodiment may be combined with at least one of the configurations of the tenth, twelfth, thirteenth, and fifteenth embodiments.
  • the signal transmission device 10 of the ninth embodiment may be combined with at least one of the configurations of the tenth, eleventh, fourteenth, and fifteenth embodiments.
  • the signal transmission device 10 of the ninth embodiment may be combined with at least one of the configurations of the tenth, twelfth, fourteenth, and fifteenth embodiments.
  • the signal transmission device 10 of the sixteenth embodiment may be combined with at least one of the configurations of the thirteenth, fifteenth, seventeenth, and eighteenth embodiments.
  • the signal transmission device 10 of the sixteenth embodiment may be combined with at least one of the configurations of the fourteenth, fifteenth, seventeenth, and eighteenth embodiments.
  • the signal transmission device 10 of the sixteenth embodiment may be combined with at least one of the configurations of the thirteenth, fifteenth, seventeenth, and nineteenth embodiments.
  • the signal transmission device 10 of the sixteenth embodiment may be combined with at least one of the configurations of the fourteenth, fifteenth, seventeenth, and nineteenth embodiments.
  • the signal transmission device 10 of the twentieth embodiment may be combined with at least one of the configurations of the second, third, fifth, seventh, and eighth embodiments.
  • the signal transmission device 10 of the twentieth embodiment may be combined with at least one of the configurations of the second, fourth, fifth, seventh, and eighth embodiments.
  • the signal transmission device 10 of the twentieth embodiment may be combined with at least one of the configurations of the second, third, and sixth to eighth embodiments.
  • the signal transmission device 10 of the twentieth embodiment may be combined with at least one of the configurations of the second, fourth, and sixth to eighth embodiments.
  • the first chip 60 of the first embodiment may be combined with at least one of the configurations of the twenty-first to twenty-fourth embodiments.
  • the first chip 60 of the ninth embodiment may be combined with at least one of the configurations of the twenty-first to twenty-fourth embodiments.
  • the first chip 60 of the sixteenth embodiment may be combined with at least one of the configurations of the twenty-first to twenty-fourth embodiments.
  • the first chip 60 of the twentieth embodiment may be combined with at least one of the configurations of the twenty-first to twenty-fourth embodiments.
  • the second chip 70 of the twentieth embodiment may be combined with at least one of the configurations of the twenty-first to twenty-fourth embodiments.
  • the first die pad 30 may be provided with one or more through holes penetrating the first die pad 30 in its thickness direction (Z direction). Each through hole is filled with sealing resin 90.
  • the second die pad 50 may be provided with one or more through holes that penetrate the second die pad 50 in its thickness direction (Z direction). Each through hole is filled with sealing resin 90.
  • the through holes 13AD to 16AD may be omitted from the first lead terminals 13 to 16. That is, regardless of the presence or absence of the through holes 12AD to 17AD, the second bond portion of the first lead wire WB may have both a configuration in which the security bond WB1 is provided and a configuration in which the security bond WB1 is not provided.
  • the security bond WB1 is provided on the second bond portion of the first lead wire WB at a location where the second bond portion of the first lead wire WB is considered to be relatively easy to peel off, and the security bond WB1 is not provided on the second bond portion of the first lead wire WB at a location where the second bond portion is considered to be relatively difficult to peel off.
  • peeling of the second bond portion it is considered that the second bond portion of a relatively long first lead wire WB is easily peeled off, and the second bond portion of a relatively short first lead wire WB is difficult to peel off.
  • the security bond WB1 is provided at the second bond portion of the relatively long first lead wire WB, and the security bond WB1 is not provided at the second bond portion of the relatively short first lead wire WB.
  • the through holes 43AD-45AD, 47AD may be omitted from the second lead terminals 43-45, 47.
  • the second bond portion of the second lead wire WD may have both a configuration in which the security bond WD1 is provided and a configuration in which the security bond WD1 is not provided.
  • the security bond WD1 is provided at the second bond portion of the second lead wire WD at a location where the second bond portion of the second lead wire WD is considered to be relatively easy to peel off, and the security bond WD1 is not provided at the second bond portion of the second lead wire WD at a location where the second bond portion is considered to be relatively difficult to peel off.
  • the second bond portion of a relatively long second lead wire WD is easily peeled off, and the second bond portion of a relatively short second lead wire WD is difficult to peel off.
  • a security bond WD1 is provided on the second bond portion of the relatively long second lead wire WD, and a security bond WD1 is not provided on the second bond portion of the relatively short second lead wire WD.
  • the coverage area of the plating layer 29 covering the wire connection portions 12AA to 17AA of the first lead terminals 12 to 17 can be changed as desired.
  • the plating layer 29 may cover the entire inner lead surface 21B of each of the wire connection portions 12AA to 17AA. In this case, a portion of the plating layer 29 may cover the tip surface 24B of the wire connection portions 12AA to 17AA.
  • the coverage area of the plating layer 29 covering the wire connection portions 42AA to 47AA of the second lead terminals 42 to 47 can be changed as desired.
  • the plating layer 29 may cover the entire inner lead surface 21B of each of the wire connection portions 42AA to 47AA. In this case, a portion of the plating layer 29 may cover the tip surface 24B of the wire connection portions 42AA to 47AA.
  • the coverage area of the plating layer 29 covering the wire connection portions 12AA to 14AA of the first lead terminals 12 to 14 can be changed as desired.
  • the plating layer 29 may cover the entire inner lead surface 21B of each of the wire connection portions 12AA to 14AA. In this case, a portion of the plating layer 29 may cover the tip surface 24B of the wire connection portions 12AA to 14AA.
  • the coverage area of the plating layer 29 covering the wire connection portions 42AA to 44AA of the second lead terminals 42 to 44 can be changed as desired.
  • the plating layer 29 may cover the entire inner lead surface 21B of each of the wire connection portions 42AA to 44AA. In this case, a portion of the plating layer 29 may cover the tip surface 24B of the wire connection portions 42AA to 44AA.
  • the coverage area of the plating layer 29 covering the wire connection portions 11AA to 13AA of the first lead terminals 11 to 13 can be changed as desired.
  • the plating layer 29 may cover the entire inner lead surface 21B of each of the wire connection portions 11AA to 13AA. In this case, a portion of the plating layer 29 may cover the tip surface 24B of the wire connection portions 11AA to 13AA.
  • the coverage area of the plating layer 29 covering the wire connection portions 41AA to 43AA of the second lead terminals 41 to 43 can be changed as desired.
  • the plating layer 29 may cover the entire inner lead surface 21B of each of the wire connection portions 41AA to 43AA. In this case, a portion of the plating layer 29 may cover the tip surface 24B of the wire connection portions 41AA to 43AA.
  • the end surface plating layer 27 may be omitted from at least one of the outer lead end surfaces 24A of the first outer lead portions 11B to 18B of the first lead terminals 11 to 18.
  • the end surface plating layer 27 may be omitted from at least one of the outer lead end surfaces 24A of the second outer lead portions 41B to 48B of the second lead terminals 41 to 48.
  • the end surface plating layer 27 may be omitted from at least one of the outer lead end surfaces 24A of the first outer lead portions 11B to 14B of the first lead terminals 11 to 14.
  • the end surface plating layer 27 may be omitted from at least one of the outer lead end surfaces 24A of the second outer lead portions 41B to 44B of the second lead terminals 41 to 44.
  • the arrangement of the interchip wires WA in plan view can be changed as desired.
  • six interchip wires WA1 to WA6 may be formed to be parallel to one another in plan view.
  • each of the interchip wires WA1 to WA6 extends, for example, along the X direction in plan view.
  • the material constituting the inter-chip wire WA is not limited to gold and can be changed as desired.
  • the material constituting the inter-chip wire WA is not limited to gold and can be changed as desired.
  • the material constituting the inter-chip wire WA is not limited to gold and can be changed as desired.
  • the material constituting the inter-chip wire WA is not limited to gold and can be changed as desired.
  • the material constituting the inter-chip wire WA is not limited to gold and can be changed as desired.
  • the material constituting the inter-chip wire WA is not limited to gold and can be changed as desired.
  • the material constituting the inter-chip wire WA is not limited to gold and can be changed as desired.
  • the material constituting the inter-chip wire WA is not limited to gold and can be changed as desired.
  • the material constituting the inter-chip wire WA is not limited to gold and can be changed as desired.
  • the material constituting the inter-chip wire WA is not limited to gold and can be changed as desired.
  • the material constituting the inter-chip wire WA is not limited to gold and can be changed as desired.
  • the material constituting the inter-chip wires WA is not limited to gold and can be changed arbitrarily.
  • the first lead wire WB is not limited to copper or aluminum and can be changed as desired.
  • the palladium coating on the surface of the copper wire may be omitted.
  • the first die pad wire WC, the second lead wire WD, and the second die pad wire WE can also be changed in the same manner.
  • the security bond WC1 may be omitted from the first die pad wire WC.
  • the security bond WE1 may be omitted from the second die pad wire WE.
  • the configuration of the first chip 60 may be changed to the first chip 60 shown in Figures 93 and 94.
  • the first chip 60 shown in Figures 93 and 94 has a larger ratio of the length in the longitudinal direction to the size in the lateral direction of the first chip 60 than the first chip 60 shown in Figures 15 to 18.
  • the front-side outer periphery guard ring 101 is formed in an annular shape so as to go around the outer periphery of the first chip 60.
  • the portion of the front-side outer periphery guard ring 101 adjacent to the second chip side surface 64 in the X direction and extending in the Y direction is connected to the front-side guard ring 115.
  • the configurations of the first transformer 321 and the second transformer 322 in the insulating transformer region 110 are the same as the configurations of the first transformer 321 and the second transformer 322 in the first embodiment.
  • the circuit region 120 a plurality of first functional units and a plurality of circuit elements of the first chip 60 are formed.
  • the plurality of first functional units and the plurality of circuit elements are similar to the plurality of first functional units and the plurality of circuit elements of the circuit region 120 of the first embodiment.
  • the circuit region 120 includes a first circuit unit CR1, a second circuit unit CR2, and a third circuit unit CR3.
  • a MOSFET is formed in the first circuit unit CR1 and the second circuit unit CR2.
  • the first circuit unit CR1 includes the PWM generating unit 303 of FIG. 14
  • the second circuit unit CR2 includes the logic unit 304 of FIG. 14.
  • a protection element is formed in the third circuit unit CR3.
  • a DMOSFET Double-Diffused MOSFET
  • the step portion 139 of the first chip 60 is not limited to being provided around the entire circumference of the substrate 130 in a plan view.
  • the step portion 139 may be provided partially on the first to fourth substrate sides 133 to 136 of the substrate 130.
  • the step portion 239 of the second chip 70 is not limited to being provided around the entire circumference of the substrate 230 in a plan view.
  • the step portion 239 may be provided partially on the first to fourth substrate sides 233 to 236 of the substrate 230.
  • one of the step portion 139 of the first chip 60 and the step portion 239 of the second chip 70 may be omitted. In other words, in the seventh embodiment, it is sufficient that a step portion is provided on at least one of the substrate 130 of the first chip 60 and the substrate 230 of the second chip 70.
  • the step portion 139 of the first chip 60 and the step portion 239 of the second chip 70 of the seventh embodiment may be applied. Also, in the ninth to twenty-fourth embodiments, the step portion 139 of the first chip 60 of the seventh embodiment may be applied. Also, in the ninth to twenty-fourth embodiments, the step portion 239 of the second chip 70 of the seventh embodiment may be applied.
  • the surface roughness Rz of each of the sealing front surface 91, the sealing rear surface 92, and the first to fourth sealing side surfaces 93 to 96 of the sealing resin 90 may be less than 8 ⁇ m.
  • the concentration of sulfur added to the sealing resin 90 can be changed as desired.
  • the concentration of sulfur added to the sealing resin 90 may be greater than 300 ⁇ g/g.
  • each of the third sealing side 95 and the fourth sealing side 96 can be changed as desired.
  • a plurality of grooves 95E may be formed in the center of the third sealing side 95 in the X direction.
  • a plurality of grooves 96E may be formed in the center of the fourth sealing side 96 in the X direction.
  • the number of grooves 95E on the third sealing side 95 can be changed as desired.
  • the third sealing side 95 may have only one groove 95E.
  • the number of grooves 96E on the fourth sealing side 96 can be changed as desired.
  • the fourth sealing side 96 may have only one groove 96E.
  • the depth of the multiple grooves 95E is constant, but is not limited to this. In one example, the depth of the central groove 95E in the X direction among the multiple grooves 95E may be deeper than the depth of the grooves 95E at both ends in the X direction. Similarly, the depth of the multiple grooves 96E is constant, but is not limited to this. In one example, the depth of the central groove 96E in the X direction among the multiple grooves 96E may be deeper than the depth of the grooves 96E at both ends in the X direction.
  • the signal transmission device 10 of each embodiment can be applied to an insulated gate driver that performs a switching operation of a power semiconductor element such as an IGBT (Insulated Gate Bipolar Transistor) that controls the drive of a motor.
  • a power semiconductor element such as an IGBT (Insulated Gate Bipolar Transistor) that controls the drive of a motor.
  • IGBT Insulated Gate Bipolar Transistor
  • Such an insulated gate driver can be applied to an inverter device of an electric vehicle or a hybrid vehicle.
  • the power supply voltage supplied to the first chip 60 of the signal transmission device 10 is 5V or 3.3V based on the ground potential.
  • a voltage of, for example, 600V or more is applied transiently to the second chip 70 compared to the ground potential of the first chip 60.
  • a half-bridge circuit in which a low-side switching element and a high-side switching element are connected in a totem pole shape is generally used as a motor driver circuit in an inverter device of a hybrid vehicle or
  • the Z direction used in this disclosure does not necessarily have to be the vertical direction, nor does it have to completely coincide with the vertical direction.
  • the various structures according to this disclosure are not limited to the "up” and “down” of the Z direction described in this specification being “up” and “down” in the vertical direction.
  • the X direction may be the vertical direction
  • the Y direction may be the vertical direction.
  • Appendix A2 The signal transmission device according to Appendix A1, wherein the first lead wire (WB) is a copper wire having a surface coated with palladium.
  • Appendix A3 Further comprising a plurality of second lead wires (WD) that individually connect the second chip (70) and the plurality of second lead terminals (41 to 48); The signal transmission device according to appendix A1 or A2, wherein the second lead wire (WD) is made of a material containing copper or aluminum.
  • Appendix A4 Further comprising a first die pad wire (WC) connecting the first chip (60) and the first die pad (30);
  • the signal transmission device according to any one of Appendixes A1 to A3, wherein the first die pad wire (WC) is made of a material containing copper or aluminum.
  • Appendix A5 Further comprising a second die pad wire (WE) connecting the second chip (70) and the second die pad (50);
  • the signal transmission device according to any one of Appendixes A1 to A4, wherein the second die pad wire (WE) is made of a material containing copper or aluminum.
  • the first die pad wire (WC) is a bonding wire
  • the signal transmission device according to Appendix A4 wherein a security bond (WC1) is formed at a joint portion of the first die pad wire (WC) with the first die pad (30).
  • the second die pad wire (WE) is a bonding wire, The signal transmission device according to Appendix A5, wherein a security bond (WE1) is formed at a joint portion of the second die pad wire (WE) with the second die pad (50).
  • the plurality of first lead terminals (12 to 17) are A first portion (12AB to 17AB) extending in the first direction (X direction); a second portion (12AA to 17AA) provided contiguous to the first portion (12AB to 17AB) and extending in a direction intersecting the first direction (X direction) with respect to the first portion (12AB to 17AB);
  • the second portion (12AA to 17AA) includes a side surface (12AC, 17AC) that intersects with the first lead wire (WB) connected to the second portion (12AA to 17AA) in a plan view
  • WB lead wire
  • Appendix A9 The signal transmission device according to any one of Appendix A1 to A8, wherein the plurality of inter-chip wires (WA) are formed so as to be parallel to each other in a plan view.
  • the plurality of first lead terminals (11 to 18) are a first connection terminal (11, 18) integrated with the first die pad; a first remote terminal (12-17) disposed at a distance from the first die pad;
  • the first remote terminals (12 to 17) have through holes (12AD to 17AD) penetrating in a thickness direction (Z direction) of the first remote terminals (12 to 17),
  • the signal transmission device according to any one of Appendixes A1 to A9, wherein the through holes (12
  • Each of the first lead terminals (11 to 18) is a first outer lead portion (11B to 18B) exposed to the outside of the sealing resin (90); a first inner lead portion (11A to 18A) provided inside the sealing resin (90) and connected to the first outer lead portion (11B to 18B);
  • the plurality of first lead terminals (12 to 17) are a first specific terminal (13-16) having a through hole (13AD-16AD) formed in the first inner lead portion (12A-17A) penet
  • the sealing resin (90) has a sealing surface (91), a sealing back surface (92) opposite to the sealing surface (91), and sealing side surfaces (93-96) connecting the sealing surface (91) and the sealing back surface (92),
  • the sealing side surface (93 to 96) is a first sealing side surface (93) to which the first lead terminals (11 to 18) are exposed; a second sealing side surface (94) to which the second lead terminals (41 to 48) are exposed; a third sealing side (95) and a fourth sealing side (
  • the first chip (60) is An element insulating layer (150); a first resin layer (191) provided on the element insulating layer (150); A second resin layer (192) provided on the first resin layer (191),
  • the isolation transformer (321) is a front side coil (111A to 114A) disposed on the first resin layer (191) and covered with the second resin layer (192);
  • the signal transmission device according to any one of appendices A1 to A12, further comprising a back side coil (111B to 114B) disposed opposite the front side coil (111A to 114A) in the thickness direction (Z direction) of the element insulating layer (150) and embedded in the element insulating layer (150).
  • the first chip (60) is An element insulating layer (150); a passivation film (161) formed on the element insulating layer (150) so as to cover the element insulating layer (150); A low dielectric layer (193) formed on the surface of the passivation film (161) and having a relative dielectric constant lower than that of the passivation film (161),
  • the signal transmission device according to any one of Appendices A1 to A12, wherein the sealing resin (90) covers the low dielectric layer (193).
  • the isolation transformer (321) is a front surface side coil (111A to 114A) disposed near a chip front surface (61) of the first chip (60); A back side coil (111B to 114B) arranged opposite the front side coil (111A to 114A),
  • the front side coils (111A to 114A) are A coil surface (171); A back surface (172) of the coil opposite to the front surface (171) of the coil; A coil side surface (173) that connects the coil front surface (171) and the coil back surface (172),
  • the signal transmission device according to any one of appendices A1 to A12, wherein a curved surface (176) is formed between the coil surface (171) and the coil side surface (173).
  • the first chip (60) is A flat substrate (130) mounted on the first die pad (30); An element insulating layer (150) formed on the substrate (130) and having at least a part of the isolation transformer (321) provided thereon;
  • the substrate (130) is a back surface (132) of the substrate facing the first die pad (30); a substrate surface (131) opposite to the substrate back surface (132); A substrate side surface (133 to 136) connecting the substrate back surface (132) and the substrate front surface (131); A first portion (137) including the rear surface (132) of the substrate; a second portion (138) disposed on the first portion (137) and including the substrate surface (131); A step portion (139) formed so that the second portion (138) is positioned inside the substrate (130) relative to the first portion (137).
  • the signal transmission device according to any one of Appendices A1 to A12.
  • the first die pad (30) is a first tip surface (31) facing the second die pad (50) in the first direction (X direction) in a plan view; a first base end surface (32) opposite the first tip end surface (31) in a plan view; A first side surface (33) and a second side surface (34) constituting both side surfaces in the second direction (Y direction); a first tip side curved surface (35A) formed between the first tip surface (31) and the first side surface (33); a second tip side curved surface (36A) formed between the first tip surface (31) and the second side surface (34); a first base end curved surface (37A) formed between the first base end surface (32) and the first side surface (33); a second base end curved surface (37B) formed between the first base end surface (32) and the second side surface (34);
  • the signal transmission device according to any one of Appendix A1 to A16, wherein, in a plan view, an arc length of both the first distal curved surface (35A) and the second distal
  • the first lead terminals (11 to 18) include first inner lead portions (11A to 18A) provided in the sealing resin (90),
  • the first inner lead portion (12A to 17A) includes a wire connection portion (12AA to 17AA) to which the first lead wire (WB) is connected,
  • the wire connection portion (12AA to 17AA) is an inner lead surface (21B) to which the first lead wire (WB) is bonded; an inner lead back surface (22B) facing the opposite side to the inner lead front surface (21
  • first lead terminals (11 to 18) include first outer lead portions (11B to 18B) protruding to the outside of the sealing resin (90),
  • the first outer lead portion (11B to 18B) is An outer lead surface (21A); an outer lead back surface (22A) facing the opposite side to the outer lead front surface (21A); outer lead side surfaces (23A) connecting the outer lead surface (21A) and the outer lead back surface (22A) at both ends in the width direction (Y direction) of the first
  • the signal transmission device according to any one of Appendices A1 to A19, wherein the outer surfaces (91 to 96) of the sealing resin (90) are formed so as to have a surface roughness Rz of 8 ⁇ m or more.
  • the second die pad (50) is a second tip surface (51) facing the first die pad (30) in the first direction (X direction) in a plan view; a second base end surface (52) opposite the second tip end surface (51) in a plan view; A third side surface (53) and a fourth side surface (54) constituting both side surfaces in the second direction (Y direction); a third tip side curved surface (55A) formed between the second tip surface (51) and the third side surface (53); a fourth tip side curved surface (56A) formed between the second tip surface (51) and the fourth side surface (54); a third base end curved surface (57A) formed between the second base end surface (52) and the third side surface (53); a fourth base end curved surface (57B) formed between the second base end surface (52) and the fourth side surface (54);
  • the signal transmission device according to any one of Appendix A1 to A20, wherein, in a plan view, the arc lengths of both the third distal curved surface (55A) and the fourth dis
  • [Appendix A22] Further comprising a plurality of second lead wires (WD) that individually connect the second chip (70) and the plurality of second lead terminals (41 to 48);
  • the plurality of second lead terminals (42 to 47) are a third portion (42AB to 47AB) extending in the first direction (X direction); a fourth portion (42AA to 47AA) provided contiguous to the third portion (42AB to 47AB) and extending in a direction intersecting the first direction (X direction) with respect to the third portion (42AB to 47AB);
  • the fourth portion (42AA to 47AA) includes a side surface (42AC) that intersects with the second lead wire (WD) connected to the fourth portion in a plan view,
  • the signal transmission device according to any one of Appendices A1 to A21, wherein the side surface (42AC) faces the second die pad (50) in a plan view.
  • the plurality of second lead terminals (41 to 48) are a second connection terminal (41, 48) integrated with the second die pad; and a second remote terminal (42-47) disposed at a distance from the second die pad,
  • the second remote terminals (42 to 47) have through holes (42AD to 47AD) penetrating in a thickness direction (Z direction) of the second remote terminals (42 to 47),
  • the signal transmission device according to any one of Appendixes A1 to A10, wherein
  • second lead wires (WD) that individually connect the plurality of second lead terminals (41 to 48) and the second chip (70); a rectangular flat sealing resin (90) that seals the first chip (60), the second chip (70), the inter-chip wire (WA), the first lead wire (WB), the second lead wire (WD), the first die pad (30), and the second die pad (50) and partially seals the first lead terminals (11 to 18) and the second lead terminals (41 to 48);
  • Each of the second lead terminals (41 to 48) is a second outer lead portion (41B to 48B) exposed to the outside of the sealing resin (90); a second inner lead portion (41A to 48A) provided inside the sealing resin (90) and connected to the second outer lead portion (41B to 48B);
  • the plurality of second lead terminals (42 to 47) are a third specific terminal (43-45, 47) having a through hole (43AD-45AD, 47AD) formed in the second inner lead portion (43A-45A, 47A) pe
  • the second lead terminals (41 to 48) include first inner lead portions (41A to 48A) provided in the sealing resin (90),
  • the first inner lead portion (42A to 47A) includes a wire connection portion (42AA to 47AA) to which the second lead wire (WD) is connected,
  • the wire connection portion (42AA to 47AA) is an inner lead surface (21B) to which the second lead wire (WD) is bonded; an inner lead back surface (22B) facing the opposite side to the inner lead front surface (21B); and an inner lead side
  • the plurality of second lead terminals (41 to 48) include second outer lead portions (41B to 48B) protruding to the outside of the sealing resin (90),
  • the second outer lead portion (41B to 48B) is An outer lead surface (21A); an outer lead back surface (22A) facing the opposite side to the outer lead front surface (21A); outer lead side surfaces (23A) connecting the outer lead surface (21A) and the outer lead back surface (22A) at both ends in the width direction (Y direction

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

Un dispositif de transmission de signal selon la présente invention comprend : une première puce comprenant un premier transformateur ; une seconde puce ; une pluralité de premières bornes de connexion ; une pluralité de secondes bornes de connexion ; un fil interpuces connectant électriquement la première puce et la seconde puce ; et des premiers fils de connexion connectant individuellement la première puce à la pluralité de premières bornes de connexion. Le fil interpuces est formé d'un matériau qui comprend de l'or. Les premiers fils de connexion sont formés d'un matériau qui comprend du cuivre ou de l'aluminium.
PCT/JP2023/034534 2022-09-29 2023-09-22 Dispositif de transmission de signal WO2024070957A1 (fr)

Applications Claiming Priority (2)

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JP2022156993 2022-09-29
JP2022-156993 2022-09-29

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014093431A (ja) * 2012-11-05 2014-05-19 Renesas Electronics Corp 半導体装置およびその製造方法
JP2021056058A (ja) * 2019-09-30 2021-04-08 三菱電機株式会社 半導体製造検査装置
WO2022054550A1 (fr) * 2020-09-09 2022-03-17 ローム株式会社 Dispositif à semi-conducteur
WO2022181402A1 (fr) * 2021-02-25 2022-09-01 ローム株式会社 Module d'isolation et circuit d'attaque de grille

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014093431A (ja) * 2012-11-05 2014-05-19 Renesas Electronics Corp 半導体装置およびその製造方法
JP2021056058A (ja) * 2019-09-30 2021-04-08 三菱電機株式会社 半導体製造検査装置
WO2022054550A1 (fr) * 2020-09-09 2022-03-17 ローム株式会社 Dispositif à semi-conducteur
WO2022181402A1 (fr) * 2021-02-25 2022-09-01 ローム株式会社 Module d'isolation et circuit d'attaque de grille

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