WO2024061071A1 - Bulk acoustic wave resonance apparatus and method for forming same - Google Patents

Bulk acoustic wave resonance apparatus and method for forming same Download PDF

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Publication number
WO2024061071A1
WO2024061071A1 PCT/CN2023/118474 CN2023118474W WO2024061071A1 WO 2024061071 A1 WO2024061071 A1 WO 2024061071A1 CN 2023118474 W CN2023118474 W CN 2023118474W WO 2024061071 A1 WO2024061071 A1 WO 2024061071A1
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layer
substrate
frequency modulation
electrode structure
electrode
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PCT/CN2023/118474
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French (fr)
Chinese (zh)
Inventor
汤正杰
邹雅丽
杨新宇
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常州承芯半导体有限公司
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Publication of WO2024061071A1 publication Critical patent/WO2024061071A1/en

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/15—Constructional features of resonators consisting of piezoelectric or electrostrictive material
    • H03H9/17—Constructional features of resonators consisting of piezoelectric or electrostrictive material having a single resonator
    • H03H9/171—Constructional features of resonators consisting of piezoelectric or electrostrictive material having a single resonator implemented with thin-film techniques, i.e. of the film bulk acoustic resonator [FBAR] type
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
    • H03H3/007—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
    • H03H3/02—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks
    • H03H3/04—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks for obtaining desired frequency or temperature coefficient
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02—Details
    • H03H9/02007—Details of bulk acoustic wave devices
    • H03H9/02086—Means for compensation or elimination of undesirable effects
    • H03H9/02102—Means for compensation or elimination of undesirable effects of temperature influence
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02—Details
    • H03H9/125—Driving means, e.g. electrodes, coils
    • H03H9/13—Driving means, e.g. electrodes, coils for networks consisting of piezoelectric or electrostrictive materials
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
    • H03H3/007—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
    • H03H3/02—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks
    • H03H2003/023—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks the resonators or networks being of the membrane type
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
    • H03H3/007—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
    • H03H3/02—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks
    • H03H3/04—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks for obtaining desired frequency or temperature coefficient
    • H03H2003/0407—Temperature coefficient
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
    • H03H3/007—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
    • H03H3/02—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks
    • H03H3/04—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks for obtaining desired frequency or temperature coefficient
    • H03H2003/0414—Resonance frequency

Definitions

  • the present invention relates to the field of semiconductor manufacturing technology, and in particular to a bulk acoustic wave resonance device and a forming method thereof.
  • Radio Frequency (RF) front-end chips for wireless communication equipment include power amplifiers, antenna switches, RF filters, multiplexers including duplexers, and low-noise amplifiers.
  • RF filters include Surface Acoustic Wave (SAW) filters, Bulk Acoustic Wave (BAW) filters, Micro-Electro-Mechanical System (MEMS) filters, integrated passive Device (Integrated Passive Devices, IPD) filters, etc.
  • SAW Surface Acoustic Wave
  • BAW Bulk Acoustic Wave
  • MEMS Micro-Electro-Mechanical System
  • IPD integrated passive Device
  • the quality factor (Q value) of surface acoustic wave resonators and bulk acoustic wave resonators is relatively high.
  • the low insertion loss and high out-of-band suppression RF filters made of surface acoustic wave resonators and bulk acoustic wave resonators, namely surface acoustic wave filters and bulk acoustic wave filters, are the mainstream RF filters currently used in wireless communication devices such as mobile phones and base stations.
  • the Q value is the quality factor value of the resonator, which is defined as the center frequency divided by the 3dB bandwidth of the resonator.
  • the operating frequency of surface acoustic wave filters is generally 0.4GHz to 2.7GHz, and the operating frequency of bulk acoustic wave filters is generally 0.7GHz to 7GHz.
  • bulk acoustic wave resonators Compared with surface acoustic wave resonators, bulk acoustic wave resonators have better performance, but due to complex process steps, the manufacturing cost of bulk acoustic wave resonators is higher than that of SAW resonators.
  • wireless communication technology gradually evolves, more and more frequency bands are used, and with the carrier aggregation With the application of frequency band superposition technology, mutual interference between wireless frequency bands has become more and more serious.
  • High-performance bulk acoustic wave technology can solve the problem of mutual interference between frequency bands.
  • wireless mobile networks With the advent of the 5G era, wireless mobile networks have introduced higher communication frequency bands.
  • only bulk acoustic wave technology can solve the filtering problem in high frequency bands.
  • the technical problem solved by the present invention is to provide a bulk acoustic wave resonance device and a forming method thereof, so that the frequency modulation layer can control the frequency of the device more flexibly and accurately.
  • the present invention provides a bulk acoustic wave resonance device, which is characterized in that it includes: a substrate; an intermediate layer, the intermediate layer includes an opposite first side and a second side, the substrate is located on the first side , the middle layer includes a cavity, the opening of the cavity is located on the second side; an electrode structure is located in the cavity; a piezoelectric layer is located on the second side and is located on the electrode structure, The piezoelectric layer covers at least the cavity.
  • it also includes: a frequency modulation layer located on the second side and above the piezoelectric layer, and the projection of the electrode structure on the substrate is within the projection range of the frequency modulation layer on the substrate.
  • the middle layer and the frequency modulation layer are respectively located on both sides of the piezoelectric layer, and the electrode structure and the frequency modulation layer are respectively located on both sides of the piezoelectric layer.
  • the frequency modulation layer includes a groove, and the projection of the electrode structure on the substrate is located within the projection range of the groove on the substrate.
  • the frequency modulation area of the frequency modulation layer includes a plurality of grooves, and the projection of the electrode structure on the substrate is located within the projection range of the frequency modulation area on the substrate.
  • a plurality of grooves are evenly distributed within the frequency modulation area.
  • the method further includes: a temperature compensation layer located on the second side and on the piezoelectric layer, and the piezoelectric layer and the frequency modulation layer are respectively located on both sides of the temperature compensation layer.
  • the method further includes: a temperature compensation layer located in the cavity and covering at least the electrode structure, and the piezoelectric layer is located on the temperature compensation layer.
  • the electrode structure includes: a first bus and a second bus arranged in parallel along a first direction, the first bus connecting a number of first electrode strips arranged in parallel along a second direction, the second bus connecting a number of second electrode strips arranged in parallel along the second direction, the first direction is perpendicular to the second direction, and the first electrode strips and the second electrode strips are alternately arranged.
  • the widths of the first electrode strips and the second electrode strips are equal; the first electrode strips and the second electrode strips have a first width dimension, and the adjacent first electrode strips have The central axis and the central axis of the second electrode strip have a first central dimension, and the ratio of the first central dimension to the first width dimension ranges from 1.2 to 20.
  • the material of the substrate includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers.
  • the material of the intermediate layer includes: polymer, insulating dielectric or polysilicon.
  • the material of the electrode structure includes: one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
  • the material of the frequency modulation layer includes metal or insulating dielectric; where the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt or titanium; the insulating dielectric includes: Silicon nitride, silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
  • the technical solution of the present invention also provides a method for forming a bulk acoustic wave resonance device, comprising: providing a sacrificial substrate; forming a piezoelectric layer on the sacrificial substrate; forming an electrode structure on the piezoelectric layer; forming a sacrificial layer on the piezoelectric layer, wherein the sacrificial layer at least covers the electrode structure; forming an intermediate layer on the piezoelectric layer, wherein the intermediate layer at least covers the sacrificial layer, wherein the intermediate layer includes a first side and a second side opposite to each other, wherein the piezoelectric layer and the sacrificial substrate are located on the second side; providing a substrate; bonding the substrate and the intermediate layer, wherein the substrate is located on the first side; after bonding the substrate and the intermediate layer, The sacrificial substrate is removed; after removing the sacrificial substrate, the sacrificial layer is removed to form a cavity embedded in the
  • the method further includes: forming a frequency modulation layer located on the second side, and a projection of the electrode structure on the substrate is located on the frequency modulation layer.
  • the intermediate layer and the frequency modulation layer are respectively located on both sides of the piezoelectric layer, and the electrode structure and the frequency modulation layer are respectively located on both sides of the piezoelectric layer.
  • the frequency modulation layer includes a groove, and the projection of the electrode structure on the substrate is located within the projection range of the groove on the substrate.
  • the frequency modulation area of the frequency modulation layer includes a plurality of grooves, and the projection of the electrode structure on the substrate is located within the projection range of the frequency modulation area on the substrate.
  • a plurality of grooves are evenly distributed within the frequency modulation area.
  • the method before forming the frequency modulation layer, further includes: forming a temperature compensation layer located on the second side and on the piezoelectric layer, and the piezoelectric layer and the frequency modulation layer are respectively located on the temperature compensation layer. both sides.
  • the method further includes: before forming the sacrificial layer, forming a temperature compensation layer to be located on the piezoelectric layer and at least cover the electrode structure; the sacrificial layer covers the a temperature compensation layer; and after removal of the sacrificial layer, the temperature compensation layer is located within the cavity.
  • the electrode structure includes: a first bus line and a second bus line arranged in parallel along the first direction, the first bus line connects a plurality of first electrode strips arranged in parallel along the second direction, and the second bus line connects a plurality of first electrode strips arranged in parallel along the second direction.
  • the bus connects a plurality of second electrode strips arranged in parallel along the second direction, the first direction is perpendicular to the second direction, and the first electrode strips and the second electrode strips are staggered.
  • the widths of the first electrode strips and the second electrode strips are equal; the first electrode strips and the second electrode strips have a first width dimension, and the adjacent first electrode strips have a first width dimension.
  • the central axis of the strip and the central axis of the second electrode strip have a first central dimension, and the ratio of the first central dimension to the first width dimension ranges from 1.2 to 20.
  • an electrode structure is included, and the electrode structure is located in the cavity. Since the electrode structure is located in the cavity, the piezoelectric layer can provide a relatively flat surface for the subsequently formed frequency modulation layer, reduce the lattice defects of the frequency modulation layer film, improve the quality of the film, and thereby make the frequency modulation layer The layer has more flexible and precise frequency control of the device. In addition, since the electrode structure is located in the cavity, it can effectively prevent the electrode structure from being oxidized or corroded during use of the device.
  • the frequency modulation layer includes a groove, and the projection of the electrode structure on the substrate is located within the projection range of the groove on the substrate.
  • the frequency modulation area of the frequency modulation layer includes a plurality of grooves, and the projection of the electrode structure on the substrate is located within the projection range of the frequency modulation area on the substrate.
  • the sacrificial layer is removed, a cavity is formed in the intermediate layer, the opening of the cavity is located on the second side, and the electrode structure is located on the inside the cavity. Since the electrode structure is located in the cavity, the piezoelectric layer can provide a relatively flat surface for the subsequently formed frequency modulation layer, reduce the lattice defects of the frequency modulation layer film, improve the quality of the film, and thereby make the frequency modulation layer The layer has more flexible and precise frequency control of the device. In addition, since the electrode structure is located in the cavity, it can effectively prevent the electrode structure from being oxidized or corroded during use of the device.
  • the frequency modulation layer includes a groove, and the projection of the electrode structure on the substrate is located within the projection range of the groove on the substrate.
  • the frequency modulation area of the frequency modulation layer includes a plurality of grooves, and the projection of the electrode structure on the substrate is located within the projection range of the frequency modulation area on the substrate.
  • FIG1 is a schematic structural diagram of a bulk acoustic wave resonance device
  • FIGS. 2 to 10 are schematic structural diagrams of each step of the bulk acoustic wave resonance device and its forming method according to the embodiment of the present invention
  • 11 to 20 are schematic structural diagrams of each step of the bulk acoustic wave resonance device and its forming method in another embodiment of the present invention.
  • 21 to 31 are schematic structural diagrams of each step of the bulk acoustic wave resonance device and its forming method in another embodiment of the present invention.
  • 32 to 42 are schematic structural diagrams of each step of the bulk acoustic wave resonance device and its forming method in another embodiment of the present invention.
  • 43 to 53 are schematic structural diagrams of each step of the bulk acoustic wave resonance device and its forming method in another embodiment of the present invention.
  • Figures 54 to 65 are schematic structural diagrams of each step of the bulk acoustic wave resonance device and its forming method in another embodiment of the present invention.
  • Figures 66 to 77 are schematic structural diagrams of each step of the bulk acoustic wave resonance device and its forming method in another embodiment of the present invention.
  • Figures 78 to 88 are schematic structural diagrams of each step of the bulk acoustic wave resonance device and its forming method in another embodiment of the present invention.
  • Figures 89 to 100 illustrate a bulk acoustic wave resonance device and its formation in another embodiment of the present invention. Structural diagram of each step of the method;
  • 101 to 112 are schematic structural diagrams of each step of the bulk acoustic wave resonance device and its forming method in another embodiment of the present invention.
  • Figure 1 is a schematic structural diagram of a bulk acoustic wave resonance device.
  • a bulk acoustic wave resonance device includes: a support substrate 100, the support substrate 100 includes a cavity 101, the surface of the support substrate 100 exposes the cavity 101; a piezoelectric layer 102 , is located on the support substrate 100 and at least covers the cavity 101; the electrode structure 103 is located on the piezoelectric layer 102.
  • longitudinally propagating shear waves are generated through excitation of the interdigital electrodes in the electrode structure 103 to form resonance in the piezoelectric layer 102 .
  • the electrode structure 103 is formed on the piezoelectric layer 102, when a frequency modulation layer (not shown) needs to be formed on the piezoelectric layer 102 later, due to the uneven structure of the electrode structure 103, It can provide a relatively flat surface for the formation of the frequency modulation layer, thereby increasing the lattice defects of the frequency modulation layer film, affecting the quality of the frequency modulation layer film, and subsequently causing deficiencies in precise control of device frequency.
  • the present invention provides a bulk acoustic wave resonance device and a forming method thereof, including an electrode structure located in a cavity. Since the electrode structure is located in the cavity, the piezoelectric layer can provide a relatively flat surface for the subsequently formed frequency modulation layer, reduce the lattice defects of the frequency modulation layer film, improve the quality of the film, and thereby make the The frequency modulation layer described above is more flexible and precise in controlling the frequency of the device. In addition, since the electrode structure is located in the cavity, it can effectively prevent the electrode structure from being oxidized or corroded during use of the device.
  • FIGS. 2 to 10 are schematic structural diagrams of each step of a method for forming a bulk acoustic wave resonance device in an embodiment of the present invention.
  • a sacrificial substrate 203 is provided.
  • the material of the sacrificial substrate 203 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e. , BCB), photosensitive epoxy resin photoresist (for example, SU-8), polyimide.
  • BCB benzocyclobutene
  • photosensitive epoxy resin photoresist for example, SU-8
  • polyimide polyimide
  • the sacrificial substrate 203 is made of silicon.
  • a piezoelectric layer 204 is formed on the sacrificial substrate 203 .
  • the material of the piezoelectric layer 204 includes: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
  • the piezoelectric layer 204 is made of lithium niobate.
  • FIG. 5 is a schematic cross-sectional view along line A-A in FIG. 4 .
  • An electrode structure 205 is formed on the piezoelectric layer 204 .
  • the electrode structure 205 includes: a first bus line 2051 and a second bus line 2052 arranged in parallel along the first direction X.
  • the first bus line 2051 connects several third bus lines arranged in parallel along the second direction Y.
  • the second bus 2052 connects a plurality of second electrode strips 2054 arranged in parallel along the second direction Y.
  • the first direction X is perpendicular to the second direction Y.
  • the first electrode The strips 2053 and the second electrode strips 2054 are alternately placed.
  • the widths of the first electrode strip 2053 and the second electrode strip 2054 are equal; the first electrode strip 2053 and the second electrode strip 2054 have a first width dimension d1.
  • the central axis of the first electrode strip 2053 and the central axis of the second electrode strip 2054 have a first central dimension d2, and the ratio range of the first central dimension d2 to the first width dimension d1 is: 1.2 ⁇ 20.
  • the thickness of the first electrode strip 2053 and the second electrode strip 2054 is equal to the first width dimension d1; in other embodiments, the thickness of the first electrode strip 2053 and the second electrode strip 2054 is equal to the first width dimension d1.
  • the thickness of the strip may also be different than the first width dimension.
  • the material of the electrode structure 205 includes: one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
  • the electrode structure 205 is one or more layers. In this embodiment, the electrode structure 205 has two layers, and the material of the electrode structure 205 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
  • a sacrificial layer 206 is formed on the piezoelectric layer 204 , and the sacrificial layer 206 at least covers the electrode structure 205 .
  • the material of the sacrificial layer 206 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
  • the sacrificial layer 206 is made of polyimide.
  • an intermediate layer 201 is formed on the piezoelectric layer 204.
  • the intermediate layer 201 at least covers the sacrificial layer 206.
  • the intermediate layer 201 includes opposite first sides 201a and second sides 201b, so The piezoelectric layer 204 and the sacrificial substrate 203 are located on the second side 201b.
  • the material of the intermediate layer 201 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
  • the material of the middle layer 201 is silicon dioxide.
  • a substrate 200 is provided.
  • the material of the substrate 200 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclotene vinyl (i.e., BCB), photosensitive epoxy photoresist (e.g., SU-8), polyimide.
  • BCB benzocyclotene vinyl
  • photosensitive epoxy photoresist e.g., SU-8
  • polyimide polyimide
  • the material of the substrate 200 is silicon.
  • the substrate 200 and the intermediate layer 201 are bonded, and the substrate 200 is located on the first side 201 a; after the substrate 200 and the intermediate layer 201 are bonded, the sacrificial substrate 203 is removed.
  • the process of removing the sacrificial substrate 203 includes: physical grinding process, wet etching process or dry etching process.
  • the process of removing the sacrificial substrate 203 adopts a physical grinding process.
  • a bonding process is used to join the substrate 200 and the intermediate layer 201; in other embodiments, an adhesion process may also be used to join the substrate and the intermediate layer.
  • the sacrificial layer 206 is removed, and a cavity 202 is formed in the intermediate layer 201.
  • the opening of the cavity 202 is located on the second side 201b.
  • the electrode structure 205 is located in the cavity 202 .
  • the piezoelectric layer 204 can provide a relatively flat surface for the subsequently formed frequency modulation layer, reducing the crystal lattice of the frequency modulation layer film. Defects improve the quality of the film, thereby making the frequency modulation layer more flexible and precise in controlling the frequency of the device.
  • the electrode structure 205 since the electrode structure 205 is located in the cavity 202, it can effectively prevent the electrode structure 205 from being oxidized or corroded during use of the device.
  • a wet etching process is used to remove the sacrificial layer 206 .
  • the embodiment of the present invention also provides a bulk acoustic wave resonance device.
  • a substrate 200 an intermediate layer 201.
  • the intermediate layer 201 includes an opposite first side 201a and a second side 201b, so The substrate 200 is located on the first side 201a, the intermediate layer 201 includes a cavity 202, and the opening of the cavity 202 is located on the second side 201b;
  • the electrode structure 205 is located in the cavity 202;
  • the piezoelectric layer 204 is located on the second side 201b and on the electrode structure 205, and the piezoelectric layer 204 at least covers the cavity 205.
  • the piezoelectric layer 204 can provide a relatively flat surface for the subsequently formed frequency modulation layer, reducing the crystal lattice of the frequency modulation layer film. Defects improve the quality of the film, thereby making the frequency modulation layer more flexible and precise in controlling the frequency of the device.
  • the electrode structure 205 since the electrode structure 205 is located in the cavity 202, it can effectively prevent the electrode structure 205 from being oxidized or corroded during use of the device.
  • the material of the substrate 200 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e., BCB), photosensitive epoxy photoresist (e.g., SU-8), polyimide.
  • BCB benzocyclobutene
  • photosensitive epoxy photoresist e.g., SU-8
  • polyimide polyimide
  • the substrate 200 is made of silicon.
  • the material of the intermediate layer 201 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
  • the material of the middle layer 201 is silicon dioxide.
  • the material of the piezoelectric layer 204 includes: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
  • the piezoelectric layer 204 is made of lithium niobate.
  • the electrode structure 205 includes: a first bus line 2051 and a second bus line 2052 arranged in parallel along the first direction X.
  • the first bus line 2051 connects several third bus lines arranged in parallel along the second direction Y.
  • the second bus 2052 connects a plurality of second electrode strips 2054 arranged in parallel along the second direction Y.
  • the first direction X is perpendicular to the second direction Y.
  • the first electrode The strips 2053 and the second electrode strips 2054 are alternately placed.
  • the widths of the first electrode strip 2053 and the second electrode strip 2054 are equal; the first electrode strip 2053 and the second electrode strip 2054 have a first width dimension d1.
  • the central axis of the first electrode strip 2053 and the central axis of the second electrode strip 2054 have a first central dimension d2, and the ratio range of the first central dimension d2 to the first width dimension d1 is: 1.2 ⁇ 20.
  • the thickness of the first electrode strip 2053 and the second electrode strip 2054 is equal to the first width dimension d1; in other embodiments, the thickness of the first electrode strip 2053 and the second electrode strip 2054 is equal to the first width dimension d1.
  • the thickness of the strip may also be different than the first width dimension.
  • the material of the electrode structure 205 includes one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
  • the electrode structure 205 is one or more layers. In this embodiment, the electrode structure 205 has two layers, and the material of the electrode structure 205 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
  • 11 to 20 are schematic structural diagrams of each step of a method for forming a bulk acoustic wave resonance device in another embodiment of the present invention.
  • a sacrificial substrate 303 is provided.
  • the material of the sacrificial substrate 303 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e. , BCB), photosensitive epoxy resin photoresist (for example, SU-8), polyimide.
  • BCB benzocyclobutene
  • photosensitive epoxy resin photoresist for example, SU-8
  • polyimide polyimide
  • the sacrificial substrate 303 is made of silicon.
  • a piezoelectric layer 304 is formed on the sacrificial substrate 303 .
  • the material of the piezoelectric layer 304 includes: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
  • the piezoelectric layer 304 is made of lithium niobate.
  • Figure 14 is a schematic cross-sectional view along line BB in Figure 13.
  • An electrode structure 305 is formed on the piezoelectric layer 304.
  • the electrode structure 305 includes: a first bus line 3051 and a second bus line 3052 arranged in parallel along the first direction An electrode strip 3053.
  • the second bus 3052 connects a plurality of second electrode strips 3054 arranged in parallel along the second direction Y.
  • the first direction X is perpendicular to the second direction Y.
  • the first electrode The strips 3053 and the second electrode strips 3054 are alternately placed.
  • the widths of the first electrode strip 3053 and the second electrode strip 3054 are equal; the first electrode strip 3053 and the second electrode strip 3054 have a first width dimension d1.
  • the central axis of the first electrode strip 3053 and the central axis of the second electrode strip 3054 have a first central dimension d2, and the ratio range of the first central dimension d2 to the first width dimension d1 is: 1.2 ⁇ 20.
  • the thickness of the first electrode strip 3053 and the second electrode strip 3054 is equal to the first width dimension d1; in other embodiments, the first electrode strip and the second electrode strip 3054 have a thickness equal to the first width dimension d1.
  • the thickness of the strip may also be different than the first width dimension.
  • the material of the electrode structure 305 includes: one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
  • the electrode structure 305 is one or more layers. In this embodiment, the electrode structure 305 is two layers, and the material of the electrode structure 305 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
  • FIG. 15 Please refer to FIG. 15 .
  • the view directions of FIG. 15 and FIG. 14 are consistent.
  • a sacrificial layer 307 is formed on the piezoelectric layer 304 , and the sacrificial layer 307 at least covers the electrode structure 305 .
  • the material of the sacrificial layer 307 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
  • the sacrificial layer 307 is made of polyimide.
  • an intermediate layer 301 is formed on the piezoelectric layer 304.
  • the intermediate layer 301 at least covers the sacrificial layer 307.
  • the intermediate layer 301 includes an opposite first side 301a. and a second side 301b, where the piezoelectric layer 304 and the sacrificial substrate 303 are located.
  • the material of the intermediate layer 301 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
  • the material of the intermediate layer 301 is silicon dioxide.
  • a substrate 300 is provided.
  • the material of the substrate 300 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e., BCB), photosensitive epoxy photoresist (e.g., SU-8), polyimide.
  • BCB benzocyclobutene
  • photosensitive epoxy photoresist e.g., SU-8
  • polyimide polyimide
  • the material of the substrate 300 is silicon.
  • the substrate 300 and the intermediate layer 301 are bonded, and the substrate 300 is located on the first side 301 a; after the substrate 300 and the intermediate layer 301 are bonded, the sacrificial substrate 303 is removed.
  • the process of removing the sacrificial substrate 303 includes: a physical grinding process, a wet etching process or a dry etching process.
  • the process of removing the sacrificial substrate 303 adopts a physical grinding process.
  • a bonding process is used to join the substrate 300 and the intermediate layer 301; in other embodiments, an adhesion process may also be used to join the substrate and the intermediate layer.
  • a frequency modulation layer 306 is formed, located on the second side 301b and on the piezoelectric layer 304.
  • the projection of the electrode structure 305 on the substrate 300 is located on the substrate.
  • the intermediate layer 301 and the frequency modulation layer 306 are respectively located on both sides of the piezoelectric layer 304, and the electrode structure 305 and The frequency modulation layer 306 is located on both sides of the piezoelectric layer 304 respectively.
  • the material of the frequency modulation layer 306 includes metal or insulating dielectric;
  • the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt or titanium;
  • the insulating dielectric includes: silicon nitride , silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
  • the frequency modulation layer 306 is made of silicon nitride.
  • the sacrificial layer 307 is removed to form a cavity 302 in the middle layer 301 .
  • the opening of the cavity 302 is located at the second side 301 b .
  • the electrode structure 305 is located in the cavity 302 .
  • the piezoelectric layer 304 can provide a relatively flat surface for the formed frequency modulation layer 306, reducing the thin film of the frequency modulation layer 306.
  • the lattice defects improve the film quality, thereby making the frequency modulation layer 306 more flexible and precise in controlling the frequency of the device.
  • the electrode structure 305 since the electrode structure 305 is located in the cavity 302, it can effectively prevent the electrode structure 305 from being oxidized or corroded during use of the device.
  • a wet etching process is used to remove the sacrificial layer 306 .
  • a bulk acoustic wave resonance device is also provided in an embodiment of the present invention, and please continue to refer to FIG. 20, comprising: a substrate 300; an intermediate layer 301, wherein the intermediate layer 301 comprises a first side 301a and a second side 301b opposite to each other, wherein the substrate 300 is located on the first side 301a, and the intermediate layer 301 comprises a cavity 302, wherein the opening of the cavity 302 is located on the second side 301b; an electrode structure 305, which is located in the cavity 302; a piezoelectric layer 304, which is located on the second side 301b and is located on the On the electrode structure 305, the piezoelectric layer 304 at least covers the cavity 302; the frequency modulation layer 306 is located on the second side 301b and on the piezoelectric layer 304, the projection of the electrode structure 305 on the substrate 300 is located within the projection range of the frequency modulation layer 306 on the substrate 300, the intermediate layer 301 and the frequency modulation
  • the piezoelectric layer 304 can provide a relatively flat surface for the formed frequency modulation layer 306, reducing the thin film of the frequency modulation layer 306.
  • the lattice defects improve the film quality, thereby making the frequency modulation layer 306 more flexible and precise in controlling the frequency of the device.
  • the electrode structure 305 since the electrode structure 305 is located in the cavity 302, it can effectively prevent the electrode structure 305 from being oxidized or corroded during use of the device.
  • the material of the substrate 300 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e., BCB), photosensitive epoxy photoresist (e.g., SU-8), polyimide.
  • BCB benzocyclobutene
  • photosensitive epoxy photoresist e.g., SU-8
  • polyimide polyimide
  • the material of the substrate 300 is silicon.
  • the material of the intermediate layer 301 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
  • the material of the intermediate layer 301 is silicon dioxide.
  • the material of the piezoelectric layer 304 includes: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
  • the piezoelectric layer 304 is made of lithium niobate.
  • the electrode structure 305 includes: a first bus line 3051 and a second bus line 3052 arranged in parallel along the first direction X.
  • the first bus line 3051 connects several third bus lines arranged in parallel along the second direction Y.
  • the second bus 3052 connects a plurality of second electrode strips 3054 arranged in parallel along the second direction Y.
  • the first direction X is perpendicular to the second direction Y.
  • the first electrode The strips 3053 and the second electrode strips 3054 are alternately placed.
  • the widths of the first electrode strip 3053 and the second electrode strip 3054 are equal; the first electrode strip 3053 and the second electrode strip 3054 have a first width dimension d1.
  • the central axis of the first electrode strip 3053 and the second electrode strip has a first center dimension d2, and the ratio of the first center dimension d2 to the first width dimension d1 ranges from 1.2 to 20.
  • the thickness of the first electrode strip 3053 and the second electrode strip 3054 is equal to the first width dimension d1; in other embodiments, the thickness of the first electrode strip 3053 and the second electrode strip 3054 is equal to the first width dimension d1.
  • the thickness of the strip may also be different than the first width dimension.
  • the material of the electrode structure 305 includes: one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
  • the electrode structure 305 is one or more layers. In this embodiment, the electrode structure 305 is two layers, and the material of the electrode structure 305 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
  • the material of the frequency modulation layer 306 includes metal or insulating dielectric;
  • the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt or titanium;
  • the insulating dielectric includes: silicon nitride , silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
  • the frequency modulation layer 306 is made of silicon nitride.
  • 21 to 31 are schematic structural diagrams of the steps of a method for forming a bulk acoustic wave resonator device in another embodiment of the present invention.
  • a sacrificial substrate 403 is provided.
  • the material of the sacrificial substrate 403 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e. , BCB), photosensitive epoxy resin photoresist (for example, SU-8), polyimide.
  • BCB benzocyclobutene
  • photosensitive epoxy resin photoresist for example, SU-8
  • polyimide polyimide
  • the sacrificial substrate 403 is made of silicon.
  • a piezoelectric layer 404 is formed on the sacrificial substrate 403 .
  • the material of the piezoelectric layer 404 includes: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
  • the piezoelectric layer 404 is made of lithium niobate.
  • Figure 24 is a schematic cross-sectional view along line C-C in Figure 23.
  • An electrode structure 405 is formed on the piezoelectric layer 404.
  • the electrode structure 405 includes: a first bus 4051 and a second bus 4052 arranged in parallel along the first direction An electrode strip 4053.
  • the second bus 4052 connects a plurality of second electrode strips 4054 arranged in parallel along the second direction Y.
  • the first direction X is perpendicular to the second direction Y.
  • the first electrode The strips 4053 and the second electrode strips 4054 are alternately placed.
  • the widths of the first electrode strip 4053 and the second electrode strip 4054 are equal; the first electrode strip 4053 and the second electrode strip 4054 have a first width dimension d1.
  • the central axis of the first electrode strip 4053 and the central axis of the second electrode strip 4054 have a first central dimension d2, and the ratio range of the first central dimension d2 to the first width dimension d1 is: 1.2 ⁇ 20.
  • the thickness of the first electrode strip 4053 and the second electrode strip 4054 is equal to the first width dimension d1; in other embodiments, the thickness of the first electrode strip 4053 and the second electrode strip 4054 is equal to the first width dimension d1.
  • the thickness of the strip may also be different than the first width dimension.
  • the material of the electrode structure 405 includes: one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
  • the electrode structure 405 is one or more layers.
  • the electrode structure 405 has two layers, and the material of the electrode structure 405 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
  • a sacrificial layer 408 is formed on the piezoelectric layer 404 , and the sacrificial layer 408 at least covers the electrode structure 405 .
  • the material of the sacrificial layer 408 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
  • the sacrificial layer 408 is made of polyimide.
  • an intermediate layer 401 is formed on the piezoelectric layer 404.
  • the intermediate layer 401 at least covers the sacrificial layer 408.
  • the intermediate layer 401 includes opposite first sides 401a and second sides 401b, so The piezoelectric layer 404 and the sacrificial substrate 403 are located on the second side 401b.
  • the material of the intermediate layer 401 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
  • the material of the middle layer 401 is silicon dioxide.
  • a substrate 400 is provided.
  • the material of the substrate 400 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e., BCB), photosensitive epoxy photoresist (e.g., SU-8), polyimide.
  • BCB benzocyclobutene
  • photosensitive epoxy photoresist e.g., SU-8
  • polyimide polyimide
  • the material of the substrate 400 is silicon.
  • the substrate 400 and the intermediate layer 401 are bonded, and the substrate 400 is located on the first side 401 a; after the substrate 400 and the intermediate layer 401 are bonded, the sacrificial substrate 403 is removed.
  • the process of removing the sacrificial substrate 403 includes: a physical grinding process, a wet etching process or a dry etching process.
  • the process of removing the sacrificial substrate 403 adopts a physical grinding process.
  • a bonding process is used to join the substrate 400 and the intermediate layer 401; in other embodiments, an adhesion process may also be used to join the substrate and the intermediate layer.
  • Figure 30 is a schematic cross-sectional view along line DD in Figure 29, forming the frequency modulation layer 406, located on the second side 401b and on the piezoelectric layer 404, so The intermediate layer 401 and the frequency modulation layer 406 are respectively located on both sides of the piezoelectric layer 404, and the electrode structure 405 and the frequency modulation layer 406 are respectively located on both sides of the piezoelectric layer 404.
  • the material of the frequency modulation layer 406 includes metal or insulating dielectric; the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt or titanium; the insulating dielectric includes: silicon nitride , silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
  • the frequency modulation layer 406 is made of silicon nitride.
  • the frequency modulation layer 406 includes a groove 407, and the projection of the electrode structure 405 on the substrate 400 is located within the projection range of the groove 407 on the substrate 400.
  • the resonant frequency of the resonant device can be adjusted, making the frequency modulation layer 406 more flexible and precise in controlling the device frequency.
  • the groove 407 is in the shape of any polygon. In this embodiment, the groove 407 is in the shape of a rectangle.
  • Figure 31 Please refer to Figure 31.
  • the views of Figure 31 and Figure 30 are in the same direction.
  • the sacrificial layer 408 is removed, and a cavity 402 is formed in the intermediate layer 401.
  • the opening of the cavity 402 Located on the second side 401b, the electrode structure 405 is located in the cavity 402.
  • the piezoelectric layer 404 can provide a relatively flat surface for the frequency modulation layer 406 formed, reducing the thin film of the frequency modulation layer 406.
  • the lattice defects improve the film quality, thereby making the frequency modulation layer 406 more flexible and precise in controlling the frequency of the device.
  • the electrode structure 405 since the electrode structure 405 is located in the cavity 402, it can effectively prevent the electrode structure 405 from being oxidized or corroded during use of the device.
  • a wet etching process is used to remove the sacrificial layer 408 .
  • the embodiment of the present invention also provides a bulk acoustic wave resonance device.
  • a substrate 400 an intermediate layer 401.
  • the intermediate layer 401 includes an opposite third layer.
  • One side 401a and a second side 401b, the substrate 400 is located on the first side 401a, the intermediate layer 401 includes a cavity 402, and the opening of the cavity 402 is located on the second side 401b; the electrode structure 405, Located in the cavity 402; the piezoelectric layer 404 is located on the second side 401b and on the electrode structure 405, the piezoelectric layer 404 at least covers the cavity 405; the frequency modulation layer 406 is located on the The second side 401b is located on the piezoelectric layer 404.
  • the intermediate layer 401 and the frequency modulation layer 406 are respectively located on both sides of the piezoelectric layer 404.
  • the electrode structure 405 and the frequency modulation layer 406 are respectively located on On both sides of the piezoelectric layer 404, the frequency modulation layer 406 includes grooves 407, and the projection of the electrode structure 405 on the substrate 400 is located within the projection range of the groove 407 on the substrate 400.
  • the piezoelectric layer 404 can provide a relatively flat surface for the frequency modulation layer 406 formed, reducing the thin film of the frequency modulation layer 406.
  • the lattice defects improve the film quality, thereby making the frequency modulation layer 406 more flexible and precise in controlling the frequency of the device.
  • the electrode structure 405 since the electrode structure 405 is located in the cavity 402, it can effectively prevent the electrode structure 405 from being oxidized or corroded during use of the device.
  • the material of the substrate 400 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e., BCB), photosensitive epoxy photoresist (e.g., SU-8), polyimide.
  • BCB benzocyclobutene
  • photosensitive epoxy photoresist e.g., SU-8
  • polyimide polyimide
  • the material of the substrate 400 is silicon.
  • the material of the intermediate layer 401 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
  • the material of the middle layer 401 is silicon dioxide.
  • the material of the piezoelectric layer 404 includes: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
  • the piezoelectric layer 404 is made of lithium niobate.
  • the electrode structure 405 includes: a first bus 4051 and a second bus 4052 arranged in parallel along the first direction An electrode strip 4053.
  • the second bus 4052 connects a plurality of second electrode strips 4054 arranged in parallel along the second direction Y.
  • the first direction X is perpendicular to the second direction Y.
  • the first electrode The strips 4053 and the second electrode strips 4054 are alternately placed.
  • the widths of the first electrode strip 4053 and the second electrode strip 4054 are equal; the first electrode strip 4053 and the second electrode strip 4054 have a first width dimension d1, the central axis of the adjacent first electrode strip 4053 and the central axis of the second electrode strip 4054 have a first center dimension d2, and the ratio of the first center dimension d2 to the first width dimension d1 ranges from 1.2 to 20.
  • the thickness of the first electrode strip 4053 and the second electrode strip 4054 is equal to the first width dimension d1; in other embodiments, the thickness of the first electrode strip 4053 and the second electrode strip 4054 is equal to the first width dimension d1.
  • the thickness of the strip may also be different than the first width dimension.
  • the material of the electrode structure 405 includes: one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
  • the electrode structure 405 is one or more layers.
  • the electrode structure 405 has two layers, and the material of the electrode structure 405 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
  • the material of the frequency modulation layer 406 includes metal or insulating dielectric; the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt or titanium; the insulating dielectric includes: silicon nitride , silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
  • the frequency modulation layer 406 is made of silicon nitride.
  • the resonant frequency of the resonant device can be adjusted, so that the frequency modulation layer 406 can control the device frequency more flexibly and accurately.
  • the groove 407 is in an arbitrary polygonal shape.
  • the groove 407 is in the shape of a rectangular shape.
  • 32 to 42 are schematic structural diagrams of each step of a method for forming a bulk acoustic wave resonance device in another embodiment of the present invention.
  • a sacrificial substrate 503 is provided.
  • the material of the sacrificial substrate 503 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e. , BCB), photosensitive epoxy resin photoresist (for example, SU-8), polyimide.
  • BCB benzocyclobutene
  • photosensitive epoxy resin photoresist for example, SU-8
  • polyimide polyimide
  • the sacrificial substrate 503 is made of silicon.
  • a piezoelectric layer 504 is formed on the sacrificial substrate 503 .
  • the material of the piezoelectric layer 504 includes: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
  • the piezoelectric layer 504 is made of lithium niobate.
  • FIG. 35 is a schematic cross-sectional view along line E-E in FIG. 34 .
  • An electrode structure 505 is formed on the piezoelectric layer 504 .
  • the electrode structure 505 includes: a first bus 5051 and a second bus 5052 arranged in parallel along the first direction An electrode strip 5053.
  • the second bus 5052 connects a plurality of second electrode strips 5054 arranged in parallel along the second direction Y.
  • the first direction X is perpendicular to the second direction Y.
  • the first electrode The strips 5053 and the second electrode strips 5054 are alternately placed.
  • the widths of the first electrode strip 5053 and the second electrode strip 5054 are equal; the first electrode strip 5053 and the second electrode strip 5054 have a first width dimension d1, the central axis of the adjacent first electrode strip 5053 and the central axis of the second electrode strip 5054 have a first center dimension d2, and the ratio of the first center dimension d2 to the first width dimension d1 ranges from 1.2 to 20.
  • the thickness of the first electrode strip 5053 and the second electrode strip 5054 is equal to the first width dimension d1; in other embodiments, the first electrode strip and the second electrode strip 5054 have a thickness equal to the first width dimension d1.
  • the thickness of the strip may also be different than the first width dimension.
  • the material of the electrode structure 505 includes: one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
  • the electrode structure 505 is one or more layers.
  • the electrode structure 505 has two layers, and the material of the electrode structure 505 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
  • FIG. 36 Please refer to FIG. 36 .
  • the view directions of FIG. 36 and FIG. 35 are consistent.
  • a sacrificial layer 508 is formed on the piezoelectric layer 504 , and the sacrificial layer 508 at least covers the electrode structure 505 .
  • the material of the sacrificial layer 508 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
  • the sacrificial layer 508 is made of polyimide.
  • an intermediate layer 501 is formed on the piezoelectric layer 504.
  • the intermediate layer 501 at least covers the sacrificial layer 508.
  • the intermediate layer 501 includes opposite first sides 501a and second sides 501b, so The piezoelectric layer 504 and the sacrificial substrate 503 are located on the second side 501b.
  • the material of the intermediate layer 501 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
  • the material of the middle layer 501 is silicon dioxide.
  • a substrate 500 is provided.
  • the material of the substrate 500 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramic or polymer; the polymer includes: benzocyclobutane olefins (ie, BCB), photosensitive epoxy photoresists (eg, SU-8), polyimide.
  • the polymer includes: benzocyclobutane olefins (ie, BCB), photosensitive epoxy photoresists (eg, SU-8), polyimide.
  • the material of the substrate 500 is silicon.
  • the substrate 500 and the intermediate layer 501 are bonded, and the substrate 500 is located on the first side 501a; after the substrate 500 and the intermediate layer 501 are bonded, the sacrificial substrate 503 is removed.
  • the process of removing the sacrificial substrate 503 includes: physical grinding process, wet etching process or dry etching process.
  • the process of removing the sacrificial substrate 503 adopts a physical grinding process.
  • a bonding process is used to join the substrate 500 and the intermediate layer 501; in other embodiments, an adhesion process may also be used to join the substrate and the intermediate layer.
  • Figure 41 is a schematic cross-sectional view along the F-F line in Figure 40, forming a frequency modulation layer 506, which is located on the second side 501b and on the piezoelectric layer 504, the intermediate layer 501 and the frequency modulation layer 506 are respectively located on both sides of the piezoelectric layer 504, and the electrode structure 505 and the frequency modulation layer 506 are respectively located on both sides of the piezoelectric layer 504.
  • the material of the frequency modulation layer 506 includes metal or insulating dielectric;
  • the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt or titanium;
  • the insulating dielectric includes: silicon nitride , silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
  • the material of the frequency modulation layer 506 is silicon nitride.
  • the frequency modulation area S of the frequency modulation layer 506 includes a plurality of grooves 507, and the projection of the electrode structure 505 on the substrate 500 is located in the projection range of the frequency modulation area S on the substrate 500. Inside. By increasing or decreasing the depth of the groove 507, the resonant frequency of the resonant device can be adjusted, making the frequency modulation layer 506 more flexible and precise in controlling the device frequency.
  • a plurality of grooves 507 are evenly distributed within the frequency modulation area.
  • the distribution of multiple grooves 507 can be in any polygonal or circular shape, and a single groove 507 can be in any polygonal or circular shape.
  • a plurality of the grooves 507 are distributed in a rectangular shape, and a single groove 507 is also in a rectangular shape.
  • Figure 42 Please refer to Figure 42.
  • the views of Figure 42 and Figure 41 are in the same direction.
  • the sacrificial layer 508 is removed, and a cavity 502 is formed in the intermediate layer 501.
  • the opening of the cavity 502 Located on the second side 501b, the electrode structure 505 is located in the cavity 502.
  • the piezoelectric layer 504 can provide a relatively flat surface for the formed frequency modulation layer 506, reducing the thin film of the frequency modulation layer 506.
  • the lattice defects improve the film quality, thereby making the frequency modulation layer 506 more flexible and precise in controlling the frequency of the device.
  • the electrode structure 505 since the electrode structure 505 is located in the cavity 502, it can effectively prevent the electrode structure 505 from being oxidized or corroded during use of the device.
  • a wet etching process is used to remove the sacrificial layer 506 .
  • the embodiment of the present invention also provides a bulk acoustic wave resonance device.
  • a substrate 500 An intermediate layer 501.
  • the intermediate layer 501 includes an opposite first side 501a and a second side 501b, so
  • the substrate 500 is located on the first side 501a, the intermediate layer 501 includes a cavity 502, and the opening of the cavity 502 is located on the second side 501b;
  • an electrode structure 505 is located in the cavity 502;
  • piezoelectric Layer 504 is located on the second side 501b and is located on the electrode structure 505.
  • the piezoelectric layer 504 at least covers the cavity 505; frequency modulation layer 506 is located on the second side 501b and is located on the piezoelectric layer.
  • the frequency modulation area S of the frequency modulation layer 506 includes a plurality of grooves 507 , and the projection of the electrode structure 505 on the substrate 500 is located within the projection range of the frequency modulation area S on the substrate 500 .
  • the piezoelectric layer 504 can provide a relatively flat surface for the formed frequency modulation layer 506, reduce the lattice defects of the frequency modulation layer 506 film, improve the film quality, and thus make the frequency modulation layer 506 more flexible and accurate in controlling the frequency of the device.
  • the electrode structure 505 since the electrode structure 505 is located in the cavity 502, the electrode structure 505 can be effectively prevented from being oxidized or corroded during use of the device.
  • the material of the substrate 500 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e., BCB), photosensitive epoxy photoresist (e.g., SU-8), polyimide.
  • BCB benzocyclobutene
  • photosensitive epoxy photoresist e.g., SU-8
  • polyimide polyimide
  • the material of the substrate 500 is silicon.
  • the material of the intermediate layer 501 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
  • the material of the middle layer 501 is silicon dioxide.
  • the material of the piezoelectric layer 504 includes: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
  • the piezoelectric layer 504 is made of lithium niobate.
  • the electrode structure 505 includes: a first bus 5051 and a second bus 5052 arranged in parallel along the first direction An electrode strip 5053.
  • the second bus 5052 connects a plurality of second electrode strips 5054 arranged in parallel along the second direction Y.
  • the first direction X is perpendicular to the second direction Y.
  • the first electrode The strips 5053 and the second electrode strips 5054 are alternately placed.
  • the widths of the first electrode strip 5053 and the second electrode strip 5054 are equal; the first electrode strip 5053 and the second electrode strip 5054 have a first width dimension d1.
  • the central axis of the first electrode strip 5053 and the second electrode strip has a first center dimension d2, and the ratio of the first center dimension d2 to the first width dimension d1 ranges from 1.2 to 20.
  • the thickness of the first electrode strip 5053 and the second electrode strip 5054 is equal to the first width dimension d1; in other embodiments, the first electrode strip and the second electrode strip 5054 have a thickness equal to the first width dimension d1.
  • the thickness of the strip may also be different than the first width dimension.
  • the material of the electrode structure 505 includes: one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
  • the electrode structure 505 is one or more layers.
  • the electrode structure 505 has two layers, and the material of the electrode structure 505 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
  • the material of the frequency modulation layer 506 includes metal or insulating dielectric;
  • the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt or titanium;
  • the insulating dielectric includes: silicon nitride , silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
  • the frequency modulation layer 506 is made of silicon nitride.
  • the resonant frequency of the resonant device can be adjusted, so that the frequency modulation layer 506 can control the device frequency more flexibly and accurately.
  • a plurality of grooves 507 are evenly distributed within the frequency modulation area.
  • the distribution of multiple grooves 507 can be in any polygonal or circular shape, and a single groove 507 can be in any polygonal or circular shape.
  • a plurality of the grooves 507 are distributed in a rectangular shape, and a single groove 507 is also in a rectangular shape.
  • 43 to 53 are schematic structural diagrams of each step of a method for forming a bulk acoustic wave resonance device in another embodiment of the present invention.
  • a sacrificial substrate 603 is provided.
  • the material of the sacrificial substrate 603 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, Gallium nitride, aluminum oxide, magnesium oxide, ceramic or polymer; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), polyimide.
  • the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), polyimide.
  • the sacrificial substrate 603 is made of silicon.
  • a piezoelectric layer 604 is formed on the sacrificial substrate 603 .
  • the material of the piezoelectric layer 604 includes: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
  • the piezoelectric layer 604 is made of lithium niobate.
  • FIG. 46 is a schematic cross-sectional view along line G-G in FIG. 45 .
  • An electrode structure 605 is formed on the piezoelectric layer 604 .
  • the electrode structure 605 includes: a first bus 6051 and a second bus 6052 arranged in parallel along the first direction An electrode strip 6053.
  • the second bus 6052 connects a plurality of second electrode strips 6054 arranged in parallel along the second direction Y.
  • the first direction X is perpendicular to the second direction Y.
  • the first electrode The strips 6053 and the second electrode strips 6054 are alternately placed.
  • the widths of the first electrode strip 6053 and the second electrode strip 6054 are equal; the first electrode strip 6053 and the second electrode strip 6054 have a first width dimension d1.
  • the central axis of the first electrode strip 6053 and the central axis of the second electrode strip 6054 have a first central dimension d2, and the ratio range of the first central dimension d2 to the first width dimension d1 is: 1.2 ⁇ 20.
  • the thickness of the first electrode strip 6053 and the second electrode strip 6054 is equal to the first width dimension d1; in other embodiments, the first electrode strip and the second electrode strip The thickness of the strip may also be different than the first width dimension.
  • the material of the electrode structure 605 includes one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
  • the electrode structure 605 is one or more layers. In this embodiment, the electrode structure 605 is two layers, and the material of the electrode structure 605 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
  • a sacrificial layer 608 is formed on the piezoelectric layer 604 , and the sacrificial layer 608 at least covers the electrode structure 605 .
  • the material of the sacrificial layer 608 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
  • the sacrificial layer 608 is made of polyimide.
  • an intermediate layer 601 is formed on the piezoelectric layer 604.
  • the intermediate layer 601 at least covers the sacrificial layer 608.
  • the intermediate layer 601 includes opposite first sides 601a and second sides 601b, so The piezoelectric layer 604 and the sacrificial substrate 603 are located on the second side 601b.
  • the material of the intermediate layer 601 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
  • the material of the middle layer 601 is silicon dioxide.
  • a substrate 600 is provided.
  • the material of the substrate 600 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e., BCB), photosensitive epoxy photoresist (e.g., SU-8), polyimide.
  • BCB benzocyclobutene
  • photosensitive epoxy photoresist e.g., SU-8
  • polyimide polyimide
  • the material of the substrate 600 is silicon.
  • the substrate 600 and the intermediate layer 601 are bonded, and the substrate 600 is located on the first side 601 a; after the substrate 600 and the intermediate layer 601 are bonded, the sacrificial substrate 603 is removed.
  • the process of removing the sacrificial substrate 603 includes: physical grinding process, wet etching process or dry etching process.
  • the process of removing the sacrificial substrate 603 adopts a physical grinding process.
  • a bonding process is used to join the substrate 600 and the intermediate layer 601; in other embodiments, an adhesion process may also be used to join the substrate and the intermediate layer.
  • a temperature compensation layer 607 is formed on the second side 601 a and on the piezoelectric layer 604 .
  • the material of the temperature compensation layer 607 includes: silicon dioxide, silicon oxycarbide or silicon oxyfluoride.
  • the temperature compensation layer 607 is made of silicon dioxide.
  • the frequency temperature coefficient of the resonant device is reduced, tending to 0 ppm/°C, thereby improving the resonant device. Frequency-temperature stability.
  • a frequency modulation layer 606 is formed, which is located on the second side 601b and on the temperature compensation layer 607, the projection of the electrode structure 605 on the substrate 600 is located within the projection range of the frequency modulation layer 606 on the substrate 600, and the piezoelectric layer 604 and the frequency modulation layer 606 are respectively located on both sides of the temperature compensation layer 607.
  • the material of the frequency modulation layer 606 includes metal or insulating dielectric;
  • the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt or titanium;
  • the insulating dielectric includes: silicon nitride , silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
  • the frequency modulation layer 606 is made of silicon nitride.
  • the sacrificial layer 608 is removed to form a cavity 602 in the middle layer 601.
  • the opening of the cavity 602 is located at the second side 601b, and the electrode structure 605 is located in the cavity 602.
  • the piezoelectric layer 604 can provide a relatively flat surface for the formed frequency modulation layer 606, reducing the thin film of the frequency modulation layer 606.
  • the lattice defects improve the film quality, thereby making the frequency modulation layer 606 more flexible and precise in controlling the frequency of the device.
  • the electrode structure 605 since the electrode structure 605 is located in the cavity 602, it can effectively prevent the electrode structure 605 from being oxidized or corroded during use of the device.
  • a wet etching process is used to remove the sacrificial layer 608 .
  • the embodiment of the present invention also provides a bulk acoustic wave resonance device.
  • a substrate 600 includes: a substrate 600; an intermediate layer 601.
  • the intermediate layer 601 includes an opposite first side 601a and a second side 601b, so
  • the substrate 600 is located on the first side 601a, the intermediate layer 601 includes a cavity 602, and the opening of the cavity 602 is located on the second side 601b;
  • an electrode structure 605 is located in the cavity 602;
  • piezoelectric Layer 604 is located on the second side 601b and is located on the electrode structure 605.
  • the piezoelectric layer 604 at least covers the cavity 605; a temperature compensation layer 607 is located on the second side 601b and is located on the piezoelectric layer 605. on the electrical layer 604; the frequency modulation layer 606 is located on the second side 601b and on the piezoelectric layer 604, and the projection of the electrode structure 605 on the substrate 600 is located on the substrate 600. Within the projection range on side.
  • the piezoelectric layer 604 can provide a relatively flat surface for the formed frequency modulation layer 606, reducing the thin film of the frequency modulation layer 606.
  • the lattice defects improve the film quality, thereby making the frequency modulation layer 606 more flexible and precise in controlling the frequency of the device.
  • the electrode structure 605 since the electrode structure 605 is located in the cavity 602, it can effectively prevent the electrode structure 605 from being oxidized or corroded during use of the device.
  • the material of the substrate 600 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e., BCB), photosensitive epoxy photoresist (e.g., SU-8), polyimide.
  • BCB benzocyclobutene
  • photosensitive epoxy photoresist e.g., SU-8
  • polyimide polyimide
  • the material of the substrate 600 is silicon.
  • the material of the intermediate layer 601 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
  • the material of the middle layer 601 is silicon dioxide.
  • the material of the piezoelectric layer 604 includes: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
  • the piezoelectric layer 604 is made of lithium niobate.
  • the electrode structure 605 includes: a first bus 6051 and a second bus 6052 arranged in parallel along a first direction X, the first bus 6051 connects a plurality of first electrode strips 6053 arranged in parallel along a second direction Y, the second bus 6052 connects a plurality of second electrode strips 6054 arranged in parallel along the second direction Y, the first direction X is perpendicular to the second direction Y, and the first electrode strips 6053 and the second electrode strips 6054 are alternately arranged.
  • the widths of the first electrode strip 6053 and the second electrode strip 6054 are equal; the first electrode strip 6053 and the second electrode strip 6054 have a first width dimension d1, the central axis of the adjacent first electrode strip 6053 and the central axis of the second electrode strip 6054 have a first center dimension d2, and the ratio of the first center dimension d2 to the first width dimension d1 ranges from 1.2 to 20.
  • the thickness of the first electrode strip 6053 and the second electrode strip 6054 is equal to the first width dimension d1; in other embodiments, the first electrode strip and the second electrode strip The thickness of the strip may also be different than the first width dimension.
  • the material of the electrode structure 605 includes: one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
  • the electrode structure 605 is one or more layers. In this embodiment, the electrode structure 605 is two layers, and the material of the electrode structure 605 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
  • the material of the frequency modulation layer 606 includes metal or insulating dielectric;
  • the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt or titanium;
  • the insulating dielectric includes: silicon nitride , silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
  • the frequency modulation layer 606 is made of silicon nitride.
  • the material of the temperature compensation layer 607 includes: silicon dioxide, silicon oxycarbide or silicon oxyfluoride.
  • the temperature compensation layer 607 is made of silicon dioxide.
  • the frequency temperature coefficient of the resonant device is reduced, tending to 0 ppm/°C, thereby improving the resonant device. Frequency-temperature stability.
  • 54 to 65 are schematic structural diagrams of each step of a method for forming a bulk acoustic wave resonance device in another embodiment of the present invention.
  • a sacrificial substrate 703 is provided.
  • the material of the sacrificial substrate 703 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e. , BCB), photosensitive epoxy resin photoresist (for example, SU-8), polyimide.
  • BCB benzocyclobutene
  • photosensitive epoxy resin photoresist for example, SU-8
  • polyimide polyimide
  • the sacrificial substrate 703 is made of silicon.
  • a piezoelectric layer 704 is formed on the sacrificial substrate 703 .
  • the material of the piezoelectric layer 704 includes: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
  • the piezoelectric layer 704 is made of lithium niobate.
  • FIG. 57 is a schematic cross-sectional view along line H-H in FIG. 56 .
  • An electrode structure 705 is formed on the piezoelectric layer 704 .
  • the electrode structure 705 includes: parallel rows along the first direction
  • the first bus 7051 and the second bus 7052 are arranged.
  • the first bus 7051 connects a plurality of first electrode strips 7053 arranged in parallel along the second direction Y.
  • the second bus 7052 connects a plurality of first electrode strips 7053 arranged in parallel along the second direction Y.
  • the second electrode strips 7054 are arranged in parallel, the first direction X is perpendicular to the second direction Y, and the first electrode strips 7053 and the second electrode strips 7054 are staggered.
  • the widths of the first electrode strip 7053 and the second electrode strip 7054 are equal; the first electrode strip 7053 and the second electrode strip 7054 have a first width dimension d1.
  • the central axis of the first electrode strip 7053 and the central axis of the second electrode strip 7054 have a first central dimension d2, and the ratio range of the first central dimension d2 to the first width dimension d1 is: 1.2 ⁇ 20.
  • the thickness of the first electrode strip 7053 and the second electrode strip 7054 is equal to the first width dimension d1; in other embodiments, the first electrode strip and the second electrode strip 7054 have a thickness equal to the first width dimension d1.
  • the thickness of the strip may also be different than the first width dimension.
  • the material of the electrode structure 705 includes: one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
  • the electrode structure 705 is one layer or multiple layers. In this embodiment, the electrode structure 705 is two layers, and the material of the electrode structure 705 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
  • FIG. 58 Please refer to FIG. 58.
  • the view directions of FIG. 58 and FIG. 57 are consistent.
  • a sacrificial layer 709 is formed on the piezoelectric layer 704, and the sacrificial layer 709 at least covers the electrode structure 705.
  • the material of the sacrificial layer 709 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
  • the sacrificial layer 709 is made of polyimide.
  • an intermediate layer 701 is formed on the piezoelectric layer 704.
  • the intermediate layer 701 at least covers the sacrificial layer 709.
  • the intermediate layer 701 includes opposite first sides 701a and second sides 701b, so The piezoelectric layer 704 and the sacrificial substrate 703 are located on the second Side 701b.
  • the material of the intermediate layer 701 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
  • the material of the intermediate layer 701 is silicon dioxide.
  • a substrate 700 is provided.
  • the material of the substrate 700 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e., BCB), photosensitive epoxy photoresist (e.g., SU-8), polyimide.
  • BCB benzocyclobutene
  • photosensitive epoxy photoresist e.g., SU-8
  • polyimide polyimide
  • the material of the substrate 700 is silicon.
  • the substrate 700 and the intermediate layer 701 are bonded, and the substrate 700 is located on the first side 701a; after the substrate 700 and the intermediate layer 701 are bonded, the sacrificial substrate 703 is removed.
  • the process of removing the sacrificial substrate 703 includes: physical grinding process, wet etching process or dry etching process.
  • the process of removing the sacrificial substrate 703 adopts a physical grinding process.
  • a bonding process is used to join the substrate 700 and the intermediate layer 701; in other embodiments, an adhesion process may also be used to join the substrate and the intermediate layer.
  • a temperature compensation layer 708 is formed on the second side 701a and on the piezoelectric layer 704.
  • the material of the temperature compensation layer 708 includes: silicon dioxide, silicon oxycarbide or silicon oxyfluoride.
  • the temperature compensation layer 708 is made of silicon dioxide.
  • the frequency temperature coefficient of the resonant device is reduced and tends to 0 ppm/°C, thereby improving the frequency-temperature stability of the resonant device.
  • Figure 64 is a schematic cross-sectional view along line I-I in Figure 63.
  • the frequency modulation layer 706 is formed, located on the second side 701b and on the temperature compensation layer 708.
  • the piezoelectric layer 704 and the The frequency modulation layer 706 is located on both sides of the temperature compensation layer 708 respectively.
  • the material of the frequency modulation layer 706 includes metal or insulating dielectric;
  • the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt or titanium;
  • the insulating dielectric includes: silicon nitride , silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
  • the frequency modulation layer 706 is made of silicon nitride.
  • the frequency modulation layer 706 includes a groove 707, and the projection of the electrode structure 705 on the substrate 700 is located within the projection range of the groove 707 on the substrate 700.
  • the resonant frequency of the resonant device can be adjusted, making the frequency modulation layer 706 more flexible and precise in controlling the device frequency.
  • the groove 707 is in an arbitrary polygonal shape. In this embodiment, the groove 707 is rectangular.
  • Figure 65 Please refer to Figure 65.
  • the views of Figure 65 and Figure 64 are in the same direction.
  • the sacrificial layer 709 is removed, and a cavity 702 is formed in the intermediate layer 701.
  • the opening of the cavity 702 Located on the second side 701b, the electrode structure 705 is located in the cavity 702.
  • the piezoelectric layer 704 can provide a relatively flat surface for the frequency modulation layer 706 formed, reducing the thin film of the frequency modulation layer 706.
  • the lattice defects improve the film quality, thereby making the frequency modulation layer 706 more flexible and precise in controlling the frequency of the device.
  • due to the The electrode structure 705 is located in the cavity 702, which can effectively prevent the electrode structure 705 from being oxidized or corroded during use of the device.
  • a wet etching process is used to remove the sacrificial layer 709 .
  • a BAW resonator is also provided in an embodiment of the present invention, and please continue to refer to FIG. 65, comprising: a substrate 700; an intermediate layer 701, wherein the intermediate layer 701 comprises a first side 701a and a second side 701b opposite to each other, wherein the substrate 700 is located on the first side 701a, and the intermediate layer 701 comprises a cavity 702, wherein the opening of the cavity 702 is located on the second side 701b; an electrode structure 705, which is located in the cavity 702; a piezoelectric layer 704, which is located on the second side 701b and on the electrode structure 705, wherein the piezoelectric layer 704 at least covers the A cavity 705; a temperature compensation layer 708, located on the second side 701b and on the piezoelectric layer 704; a frequency modulation layer 706, located on the second side 701b and on the piezoelectric layer 704, the intermediate layer 701 and the frequency modulation layer 706 are respectively located on both sides of the piez
  • the piezoelectric layer 704 can provide a relatively flat surface for the frequency modulation layer 706 formed, reducing the thin film of the frequency modulation layer 706.
  • the lattice defects improve the film quality, thereby making the frequency modulation layer 706 more flexible and precise in controlling the frequency of the device.
  • the electrode structure 705 since the electrode structure 705 is located in the cavity 702, it can effectively prevent the electrode structure 705 from being oxidized or corroded during use of the device.
  • the material of the substrate 700 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e., BCB), photosensitive epoxy photoresist (e.g., SU-8), polyimide.
  • BCB benzocyclobutene
  • photosensitive epoxy photoresist e.g., SU-8
  • polyimide polyimide
  • the material of the substrate 700 is silicon.
  • the material of the intermediate layer 701 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg For example, SU-8), polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
  • the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg For example, SU-8), polyimide;
  • the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
  • the material of the intermediate layer 701 is silicon dioxide.
  • the material of the piezoelectric layer 704 includes: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
  • the piezoelectric layer 704 is made of lithium niobate.
  • the electrode structure 705 includes: a first bus 7051 and a second bus 7052 arranged in parallel along the first direction X.
  • the first bus 7051 connects several parallel arranged along the second direction Y.
  • the first electrode strip 7053, the second bus 7052 connects a plurality of second electrode strips 7054 arranged in parallel along the second direction Y, the first direction X is perpendicular to the second direction Y, the first The electrode strips 7053 and the second electrode strips 7054 are alternately placed.
  • the widths of the first electrode strip 7053 and the second electrode strip 7054 are equal; the first electrode strip 7053 and the second electrode strip 7054 have a first width dimension d1, the central axis of the adjacent first electrode strip 7053 and the central axis of the second electrode strip 7054 have a first center dimension d2, and the ratio of the first center dimension d2 to the first width dimension d1 ranges from 1.2 to 20.
  • the thickness of the first electrode strip 7053 and the second electrode strip 7054 is equal to the first width dimension d1; in other embodiments, the first electrode strip and the second electrode strip 7054 have a thickness equal to the first width dimension d1.
  • the thickness of the strip may also be different than the first width dimension.
  • the material of the electrode structure 705 includes: one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
  • the electrode structure 705 is one or more layers.
  • the electrode structure 705 has two layers, and the material of the electrode structure 705 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
  • the material of the frequency modulation layer 706 includes metal or insulating dielectric; where the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt or titanium; insulating dielectric Materials include: silicon nitride, silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
  • the frequency modulation layer 706 is made of silicon nitride.
  • the resonant frequency of the resonant device can be adjusted by increasing or decreasing the depth of the groove 707 , so that the frequency modulation layer 706 can control the device frequency more flexibly and accurately.
  • the groove 707 is in an arbitrary polygonal shape. In this embodiment, the groove 707 is rectangular.
  • the material of the temperature compensation layer 708 includes: silicon dioxide, silicon oxycarbide or silicon oxyfluoride.
  • the temperature compensation layer 708 is made of silicon dioxide.
  • the frequency temperature coefficient of the resonant device is reduced, tending to 0 ppm/°C, thereby improving the resonant device. Frequency-temperature stability.
  • 66 to 77 are schematic structural diagrams of each step of a method for forming a bulk acoustic wave resonance device in another embodiment of the present invention.
  • a sacrificial substrate 803 is provided.
  • the material of the sacrificial substrate 803 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e. , BCB), photosensitive epoxy resin photoresist (for example, SU-8), polyimide.
  • BCB benzocyclobutene
  • photosensitive epoxy resin photoresist for example, SU-8
  • polyimide polyimide
  • the sacrificial substrate 803 is made of silicon.
  • a piezoelectric layer 804 is formed on the sacrificial substrate 803 .
  • the material of the piezoelectric layer 804 includes: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
  • the piezoelectric layer 804 is made of lithium niobate.
  • Figure 69 is a schematic cross-sectional view along line JJ in Figure 68.
  • An electrode structure 805 is formed on the piezoelectric layer 804 .
  • the electrode structure 805 includes: a first bus 8051 and a second bus 8052 arranged in parallel along a first direction X, the first bus 8051 connects a plurality of first electrode strips 8053 arranged in parallel along a second direction Y, the second bus 8052 connects a plurality of second electrode strips 8054 arranged in parallel along the second direction Y, the first direction X is perpendicular to the second direction Y, and the first electrode strips 8053 and the second electrode strips 8054 are alternately arranged.
  • the widths of the first electrode strip 8053 and the second electrode strip 8054 are equal; the first electrode strip 8053 and the second electrode strip 8054 have a first width dimension d1.
  • the central axis of the first electrode strip 8053 and the central axis of the second electrode strip 8054 have a first central dimension d2, and the ratio range of the first central dimension d2 to the first width dimension d1 is: 1.2 ⁇ 20.
  • the thickness of the first electrode strip 8053 and the second electrode strip 8054 is equal to the first width dimension d1; in other embodiments, the first electrode strip and the second electrode strip The thickness of the strip may also be different than the first width dimension.
  • the material of the electrode structure 805 includes: one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
  • the electrode structure 805 is one or more layers.
  • the electrode structure 805 has two layers, and the material of the electrode structure 805 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
  • FIG. 70 Please refer to FIG. 70 .
  • the view directions of FIG. 70 and FIG. 69 are consistent.
  • a sacrificial layer 809 is formed on the piezoelectric layer 804 , and the sacrificial layer 809 at least covers the electrode structure 805 .
  • the material of the sacrificial layer 809 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
  • the sacrificial layer 809 is made of polyimide.
  • an intermediate layer 801 is formed on the piezoelectric layer 804.
  • the intermediate layer 801 at least covers the sacrificial layer 809.
  • the intermediate layer 801 includes opposite first sides 801a and second sides 801b, so The piezoelectric layer 804 and the sacrificial substrate 803 are located on the second side 801b.
  • the material of the intermediate layer 801 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
  • the material of the middle layer 801 is silicon dioxide.
  • a substrate 800 is provided.
  • the material of the substrate 800 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e., BCB), photosensitive epoxy photoresist (e.g., SU-8), polyimide.
  • BCB benzocyclobutene
  • photosensitive epoxy photoresist e.g., SU-8
  • polyimide polyimide
  • the material of the substrate 800 is silicon.
  • the substrate 800 and the intermediate layer 801 are bonded, and the substrate 800 is located on the first side 801a; after the substrate 800 and the intermediate layer 801 are bonded, the sacrificial substrate 803 is removed.
  • the process of removing the sacrificial substrate 803 includes: physical grinding process, wet etching process or dry etching process.
  • the process of removing the sacrificial substrate 803 adopts a physical grinding process.
  • a bonding process is used to join the substrate 800 and the intermediate layer 801; in other embodiments, an adhesion process may also be used to join the substrate and the intermediate layer.
  • a temperature compensation layer 808 is formed on the second side 801 b and on the piezoelectric layer 804 .
  • the material of the temperature compensation layer 808 includes: silicon dioxide, silicon oxycarbide or silicon oxyfluoride.
  • the temperature compensation layer 808 is made of silicon dioxide.
  • the frequency temperature coefficient of the resonant device is reduced, tending to 0 ppm/°C, thereby improving the resonant device. Frequency-temperature stability.
  • Figure 76 is a schematic cross-sectional diagram along the K-K line in Figure 75, forming a frequency modulation layer 806, which is located on the second side 801b and on the piezoelectric layer 804.
  • the intermediate layer 801 and the frequency modulation layer 806 are respectively located on both sides of the piezoelectric layer 804, and the electrode structure 805 and the frequency modulation layer 806 are respectively located on both sides of the piezoelectric layer 804.
  • the material of the frequency modulation layer 806 includes metal or insulating dielectric;
  • the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt or titanium;
  • the insulating dielectric includes: silicon nitride , silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
  • the frequency modulation layer 806 is made of silicon nitride.
  • the frequency modulation area S of the frequency modulation layer 806 includes a plurality of grooves 807, and the projection of the electrode structure 805 on the substrate 800 is located in the projection range of the frequency modulation area S on the substrate 800. Inside. By increasing or decreasing the depth of the groove 807, the resonant frequency of the resonant device can be adjusted, making the frequency modulation layer 806 more flexible and precise in controlling the device frequency.
  • a plurality of grooves 807 are evenly distributed within the frequency modulation area.
  • the distribution of multiple grooves 807 can be in any polygonal or circular shape, and a single groove 807 can be in any polygonal or circular shape.
  • a plurality of the grooves 807 are distributed in a rectangular shape, and a single groove 807 is also in a rectangular shape.
  • Figure 77 Please refer to Figure 77.
  • the views in Figure 77 and Figure 76 are in the same direction.
  • the sacrificial layer 809 is removed, and a cavity 802 is formed in the intermediate layer 801.
  • the opening of the cavity 802 Located on the second side 801b, the electrode structure 805 is located in the cavity 802.
  • the piezoelectric layer 804 can provide a relatively flat surface for the formed frequency modulation layer 806, reducing the thin film of the frequency modulation layer 806.
  • the lattice defects improve the film quality, thereby making the frequency modulation layer 806 more flexible and precise in controlling the frequency of the device.
  • the electrode structure 805 since the electrode structure 805 is located in the cavity 802, it can effectively prevent the electrode structure 805 from being oxidized or corroded during use of the device.
  • a wet etching process is used to remove the sacrificial layer 809 .
  • a BAW resonator is also provided in an embodiment of the present invention, which includes: a substrate 800; an intermediate layer 801, wherein the intermediate layer 801 includes a first side 801a and a second side 801b opposite to each other, wherein the substrate 800 is located on the first side 801a, and the intermediate layer 801 includes a cavity 802, wherein an opening of the cavity 802 is located on the second side 801b; an electrode structure 805, which is located in the cavity 802; a piezoelectric layer 804, which is located on the second side 801b and on the electrode structure 805, wherein the piezoelectric layer 804 at least covers the cavity 80 2; a temperature compensation layer 808, located on the second side 801b and on the piezoelectric layer 804; a frequency modulation layer 806, located on the second side 801b and on the piezoelectric layer 804, the intermediate layer 801 and the frequency modulation layer 806 are respectively located on both sides of the piezoelectric layer 804, the piezoelectric layer
  • the piezoelectric layer 804 can provide a relatively flat surface for the frequency modulation layer 806 formed, reducing the thin film of the frequency modulation layer 806.
  • the lattice defects improve the film quality, thereby making the frequency modulation layer 806 more flexible and precise in controlling the frequency of the device.
  • the electrode structure 805 since the electrode structure 805 is located in the cavity 802, it can effectively prevent the electrode structure 805 from being oxidized or corroded during use of the device.
  • the material of the substrate 800 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclotine vinyl (i.e., BCB), photosensitive epoxy photoresist (e.g., SU-8), polyimide.
  • BCB benzocyclotine vinyl
  • photosensitive epoxy photoresist e.g., SU-8
  • polyimide polyimide
  • the material of the substrate 800 is silicon.
  • the material of the intermediate layer 801 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
  • the material of the middle layer 801 is silicon dioxide.
  • the material of the piezoelectric layer 804 includes: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
  • the piezoelectric layer 804 is made of lithium niobate.
  • the electrode structure 805 includes: a first bus line 8051 and a second bus line 8052 arranged in parallel along the first direction An electrode strip 8053.
  • the second bus 8052 connects a plurality of second electrode strips 8054 arranged in parallel along the second direction Y.
  • the first direction X is perpendicular to the second direction Y.
  • the first electrode The strips 8053 and the second electrode strips 8054 are alternately placed.
  • the widths of the first electrode strip 8053 and the second electrode strip 8054 are equal; the first electrode strip 8053 and the second electrode strip 8054 have a first width dimension d1.
  • the central axis of the first electrode strip 8053 and the central axis of the second electrode strip 8054 have a first central dimension d2, and the ratio range of the first central dimension d2 to the first width dimension d1 is: 1.2 ⁇ 20.
  • the thickness of the first electrode strip 8053 and the second electrode strip 8054 is equal to the first width dimension d1; in other embodiments, the first electrode strip and the second electrode strip The thickness of the strip may also be different than the first width dimension.
  • the material of the electrode structure 805 includes: one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
  • the electrode structure 805 is one or more layers.
  • the electrode structure 805 has two layers, and the material of the electrode structure 805 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
  • the material of the frequency modulation layer 806 includes metal or insulating dielectric;
  • the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt or titanium;
  • the insulating dielectric includes: silicon nitride, silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
  • the frequency modulation layer 806 is made of silicon nitride.
  • the resonant frequency of the resonant device can be adjusted, so that the frequency modulation layer 806 can control the device frequency more flexibly and accurately.
  • a plurality of grooves 807 are evenly distributed within the frequency modulation area.
  • the distribution of multiple grooves 807 can be in any polygonal or circular shape, and a single groove 807 can be in any polygonal or circular shape.
  • a plurality of the grooves 807 are distributed in a rectangular shape, and a single groove 807 is also in a rectangular shape.
  • the material of the temperature compensation layer 808 includes: silicon dioxide, silicon oxycarbide or silicon oxyfluoride.
  • the temperature compensation layer 808 is made of silicon dioxide.
  • the frequency temperature coefficient of the resonant device is reduced, tending to 0 ppm/°C, thereby improving the resonant device. Frequency-temperature stability.
  • 78 to 88 are schematic structural diagrams of each step of a method for forming a bulk acoustic wave resonance device in another embodiment of the present invention.
  • a sacrificial substrate 903 is provided.
  • the material of the sacrificial substrate 903 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e. , BCB), photosensitive epoxy resin photoresist (for example, SU-8), polyimide.
  • BCB benzocyclobutene
  • photosensitive epoxy resin photoresist for example, SU-8
  • polyimide polyimide
  • the sacrificial substrate 903 is made of silicon.
  • a piezoelectric layer 904 is formed on the sacrificial substrate 903 .
  • the material of the piezoelectric layer 904 includes: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
  • the piezoelectric layer 904 is made of lithium niobate.
  • FIG. 81 is a schematic cross-sectional view along line L-L in FIG. 80 .
  • An electrode structure 905 is formed on the piezoelectric layer 904 .
  • the electrode structure 905 includes: a first bus 9051 and a second bus 9052 arranged in parallel along the first direction An electrode strip 9053.
  • the second bus 9052 connects a plurality of second electrode strips 9054 arranged in parallel along the second direction Y.
  • the first direction X is perpendicular to the second direction Y.
  • the first electrode The strips 9053 and the second electrode strips 9054 are alternately placed.
  • the widths of the first electrode strip 9053 and the second electrode strip 9054 are equal; the first electrode strip 9053 and the second electrode strip 9054 have a first width dimension d1, the central axis of the adjacent first electrode strip 9053 and the central axis of the second electrode strip 9054 have a first center dimension d2, and the ratio of the first center dimension d2 to the first width dimension d1 ranges from 1.2 to 20.
  • the thickness of the first electrode strip 9053 and the second electrode strip 9054 is equal to the first width dimension d1; in other embodiments, the thickness of the first electrode strip and the second electrode strip may not be equal to the first width dimension.
  • the material of the electrode structure 905 includes: one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
  • the electrode structure 905 is one or more layers. In this embodiment, the electrode structure 905 is two layers, and the material of the electrode structure 905 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
  • Figure 82 Please refer to Figure 82.
  • the views of Figure 82 and Figure 81 are in the same direction to form a temperature compensation layer.
  • 907 located on the piezoelectric layer 904 and at least covering the electrode structure 905.
  • the material of the temperature compensation layer 907 includes: silicon dioxide, silicon oxycarbide or silicon oxyfluoride.
  • the temperature compensation layer 907 is made of silicon dioxide.
  • the frequency temperature coefficient of the resonant device is reduced, tending to 0 ppm/°C, thereby improving the resonant device. Frequency-temperature stability.
  • the temperature compensation layer 907 covers part of the piezoelectric layer 904; in other embodiments, the temperature compensation layer can also completely cover the piezoelectric layer.
  • a sacrificial layer 908 is formed on the piezoelectric layer 904 , and the sacrificial layer 908 at least covers the temperature compensation layer 907 .
  • the material of the sacrificial layer 908 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
  • the sacrificial layer 908 is made of polyimide.
  • the temperature compensation layer 907 covers part of the piezoelectric layer 904, forming the sacrificial layer 908 will also cover part of the piezoelectric layer 904; in other embodiments, when the temperature When the compensation layer completely covers the piezoelectric layer, the sacrificial layer does not contact the piezoelectric layer.
  • an intermediate layer 901 is formed on the piezoelectric layer 904.
  • the intermediate layer 901 at least covers the sacrificial layer 908.
  • the intermediate layer 901 includes opposite first sides 901a and second sides 901b, so The piezoelectric layer 904 and the sacrificial substrate 903 are located on the second side 901b.
  • the material of the intermediate layer 901 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, Silicon nitride or titanium oxide.
  • the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide
  • the insulating dielectric includes: aluminum nitride, silicon dioxide, Silicon nitride or titanium oxide.
  • the material of the intermediate layer 901 is silicon dioxide.
  • a substrate 900 is provided.
  • the material of the substrate 900 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e., BCB), photosensitive epoxy photoresist (e.g., SU-8), polyimide.
  • BCB benzocyclobutene
  • photosensitive epoxy photoresist e.g., SU-8
  • polyimide polyimide
  • the material of the substrate 900 is silicon.
  • the substrate 900 and the intermediate layer 901 are bonded, and the substrate 900 is located on the first side 901a; after the substrate 900 and the intermediate layer 901 are bonded, the sacrificial substrate 903 is removed.
  • the process of removing the sacrificial substrate 903 includes: physical grinding process, wet etching process or dry etching process.
  • the process of removing the sacrificial substrate 903 adopts a physical grinding process.
  • a bonding process is used to join the substrate 900 and the intermediate layer 901; in other embodiments, an adhesion process may also be used to join the substrate and the intermediate layer.
  • a frequency modulation layer 906 is formed, located on the second side 901b and on the piezoelectric layer 904.
  • the projection of the electrode structure 905 on the substrate 900 is located on the substrate.
  • the intermediate layer 901 and the frequency modulation layer 906 are respectively located on both sides of the piezoelectric layer 904, and the electrode structure 904 and the frequency modulation layer 906 are respectively located on the piezoelectric layer 904. both sides.
  • the material of the frequency modulation layer 906 includes metal or insulating dielectric;
  • the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt or titanium;
  • the insulating dielectric includes: silicon nitride , silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
  • the frequency modulation layer 906 is made of silicon nitride.
  • the sacrificial layer 907 is removed, and a cavity 902 is formed in the middle layer 901.
  • the opening of the cavity 902 is located on the second side 901b.
  • the electrode structure 905 is located in the cavity 902 .
  • the piezoelectric layer 904 can provide a relatively flat surface for the formed frequency modulation layer 906, reducing the thin film of the frequency modulation layer 906.
  • the lattice defects improve the film quality, thereby making the frequency modulation layer 906 more flexible and precise in controlling the frequency of the device.
  • the electrode structure 905 since the electrode structure 905 is located in the cavity 902, it can effectively prevent the electrode structure 905 from being oxidized or corroded during use of the device.
  • the temperature compensation layer 907 is located in the cavity 902, and the piezoelectric layer 904 is located on the temperature compensation layer 907.
  • the process of removing the sacrificial layer 908 adopts a wet etching process.
  • the embodiment of the present invention also provides a bulk acoustic wave resonance device.
  • a substrate 900 includes: a substrate 900; an intermediate layer 901.
  • the intermediate layer 901 includes an opposite first side 901a and a second side 901b, so
  • the substrate 900 is located on the first side 901a, the intermediate layer 901 includes a cavity 902, and the opening of the cavity 902 is located on the second side 901b;
  • an electrode structure 905 is located in the cavity 902;
  • piezoelectric Layer 904 is located on the second side 901b and is located on the electrode structure 905.
  • the piezoelectric layer 904 at least covers the cavity 905; a temperature compensation layer 907 is located in the cavity 902 and at least covers the Electrode structure 905, the piezoelectric layer 904 is located on the temperature compensation layer 907; frequency modulation layer 906 is located on the second side 901b and on the piezoelectric layer 904, the electrode structure 905 is on the substrate 900
  • the projection on is located within the projection range of the frequency modulation layer 906 on the substrate 900.
  • the intermediate layer 901 and the frequency modulation layer 907 are respectively located on both sides of the piezoelectric layer 904.
  • the electrode structure 905 and the The frequency modulation layers 906 are respectively located on both sides of the piezoelectric layer 904.
  • the piezoelectric layer 904 can provide a relatively flat surface for the formed frequency modulation layer 906, reducing the thin film of the frequency modulation layer 906.
  • the lattice defects improve the film quality, thereby making the frequency modulation layer 906 more flexible and precise in controlling the frequency of the device.
  • the electrode structure 905 since the electrode structure 905 is located in the cavity 902, it can effectively prevent the electrode structure 905 from being oxidized or corroded during use of the device.
  • the material of the substrate 900 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e., BCB), photosensitive epoxy photoresist (e.g., SU-8), polyimide.
  • BCB benzocyclobutene
  • photosensitive epoxy photoresist e.g., SU-8
  • polyimide polyimide
  • the material of the substrate 900 is silicon.
  • the material of the intermediate layer 901 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
  • the material of the intermediate layer 901 is silicon dioxide.
  • the material of the piezoelectric layer 904 includes: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
  • the piezoelectric layer 904 is made of lithium niobate.
  • the electrode structure 905 includes: a first bus 9051 and a second bus 9052 arranged in parallel along the first direction An electrode strip 9053.
  • the second bus 9052 connects a plurality of second electrode strips 9054 arranged in parallel along the second direction Y.
  • the first direction X is perpendicular to the second direction Y.
  • the first electrode The strips 9053 and the second electrode strips 9054 are alternately placed.
  • the widths of the first electrode strip 9053 and the second electrode strip 9054 are equal; the first electrode strip 9053 and the second electrode strip 9054 have a first width dimension d1.
  • the central axis of the first electrode strip 9053 and the second electrode strip has a first center dimension d2, and the ratio of the first center dimension d2 to the first width dimension d1 ranges from 1.2 to 20.
  • the thickness of the first electrode strip 9053 and the second electrode strip 9054 is equal to the first width dimension d1; in other embodiments, the thickness of the first electrode strip 9053 and the second electrode strip 9054 is equal to the first width dimension d1.
  • the thickness of the strip may also be different than the first width dimension.
  • the material of the electrode structure 905 includes: one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
  • the electrode structure 905 is one or more layers. In this embodiment, the electrode structure 905 is two layers, and the material of the electrode structure 905 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
  • the material of the frequency modulation layer 906 includes metal or insulating dielectric;
  • the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt or titanium;
  • the insulating dielectric includes: silicon nitride , silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
  • the material of the frequency modulation layer 906 is silicon nitride.
  • the material of the temperature compensation layer 907 includes: silicon dioxide, silicon oxycarbide or silicon oxyfluoride.
  • the temperature compensation layer 907 is made of silicon dioxide.
  • the frequency temperature coefficient of the resonant device is reduced, tending to 0 ppm/°C, thereby improving the resonant device. Frequency-temperature stability.
  • 89 to 100 are schematic structural diagrams of each step of a method for forming a bulk acoustic wave resonance device in another embodiment of the present invention.
  • a sacrificial substrate 1003 is provided.
  • the material of the sacrificial substrate 1003 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e. , BCB), photosensitive epoxy resin photoresist (for example, SU-8), polyimide.
  • BCB benzocyclobutene
  • photosensitive epoxy resin photoresist for example, SU-8
  • polyimide polyimide
  • the sacrificial substrate 1003 is made of silicon.
  • a piezoelectric layer 1004 is formed on the sacrificial substrate 1003 .
  • the materials of the piezoelectric layer 1004 include: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
  • the piezoelectric layer 1004 is made of lithium niobate.
  • FIG. 92 is a schematic cross-sectional view along line M-M in FIG. 91.
  • An electrode structure 1005 is formed on the piezoelectric layer 1004.
  • the electrode structure 1005 includes: a first bus line 10051 and a second bus line 10052 arranged in parallel along the first direction An electrode strip 10053.
  • the second bus 10052 connects a plurality of second electrode strips 10054 arranged in parallel along the second direction Y.
  • the first direction X is perpendicular to the second direction Y.
  • the first electrode The strips 10053 and the second electrode strips 10054 are alternately placed.
  • the widths of the first electrode strip 10053 and the second electrode strip 10054 are equal; the first electrode strip 10053 and the second electrode strip 10054 have a first width dimension d1, the central axis of the adjacent first electrode strip 10053 and the central axis of the second electrode strip 10054 have a first center dimension d2, and the ratio of the first center dimension d2 to the first width dimension d1 ranges from 1.2 to 20.
  • the thickness of the first electrode strip 10053 and the second electrode strip 10054 is equal to the first width dimension d1; in other embodiments, the first electrode strip and the second electrode strip 10054 have a thickness equal to the first width dimension d1.
  • the thickness of the strip may also be different than the first width dimension.
  • the material of the electrode structure 1005 includes: one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
  • the electrode structure 1005 is one or more layers.
  • the electrode structure 1005 has two layers, and the material of the electrode structure 1005 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
  • Figure 93 Please refer to Figure 93.
  • the views of Figure 93 and Figure 92 are in the same direction to form a temperature compensation layer. 1008, located on the piezoelectric layer 1004 and at least covering the electrode structure 1005.
  • the material of the temperature compensation layer 1008 includes: silicon dioxide, silicon oxycarbide or silicon oxyfluoride. In this embodiment, the temperature compensation layer 1008 is made of silicon dioxide.
  • the frequency temperature coefficient of the resonant device is reduced, tending to 0 ppm/°C, thereby improving the resonant device. Frequency-temperature stability.
  • the temperature compensation layer 1008 covers part of the piezoelectric layer 1004; in other embodiments, the temperature compensation layer can also completely cover the piezoelectric layer.
  • a sacrificial layer 1009 is formed on the piezoelectric layer 1004 , and the sacrificial layer 1009 at least covers the temperature compensation layer 1008 .
  • the material of the sacrificial layer 1009 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
  • the sacrificial layer 1009 is made of polyimide.
  • the temperature compensation layer 1008 covers part of the piezoelectric layer 1004, forming the sacrificial layer 1009 will also cover part of the piezoelectric layer 1004; in other embodiments, when the temperature When the compensation layer completely covers the piezoelectric layer, the sacrificial layer does not contact the piezoelectric layer.
  • an intermediate layer 1001 is formed on the piezoelectric layer 1004.
  • the intermediate layer 1001 at least covers the sacrificial layer 1009.
  • the intermediate layer 1001 includes opposite first sides 1001a and second sides 1001b.
  • the piezoelectric layer 1004 and the sacrificial substrate 1003 are located on the second side 1001b.
  • the material of the intermediate layer 1001 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, Silicon nitride or titanium oxide.
  • the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide
  • the insulating dielectric includes: aluminum nitride, silicon dioxide, Silicon nitride or titanium oxide.
  • the material of the middle layer 1001 is silicon dioxide.
  • a substrate 1000 is provided.
  • the material of the substrate 1000 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e., BCB), photosensitive epoxy photoresist (e.g., SU-8), polyimide.
  • BCB benzocyclobutene
  • photosensitive epoxy photoresist e.g., SU-8
  • polyimide polyimide
  • the substrate 1000 is made of silicon.
  • the substrate 1000 and the intermediate layer 1001 are bonded, and the substrate 1000 is located on the first side 1001a; after the substrate 1000 and the intermediate layer 1001 are bonded, the sacrificial substrate 1003 is removed.
  • the process of removing the sacrificial substrate 1003 includes: physical grinding process, wet etching process or dry etching process.
  • the process of removing the sacrificial substrate 1003 adopts a physical grinding process.
  • a bonding process is used to join the substrate 1000 and the intermediate layer 1001; in other embodiments, an adhesion process may also be used to join the substrate and the intermediate layer.
  • Figure 99 is a schematic cross-sectional view along the N-N line in Figure 98, forming a frequency modulation layer 1006, which is located on the second side 1001b and on the piezoelectric layer 1004, the intermediate layer 1001 and the frequency modulation layer 1006 are respectively located on both sides of the piezoelectric layer 1004, and the electrode structure 1004 and the frequency modulation layer 1006 are respectively located on both sides of the piezoelectric layer 1004.
  • the material of the frequency modulation layer 1006 includes metal or insulating dielectric;
  • the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt or titanium;
  • the insulating dielectric includes: silicon nitride , silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
  • the frequency modulation layer 1006 is made of silicon nitride.
  • the frequency modulation layer 1006 includes a groove 1007, and the projection of the electrode structure 1005 on the substrate 1000 is located within the projection range of the groove 1007 on the substrate 1000.
  • the resonant frequency of the resonant device can be adjusted, making the frequency modulation layer 1006 more flexible and precise in controlling the device frequency.
  • the groove 1007 is in an arbitrary polygonal shape. In this embodiment, the groove 1007 is rectangular.
  • Figure 100 Please refer to Figure 100.
  • the views of Figure 100 and Figure 99 are in the same direction.
  • the sacrificial layer 1007 is removed, and a cavity 1002 is formed in the intermediate layer 1001.
  • the opening of the cavity 1002 Located on the second side 1001b, the electrode structure 1005 is located in the cavity 1002.
  • the piezoelectric layer 1004 can provide a relatively flat surface for the formed frequency modulation layer 1006, reducing the thin film of the frequency modulation layer 1006.
  • the lattice defects improve the film quality, thereby making the frequency modulation layer 1006 more flexible and precise in controlling the frequency of the device.
  • the electrode structure 1005 since the electrode structure 1005 is located in the cavity 1002, it can effectively prevent the electrode structure 1005 from being oxidized or corroded during use of the device.
  • the temperature compensation layer 1008 is located in the cavity 1002, and the piezoelectric layer 1004 is located on the temperature compensation layer 1008.
  • a wet etching process is used to remove the sacrificial layer 1006 .
  • the embodiment of the present invention also provides a bulk acoustic wave resonance device.
  • a substrate 1000 An intermediate layer 1001.
  • the intermediate layer 1001 includes an opposite first side 1001a and a second side 1001b, so The substrate 1000 is located on the first side 1001a, the intermediate layer 1001 includes a cavity 1002, and the opening of the cavity 1002 is located on the second side 1001b; an electrode structure 1005 is located in the cavity 1002; piezoelectric layer 1004, located on the second side 1001b and on the electrode structure 1005, the piezoelectric layer 1004 at least covers the cavity 1002; the temperature compensation layer 1008, located in the cavity 1002 and at least covering the electrode Structure 1005, the piezoelectric layer 1004 is located on the temperature compensation layer 1008; the frequency modulation layer 1006 is located on the second side 1001b and is located on the piezoelectric layer 1004, the middle layer 1001 and the frequency modulation layer 1006
  • the electrode structure 1005 and the frequency modulation layer 1006 is located on the second side 1001b and
  • the piezoelectric layer 1004 can provide a relatively flat surface for the formed frequency modulation layer 1006, reducing the thin film of the frequency modulation layer 1006.
  • the lattice defects improve the film quality, thereby making the frequency modulation layer 1006 more flexible and precise in controlling the frequency of the device.
  • the electrode structure 1005 since the electrode structure 1005 is located in the cavity 1002, it can effectively prevent the electrode structure 1005 from being oxidized or corroded during use of the device.
  • the material of the substrate 1000 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e., BCB), photosensitive epoxy photoresist (e.g., SU-8), polyimide.
  • BCB benzocyclobutene
  • photosensitive epoxy photoresist e.g., SU-8
  • polyimide polyimide
  • the substrate 1000 is made of silicon.
  • the material of the intermediate layer 1001 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
  • the material of the middle layer 1001 is silicon dioxide.
  • the materials of the piezoelectric layer 1004 include: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
  • the material of the piezoelectric layer 1004 is lithium niobate.
  • the electrode structure 1005 includes: a first bus line 10051 and a second bus line 10052 arranged in parallel along the first direction An electrode strip 10053.
  • the second bus 10052 connects a plurality of second electrode strips 10054 arranged in parallel along the second direction Y.
  • the first direction X is perpendicular to the second direction Y.
  • the first electrode The strips 10053 and the second electrode strips 10054 are alternately placed.
  • the widths of the first electrode strip 10053 and the second electrode strip 10054 are equal; the first electrode strip 10053 and the second electrode strip 10054 have a first width dimension d1.
  • the central axis of the first electrode strip 10053 and the central axis of the second electrode strip 10054 have a first central dimension d2, and the ratio range of the first central dimension d2 to the first width dimension d1 is: 1.2 ⁇ 20.
  • the thickness of the first electrode strip 10053 and the second electrode strip 10054 is equal to the first width dimension d1; in other embodiments, the first electrode strip and the second electrode strip 10054 have a thickness equal to the first width dimension d1.
  • the thickness of the strip may also be different than the first width dimension.
  • the material of the electrode structure 1005 includes: one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
  • the electrode structure 1005 is one or more layers.
  • the electrode structure 1005 has two layers, and the material of the electrode structure 1005 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
  • the material of the frequency modulation layer 1006 includes metal or insulating dielectric;
  • the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt or titanium;
  • the insulating dielectric includes: silicon nitride , silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
  • the frequency modulation layer 1006 is made of silicon nitride.
  • the resonant frequency of the resonant device can be adjusted, so that the frequency modulation layer 1006 can control the device frequency more flexibly and accurately.
  • the groove 1007 is in an arbitrary polygonal shape.
  • the groove 1007 is in the form of rectangle.
  • the material of the temperature compensation layer 1008 includes: silicon dioxide, silicon oxycarbide or silicon oxyfluoride. In this embodiment, the temperature compensation layer 1008 is made of silicon dioxide.
  • the frequency temperature coefficient of the resonant device is reduced, tending to 0 ppm/°C, thereby improving the resonant device. Frequency-temperature stability.
  • 101 to 112 are schematic structural diagrams of each step of a method for forming a bulk acoustic wave resonance device in another embodiment of the present invention.
  • a sacrificial substrate 1103 is provided.
  • the material of the sacrificial substrate 1103 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e. , BCB), photosensitive epoxy resin photoresist (for example, SU-8), polyimide.
  • BCB benzocyclobutene
  • photosensitive epoxy resin photoresist for example, SU-8
  • polyimide polyimide
  • the sacrificial substrate 1103 is made of silicon.
  • a piezoelectric layer 1104 is formed on the sacrificial substrate 1103 .
  • the material of the piezoelectric layer 1104 includes: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
  • the material of the piezoelectric layer 1104 is lithium niobate.
  • FIG. 104 is a schematic cross-sectional view along line O-O in FIG. 103.
  • An electrode structure 1105 is formed on the piezoelectric layer 1104.
  • the electrode structure 1105 includes: a first bus line 11051 and a second bus line 11052 arranged in parallel along the first direction An electrode strip 11053.
  • the second bus 11052 connects a plurality of second electrode strips 11054 arranged in parallel along the second direction Y.
  • the first direction X is perpendicular to the second direction Y.
  • the first electrode Article 11053 and the second The electrode strips 11054 are staggered.
  • the widths of the first electrode strip 11053 and the second electrode strip 11054 are equal; the first electrode strip 11053 and the second electrode strip 11054 have a first width dimension d1.
  • the central axis of the first electrode strip 11053 and the central axis of the second electrode strip 11054 have a first central dimension d2, and the ratio range of the first central dimension d2 to the first width dimension d1 is: 1.2 ⁇ 20.
  • the thickness of the first electrode strip 11053 and the second electrode strip 11054 is equal to the first width dimension d1; in other embodiments, the thickness of the first electrode strip 11053 and the second electrode strip 11054 is equal to the first width dimension d1.
  • the thickness of the strip may also be different than the first width dimension.
  • the material of the electrode structure 1105 includes: one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
  • the electrode structure 1105 is one or more layers. In this embodiment, the electrode structure 1105 is two layers, and the material of the electrode structure 1105 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
  • FIG. 105 Please refer to FIG. 105 .
  • the view directions of FIG. 105 and FIG. 104 are consistent.
  • a temperature compensation layer 1108 is formed, located on the piezoelectric layer 1104 and at least covering the electrode structure 1105 .
  • the material of the temperature compensation layer 1108 includes: silicon dioxide, silicon oxycarbide or silicon oxyfluoride.
  • the temperature compensation layer 1108 is made of silicon dioxide.
  • the frequency temperature coefficient of the resonant device is reduced, tending to 0 ppm/°C, thereby improving the resonant device. Frequency-temperature stability.
  • the temperature compensation layer 1108 covers part of the piezoelectric layer 1104; in other embodiments, the temperature compensation layer can also completely cover the piezoelectric layer.
  • a sacrificial layer 1109 is formed on the piezoelectric layer 1104 , and the sacrificial layer 1109 at least covers the temperature compensation layer 1108 .
  • the material of the sacrificial layer 1109 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg Such as, SU-8), polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
  • the sacrificial layer 1109 is made of polyimide.
  • the temperature compensation layer 1108 covers part of the piezoelectric layer 1104, forming the sacrificial layer 1109 will also cover part of the piezoelectric layer 1104; in other embodiments, when the temperature When the compensation layer completely covers the piezoelectric layer, the sacrificial layer does not contact the piezoelectric layer.
  • an intermediate layer 1101 is formed on the piezoelectric layer 1104.
  • the intermediate layer 1101 at least covers the sacrificial layer 1109.
  • the intermediate layer 1101 includes opposite first sides 1101a and second sides 1101b, so The piezoelectric layer 1104 and the sacrificial substrate 1103 are located on the second side 1101b.
  • the material of the intermediate layer 1101 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
  • the material of the intermediate layer 1101 is silicon dioxide.
  • a substrate 1100 is provided.
  • the material of the substrate 1100 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e., BCB), photosensitive epoxy photoresist (e.g., SU-8), polyimide.
  • BCB benzocyclobutene
  • photosensitive epoxy photoresist e.g., SU-8
  • polyimide polyimide
  • the substrate 1100 is made of silicon.
  • the substrate 1100 and the intermediate layer 1101 are bonded, and the substrate 1100 is located on the first side 1101a; after the substrate 1100 and the intermediate layer 1101 are bonded, the sacrificial substrate 1103 is removed.
  • the process of removing the sacrificial substrate 1103 includes: a physical grinding process, a wet etching process or a dry etching process.
  • the process of removing the sacrificial substrate 1103 adopts a physical grinding process.
  • a bonding process is used to join the substrate 1100 and the intermediate layer 1101; in other embodiments, an adhesion process may also be used to join the substrate and the intermediate layer.
  • Figure 111 is a schematic cross-sectional view along line P-P in Figure 110.
  • the frequency modulation layer 1106 is formed, located on the second side 1101b and on the piezoelectric layer 1104.
  • the intermediate layer 1101 and the The frequency modulation layer 1106 is respectively located on both sides of the piezoelectric layer 1104, and the electrode structure 1105 and the frequency modulation layer 1106 are respectively located on both sides of the piezoelectric layer 1104.
  • the material of the frequency modulation layer 1106 includes metal or insulating dielectric; the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt or titanium; the insulating dielectric includes: silicon nitride , silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
  • the frequency modulation layer 1106 is made of silicon nitride.
  • the frequency modulation area S of the frequency modulation layer 1106 includes a plurality of grooves 1107, and the projection of the electrode structure 1105 on the substrate 1100 is located in the projection range of the frequency modulation area S on the substrate 1100. Inside. By increasing or decreasing the depth of the groove 1107, the resonant frequency of the resonant device can be adjusted, making the frequency modulation layer 1106 more flexible and precise in controlling the device frequency.
  • a plurality of grooves 1107 are evenly distributed within the frequency modulation area.
  • the distribution of multiple grooves 1107 can be in any polygonal or circular shape, and a single groove 1107 can be in any polygonal or circular shape.
  • a plurality of the grooves 1107 are distributed in a rectangular shape, and a single groove 1107 is also in a rectangular shape.
  • the sacrificial layer 1109 is removed, and a cavity 1102 is formed in the middle layer 1101.
  • the opening of the cavity 1102 is located on the second side 1101b.
  • the electrode structure 1105 is located in the cavity 1102.
  • the piezoelectric layer 1104 can provide a relatively flat surface for the formed frequency modulation layer 1106, reducing the thin film of the frequency modulation layer 1106.
  • the lattice defects improve the film quality, thereby making the frequency modulation layer 1106 more flexible and precise in controlling the frequency of the device.
  • the electrode structure 1105 since the electrode structure 1105 is located in the cavity 1102, it can effectively prevent the electrode structure 1105 from being oxidized or corroded during use of the device.
  • the temperature compensation layer 1108 is located in the cavity 1102, and the piezoelectric layer 1104 is located on the temperature compensation layer 1108.
  • a wet etching process is used to remove the sacrificial layer 1106 .
  • the embodiment of the present invention also provides a bulk acoustic wave resonance device.
  • a substrate 1100 An intermediate layer 1101.
  • the intermediate layer 1101 includes an opposite first side 1101a and a second side 1101b, so The substrate 1100 is located on the first side 1101a, the intermediate layer 1101 includes a cavity 1102, and the opening of the cavity 1102 is located on the second side 1101b; an electrode structure 1105 is located in the cavity 1102; piezoelectric Layer 1104 is located on the second side 1101b and is located on the electrode structure 1105.
  • the piezoelectric layer 1104 at least covers the cavity 1102; a temperature compensation layer 1108 is located in the cavity 1102 and at least covers the Electrode structure 1105, the piezoelectric layer 1104 is located on the temperature compensation layer 1108; the frequency modulation layer 1106 is located on the second side 1101b and is located on the piezoelectric layer 1104, the middle layer 1101 and the frequency modulation layer 1106 are respectively located on both sides of the piezoelectric layer 1104.
  • the electrode structure 1105 and the frequency modulation layer 1106 are respectively located on both sides of the piezoelectric layer 1104.
  • the frequency modulation area S of the frequency modulation layer 1106 includes a plurality of grooves. 1107.
  • the projection of the electrode structure 1105 on the substrate 1100 is located within the projection range of the frequency modulation area S on the substrate 1100.
  • the piezoelectric layer 1104 can provide a relatively flat surface for the formed frequency modulation layer 1106, reducing the thin film of the frequency modulation layer 1106.
  • the lattice defects improve the film quality, thereby making the frequency modulation layer 1106 more flexible and precise in controlling the frequency of the device.
  • the electrode structure 1105 is located in the cavity 1102, it can effectively prevent the electrode structure 1105 from being oxidized or corroded during use of the device.
  • the material of the substrate 1100 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e., BCB), photosensitive epoxy photoresist (e.g., SU-8), polyimide.
  • BCB benzocyclobutene
  • photosensitive epoxy photoresist e.g., SU-8
  • polyimide polyimide
  • the substrate 1100 is made of silicon.
  • the material of the intermediate layer 1101 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
  • the material of the middle layer 1101 is silicon dioxide.
  • the material of the piezoelectric layer 1104 includes: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
  • the piezoelectric layer 1104 is made of lithium niobate.
  • the electrode structure 1105 includes: a first bus line 11051 and a second bus line 11052 arranged in parallel along the first direction An electrode strip 11053.
  • the second bus 11052 connects a plurality of second electrode strips 11054 arranged in parallel along the second direction Y.
  • the first direction X is perpendicular to the second direction Y.
  • the first electrode Strips 511053 and the second electrode strips 11054 are alternately placed.
  • the widths of the first electrode strip 11053 and the second electrode strip 11054 are equal; the first electrode strip 11053 and the second electrode strip 11054 have a first width dimension d1.
  • the central axis of the first electrode strip 1153 and the central axis of the second electrode strip 11054 have a first central dimension d2, and the ratio range of the first central dimension d2 to the first width dimension d1 is: 1.2 ⁇ 20.
  • the first electrode strip 11053 and the second electrode strip 11054 The thickness is equal to the first width dimension d1; in other embodiments, the thickness of the first electrode strip and the second electrode strip may not be equal to the first width dimension.
  • the material of the electrode structure 1105 includes: one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
  • the electrode structure 1105 is one or more layers. In this embodiment, the electrode structure 1105 is two layers, and the material of the electrode structure 1105 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
  • the material of the frequency modulation layer 1106 includes metal or insulating dielectric; the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt or titanium; the insulating dielectric includes: silicon nitride , silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
  • the frequency modulation layer 1106 is made of silicon nitride.
  • the resonant frequency of the resonant device can be adjusted, so that the frequency modulation layer 1106 can control the device frequency more flexibly and accurately.
  • a plurality of grooves 1107 are evenly distributed in the frequency modulation area S.
  • the distribution of multiple grooves 1107 may be in any polygonal or annular shape, and a single groove 1107 may be in any polygonal or circular shape.
  • a plurality of the grooves 1107 are distributed in a rectangular shape, and a single groove 1107 is also in a rectangular shape.
  • the material of the temperature compensation layer 1108 includes silicon dioxide, silicon oxycarbide or silicon oxyfluoride. In this embodiment, the material of the temperature compensation layer 1108 is silicon dioxide.
  • the frequency temperature coefficient of the resonant device is reduced, tending to 0 ppm/°C, thereby improving the resonant device. Frequency-temperature stability.

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Abstract

A bulk acoustic wave resonance apparatus and a method for forming same, relating to the technical field of semiconductor manufacturing. The bulk acoustic wave resonance apparatus comprises: a substrate (200); an intermediate layer (201), the intermediate layer (201) comprising a first side (201a) and a second side (201b) opposite to each other, the substrate (200) being located on the first side (201a), the intermediate layer (201) comprising a cavity (202), and an opening of the cavity (202) being located on the second side (201b); an electrode structure (205) located in the cavity (202); and a piezoelectric layer (204) located on the second side (201b) and located on the electrode structure (205), the piezoelectric layer (204) at least covering the cavity (202). Since the electrode structure (205) is located in the cavity (202), the piezoelectric layer (204) can provide a relatively flat surface for a subsequently formed frequency modulation layer, thereby reducing lattice defects of a thin film of the frequency modulation layer, improving the quality of the thin film, and further allowing the frequency modulation layer to be more flexible and accurate in controlling the frequency of a device.

Description

体声波谐振装置及其形成方法Bulk acoustic wave resonance device and method of forming the same
本申请要求2022年9月19日提交中国专利局、申请号为202211134351.2、发明名称为“体声波谐振装置及其形成方法”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。This application claims priority to the Chinese patent application filed with the China Patent Office on September 19, 2022, with the application number 202211134351.2 and the invention title "Bulk Acoustic Resonance Device and Formation Method thereof", the entire content of which is incorporated into this application by reference. .
技术领域Technical field
本发明涉及半导体制造技术领域，尤其涉及一种体声波谐振装置及其形成方法。The present invention relates to the field of semiconductor manufacturing technology, and in particular to a bulk acoustic wave resonance device and a forming method thereof.
背景技术Background technique
无线通信设备的射频(Radio Frequency，RF)前端芯片包括功率放大器、天线开关、射频滤波器、包括双工器的多工器和低噪声放大器等。其中，射频滤波器包括声表面波(Surface Acoustic Wave，SAW)滤波器、体声波(Bulk Acoustic Wave，BAW)滤波器、微机电系统(Micro-Electro-Mechanical System，MEMS)滤波器、集成无源装置(Integrated Passive Devices，IPD)滤波器等。Radio Frequency (RF) front-end chips for wireless communication equipment include power amplifiers, antenna switches, RF filters, multiplexers including duplexers, and low-noise amplifiers. Among them, RF filters include Surface Acoustic Wave (SAW) filters, Bulk Acoustic Wave (BAW) filters, Micro-Electro-Mechanical System (MEMS) filters, integrated passive Device (Integrated Passive Devices, IPD) filters, etc.
声表面波谐振器和体声波谐振器的品质因数值(Q值)较高，由声表面波谐振器和体声波谐振器制作成的低插入损耗、高带外抑制的射频滤波器，即声表面波滤波器和体声波滤波器，是目前手机、基站等无线通信设备使用的主流射频滤波器。其中，Q值是谐振器的品质因数值，定义为中心频率除以谐振器3dB带宽。声表面波滤波器的使用频率一般为0.4GHz至2.7GHz，体声波滤波器的使用频率一般为0.7GHz至7GHz。The quality factor (Q value) of surface acoustic wave resonators and bulk acoustic wave resonators is relatively high. The low insertion loss and high out-of-band suppression RF filters made of surface acoustic wave resonators and bulk acoustic wave resonators, namely surface acoustic wave filters and bulk acoustic wave filters, are the mainstream RF filters currently used in wireless communication devices such as mobile phones and base stations. Among them, the Q value is the quality factor value of the resonator, which is defined as the center frequency divided by the 3dB bandwidth of the resonator. The operating frequency of surface acoustic wave filters is generally 0.4GHz to 2.7GHz, and the operating frequency of bulk acoustic wave filters is generally 0.7GHz to 7GHz.
与声表面波谐振器相比，体声波谐振器的性能更好，但是由于工艺步骤复杂，体声波谐振器的制造成本比SAW谐振器高。然而，当无线通信技术逐步演进，所使用的频段越来越多，同时随着载波聚合 等频段叠加使用技术的应用，无线频段之间的相互干扰变得愈发严重。高性能的体声波技术可以解决频段间的相互干扰问题。随着5G时代的到来，无线移动网络引入了更高的通信频段，当前只有体声波技术可以解决高频段的滤波问题。Compared with surface acoustic wave resonators, bulk acoustic wave resonators have better performance, but due to complex process steps, the manufacturing cost of bulk acoustic wave resonators is higher than that of SAW resonators. However, as wireless communication technology gradually evolves, more and more frequency bands are used, and with the carrier aggregation With the application of frequency band superposition technology, mutual interference between wireless frequency bands has become more and more serious. High-performance bulk acoustic wave technology can solve the problem of mutual interference between frequency bands. With the advent of the 5G era, wireless mobile networks have introduced higher communication frequency bands. Currently, only bulk acoustic wave technology can solve the filtering problem in high frequency bands.
然而，现有技术中形成的体声波谐振装置仍存在诸多问题。However, the bulk acoustic wave resonance devices formed in the prior art still have many problems.
发明内容Summary of the invention
本发明解决的技术问题是提供一种体声波谐振装置及其形成方法，使得调频层对于器件的频率控制更加灵活且精准。The technical problem solved by the present invention is to provide a bulk acoustic wave resonance device and a forming method thereof, so that the frequency modulation layer can control the frequency of the device more flexibly and accurately.
为解决上述问题，本发明提供一种体声波谐振装置，其特征在于，包括：基底；中间层，所述中间层包括相对的第一侧和第二侧，所述基底位于所述第一侧，所述中间层包括空腔，所述空腔的开口位于所述第二侧；电极结构，位于所述空腔内；压电层，位于所述第二侧且位于所述电极结构上，所述压电层至少覆盖所述空腔。In order to solve the above problems, the present invention provides a bulk acoustic wave resonance device, which is characterized in that it includes: a substrate; an intermediate layer, the intermediate layer includes an opposite first side and a second side, the substrate is located on the first side , the middle layer includes a cavity, the opening of the cavity is located on the second side; an electrode structure is located in the cavity; a piezoelectric layer is located on the second side and is located on the electrode structure, The piezoelectric layer covers at least the cavity.
可选的，还包括：调频层，位于所述第二侧且位于所述压电层上方，所述电极结构在所述基底上的投影位于所述调频层在所述基底上的投影范围内，所述中间层和所述调频层分别位于所述压电层的两侧，所述电极结构和所述调频层分别位于所述压电层的两侧。Optionally, it also includes: a frequency modulation layer located on the second side and above the piezoelectric layer, and the projection of the electrode structure on the substrate is within the projection range of the frequency modulation layer on the substrate. , the middle layer and the frequency modulation layer are respectively located on both sides of the piezoelectric layer, and the electrode structure and the frequency modulation layer are respectively located on both sides of the piezoelectric layer.
可选的，所述调频层包括凹槽，所述电极结构在所述基底上的投影位于所述凹槽在所述基底上的投影范围内。Optionally, the frequency modulation layer includes a groove, and the projection of the electrode structure on the substrate is located within the projection range of the groove on the substrate.
可选的，所述调频层的调频区域包括多个凹槽，所述电极结构在所述基底上的投影位于所述调频区域在所述基底上的投影范围内。Optionally, the frequency modulation area of the frequency modulation layer includes a plurality of grooves, and the projection of the electrode structure on the substrate is located within the projection range of the frequency modulation area on the substrate.
可选的，多个所述凹槽在所述调频区域内均匀分布。Optionally, a plurality of grooves are evenly distributed within the frequency modulation area.
可选的，还包括：温度补偿层，位于所述第二侧且位于所述压电层上，所述压电层和所述调频层分别位于所述温度补偿层两侧。 Optionally, the method further includes: a temperature compensation layer located on the second side and on the piezoelectric layer, and the piezoelectric layer and the frequency modulation layer are respectively located on both sides of the temperature compensation layer.
可选的，还包括：温度补偿层，位于所述空腔内且至少覆盖所述电极结构，所述压电层位于所述温度补偿层上。Optionally, the method further includes: a temperature compensation layer located in the cavity and covering at least the electrode structure, and the piezoelectric layer is located on the temperature compensation layer.
可选的，所述电极结构包括：沿第一方向平行排布的第一总线和第二总线，所述第一总线连接若干沿第二方向平行排布的第一电极条，所述第二总线连接若干沿所述第二方向平行排布的第二电极条，所述第一方向与所述第二方向垂直，所述第一电极条和所述第二电极条交错放置。Optionally, the electrode structure includes: a first bus and a second bus arranged in parallel along a first direction, the first bus connecting a number of first electrode strips arranged in parallel along a second direction, the second bus connecting a number of second electrode strips arranged in parallel along the second direction, the first direction is perpendicular to the second direction, and the first electrode strips and the second electrode strips are alternately arranged.
可选的，所述第一电极条和所述第二电极条的宽度相等；所述第一电极条和所述第二电极条具有第一宽度尺寸，相邻的所述第一电极条的中轴和所述第二电极条的中轴具有第一中心尺寸，所述第一中心尺寸与所述第一宽度尺寸的比值范围为：1.2～20。Optionally, the widths of the first electrode strips and the second electrode strips are equal; the first electrode strips and the second electrode strips have a first width dimension, and the adjacent first electrode strips have The central axis and the central axis of the second electrode strip have a first central dimension, and the ratio of the first central dimension to the first width dimension ranges from 1.2 to 20.
可选的，所述基底的材料包括：硅、碳化硅、二氧化硅、砷化镓、氮化镓、氧化铝、氧化镁、陶瓷或聚合物。Optionally, the material of the substrate includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers.
可选的，所述中间层的材料包括：聚合物、绝缘电介质或多晶硅。Optionally, the material of the intermediate layer includes: polymer, insulating dielectric or polysilicon.
可选的，所述电极结构的材料包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴和钛中的一种或多种。Optionally, the material of the electrode structure includes: one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
可选的，所述调频层的材料包括金属或绝缘电介质；其中金属包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴或钛；绝缘电介质包括：氮化硅、氧化硅、氧化铝、碳化硅、碳氧化硅、氮化铝、砷化镓或氮化镓。Optionally, the material of the frequency modulation layer includes metal or insulating dielectric; where the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt or titanium; the insulating dielectric includes: Silicon nitride, silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
相应的，本发明技术方案中还提供一种体声波谐振装置的形成方法，包括：提供牺牲基底；在所述牺牲基底上形成压电层；在所述压电层上形成电极结构；在所述压电层上形成牺牲层，所述牺牲层至少覆盖所述电极结构；在所述压电层上形成中间层，所述中间层至少覆盖所述牺牲层，所述中间层包括相对的第一侧和第二侧，所述压电层和所述牺牲基底位于所述第二侧；提供基底；接合所述基底和所述中间层，所述基底位于所述第一侧；在接合所述基底和所述中间层之后， 去除所述牺牲基底；在去除所述牺牲基底之后，去除所述牺牲层，在形成空腔嵌入所述中间层内，所述空腔的开口位于所述第二侧，所述电极结构位于所述空腔内。Correspondingly, the technical solution of the present invention also provides a method for forming a bulk acoustic wave resonance device, comprising: providing a sacrificial substrate; forming a piezoelectric layer on the sacrificial substrate; forming an electrode structure on the piezoelectric layer; forming a sacrificial layer on the piezoelectric layer, wherein the sacrificial layer at least covers the electrode structure; forming an intermediate layer on the piezoelectric layer, wherein the intermediate layer at least covers the sacrificial layer, wherein the intermediate layer includes a first side and a second side opposite to each other, wherein the piezoelectric layer and the sacrificial substrate are located on the second side; providing a substrate; bonding the substrate and the intermediate layer, wherein the substrate is located on the first side; after bonding the substrate and the intermediate layer, The sacrificial substrate is removed; after removing the sacrificial substrate, the sacrificial layer is removed to form a cavity embedded in the intermediate layer, the opening of the cavity is located at the second side, and the electrode structure is located in the cavity.
可选的，在去除所述牺牲基底之后，且在去除所述牺牲层之前，还包括：形成调频层，位于所述第二侧，所述电极结构在所述基底上的投影位于所述调频层在所述基底上的投影范围内，所述中间层和所述调频层分别位于所述压电层的两侧，所述电极结构和所述调频层分别位于所述压电层的两侧。Optionally, after removing the sacrificial substrate and before removing the sacrificial layer, the method further includes: forming a frequency modulation layer located on the second side, and a projection of the electrode structure on the substrate is located on the frequency modulation layer. Within the projection range of the layer on the substrate, the intermediate layer and the frequency modulation layer are respectively located on both sides of the piezoelectric layer, and the electrode structure and the frequency modulation layer are respectively located on both sides of the piezoelectric layer. .
可选的，所述调频层包括凹槽，所述电极结构在所述基底上的投影位于所述凹槽在所述基底上的投影范围内。Optionally, the frequency modulation layer includes a groove, and the projection of the electrode structure on the substrate is located within the projection range of the groove on the substrate.
可选的，所述调频层的调频区域包括多个凹槽，所述电极结构在所述基底上的投影位于所述调频区域在所述基底上的投影范围内。Optionally, the frequency modulation area of the frequency modulation layer includes a plurality of grooves, and the projection of the electrode structure on the substrate is located within the projection range of the frequency modulation area on the substrate.
可选的，多个所述凹槽在所述调频区域内均匀分布。Optionally, a plurality of grooves are evenly distributed within the frequency modulation area.
可选的，在形成调频层之前，还包括：形成温度补偿层，位于所述第二侧且位于所述压电层上，所述压电层和所述调频层分别位于所述温度补偿层两侧。Optionally, before forming the frequency modulation layer, the method further includes: forming a temperature compensation layer located on the second side and on the piezoelectric layer, and the piezoelectric layer and the frequency modulation layer are respectively located on the temperature compensation layer. both sides.
可选的，在形成所述电极结构之后，还包括：在形成所述牺牲层之前，形成温度补偿层，位于所述压电层上且至少覆盖所述电极结构；所述牺牲层覆盖所述温度补偿层；以及在去除所述牺牲层之后，所述温度补偿层位于所述空腔内。Optionally, after forming the electrode structure, the method further includes: before forming the sacrificial layer, forming a temperature compensation layer to be located on the piezoelectric layer and at least cover the electrode structure; the sacrificial layer covers the a temperature compensation layer; and after removal of the sacrificial layer, the temperature compensation layer is located within the cavity.
可选的，所述电极结构包括：沿第一方向平行排布的第一总线和第二总线，所述第一总线连接若干沿第二方向平行排布的第一电极条，所述第二总线连接若干沿所述第二方向平行排布的第二电极条，所述第一方向与所述第二方向垂直，所述第一电极条和所述第二电极条交错放置。Optionally, the electrode structure includes: a first bus line and a second bus line arranged in parallel along the first direction, the first bus line connects a plurality of first electrode strips arranged in parallel along the second direction, and the second bus line connects a plurality of first electrode strips arranged in parallel along the second direction. The bus connects a plurality of second electrode strips arranged in parallel along the second direction, the first direction is perpendicular to the second direction, and the first electrode strips and the second electrode strips are staggered.
可选的，所述第一电极条和所述第二电极条的宽度相等；所述第一电极条和所述第二电极条具有第一宽度尺寸，相邻的所述第一电极 条的中轴和所述第二电极条的中轴具有第一中心尺寸，所述第一中心尺寸与所述第一宽度尺寸的比值范围为：1.2～20。Optionally, the widths of the first electrode strips and the second electrode strips are equal; the first electrode strips and the second electrode strips have a first width dimension, and the adjacent first electrode strips have a first width dimension. The central axis of the strip and the central axis of the second electrode strip have a first central dimension, and the ratio of the first central dimension to the first width dimension ranges from 1.2 to 20.
与现有技术相比，本发明的技术方案具有以下优点：Compared with the existing technology, the technical solution of the present invention has the following advantages:
在本发明技术方案的体声波谐振装置中，包括电极结构，所述电极结构位于空腔内。由于所述电极结构位于所述空腔内，因此压电层能够为后续形成的调频层提供较为平坦的表面，减小所述调频层薄膜的晶格缺陷，提升薄膜品质，进而使得所述调频层对于器件的频率控制更加灵活且精准。另外，由于所述电极结构位于所述空腔内，可以有效防止器件在使用中，所述电极结构被氧化或腐蚀的情况发生。In the bulk acoustic wave resonance device of the technical solution of the present invention, an electrode structure is included, and the electrode structure is located in the cavity. Since the electrode structure is located in the cavity, the piezoelectric layer can provide a relatively flat surface for the subsequently formed frequency modulation layer, reduce the lattice defects of the frequency modulation layer film, improve the quality of the film, and thereby make the frequency modulation layer The layer has more flexible and precise frequency control of the device. In addition, since the electrode structure is located in the cavity, it can effectively prevent the electrode structure from being oxidized or corroded during use of the device.
进一步，所述调频层包括凹槽，所述电极结构在所述基底上的投影位于所述凹槽在所述基底上的投影范围内。通过增大或减小所述凹槽的深度，可以调节所述谐振装置的谐振频率，使得所述调频层对于器件频率的控制更加灵活精准。Furthermore, the frequency modulation layer includes a groove, and the projection of the electrode structure on the substrate is located within the projection range of the groove on the substrate. By increasing or decreasing the depth of the groove, the resonant frequency of the resonant device can be adjusted, so that the frequency modulation layer can control the device frequency more flexibly and accurately.
进一步，所述调频层的调频区域包括多个凹槽，所述电极结构在所述基底上的投影位于所述调频区域在所述基底上的投影范围内。通过增大或减小多个所述凹槽的深度，可以调节所述谐振装置的谐振频率，使得所述调频层对于器件频率的控制更加灵活精准。Further, the frequency modulation area of the frequency modulation layer includes a plurality of grooves, and the projection of the electrode structure on the substrate is located within the projection range of the frequency modulation area on the substrate. By increasing or decreasing the depth of the plurality of grooves, the resonant frequency of the resonant device can be adjusted, making the frequency modulation layer more flexible and precise in controlling the frequency of the device.
在本发明技术方案的体声波谐振装置形成方法中，去除所述牺牲层，在所述中间层内形成空腔，所述空腔的开口位于所述第二侧，所述电极结构位于所述空腔内。由于所述电极结构位于所述空腔内，因此压电层能够为后续形成的调频层提供较为平坦的表面，减小所述调频层薄膜的晶格缺陷，提升薄膜品质，进而使得所述调频层对于器件的频率控制更加灵活且精准。另外，由于所述电极结构位于所述空腔内，可以有效防止器件在使用中，所述电极结构被氧化或腐蚀的情况发生。In the method for forming a bulk acoustic wave resonance device according to the technical solution of the present invention, the sacrificial layer is removed, a cavity is formed in the intermediate layer, the opening of the cavity is located on the second side, and the electrode structure is located on the inside the cavity. Since the electrode structure is located in the cavity, the piezoelectric layer can provide a relatively flat surface for the subsequently formed frequency modulation layer, reduce the lattice defects of the frequency modulation layer film, improve the quality of the film, and thereby make the frequency modulation layer The layer has more flexible and precise frequency control of the device. In addition, since the electrode structure is located in the cavity, it can effectively prevent the electrode structure from being oxidized or corroded during use of the device.
进一步，所述调频层包括凹槽，所述电极结构在所述基底上的投影位于所述凹槽在所述基底上的投影范围内。通过增大或减小多个所 述凹槽的深度，可以调节所述谐振装置的谐振频率，使得所述调频层对于器件频率的控制更加灵活精准。Further, the frequency modulation layer includes a groove, and the projection of the electrode structure on the substrate is located within the projection range of the groove on the substrate. By increasing or decreasing multiple The depth of the groove can adjust the resonant frequency of the resonant device, making the frequency modulation layer more flexible and precise in controlling the frequency of the device.
进一步，所述调频层的调频区域包括多个凹槽，所述电极结构在所述基底上的投影位于所述调频区域在所述基底上的投影范围内。通过增大或减小所述凹槽的深度，可以调节所述谐振装置的谐振频率，使得所述调频层对于器件频率的控制更加灵活精准。Further, the frequency modulation area of the frequency modulation layer includes a plurality of grooves, and the projection of the electrode structure on the substrate is located within the projection range of the frequency modulation area on the substrate. By increasing or decreasing the depth of the groove, the resonant frequency of the resonant device can be adjusted, making the frequency modulation layer more flexible and precise in controlling the frequency of the device.
附图说明Description of drawings
图1是一种体声波谐振装置的结构示意图；FIG1 is a schematic structural diagram of a bulk acoustic wave resonance device;
图2至图10是本发明实施例中体声波谐振装置及其形成方法各步骤结构示意图；2 to 10 are schematic structural diagrams of each step of the bulk acoustic wave resonance device and its forming method according to the embodiment of the present invention;
图11至图20是本发明另一实施例中体声波谐振装置及其形成方法各步骤结构示意图；11 to 20 are schematic structural diagrams of each step of the bulk acoustic wave resonance device and its forming method in another embodiment of the present invention;
图21至图31是本发明又一实施例中体声波谐振装置及其形成方法各步骤结构示意图；21 to 31 are schematic structural diagrams of each step of the bulk acoustic wave resonance device and its forming method in another embodiment of the present invention;
图32至图42是本发明又一实施例中体声波谐振装置及其形成方法各步骤结构示意图；32 to 42 are schematic structural diagrams of each step of the bulk acoustic wave resonance device and its forming method in another embodiment of the present invention;
图43至图53是本发明又一实施例中体声波谐振装置及其形成方法各步骤结构示意图；43 to 53 are schematic structural diagrams of each step of the bulk acoustic wave resonance device and its forming method in another embodiment of the present invention;
图54至图65是本发明又一实施例中体声波谐振装置及其形成方法各步骤结构示意图；Figures 54 to 65 are schematic structural diagrams of each step of the bulk acoustic wave resonance device and its forming method in another embodiment of the present invention;
图66至图77是本发明又一实施例中体声波谐振装置及其形成方法各步骤结构示意图；Figures 66 to 77 are schematic structural diagrams of each step of the bulk acoustic wave resonance device and its forming method in another embodiment of the present invention;
图78至图88是本发明又一实施例中体声波谐振装置及其形成方法各步骤结构示意图；Figures 78 to 88 are schematic structural diagrams of each step of the bulk acoustic wave resonance device and its forming method in another embodiment of the present invention;
图89至图100是本发明又一实施例中体声波谐振装置及其形成 方法各步骤结构示意图；Figures 89 to 100 illustrate a bulk acoustic wave resonance device and its formation in another embodiment of the present invention. Structural diagram of each step of the method;
图101至图112是本发明又一实施例中体声波谐振装置及其形成方法各步骤结构示意图。101 to 112 are schematic structural diagrams of each step of the bulk acoustic wave resonance device and its forming method in another embodiment of the present invention.
具体实施方式Detailed ways
正如背景技术所述，现有技术中形成的体声波谐振装置仍存在诸多问题。以下将结合附图进行具体说明。As mentioned in the background art, bulk acoustic wave resonance devices formed in the prior art still have many problems. A detailed description will be given below with reference to the accompanying drawings.
图1是一种体声波谐振装置的结构示意图。Figure 1 is a schematic structural diagram of a bulk acoustic wave resonance device.
请参考图1，一种体声波谐振装置，包括：支撑衬底100，所述支撑衬底100包括空腔101，所述支撑衬底100的表面暴露出所述空腔101；压电层102，位于所述支撑衬底100上且至少覆盖所述空腔101；电极结构103，位于所述压电层102上。Please refer to Figure 1, a bulk acoustic wave resonance device includes: a support substrate 100, the support substrate 100 includes a cavity 101, the surface of the support substrate 100 exposes the cavity 101; a piezoelectric layer 102 , is located on the support substrate 100 and at least covers the cavity 101; the electrode structure 103 is located on the piezoelectric layer 102.
在本实施例中，通过所述电极结构103中的叉指电极激励产生纵向传播的剪切波，以在所述压电层102内形成谐振。In this embodiment, longitudinally propagating shear waves are generated through excitation of the interdigital electrodes in the electrode structure 103 to form resonance in the piezoelectric layer 102 .
然而，由于所述电极结构103形成在所述压电层102上，当后续需要在所述压电层102上再形成调频层(未图示)时，由于所述电极结构103的凹凸结构不能够为所述调频层的形成提供较为平坦的表面，进而使得所述调频层薄膜的晶格缺陷增加，影响所述调频层薄膜的品质，后续对于器件频率的精准控制存在不足。However, since the electrode structure 103 is formed on the piezoelectric layer 102, when a frequency modulation layer (not shown) needs to be formed on the piezoelectric layer 102 later, due to the uneven structure of the electrode structure 103, It can provide a relatively flat surface for the formation of the frequency modulation layer, thereby increasing the lattice defects of the frequency modulation layer film, affecting the quality of the frequency modulation layer film, and subsequently causing deficiencies in precise control of device frequency.
在此基础上，本发明提供一种体声波谐振装置及其形成方法，包括电极结构，所述电极结构位于空腔内。由于所述电极结构位于所述空腔内，因此所述压电层能够为后续形成的调频层提供较为平坦的表面，减小所述调频层薄膜的晶格缺陷，提升薄膜品质，进而使得所述调频层对于器件的频率控制更加灵活且精准。另外，由于所述电极结构位于所述空腔内，可以有效防止器件在使用中，所述电极结构被氧化或腐蚀的情况发生。On this basis, the present invention provides a bulk acoustic wave resonance device and a forming method thereof, including an electrode structure located in a cavity. Since the electrode structure is located in the cavity, the piezoelectric layer can provide a relatively flat surface for the subsequently formed frequency modulation layer, reduce the lattice defects of the frequency modulation layer film, improve the quality of the film, and thereby make the The frequency modulation layer described above is more flexible and precise in controlling the frequency of the device. In addition, since the electrode structure is located in the cavity, it can effectively prevent the electrode structure from being oxidized or corroded during use of the device.
为使本发明的上述目的、特征和优点能够更为明显易懂，下面结 合附图对本发明的具体实施例做详细地说明。In order to make the above objects, features and advantages of the present invention more obvious and understandable, the following summary The specific embodiments of the present invention are described in detail with the accompanying drawings.
图2至图10是本发明实施例中体声波谐振装置的形成方法各步骤结构示意图。2 to 10 are schematic structural diagrams of each step of a method for forming a bulk acoustic wave resonance device in an embodiment of the present invention.
请参考图2，提供牺牲基底203。Referring to Figure 2, a sacrificial substrate 203 is provided.
所述牺牲基底203的材料包括：硅、碳化硅、二氧化硅、砷化镓、氮化镓、氧化铝、氧化镁、陶瓷或聚合物；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺。The material of the sacrificial substrate 203 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e. , BCB), photosensitive epoxy resin photoresist (for example, SU-8), polyimide.
在本实施例中，所述牺牲基底203的材料采用硅。In this embodiment, the sacrificial substrate 203 is made of silicon.
请参考图3，在所述牺牲基底203上形成压电层204。Referring to FIG. 3 , a piezoelectric layer 204 is formed on the sacrificial substrate 203 .
所述压电层204的材料包括：氮化铝、氮化铝合金、氮化镓、氧化锌、钽酸锂、铌酸锂、锆钛酸铅或铌镁酸铅—钛酸铅。The material of the piezoelectric layer 204 includes: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
在本实施例中，所述压电层204的材料采用铌酸锂。In this embodiment, the piezoelectric layer 204 is made of lithium niobate.
请参考图4和图5，图5是图4中沿A-A线截面示意图，在所述压电层204上形成电极结构205。Please refer to FIGS. 4 and 5 . FIG. 5 is a schematic cross-sectional view along line A-A in FIG. 4 . An electrode structure 205 is formed on the piezoelectric layer 204 .
在本实施例中，所述电极结构205包括：沿第一方向X平行排布的第一总线2051和第二总线2052，所述第一总线2051连接若干沿第二方向Y平行排布的第一电极条2053，所述第二总线2052连接若干沿所述第二方向Y平行排布的第二电极条2054，所述第一方向X与所述第二方向Y垂直，所述第一电极条2053和所述第二电极条2054交错放置。In this embodiment, the electrode structure 205 includes: a first bus line 2051 and a second bus line 2052 arranged in parallel along the first direction X. The first bus line 2051 connects several third bus lines arranged in parallel along the second direction Y. An electrode strip 2053. The second bus 2052 connects a plurality of second electrode strips 2054 arranged in parallel along the second direction Y. The first direction X is perpendicular to the second direction Y. The first electrode The strips 2053 and the second electrode strips 2054 are alternately placed.
在本实施例中，所述第一电极条2053和所述第二电极条2054的宽度相等；所述第一电极条2053和所述第二电极条2054具有第一宽度尺寸d1，相邻的所述第一电极条2053的中轴和所述第二电极条2054的中轴具有第一中心尺寸d2，所述第一中心尺寸d2与所述第一宽度尺寸d1的比值范围为：1.2～20。 In this embodiment, the widths of the first electrode strip 2053 and the second electrode strip 2054 are equal; the first electrode strip 2053 and the second electrode strip 2054 have a first width dimension d1. The central axis of the first electrode strip 2053 and the central axis of the second electrode strip 2054 have a first central dimension d2, and the ratio range of the first central dimension d2 to the first width dimension d1 is: 1.2~ 20.
在本实施例中，所述第一电极条2053和所述第二电极条2054的厚度等于所述第一宽度尺寸d1；在其他实施例中，所述第一电极条和所述第二电极条的厚度还可以不等于所述第一宽度尺寸。In this embodiment, the thickness of the first electrode strip 2053 and the second electrode strip 2054 is equal to the first width dimension d1; in other embodiments, the thickness of the first electrode strip 2053 and the second electrode strip 2054 is equal to the first width dimension d1. The thickness of the strip may also be different than the first width dimension.
所述电极结构205的材料包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴和钛中的一种或多种。The material of the electrode structure 205 includes: one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
所述电极结构205为一层或多层。在本实施例中，所述电极结构205为两层，所述电极结构205的材料为钼铝、钨铝或铂铝。The electrode structure 205 is one or more layers. In this embodiment, the electrode structure 205 has two layers, and the material of the electrode structure 205 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
请参考图6，图6和图5的视图方向一致，在所述压电层204上形成牺牲层206，所述牺牲层206至少覆盖所述电极结构205。Please refer to FIG. 6 . The view directions of FIG. 6 and FIG. 5 are consistent. A sacrificial layer 206 is formed on the piezoelectric layer 204 , and the sacrificial layer 206 at least covers the electrode structure 205 .
所述牺牲层206的材料包括：聚合物、绝缘电介质或多晶硅；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺；所述绝缘电介质包括：氮化铝、二氧化硅、氮化硅或氧化钛。The material of the sacrificial layer 206 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
在本实施例中，所述牺牲层206的材料采用聚酰亚胺。In this embodiment, the sacrificial layer 206 is made of polyimide.
请参考图7，在所述压电层204上形成中间层201，所述中间层201至少覆盖所述牺牲层206，所述中间层201包括相对的第一侧201a和第二侧201b，所述压电层204和所述牺牲基底203位于所述第二侧201b。Referring to Figure 7, an intermediate layer 201 is formed on the piezoelectric layer 204. The intermediate layer 201 at least covers the sacrificial layer 206. The intermediate layer 201 includes opposite first sides 201a and second sides 201b, so The piezoelectric layer 204 and the sacrificial substrate 203 are located on the second side 201b.
所述中间层201的材料包括：聚合物、绝缘电介质或多晶硅；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺；所述绝缘电介质包括：氮化铝、二氧化硅、氮化硅或氧化钛。The material of the intermediate layer 201 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
在本实施例中，所述中间层201的材料采用二氧化硅。In this embodiment, the material of the middle layer 201 is silicon dioxide.
请参考图8，提供基底200。Referring to Figure 8, a substrate 200 is provided.
所述基底200的材料包括：硅、碳化硅、二氧化硅、砷化镓、氮化镓、氧化铝、氧化镁、陶瓷或聚合物；所述聚合物包括：苯并环丁 烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺。The material of the substrate 200 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclotene vinyl (i.e., BCB), photosensitive epoxy photoresist (e.g., SU-8), polyimide.
在本实施例中，所述基底200的材料采用硅。In this embodiment, the material of the substrate 200 is silicon.
请参考图9，接合所述基底200和所述中间层201，所述基底200位于所述第一侧201a；在接合所述基底200和所述中间层201之后，去除所述牺牲基底203。Please refer to FIG. 9 , the substrate 200 and the intermediate layer 201 are bonded, and the substrate 200 is located on the first side 201 a; after the substrate 200 and the intermediate layer 201 are bonded, the sacrificial substrate 203 is removed.
去除所述牺牲基底203的工艺包括：物理研磨工艺、湿法刻蚀工艺或干法刻蚀工艺。The process of removing the sacrificial substrate 203 includes: physical grinding process, wet etching process or dry etching process.
在本实施例中，去除所述牺牲基底203的工艺采用物理研磨工艺。In this embodiment, the process of removing the sacrificial substrate 203 adopts a physical grinding process.
在本实施例中，接合所述基底200和所述中间层201采用键合工艺；在其他实施例中，接合所述基底和所述中间层还可以采用粘合工艺。In this embodiment, a bonding process is used to join the substrate 200 and the intermediate layer 201; in other embodiments, an adhesion process may also be used to join the substrate and the intermediate layer.
请参考图10，在去除所述牺牲基底203之后，去除所述牺牲层206，在所述中间层201内形成空腔202，所述空腔202的开口位于所述第二侧201b，所述电极结构205位于所述空腔202内。Please refer to Figure 10. After the sacrificial substrate 203 is removed, the sacrificial layer 206 is removed, and a cavity 202 is formed in the intermediate layer 201. The opening of the cavity 202 is located on the second side 201b. The electrode structure 205 is located in the cavity 202 .
在本实施例中，由于所述电极结构205位于所述空腔202内，因此所述压电层204能够为后续形成的调频层提供较为平坦的表面，减小所述调频层薄膜的晶格缺陷，提升薄膜品质，进而使得所述调频层对于器件的频率控制更加灵活且精准。另外，由于所述电极结构205位于所述空腔202内，可以有效防止器件在使用中，所述电极结构205被氧化或腐蚀的情况发生。In this embodiment, since the electrode structure 205 is located in the cavity 202, the piezoelectric layer 204 can provide a relatively flat surface for the subsequently formed frequency modulation layer, reducing the crystal lattice of the frequency modulation layer film. Defects improve the quality of the film, thereby making the frequency modulation layer more flexible and precise in controlling the frequency of the device. In addition, since the electrode structure 205 is located in the cavity 202, it can effectively prevent the electrode structure 205 from being oxidized or corroded during use of the device.
在本实施例中，去除所述牺牲层206的工艺采用湿法刻蚀工艺。In this embodiment, a wet etching process is used to remove the sacrificial layer 206 .
相应的，本发明实施例中还提供一种体声波谐振装置，请继续参考图10包括：基底200；中间层201，所述中间层201包括相对的第一侧201a和第二侧201b，所述基底200位于所述第一侧201a，所述中间层201包括空腔202，所述空腔202的开口位于所述第二侧201b； 电极结构205，位于所述空腔202内；压电层204，位于所述第二侧201b且位于所述电极结构205上，所述压电层204至少覆盖所述空腔205。Correspondingly, the embodiment of the present invention also provides a bulk acoustic wave resonance device. Please continue to refer to FIG. 10 and include: a substrate 200; an intermediate layer 201. The intermediate layer 201 includes an opposite first side 201a and a second side 201b, so The substrate 200 is located on the first side 201a, the intermediate layer 201 includes a cavity 202, and the opening of the cavity 202 is located on the second side 201b; The electrode structure 205 is located in the cavity 202; the piezoelectric layer 204 is located on the second side 201b and on the electrode structure 205, and the piezoelectric layer 204 at least covers the cavity 205.
在本实施例中，由于所述电极结构205位于所述空腔202内，因此所述压电层204能够为后续形成的调频层提供较为平坦的表面，减小所述调频层薄膜的晶格缺陷，提升薄膜品质，进而使得所述调频层对于器件的频率控制更加灵活且精准。另外，由于所述电极结构205位于所述空腔202内，可以有效防止器件在使用中，所述电极结构205被氧化或腐蚀的情况发生。In this embodiment, since the electrode structure 205 is located in the cavity 202, the piezoelectric layer 204 can provide a relatively flat surface for the subsequently formed frequency modulation layer, reducing the crystal lattice of the frequency modulation layer film. Defects improve the quality of the film, thereby making the frequency modulation layer more flexible and precise in controlling the frequency of the device. In addition, since the electrode structure 205 is located in the cavity 202, it can effectively prevent the electrode structure 205 from being oxidized or corroded during use of the device.
所述基底200的材料包括：硅、碳化硅、二氧化硅、砷化镓、氮化镓、氧化铝、氧化镁、陶瓷或聚合物；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺。The material of the substrate 200 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e., BCB), photosensitive epoxy photoresist (e.g., SU-8), polyimide.
在本实施例中，所述基底200的材料采用硅。In this embodiment, the substrate 200 is made of silicon.
所述中间层201的材料包括：聚合物、绝缘电介质或多晶硅；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺；所述绝缘电介质包括：氮化铝、二氧化硅、氮化硅或氧化钛。The material of the intermediate layer 201 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
在本实施例中，所述中间层201的材料采用二氧化硅。In this embodiment, the material of the middle layer 201 is silicon dioxide.
所述压电层204的材料包括：氮化铝、氮化铝合金、氮化镓、氧化锌、钽酸锂、铌酸锂、锆钛酸铅或铌镁酸铅—钛酸铅。The material of the piezoelectric layer 204 includes: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
在本实施例中，所述压电层204的材料采用铌酸锂。In this embodiment, the piezoelectric layer 204 is made of lithium niobate.
在本实施例中，所述电极结构205包括：沿第一方向X平行排布的第一总线2051和第二总线2052，所述第一总线2051连接若干沿第二方向Y平行排布的第一电极条2053，所述第二总线2052连接若干沿所述第二方向Y平行排布的第二电极条2054，所述第一方向X与所述第二方向Y垂直，所述第一电极条2053和所述第二电极条2054交错放置。 In this embodiment, the electrode structure 205 includes: a first bus line 2051 and a second bus line 2052 arranged in parallel along the first direction X. The first bus line 2051 connects several third bus lines arranged in parallel along the second direction Y. An electrode strip 2053. The second bus 2052 connects a plurality of second electrode strips 2054 arranged in parallel along the second direction Y. The first direction X is perpendicular to the second direction Y. The first electrode The strips 2053 and the second electrode strips 2054 are alternately placed.
在本实施例中，所述第一电极条2053和所述第二电极条2054的宽度相等；所述第一电极条2053和所述第二电极条2054具有第一宽度尺寸d1，相邻的所述第一电极条2053的中轴和所述第二电极条2054的中轴具有第一中心尺寸d2，所述第一中心尺寸d2与所述第一宽度尺寸d1的比值范围为：1.2～20。In this embodiment, the widths of the first electrode strip 2053 and the second electrode strip 2054 are equal; the first electrode strip 2053 and the second electrode strip 2054 have a first width dimension d1. The central axis of the first electrode strip 2053 and the central axis of the second electrode strip 2054 have a first central dimension d2, and the ratio range of the first central dimension d2 to the first width dimension d1 is: 1.2~ 20.
在本实施例中，所述第一电极条2053和所述第二电极条2054的厚度等于所述第一宽度尺寸d1；在其他实施例中，所述第一电极条和所述第二电极条的厚度还可以不等于所述第一宽度尺寸。In this embodiment, the thickness of the first electrode strip 2053 and the second electrode strip 2054 is equal to the first width dimension d1; in other embodiments, the thickness of the first electrode strip 2053 and the second electrode strip 2054 is equal to the first width dimension d1. The thickness of the strip may also be different than the first width dimension.
所述电极结构205的材料包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴和钛中的一种或多种。The material of the electrode structure 205 includes one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
所述电极结构205为一层或多层。在本实施例中，所述电极结构205为两层，所述电极结构205的材料为钼铝、钨铝或铂铝。The electrode structure 205 is one or more layers. In this embodiment, the electrode structure 205 has two layers, and the material of the electrode structure 205 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
图11至图20是本发明另一实施例中体声波谐振装置的形成方法各步骤结构示意图。11 to 20 are schematic structural diagrams of each step of a method for forming a bulk acoustic wave resonance device in another embodiment of the present invention.
请参考图11，提供牺牲基底303。Referring to Figure 11, a sacrificial substrate 303 is provided.
所述牺牲基底303的材料包括：硅、碳化硅、二氧化硅、砷化镓、氮化镓、氧化铝、氧化镁、陶瓷或聚合物；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺。The material of the sacrificial substrate 303 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e. , BCB), photosensitive epoxy resin photoresist (for example, SU-8), polyimide.
在本实施例中，所述牺牲基底303的材料采用硅。In this embodiment, the sacrificial substrate 303 is made of silicon.
请参考图12，在所述牺牲基底303上形成压电层304。Referring to FIG. 12 , a piezoelectric layer 304 is formed on the sacrificial substrate 303 .
所述压电层304的材料包括：氮化铝、氮化铝合金、氮化镓、氧化锌、钽酸锂、铌酸锂、锆钛酸铅或铌镁酸铅—钛酸铅。The material of the piezoelectric layer 304 includes: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
在本实施例中，所述压电层304的材料采用铌酸锂。In this embodiment, the piezoelectric layer 304 is made of lithium niobate.
请参考图13和图14，图14是图13中沿B-B线截面示意图，在所述压电层304上形成电极结构305。 Please refer to Figures 13 and 14. Figure 14 is a schematic cross-sectional view along line BB in Figure 13. An electrode structure 305 is formed on the piezoelectric layer 304.
在本实施例中，所述电极结构305包括：沿第一方向X平行排布的第一总线3051和第二总线3052，所述第一总线3051连接若干沿第二方向Y平行排布的第一电极条3053，所述第二总线3052连接若干沿所述第二方向Y平行排布的第二电极条3054，所述第一方向X与所述第二方向Y垂直，所述第一电极条3053和所述第二电极条3054交错放置。In this embodiment, the electrode structure 305 includes: a first bus line 3051 and a second bus line 3052 arranged in parallel along the first direction An electrode strip 3053. The second bus 3052 connects a plurality of second electrode strips 3054 arranged in parallel along the second direction Y. The first direction X is perpendicular to the second direction Y. The first electrode The strips 3053 and the second electrode strips 3054 are alternately placed.
在本实施例中，所述第一电极条3053和所述第二电极条3054的宽度相等；所述第一电极条3053和所述第二电极条3054具有第一宽度尺寸d1，相邻的所述第一电极条3053的中轴和所述第二电极条3054的中轴具有第一中心尺寸d2，所述第一中心尺寸d2与所述第一宽度尺寸d1的比值范围为：1.2～20。In this embodiment, the widths of the first electrode strip 3053 and the second electrode strip 3054 are equal; the first electrode strip 3053 and the second electrode strip 3054 have a first width dimension d1. The central axis of the first electrode strip 3053 and the central axis of the second electrode strip 3054 have a first central dimension d2, and the ratio range of the first central dimension d2 to the first width dimension d1 is: 1.2~ 20.
在本实施例中，所述第一电极条3053和所述第二电极条3054的厚度等于所述第一宽度尺寸d1；在其他实施例中，所述第一电极条和所述第二电极条的厚度还可以不等于所述第一宽度尺寸。In this embodiment, the thickness of the first electrode strip 3053 and the second electrode strip 3054 is equal to the first width dimension d1; in other embodiments, the first electrode strip and the second electrode strip 3054 have a thickness equal to the first width dimension d1. The thickness of the strip may also be different than the first width dimension.
所述电极结构305的材料包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴和钛中的一种或多种。The material of the electrode structure 305 includes: one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
所述电极结构305为一层或多层。在本实施例中，所述电极结构305为两层，所述电极结构305的材料为钼铝、钨铝或铂铝。The electrode structure 305 is one or more layers. In this embodiment, the electrode structure 305 is two layers, and the material of the electrode structure 305 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
请参考图15，图15和图14的视图方向一致，在所述压电层304上形成牺牲层307，所述牺牲层307至少覆盖所述电极结构305。Please refer to FIG. 15 . The view directions of FIG. 15 and FIG. 14 are consistent. A sacrificial layer 307 is formed on the piezoelectric layer 304 , and the sacrificial layer 307 at least covers the electrode structure 305 .
所述牺牲层307的材料包括：聚合物、绝缘电介质或多晶硅；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺；所述绝缘电介质包括：氮化铝、二氧化硅、氮化硅或氧化钛。The material of the sacrificial layer 307 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
在本实施例中，所述牺牲层307的材料采用聚酰亚胺。In this embodiment, the sacrificial layer 307 is made of polyimide.
请参考图16，在所述压电层304上形成中间层301，所述中间层301至少覆盖所述牺牲层307，所述中间层301包括相对的第一侧301a 和第二侧301b，所述压电层304和所述牺牲基底303位于所述第二侧301b。Referring to Figure 16, an intermediate layer 301 is formed on the piezoelectric layer 304. The intermediate layer 301 at least covers the sacrificial layer 307. The intermediate layer 301 includes an opposite first side 301a. and a second side 301b, where the piezoelectric layer 304 and the sacrificial substrate 303 are located.
所述中间层301的材料包括：聚合物、绝缘电介质或多晶硅；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺；所述绝缘电介质包括：氮化铝、二氧化硅、氮化硅或氧化钛。The material of the intermediate layer 301 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
在本实施例中，所述中间层301的材料采用二氧化硅。In this embodiment, the material of the intermediate layer 301 is silicon dioxide.
请参考图17，提供基底300。Referring to Figure 17, a substrate 300 is provided.
所述基底300的材料包括：硅、碳化硅、二氧化硅、砷化镓、氮化镓、氧化铝、氧化镁、陶瓷或聚合物；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺。The material of the substrate 300 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e., BCB), photosensitive epoxy photoresist (e.g., SU-8), polyimide.
在本实施例中，所述基底300的材料采用硅。In this embodiment, the material of the substrate 300 is silicon.
请参考图18，接合所述基底300和所述中间层301，所述基底300位于所述第一侧301a；在接合所述基底300和所述中间层301之后，去除所述牺牲基底303。Please refer to FIG. 18 , the substrate 300 and the intermediate layer 301 are bonded, and the substrate 300 is located on the first side 301 a; after the substrate 300 and the intermediate layer 301 are bonded, the sacrificial substrate 303 is removed.
去除所述牺牲基底303的工艺包括：物理研磨工艺、湿法刻蚀工艺或干法刻蚀工艺。The process of removing the sacrificial substrate 303 includes: a physical grinding process, a wet etching process or a dry etching process.
在本实施例中，去除所述牺牲基底303的工艺采用物理研磨工艺。In this embodiment, the process of removing the sacrificial substrate 303 adopts a physical grinding process.
在本实施例中，接合所述基底300和所述中间层301采用键合工艺；在其他实施例中，接合所述基底和所述中间层还可以采用粘合工艺。In this embodiment, a bonding process is used to join the substrate 300 and the intermediate layer 301; in other embodiments, an adhesion process may also be used to join the substrate and the intermediate layer.
请参考图19，形成调频层306，位于所述第二侧301b且位于所述压电层304上，所述电极结构305在所述基底300上的投影位于所述调频层306在所述基底300上的投影范围内，所述中间层301和所述调频层306分别位于所述压电层304的两侧，所述电极结构305和 所述调频层306分别位于所述压电层304的两侧。Referring to Figure 19, a frequency modulation layer 306 is formed, located on the second side 301b and on the piezoelectric layer 304. The projection of the electrode structure 305 on the substrate 300 is located on the substrate. Within the projection range on 300, the intermediate layer 301 and the frequency modulation layer 306 are respectively located on both sides of the piezoelectric layer 304, and the electrode structure 305 and The frequency modulation layer 306 is located on both sides of the piezoelectric layer 304 respectively.
所述调频层306的材料包括金属或绝缘电介质；其中金属包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴或钛；绝缘电介质包括：氮化硅、氧化硅、氧化铝、碳化硅、碳氧化硅、氮化铝、砷化镓或氮化镓。The material of the frequency modulation layer 306 includes metal or insulating dielectric; the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt or titanium; the insulating dielectric includes: silicon nitride , silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
在本实施例中，所述调频层306的材料采用氮化硅。In this embodiment, the frequency modulation layer 306 is made of silicon nitride.
请参考图20，在形成所述调频层306之后，去除所述牺牲层307，在所述中间层301内形成空腔302，所述空腔302的开口位于所述第二侧301b，所述电极结构305位于所述空腔302内。Please refer to FIG. 20 . After the frequency modulation layer 306 is formed, the sacrificial layer 307 is removed to form a cavity 302 in the middle layer 301 . The opening of the cavity 302 is located at the second side 301 b . The electrode structure 305 is located in the cavity 302 .
在本实施例中，由于所述电极结构305位于所述空腔302内，因此所述压电层304能够为形成的所述调频层306提供较为平坦的表面，减小所述调频层306薄膜的晶格缺陷，提升薄膜品质，进而使得所述调频层306对于器件的频率控制更加灵活且精准。另外，由于所述电极结构305位于所述空腔302内，可以有效防止器件在使用中，所述电极结构305被氧化或腐蚀的情况发生。In this embodiment, since the electrode structure 305 is located in the cavity 302, the piezoelectric layer 304 can provide a relatively flat surface for the formed frequency modulation layer 306, reducing the thin film of the frequency modulation layer 306. The lattice defects improve the film quality, thereby making the frequency modulation layer 306 more flexible and precise in controlling the frequency of the device. In addition, since the electrode structure 305 is located in the cavity 302, it can effectively prevent the electrode structure 305 from being oxidized or corroded during use of the device.
在本实施例中，去除所述牺牲层306的工艺采用湿法刻蚀工艺。In this embodiment, a wet etching process is used to remove the sacrificial layer 306 .
相应的，本发明实施例中还提供一种体声波谐振装置，请继续参考图20包括：基底300；中间层301，所述中间层301包括相对的第一侧301a和第二侧301b，所述基底300位于所述第一侧301a，所述中间层301包括空腔302，所述空腔302的开口位于所述第二侧301b；电极结构305，位于所述空腔302内；压电层304，位于所述第二侧301b且位于所述电极结构305上，所述压电层304至少覆盖所述空腔302；调频层306，位于所述第二侧301b且位于所述压电层304上，所述电极结构305在所述基底300上的投影位于所述调频层306在所述基底300上的投影范围内，所述中间层301和所述调频层306分别位于所述压电层304的两侧，所述电极结构305和所述调频层306分别位于所述压电层304的两侧。 Correspondingly, a bulk acoustic wave resonance device is also provided in an embodiment of the present invention, and please continue to refer to FIG. 20, comprising: a substrate 300; an intermediate layer 301, wherein the intermediate layer 301 comprises a first side 301a and a second side 301b opposite to each other, wherein the substrate 300 is located on the first side 301a, and the intermediate layer 301 comprises a cavity 302, wherein the opening of the cavity 302 is located on the second side 301b; an electrode structure 305, which is located in the cavity 302; a piezoelectric layer 304, which is located on the second side 301b and is located on the On the electrode structure 305, the piezoelectric layer 304 at least covers the cavity 302; the frequency modulation layer 306 is located on the second side 301b and on the piezoelectric layer 304, the projection of the electrode structure 305 on the substrate 300 is located within the projection range of the frequency modulation layer 306 on the substrate 300, the intermediate layer 301 and the frequency modulation layer 306 are respectively located on both sides of the piezoelectric layer 304, and the electrode structure 305 and the frequency modulation layer 306 are respectively located on both sides of the piezoelectric layer 304.
在本实施例中，由于所述电极结构305位于所述空腔302内，因此所述压电层304能够为形成的所述调频层306提供较为平坦的表面，减小所述调频层306薄膜的晶格缺陷，提升薄膜品质，进而使得所述调频层306对于器件的频率控制更加灵活且精准。另外，由于所述电极结构305位于所述空腔302内，可以有效防止器件在使用中，所述电极结构305被氧化或腐蚀的情况发生。In this embodiment, since the electrode structure 305 is located in the cavity 302, the piezoelectric layer 304 can provide a relatively flat surface for the formed frequency modulation layer 306, reducing the thin film of the frequency modulation layer 306. The lattice defects improve the film quality, thereby making the frequency modulation layer 306 more flexible and precise in controlling the frequency of the device. In addition, since the electrode structure 305 is located in the cavity 302, it can effectively prevent the electrode structure 305 from being oxidized or corroded during use of the device.
所述基底300的材料包括：硅、碳化硅、二氧化硅、砷化镓、氮化镓、氧化铝、氧化镁、陶瓷或聚合物；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺。The material of the substrate 300 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e., BCB), photosensitive epoxy photoresist (e.g., SU-8), polyimide.
在本实施例中，所述基底300的材料采用硅。In this embodiment, the material of the substrate 300 is silicon.
所述中间层301的材料包括：聚合物、绝缘电介质或多晶硅；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺；所述绝缘电介质包括：氮化铝、二氧化硅、氮化硅或氧化钛。The material of the intermediate layer 301 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
在本实施例中，所述中间层301的材料采用二氧化硅。In this embodiment, the material of the intermediate layer 301 is silicon dioxide.
所述压电层304的材料包括：氮化铝、氮化铝合金、氮化镓、氧化锌、钽酸锂、铌酸锂、锆钛酸铅或铌镁酸铅—钛酸铅。The material of the piezoelectric layer 304 includes: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
在本实施例中，所述压电层304的材料采用铌酸锂。In this embodiment, the piezoelectric layer 304 is made of lithium niobate.
在本实施例中，所述电极结构305包括：沿第一方向X平行排布的第一总线3051和第二总线3052，所述第一总线3051连接若干沿第二方向Y平行排布的第一电极条3053，所述第二总线3052连接若干沿所述第二方向Y平行排布的第二电极条3054，所述第一方向X与所述第二方向Y垂直，所述第一电极条3053和所述第二电极条3054交错放置。In this embodiment, the electrode structure 305 includes: a first bus line 3051 and a second bus line 3052 arranged in parallel along the first direction X. The first bus line 3051 connects several third bus lines arranged in parallel along the second direction Y. An electrode strip 3053. The second bus 3052 connects a plurality of second electrode strips 3054 arranged in parallel along the second direction Y. The first direction X is perpendicular to the second direction Y. The first electrode The strips 3053 and the second electrode strips 3054 are alternately placed.
在本实施例中，所述第一电极条3053和所述第二电极条3054的宽度相等；所述第一电极条3053和所述第二电极条3054具有第一宽度尺寸d1，相邻的所述第一电极条3053的中轴和所述第二电极条 3054的中轴具有第一中心尺寸d2，所述第一中心尺寸d2与所述第一宽度尺寸d1的比值范围为：1.2～20。In this embodiment, the widths of the first electrode strip 3053 and the second electrode strip 3054 are equal; the first electrode strip 3053 and the second electrode strip 3054 have a first width dimension d1. The central axis of the first electrode strip 3053 and the second electrode strip The central axis of 3054 has a first center dimension d2, and the ratio of the first center dimension d2 to the first width dimension d1 ranges from 1.2 to 20.
在本实施例中，所述第一电极条3053和所述第二电极条3054的厚度等于所述第一宽度尺寸d1；在其他实施例中，所述第一电极条和所述第二电极条的厚度还可以不等于所述第一宽度尺寸。In this embodiment, the thickness of the first electrode strip 3053 and the second electrode strip 3054 is equal to the first width dimension d1; in other embodiments, the thickness of the first electrode strip 3053 and the second electrode strip 3054 is equal to the first width dimension d1. The thickness of the strip may also be different than the first width dimension.
所述电极结构305的材料包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴和钛中的一种或多种。The material of the electrode structure 305 includes: one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
所述电极结构305为一层或多层。在本实施例中，所述电极结构305为两层，所述电极结构305的材料为钼铝、钨铝或铂铝。The electrode structure 305 is one or more layers. In this embodiment, the electrode structure 305 is two layers, and the material of the electrode structure 305 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
所述调频层306的材料包括金属或绝缘电介质；其中金属包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴或钛；绝缘电介质包括：氮化硅、氧化硅、氧化铝、碳化硅、碳氧化硅、氮化铝、砷化镓或氮化镓。The material of the frequency modulation layer 306 includes metal or insulating dielectric; the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt or titanium; the insulating dielectric includes: silicon nitride , silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
在本实施例中，所述调频层306的材料采用氮化硅。In this embodiment, the frequency modulation layer 306 is made of silicon nitride.
图21至图31是本发明又一实施例中体声波谐振装置的形成方法各步骤结构示意图。21 to 31 are schematic structural diagrams of the steps of a method for forming a bulk acoustic wave resonator device in another embodiment of the present invention.
请参考图21，提供牺牲基底403。Referring to Figure 21, a sacrificial substrate 403 is provided.
所述牺牲基底403的材料包括：硅、碳化硅、二氧化硅、砷化镓、氮化镓、氧化铝、氧化镁、陶瓷或聚合物；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺。The material of the sacrificial substrate 403 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e. , BCB), photosensitive epoxy resin photoresist (for example, SU-8), polyimide.
在本实施例中，所述牺牲基底403的材料采用硅。In this embodiment, the sacrificial substrate 403 is made of silicon.
请参考图22，在所述牺牲基底403上形成压电层404。Referring to FIG. 22 , a piezoelectric layer 404 is formed on the sacrificial substrate 403 .
所述压电层404的材料包括：氮化铝、氮化铝合金、氮化镓、氧化锌、钽酸锂、铌酸锂、锆钛酸铅或铌镁酸铅—钛酸铅。The material of the piezoelectric layer 404 includes: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
在本实施例中，所述压电层404的材料采用铌酸锂。 In this embodiment, the piezoelectric layer 404 is made of lithium niobate.
请参考图23和图24，图24是图23中沿C-C线截面示意图，在所述压电层404上形成电极结构405。Please refer to Figures 23 and 24. Figure 24 is a schematic cross-sectional view along line C-C in Figure 23. An electrode structure 405 is formed on the piezoelectric layer 404.
在本实施例中，所述电极结构405包括：沿第一方向X平行排布的第一总线4051和第二总线4052，所述第一总线4051连接若干沿第二方向Y平行排布的第一电极条4053，所述第二总线4052连接若干沿所述第二方向Y平行排布的第二电极条4054，所述第一方向X与所述第二方向Y垂直，所述第一电极条4053和所述第二电极条4054交错放置。In this embodiment, the electrode structure 405 includes: a first bus 4051 and a second bus 4052 arranged in parallel along the first direction An electrode strip 4053. The second bus 4052 connects a plurality of second electrode strips 4054 arranged in parallel along the second direction Y. The first direction X is perpendicular to the second direction Y. The first electrode The strips 4053 and the second electrode strips 4054 are alternately placed.
在本实施例中，所述第一电极条4053和所述第二电极条4054的宽度相等；所述第一电极条4053和所述第二电极条4054具有第一宽度尺寸d1，相邻的所述第一电极条4053的中轴和所述第二电极条4054的中轴具有第一中心尺寸d2，所述第一中心尺寸d2与所述第一宽度尺寸d1的比值范围为：1.2～20。In this embodiment, the widths of the first electrode strip 4053 and the second electrode strip 4054 are equal; the first electrode strip 4053 and the second electrode strip 4054 have a first width dimension d1. The central axis of the first electrode strip 4053 and the central axis of the second electrode strip 4054 have a first central dimension d2, and the ratio range of the first central dimension d2 to the first width dimension d1 is: 1.2~ 20.
在本实施例中，所述第一电极条4053和所述第二电极条4054的厚度等于所述第一宽度尺寸d1；在其他实施例中，所述第一电极条和所述第二电极条的厚度还可以不等于所述第一宽度尺寸。In this embodiment, the thickness of the first electrode strip 4053 and the second electrode strip 4054 is equal to the first width dimension d1; in other embodiments, the thickness of the first electrode strip 4053 and the second electrode strip 4054 is equal to the first width dimension d1. The thickness of the strip may also be different than the first width dimension.
所述电极结构405的材料包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴和钛中的一种或多种。The material of the electrode structure 405 includes: one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
所述电极结构405为一层或多层。在本实施例中，所述电极结构405为两层，所述电极结构405的材料为钼铝、钨铝或铂铝。The electrode structure 405 is one or more layers. In this embodiment, the electrode structure 405 has two layers, and the material of the electrode structure 405 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
请参考图25，图25和图24的视图方向一致，在所述压电层404上形成牺牲层408，所述牺牲层408至少覆盖所述电极结构405。Please refer to FIG. 25 . The view directions of FIG. 25 and FIG. 24 are consistent. A sacrificial layer 408 is formed on the piezoelectric layer 404 , and the sacrificial layer 408 at least covers the electrode structure 405 .
所述牺牲层408的材料包括：聚合物、绝缘电介质或多晶硅；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺；所述绝缘电介质包括：氮化铝、二氧化硅、氮化硅或氧化钛。The material of the sacrificial layer 408 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
在本实施例中，所述牺牲层408的材料采用聚酰亚胺。 In this embodiment, the sacrificial layer 408 is made of polyimide.
请参考图26，在所述压电层404上形成中间层401，所述中间层401至少覆盖所述牺牲层408，所述中间层401包括相对的第一侧401a和第二侧401b，所述压电层404和所述牺牲基底403位于所述第二侧401b。Referring to Figure 26, an intermediate layer 401 is formed on the piezoelectric layer 404. The intermediate layer 401 at least covers the sacrificial layer 408. The intermediate layer 401 includes opposite first sides 401a and second sides 401b, so The piezoelectric layer 404 and the sacrificial substrate 403 are located on the second side 401b.
所述中间层401的材料包括：聚合物、绝缘电介质或多晶硅；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺；所述绝缘电介质包括：氮化铝、二氧化硅、氮化硅或氧化钛。The material of the intermediate layer 401 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
在本实施例中，所述中间层401的材料采用二氧化硅。In this embodiment, the material of the middle layer 401 is silicon dioxide.
请参考图27，提供基底400。Referring to Figure 27, a substrate 400 is provided.
所述基底400的材料包括：硅、碳化硅、二氧化硅、砷化镓、氮化镓、氧化铝、氧化镁、陶瓷或聚合物；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺。The material of the substrate 400 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e., BCB), photosensitive epoxy photoresist (e.g., SU-8), polyimide.
在本实施例中，所述基底400的材料采用硅。In this embodiment, the material of the substrate 400 is silicon.
请参考图28，接合所述基底400和所述中间层401，所述基底400位于所述第一侧401a；在接合所述基底400和所述中间层401之后，去除所述牺牲基底403。Please refer to FIG. 28 , the substrate 400 and the intermediate layer 401 are bonded, and the substrate 400 is located on the first side 401 a; after the substrate 400 and the intermediate layer 401 are bonded, the sacrificial substrate 403 is removed.
去除所述牺牲基底403的工艺包括：物理研磨工艺、湿法刻蚀工艺或干法刻蚀工艺。The process of removing the sacrificial substrate 403 includes: a physical grinding process, a wet etching process or a dry etching process.
在本实施例中，去除所述牺牲基底403的工艺采用物理研磨工艺。In this embodiment, the process of removing the sacrificial substrate 403 adopts a physical grinding process.
在本实施例中，接合所述基底400和所述中间层401采用键合工艺；在其他实施例中，接合所述基底和所述中间层还可以采用粘合工艺。In this embodiment, a bonding process is used to join the substrate 400 and the intermediate layer 401; in other embodiments, an adhesion process may also be used to join the substrate and the intermediate layer.
请参考图29和图30，图30是图29中沿D-D线截面示意图，形成调频层406，位于所述第二侧401b且位于所述压电层404上，所 述中间层401和所述调频层406分别位于所述压电层404的两侧，所述电极结构405和所述调频层406分别位于所述压电层404的两侧。Please refer to Figures 29 and 30. Figure 30 is a schematic cross-sectional view along line DD in Figure 29, forming the frequency modulation layer 406, located on the second side 401b and on the piezoelectric layer 404, so The intermediate layer 401 and the frequency modulation layer 406 are respectively located on both sides of the piezoelectric layer 404, and the electrode structure 405 and the frequency modulation layer 406 are respectively located on both sides of the piezoelectric layer 404.
所述调频层406的材料包括金属或绝缘电介质；其中金属包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴或钛；绝缘电介质包括：氮化硅、氧化硅、氧化铝、碳化硅、碳氧化硅、氮化铝、砷化镓或氮化镓。The material of the frequency modulation layer 406 includes metal or insulating dielectric; the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt or titanium; the insulating dielectric includes: silicon nitride , silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
在本实施例中，所述调频层406的材料采用氮化硅。In this embodiment, the frequency modulation layer 406 is made of silicon nitride.
在本实施例中，所述调频层406包括凹槽407，所述电极结构405在所述基底400上的投影位于所述凹槽407在所述基底400上的投影范围内。通过增大或减小所述凹槽407的深度，可以调节所述谐振装置的谐振频率，使得所述调频层406对于器件频率的控制更加灵活精准。In this embodiment, the frequency modulation layer 406 includes a groove 407, and the projection of the electrode structure 405 on the substrate 400 is located within the projection range of the groove 407 on the substrate 400. By increasing or decreasing the depth of the groove 407, the resonant frequency of the resonant device can be adjusted, making the frequency modulation layer 406 more flexible and precise in controlling the device frequency.
所述凹槽407呈任意多边形。在本实施例中，所述凹槽407呈矩形。The groove 407 is in the shape of any polygon. In this embodiment, the groove 407 is in the shape of a rectangle.
请参考图31，图31和图30的视图方向一致，在形成所述调频层406之后，去除所述牺牲层408，在所述中间层401内形成空腔402，所述空腔402的开口位于所述第二侧401b，所述电极结构405位于所述空腔402内。Please refer to Figure 31. The views of Figure 31 and Figure 30 are in the same direction. After the frequency modulation layer 406 is formed, the sacrificial layer 408 is removed, and a cavity 402 is formed in the intermediate layer 401. The opening of the cavity 402 Located on the second side 401b, the electrode structure 405 is located in the cavity 402.
在本实施例中，由于所述电极结构405位于所述空腔402内，因此所述压电层404能够为形成的所述调频层406提供较为平坦的表面，减小所述调频层406薄膜的晶格缺陷，提升薄膜品质，进而使得所述调频层406对于器件的频率控制更加灵活且精准。另外，由于所述电极结构405位于所述空腔402内，可以有效防止器件在使用中，所述电极结构405被氧化或腐蚀的情况发生。In this embodiment, since the electrode structure 405 is located in the cavity 402, the piezoelectric layer 404 can provide a relatively flat surface for the frequency modulation layer 406 formed, reducing the thin film of the frequency modulation layer 406. The lattice defects improve the film quality, thereby making the frequency modulation layer 406 more flexible and precise in controlling the frequency of the device. In addition, since the electrode structure 405 is located in the cavity 402, it can effectively prevent the electrode structure 405 from being oxidized or corroded during use of the device.
在本实施例中，去除所述牺牲层408的工艺采用湿法刻蚀工艺。In this embodiment, a wet etching process is used to remove the sacrificial layer 408 .
相应的，本发明实施例中还提供一种体声波谐振装置，请继续参考图31包括：基底400；中间层401，所述中间层401包括相对的第 一侧401a和第二侧401b，所述基底400位于所述第一侧401a，所述中间层401包括空腔402，所述空腔402的开口位于所述第二侧401b；电极结构405，位于所述空腔402内；压电层404，位于所述第二侧401b且位于所述电极结构405上，所述压电层404至少覆盖所述空腔405；调频层406，位于所述第二侧401b且位于所述压电层404上，所述中间层401和所述调频层406分别位于所述压电层404的两侧，所述电极结构405和所述调频层406分别位于所述压电层404的两侧，所述调频层406包括凹槽407，所述电极结构405在所述基底400上的投影位于所述凹槽407在所述基底400上的投影范围内。Correspondingly, the embodiment of the present invention also provides a bulk acoustic wave resonance device. Please continue to refer to FIG. 31 and include: a substrate 400; an intermediate layer 401. The intermediate layer 401 includes an opposite third layer. One side 401a and a second side 401b, the substrate 400 is located on the first side 401a, the intermediate layer 401 includes a cavity 402, and the opening of the cavity 402 is located on the second side 401b; the electrode structure 405, Located in the cavity 402; the piezoelectric layer 404 is located on the second side 401b and on the electrode structure 405, the piezoelectric layer 404 at least covers the cavity 405; the frequency modulation layer 406 is located on the The second side 401b is located on the piezoelectric layer 404. The intermediate layer 401 and the frequency modulation layer 406 are respectively located on both sides of the piezoelectric layer 404. The electrode structure 405 and the frequency modulation layer 406 are respectively located on On both sides of the piezoelectric layer 404, the frequency modulation layer 406 includes grooves 407, and the projection of the electrode structure 405 on the substrate 400 is located within the projection range of the groove 407 on the substrate 400.
在本实施例中，由于所述电极结构405位于所述空腔402内，因此所述压电层404能够为形成的所述调频层406提供较为平坦的表面，减小所述调频层406薄膜的晶格缺陷，提升薄膜品质，进而使得所述调频层406对于器件的频率控制更加灵活且精准。另外，由于所述电极结构405位于所述空腔402内，可以有效防止器件在使用中，所述电极结构405被氧化或腐蚀的情况发生。In this embodiment, since the electrode structure 405 is located in the cavity 402, the piezoelectric layer 404 can provide a relatively flat surface for the frequency modulation layer 406 formed, reducing the thin film of the frequency modulation layer 406. The lattice defects improve the film quality, thereby making the frequency modulation layer 406 more flexible and precise in controlling the frequency of the device. In addition, since the electrode structure 405 is located in the cavity 402, it can effectively prevent the electrode structure 405 from being oxidized or corroded during use of the device.
所述基底400的材料包括：硅、碳化硅、二氧化硅、砷化镓、氮化镓、氧化铝、氧化镁、陶瓷或聚合物；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺。The material of the substrate 400 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e., BCB), photosensitive epoxy photoresist (e.g., SU-8), polyimide.
在本实施例中，所述基底400的材料采用硅。In this embodiment, the material of the substrate 400 is silicon.
所述中间层401的材料包括：聚合物、绝缘电介质或多晶硅；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺；所述绝缘电介质包括：氮化铝、二氧化硅、氮化硅或氧化钛。The material of the intermediate layer 401 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
在本实施例中，所述中间层401的材料采用二氧化硅。In this embodiment, the material of the middle layer 401 is silicon dioxide.
所述压电层404的材料包括：氮化铝、氮化铝合金、氮化镓、氧化锌、钽酸锂、铌酸锂、锆钛酸铅或铌镁酸铅—钛酸铅。The material of the piezoelectric layer 404 includes: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
在本实施例中，所述压电层404的材料采用铌酸锂。 In this embodiment, the piezoelectric layer 404 is made of lithium niobate.
在本实施例中，所述电极结构405包括：沿第一方向X平行排布的第一总线4051和第二总线4052，所述第一总线4051连接若干沿第二方向Y平行排布的第一电极条4053，所述第二总线4052连接若干沿所述第二方向Y平行排布的第二电极条4054，所述第一方向X与所述第二方向Y垂直，所述第一电极条4053和所述第二电极条4054交错放置。In this embodiment, the electrode structure 405 includes: a first bus 4051 and a second bus 4052 arranged in parallel along the first direction An electrode strip 4053. The second bus 4052 connects a plurality of second electrode strips 4054 arranged in parallel along the second direction Y. The first direction X is perpendicular to the second direction Y. The first electrode The strips 4053 and the second electrode strips 4054 are alternately placed.
在本实施例中，所述第一电极条4053和所述第二电极条4054的宽度相等；所述第一电极条4053和所述第二电极条4054具有第一宽度尺寸d1，相邻的所述第一电极条4053的中轴和所述第二电极条4054的中轴具有第一中心尺寸d2，所述第一中心尺寸d2与所述第一宽度尺寸d1的比值范围为：1.2～20。In this embodiment, the widths of the first electrode strip 4053 and the second electrode strip 4054 are equal; the first electrode strip 4053 and the second electrode strip 4054 have a first width dimension d1, the central axis of the adjacent first electrode strip 4053 and the central axis of the second electrode strip 4054 have a first center dimension d2, and the ratio of the first center dimension d2 to the first width dimension d1 ranges from 1.2 to 20.
在本实施例中，所述第一电极条4053和所述第二电极条4054的厚度等于所述第一宽度尺寸d1；在其他实施例中，所述第一电极条和所述第二电极条的厚度还可以不等于所述第一宽度尺寸。In this embodiment, the thickness of the first electrode strip 4053 and the second electrode strip 4054 is equal to the first width dimension d1; in other embodiments, the thickness of the first electrode strip 4053 and the second electrode strip 4054 is equal to the first width dimension d1. The thickness of the strip may also be different than the first width dimension.
所述电极结构405的材料包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴和钛中的一种或多种。The material of the electrode structure 405 includes: one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
所述电极结构405为一层或多层。在本实施例中，所述电极结构405为两层，所述电极结构405的材料为钼铝、钨铝或铂铝。The electrode structure 405 is one or more layers. In this embodiment, the electrode structure 405 has two layers, and the material of the electrode structure 405 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
所述调频层406的材料包括金属或绝缘电介质；其中金属包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴或钛；绝缘电介质包括：氮化硅、氧化硅、氧化铝、碳化硅、碳氧化硅、氮化铝、砷化镓或氮化镓。The material of the frequency modulation layer 406 includes metal or insulating dielectric; the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt or titanium; the insulating dielectric includes: silicon nitride , silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
在本实施例中，所述调频层406的材料采用氮化硅。In this embodiment, the frequency modulation layer 406 is made of silicon nitride.
在本实施例中，通过增大或减小所述凹槽407的深度，可以调节所述谐振装置的谐振频率，使得所述调频层406对于器件频率的控制更加灵活精准。In this embodiment, by increasing or decreasing the depth of the groove 407, the resonant frequency of the resonant device can be adjusted, so that the frequency modulation layer 406 can control the device frequency more flexibly and accurately.
所述凹槽407呈任意多边形。在本实施例中，所述凹槽407呈矩 形。The groove 407 is in an arbitrary polygonal shape. In this embodiment, the groove 407 is in the shape of a rectangular shape.
图32至图42是本发明又一实施例中体声波谐振装置的形成方法各步骤结构示意图。32 to 42 are schematic structural diagrams of each step of a method for forming a bulk acoustic wave resonance device in another embodiment of the present invention.
请参考图32，提供牺牲基底503。Referring to Figure 32, a sacrificial substrate 503 is provided.
所述牺牲基底503的材料包括：硅、碳化硅、二氧化硅、砷化镓、氮化镓、氧化铝、氧化镁、陶瓷或聚合物；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺。The material of the sacrificial substrate 503 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e. , BCB), photosensitive epoxy resin photoresist (for example, SU-8), polyimide.
在本实施例中，所述牺牲基底503的材料采用硅。In this embodiment, the sacrificial substrate 503 is made of silicon.
请参考图33，在所述牺牲基底503上形成压电层504。Referring to FIG. 33 , a piezoelectric layer 504 is formed on the sacrificial substrate 503 .
所述压电层504的材料包括：氮化铝、氮化铝合金、氮化镓、氧化锌、钽酸锂、铌酸锂、锆钛酸铅或铌镁酸铅—钛酸铅。The material of the piezoelectric layer 504 includes: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
在本实施例中，所述压电层504的材料采用铌酸锂。In this embodiment, the piezoelectric layer 504 is made of lithium niobate.
请参考图34和图35，图35是图34中沿E-E线截面示意图，在所述压电层504上形成电极结构505。Please refer to FIG. 34 and FIG. 35 . FIG. 35 is a schematic cross-sectional view along line E-E in FIG. 34 . An electrode structure 505 is formed on the piezoelectric layer 504 .
在本实施例中，所述电极结构505包括：沿第一方向X平行排布的第一总线5051和第二总线5052，所述第一总线5051连接若干沿第二方向Y平行排布的第一电极条5053，所述第二总线5052连接若干沿所述第二方向Y平行排布的第二电极条5054，所述第一方向X与所述第二方向Y垂直，所述第一电极条5053和所述第二电极条5054交错放置。In this embodiment, the electrode structure 505 includes: a first bus 5051 and a second bus 5052 arranged in parallel along the first direction An electrode strip 5053. The second bus 5052 connects a plurality of second electrode strips 5054 arranged in parallel along the second direction Y. The first direction X is perpendicular to the second direction Y. The first electrode The strips 5053 and the second electrode strips 5054 are alternately placed.
在本实施例中，所述第一电极条5053和所述第二电极条5054的宽度相等；所述第一电极条5053和所述第二电极条5054具有第一宽度尺寸d1，相邻的所述第一电极条5053的中轴和所述第二电极条5054的中轴具有第一中心尺寸d2，所述第一中心尺寸d2与所述第一宽度尺寸d1的比值范围为：1.2～20。 In this embodiment, the widths of the first electrode strip 5053 and the second electrode strip 5054 are equal; the first electrode strip 5053 and the second electrode strip 5054 have a first width dimension d1, the central axis of the adjacent first electrode strip 5053 and the central axis of the second electrode strip 5054 have a first center dimension d2, and the ratio of the first center dimension d2 to the first width dimension d1 ranges from 1.2 to 20.
在本实施例中，所述第一电极条5053和所述第二电极条5054的厚度等于所述第一宽度尺寸d1；在其他实施例中，所述第一电极条和所述第二电极条的厚度还可以不等于所述第一宽度尺寸。In this embodiment, the thickness of the first electrode strip 5053 and the second electrode strip 5054 is equal to the first width dimension d1; in other embodiments, the first electrode strip and the second electrode strip 5054 have a thickness equal to the first width dimension d1. The thickness of the strip may also be different than the first width dimension.
所述电极结构505的材料包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴和钛中的一种或多种。The material of the electrode structure 505 includes: one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
所述电极结构505为一层或多层。在本实施例中，所述电极结构505为两层，所述电极结构505的材料为钼铝、钨铝或铂铝。The electrode structure 505 is one or more layers. In this embodiment, the electrode structure 505 has two layers, and the material of the electrode structure 505 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
请参考图36，图36和图35的视图方向一致，在所述压电层504上形成牺牲层508，所述牺牲层508至少覆盖所述电极结构505。Please refer to FIG. 36 . The view directions of FIG. 36 and FIG. 35 are consistent. A sacrificial layer 508 is formed on the piezoelectric layer 504 , and the sacrificial layer 508 at least covers the electrode structure 505 .
所述牺牲层508的材料包括：聚合物、绝缘电介质或多晶硅；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺；所述绝缘电介质包括：氮化铝、二氧化硅、氮化硅或氧化钛。The material of the sacrificial layer 508 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
在本实施例中，所述牺牲层508的材料采用聚酰亚胺。In this embodiment, the sacrificial layer 508 is made of polyimide.
请参考图37，在所述压电层504上形成中间层501，所述中间层501至少覆盖所述牺牲层508，所述中间层501包括相对的第一侧501a和第二侧501b，所述压电层504和所述牺牲基底503位于所述第二侧501b。Referring to Figure 37, an intermediate layer 501 is formed on the piezoelectric layer 504. The intermediate layer 501 at least covers the sacrificial layer 508. The intermediate layer 501 includes opposite first sides 501a and second sides 501b, so The piezoelectric layer 504 and the sacrificial substrate 503 are located on the second side 501b.
所述中间层501的材料包括：聚合物、绝缘电介质或多晶硅；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺；所述绝缘电介质包括：氮化铝、二氧化硅、氮化硅或氧化钛。The material of the intermediate layer 501 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
在本实施例中，所述中间层501的材料采用二氧化硅。In this embodiment, the material of the middle layer 501 is silicon dioxide.
请参考图37，提供基底500。Referring to Figure 37, a substrate 500 is provided.
所述基底500的材料包括：硅、碳化硅、二氧化硅、砷化镓、氮化镓、氧化铝、氧化镁、陶瓷或聚合物；所述聚合物包括：苯并环丁 烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺。The material of the substrate 500 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramic or polymer; the polymer includes: benzocyclobutane olefins (ie, BCB), photosensitive epoxy photoresists (eg, SU-8), polyimide.
在本实施例中，所述基底500的材料采用硅。In this embodiment, the material of the substrate 500 is silicon.
请参考图39，接合所述基底500和所述中间层501，所述基底500位于所述第一侧501a；在接合所述基底500和所述中间层501之后，去除所述牺牲基底503。Referring to FIG. 39, the substrate 500 and the intermediate layer 501 are bonded, and the substrate 500 is located on the first side 501a; after the substrate 500 and the intermediate layer 501 are bonded, the sacrificial substrate 503 is removed.
去除所述牺牲基底503的工艺包括：物理研磨工艺、湿法刻蚀工艺或干法刻蚀工艺。The process of removing the sacrificial substrate 503 includes: physical grinding process, wet etching process or dry etching process.
在本实施例中，去除所述牺牲基底503的工艺采用物理研磨工艺。In this embodiment, the process of removing the sacrificial substrate 503 adopts a physical grinding process.
在本实施例中，接合所述基底500和所述中间层501采用键合工艺；在其他实施例中，接合所述基底和所述中间层还可以采用粘合工艺。In this embodiment, a bonding process is used to join the substrate 500 and the intermediate layer 501; in other embodiments, an adhesion process may also be used to join the substrate and the intermediate layer.
请参考图40和图41，图41是图40中沿F-F线截面示意图，形成调频层506，位于所述第二侧501b且位于所述压电层504上，所述中间层501和所述调频层506分别位于所述压电层504的两侧，所述电极结构505和所述调频层506分别位于所述压电层504的两侧。Please refer to Figures 40 and 41. Figure 41 is a schematic cross-sectional view along the F-F line in Figure 40, forming a frequency modulation layer 506, which is located on the second side 501b and on the piezoelectric layer 504, the intermediate layer 501 and the frequency modulation layer 506 are respectively located on both sides of the piezoelectric layer 504, and the electrode structure 505 and the frequency modulation layer 506 are respectively located on both sides of the piezoelectric layer 504.
所述调频层506的材料包括金属或绝缘电介质；其中金属包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴或钛；绝缘电介质包括：氮化硅、氧化硅、氧化铝、碳化硅、碳氧化硅、氮化铝、砷化镓或氮化镓。The material of the frequency modulation layer 506 includes metal or insulating dielectric; the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt or titanium; the insulating dielectric includes: silicon nitride , silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
在本实施例中，所述调频层506的材料采用氮化硅。In this embodiment, the material of the frequency modulation layer 506 is silicon nitride.
在本实施例中，所述调频层506的调频区域S包括多个凹槽507，所述电极结构505在所述基底500上的投影位于所述调频区域S在所述基底500上的投影范围内。通过增大或减小所述凹槽507的深度，可以调节所述谐振装置的谐振频率，使得所述调频层506对于器件频率的控制更加灵活精准。 In this embodiment, the frequency modulation area S of the frequency modulation layer 506 includes a plurality of grooves 507, and the projection of the electrode structure 505 on the substrate 500 is located in the projection range of the frequency modulation area S on the substrate 500. Inside. By increasing or decreasing the depth of the groove 507, the resonant frequency of the resonant device can be adjusted, making the frequency modulation layer 506 more flexible and precise in controlling the device frequency.
在本实施例中，多个所述凹槽507在所述调频区域内均匀分布。In this embodiment, a plurality of grooves 507 are evenly distributed within the frequency modulation area.
多个所述凹槽507的分布可以为任意多边形或环形，单个所述凹槽507呈任意多边形或圆形。在本实施例中，多个所述凹槽507呈矩形分布，且单个所述凹槽507也呈矩形。The distribution of multiple grooves 507 can be in any polygonal or circular shape, and a single groove 507 can be in any polygonal or circular shape. In this embodiment, a plurality of the grooves 507 are distributed in a rectangular shape, and a single groove 507 is also in a rectangular shape.
请参考图42，图42和图41的视图方向一致，在形成所述调频层506之后，去除所述牺牲层508，在所述中间层501内形成空腔502，所述空腔502的开口位于所述第二侧501b，所述电极结构505位于所述空腔502内。Please refer to Figure 42. The views of Figure 42 and Figure 41 are in the same direction. After the frequency modulation layer 506 is formed, the sacrificial layer 508 is removed, and a cavity 502 is formed in the intermediate layer 501. The opening of the cavity 502 Located on the second side 501b, the electrode structure 505 is located in the cavity 502.
在本实施例中，由于所述电极结构505位于所述空腔502内，因此所述压电层504能够为形成的所述调频层506提供较为平坦的表面，减小所述调频层506薄膜的晶格缺陷，提升薄膜品质，进而使得所述调频层506对于器件的频率控制更加灵活且精准。另外，由于所述电极结构505位于所述空腔502内，可以有效防止器件在使用中，所述电极结构505被氧化或腐蚀的情况发生。In this embodiment, since the electrode structure 505 is located in the cavity 502, the piezoelectric layer 504 can provide a relatively flat surface for the formed frequency modulation layer 506, reducing the thin film of the frequency modulation layer 506. The lattice defects improve the film quality, thereby making the frequency modulation layer 506 more flexible and precise in controlling the frequency of the device. In addition, since the electrode structure 505 is located in the cavity 502, it can effectively prevent the electrode structure 505 from being oxidized or corroded during use of the device.
在本实施例中，去除所述牺牲层506的工艺采用湿法刻蚀工艺。In this embodiment, a wet etching process is used to remove the sacrificial layer 506 .
相应的，本发明实施例中还提供一种体声波谐振装置，请继续参考图42包括：基底500；中间层501，所述中间层501包括相对的第一侧501a和第二侧501b，所述基底500位于所述第一侧501a，所述中间层501包括空腔502，所述空腔502的开口位于所述第二侧501b；电极结构505，位于所述空腔502内；压电层504，位于所述第二侧501b且位于所述电极结构505上，所述压电层504至少覆盖所述空腔505；调频层506，位于所述第二侧501b且位于所述压电层504上，所述中间层501和所述调频层506分别位于所述压电层504的两侧，所述电极结构505和所述调频层506分别位于所述压电层504的两侧，所述调频层506的调频区域S包括多个凹槽507，所述电极结构505在所述基底500上的投影位于所述调频区域S在所述基底500上的投影范围内。 Correspondingly, the embodiment of the present invention also provides a bulk acoustic wave resonance device. Please continue to refer to FIG. 42 and include: a substrate 500; an intermediate layer 501. The intermediate layer 501 includes an opposite first side 501a and a second side 501b, so The substrate 500 is located on the first side 501a, the intermediate layer 501 includes a cavity 502, and the opening of the cavity 502 is located on the second side 501b; an electrode structure 505 is located in the cavity 502; piezoelectric Layer 504 is located on the second side 501b and is located on the electrode structure 505. The piezoelectric layer 504 at least covers the cavity 505; frequency modulation layer 506 is located on the second side 501b and is located on the piezoelectric layer. On the layer 504, the intermediate layer 501 and the frequency modulation layer 506 are respectively located on both sides of the piezoelectric layer 504, and the electrode structure 505 and the frequency modulation layer 506 are respectively located on both sides of the piezoelectric layer 504. The frequency modulation area S of the frequency modulation layer 506 includes a plurality of grooves 507 , and the projection of the electrode structure 505 on the substrate 500 is located within the projection range of the frequency modulation area S on the substrate 500 .
在本实施例中，由于所述电极结构505位于所述空腔502内，因此所述压电层504能够为形成的所述调频层506提供较为平坦的表面，减小所述调频层506薄膜的晶格缺陷，提升薄膜品质，进而使得所述调频层506对于器件的频率控制更加灵活且精准。另外，由于所述电极结构505位于所述空腔502内，可以有效防止器件在使用中，所述电极结构505被氧化或腐蚀的情况发生。In this embodiment, since the electrode structure 505 is located in the cavity 502, the piezoelectric layer 504 can provide a relatively flat surface for the formed frequency modulation layer 506, reduce the lattice defects of the frequency modulation layer 506 film, improve the film quality, and thus make the frequency modulation layer 506 more flexible and accurate in controlling the frequency of the device. In addition, since the electrode structure 505 is located in the cavity 502, the electrode structure 505 can be effectively prevented from being oxidized or corroded during use of the device.
所述基底500的材料包括：硅、碳化硅、二氧化硅、砷化镓、氮化镓、氧化铝、氧化镁、陶瓷或聚合物；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺。The material of the substrate 500 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e., BCB), photosensitive epoxy photoresist (e.g., SU-8), polyimide.
在本实施例中，所述基底500的材料采用硅。In this embodiment, the material of the substrate 500 is silicon.
所述中间层501的材料包括：聚合物、绝缘电介质或多晶硅；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺；所述绝缘电介质包括：氮化铝、二氧化硅、氮化硅或氧化钛。The material of the intermediate layer 501 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
在本实施例中，所述中间层501的材料采用二氧化硅。In this embodiment, the material of the middle layer 501 is silicon dioxide.
所述压电层504的材料包括：氮化铝、氮化铝合金、氮化镓、氧化锌、钽酸锂、铌酸锂、锆钛酸铅或铌镁酸铅—钛酸铅。The material of the piezoelectric layer 504 includes: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
在本实施例中，所述压电层504的材料采用铌酸锂。In this embodiment, the piezoelectric layer 504 is made of lithium niobate.
在本实施例中，所述电极结构505包括：沿第一方向X平行排布的第一总线5051和第二总线5052，所述第一总线5051连接若干沿第二方向Y平行排布的第一电极条5053，所述第二总线5052连接若干沿所述第二方向Y平行排布的第二电极条5054，所述第一方向X与所述第二方向Y垂直，所述第一电极条5053和所述第二电极条5054交错放置。In this embodiment, the electrode structure 505 includes: a first bus 5051 and a second bus 5052 arranged in parallel along the first direction An electrode strip 5053. The second bus 5052 connects a plurality of second electrode strips 5054 arranged in parallel along the second direction Y. The first direction X is perpendicular to the second direction Y. The first electrode The strips 5053 and the second electrode strips 5054 are alternately placed.
在本实施例中，所述第一电极条5053和所述第二电极条5054的宽度相等；所述第一电极条5053和所述第二电极条5054具有第一宽度尺寸d1，相邻的所述第一电极条5053的中轴和所述第二电极条 5054的中轴具有第一中心尺寸d2，所述第一中心尺寸d2与所述第一宽度尺寸d1的比值范围为：1.2～20。In this embodiment, the widths of the first electrode strip 5053 and the second electrode strip 5054 are equal; the first electrode strip 5053 and the second electrode strip 5054 have a first width dimension d1. The central axis of the first electrode strip 5053 and the second electrode strip The central axis of 5054 has a first center dimension d2, and the ratio of the first center dimension d2 to the first width dimension d1 ranges from 1.2 to 20.
在本实施例中，所述第一电极条5053和所述第二电极条5054的厚度等于所述第一宽度尺寸d1；在其他实施例中，所述第一电极条和所述第二电极条的厚度还可以不等于所述第一宽度尺寸。In this embodiment, the thickness of the first electrode strip 5053 and the second electrode strip 5054 is equal to the first width dimension d1; in other embodiments, the first electrode strip and the second electrode strip 5054 have a thickness equal to the first width dimension d1. The thickness of the strip may also be different than the first width dimension.
所述电极结构505的材料包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴和钛中的一种或多种。The material of the electrode structure 505 includes: one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
所述电极结构505为一层或多层。在本实施例中，所述电极结构505为两层，所述电极结构505的材料为钼铝、钨铝或铂铝。The electrode structure 505 is one or more layers. In this embodiment, the electrode structure 505 has two layers, and the material of the electrode structure 505 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
所述调频层506的材料包括金属或绝缘电介质；其中金属包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴或钛；绝缘电介质包括：氮化硅、氧化硅、氧化铝、碳化硅、碳氧化硅、氮化铝、砷化镓或氮化镓。The material of the frequency modulation layer 506 includes metal or insulating dielectric; the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt or titanium; the insulating dielectric includes: silicon nitride , silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
在本实施例中，所述调频层506的材料采用氮化硅。In this embodiment, the frequency modulation layer 506 is made of silicon nitride.
在本实施例中，通过增大或减小所述凹槽507的深度，可以调节所述谐振装置的谐振频率，使得所述调频层506对于器件频率的控制更加灵活精准。In this embodiment, by increasing or decreasing the depth of the groove 507, the resonant frequency of the resonant device can be adjusted, so that the frequency modulation layer 506 can control the device frequency more flexibly and accurately.
在本实施例中，多个所述凹槽507在所述调频区域内均匀分布。In this embodiment, a plurality of grooves 507 are evenly distributed within the frequency modulation area.
多个所述凹槽507的分布可以为任意多边形或环形，单个所述凹槽507呈任意多边形或圆形。在本实施例中，多个所述凹槽507呈矩形分布，且单个所述凹槽507也呈矩形。The distribution of multiple grooves 507 can be in any polygonal or circular shape, and a single groove 507 can be in any polygonal or circular shape. In this embodiment, a plurality of the grooves 507 are distributed in a rectangular shape, and a single groove 507 is also in a rectangular shape.
图43至图53是本发明又一实施例中体声波谐振装置的形成方法各步骤结构示意图。43 to 53 are schematic structural diagrams of each step of a method for forming a bulk acoustic wave resonance device in another embodiment of the present invention.
请参考图43，提供牺牲基底603。Referring to Figure 43, a sacrificial substrate 603 is provided.
所述牺牲基底603的材料包括：硅、碳化硅、二氧化硅、砷化镓、 氮化镓、氧化铝、氧化镁、陶瓷或聚合物；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺。The material of the sacrificial substrate 603 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, Gallium nitride, aluminum oxide, magnesium oxide, ceramic or polymer; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), polyimide.
在本实施例中，所述牺牲基底603的材料采用硅。In this embodiment, the sacrificial substrate 603 is made of silicon.
请参考图44，在所述牺牲基底603上形成压电层604。Referring to FIG. 44 , a piezoelectric layer 604 is formed on the sacrificial substrate 603 .
所述压电层604的材料包括：氮化铝、氮化铝合金、氮化镓、氧化锌、钽酸锂、铌酸锂、锆钛酸铅或铌镁酸铅—钛酸铅。The material of the piezoelectric layer 604 includes: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
在本实施例中，所述压电层604的材料采用铌酸锂。In this embodiment, the piezoelectric layer 604 is made of lithium niobate.
请参考图45和图46，图46是图45中沿G-G线截面示意图，在所述压电层604上形成电极结构605。Please refer to FIG. 45 and FIG. 46 . FIG. 46 is a schematic cross-sectional view along line G-G in FIG. 45 . An electrode structure 605 is formed on the piezoelectric layer 604 .
在本实施例中，所述电极结构605包括：沿第一方向X平行排布的第一总线6051和第二总线6052，所述第一总线6051连接若干沿第二方向Y平行排布的第一电极条6053，所述第二总线6052连接若干沿所述第二方向Y平行排布的第二电极条6054，所述第一方向X与所述第二方向Y垂直，所述第一电极条6053和所述第二电极条6054交错放置。In this embodiment, the electrode structure 605 includes: a first bus 6051 and a second bus 6052 arranged in parallel along the first direction An electrode strip 6053. The second bus 6052 connects a plurality of second electrode strips 6054 arranged in parallel along the second direction Y. The first direction X is perpendicular to the second direction Y. The first electrode The strips 6053 and the second electrode strips 6054 are alternately placed.
在本实施例中，所述第一电极条6053和所述第二电极条6054的宽度相等；所述第一电极条6053和所述第二电极条6054具有第一宽度尺寸d1，相邻的所述第一电极条6053的中轴和所述第二电极条6054的中轴具有第一中心尺寸d2，所述第一中心尺寸d2与所述第一宽度尺寸d1的比值范围为：1.2～20。In this embodiment, the widths of the first electrode strip 6053 and the second electrode strip 6054 are equal; the first electrode strip 6053 and the second electrode strip 6054 have a first width dimension d1. The central axis of the first electrode strip 6053 and the central axis of the second electrode strip 6054 have a first central dimension d2, and the ratio range of the first central dimension d2 to the first width dimension d1 is: 1.2~ 20.
在本实施例中，所述第一电极条6053和所述第二电极条6054的厚度等于所述第一宽度尺寸d1；在其他实施例中，所述第一电极条和所述第二电极条的厚度还可以不等于所述第一宽度尺寸。In this embodiment, the thickness of the first electrode strip 6053 and the second electrode strip 6054 is equal to the first width dimension d1; in other embodiments, the first electrode strip and the second electrode strip The thickness of the strip may also be different than the first width dimension.
所述电极结构605的材料包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴和钛中的一种或多种。The material of the electrode structure 605 includes one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
所述电极结构605为一层或多层。在本实施例中，所述电极结构 605为两层，所述电极结构605的材料为钼铝、钨铝或铂铝。The electrode structure 605 is one or more layers. In this embodiment, the electrode structure 605 is two layers, and the material of the electrode structure 605 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
请参考图47，图47和图45的视图方向一致，在所述压电层604上形成牺牲层608，所述牺牲层608至少覆盖所述电极结构605。Please refer to FIG. 47 . The view directions of FIG. 47 and FIG. 45 are consistent. A sacrificial layer 608 is formed on the piezoelectric layer 604 , and the sacrificial layer 608 at least covers the electrode structure 605 .
所述牺牲层608的材料包括：聚合物、绝缘电介质或多晶硅；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺；所述绝缘电介质包括：氮化铝、二氧化硅、氮化硅或氧化钛。The material of the sacrificial layer 608 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
在本实施例中，所述牺牲层608的材料采用聚酰亚胺。In this embodiment, the sacrificial layer 608 is made of polyimide.
请参考图48，在所述压电层604上形成中间层601，所述中间层601至少覆盖所述牺牲层608，所述中间层601包括相对的第一侧601a和第二侧601b，所述压电层604和所述牺牲基底603位于所述第二侧601b。Referring to Figure 48, an intermediate layer 601 is formed on the piezoelectric layer 604. The intermediate layer 601 at least covers the sacrificial layer 608. The intermediate layer 601 includes opposite first sides 601a and second sides 601b, so The piezoelectric layer 604 and the sacrificial substrate 603 are located on the second side 601b.
所述中间层601的材料包括：聚合物、绝缘电介质或多晶硅；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺；所述绝缘电介质包括：氮化铝、二氧化硅、氮化硅或氧化钛。The material of the intermediate layer 601 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
在本实施例中，所述中间层601的材料采用二氧化硅。In this embodiment, the material of the middle layer 601 is silicon dioxide.
请参考图49，提供基底600。Referring to Figure 49, a substrate 600 is provided.
所述基底600的材料包括：硅、碳化硅、二氧化硅、砷化镓、氮化镓、氧化铝、氧化镁、陶瓷或聚合物；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺。The material of the substrate 600 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e., BCB), photosensitive epoxy photoresist (e.g., SU-8), polyimide.
在本实施例中，所述基底600的材料采用硅。In this embodiment, the material of the substrate 600 is silicon.
请参考图50，接合所述基底600和所述中间层601，所述基底600位于所述第一侧601a；在接合所述基底600和所述中间层601之后，去除所述牺牲基底603。 Please refer to FIG. 50 , the substrate 600 and the intermediate layer 601 are bonded, and the substrate 600 is located on the first side 601 a; after the substrate 600 and the intermediate layer 601 are bonded, the sacrificial substrate 603 is removed.
去除所述牺牲基底603的工艺包括：物理研磨工艺、湿法刻蚀工艺或干法刻蚀工艺。The process of removing the sacrificial substrate 603 includes: physical grinding process, wet etching process or dry etching process.
在本实施例中，去除所述牺牲基底603的工艺采用物理研磨工艺。In this embodiment, the process of removing the sacrificial substrate 603 adopts a physical grinding process.
在本实施例中，接合所述基底600和所述中间层601采用键合工艺；在其他实施例中，接合所述基底和所述中间层还可以采用粘合工艺。In this embodiment, a bonding process is used to join the substrate 600 and the intermediate layer 601; in other embodiments, an adhesion process may also be used to join the substrate and the intermediate layer.
请参考图51，形成温度补偿层607，位于所述第二侧601a且位于所述压电层604上。Referring to FIG. 51 , a temperature compensation layer 607 is formed on the second side 601 a and on the piezoelectric layer 604 .
所述温度补偿层607的材料包括：二氧化硅、碳氧化硅或氟氧化硅。在本实施例中，所述温度补偿层607的材料采用二氧化硅。The material of the temperature compensation layer 607 includes: silicon dioxide, silicon oxycarbide or silicon oxyfluoride. In this embodiment, the temperature compensation layer 607 is made of silicon dioxide.
在本实施例中，由于所述温度补偿层607与所述压电层604具有相反的温度频移特性，因此使的谐振装置的频率温度系数减小，趋向于0ppm/℃，从而提升谐振装置频率-温度的稳定性。In this embodiment, since the temperature compensation layer 607 and the piezoelectric layer 604 have opposite temperature frequency shift characteristics, the frequency temperature coefficient of the resonant device is reduced, tending to 0 ppm/℃, thereby improving the resonant device. Frequency-temperature stability.
请参考图52，形成调频层606，位于所述第二侧601b且位于所述温度补偿层607上，所述电极结构605在所述基底600上的投影位于所述调频层606在所述基底600上的投影范围内，所述压电层604和所述调频层606分别位于所述温度补偿层607两侧。Please refer to Figure 52, a frequency modulation layer 606 is formed, which is located on the second side 601b and on the temperature compensation layer 607, the projection of the electrode structure 605 on the substrate 600 is located within the projection range of the frequency modulation layer 606 on the substrate 600, and the piezoelectric layer 604 and the frequency modulation layer 606 are respectively located on both sides of the temperature compensation layer 607.
所述调频层606的材料包括金属或绝缘电介质；其中金属包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴或钛；绝缘电介质包括：氮化硅、氧化硅、氧化铝、碳化硅、碳氧化硅、氮化铝、砷化镓或氮化镓。The material of the frequency modulation layer 606 includes metal or insulating dielectric; the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt or titanium; the insulating dielectric includes: silicon nitride , silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
在本实施例中，所述调频层606的材料采用氮化硅。In this embodiment, the frequency modulation layer 606 is made of silicon nitride.
请参考图53，在形成所述调频层606之后，去除所述牺牲层608，在所述中间层601内形成空腔602，所述空腔602的开口位于所述第二侧601b，所述电极结构605位于所述空腔602内。 Please refer to Figure 53. After the frequency modulation layer 606 is formed, the sacrificial layer 608 is removed to form a cavity 602 in the middle layer 601. The opening of the cavity 602 is located at the second side 601b, and the electrode structure 605 is located in the cavity 602.
在本实施例中，由于所述电极结构605位于所述空腔602内，因此所述压电层604能够为形成的所述调频层606提供较为平坦的表面，减小所述调频层606薄膜的晶格缺陷，提升薄膜品质，进而使得所述调频层606对于器件的频率控制更加灵活且精准。另外，由于所述电极结构605位于所述空腔602内，可以有效防止器件在使用中，所述电极结构605被氧化或腐蚀的情况发生。In this embodiment, since the electrode structure 605 is located in the cavity 602, the piezoelectric layer 604 can provide a relatively flat surface for the formed frequency modulation layer 606, reducing the thin film of the frequency modulation layer 606. The lattice defects improve the film quality, thereby making the frequency modulation layer 606 more flexible and precise in controlling the frequency of the device. In addition, since the electrode structure 605 is located in the cavity 602, it can effectively prevent the electrode structure 605 from being oxidized or corroded during use of the device.
在本实施例中，去除所述牺牲层608的工艺采用湿法刻蚀工艺。In this embodiment, a wet etching process is used to remove the sacrificial layer 608 .
相应的，本发明实施例中还提供一种体声波谐振装置，请继续参考图53包括：基底600；中间层601，所述中间层601包括相对的第一侧601a和第二侧601b，所述基底600位于所述第一侧601a，所述中间层601包括空腔602，所述空腔602的开口位于所述第二侧601b；电极结构605，位于所述空腔602内；压电层604，位于所述第二侧601b且位于所述电极结构605上，所述压电层604至少覆盖所述空腔605；温度补偿层607，位于所述第二侧601b且位于所述压电层604上；调频层606，位于所述第二侧601b且位于所述压电层604上，所述电极结构605在所述基底600上的投影位于所述调频层606在所述基底600上的投影范围内，所述中间层601和所述调频层606分别位于所述压电层604的两侧，所述压电层604和所述调频层606分别位于所述温度补偿层607两侧。Correspondingly, the embodiment of the present invention also provides a bulk acoustic wave resonance device. Please continue to refer to FIG. 53 and includes: a substrate 600; an intermediate layer 601. The intermediate layer 601 includes an opposite first side 601a and a second side 601b, so The substrate 600 is located on the first side 601a, the intermediate layer 601 includes a cavity 602, and the opening of the cavity 602 is located on the second side 601b; an electrode structure 605 is located in the cavity 602; piezoelectric Layer 604 is located on the second side 601b and is located on the electrode structure 605. The piezoelectric layer 604 at least covers the cavity 605; a temperature compensation layer 607 is located on the second side 601b and is located on the piezoelectric layer 605. on the electrical layer 604; the frequency modulation layer 606 is located on the second side 601b and on the piezoelectric layer 604, and the projection of the electrode structure 605 on the substrate 600 is located on the substrate 600. Within the projection range on side.
在本实施例中，由于所述电极结构605位于所述空腔602内，因此所述压电层604能够为形成的所述调频层606提供较为平坦的表面，减小所述调频层606薄膜的晶格缺陷，提升薄膜品质，进而使得所述调频层606对于器件的频率控制更加灵活且精准。另外，由于所述电极结构605位于所述空腔602内，可以有效防止器件在使用中，所述电极结构605被氧化或腐蚀的情况发生。In this embodiment, since the electrode structure 605 is located in the cavity 602, the piezoelectric layer 604 can provide a relatively flat surface for the formed frequency modulation layer 606, reducing the thin film of the frequency modulation layer 606. The lattice defects improve the film quality, thereby making the frequency modulation layer 606 more flexible and precise in controlling the frequency of the device. In addition, since the electrode structure 605 is located in the cavity 602, it can effectively prevent the electrode structure 605 from being oxidized or corroded during use of the device.
所述基底600的材料包括：硅、碳化硅、二氧化硅、砷化镓、氮化镓、氧化铝、氧化镁、陶瓷或聚合物；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺。 The material of the substrate 600 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e., BCB), photosensitive epoxy photoresist (e.g., SU-8), polyimide.
在本实施例中，所述基底600的材料采用硅。In this embodiment, the material of the substrate 600 is silicon.
所述中间层601的材料包括：聚合物、绝缘电介质或多晶硅；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺；所述绝缘电介质包括：氮化铝、二氧化硅、氮化硅或氧化钛。The material of the intermediate layer 601 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
在本实施例中，所述中间层601的材料采用二氧化硅。In this embodiment, the material of the middle layer 601 is silicon dioxide.
所述压电层604的材料包括：氮化铝、氮化铝合金、氮化镓、氧化锌、钽酸锂、铌酸锂、锆钛酸铅或铌镁酸铅—钛酸铅。The material of the piezoelectric layer 604 includes: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
在本实施例中，所述压电层604的材料采用铌酸锂。In this embodiment, the piezoelectric layer 604 is made of lithium niobate.
在本实施例中，所述电极结构605包括：沿第一方向X平行排布的第一总线6051和第二总线6052，所述第一总线6051连接若干沿第二方向Y平行排布的第一电极条6053，所述第二总线6052连接若干沿所述第二方向Y平行排布的第二电极条6054，所述第一方向X与所述第二方向Y垂直，所述第一电极条6053和所述第二电极条6054交错放置。In this embodiment, the electrode structure 605 includes: a first bus 6051 and a second bus 6052 arranged in parallel along a first direction X, the first bus 6051 connects a plurality of first electrode strips 6053 arranged in parallel along a second direction Y, the second bus 6052 connects a plurality of second electrode strips 6054 arranged in parallel along the second direction Y, the first direction X is perpendicular to the second direction Y, and the first electrode strips 6053 and the second electrode strips 6054 are alternately arranged.
在本实施例中，所述第一电极条6053和所述第二电极条6054的宽度相等；所述第一电极条6053和所述第二电极条6054具有第一宽度尺寸d1，相邻的所述第一电极条6053的中轴和所述第二电极条6054的中轴具有第一中心尺寸d2，所述第一中心尺寸d2与所述第一宽度尺寸d1的比值范围为：1.2～20。In this embodiment, the widths of the first electrode strip 6053 and the second electrode strip 6054 are equal; the first electrode strip 6053 and the second electrode strip 6054 have a first width dimension d1, the central axis of the adjacent first electrode strip 6053 and the central axis of the second electrode strip 6054 have a first center dimension d2, and the ratio of the first center dimension d2 to the first width dimension d1 ranges from 1.2 to 20.
在本实施例中，所述第一电极条6053和所述第二电极条6054的厚度等于所述第一宽度尺寸d1；在其他实施例中，所述第一电极条和所述第二电极条的厚度还可以不等于所述第一宽度尺寸。In this embodiment, the thickness of the first electrode strip 6053 and the second electrode strip 6054 is equal to the first width dimension d1; in other embodiments, the first electrode strip and the second electrode strip The thickness of the strip may also be different than the first width dimension.
所述电极结构605的材料包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴和钛中的一种或多种。The material of the electrode structure 605 includes: one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
所述电极结构605为一层或多层。在本实施例中，所述电极结构 605为两层，所述电极结构605的材料为钼铝、钨铝或铂铝。The electrode structure 605 is one or more layers. In this embodiment, the electrode structure 605 is two layers, and the material of the electrode structure 605 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
所述调频层606的材料包括金属或绝缘电介质；其中金属包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴或钛；绝缘电介质包括：氮化硅、氧化硅、氧化铝、碳化硅、碳氧化硅、氮化铝、砷化镓或氮化镓。The material of the frequency modulation layer 606 includes metal or insulating dielectric; the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt or titanium; the insulating dielectric includes: silicon nitride , silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
在本实施例中，所述调频层606的材料采用氮化硅。In this embodiment, the frequency modulation layer 606 is made of silicon nitride.
所述温度补偿层607的材料包括：二氧化硅、碳氧化硅或氟氧化硅。在本实施例中，所述温度补偿层607的材料采用二氧化硅。The material of the temperature compensation layer 607 includes: silicon dioxide, silicon oxycarbide or silicon oxyfluoride. In this embodiment, the temperature compensation layer 607 is made of silicon dioxide.
在本实施例中，由于所述温度补偿层607与所述压电层604具有相反的温度频移特性，因此使的谐振装置的频率温度系数减小，趋向于0ppm/℃，从而提升谐振装置频率-温度的稳定性。In this embodiment, since the temperature compensation layer 607 and the piezoelectric layer 604 have opposite temperature frequency shift characteristics, the frequency temperature coefficient of the resonant device is reduced, tending to 0 ppm/℃, thereby improving the resonant device. Frequency-temperature stability.
图54至图65是本发明又一实施例中体声波谐振装置的形成方法各步骤结构示意图。54 to 65 are schematic structural diagrams of each step of a method for forming a bulk acoustic wave resonance device in another embodiment of the present invention.
请参考图54，提供牺牲基底703。Referring to Figure 54, a sacrificial substrate 703 is provided.
所述牺牲基底703的材料包括：硅、碳化硅、二氧化硅、砷化镓、氮化镓、氧化铝、氧化镁、陶瓷或聚合物；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺。The material of the sacrificial substrate 703 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e. , BCB), photosensitive epoxy resin photoresist (for example, SU-8), polyimide.
在本实施例中，所述牺牲基底703的材料采用硅。In this embodiment, the sacrificial substrate 703 is made of silicon.
请参考图55，在所述牺牲基底703上形成压电层704。Referring to FIG. 55 , a piezoelectric layer 704 is formed on the sacrificial substrate 703 .
所述压电层704的材料包括：氮化铝、氮化铝合金、氮化镓、氧化锌、钽酸锂、铌酸锂、锆钛酸铅或铌镁酸铅—钛酸铅。The material of the piezoelectric layer 704 includes: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
在本实施例中，所述压电层704的材料采用铌酸锂。In this embodiment, the piezoelectric layer 704 is made of lithium niobate.
请参考图56和图57，图57是图56中沿H-H线截面示意图，在所述压电层704上形成电极结构705。Please refer to FIG. 56 and FIG. 57 . FIG. 57 is a schematic cross-sectional view along line H-H in FIG. 56 . An electrode structure 705 is formed on the piezoelectric layer 704 .
在本实施例中，所述电极结构705包括：沿第一方向X平行排 布的第一总线7051和第二总线7052，所述第一总线7051连接若干沿第二方向Y平行排布的第一电极条7053，所述第二总线7052连接若干沿所述第二方向Y平行排布的第二电极条7054，所述第一方向X与所述第二方向Y垂直，所述第一电极条7053和所述第二电极条7054交错放置。In this embodiment, the electrode structure 705 includes: parallel rows along the first direction The first bus 7051 and the second bus 7052 are arranged. The first bus 7051 connects a plurality of first electrode strips 7053 arranged in parallel along the second direction Y. The second bus 7052 connects a plurality of first electrode strips 7053 arranged in parallel along the second direction Y. The second electrode strips 7054 are arranged in parallel, the first direction X is perpendicular to the second direction Y, and the first electrode strips 7053 and the second electrode strips 7054 are staggered.
在本实施例中，所述第一电极条7053和所述第二电极条7054的宽度相等；所述第一电极条7053和所述第二电极条7054具有第一宽度尺寸d1，相邻的所述第一电极条7053的中轴和所述第二电极条7054的中轴具有第一中心尺寸d2，所述第一中心尺寸d2与所述第一宽度尺寸d1的比值范围为：1.2～20。In this embodiment, the widths of the first electrode strip 7053 and the second electrode strip 7054 are equal; the first electrode strip 7053 and the second electrode strip 7054 have a first width dimension d1. The central axis of the first electrode strip 7053 and the central axis of the second electrode strip 7054 have a first central dimension d2, and the ratio range of the first central dimension d2 to the first width dimension d1 is: 1.2~ 20.
在本实施例中，所述第一电极条7053和所述第二电极条7054的厚度等于所述第一宽度尺寸d1；在其他实施例中，所述第一电极条和所述第二电极条的厚度还可以不等于所述第一宽度尺寸。In this embodiment, the thickness of the first electrode strip 7053 and the second electrode strip 7054 is equal to the first width dimension d1; in other embodiments, the first electrode strip and the second electrode strip 7054 have a thickness equal to the first width dimension d1. The thickness of the strip may also be different than the first width dimension.
所述电极结构705的材料包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴和钛中的一种或多种。The material of the electrode structure 705 includes: one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
所述电极结构705为一层或多层。在本实施例中，所述电极结构705为两层，所述电极结构705的材料为钼铝、钨铝或铂铝。The electrode structure 705 is one layer or multiple layers. In this embodiment, the electrode structure 705 is two layers, and the material of the electrode structure 705 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
请参考图58，图58和图57的视图方向一致，在所述压电层704上形成牺牲层709，所述牺牲层709至少覆盖所述电极结构705。Please refer to FIG. 58. The view directions of FIG. 58 and FIG. 57 are consistent. A sacrificial layer 709 is formed on the piezoelectric layer 704, and the sacrificial layer 709 at least covers the electrode structure 705.
所述牺牲层709的材料包括：聚合物、绝缘电介质或多晶硅；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺；所述绝缘电介质包括：氮化铝、二氧化硅、氮化硅或氧化钛。The material of the sacrificial layer 709 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
在本实施例中，所述牺牲层709的材料采用聚酰亚胺。In this embodiment, the sacrificial layer 709 is made of polyimide.
请参考图59，在所述压电层704上形成中间层701，所述中间层701至少覆盖所述牺牲层709，所述中间层701包括相对的第一侧701a和第二侧701b，所述压电层704和所述牺牲基底703位于所述第二 侧701b。Referring to Figure 59, an intermediate layer 701 is formed on the piezoelectric layer 704. The intermediate layer 701 at least covers the sacrificial layer 709. The intermediate layer 701 includes opposite first sides 701a and second sides 701b, so The piezoelectric layer 704 and the sacrificial substrate 703 are located on the second Side 701b.
所述中间层701的材料包括：聚合物、绝缘电介质或多晶硅；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺；所述绝缘电介质包括：氮化铝、二氧化硅、氮化硅或氧化钛。The material of the intermediate layer 701 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
在本实施例中，所述中间层701的材料采用二氧化硅。In this embodiment, the material of the intermediate layer 701 is silicon dioxide.
请参考图60，提供基底700。Referring to Figure 60, a substrate 700 is provided.
所述基底700的材料包括：硅、碳化硅、二氧化硅、砷化镓、氮化镓、氧化铝、氧化镁、陶瓷或聚合物；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺。The material of the substrate 700 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e., BCB), photosensitive epoxy photoresist (e.g., SU-8), polyimide.
在本实施例中，所述基底700的材料采用硅。In this embodiment, the material of the substrate 700 is silicon.
请参考图61，接合所述基底700和所述中间层701，所述基底700位于所述第一侧701a；在接合所述基底700和所述中间层701之后，去除所述牺牲基底703。Please refer to FIG. 61 , the substrate 700 and the intermediate layer 701 are bonded, and the substrate 700 is located on the first side 701a; after the substrate 700 and the intermediate layer 701 are bonded, the sacrificial substrate 703 is removed.
去除所述牺牲基底703的工艺包括：物理研磨工艺、湿法刻蚀工艺或干法刻蚀工艺。The process of removing the sacrificial substrate 703 includes: physical grinding process, wet etching process or dry etching process.
在本实施例中，去除所述牺牲基底703的工艺采用物理研磨工艺。In this embodiment, the process of removing the sacrificial substrate 703 adopts a physical grinding process.
在本实施例中，接合所述基底700和所述中间层701采用键合工艺；在其他实施例中，接合所述基底和所述中间层还可以采用粘合工艺。In this embodiment, a bonding process is used to join the substrate 700 and the intermediate layer 701; in other embodiments, an adhesion process may also be used to join the substrate and the intermediate layer.
请参考图62，形成温度补偿层708，位于所述第二侧701a且位于所述压电层704上。Referring to FIG. 62, a temperature compensation layer 708 is formed on the second side 701a and on the piezoelectric layer 704.
所述温度补偿层708的材料包括：二氧化硅、碳氧化硅或氟氧化硅。在本实施例中，所述温度补偿层708的材料采用二氧化硅。 The material of the temperature compensation layer 708 includes: silicon dioxide, silicon oxycarbide or silicon oxyfluoride. In this embodiment, the temperature compensation layer 708 is made of silicon dioxide.
在本实施例中，由于所述温度补偿层708与所述压电层704具有相反的温度频移特性，因此使的谐振装置的频率温度系数减小，趋向于0ppm/℃，从而提升谐振装置频率-温度的稳定性。In this embodiment, since the temperature compensation layer 708 and the piezoelectric layer 704 have opposite temperature frequency shift characteristics, the frequency temperature coefficient of the resonant device is reduced and tends to 0 ppm/°C, thereby improving the frequency-temperature stability of the resonant device.
请参考图63和图64，图64是图63中沿I-I线截面示意图，形成调频层706，位于所述第二侧701b且位于所述温度补偿层708上，所述压电层704和所述调频层706分别位于所述温度补偿层708两侧。Please refer to Figures 63 and 64. Figure 64 is a schematic cross-sectional view along line I-I in Figure 63. The frequency modulation layer 706 is formed, located on the second side 701b and on the temperature compensation layer 708. The piezoelectric layer 704 and the The frequency modulation layer 706 is located on both sides of the temperature compensation layer 708 respectively.
所述调频层706的材料包括金属或绝缘电介质；其中金属包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴或钛；绝缘电介质包括：氮化硅、氧化硅、氧化铝、碳化硅、碳氧化硅、氮化铝、砷化镓或氮化镓。The material of the frequency modulation layer 706 includes metal or insulating dielectric; the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt or titanium; the insulating dielectric includes: silicon nitride , silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
在本实施例中，所述调频层706的材料采用氮化硅。In this embodiment, the frequency modulation layer 706 is made of silicon nitride.
在本实施例中，所述调频层706包括凹槽707，所述电极结构705在所述基底700上的投影位于所述凹槽707在所述基底700上的投影范围内。通过增大或减小所述凹槽707的深度，可以调节所述谐振装置的谐振频率，使得所述调频层706对于器件频率的控制更加灵活精准。In this embodiment, the frequency modulation layer 706 includes a groove 707, and the projection of the electrode structure 705 on the substrate 700 is located within the projection range of the groove 707 on the substrate 700. By increasing or decreasing the depth of the groove 707, the resonant frequency of the resonant device can be adjusted, making the frequency modulation layer 706 more flexible and precise in controlling the device frequency.
所述凹槽707呈任意多边形。在本实施例中，所述凹槽707呈矩形。The groove 707 is in an arbitrary polygonal shape. In this embodiment, the groove 707 is rectangular.
请参考图65，图65和图64的视图方向一致，在形成所述调频层706之后，去除所述牺牲层709，在所述中间层701内形成空腔702，所述空腔702的开口位于所述第二侧701b，所述电极结构705位于所述空腔702内。Please refer to Figure 65. The views of Figure 65 and Figure 64 are in the same direction. After the frequency modulation layer 706 is formed, the sacrificial layer 709 is removed, and a cavity 702 is formed in the intermediate layer 701. The opening of the cavity 702 Located on the second side 701b, the electrode structure 705 is located in the cavity 702.
在本实施例中，由于所述电极结构705位于所述空腔702内，因此所述压电层704能够为形成的所述调频层706提供较为平坦的表面，减小所述调频层706薄膜的晶格缺陷，提升薄膜品质，进而使得所述调频层706对于器件的频率控制更加灵活且精准。另外，由于所 述电极结构705位于所述空腔702内，可以有效防止器件在使用中，所述电极结构705被氧化或腐蚀的情况发生。In this embodiment, since the electrode structure 705 is located in the cavity 702, the piezoelectric layer 704 can provide a relatively flat surface for the frequency modulation layer 706 formed, reducing the thin film of the frequency modulation layer 706. The lattice defects improve the film quality, thereby making the frequency modulation layer 706 more flexible and precise in controlling the frequency of the device. In addition, due to the The electrode structure 705 is located in the cavity 702, which can effectively prevent the electrode structure 705 from being oxidized or corroded during use of the device.
在本实施例中，去除所述牺牲层709的工艺采用湿法刻蚀工艺。In this embodiment, a wet etching process is used to remove the sacrificial layer 709 .
相应的，本发明实施例中还提供一种体声波谐振装置，请继续参考图65包括：基底700；中间层701，所述中间层701包括相对的第一侧701a和第二侧701b，所述基底700位于所述第一侧701a，所述中间层701包括空腔702，所述空腔702的开口位于所述第二侧701b；电极结构705，位于所述空腔702内；压电层704，位于所述第二侧701b且位于所述电极结构705上，所述压电层704至少覆盖所述空腔705；温度补偿层708，位于所述第二侧701b且位于所述压电层704上；调频层706，位于所述第二侧701b且位于所述压电层704上，所述中间层701和所述调频层706分别位于所述压电层704的两侧，所述压电层704和所述调频层706分别位于所述温度补偿层708两侧，所述调频层706包括凹槽707，所述电极结构705在所述基底700上的投影位于所述凹槽707在所述基底700上的投影范围内。Correspondingly, a BAW resonator is also provided in an embodiment of the present invention, and please continue to refer to FIG. 65, comprising: a substrate 700; an intermediate layer 701, wherein the intermediate layer 701 comprises a first side 701a and a second side 701b opposite to each other, wherein the substrate 700 is located on the first side 701a, and the intermediate layer 701 comprises a cavity 702, wherein the opening of the cavity 702 is located on the second side 701b; an electrode structure 705, which is located in the cavity 702; a piezoelectric layer 704, which is located on the second side 701b and on the electrode structure 705, wherein the piezoelectric layer 704 at least covers the A cavity 705; a temperature compensation layer 708, located on the second side 701b and on the piezoelectric layer 704; a frequency modulation layer 706, located on the second side 701b and on the piezoelectric layer 704, the intermediate layer 701 and the frequency modulation layer 706 are respectively located on both sides of the piezoelectric layer 704, the piezoelectric layer 704 and the frequency modulation layer 706 are respectively located on both sides of the temperature compensation layer 708, the frequency modulation layer 706 includes a groove 707, and the projection of the electrode structure 705 on the substrate 700 is located within the projection range of the groove 707 on the substrate 700.
在本实施例中，由于所述电极结构705位于所述空腔702内，因此所述压电层704能够为形成的所述调频层706提供较为平坦的表面，减小所述调频层706薄膜的晶格缺陷，提升薄膜品质，进而使得所述调频层706对于器件的频率控制更加灵活且精准。另外，由于所述电极结构705位于所述空腔702内，可以有效防止器件在使用中，所述电极结构705被氧化或腐蚀的情况发生。In this embodiment, since the electrode structure 705 is located in the cavity 702, the piezoelectric layer 704 can provide a relatively flat surface for the frequency modulation layer 706 formed, reducing the thin film of the frequency modulation layer 706. The lattice defects improve the film quality, thereby making the frequency modulation layer 706 more flexible and precise in controlling the frequency of the device. In addition, since the electrode structure 705 is located in the cavity 702, it can effectively prevent the electrode structure 705 from being oxidized or corroded during use of the device.
所述基底700的材料包括：硅、碳化硅、二氧化硅、砷化镓、氮化镓、氧化铝、氧化镁、陶瓷或聚合物；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺。The material of the substrate 700 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e., BCB), photosensitive epoxy photoresist (e.g., SU-8), polyimide.
在本实施例中，所述基底700的材料采用硅。In this embodiment, the material of the substrate 700 is silicon.
所述中间层701的材料包括：聚合物、绝缘电介质或多晶硅；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例 如，SU-8)、聚酰亚胺；所述绝缘电介质包括：氮化铝、二氧化硅、氮化硅或氧化钛。The material of the intermediate layer 701 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg For example, SU-8), polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
在本实施例中，所述中间层701的材料采用二氧化硅。In this embodiment, the material of the intermediate layer 701 is silicon dioxide.
所述压电层704的材料包括：氮化铝、氮化铝合金、氮化镓、氧化锌、钽酸锂、铌酸锂、锆钛酸铅或铌镁酸铅—钛酸铅。The material of the piezoelectric layer 704 includes: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
在本实施例中，所述压电层704的材料采用铌酸锂。In this embodiment, the piezoelectric layer 704 is made of lithium niobate.
在在本实施例中，所述电极结构705包括：沿第一方向X平行排布的第一总线7051和第二总线7052，所述第一总线7051连接若干沿第二方向Y平行排布的第一电极条7053，所述第二总线7052连接若干沿所述第二方向Y平行排布的第二电极条7054，所述第一方向X与所述第二方向Y垂直，所述第一电极条7053和所述第二电极条7054交错放置。In this embodiment, the electrode structure 705 includes: a first bus 7051 and a second bus 7052 arranged in parallel along the first direction X. The first bus 7051 connects several parallel arranged along the second direction Y. The first electrode strip 7053, the second bus 7052 connects a plurality of second electrode strips 7054 arranged in parallel along the second direction Y, the first direction X is perpendicular to the second direction Y, the first The electrode strips 7053 and the second electrode strips 7054 are alternately placed.
在本实施例中，所述第一电极条7053和所述第二电极条7054的宽度相等；所述第一电极条7053和所述第二电极条7054具有第一宽度尺寸d1，相邻的所述第一电极条7053的中轴和所述第二电极条7054的中轴具有第一中心尺寸d2，所述第一中心尺寸d2与所述第一宽度尺寸d1的比值范围为：1.2～20。In this embodiment, the widths of the first electrode strip 7053 and the second electrode strip 7054 are equal; the first electrode strip 7053 and the second electrode strip 7054 have a first width dimension d1, the central axis of the adjacent first electrode strip 7053 and the central axis of the second electrode strip 7054 have a first center dimension d2, and the ratio of the first center dimension d2 to the first width dimension d1 ranges from 1.2 to 20.
在本实施例中，所述第一电极条7053和所述第二电极条7054的厚度等于所述第一宽度尺寸d1；在其他实施例中，所述第一电极条和所述第二电极条的厚度还可以不等于所述第一宽度尺寸。In this embodiment, the thickness of the first electrode strip 7053 and the second electrode strip 7054 is equal to the first width dimension d1; in other embodiments, the first electrode strip and the second electrode strip 7054 have a thickness equal to the first width dimension d1. The thickness of the strip may also be different than the first width dimension.
所述电极结构705的材料包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴和钛中的一种或多种。The material of the electrode structure 705 includes: one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
所述电极结构705为一层或多层。在本实施例中，所述电极结构705为两层，所述电极结构705的材料为钼铝、钨铝或铂铝。The electrode structure 705 is one or more layers. In this embodiment, the electrode structure 705 has two layers, and the material of the electrode structure 705 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
所述调频层706的材料包括金属或绝缘电介质；其中金属包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴或钛；绝缘电介 质包括：氮化硅、氧化硅、氧化铝、碳化硅、碳氧化硅、氮化铝、砷化镓或氮化镓。The material of the frequency modulation layer 706 includes metal or insulating dielectric; where the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt or titanium; insulating dielectric Materials include: silicon nitride, silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
在本实施例中，所述调频层706的材料采用氮化硅。In this embodiment, the frequency modulation layer 706 is made of silicon nitride.
在本实施例中，通过增大或减小所述凹槽707的深度，可以调节所述谐振装置的谐振频率，使得所述调频层706对于器件频率的控制更加灵活精准。In this embodiment, the resonant frequency of the resonant device can be adjusted by increasing or decreasing the depth of the groove 707 , so that the frequency modulation layer 706 can control the device frequency more flexibly and accurately.
所述凹槽707呈任意多边形。在本实施例中，所述凹槽707呈矩形。The groove 707 is in an arbitrary polygonal shape. In this embodiment, the groove 707 is rectangular.
所述温度补偿层708的材料包括：二氧化硅、碳氧化硅或氟氧化硅。在本实施例中，所述温度补偿层708的材料采用二氧化硅。The material of the temperature compensation layer 708 includes: silicon dioxide, silicon oxycarbide or silicon oxyfluoride. In this embodiment, the temperature compensation layer 708 is made of silicon dioxide.
在本实施例中，由于所述温度补偿层708与所述压电层704具有相反的温度频移特性，因此使的谐振装置的频率温度系数减小，趋向于0ppm/℃，从而提升谐振装置频率-温度的稳定性。In this embodiment, since the temperature compensation layer 708 and the piezoelectric layer 704 have opposite temperature frequency shift characteristics, the frequency temperature coefficient of the resonant device is reduced, tending to 0 ppm/℃, thereby improving the resonant device. Frequency-temperature stability.
图66至图77是本发明又一实施例中体声波谐振装置的形成方法各步骤结构示意图。66 to 77 are schematic structural diagrams of each step of a method for forming a bulk acoustic wave resonance device in another embodiment of the present invention.
请参考图66，提供牺牲基底803。Please refer to FIG. 66 , a sacrificial substrate 803 is provided.
所述牺牲基底803的材料包括：硅、碳化硅、二氧化硅、砷化镓、氮化镓、氧化铝、氧化镁、陶瓷或聚合物；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺。The material of the sacrificial substrate 803 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e. , BCB), photosensitive epoxy resin photoresist (for example, SU-8), polyimide.
在本实施例中，所述牺牲基底803的材料采用硅。In this embodiment, the sacrificial substrate 803 is made of silicon.
请参考图67，在所述牺牲基底803上形成压电层804。Referring to FIG. 67 , a piezoelectric layer 804 is formed on the sacrificial substrate 803 .
所述压电层804的材料包括：氮化铝、氮化铝合金、氮化镓、氧化锌、钽酸锂、铌酸锂、锆钛酸铅或铌镁酸铅—钛酸铅。The material of the piezoelectric layer 804 includes: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
在本实施例中，所述压电层804的材料采用铌酸锂。In this embodiment, the piezoelectric layer 804 is made of lithium niobate.
请参考图68和图69，图69是图68中沿J-J线截面示意图，在 所述压电层804上形成电极结构805。Please refer to Figure 68 and Figure 69. Figure 69 is a schematic cross-sectional view along line JJ in Figure 68. An electrode structure 805 is formed on the piezoelectric layer 804 .
在本实施例中，所述电极结构805包括：沿第一方向X平行排布的第一总线8051和第二总线8052，所述第一总线8051连接若干沿第二方向Y平行排布的第一电极条8053，所述第二总线8052连接若干沿所述第二方向Y平行排布的第二电极条8054，所述第一方向X与所述第二方向Y垂直，所述第一电极条8053和所述第二电极条8054交错放置。In this embodiment, the electrode structure 805 includes: a first bus 8051 and a second bus 8052 arranged in parallel along a first direction X, the first bus 8051 connects a plurality of first electrode strips 8053 arranged in parallel along a second direction Y, the second bus 8052 connects a plurality of second electrode strips 8054 arranged in parallel along the second direction Y, the first direction X is perpendicular to the second direction Y, and the first electrode strips 8053 and the second electrode strips 8054 are alternately arranged.
在本实施例中，所述第一电极条8053和所述第二电极条8054的宽度相等；所述第一电极条8053和所述第二电极条8054具有第一宽度尺寸d1，相邻的所述第一电极条8053的中轴和所述第二电极条8054的中轴具有第一中心尺寸d2，所述第一中心尺寸d2与所述第一宽度尺寸d1的比值范围为：1.2～20。In this embodiment, the widths of the first electrode strip 8053 and the second electrode strip 8054 are equal; the first electrode strip 8053 and the second electrode strip 8054 have a first width dimension d1. The central axis of the first electrode strip 8053 and the central axis of the second electrode strip 8054 have a first central dimension d2, and the ratio range of the first central dimension d2 to the first width dimension d1 is: 1.2~ 20.
在本实施例中，所述第一电极条8053和所述第二电极条8054的厚度等于所述第一宽度尺寸d1；在其他实施例中，所述第一电极条和所述第二电极条的厚度还可以不等于所述第一宽度尺寸。In this embodiment, the thickness of the first electrode strip 8053 and the second electrode strip 8054 is equal to the first width dimension d1; in other embodiments, the first electrode strip and the second electrode strip The thickness of the strip may also be different than the first width dimension.
所述电极结构805的材料包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴和钛中的一种或多种。The material of the electrode structure 805 includes: one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
所述电极结构805为一层或多层。在本实施例中，所述电极结构805为两层，所述电极结构805的材料为钼铝、钨铝或铂铝。The electrode structure 805 is one or more layers. In this embodiment, the electrode structure 805 has two layers, and the material of the electrode structure 805 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
请参考图70，图70和图69的视图方向一致，在所述压电层804上形成牺牲层809，所述牺牲层809至少覆盖所述电极结构805。Please refer to FIG. 70 . The view directions of FIG. 70 and FIG. 69 are consistent. A sacrificial layer 809 is formed on the piezoelectric layer 804 , and the sacrificial layer 809 at least covers the electrode structure 805 .
所述牺牲层809的材料包括：聚合物、绝缘电介质或多晶硅；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺；所述绝缘电介质包括：氮化铝、二氧化硅、氮化硅或氧化钛。The material of the sacrificial layer 809 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
在本实施例中，所述牺牲层809的材料采用聚酰亚胺。 In this embodiment, the sacrificial layer 809 is made of polyimide.
请参考图71，在所述压电层804上形成中间层801，所述中间层801至少覆盖所述牺牲层809，所述中间层801包括相对的第一侧801a和第二侧801b，所述压电层804和所述牺牲基底803位于所述第二侧801b。Referring to Figure 71, an intermediate layer 801 is formed on the piezoelectric layer 804. The intermediate layer 801 at least covers the sacrificial layer 809. The intermediate layer 801 includes opposite first sides 801a and second sides 801b, so The piezoelectric layer 804 and the sacrificial substrate 803 are located on the second side 801b.
所述中间层801的材料包括：聚合物、绝缘电介质或多晶硅；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺；所述绝缘电介质包括：氮化铝、二氧化硅、氮化硅或氧化钛。The material of the intermediate layer 801 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
在本实施例中，所述中间层801的材料采用二氧化硅。In this embodiment, the material of the middle layer 801 is silicon dioxide.
请参考图72，提供基底800。Referring to Figure 72, a substrate 800 is provided.
所述基底800的材料包括：硅、碳化硅、二氧化硅、砷化镓、氮化镓、氧化铝、氧化镁、陶瓷或聚合物；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺。The material of the substrate 800 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e., BCB), photosensitive epoxy photoresist (e.g., SU-8), polyimide.
在本实施例中，所述基底800的材料采用硅。In this embodiment, the material of the substrate 800 is silicon.
请参考图73，接合所述基底800和所述中间层801，所述基底800位于所述第一侧801a；在接合所述基底800和所述中间层801之后，去除所述牺牲基底803。Referring to FIG. 73, the substrate 800 and the intermediate layer 801 are bonded, and the substrate 800 is located on the first side 801a; after the substrate 800 and the intermediate layer 801 are bonded, the sacrificial substrate 803 is removed.
去除所述牺牲基底803的工艺包括：物理研磨工艺、湿法刻蚀工艺或干法刻蚀工艺。The process of removing the sacrificial substrate 803 includes: physical grinding process, wet etching process or dry etching process.
在本实施例中，去除所述牺牲基底803的工艺采用物理研磨工艺。In this embodiment, the process of removing the sacrificial substrate 803 adopts a physical grinding process.
在本实施例中，接合所述基底800和所述中间层801采用键合工艺；在其他实施例中，接合所述基底和所述中间层还可以采用粘合工艺。In this embodiment, a bonding process is used to join the substrate 800 and the intermediate layer 801; in other embodiments, an adhesion process may also be used to join the substrate and the intermediate layer.
请参考图74，形成温度补偿层808，位于所述第二侧801b且位于所述压电层804上。 Referring to FIG. 74 , a temperature compensation layer 808 is formed on the second side 801 b and on the piezoelectric layer 804 .
所述温度补偿层808的材料包括：二氧化硅、碳氧化硅或氟氧化硅。在本实施例中，所述温度补偿层808的材料采用二氧化硅。The material of the temperature compensation layer 808 includes: silicon dioxide, silicon oxycarbide or silicon oxyfluoride. In this embodiment, the temperature compensation layer 808 is made of silicon dioxide.
在本实施例中，由于所述温度补偿层808与所述压电层804具有相反的温度频移特性，因此使的谐振装置的频率温度系数减小，趋向于0ppm/℃，从而提升谐振装置频率-温度的稳定性。In this embodiment, since the temperature compensation layer 808 and the piezoelectric layer 804 have opposite temperature frequency shift characteristics, the frequency temperature coefficient of the resonant device is reduced, tending to 0 ppm/℃, thereby improving the resonant device. Frequency-temperature stability.
请参考图75和图76，图76是图75中沿K-K线截面示意图，形成调频层806，位于所述第二侧801b且位于所述压电层804上，所述中间层801和所述调频层806分别位于所述压电层804的两侧，所述电极结构805和所述调频层806分别位于所述压电层804的两侧。Please refer to Figures 75 and 76. Figure 76 is a schematic cross-sectional diagram along the K-K line in Figure 75, forming a frequency modulation layer 806, which is located on the second side 801b and on the piezoelectric layer 804. The intermediate layer 801 and the frequency modulation layer 806 are respectively located on both sides of the piezoelectric layer 804, and the electrode structure 805 and the frequency modulation layer 806 are respectively located on both sides of the piezoelectric layer 804.
所述调频层806的材料包括金属或绝缘电介质；其中金属包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴或钛；绝缘电介质包括：氮化硅、氧化硅、氧化铝、碳化硅、碳氧化硅、氮化铝、砷化镓或氮化镓。The material of the frequency modulation layer 806 includes metal or insulating dielectric; the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt or titanium; the insulating dielectric includes: silicon nitride , silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
在本实施例中，所述调频层806的材料采用氮化硅。In this embodiment, the frequency modulation layer 806 is made of silicon nitride.
在本实施例中，所述调频层806的调频区域S包括多个凹槽807，所述电极结构805在所述基底800上的投影位于所述调频区域S在所述基底800上的投影范围内。通过增大或减小所述凹槽807的深度，可以调节所述谐振装置的谐振频率，使得所述调频层806对于器件频率的控制更加灵活精准。In this embodiment, the frequency modulation area S of the frequency modulation layer 806 includes a plurality of grooves 807, and the projection of the electrode structure 805 on the substrate 800 is located in the projection range of the frequency modulation area S on the substrate 800. Inside. By increasing or decreasing the depth of the groove 807, the resonant frequency of the resonant device can be adjusted, making the frequency modulation layer 806 more flexible and precise in controlling the device frequency.
在本实施例中，多个所述凹槽807在所述调频区域内均匀分布。In this embodiment, a plurality of grooves 807 are evenly distributed within the frequency modulation area.
多个所述凹槽807的分布可以为任意多边形或环形，单个所述凹槽807呈任意多边形或圆形。在本实施例中，多个所述凹槽807呈矩形分布，且单个所述凹槽807也呈矩形。The distribution of multiple grooves 807 can be in any polygonal or circular shape, and a single groove 807 can be in any polygonal or circular shape. In this embodiment, a plurality of the grooves 807 are distributed in a rectangular shape, and a single groove 807 is also in a rectangular shape.
请参考图77，图77和图76的视图方向一致，在形成所述调频层806之后，去除所述牺牲层809，在所述中间层801内形成空腔802，所述空腔802的开口位于所述第二侧801b，所述电极结构805位于所述空腔802内。 Please refer to Figure 77. The views in Figure 77 and Figure 76 are in the same direction. After the frequency modulation layer 806 is formed, the sacrificial layer 809 is removed, and a cavity 802 is formed in the intermediate layer 801. The opening of the cavity 802 Located on the second side 801b, the electrode structure 805 is located in the cavity 802.
在本实施例中，由于所述电极结构805位于所述空腔802内，因此所述压电层804能够为形成的所述调频层806提供较为平坦的表面，减小所述调频层806薄膜的晶格缺陷，提升薄膜品质，进而使得所述调频层806对于器件的频率控制更加灵活且精准。另外，由于所述电极结构805位于所述空腔802内，可以有效防止器件在使用中，所述电极结构805被氧化或腐蚀的情况发生。In this embodiment, since the electrode structure 805 is located in the cavity 802, the piezoelectric layer 804 can provide a relatively flat surface for the formed frequency modulation layer 806, reducing the thin film of the frequency modulation layer 806. The lattice defects improve the film quality, thereby making the frequency modulation layer 806 more flexible and precise in controlling the frequency of the device. In addition, since the electrode structure 805 is located in the cavity 802, it can effectively prevent the electrode structure 805 from being oxidized or corroded during use of the device.
在本实施例中，去除所述牺牲层809的工艺采用湿法刻蚀工艺。In this embodiment, a wet etching process is used to remove the sacrificial layer 809 .
相应的，本发明实施例中还提供一种体声波谐振装置，请继续参考图77包括：基底800；中间层801，所述中间层801包括相对的第一侧801a和第二侧801b，所述基底800位于所述第一侧801a，所述中间层801包括空腔802，所述空腔802的开口位于所述第二侧801b；电极结构805，位于所述空腔802内；压电层804，位于所述第二侧801b且位于所述电极结构805上，所述压电层804至少覆盖所述空腔802；温度补偿层808，位于所述第二侧801b且位于所述压电层804上；调频层806，位于所述第二侧801b且位于所述压电层804上，所述中间层801和所述调频层806分别位于所述压电层804的两侧，所述压电层804和所述调频层806分别位于所述温度补偿层808两侧，所述调频层806的调频区域S包括多个凹槽807，所述电极结构805在所述基底800上的投影位于所述调频区域S在所述基底800上的投影范围内。Correspondingly, a BAW resonator is also provided in an embodiment of the present invention, which includes: a substrate 800; an intermediate layer 801, wherein the intermediate layer 801 includes a first side 801a and a second side 801b opposite to each other, wherein the substrate 800 is located on the first side 801a, and the intermediate layer 801 includes a cavity 802, wherein an opening of the cavity 802 is located on the second side 801b; an electrode structure 805, which is located in the cavity 802; a piezoelectric layer 804, which is located on the second side 801b and on the electrode structure 805, wherein the piezoelectric layer 804 at least covers the cavity 80 2; a temperature compensation layer 808, located on the second side 801b and on the piezoelectric layer 804; a frequency modulation layer 806, located on the second side 801b and on the piezoelectric layer 804, the intermediate layer 801 and the frequency modulation layer 806 are respectively located on both sides of the piezoelectric layer 804, the piezoelectric layer 804 and the frequency modulation layer 806 are respectively located on both sides of the temperature compensation layer 808, the frequency modulation region S of the frequency modulation layer 806 includes a plurality of grooves 807, and the projection of the electrode structure 805 on the substrate 800 is located within the projection range of the frequency modulation region S on the substrate 800.
在本实施例中，由于所述电极结构805位于所述空腔802内，因此所述压电层804能够为形成的所述调频层806提供较为平坦的表面，减小所述调频层806薄膜的晶格缺陷，提升薄膜品质，进而使得所述调频层806对于器件的频率控制更加灵活且精准。另外，由于所述电极结构805位于所述空腔802内，可以有效防止器件在使用中，所述电极结构805被氧化或腐蚀的情况发生。In this embodiment, since the electrode structure 805 is located in the cavity 802, the piezoelectric layer 804 can provide a relatively flat surface for the frequency modulation layer 806 formed, reducing the thin film of the frequency modulation layer 806. The lattice defects improve the film quality, thereby making the frequency modulation layer 806 more flexible and precise in controlling the frequency of the device. In addition, since the electrode structure 805 is located in the cavity 802, it can effectively prevent the electrode structure 805 from being oxidized or corroded during use of the device.
所述基底800的材料包括：硅、碳化硅、二氧化硅、砷化镓、氮化镓、氧化铝、氧化镁、陶瓷或聚合物；所述聚合物包括：苯并环丁 烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺。The material of the substrate 800 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclotine vinyl (i.e., BCB), photosensitive epoxy photoresist (e.g., SU-8), polyimide.
在本实施例中，所述基底800的材料采用硅。In this embodiment, the material of the substrate 800 is silicon.
所述中间层801的材料包括：聚合物、绝缘电介质或多晶硅；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺；所述绝缘电介质包括：氮化铝、二氧化硅、氮化硅或氧化钛。The material of the intermediate layer 801 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
在本实施例中，所述中间层801的材料采用二氧化硅。In this embodiment, the material of the middle layer 801 is silicon dioxide.
所述压电层804的材料包括：氮化铝、氮化铝合金、氮化镓、氧化锌、钽酸锂、铌酸锂、锆钛酸铅或铌镁酸铅—钛酸铅。The material of the piezoelectric layer 804 includes: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
在本实施例中，所述压电层804的材料采用铌酸锂。In this embodiment, the piezoelectric layer 804 is made of lithium niobate.
在本实施例中，所述电极结构805包括：沿第一方向X平行排布的第一总线8051和第二总线8052，所述第一总线8051连接若干沿第二方向Y平行排布的第一电极条8053，所述第二总线8052连接若干沿所述第二方向Y平行排布的第二电极条8054，所述第一方向X与所述第二方向Y垂直，所述第一电极条8053和所述第二电极条8054交错放置。In this embodiment, the electrode structure 805 includes: a first bus line 8051 and a second bus line 8052 arranged in parallel along the first direction An electrode strip 8053. The second bus 8052 connects a plurality of second electrode strips 8054 arranged in parallel along the second direction Y. The first direction X is perpendicular to the second direction Y. The first electrode The strips 8053 and the second electrode strips 8054 are alternately placed.
在本实施例中，所述第一电极条8053和所述第二电极条8054的宽度相等；所述第一电极条8053和所述第二电极条8054具有第一宽度尺寸d1，相邻的所述第一电极条8053的中轴和所述第二电极条8054的中轴具有第一中心尺寸d2，所述第一中心尺寸d2与所述第一宽度尺寸d1的比值范围为：1.2～20。In this embodiment, the widths of the first electrode strip 8053 and the second electrode strip 8054 are equal; the first electrode strip 8053 and the second electrode strip 8054 have a first width dimension d1. The central axis of the first electrode strip 8053 and the central axis of the second electrode strip 8054 have a first central dimension d2, and the ratio range of the first central dimension d2 to the first width dimension d1 is: 1.2~ 20.
在本实施例中，所述第一电极条8053和所述第二电极条8054的厚度等于所述第一宽度尺寸d1；在其他实施例中，所述第一电极条和所述第二电极条的厚度还可以不等于所述第一宽度尺寸。In this embodiment, the thickness of the first electrode strip 8053 and the second electrode strip 8054 is equal to the first width dimension d1; in other embodiments, the first electrode strip and the second electrode strip The thickness of the strip may also be different than the first width dimension.
所述电极结构805的材料包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴和钛中的一种或多种。 The material of the electrode structure 805 includes: one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
所述电极结构805为一层或多层。在本实施例中，所述电极结构805为两层，所述电极结构805的材料为钼铝、钨铝或铂铝。The electrode structure 805 is one or more layers. In this embodiment, the electrode structure 805 has two layers, and the material of the electrode structure 805 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
所述调频层806的材料包括金属或绝缘电介质；其中金属包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴或钛；绝缘电介质包括：氮化硅、氧化硅、氧化铝、碳化硅、碳氧化硅、氮化铝、砷化镓或氮化镓。The material of the frequency modulation layer 806 includes metal or insulating dielectric; the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt or titanium; the insulating dielectric includes: silicon nitride, silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
在本实施例中，所述调频层806的材料采用氮化硅。In this embodiment, the frequency modulation layer 806 is made of silicon nitride.
在本实施例中，通过增大或减小所述凹槽807的深度，可以调节所述谐振装置的谐振频率，使得所述调频层806对于器件频率的控制更加灵活精准。In this embodiment, by increasing or decreasing the depth of the groove 807, the resonant frequency of the resonant device can be adjusted, so that the frequency modulation layer 806 can control the device frequency more flexibly and accurately.
在本实施例中，多个所述凹槽807在所述调频区域内均匀分布。In this embodiment, a plurality of grooves 807 are evenly distributed within the frequency modulation area.
多个所述凹槽807的分布可以为任意多边形或环形，单个所述凹槽807呈任意多边形或圆形。在本实施例中，多个所述凹槽807呈矩形分布，且单个所述凹槽807也呈矩形。The distribution of multiple grooves 807 can be in any polygonal or circular shape, and a single groove 807 can be in any polygonal or circular shape. In this embodiment, a plurality of the grooves 807 are distributed in a rectangular shape, and a single groove 807 is also in a rectangular shape.
所述温度补偿层808的材料包括：二氧化硅、碳氧化硅或氟氧化硅。在本实施例中，所述温度补偿层808的材料采用二氧化硅。The material of the temperature compensation layer 808 includes: silicon dioxide, silicon oxycarbide or silicon oxyfluoride. In this embodiment, the temperature compensation layer 808 is made of silicon dioxide.
在本实施例中，由于所述温度补偿层808与所述压电层804具有相反的温度频移特性，因此使的谐振装置的频率温度系数减小，趋向于0ppm/℃，从而提升谐振装置频率-温度的稳定性。In this embodiment, since the temperature compensation layer 808 and the piezoelectric layer 804 have opposite temperature frequency shift characteristics, the frequency temperature coefficient of the resonant device is reduced, tending to 0 ppm/℃, thereby improving the resonant device. Frequency-temperature stability.
图78至图88是本发明又一实施例中体声波谐振装置的形成方法各步骤结构示意图。78 to 88 are schematic structural diagrams of each step of a method for forming a bulk acoustic wave resonance device in another embodiment of the present invention.
请参考图78，提供牺牲基底903。Referring to Figure 78, a sacrificial substrate 903 is provided.
所述牺牲基底903的材料包括：硅、碳化硅、二氧化硅、砷化镓、氮化镓、氧化铝、氧化镁、陶瓷或聚合物；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺。 The material of the sacrificial substrate 903 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e. , BCB), photosensitive epoxy resin photoresist (for example, SU-8), polyimide.
在本实施例中，所述牺牲基底903的材料采用硅。In this embodiment, the sacrificial substrate 903 is made of silicon.
请参考图79，在所述牺牲基底903上形成压电层904。Referring to FIG. 79 , a piezoelectric layer 904 is formed on the sacrificial substrate 903 .
所述压电层904的材料包括：氮化铝、氮化铝合金、氮化镓、氧化锌、钽酸锂、铌酸锂、锆钛酸铅或铌镁酸铅—钛酸铅。The material of the piezoelectric layer 904 includes: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
在本实施例中，所述压电层904的材料采用铌酸锂。In this embodiment, the piezoelectric layer 904 is made of lithium niobate.
请参考图80和图81，图81是图80中沿L-L线截面示意图，在所述压电层904上形成电极结构905。Please refer to FIG. 80 and FIG. 81 . FIG. 81 is a schematic cross-sectional view along line L-L in FIG. 80 . An electrode structure 905 is formed on the piezoelectric layer 904 .
在本实施例中，所述电极结构905包括：沿第一方向X平行排布的第一总线9051和第二总线9052，所述第一总线9051连接若干沿第二方向Y平行排布的第一电极条9053，所述第二总线9052连接若干沿所述第二方向Y平行排布的第二电极条9054，所述第一方向X与所述第二方向Y垂直，所述第一电极条9053和所述第二电极条9054交错放置。In this embodiment, the electrode structure 905 includes: a first bus 9051 and a second bus 9052 arranged in parallel along the first direction An electrode strip 9053. The second bus 9052 connects a plurality of second electrode strips 9054 arranged in parallel along the second direction Y. The first direction X is perpendicular to the second direction Y. The first electrode The strips 9053 and the second electrode strips 9054 are alternately placed.
在本实施例中，所述第一电极条9053和所述第二电极条9054的宽度相等；所述第一电极条9053和所述第二电极条9054具有第一宽度尺寸d1，相邻的所述第一电极条9053的中轴和所述第二电极条9054的中轴具有第一中心尺寸d2，所述第一中心尺寸d2与所述第一宽度尺寸d1的比值范围为：1.2～20。In this embodiment, the widths of the first electrode strip 9053 and the second electrode strip 9054 are equal; the first electrode strip 9053 and the second electrode strip 9054 have a first width dimension d1, the central axis of the adjacent first electrode strip 9053 and the central axis of the second electrode strip 9054 have a first center dimension d2, and the ratio of the first center dimension d2 to the first width dimension d1 ranges from 1.2 to 20.
在本实施例中，所述第一电极条9053和所述第二电极条9054的厚度等于所述第一宽度尺寸d1；在其他实施例中，所述第一电极条和所述第二电极条的厚度还可以不等于所述第一宽度尺寸。In this embodiment, the thickness of the first electrode strip 9053 and the second electrode strip 9054 is equal to the first width dimension d1; in other embodiments, the thickness of the first electrode strip and the second electrode strip may not be equal to the first width dimension.
所述电极结构905的材料包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴和钛中的一种或多种。The material of the electrode structure 905 includes: one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
所述电极结构905为一层或多层。在本实施例中，所述电极结构905为两层，所述电极结构905的材料为钼铝、钨铝或铂铝。The electrode structure 905 is one or more layers. In this embodiment, the electrode structure 905 is two layers, and the material of the electrode structure 905 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
请参考图82，图82和图81的视图方向一致，形成温度补偿层 907，位于所述压电层904上且至少覆盖所述电极结构905。Please refer to Figure 82. The views of Figure 82 and Figure 81 are in the same direction to form a temperature compensation layer. 907, located on the piezoelectric layer 904 and at least covering the electrode structure 905.
所述温度补偿层907的材料包括：二氧化硅、碳氧化硅或氟氧化硅。在本实施例中，所述温度补偿层907的材料采用二氧化硅。The material of the temperature compensation layer 907 includes: silicon dioxide, silicon oxycarbide or silicon oxyfluoride. In this embodiment, the temperature compensation layer 907 is made of silicon dioxide.
在本实施例中，由于所述温度补偿层907与所述压电层904具有相反的温度频移特性，因此使的谐振装置的频率温度系数减小，趋向于0ppm/℃，从而提升谐振装置频率-温度的稳定性。In this embodiment, since the temperature compensation layer 907 and the piezoelectric layer 904 have opposite temperature frequency shift characteristics, the frequency temperature coefficient of the resonant device is reduced, tending to 0 ppm/℃, thereby improving the resonant device. Frequency-temperature stability.
在本实施例中，所述温度补偿层907覆盖部分所述压电层904；在其他实施例中，所述温度补偿层还可以完全覆盖所述压电层。In this embodiment, the temperature compensation layer 907 covers part of the piezoelectric layer 904; in other embodiments, the temperature compensation layer can also completely cover the piezoelectric layer.
请参考图83，在所述压电层904上形成牺牲层908，所述牺牲层908至少覆盖所述温度补偿层907。Referring to FIG. 83 , a sacrificial layer 908 is formed on the piezoelectric layer 904 , and the sacrificial layer 908 at least covers the temperature compensation layer 907 .
所述牺牲层908的材料包括：聚合物、绝缘电介质或多晶硅；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺；所述绝缘电介质包括：氮化铝、二氧化硅、氮化硅或氧化钛。The material of the sacrificial layer 908 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
在本实施例中，所述牺牲层908的材料采用聚酰亚胺。In this embodiment, the sacrificial layer 908 is made of polyimide.
在本实施例中，由于所述温度补偿层907覆盖部分所述压电层904，因此形成所述牺牲层908也会覆盖部分所述压电层904；在其他实施例中，当所述温度补偿层完全覆盖所述压电层时，所述牺牲层则不与压电层接触。In this embodiment, since the temperature compensation layer 907 covers part of the piezoelectric layer 904, forming the sacrificial layer 908 will also cover part of the piezoelectric layer 904; in other embodiments, when the temperature When the compensation layer completely covers the piezoelectric layer, the sacrificial layer does not contact the piezoelectric layer.
请参考图84，在所述压电层904上形成中间层901，所述中间层901至少覆盖所述牺牲层908，所述中间层901包括相对的第一侧901a和第二侧901b，所述压电层904和所述牺牲基底903位于所述第二侧901b。Referring to Figure 84, an intermediate layer 901 is formed on the piezoelectric layer 904. The intermediate layer 901 at least covers the sacrificial layer 908. The intermediate layer 901 includes opposite first sides 901a and second sides 901b, so The piezoelectric layer 904 and the sacrificial substrate 903 are located on the second side 901b.
所述中间层901的材料包括：聚合物、绝缘电介质或多晶硅；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺；所述绝缘电介质包括：氮化铝、二氧化硅、 氮化硅或氧化钛。The material of the intermediate layer 901 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, Silicon nitride or titanium oxide.
在本实施例中，所述中间层901的材料采用二氧化硅。In this embodiment, the material of the intermediate layer 901 is silicon dioxide.
请参考图85，提供基底900。Referring to Figure 85, a substrate 900 is provided.
所述基底900的材料包括：硅、碳化硅、二氧化硅、砷化镓、氮化镓、氧化铝、氧化镁、陶瓷或聚合物；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺。The material of the substrate 900 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e., BCB), photosensitive epoxy photoresist (e.g., SU-8), polyimide.
在本实施例中，所述基底900的材料采用硅。In this embodiment, the material of the substrate 900 is silicon.
请参考图86，接合所述基底900和所述中间层901，所述基底900位于所述第一侧901a；在接合所述基底900和所述中间层901之后，去除所述牺牲基底903。Referring to FIG. 86, the substrate 900 and the intermediate layer 901 are bonded, and the substrate 900 is located on the first side 901a; after the substrate 900 and the intermediate layer 901 are bonded, the sacrificial substrate 903 is removed.
去除所述牺牲基底903的工艺包括：物理研磨工艺、湿法刻蚀工艺或干法刻蚀工艺。The process of removing the sacrificial substrate 903 includes: physical grinding process, wet etching process or dry etching process.
在本实施例中，去除所述牺牲基底903的工艺采用物理研磨工艺。In this embodiment, the process of removing the sacrificial substrate 903 adopts a physical grinding process.
在本实施例中，接合所述基底900和所述中间层901采用键合工艺；在其他实施例中，接合所述基底和所述中间层还可以采用粘合工艺。In this embodiment, a bonding process is used to join the substrate 900 and the intermediate layer 901; in other embodiments, an adhesion process may also be used to join the substrate and the intermediate layer.
请参考图87，形成调频层906，位于所述第二侧901b且位于所述压电层904上，所述电极结构905在所述基底900上的投影位于所述调频层906在所述基底900上的投影范围内，所述中间层901和所述调频层906分别位于所述压电层904的两侧，所述电极结构904和所述调频层906分别位于所述压电层904的两侧。Referring to Figure 87, a frequency modulation layer 906 is formed, located on the second side 901b and on the piezoelectric layer 904. The projection of the electrode structure 905 on the substrate 900 is located on the substrate. Within the projection range on 900, the intermediate layer 901 and the frequency modulation layer 906 are respectively located on both sides of the piezoelectric layer 904, and the electrode structure 904 and the frequency modulation layer 906 are respectively located on the piezoelectric layer 904. both sides.
所述调频层906的材料包括金属或绝缘电介质；其中金属包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴或钛；绝缘电介质包括：氮化硅、氧化硅、氧化铝、碳化硅、碳氧化硅、氮化铝、砷化镓或氮化镓。 The material of the frequency modulation layer 906 includes metal or insulating dielectric; the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt or titanium; the insulating dielectric includes: silicon nitride , silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
在本实施例中，所述调频层906的材料采用氮化硅。In this embodiment, the frequency modulation layer 906 is made of silicon nitride.
请参考图88，在形成所述调频层906之后，去除所述牺牲层907，在所述中间层901内形成空腔902，所述空腔902的开口位于所述第二侧901b，所述电极结构905位于所述空腔902内。Please refer to Figure 88. After the frequency modulation layer 906 is formed, the sacrificial layer 907 is removed, and a cavity 902 is formed in the middle layer 901. The opening of the cavity 902 is located on the second side 901b. The electrode structure 905 is located in the cavity 902 .
在本实施例中，由于所述电极结构905位于所述空腔902内，因此所述压电层904能够为形成的所述调频层906提供较为平坦的表面，减小所述调频层906薄膜的晶格缺陷，提升薄膜品质，进而使得所述调频层906对于器件的频率控制更加灵活且精准。另外，由于所述电极结构905位于所述空腔902内，可以有效防止器件在使用中，所述电极结构905被氧化或腐蚀的情况发生。In this embodiment, since the electrode structure 905 is located in the cavity 902, the piezoelectric layer 904 can provide a relatively flat surface for the formed frequency modulation layer 906, reducing the thin film of the frequency modulation layer 906. The lattice defects improve the film quality, thereby making the frequency modulation layer 906 more flexible and precise in controlling the frequency of the device. In addition, since the electrode structure 905 is located in the cavity 902, it can effectively prevent the electrode structure 905 from being oxidized or corroded during use of the device.
在本实施例中，在去除所述牺牲层908之后，所述温度补偿层907位于所述空腔902内，且所述压电层904位于所述温度补偿层907上。In this embodiment, after the sacrificial layer 908 is removed, the temperature compensation layer 907 is located in the cavity 902, and the piezoelectric layer 904 is located on the temperature compensation layer 907.
在本实施例中，去除所述牺牲层908的工艺采用湿法刻蚀工艺。In this embodiment, the process of removing the sacrificial layer 908 adopts a wet etching process.
相应的，本发明实施例中还提供一种体声波谐振装置，请继续参考图88包括：基底900；中间层901，所述中间层901包括相对的第一侧901a和第二侧901b，所述基底900位于所述第一侧901a，所述中间层901包括空腔902，所述空腔902的开口位于所述第二侧901b；电极结构905，位于所述空腔902内；压电层904，位于所述第二侧901b且位于所述电极结构905上，所述压电层904至少覆盖所述空腔905；温度补偿层907，位于所述空腔902内且至少覆盖所述电极结构905，所述压电层904位于所述温度补偿层907上；调频层906，位于所述第二侧901b且位于所述压电层904上，所述电极结构905在所述基底900上的投影位于所述调频层906在所述基底900上的投影范围内，所述中间层901和所述调频层907分别位于所述压电层904的两侧，所述电极结构905和所述调频层906分别位于所述压电层904的两侧。 Correspondingly, the embodiment of the present invention also provides a bulk acoustic wave resonance device. Please continue to refer to FIG. 88 and includes: a substrate 900; an intermediate layer 901. The intermediate layer 901 includes an opposite first side 901a and a second side 901b, so The substrate 900 is located on the first side 901a, the intermediate layer 901 includes a cavity 902, and the opening of the cavity 902 is located on the second side 901b; an electrode structure 905 is located in the cavity 902; piezoelectric Layer 904 is located on the second side 901b and is located on the electrode structure 905. The piezoelectric layer 904 at least covers the cavity 905; a temperature compensation layer 907 is located in the cavity 902 and at least covers the Electrode structure 905, the piezoelectric layer 904 is located on the temperature compensation layer 907; frequency modulation layer 906 is located on the second side 901b and on the piezoelectric layer 904, the electrode structure 905 is on the substrate 900 The projection on is located within the projection range of the frequency modulation layer 906 on the substrate 900. The intermediate layer 901 and the frequency modulation layer 907 are respectively located on both sides of the piezoelectric layer 904. The electrode structure 905 and the The frequency modulation layers 906 are respectively located on both sides of the piezoelectric layer 904.
在本实施例中，由于所述电极结构905位于所述空腔902内，因此所述压电层904能够为形成的所述调频层906提供较为平坦的表面，减小所述调频层906薄膜的晶格缺陷，提升薄膜品质，进而使得所述调频层906对于器件的频率控制更加灵活且精准。另外，由于所述电极结构905位于所述空腔902内，可以有效防止器件在使用中，所述电极结构905被氧化或腐蚀的情况发生。In this embodiment, since the electrode structure 905 is located in the cavity 902, the piezoelectric layer 904 can provide a relatively flat surface for the formed frequency modulation layer 906, reducing the thin film of the frequency modulation layer 906. The lattice defects improve the film quality, thereby making the frequency modulation layer 906 more flexible and precise in controlling the frequency of the device. In addition, since the electrode structure 905 is located in the cavity 902, it can effectively prevent the electrode structure 905 from being oxidized or corroded during use of the device.
所述基底900的材料包括：硅、碳化硅、二氧化硅、砷化镓、氮化镓、氧化铝、氧化镁、陶瓷或聚合物；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺。The material of the substrate 900 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e., BCB), photosensitive epoxy photoresist (e.g., SU-8), polyimide.
在本实施例中，所述基底900的材料采用硅。In this embodiment, the material of the substrate 900 is silicon.
所述中间层901的材料包括：聚合物、绝缘电介质或多晶硅；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺；所述绝缘电介质包括：氮化铝、二氧化硅、氮化硅或氧化钛。The material of the intermediate layer 901 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
在本实施例中，所述中间层901的材料采用二氧化硅。In this embodiment, the material of the intermediate layer 901 is silicon dioxide.
所述压电层904的材料包括：氮化铝、氮化铝合金、氮化镓、氧化锌、钽酸锂、铌酸锂、锆钛酸铅或铌镁酸铅—钛酸铅。The material of the piezoelectric layer 904 includes: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
在本实施例中，所述压电层904的材料采用铌酸锂。In this embodiment, the piezoelectric layer 904 is made of lithium niobate.
在本实施例中，所述电极结构905包括：沿第一方向X平行排布的第一总线9051和第二总线9052，所述第一总线9051连接若干沿第二方向Y平行排布的第一电极条9053，所述第二总线9052连接若干沿所述第二方向Y平行排布的第二电极条9054，所述第一方向X与所述第二方向Y垂直，所述第一电极条9053和所述第二电极条9054交错放置。In this embodiment, the electrode structure 905 includes: a first bus 9051 and a second bus 9052 arranged in parallel along the first direction An electrode strip 9053. The second bus 9052 connects a plurality of second electrode strips 9054 arranged in parallel along the second direction Y. The first direction X is perpendicular to the second direction Y. The first electrode The strips 9053 and the second electrode strips 9054 are alternately placed.
在本实施例中，所述第一电极条9053和所述第二电极条9054的宽度相等；所述第一电极条9053和所述第二电极条9054具有第一宽度尺寸d1，相邻的所述第一电极条9053的中轴和所述第二电极条 9054的中轴具有第一中心尺寸d2，所述第一中心尺寸d2与所述第一宽度尺寸d1的比值范围为：1.2～20。In this embodiment, the widths of the first electrode strip 9053 and the second electrode strip 9054 are equal; the first electrode strip 9053 and the second electrode strip 9054 have a first width dimension d1. The central axis of the first electrode strip 9053 and the second electrode strip The central axis of 9054 has a first center dimension d2, and the ratio of the first center dimension d2 to the first width dimension d1 ranges from 1.2 to 20.
在本实施例中，所述第一电极条9053和所述第二电极条9054的厚度等于所述第一宽度尺寸d1；在其他实施例中，所述第一电极条和所述第二电极条的厚度还可以不等于所述第一宽度尺寸。In this embodiment, the thickness of the first electrode strip 9053 and the second electrode strip 9054 is equal to the first width dimension d1; in other embodiments, the thickness of the first electrode strip 9053 and the second electrode strip 9054 is equal to the first width dimension d1. The thickness of the strip may also be different than the first width dimension.
所述电极结构905的材料包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴和钛中的一种或多种。The material of the electrode structure 905 includes: one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
所述电极结构905为一层或多层。在本实施例中，所述电极结构905为两层，所述电极结构905的材料为钼铝、钨铝或铂铝。The electrode structure 905 is one or more layers. In this embodiment, the electrode structure 905 is two layers, and the material of the electrode structure 905 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
所述调频层906的材料包括金属或绝缘电介质；其中金属包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴或钛；绝缘电介质包括：氮化硅、氧化硅、氧化铝、碳化硅、碳氧化硅、氮化铝、砷化镓或氮化镓。The material of the frequency modulation layer 906 includes metal or insulating dielectric; the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt or titanium; the insulating dielectric includes: silicon nitride , silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
在本实施例中，所述调频层906的材料采用氮化硅。In this embodiment, the material of the frequency modulation layer 906 is silicon nitride.
所述温度补偿层907的材料包括：二氧化硅、碳氧化硅或氟氧化硅。在本实施例中，所述温度补偿层907的材料采用二氧化硅。The material of the temperature compensation layer 907 includes: silicon dioxide, silicon oxycarbide or silicon oxyfluoride. In this embodiment, the temperature compensation layer 907 is made of silicon dioxide.
在本实施例中，由于所述温度补偿层907与所述压电层904具有相反的温度频移特性，因此使的谐振装置的频率温度系数减小，趋向于0ppm/℃，从而提升谐振装置频率-温度的稳定性。In this embodiment, since the temperature compensation layer 907 and the piezoelectric layer 904 have opposite temperature frequency shift characteristics, the frequency temperature coefficient of the resonant device is reduced, tending to 0 ppm/℃, thereby improving the resonant device. Frequency-temperature stability.
图89至图100是本发明又一实施例中体声波谐振装置的形成方法各步骤结构示意图。89 to 100 are schematic structural diagrams of each step of a method for forming a bulk acoustic wave resonance device in another embodiment of the present invention.
请参考图89，提供牺牲基底1003。Referring to Figure 89, a sacrificial substrate 1003 is provided.
所述牺牲基底1003的材料包括：硅、碳化硅、二氧化硅、砷化镓、氮化镓、氧化铝、氧化镁、陶瓷或聚合物；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺。 The material of the sacrificial substrate 1003 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e. , BCB), photosensitive epoxy resin photoresist (for example, SU-8), polyimide.
在本实施例中，所述牺牲基底1003的材料采用硅。In this embodiment, the sacrificial substrate 1003 is made of silicon.
请参考图90，在所述牺牲基底1003上形成压电层1004。Referring to FIG. 90 , a piezoelectric layer 1004 is formed on the sacrificial substrate 1003 .
所述压电层1004的材料包括：氮化铝、氮化铝合金、氮化镓、氧化锌、钽酸锂、铌酸锂、锆钛酸铅或铌镁酸铅—钛酸铅。The materials of the piezoelectric layer 1004 include: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
在本实施例中，所述压电层1004的材料采用铌酸锂。In this embodiment, the piezoelectric layer 1004 is made of lithium niobate.
请参考图91和图92，图92是图91中沿M-M线截面示意图，在所述压电层1004上形成电极结构1005。Please refer to FIG. 91 and FIG. 92. FIG. 92 is a schematic cross-sectional view along line M-M in FIG. 91. An electrode structure 1005 is formed on the piezoelectric layer 1004.
在本实施例中，所述电极结构1005包括：沿第一方向X平行排布的第一总线10051和第二总线10052，所述第一总线10051连接若干沿第二方向Y平行排布的第一电极条10053，所述第二总线10052连接若干沿所述第二方向Y平行排布的第二电极条10054，所述第一方向X与所述第二方向Y垂直，所述第一电极条10053和所述第二电极条10054交错放置。In this embodiment, the electrode structure 1005 includes: a first bus line 10051 and a second bus line 10052 arranged in parallel along the first direction An electrode strip 10053. The second bus 10052 connects a plurality of second electrode strips 10054 arranged in parallel along the second direction Y. The first direction X is perpendicular to the second direction Y. The first electrode The strips 10053 and the second electrode strips 10054 are alternately placed.
在本实施例中，所述第一电极条10053和所述第二电极条10054的宽度相等；所述第一电极条10053和所述第二电极条10054具有第一宽度尺寸d1，相邻的所述第一电极条10053的中轴和所述第二电极条10054的中轴具有第一中心尺寸d2，所述第一中心尺寸d2与所述第一宽度尺寸d1的比值范围为：1.2～20。In this embodiment, the widths of the first electrode strip 10053 and the second electrode strip 10054 are equal; the first electrode strip 10053 and the second electrode strip 10054 have a first width dimension d1, the central axis of the adjacent first electrode strip 10053 and the central axis of the second electrode strip 10054 have a first center dimension d2, and the ratio of the first center dimension d2 to the first width dimension d1 ranges from 1.2 to 20.
在本实施例中，所述第一电极条10053和所述第二电极条10054的厚度等于所述第一宽度尺寸d1；在其他实施例中，所述第一电极条和所述第二电极条的厚度还可以不等于所述第一宽度尺寸。In this embodiment, the thickness of the first electrode strip 10053 and the second electrode strip 10054 is equal to the first width dimension d1; in other embodiments, the first electrode strip and the second electrode strip 10054 have a thickness equal to the first width dimension d1. The thickness of the strip may also be different than the first width dimension.
所述电极结构1005的材料包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴和钛中的一种或多种。The material of the electrode structure 1005 includes: one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
所述电极结构1005为一层或多层。在本实施例中，所述电极结构1005为两层，所述电极结构1005的材料为钼铝、钨铝或铂铝。The electrode structure 1005 is one or more layers. In this embodiment, the electrode structure 1005 has two layers, and the material of the electrode structure 1005 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
请参考图93，图93和图92的视图方向一致，形成温度补偿层 1008，位于所述压电层1004上且至少覆盖所述电极结构1005。Please refer to Figure 93. The views of Figure 93 and Figure 92 are in the same direction to form a temperature compensation layer. 1008, located on the piezoelectric layer 1004 and at least covering the electrode structure 1005.
所述温度补偿层1008的材料包括：二氧化硅、碳氧化硅或氟氧化硅。在本实施例中，所述温度补偿层1008的材料采用二氧化硅。The material of the temperature compensation layer 1008 includes: silicon dioxide, silicon oxycarbide or silicon oxyfluoride. In this embodiment, the temperature compensation layer 1008 is made of silicon dioxide.
在本实施例中，由于所述温度补偿层1008与所述压电层1004具有相反的温度频移特性，因此使的谐振装置的频率温度系数减小，趋向于0ppm/℃，从而提升谐振装置频率-温度的稳定性。In this embodiment, since the temperature compensation layer 1008 and the piezoelectric layer 1004 have opposite temperature frequency shift characteristics, the frequency temperature coefficient of the resonant device is reduced, tending to 0 ppm/℃, thereby improving the resonant device. Frequency-temperature stability.
在本实施例中，所述温度补偿层1008覆盖部分所述压电层1004；在其他实施例中，所述温度补偿层还可以完全覆盖所述压电层。In this embodiment, the temperature compensation layer 1008 covers part of the piezoelectric layer 1004; in other embodiments, the temperature compensation layer can also completely cover the piezoelectric layer.
请参考图94，在所述压电层1004上形成牺牲层1009，所述牺牲层1009至少覆盖所述温度补偿层1008。Referring to FIG. 94 , a sacrificial layer 1009 is formed on the piezoelectric layer 1004 , and the sacrificial layer 1009 at least covers the temperature compensation layer 1008 .
所述牺牲层1009的材料包括：聚合物、绝缘电介质或多晶硅；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺；所述绝缘电介质包括：氮化铝、二氧化硅、氮化硅或氧化钛。The material of the sacrificial layer 1009 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
在本实施例中，所述牺牲层1009的材料采用聚酰亚胺。In this embodiment, the sacrificial layer 1009 is made of polyimide.
在本实施例中，由于所述温度补偿层1008盖部分所述压电层1004，因此形成所述牺牲层1009也会覆盖部分所述压电层1004；在其他实施例中，当所述温度补偿层完全覆盖所述压电层时，所述牺牲层则不与压电层接触。In this embodiment, since the temperature compensation layer 1008 covers part of the piezoelectric layer 1004, forming the sacrificial layer 1009 will also cover part of the piezoelectric layer 1004; in other embodiments, when the temperature When the compensation layer completely covers the piezoelectric layer, the sacrificial layer does not contact the piezoelectric layer.
请参考图95，在所述压电层1004上形成中间层1001，所述中间层1001至少覆盖所述牺牲层1009，所述中间层1001包括相对的第一侧1001a和第二侧1001b，所述压电层1004和所述牺牲基底1003位于所述第二侧1001b。Referring to Figure 95, an intermediate layer 1001 is formed on the piezoelectric layer 1004. The intermediate layer 1001 at least covers the sacrificial layer 1009. The intermediate layer 1001 includes opposite first sides 1001a and second sides 1001b. The piezoelectric layer 1004 and the sacrificial substrate 1003 are located on the second side 1001b.
所述中间层1001的材料包括：聚合物、绝缘电介质或多晶硅；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺；所述绝缘电介质包括：氮化铝、二氧化硅、 氮化硅或氧化钛。The material of the intermediate layer 1001 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, Silicon nitride or titanium oxide.
在本实施例中，所述中间层1001的材料采用二氧化硅。In this embodiment, the material of the middle layer 1001 is silicon dioxide.
请参考图96，提供基底1000。Referring to Figure 96, a substrate 1000 is provided.
所述基底1000的材料包括：硅、碳化硅、二氧化硅、砷化镓、氮化镓、氧化铝、氧化镁、陶瓷或聚合物；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺。The material of the substrate 1000 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e., BCB), photosensitive epoxy photoresist (e.g., SU-8), polyimide.
在本实施例中，所述基底1000的材料采用硅。In this embodiment, the substrate 1000 is made of silicon.
请参考图97，接合所述基底1000和所述中间层1001，所述基底1000位于所述第一侧1001a；在接合所述基底1000和所述中间层1001之后，去除所述牺牲基底1003。Referring to FIG. 97, the substrate 1000 and the intermediate layer 1001 are bonded, and the substrate 1000 is located on the first side 1001a; after the substrate 1000 and the intermediate layer 1001 are bonded, the sacrificial substrate 1003 is removed.
去除所述牺牲基底1003的工艺包括：物理研磨工艺、湿法刻蚀工艺或干法刻蚀工艺。The process of removing the sacrificial substrate 1003 includes: physical grinding process, wet etching process or dry etching process.
在本实施例中，去除所述牺牲基底1003的工艺采用物理研磨工艺。In this embodiment, the process of removing the sacrificial substrate 1003 adopts a physical grinding process.
在本实施例中，接合所述基底1000和所述中间层1001采用键合工艺；在其他实施例中，接合所述基底和所述中间层还可以采用粘合工艺。In this embodiment, a bonding process is used to join the substrate 1000 and the intermediate layer 1001; in other embodiments, an adhesion process may also be used to join the substrate and the intermediate layer.
请参考图98和99，图99是图98中沿N-N线截面示意图，形成调频层1006，位于所述第二侧1001b且位于所述压电层1004上，所述中间层1001和所述调频层1006分别位于所述压电层1004的两侧，所述电极结构1004和所述调频层1006分别位于所述压电层1004的两侧。Please refer to Figures 98 and 99. Figure 99 is a schematic cross-sectional view along the N-N line in Figure 98, forming a frequency modulation layer 1006, which is located on the second side 1001b and on the piezoelectric layer 1004, the intermediate layer 1001 and the frequency modulation layer 1006 are respectively located on both sides of the piezoelectric layer 1004, and the electrode structure 1004 and the frequency modulation layer 1006 are respectively located on both sides of the piezoelectric layer 1004.
所述调频层1006的材料包括金属或绝缘电介质；其中金属包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴或钛；绝缘电介质包括：氮化硅、氧化硅、氧化铝、碳化硅、碳氧化硅、氮化铝、砷化镓或氮化镓。 The material of the frequency modulation layer 1006 includes metal or insulating dielectric; the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt or titanium; the insulating dielectric includes: silicon nitride , silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
在本实施例中，所述调频层1006的材料采用氮化硅。In this embodiment, the frequency modulation layer 1006 is made of silicon nitride.
在本实施例中，所述调频层1006包括凹槽1007，所述电极结构1005在所述基底1000上的投影位于所述凹槽1007在所述基底1000上的投影范围内。通过增大或减小所述凹槽1007的深度，可以调节所述谐振装置的谐振频率，使得所述调频层1006对于器件频率的控制更加灵活精准。In this embodiment, the frequency modulation layer 1006 includes a groove 1007, and the projection of the electrode structure 1005 on the substrate 1000 is located within the projection range of the groove 1007 on the substrate 1000. By increasing or decreasing the depth of the groove 1007, the resonant frequency of the resonant device can be adjusted, making the frequency modulation layer 1006 more flexible and precise in controlling the device frequency.
所述凹槽1007呈任意多边形。在本实施例中，所述凹槽1007呈矩形。The groove 1007 is in an arbitrary polygonal shape. In this embodiment, the groove 1007 is rectangular.
请参考图100，图100和图99的视图方向一致，在形成所述调频层1006之后，去除所述牺牲层1007，在所述中间层1001内形成空腔1002，所述空腔1002的开口位于所述第二侧1001b，所述电极结构1005位于所述空腔1002内。Please refer to Figure 100. The views of Figure 100 and Figure 99 are in the same direction. After the frequency modulation layer 1006 is formed, the sacrificial layer 1007 is removed, and a cavity 1002 is formed in the intermediate layer 1001. The opening of the cavity 1002 Located on the second side 1001b, the electrode structure 1005 is located in the cavity 1002.
在本实施例中，由于所述电极结构1005位于所述空腔1002内，因此所述压电层1004能够为形成的所述调频层1006提供较为平坦的表面，减小所述调频层1006薄膜的晶格缺陷，提升薄膜品质，进而使得所述调频层1006对于器件的频率控制更加灵活且精准。另外，由于所述电极结构1005位于所述空腔1002内，可以有效防止器件在使用中，所述电极结构1005被氧化或腐蚀的情况发生。In this embodiment, since the electrode structure 1005 is located in the cavity 1002, the piezoelectric layer 1004 can provide a relatively flat surface for the formed frequency modulation layer 1006, reducing the thin film of the frequency modulation layer 1006. The lattice defects improve the film quality, thereby making the frequency modulation layer 1006 more flexible and precise in controlling the frequency of the device. In addition, since the electrode structure 1005 is located in the cavity 1002, it can effectively prevent the electrode structure 1005 from being oxidized or corroded during use of the device.
在本实施例中，在去除所述牺牲层1009之后，所述温度补偿层1008位于所述空腔1002内，且所述压电层1004位于所述温度补偿层1008上。In this embodiment, after the sacrificial layer 1009 is removed, the temperature compensation layer 1008 is located in the cavity 1002, and the piezoelectric layer 1004 is located on the temperature compensation layer 1008.
在本实施例中，去除所述牺牲层1006的工艺采用湿法刻蚀工艺。In this embodiment, a wet etching process is used to remove the sacrificial layer 1006 .
相应的，本发明实施例中还提供一种体声波谐振装置，请继续参考图100包括：基底1000；中间层1001，所述中间层1001包括相对的第一侧1001a和第二侧1001b，所述基底1000位于所述第一侧1001a，所述中间层1001包括空腔1002，所述空腔1002的开口位于所述第二侧1001b；电极结构1005，位于所述空腔1002内；压电层 1004，位于所述第二侧1001b且位于所述电极结构1005上，所述压电层1004至少覆盖所述空腔1002；温度补偿层1008，位于所述空腔1002内且至少覆盖所述电极结构1005，所述压电层1004位于所述温度补偿层1008上；调频层1006，位于所述第二侧1001b且位于所述压电层1004上，所述中间层1001和所述调频层1006分别位于所述压电层1004的两侧，所述电极结构1005和所述调频层1006分别位于所述压电层1004的两侧，所述调频层1006包括凹槽1007，所述电极结构1005在所述基底100上的投影位于所述凹槽1007在所述基底1000上的投影范围内。Correspondingly, the embodiment of the present invention also provides a bulk acoustic wave resonance device. Please continue to refer to FIG. 100 and include: a substrate 1000; an intermediate layer 1001. The intermediate layer 1001 includes an opposite first side 1001a and a second side 1001b, so The substrate 1000 is located on the first side 1001a, the intermediate layer 1001 includes a cavity 1002, and the opening of the cavity 1002 is located on the second side 1001b; an electrode structure 1005 is located in the cavity 1002; piezoelectric layer 1004, located on the second side 1001b and on the electrode structure 1005, the piezoelectric layer 1004 at least covers the cavity 1002; the temperature compensation layer 1008, located in the cavity 1002 and at least covering the electrode Structure 1005, the piezoelectric layer 1004 is located on the temperature compensation layer 1008; the frequency modulation layer 1006 is located on the second side 1001b and is located on the piezoelectric layer 1004, the middle layer 1001 and the frequency modulation layer 1006 The electrode structure 1005 and the frequency modulation layer 1006 are respectively located on both sides of the piezoelectric layer 1004. The frequency modulation layer 1006 includes a groove 1007. The electrode structure 1005 The projection on the substrate 100 is located within the projection range of the groove 1007 on the substrate 1000 .
在本实施例中，由于所述电极结构1005位于所述空腔1002内，因此所述压电层1004能够为形成的所述调频层1006提供较为平坦的表面，减小所述调频层1006薄膜的晶格缺陷，提升薄膜品质，进而使得所述调频层1006对于器件的频率控制更加灵活且精准。另外，由于所述电极结构1005位于所述空腔1002内，可以有效防止器件在使用中，所述电极结构1005被氧化或腐蚀的情况发生。In this embodiment, since the electrode structure 1005 is located in the cavity 1002, the piezoelectric layer 1004 can provide a relatively flat surface for the formed frequency modulation layer 1006, reducing the thin film of the frequency modulation layer 1006. The lattice defects improve the film quality, thereby making the frequency modulation layer 1006 more flexible and precise in controlling the frequency of the device. In addition, since the electrode structure 1005 is located in the cavity 1002, it can effectively prevent the electrode structure 1005 from being oxidized or corroded during use of the device.
所述基底1000的材料包括：硅、碳化硅、二氧化硅、砷化镓、氮化镓、氧化铝、氧化镁、陶瓷或聚合物；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺。The material of the substrate 1000 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e., BCB), photosensitive epoxy photoresist (e.g., SU-8), polyimide.
在本实施例中，所述基底1000的材料采用硅。In this embodiment, the substrate 1000 is made of silicon.
所述中间层1001的材料包括：聚合物、绝缘电介质或多晶硅；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺；所述绝缘电介质包括：氮化铝、二氧化硅、氮化硅或氧化钛。The material of the intermediate layer 1001 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
在本实施例中，所述中间层1001的材料采用二氧化硅。In this embodiment, the material of the middle layer 1001 is silicon dioxide.
所述压电层1004的材料包括：氮化铝、氮化铝合金、氮化镓、氧化锌、钽酸锂、铌酸锂、锆钛酸铅或铌镁酸铅—钛酸铅。The materials of the piezoelectric layer 1004 include: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
在本实施例中，所述压电层1004的材料采用铌酸锂。 In this embodiment, the material of the piezoelectric layer 1004 is lithium niobate.
在本实施例中，所述电极结构1005包括：沿第一方向X平行排布的第一总线10051和第二总线10052，所述第一总线10051连接若干沿第二方向Y平行排布的第一电极条10053，所述第二总线10052连接若干沿所述第二方向Y平行排布的第二电极条10054，所述第一方向X与所述第二方向Y垂直，所述第一电极条10053和所述第二电极条10054交错放置。In this embodiment, the electrode structure 1005 includes: a first bus line 10051 and a second bus line 10052 arranged in parallel along the first direction An electrode strip 10053. The second bus 10052 connects a plurality of second electrode strips 10054 arranged in parallel along the second direction Y. The first direction X is perpendicular to the second direction Y. The first electrode The strips 10053 and the second electrode strips 10054 are alternately placed.
在本实施例中，所述第一电极条10053和所述第二电极条10054的宽度相等；所述第一电极条10053和所述第二电极条10054具有第一宽度尺寸d1，相邻的所述第一电极条10053的中轴和所述第二电极条10054的中轴具有第一中心尺寸d2，所述第一中心尺寸d2与所述第一宽度尺寸d1的比值范围为：1.2～20。In this embodiment, the widths of the first electrode strip 10053 and the second electrode strip 10054 are equal; the first electrode strip 10053 and the second electrode strip 10054 have a first width dimension d1. The central axis of the first electrode strip 10053 and the central axis of the second electrode strip 10054 have a first central dimension d2, and the ratio range of the first central dimension d2 to the first width dimension d1 is: 1.2~ 20.
在本实施例中，所述第一电极条10053和所述第二电极条10054的厚度等于所述第一宽度尺寸d1；在其他实施例中，所述第一电极条和所述第二电极条的厚度还可以不等于所述第一宽度尺寸。In this embodiment, the thickness of the first electrode strip 10053 and the second electrode strip 10054 is equal to the first width dimension d1; in other embodiments, the first electrode strip and the second electrode strip 10054 have a thickness equal to the first width dimension d1. The thickness of the strip may also be different than the first width dimension.
所述电极结构1005的材料包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴和钛中的一种或多种。The material of the electrode structure 1005 includes: one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
所述电极结构1005为一层或多层。在本实施例中，所述电极结构1005为两层，所述电极结构1005的材料为钼铝、钨铝或铂铝。The electrode structure 1005 is one or more layers. In this embodiment, the electrode structure 1005 has two layers, and the material of the electrode structure 1005 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
所述调频层1006的材料包括金属或绝缘电介质；其中金属包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴或钛；绝缘电介质包括：氮化硅、氧化硅、氧化铝、碳化硅、碳氧化硅、氮化铝、砷化镓或氮化镓。The material of the frequency modulation layer 1006 includes metal or insulating dielectric; the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt or titanium; the insulating dielectric includes: silicon nitride , silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
在本实施例中，所述调频层1006的材料采用氮化硅。In this embodiment, the frequency modulation layer 1006 is made of silicon nitride.
在本实施例中，通过增大或减小所述凹槽1007的深度，可以调节所述谐振装置的谐振频率，使得所述调频层1006对于器件频率的控制更加灵活精准。In this embodiment, by increasing or decreasing the depth of the groove 1007, the resonant frequency of the resonant device can be adjusted, so that the frequency modulation layer 1006 can control the device frequency more flexibly and accurately.
所述凹槽1007呈任意多边形。在本实施例中，所述凹槽1007呈 矩形。The groove 1007 is in an arbitrary polygonal shape. In this embodiment, the groove 1007 is in the form of rectangle.
所述温度补偿层1008的材料包括：二氧化硅、碳氧化硅或氟氧化硅。在本实施例中，所述温度补偿层1008的材料采用二氧化硅。The material of the temperature compensation layer 1008 includes: silicon dioxide, silicon oxycarbide or silicon oxyfluoride. In this embodiment, the temperature compensation layer 1008 is made of silicon dioxide.
在本实施例中，由于所述温度补偿层1008与所述压电层1004具有相反的温度频移特性，因此使的谐振装置的频率温度系数减小，趋向于0ppm/℃，从而提升谐振装置频率-温度的稳定性。In this embodiment, since the temperature compensation layer 1008 and the piezoelectric layer 1004 have opposite temperature frequency shift characteristics, the frequency temperature coefficient of the resonant device is reduced, tending to 0 ppm/℃, thereby improving the resonant device. Frequency-temperature stability.
图101至图112是本发明又一实施例中体声波谐振装置的形成方法各步骤结构示意图。101 to 112 are schematic structural diagrams of each step of a method for forming a bulk acoustic wave resonance device in another embodiment of the present invention.
请参考图101，提供牺牲基底1103。Referring to FIG. 101 , a sacrificial substrate 1103 is provided.
所述牺牲基底1103的材料包括：硅、碳化硅、二氧化硅、砷化镓、氮化镓、氧化铝、氧化镁、陶瓷或聚合物；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺。The material of the sacrificial substrate 1103 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e. , BCB), photosensitive epoxy resin photoresist (for example, SU-8), polyimide.
在本实施例中，所述牺牲基底1103的材料采用硅。In this embodiment, the sacrificial substrate 1103 is made of silicon.
请参考图102，在所述牺牲基底1103上形成压电层1104。Referring to FIG. 102 , a piezoelectric layer 1104 is formed on the sacrificial substrate 1103 .
所述压电层1104的材料包括：氮化铝、氮化铝合金、氮化镓、氧化锌、钽酸锂、铌酸锂、锆钛酸铅或铌镁酸铅—钛酸铅。The material of the piezoelectric layer 1104 includes: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
在本实施例中，所述压电层1104的材料采用铌酸锂。In this embodiment, the material of the piezoelectric layer 1104 is lithium niobate.
请参考图103和图104，图104是图103中沿O-O线截面示意图，在所述压电层1104上形成电极结构1105。Please refer to FIG. 103 and FIG. 104. FIG. 104 is a schematic cross-sectional view along line O-O in FIG. 103. An electrode structure 1105 is formed on the piezoelectric layer 1104.
在本实施例中，所述电极结构1105包括：沿第一方向X平行排布的第一总线11051和第二总线11052，所述第一总线11051连接若干沿第二方向Y平行排布的第一电极条11053，所述第二总线11052连接若干沿所述第二方向Y平行排布的第二电极条11054，所述第一方向X与所述第二方向Y垂直，所述第一电极条11053和所述第二 电极条11054交错放置。In this embodiment, the electrode structure 1105 includes: a first bus line 11051 and a second bus line 11052 arranged in parallel along the first direction An electrode strip 11053. The second bus 11052 connects a plurality of second electrode strips 11054 arranged in parallel along the second direction Y. The first direction X is perpendicular to the second direction Y. The first electrode Article 11053 and the second The electrode strips 11054 are staggered.
在本实施例中，所述第一电极条11053和所述第二电极条11054的宽度相等；所述第一电极条11053和所述第二电极条11054具有第一宽度尺寸d1，相邻的所述第一电极条11053的中轴和所述第二电极条11054的中轴具有第一中心尺寸d2，所述第一中心尺寸d2与所述第一宽度尺寸d1的比值范围为：1.2～20。In this embodiment, the widths of the first electrode strip 11053 and the second electrode strip 11054 are equal; the first electrode strip 11053 and the second electrode strip 11054 have a first width dimension d1. The central axis of the first electrode strip 11053 and the central axis of the second electrode strip 11054 have a first central dimension d2, and the ratio range of the first central dimension d2 to the first width dimension d1 is: 1.2~ 20.
在本实施例中，所述第一电极条11053和所述第二电极条11054的厚度等于所述第一宽度尺寸d1；在其他实施例中，所述第一电极条和所述第二电极条的厚度还可以不等于所述第一宽度尺寸。In this embodiment, the thickness of the first electrode strip 11053 and the second electrode strip 11054 is equal to the first width dimension d1; in other embodiments, the thickness of the first electrode strip 11053 and the second electrode strip 11054 is equal to the first width dimension d1. The thickness of the strip may also be different than the first width dimension.
所述电极结构1105的材料包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴和钛中的一种或多种。The material of the electrode structure 1105 includes: one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
所述电极结构1105为一层或多层。在本实施例中，所述电极结构1105为两层，所述电极结构1105的材料为钼铝、钨铝或铂铝。The electrode structure 1105 is one or more layers. In this embodiment, the electrode structure 1105 is two layers, and the material of the electrode structure 1105 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
请参考图105，图105和图104的视图方向一致，形成温度补偿层1108，位于所述压电层1104上且至少覆盖所述电极结构1105。Please refer to FIG. 105 . The view directions of FIG. 105 and FIG. 104 are consistent. A temperature compensation layer 1108 is formed, located on the piezoelectric layer 1104 and at least covering the electrode structure 1105 .
所述温度补偿层1108的材料包括：二氧化硅、碳氧化硅或氟氧化硅。在本实施例中，所述温度补偿层1108的材料采用二氧化硅。The material of the temperature compensation layer 1108 includes: silicon dioxide, silicon oxycarbide or silicon oxyfluoride. In this embodiment, the temperature compensation layer 1108 is made of silicon dioxide.
在本实施例中，由于所述温度补偿层1108与所述压电层1104具有相反的温度频移特性，因此使的谐振装置的频率温度系数减小，趋向于0ppm/℃，从而提升谐振装置频率-温度的稳定性。In this embodiment, since the temperature compensation layer 1108 and the piezoelectric layer 1104 have opposite temperature frequency shift characteristics, the frequency temperature coefficient of the resonant device is reduced, tending to 0 ppm/℃, thereby improving the resonant device. Frequency-temperature stability.
在本实施例中，所述温度补偿层1108覆盖部分所述压电层1104；在其他实施例中，所述温度补偿层还可以完全覆盖所述压电层。In this embodiment, the temperature compensation layer 1108 covers part of the piezoelectric layer 1104; in other embodiments, the temperature compensation layer can also completely cover the piezoelectric layer.
请参考图106，在所述压电层1104上形成牺牲层1109，所述牺牲层1109至少覆盖所述温度补偿层1108。Referring to FIG. 106 , a sacrificial layer 1109 is formed on the piezoelectric layer 1104 , and the sacrificial layer 1109 at least covers the temperature compensation layer 1108 .
所述牺牲层1109的材料包括：聚合物、绝缘电介质或多晶硅；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例 如，SU-8)、聚酰亚胺；所述绝缘电介质包括：氮化铝、二氧化硅、氮化硅或氧化钛。The material of the sacrificial layer 1109 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg Such as, SU-8), polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
在本实施例中，所述牺牲层1109的材料采用聚酰亚胺。In this embodiment, the sacrificial layer 1109 is made of polyimide.
在本实施例中，由于所述温度补偿层1108盖部分所述压电层1104，因此形成所述牺牲层1109也会覆盖部分所述压电层1104；在其他实施例中，当所述温度补偿层完全覆盖所述压电层时，所述牺牲层则不与压电层接触。In this embodiment, since the temperature compensation layer 1108 covers part of the piezoelectric layer 1104, forming the sacrificial layer 1109 will also cover part of the piezoelectric layer 1104; in other embodiments, when the temperature When the compensation layer completely covers the piezoelectric layer, the sacrificial layer does not contact the piezoelectric layer.
请参考图107，在所述压电层1104上形成中间层1101，所述中间层1101至少覆盖所述牺牲层1109，所述中间层1101包括相对的第一侧1101a和第二侧1101b，所述压电层1104和所述牺牲基底1103位于所述第二侧1101b。Referring to Figure 107, an intermediate layer 1101 is formed on the piezoelectric layer 1104. The intermediate layer 1101 at least covers the sacrificial layer 1109. The intermediate layer 1101 includes opposite first sides 1101a and second sides 1101b, so The piezoelectric layer 1104 and the sacrificial substrate 1103 are located on the second side 1101b.
所述中间层1101的材料包括：聚合物、绝缘电介质或多晶硅；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺；所述绝缘电介质包括：氮化铝、二氧化硅、氮化硅或氧化钛。The material of the intermediate layer 1101 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
在本实施例中，所述中间层1101的材料采用二氧化硅。In this embodiment, the material of the intermediate layer 1101 is silicon dioxide.
请参考图108，提供基底1100。Referring to Figure 108, a substrate 1100 is provided.
所述基底1100的材料包括：硅、碳化硅、二氧化硅、砷化镓、氮化镓、氧化铝、氧化镁、陶瓷或聚合物；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺。The material of the substrate 1100 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e., BCB), photosensitive epoxy photoresist (e.g., SU-8), polyimide.
在本实施例中，所述基底1100的材料采用硅。In this embodiment, the substrate 1100 is made of silicon.
请参考图109，接合所述基底1100和所述中间层1101，所述基底1100位于所述第一侧1101a；在接合所述基底1100和所述中间层1101之后，去除所述牺牲基底1103。Referring to Figure 109, the substrate 1100 and the intermediate layer 1101 are bonded, and the substrate 1100 is located on the first side 1101a; after the substrate 1100 and the intermediate layer 1101 are bonded, the sacrificial substrate 1103 is removed.
去除所述牺牲基底1103的工艺包括：物理研磨工艺、湿法刻蚀工艺或干法刻蚀工艺。 The process of removing the sacrificial substrate 1103 includes: a physical grinding process, a wet etching process or a dry etching process.
在本实施例中，去除所述牺牲基底1103的工艺采用物理研磨工艺。In this embodiment, the process of removing the sacrificial substrate 1103 adopts a physical grinding process.
在本实施例中，接合所述基底1100和所述中间层1101采用键合工艺；在其他实施例中，接合所述基底和所述中间层还可以采用粘合工艺。In this embodiment, a bonding process is used to join the substrate 1100 and the intermediate layer 1101; in other embodiments, an adhesion process may also be used to join the substrate and the intermediate layer.
请参考图110和图111，图111是图110中沿P-P线截面示意图，形成调频层1106，位于所述第二侧1101b且位于所述压电层1104上，所述中间层1101和所述调频层1106分别位于所述压电层1104的两侧，所述电极结构1105和所述调频层1106分别位于所述压电层1104的两侧。Please refer to Figures 110 and 111. Figure 111 is a schematic cross-sectional view along line P-P in Figure 110. The frequency modulation layer 1106 is formed, located on the second side 1101b and on the piezoelectric layer 1104. The intermediate layer 1101 and the The frequency modulation layer 1106 is respectively located on both sides of the piezoelectric layer 1104, and the electrode structure 1105 and the frequency modulation layer 1106 are respectively located on both sides of the piezoelectric layer 1104.
所述调频层1106的材料包括金属或绝缘电介质；其中金属包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴或钛；绝缘电介质包括：氮化硅、氧化硅、氧化铝、碳化硅、碳氧化硅、氮化铝、砷化镓或氮化镓。The material of the frequency modulation layer 1106 includes metal or insulating dielectric; the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt or titanium; the insulating dielectric includes: silicon nitride , silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
在本实施例中，所述调频层1106的材料采用氮化硅。In this embodiment, the frequency modulation layer 1106 is made of silicon nitride.
在本实施例中，所述调频层1106的调频区域S包括多个凹槽1107，所述电极结构1105在所述基底1100上的投影位于所述调频区域S在所述基底1100上的投影范围内。通过增大或减小所述凹槽1107的深度，可以调节所述谐振装置的谐振频率，使得所述调频层1106对于器件频率的控制更加灵活精准。In this embodiment, the frequency modulation area S of the frequency modulation layer 1106 includes a plurality of grooves 1107, and the projection of the electrode structure 1105 on the substrate 1100 is located in the projection range of the frequency modulation area S on the substrate 1100. Inside. By increasing or decreasing the depth of the groove 1107, the resonant frequency of the resonant device can be adjusted, making the frequency modulation layer 1106 more flexible and precise in controlling the device frequency.
在本实施例中，多个所述凹槽1107在所述调频区域内均匀分布。In this embodiment, a plurality of grooves 1107 are evenly distributed within the frequency modulation area.
多个所述凹槽1107的分布可以为任意多边形或环形，单个所述凹槽1107呈任意多边形或圆形。在本实施例中，多个所述凹槽1107呈矩形分布，且单个所述凹槽1107也呈矩形。The distribution of multiple grooves 1107 can be in any polygonal or circular shape, and a single groove 1107 can be in any polygonal or circular shape. In this embodiment, a plurality of the grooves 1107 are distributed in a rectangular shape, and a single groove 1107 is also in a rectangular shape.
请参考图112，在形成所述调频层1106之后，去除所述牺牲层1109，在所述中间层1101内形成空腔1102，所述空腔1102的开口位于所述第二侧1101b，所述电极结构1105位于所述空腔1102内。 Please refer to Figure 112. After the frequency modulation layer 1106 is formed, the sacrificial layer 1109 is removed, and a cavity 1102 is formed in the middle layer 1101. The opening of the cavity 1102 is located on the second side 1101b. The electrode structure 1105 is located in the cavity 1102.
在本实施例中，由于所述电极结构1105位于所述空腔1102内，因此所述压电层1104能够为形成的所述调频层1106提供较为平坦的表面，减小所述调频层1106薄膜的晶格缺陷，提升薄膜品质，进而使得所述调频层1106对于器件的频率控制更加灵活且精准。另外，由于所述电极结构1105位于所述空腔1102内，可以有效防止器件在使用中，所述电极结构1105被氧化或腐蚀的情况发生。In this embodiment, since the electrode structure 1105 is located in the cavity 1102, the piezoelectric layer 1104 can provide a relatively flat surface for the formed frequency modulation layer 1106, reducing the thin film of the frequency modulation layer 1106. The lattice defects improve the film quality, thereby making the frequency modulation layer 1106 more flexible and precise in controlling the frequency of the device. In addition, since the electrode structure 1105 is located in the cavity 1102, it can effectively prevent the electrode structure 1105 from being oxidized or corroded during use of the device.
在本实施例中，在去除所述牺牲层1109之后，所述温度补偿层1108位于所述空腔1102内，且所述压电层1104位于所述温度补偿层1108上。In this embodiment, after the sacrificial layer 1109 is removed, the temperature compensation layer 1108 is located in the cavity 1102, and the piezoelectric layer 1104 is located on the temperature compensation layer 1108.
在本实施例中，去除所述牺牲层1106的工艺采用湿法刻蚀工艺。In this embodiment, a wet etching process is used to remove the sacrificial layer 1106 .
相应的，本发明实施例中还提供一种体声波谐振装置，请继续参考图112包括：基底1100；中间层1101，所述中间层1101包括相对的第一侧1101a和第二侧1101b，所述基底1100位于所述第一侧1101a，所述中间层1101包括空腔1102，所述空腔1102的开口位于所述第二侧1101b；电极结构1105，位于所述空腔1102内；压电层1104，位于所述第二侧1101b且位于所述电极结构1105上，所述压电层1104至少覆盖所述空腔1102；温度补偿层1108，位于所述空腔1102内且至少覆盖所述电极结构1105，所述压电层1104位于所述温度补偿层1108上；调频层1106，位于所述第二侧1101b且位于所述压电层1104上，所述中间层1101和所述调频层1106分别位于所述压电层1104的两侧，所述电极结构1105和所述调频层1106分别位于所述压电层1104的两侧，所述调频层1106的调频区域S包括多个凹槽1107，所述电极结构1105在所述基底1100上的投影位于所述调频区域S在所述基底1100上的投影范围内。Correspondingly, the embodiment of the present invention also provides a bulk acoustic wave resonance device. Please continue to refer to FIG. 112 and include: a substrate 1100; an intermediate layer 1101. The intermediate layer 1101 includes an opposite first side 1101a and a second side 1101b, so The substrate 1100 is located on the first side 1101a, the intermediate layer 1101 includes a cavity 1102, and the opening of the cavity 1102 is located on the second side 1101b; an electrode structure 1105 is located in the cavity 1102; piezoelectric Layer 1104 is located on the second side 1101b and is located on the electrode structure 1105. The piezoelectric layer 1104 at least covers the cavity 1102; a temperature compensation layer 1108 is located in the cavity 1102 and at least covers the Electrode structure 1105, the piezoelectric layer 1104 is located on the temperature compensation layer 1108; the frequency modulation layer 1106 is located on the second side 1101b and is located on the piezoelectric layer 1104, the middle layer 1101 and the frequency modulation layer 1106 are respectively located on both sides of the piezoelectric layer 1104. The electrode structure 1105 and the frequency modulation layer 1106 are respectively located on both sides of the piezoelectric layer 1104. The frequency modulation area S of the frequency modulation layer 1106 includes a plurality of grooves. 1107. The projection of the electrode structure 1105 on the substrate 1100 is located within the projection range of the frequency modulation area S on the substrate 1100.
在本实施例中，由于所述电极结构1105位于所述空腔1102内，因此所述压电层1104能够为形成的所述调频层1106提供较为平坦的表面，减小所述调频层1106薄膜的晶格缺陷，提升薄膜品质，进而使得所述调频层1106对于器件的频率控制更加灵活且精准。另外， 由于所述电极结构1105位于所述空腔1102内，可以有效防止器件在使用中，所述电极结构1105被氧化或腐蚀的情况发生。In this embodiment, since the electrode structure 1105 is located in the cavity 1102, the piezoelectric layer 1104 can provide a relatively flat surface for the formed frequency modulation layer 1106, reducing the thin film of the frequency modulation layer 1106. The lattice defects improve the film quality, thereby making the frequency modulation layer 1106 more flexible and precise in controlling the frequency of the device. in addition, Since the electrode structure 1105 is located in the cavity 1102, it can effectively prevent the electrode structure 1105 from being oxidized or corroded during use of the device.
所述基底1100的材料包括：硅、碳化硅、二氧化硅、砷化镓、氮化镓、氧化铝、氧化镁、陶瓷或聚合物；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺。The material of the substrate 1100 includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers; the polymer includes: benzocyclobutene (i.e., BCB), photosensitive epoxy photoresist (e.g., SU-8), polyimide.
在本实施例中，所述基底1100的材料采用硅。In this embodiment, the substrate 1100 is made of silicon.
所述中间层1101的材料包括：聚合物、绝缘电介质或多晶硅；所述聚合物包括：苯并环丁烯(即，BCB)、光感环氧树脂光刻胶(例如，SU-8)、聚酰亚胺；所述绝缘电介质包括：氮化铝、二氧化硅、氮化硅或氧化钛。The material of the intermediate layer 1101 includes: polymer, insulating dielectric or polysilicon; the polymer includes: benzocyclobutene (ie, BCB), photosensitive epoxy resin photoresist (eg, SU-8), Polyimide; the insulating dielectric includes: aluminum nitride, silicon dioxide, silicon nitride or titanium oxide.
在本实施例中，所述中间层1101的材料采用二氧化硅。In this embodiment, the material of the middle layer 1101 is silicon dioxide.
所述压电层1104的材料包括：氮化铝、氮化铝合金、氮化镓、氧化锌、钽酸锂、铌酸锂、锆钛酸铅或铌镁酸铅—钛酸铅。The material of the piezoelectric layer 1104 includes: aluminum nitride, aluminum nitride alloy, gallium nitride, zinc oxide, lithium tantalate, lithium niobate, lead zirconate titanate or lead magnesium niobate-lead titanate.
在本实施例中，所述压电层1104的材料采用铌酸锂。In this embodiment, the piezoelectric layer 1104 is made of lithium niobate.
在本实施例中，所述电极结构1105包括：沿第一方向X平行排布的第一总线11051和第二总线11052，所述第一总线11051连接若干沿第二方向Y平行排布的第一电极条11053，所述第二总线11052连接若干沿所述第二方向Y平行排布的第二电极条11054，所述第一方向X与所述第二方向Y垂直，所述第一电极条511053和所述第二电极条11054交错放置。In this embodiment, the electrode structure 1105 includes: a first bus line 11051 and a second bus line 11052 arranged in parallel along the first direction An electrode strip 11053. The second bus 11052 connects a plurality of second electrode strips 11054 arranged in parallel along the second direction Y. The first direction X is perpendicular to the second direction Y. The first electrode Strips 511053 and the second electrode strips 11054 are alternately placed.
在本实施例中，所述第一电极条11053和所述第二电极条11054的宽度相等；所述第一电极条11053和所述第二电极条11054具有第一宽度尺寸d1，相邻的所述第一电极条1153的中轴和所述第二电极条11054的中轴具有第一中心尺寸d2，所述第一中心尺寸d2与所述第一宽度尺寸d1的比值范围为：1.2～20。In this embodiment, the widths of the first electrode strip 11053 and the second electrode strip 11054 are equal; the first electrode strip 11053 and the second electrode strip 11054 have a first width dimension d1. The central axis of the first electrode strip 1153 and the central axis of the second electrode strip 11054 have a first central dimension d2, and the ratio range of the first central dimension d2 to the first width dimension d1 is: 1.2~ 20.
在本实施例中，所述第一电极条11053和所述第二电极条11054 的厚度等于所述第一宽度尺寸d1；在其他实施例中，所述第一电极条和所述第二电极条的厚度还可以不等于所述第一宽度尺寸。In this embodiment, the first electrode strip 11053 and the second electrode strip 11054 The thickness is equal to the first width dimension d1; in other embodiments, the thickness of the first electrode strip and the second electrode strip may not be equal to the first width dimension.
所述电极结构1105的材料包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴和钛中的一种或多种。The material of the electrode structure 1105 includes: one or more of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium.
所述电极结构1105为一层或多层。在本实施例中，所述电极结构1105为两层，所述电极结构1105的材料为钼铝、钨铝或铂铝。The electrode structure 1105 is one or more layers. In this embodiment, the electrode structure 1105 is two layers, and the material of the electrode structure 1105 is molybdenum aluminum, tungsten aluminum or platinum aluminum.
所述调频层1106的材料包括金属或绝缘电介质；其中金属包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴或钛；绝缘电介质包括：氮化硅、氧化硅、氧化铝、碳化硅、碳氧化硅、氮化铝、砷化镓或氮化镓。The material of the frequency modulation layer 1106 includes metal or insulating dielectric; the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt or titanium; the insulating dielectric includes: silicon nitride , silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
在本实施例中，所述调频层1106的材料采用氮化硅。In this embodiment, the frequency modulation layer 1106 is made of silicon nitride.
在本实施例中，通过增大或减小所述凹槽1107的深度，可以调节所述谐振装置的谐振频率，使得所述调频层1106对于器件频率的控制更加灵活精准。In this embodiment, by increasing or decreasing the depth of the groove 1107, the resonant frequency of the resonant device can be adjusted, so that the frequency modulation layer 1106 can control the device frequency more flexibly and accurately.
在本实施例中，多个所述凹槽1107在所述调频区域S内均匀分布。In this embodiment, a plurality of grooves 1107 are evenly distributed in the frequency modulation area S.
多个所述凹槽1107的分布可以为任意多边形或环形，单个所述凹槽1107呈任意多边形或圆形。在本实施例中，多个所述凹槽1107呈矩形分布，且单个所述凹槽1107也呈矩形。The distribution of multiple grooves 1107 may be in any polygonal or annular shape, and a single groove 1107 may be in any polygonal or circular shape. In this embodiment, a plurality of the grooves 1107 are distributed in a rectangular shape, and a single groove 1107 is also in a rectangular shape.
所述温度补偿层1108的材料包括：二氧化硅、碳氧化硅或氟氧化硅。在本实施例中，所述温度补偿层1108的材料采用二氧化硅。The material of the temperature compensation layer 1108 includes silicon dioxide, silicon oxycarbide or silicon oxyfluoride. In this embodiment, the material of the temperature compensation layer 1108 is silicon dioxide.
在本实施例中，由于所述温度补偿层1108与所述压电层1104具有相反的温度频移特性，因此使的谐振装置的频率温度系数减小，趋向于0ppm/℃，从而提升谐振装置频率-温度的稳定性。In this embodiment, since the temperature compensation layer 1108 and the piezoelectric layer 1104 have opposite temperature frequency shift characteristics, the frequency temperature coefficient of the resonant device is reduced, tending to 0 ppm/℃, thereby improving the resonant device. Frequency-temperature stability.
虽然本发明披露如上，但本发明并非限定于此。任何本领域技术人员，在不脱离本发明的精神和范围内，均可作各种更动与修改，因 此本发明的保护范围应当以权利要求所限定的范围为准。 Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. The protection scope of the present invention should be subject to the scope defined by the claims.

Claims (22)

  1. 一种体声波谐振装置，其特征在于，包括：A bulk acoustic wave resonance device, characterized by including:
    基底；base;
    中间层，所述中间层包括相对的第一侧和第二侧，所述基底位于所述第一侧，所述中间层包括空腔，所述空腔的开口位于所述第二侧；An intermediate layer, the intermediate layer includes opposite first and second sides, the substrate is located on the first side, the intermediate layer includes a cavity, and the opening of the cavity is located on the second side;
    电极结构，位于所述空腔内；An electrode structure located in the cavity;
    压电层，位于所述第二侧且位于所述电极结构上，所述压电层至少覆盖所述空腔。A piezoelectric layer is located on the second side and on the electrode structure, and the piezoelectric layer at least covers the cavity.
  2. 如权利要求1所述的体声波谐振装置，其特征在于，还包括：调频层，位于所述第二侧且位于所述压电层上方，所述电极结构在所述基底上的投影位于所述调频层在所述基底上的投影范围内，所述中间层和所述调频层分别位于所述压电层的两侧，所述电极结构和所述调频层分别位于所述压电层的两侧。The bulk acoustic wave resonance device according to claim 1 is characterized in that it also includes: a frequency modulation layer, which is located on the second side and above the piezoelectric layer, the projection of the electrode structure on the substrate is located within the projection range of the frequency modulation layer on the substrate, the intermediate layer and the frequency modulation layer are respectively located on both sides of the piezoelectric layer, and the electrode structure and the frequency modulation layer are respectively located on both sides of the piezoelectric layer.
  3. 如权利要求2所述的体声波谐振装置，其特征在于，所述调频层包括凹槽，所述电极结构在所述基底上的投影位于所述凹槽在所述基底上的投影范围内。The bulk acoustic wave resonance device according to claim 2, wherein the frequency modulation layer includes a groove, and the projection of the electrode structure on the substrate is located within the projection range of the groove on the substrate.
  4. 如权利要求2所述的体声波谐振装置，其特征在于，所述调频层的调频区域包括多个凹槽，所述电极结构在所述基底上的投影位于所述调频区域在所述基底上的投影范围内。The bulk acoustic wave resonance device according to claim 2, wherein the frequency modulation region of the frequency modulation layer includes a plurality of grooves, and the projection of the electrode structure on the substrate is located on the frequency modulation region on the substrate. within the projection range.
  5. 如权利要求4所述的体声波谐振装置，其特征在于，多个所述凹槽在所述调频区域内均匀分布。The bulk acoustic wave resonance device according to claim 4, wherein a plurality of grooves are evenly distributed within the frequency modulation area.
  6. 如权利要求2、3或4所述的体声波谐振装置，其特征在于，还包括：温度补偿层，位于所述第二侧且位于所述压电层上，所述压电层和所述调频层分别位于所述温度补偿层两侧。 The bulk acoustic wave resonance device according to claim 2, 3 or 4, further comprising: a temperature compensation layer located on the second side and on the piezoelectric layer, the piezoelectric layer and the The frequency modulation layers are respectively located on both sides of the temperature compensation layer.
  7. 如权利要求2、3或4所述的体声波谐振装置，其特征在于，还包括：温度补偿层，位于所述空腔内且至少覆盖所述电极结构，所述压电层位于所述温度补偿层上。The bulk acoustic wave resonance device according to claim 2, 3 or 4, further comprising: a temperature compensation layer located in the cavity and covering at least the electrode structure, the piezoelectric layer located at the temperature on the compensation layer.
  8. 如权利要求1所述的体声波谐振装置，其特征在于，所述电极结构包括：沿第一方向平行排布的第一总线和第二总线，所述第一总线连接若干沿第二方向平行排布的第一电极条，所述第二总线连接若干沿所述第二方向平行排布的第二电极条，所述第一方向与所述第二方向垂直，所述第一电极条和所述第二电极条交错放置。The bulk acoustic wave resonance device according to claim 1, wherein the electrode structure includes: a first bus line and a second bus line arranged in parallel along the first direction, and the first bus line connects several parallel lines along the second direction. Arranged first electrode strips, the second bus line connects a plurality of second electrode strips arranged in parallel along the second direction, the first direction is perpendicular to the second direction, the first electrode strips and The second electrode strips are staggered.
  9. 如权利要求8所述的体声波谐振装置，其特征在于，所述第一电极条和所述第二电极条的宽度相等；所述第一电极条和所述第二电极条具有第一宽度尺寸，相邻的所述第一电极条的中轴和所述第二电极条的中轴具有第一中心尺寸，所述第一中心尺寸与所述第一宽度尺寸的比值范围为：1.2～20。The bulk acoustic wave resonance device according to claim 8, wherein the widths of the first electrode strip and the second electrode strip are equal; the first electrode strip and the second electrode strip have a first width. size, the central axis of the adjacent first electrode strip and the central axis of the second electrode strip have a first central dimension, and the ratio range of the first central dimension to the first width dimension is: 1.2~ 20.
  10. 如权利要求1所述的体声波谐振装置，其特征在于，所述基底的材料包括：硅、碳化硅、二氧化硅、砷化镓、氮化镓、氧化铝、氧化镁、陶瓷或聚合物。The bulk acoustic wave resonance device according to claim 1, wherein the material of the substrate includes: silicon, silicon carbide, silicon dioxide, gallium arsenide, gallium nitride, aluminum oxide, magnesium oxide, ceramics or polymers .
  11. 如权利要求1所述的体声波谐振装置，其特征在于，所述中间层的材料包括：聚合物、绝缘电介质或多晶硅。The bulk acoustic wave resonance device according to claim 1, wherein the material of the intermediate layer includes: polymer, insulating dielectric or polysilicon.
  12. 如权利要求1所述的体声波谐振装置，其特征在于，所述电极结构的材料包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴和钛中的一种或多种。The bulk acoustic wave resonance device according to claim 1, wherein the electrode structure is made of molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, gold, chromium, cobalt and titanium. of one or more.
  13. 如权利要求2所述的体声波谐振装置，其特征在于，所述调频层的材料包括金属或绝缘电介质；其中金属包括：钼、钌、钨、铂、铱、镁、铝、铍、铜、金、铬、钴或钛；绝缘电介质包括：氮化硅、氧化硅、氧化铝、碳化硅、碳氧化硅、氮化铝、砷化镓或氮化镓。 The bulk acoustic wave resonance device according to claim 2, wherein the material of the frequency modulation layer includes metal or insulating dielectric; wherein the metal includes: molybdenum, ruthenium, tungsten, platinum, iridium, magnesium, aluminum, beryllium, copper, Gold, chromium, cobalt or titanium; insulating dielectrics include: silicon nitride, silicon oxide, aluminum oxide, silicon carbide, silicon oxycarbide, aluminum nitride, gallium arsenide or gallium nitride.
  14. 一种体声波谐振装置的形成方法，其特征在于，包括：A method for forming a bulk acoustic wave resonance device, which is characterized by including:
    提供牺牲基底；Provide a sacrificial substrate;
    在所述牺牲基底上形成压电层；forming a piezoelectric layer on the sacrificial substrate;
    在所述压电层上形成电极结构；forming an electrode structure on the piezoelectric layer;
    在所述压电层上形成牺牲层，所述牺牲层至少覆盖所述电极结构；forming a sacrificial layer on the piezoelectric layer, wherein the sacrificial layer at least covers the electrode structure;
    在所述压电层上形成中间层，所述中间层至少覆盖所述牺牲层，所述中间层包括相对的第一侧和第二侧，所述压电层和所述牺牲基底位于所述第二侧；An intermediate layer is formed on the piezoelectric layer, the intermediate layer at least covers the sacrificial layer, the intermediate layer includes opposite first and second sides, the piezoelectric layer and the sacrificial substrate are located on the second side;
    提供基底；provide a base;
    接合所述基底和所述中间层，所述基底位于所述第一侧；joining the substrate and the intermediate layer, the substrate being located on the first side;
    在接合所述基底和所述中间层之后，去除所述牺牲基底；After bonding the substrate and the intermediate layer, removing the sacrificial substrate;
    在去除所述牺牲基底之后，去除所述牺牲层，在形成空腔嵌入所述中间层内，所述空腔的开口位于所述第二侧，所述电极结构位于所述空腔内。After removing the sacrificial substrate, the sacrificial layer is removed, a cavity is formed and embedded in the intermediate layer, the opening of the cavity is located on the second side, and the electrode structure is located in the cavity.
  15. 如权利要求14所述的体声波谐振装置的形成方法，其特征在于，在去除所述牺牲基底之后，且在去除所述牺牲层之前，还包括：形成调频层，位于所述第二侧，所述电极结构在所述基底上的投影位于所述调频层在所述基底上的投影范围内，所述中间层和所述调频层分别位于所述压电层的两侧，所述电极结构和所述调频层分别位于所述压电层的两侧。The method of forming a bulk acoustic wave resonance device according to claim 14, wherein after removing the sacrificial substrate and before removing the sacrificial layer, the method further includes: forming a frequency modulation layer located on the second side, The projection of the electrode structure on the substrate is located within the projection range of the frequency modulation layer on the substrate, the intermediate layer and the frequency modulation layer are respectively located on both sides of the piezoelectric layer, and the electrode structure and the frequency modulation layer are respectively located on both sides of the piezoelectric layer.
  16. 如权利要求15所述的体声波谐振装置的形成方法，其特征在于，所述调频层包括凹槽，所述电极结构在所述基底上的投影位于所述凹槽在所述基底上的投影范围内。The method of forming a bulk acoustic wave resonance device according to claim 15, wherein the frequency modulation layer includes a groove, and the projection of the electrode structure on the substrate is located at the projection of the groove on the substrate. within the range.
  17. 如权利要求15所述的体声波谐振装置的形成方法，其特征在于，所述调频层的调频区域包括多个凹槽，所述电极结构在所述基底 上的投影位于所述调频区域在所述基底上的投影范围内。The method for forming a bulk acoustic wave resonator device according to claim 15, characterized in that the frequency modulation region of the frequency modulation layer comprises a plurality of grooves, and the electrode structure is disposed on the substrate The projection of the frequency modulation area on the substrate is located within the projection range of the frequency modulation area on the substrate.
  18. 如权利要求17所述的体声波谐振装置的形成方法，其特征在于，多个所述凹槽在所述调频区域内均匀分布。The method for forming a bulk acoustic wave resonator device according to claim 17, characterized in that the plurality of grooves are evenly distributed in the frequency modulation region.
  19. 如权利要求15、16或17所述的体声波谐振装置的形成方法，其特征在于，在形成调频层之前，还包括：形成温度补偿层，位于所述第二侧且位于所述压电层上，所述压电层和所述调频层分别位于所述温度补偿层两侧。The method of forming a bulk acoustic wave resonance device according to claim 15, 16 or 17, characterized in that, before forming the frequency modulation layer, it further includes: forming a temperature compensation layer located on the second side and located on the piezoelectric layer. On the temperature compensation layer, the piezoelectric layer and the frequency modulation layer are respectively located on both sides of the temperature compensation layer.
  20. 如权利要求15、16或17所述的体声波谐振装置的形成方法，其特征在于，在形成所述电极结构之后，还包括：在形成所述牺牲层之前，形成温度补偿层，位于所述压电层上且至少覆盖所述电极结构；所述牺牲层覆盖所述温度补偿层；以及在去除所述牺牲层之后，所述温度补偿层位于所述空腔内。The method for forming a bulk acoustic wave resonance device according to claim 15, 16 or 17, wherein after forming the electrode structure, it further includes: before forming the sacrificial layer, forming a temperature compensation layer located on the The piezoelectric layer is on and covers at least the electrode structure; the sacrificial layer covers the temperature compensation layer; and after the sacrificial layer is removed, the temperature compensation layer is located in the cavity.
  21. 如权利要求14所述的体声波谐振装置的形成方法，其特征在于，所述电极结构包括：沿第一方向平行排布的第一总线和第二总线，所述第一总线连接若干沿第二方向平行排布的第一电极条，所述第二总线连接若干沿所述第二方向平行排布的第二电极条，所述第一方向与所述第二方向垂直，所述第一电极条和所述第二电极条交错放置。The method for forming a bulk acoustic wave resonator device as described in claim 14 is characterized in that the electrode structure includes: a first bus and a second bus arranged in parallel along a first direction, the first bus connects a plurality of first electrode strips arranged in parallel along a second direction, the second bus connects a plurality of second electrode strips arranged in parallel along the second direction, the first direction is perpendicular to the second direction, and the first electrode strips and the second electrode strips are staggered.
  22. 如权利要求21所述的体声波谐振装置的形成方法，其特征在于，所述第一电极条和所述第二电极条的宽度相等；所述第一电极条和所述第二电极条具有第一宽度尺寸，相邻的所述第一电极条的中轴和所述第二电极条的中轴具有第一中心尺寸，所述第一中心尺寸与所述第一宽度尺寸的比值范围为：1.2～20。 The method of forming a bulk acoustic wave resonance device according to claim 21, wherein the width of the first electrode strip and the second electrode strip are equal; the first electrode strip and the second electrode strip have The first width dimension, the central axis of the adjacent first electrode strip and the central axis of the second electrode strip have a first central dimension, and the ratio range of the first central dimension to the first width dimension is :1.2～20.
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