WO2024045467A1 - Method for manufacturing semiconductor structure and semiconductor structure - Google Patents

Abstract

The present disclosure relates to the field of semiconductors, and provides a method for manufacturing a semiconductor structure and a semiconductor structure. The method for manufacturing a semiconductor structure comprises: forming a first thin film layer having an oxyphilic element on the surface of a provided substrate by using a first thin film deposition process; performing surface treatment on the first thin film layer to inhibit oxidation of the first thin film layer; and by using a second thin film deposition process different from the first thin film deposition process, forming a second thin film layer on the surface of the first thin film layer having undergone the surface treatment.

Description

Manufacturing method of semiconductor structure and semiconductor structure

This disclosure is based on a Chinese patent application with application number 202211056556.3, the filing date is August 31, 2022, and the application name is "Manufacturing Method of Semiconductor Structure and Semiconductor Structure", and claims the priority of the Chinese patent application. The Chinese patent The entire contents of this application are hereby incorporated by reference into this disclosure.

Technical field

Embodiments of the present disclosure relate to, but are not limited to, a method of manufacturing a semiconductor structure and a semiconductor structure.

Background technique

With the rapid development of semiconductor manufacturing technology, semiconductor devices are developing towards higher integration, and the performance of semiconductor devices is becoming more and more excellent, with faster computing speed, larger data storage capacity and more functions. In the field of semiconductor In the device structure, multiple stacked material layers are often formed through different deposition processes. Therefore, how to control the contact interface properties between material layers in the semiconductor manufacturing process and control the film layer from being easily deformed, thereby ensuring the electrical performance of the semiconductor device. and yield rate are issues that those skilled in the art need to solve urgently.

Contents of the invention

The following is an overview of the subject matter described in detail in this disclosure. This summary is not intended to limit the scope of the claims.

Embodiments of the present disclosure provide a manufacturing method of a semiconductor structure and a semiconductor structure.

According to a first aspect of the present disclosure, an embodiment of the present disclosure provides a method for manufacturing a semiconductor structure, including: providing a substrate; using a first thin film deposition process to form a first thin film layer on the surface of the substrate, wherein the first thin film layer is formed on the surface of the substrate. A thin film layer has an oxygen-loving element; surface treatment is performed on the first thin film layer to inhibit oxidation of the first thin film layer; a second thin film deposition process different from the first thin film deposition process is used, in the A second film layer is formed on the surface of the first film layer after surface treatment.

In some embodiments, before performing the second thin film deposition process and after performing surface treatment on the first thin film layer, at least the semiconductor structure on which the first thin film layer is formed is placed in a nitrogen atmosphere.

In some embodiments, the oxygen-loving element includes silicon, and/or aluminum.

In some embodiments, the material of the first thin film layer is at least one of TiSiN, TiAlN, TiSiAl, TiAlC, TaSiN, TaAlN, and TaAlC.

In some embodiments, the step of surface treatment of the first thin film layer includes: etching back to remove part of the thickness of the first thin film layer, and reducing the content of the oxygen-loving elements on the surface of the first thin film layer, to inhibit oxidation of the first thin film layer.

In some embodiments, the etching liquid in the etching back process is a mixed liquid of NH ₄ OH, H ₂ O ₂ and H ₂ O, where the volume ratio of NH ₄ OH, H ₂ O ₂ and H ₂ O is It is 1: (1～10): (20～50).

In some embodiments, the step of surface treating the first thin film layer includes: nitriding the surface of the first thin film layer with ammonia gas to inhibit oxidation of the first thin film layer, wherein: The treatment temperature of the nitriding treatment is 300°C to 450°C, and the flow rate of ammonia gas is 2000sccm to 3000sccm.

In some embodiments, the step of surface treating the first film includes: cleaning the surface of the first film layer with an acidic solution with a concentration of less than or equal to 1% to inhibit oxidation of the first film layer. .

In some embodiments, the second thin film layer is a metal layer, and the deposition temperature of the metal layer is greater than or equal to 500°C.

In some embodiments, the first thin film deposition process is one of a chemical vapor deposition process, a physical vapor deposition process, a physical and chemical vapor deposition process, or an atomic layer deposition process; and the second thin film deposition process is a chemical vapor deposition process. , one of the physical vapor deposition process, physical chemical vapor deposition or atomic layer deposition process.

In some embodiments, the second thin film layer contains metal elements; before forming the second thin film layer, the method further includes: forming a transition layer on the surface of the first thin film layer, the transition layer containing the oxygen-loving elements as well as the metallic elements.

According to the second aspect of the present disclosure, embodiments of the present disclosure also provide a semiconductor structure, which is manufactured by the manufacturing method described in the first aspect of the present disclosure. The semiconductor structure includes: a substrate; a first thin film layer, Located on the surface of the substrate, the first film layer has an oxygen-loving element; and the second film layer is located on the surface of the first film layer.

In some embodiments, the material of the first thin film layer is at least one of TiSiN, TiAlN, TiSiAl, TiAlC, TaSiN, TaAlN, and TaAlC.

In some embodiments, there is a polysilicon layer between the substrate and the first thin film layer, the first thin film layer includes a TiSiN layer, and the second thin film layer includes a metal layer, wherein the polysilicon layer, TiSiN layer, and the metal layer together form part of the gate structure.

In some embodiments, there is a polysilicon layer between the substrate and the first thin film layer, the first thin film layer includes a TiAlN layer, and the second thin film layer includes a metal layer, wherein the polysilicon layer, the The TiAlN layer and the metal layer together form a part of the gate structure. The technical solution provided by the embodiments of the present disclosure has at least the following advantages:

In the manufacturing method of a semiconductor structure provided by embodiments of the present disclosure, a first thin film deposition process is used to form a first thin film layer. The first thin film layer contains oxygen-loving elements, and the oxygen-loving elements are easily oxidized to form oxides; for the formed first thin film Surface treatment of the first film layer can remove oxides formed on the surface of the first film layer due to the oxidation of oxygen-loving elements, reduce the oxygen content on the surface of the first film layer, and inhibit the continued oxidation of the first film layer. When the second thin film deposition process of the thin film deposition process forms the second thin film layer, it can effectively improve the interface performance between the first thin film layer and the second thin film oxide layer, avoid the occurrence of the interface layer, and avoid causing deformation of the second thin film layer. , thereby improving the performance of the stacked layer and ensuring the performance of the semiconductor device. For example, in the semiconductor structure provided by the embodiments of the present disclosure, when the semiconductor first thin film layer and the second thin film layer are used as part of the gate structure, the interface performance between the layers of the gate structure is good, ensuring the performance of the gate structure. , the sidewalls on the side walls of the gate structure can provide good protection for the side walls of the gate structure.

Other aspects will be apparent after reading and understanding the drawings and detailed description.

Description of drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the disclosure and, together with the description, serve to explain principles of the embodiments of the disclosure. In the drawings, similar reference numbers are used to identify similar elements. The drawings in the following description are of some, but not all, embodiments of the disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without exerting creative efforts.

Figure 1 is a schematic structural diagram corresponding to a manufacturing method of a semiconductor structure;

2 to 7 are structural schematic diagrams corresponding to each step of a method for manufacturing a semiconductor structure provided by an exemplary embodiment of the present disclosure;

FIG. 8 is a schematic structural diagram of a semiconductor structure provided by an exemplary embodiment of the present disclosure.

Explanation of reference symbols:

100. Substrate; 101. Polysilicon layer; 102. Oxide layer; 103. First thin film layer; 104. Second thin film layer; 105. Transition layer; 21. First thin film deposition process; 22. Etch back; 23. Nitrogen Chemical treatment; 24. Cleaning treatment; 25. Second thin film deposition process; 200. Semiconductor structure.

Detailed ways

The technical solutions in the disclosed embodiments will be clearly and completely described below with reference to the accompanying drawings in the disclosed embodiments. Obviously, the described embodiments are part of the embodiments of the present disclosure, rather than all of the embodiments. Based on the embodiments in this disclosure, all other embodiments obtained by those skilled in the art without making creative efforts fall within the scope of protection of this disclosure. It should be noted that, as long as there is no conflict, the embodiments and features in the embodiments can be arbitrarily combined with each other.

It can be known from the background technology that when stacked film layers are currently formed through different deposition processes, the first film layer and the second film layer have an interface layer, and the contact interface performance is not ideal, and the second film layer is deformed.

Figure 1 is a schematic structural diagram corresponding to a manufacturing method of a semiconductor structure. Referring to Figure 1, a substrate 10 is provided; a polysilicon layer 11, a first thin film layer 12 and a second thin film layer 13 are sequentially formed on the substrate 10, wherein the first thin film layer 12 and the second thin film layer 13 are formed using different deposition processes. The first thin film layer 12 has oxygen-loving elements. The deposition process to form the first thin film layer 12 may be chemical vapor deposition (CVD, Chemical Vapor Deposition), and the deposition process to form the second thin film layer 13 may be a physical vapor deposition process (PVD, Physical Vapor Deposition).

The first thin film layer 12 has oxygen-loving elements, and the deposition processes used in the first thin film layer 12 and the second thin film layer 13 are different, so the chambers used to form the first thin film layer 12 and the second thin film layer 13 are different, which may easily lead to During the transfer of the formed first thin film layer 12 to the chamber for forming the second thin film layer 13, the first thin film layer 12 is oxidized in contact with the air, thereby forming oxides on the surface of the first thin film layer 12, thereby causing the first thin film layer 13 to form. There is an interface layer between the layer 12 and the second film layer 13. The contact interface performance between the first film layer 12 and the second film layer 13 is not ideal, the adhesion is insufficient, and the second film layer 13 is deformed. For example, when the first thin film layer 12 is a TiSiN layer, the oxygen-loving element is silicon. After the TiSiN layer comes into contact with air, silicon oxide will be formed on the surface of the TiSiN layer, which will cause the TiSiN layer and the second thin film layer 13 to not be in close contact. The second thin film layer 13 is deformed. In some embodiments, the second thin film layer 13 may be a metal layer, and the deposition temperature of the metal layer is greater than or equal to 500°C. For example, the deposition temperature of the metal layer may be 500°C, 510°C, or 520°C. Due to the deposition process of the metal layer A relatively high temperature will cause the silicon element at the contact interface between the first thin film layer 12 and the metal layer to be oxidized, thereby affecting the interface properties between the first thin film layer 12 and the metal layer, causing the metal layer to deform.

The present disclosure provides a method for manufacturing a semiconductor structure. A first thin film deposition process is used to form a first thin film layer. The first thin film contains oxygen-loving elements, and the oxygen-loving elements are easily oxidized to form oxides; the formed first thin film layer is Surface treatment, in this way, can improve the oxide on the surface of the first thin film layer and inhibit the oxidation of the first thin film oxide layer; use a second thin film deposition process that is different from the first thin film deposition process to form the second thin film layer, that is, the first thin film The first thin film layer and the second thin film layer are not carried out in the same process in order to control the growth of the first thin film layer, and perform surface treatment on the first thin film layer before forming the second thin film layer. To improve the interface performance between the film layers, reduce the oxygen content of the first film layer, and inhibit the oxidation of the first film oxide layer, the second film layer is not easily deformed, so as to improve the electrical performance and yield of the formed semiconductor structure.

2 to 7 are structural schematic diagrams corresponding to each step of a method for manufacturing a semiconductor structure provided by an embodiment of the present disclosure.

Referring to Figure 2, a substrate 100 is provided.

The substrate 100 may be a silicon substrate, a germanium substrate, a silicon germanium substrate, a silicon carbide substrate, a silicon-on-insulator (SOI, Silicon-On-Insulator) or a germanium-on-insulator (GOI, Germanium-On-Insulator), etc. The substrate 100 may be It is a substrate 100 including other element semiconductors or compound semiconductors, such as gallium arsenide (GaAs), indium phosphide (InP) or silicon carbide (SiC). In some embodiments, the material of the substrate 100 may be silicon, the polysilicon layer 101 may be formed on the substrate 100, and the material of the polysilicon layer 101 may be polysilicon. In some embodiments, the material of the polysilicon layer 101 may be polysilicon doped with N-type ions, and the N-type ions may be P ions, As ions or Sb ions. In other embodiments, the material of the polysilicon layer 101 may also be polysilicon doped with P-type ions, and the P-type ions may be B ions, Ga ions or In ions.

In some embodiments, an oxide layer 102 may also be formed between the substrate 100 and the polysilicon layer 101 . The material of the oxide layer 102 may be silicon dioxide (SiO ₂ ). The oxide layer 102 may be formed through processes such as chemical vapor deposition, physical vapor deposition, and plating. The oxide layer 102 may cover the entire surface of the substrate 100 . In other embodiments, the material of the oxide layer 102 may also be silicon oxynitride. In addition, a high-k dielectric layer can be formed on the surface of the oxide layer 102. The material of the high-k dielectric layer is a material with a relative dielectric constant greater than that of silicon oxide. When forming a gate structure, the oxide layer 102 can serve as a gate electrode. oxide layer.

Referring to FIG. 3 , a first thin film deposition process 21 is used to form a first thin film layer 103 on the surface of the substrate 100 , and the first thin film layer 103 has an oxygen-loving element.

In some embodiments, the first thin film deposition process 21 may be one of a chemical vapor deposition process, a physical vapor deposition process, a physical chemical vapor deposition (HPCVD, Hybrid Physical Chemical Vapor Deposition) or an atomic layer deposition process.

In some embodiments, the first thin film deposition process 21 is, for example, a chemical vapor deposition process. Chemical vapor deposition is used to form the first thin film layer 103 , which can make the generated first thin film layer 103 relatively dense, uniform in thickness, and of relatively high quality. Stablize.

It can be understood that in some embodiments, the oxygen-loving element may include silicon and/or aluminum, and the first thin film layer 103 can easily react with oxygen and water vapor in the air to form silicon-containing oxides and/or aluminum. The oxide will cause an interface layer to exist between the subsequently formed second thin film layer and the first thin film layer 103 , affecting the interface properties between the second thin film layer and the first thin film layer 103 . In some embodiments, the material of the first thin film layer 103 may include, for example, at least one of TiSiN, TiAlN, TiSiAl, TiAlC, TaSiN, TaAlN, and TaAlC.

In some embodiments, the first thin film layer 103 is a TiSiN layer, and the TiSiN layer serves as a diffusion barrier layer. The first thin film layer 103 can block the diffusion of doped ions in the polysilicon layer 101 to the subsequently formed metal layer. On the other hand, It can also prevent metal ions in the subsequently formed second thin film layer from diffusing into the polysilicon layer 101 . The TiSiN layer formed using the chemical vapor deposition process 21 also has the following advantages: the TiSiN layer is relatively hard and is not prone to deformation. It can be understood that when other thin film layers are subsequently formed on the surface of the TiSiN layer through additional processes, the TiSiN layer has oxygen-loving element silicon. Therefore, when the TiSiN layer switches from one process process to another, the surface of the TiSiN layer is When exposed to oxygen and water vapor in the air, the TiSiN layer is oxidized so that silicon-containing oxides and other compounds are easily formed on the surface of the TiSiN layer. These compounds will affect the interface properties between the TiSiN layer and the subsequently formed second film layer. Therefore, The surface of the TiSiN layer will be processed later.

In some embodiments, the process steps of forming the TiSiN layer may include: performing at least 2 cycle steps to form the TiSiN layer; wherein each cycle step includes: sequentially forming a stacked TiN layer (not shown) and a SiN layer ( (not shown), in each cycle step, the TiN layer chemically reacts with the SiN layer to form TiSiN.

After one cycle step is completed to form the stacked TiN layer and the SiN layer, the cycle step is repeated 1 to 4 times, so that the multi-layer stacked TiN layer and the SiN layer can fully react to form the TiSiN layer.

Subsequent steps include: performing surface treatment on the first thin film layer 103 to inhibit oxidation of the first thin film layer 103 . The surface treatment method for the first thin film layer 103 may include: etching back, nitriding with ammonia gas, or cleaning with an acidic solution with a concentration of less than or equal to 1%. The processing method of the first thin film layer 103 will be described in detail below.

Referring to FIG. 4 , in some embodiments, the step of surface treatment of the first thin film layer 103 may include: etching back 22 to remove part of the thickness of the first thin film layer 103 and reducing the content of oxygen-loving elements on the surface of the first thin film layer 103 . , to inhibit oxidation of the first thin film layer 103 .

The etching liquid in the etching back process 22 is a mixture of NH ₄ OH, H ₂ O ₂ and H ₂ O. The volume ratio of NH ₄ OH, H ₂ O ₂ and H ₂ O is 1: (1～10 ): (20～50), for example, the volume ratio of NH ₄ OH, H ₂ O ₂ and H ₂ O can be 1:2:20, 1:4:40 or 1:5:50. When the etching solution is within the above range, by etching back a certain thickness of the first thin film layer 103, the oxide on the surface of the first thin film layer 103 is corroded and reacts with the oxygen-loving elements on the surface of the first thin film layer 103 to cause adhesion. The oxide particles on the surface of the first thin film layer 103 fall into the etching solution, thereby reducing the content of oxygen-loving elements on the surface of the first thin film layer 103 , thereby achieving the purpose of inhibiting oxidation of the first thin film layer 103 .

Referring to FIG. 5 , in other embodiments, the step of surface treatment of the first thin film layer 103 may also include: using ammonia gas to perform nitriding treatment 23 on the surface of the first thin film layer 103 to inhibit the formation of the first thin film layer 103 . Oxidation.

In some embodiments, the treatment temperature of the nitriding treatment 23 may be 300°C to 450°C, and the treatment temperature may be 320°C, 350°C, 400°C or 450°C; the flow rate of ammonia gas is 2000 sccm to 3000 sccm, for example, ammonia gas The flow rate can be 2000sccm, 2500sccm or 3000sccm. The process parameters of the nitriding treatment 23 may also include: the power supply is 450W to 550W, for example, the power supply can be 450W, 500W or 550W; the processing time is 25s to 35s, for example, the processing time can be 25s, 30s or 35s.

Ammonia (NH ₃ ) is a reducing gas that can nitride the oxygen-loving elements on the surface of the first thin film layer 103. When the ammonia gas within the above range is used to process the first thin film layer 103, it can interact with the oxygen-loving elements. After the reaction, the elements are converted into gaseous nitrides for removal. On the other hand, ammonia gas can inhibit the oxygen atom groups from continuing to oxidize the oxygen-loving elements. In this way, the oxidation of the first thin film layer 103 can be fully inhibited.

In some embodiments, the first thin film layer 103 is a TiSiN layer. Using ammonia gas to nitride the TiSiN layer 23 also has the following advantages: the ammonia gas can carry chloride ions out of the cavity that were not removed in the aforementioned step of forming the TiSiN layer. chamber, and inhibit chloride ions from passing through the TiSiN layer and reacting with the polysilicon layer 101 to form silicon chloride.

Referring to FIG. 6 , the step of surface treatment of the first thin film layer 103 may also include: cleaning 24 the surface of the first thin film layer 103 with an acidic solution having a concentration of less than or equal to 1% to inhibit oxidation of the first thin film layer 103 .

In some embodiments, when the first thin film layer 103 is a TiSiN layer, the oxygen-loving element is silicon, and the oxide generated after the first thin film layer 103 is oxidized is SiO ₂ ; the acidic solution with a concentration of less than or equal to 1% can be DHF cleaning solution. The materials of the DHF cleaning solution include: HF and water. The cleaning selectivity ratio of the DHF cleaning solution for the TiSiN layer and silicon oxide can be 200:1. HF dissolves the oxides attached to the surface of the TiSiN layer by reacting with the oxides. , and inhibit the regeneration of oxides. The specific reaction formula is as follows:

SiO ₂ +4HF＝SiF ₄ ↑+2H ₂ O (1)

It can be understood that through the preparation method provided by the embodiment of the present disclosure, after surface treatment of the first thin film layer 103, the oxygen content on the surface of the first thin film layer 103 is less than 0.01%. Correspondingly, the first thin film layer 103 is TiSiN layer, TiAlN layer, TiSiAl layer, TiAlC layer, TaSiN layer, TaAlN layer, TaAlC layer, the oxygen content on the surface of these layers is less than 0.01%, without forming excess interface layers. After the second film layer is formed in subsequent steps, the contact interface performance between the second film layer and the first film layer 103 is ideal, the second film layer and the first film layer 103 are in close contact, and the second film layer is not easily deformed.

It can be understood that the surface treatment method for the first thin film layer 103 may include any one or a combination of the above-mentioned etching back 22, nitriding treatment 23 or cleaning treatment 24.

In some embodiments, as shown in FIG. 7 , subsequent steps include using a second thin film deposition process 25 different from the first thin film deposition process 21 to form a second thin film layer 104 on the surface of the first thin film layer 103 , where the first The formation processes of the thin film layer 103 and the second thin film layer 104 are different, so the chambers used to form the first thin film layer 103 and the second thin film layer 104 are also different. In order to inhibit the transfer of the semiconductor structure formed with the first thin film layer 103 to the formation of the second During the chamber process of the thin film layer 104, the first thin film layer 103 contacts air so that an oxide is formed on the surface, resulting in the formation of an interface layer between the first thin film oxide layer 103 and the second thin film layer 104. In some embodiments, after performing the Before the second thin film deposition process 25, after surface treatment of the first thin film layer 103, at least the semiconductor structure on which the first thin film layer 103 is formed can be placed in a nitrogen atmosphere to prevent the first thin film layer 103 from being oxidized to generate oxides. , thereby affecting the quality of the contact interface between the first thin film layer 103 and the subsequently generated second thin film layer 104 .

Referring to FIG. 7 , a second thin film deposition process 25 different from the first thin film deposition process 21 is used to form a second thin film layer 104 on the surface of the first thin film layer 103 after surface treatment.

A second thin film deposition process 25 different from the first thin film deposition process 21 is adopted. In some embodiments, the second thin film deposition process 25 may be a chemical vapor deposition process, a physical vapor deposition process, a physical chemical vapor deposition or an atomic layer deposition process. one of them. In some embodiments, the second thin film layer 104 is a metal layer, and the deposition temperature of the metal layer is greater than or equal to 500°C. For example, the deposition temperature of the metal layer may be 500°C, 510°C, or 520°C. The deposition process of using a higher metal layer is relatively high. The higher temperature will cause the silicon element at the contact interface between the first thin film layer 103 and the metal layer to be oxidized, thereby affecting the interface performance between the first thin film layer 103 and the metal layer, resulting in Metal layer deformation, through the method provided by the embodiment of the present disclosure, can adapt to the use of higher temperatures to deposit the metal layer, and effectively suppress the oxidation of the interface between the first thin film layer 103 and the second thin film layer 104, improving the interface between the two. performance.

The material of the second thin film layer 104 may include copper (Cu), tungsten (W), aluminum (Al), silver (Ag), gold (Au), platinum (Pt), iron (Fe), cobalt (Co), nickel (Ni), molybdenum (Mo), titanium (Ti), vanadium (V), chromium (Cr), tungsten nitride (WN), tungsten carbide nitride (WCN), ruthenium (Ru), titanium nitride (TiN) of at least one.

It can be understood that the second thin film layer 104 contains metal elements. Before forming the second thin film layer 104, it may also include forming a transition layer 105 on the surface of the first thin film layer 103. The transition layer 105 contains oxygen-loving elements and metal elements. In some embodiments, when the first thin film layer is a TiSiN layer and the second thin film layer 104 is a tungsten layer, the transition layer 105 contains silicon element and tungsten element. Due to the presence of oxygen-loving elements and metal elements, when the transition layer 105 connects the first thin film layer 103 and the second thin film layer 104, the transition layer 105 has a better interface improvement effect, so that the second thin film layer 104 formed is less likely to deform. .

The manufacturing method of a semiconductor structure provided by an embodiment of the present disclosure uses a first thin film deposition process 21 to form the first thin film layer 103, and before forming the second thin film layer 104, an etching back 22, a nitriding process 23 or a cleaning process 24 is used. The surface of the first thin film layer 103 is treated in a manner to reduce the oxygen content on the surface of the first thin film layer 103, inhibit the oxidation of the first thin film layer 103, and eliminate the interface layer, and then form the second thin film layer 104 through the second thin film deposition process 25. , there is a better contact interface between the first thin film layer 103 and the second thin film layer 104, and the second thin film layer 104 is less likely to deform, thereby improving the electrical performance and yield of the semiconductor structure.

An exemplary embodiment of the present disclosure also provides a semiconductor structure, which can be formed by the manufacturing method of the semiconductor structure provided in the previous embodiment. The semiconductor structure provided by another embodiment of the present disclosure will be described in detail below with reference to the accompanying drawings. For parts that are the same as or corresponding to the previous embodiment, reference can be made to the corresponding description of the previous embodiment and will not be described in detail below. FIG. 8 is a schematic structural diagram corresponding to a semiconductor structure provided by another embodiment of the present disclosure.

Referring to FIG. 8 , the semiconductor structure 200 includes: a substrate 100 , a first thin film layer 103 and a second thin film layer 104 . The first thin film layer 103 is located on the surface of the substrate 100 , and the first thin film layer 103 has an oxygen-loving element. The second thin film layer 104 is located on the surface of the first thin film layer 103 . The oxygen content of the first thin film layer 103 is less than 0.01%, and the thickness of the first thin film layer 103 is 2 to 50 nm, such as 5 nm, 10 nm, 15 nm, or 20 nm. The first thin film layer 103 has relatively few oxides, and the contact interface between the first thin film layer 103 and the second thin film layer 104 is ideal.

In some embodiments, a polysilicon layer 101 is provided on the substrate 100 , and the polysilicon layer 101 is located between the substrate 100 and the first thin film layer 103 .

In some embodiments, an oxide layer 102 may also be disposed between the substrate 100 and the polysilicon layer 101 .

The material of the first thin film layer 103 may be at least one of TiSiN, TiAlN, TiSiAl, TiAlC, TaSiN, TaAlN, and TaAlC.

In some embodiments, the first thin film layer 103 includes a TiSiN layer, the second thin film layer 104 includes a metal layer, and the polysilicon layer 101, the TiSiN layer, and the metal layer together form a part of the gate structure. The TiSiN layer has the function of preventing the mutual diffusion of ions in the polysilicon layer 101 and metal ions in the metal layer. The surface of the TiSiN layer formed by the method provided in the previous embodiment has good interface properties with the surface of the metal layer, and the metal layer is not easily deformed. The possibility of poor contact between the gate and the gate contact plug is reduced, and the electrical performance and yield of forming the peripheral gate are improved.

In some embodiments, the first thin film layer 103 may be a TiAlN layer, and the second thin film layer 104 may be a metal layer. The polysilicon layer 101, the TiAlN layer and the metal layer together form a part of the gate structure. Since the TiNAl layer contains aluminum elements, Adjusting the aluminum element content in the TiAlN layer can adjust the work function of the gate structure.

In some embodiments, the material of the first thin film layer 103 can also be at least one of TiSiAl, TiAlC, TiAlN, TaAlN, and TaAlC, and the second thin film layer 104 can be a metal layer. Correspondingly, the first thin film layer 103 Together with the metal layer, it forms part of the gate structure. The first thin film layer 103 contains an aluminum element, so that the work function of the gate structure can be adjusted by adjusting the content of the aluminum element in the first thin film layer 103 .

In other embodiments, the polysilicon layer 101, the first thin film layer 103 and the second thin film layer 104 serve as gate electrodes, and the second thin film layer 104 also has a protective layer (not shown) on the surface to process the semiconductor using an etching process. In the step of forming the gate structure 200 , the protective layer can protect portions of the semiconductor structure 200 that are not expected to be etched.

In some embodiments, a transition layer 105 may be provided between the first thin film layer 103 and the second thin film layer 104. The transition layer 105 contains oxygen-loving elements and metal elements. The arrangement of the oxygen-loving elements assists the transition layer 105 to connect with the first thin film layer 104. The combination of the thin film layer 103 and the arrangement of metal elements assist the combination of the transition layer 105 and the second thin film layer 104, so that the contact interface between the transition layer 105 and the first thin film layer 103 and the second thin film layer 104 is relatively good.

In other embodiments, the polysilicon layer 101 may include an N-type doped region, a P-type doped region, and an intrinsic region. The intrinsic region is located between the N-type doped region and the P-type doped region. The N-type doped region The region may be doped with P ions, the P-type doped region may be doped with B ions, and the material of the polysilicon layer 101 may be polysilicon. Due to the shrinkage of the semiconductor structure 200, the thickness of the oxide layer 102 is also thinner. Therefore, electrons near the interface on the side of the oxide layer 102 close to the polysilicon layer 101 are easily attracted to the side of the polysilicon layer 101, resulting in a gap between the oxide layer 102 and the polysilicon layer 101. A depletion layer (polysilicon depletion effect) is formed at the interface, and the formation of the depletion layer can be suppressed by doping the N-type doped region and the P-type doped region with P ions and B ions respectively; when the first thin film layer 103 When it is a TiSiN layer, the TiSiN layer can prevent B ions in the P-type doped region from diffusing to the N-type doped region through the TiSiN layer, and prevent P ions in the N-type doped region from diffusing through the TiSiN layer to the P-type doped region.

The semiconductor structure 200 provided by the embodiment of the present disclosure includes: a substrate 100, a first thin film layer 103 located on the surface of the substrate 100, and a second thin film layer 104 located on the surface of the first thin film layer 103, wherein the substrate 100 and the first thin film layer 103 A polysilicon layer 101 is also formed in between. The first thin film layer 103 can prevent the doped ions in the polysilicon layer 101 from diffusing into the second thin film layer 104 and prevent the metal ions in the second thin film layer 104 from diffusing into the polysilicon layer 101 , and the oxygen content of the first thin film layer 103 is less than 0.01% without producing an excess interface layer. The quality of the contact interface between the first thin film layer 103 and the second thin film layer 104 is better, and the second thin film layer 104 is not easily deformed. , and then the semiconductor structure 200 has better electrical performance and yield. For example, when the polysilicon layer 101, the first thin film layer 103 and the second thin film layer 104 serve as the gate structure, the interface performance between the first thin film layer 103 and the second thin film layer 104 is good, reducing the conductive insertion between the gate structure and the gate electrode. This eliminates the possibility of poor contact and improves the yield of the gate structure.

Each embodiment or implementation mode in this specification is described in a progressive manner. Each embodiment focuses on its differences from other embodiments. The same and similar parts between various embodiments can be referred to each other.

In the description of this specification, reference to the description of the terms "embodiments," "exemplary embodiments," "some embodiments," "illustrative embodiments," "examples," etc. is intended to be described in connection with the embodiments or examples. A specific feature, structure, material, or characteristic is included in at least one embodiment or example of the present disclosure.

In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

In the description of the present disclosure, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. The indicated orientation or positional relationship is based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing the present disclosure and simplifying the description. It does not indicate or imply that the indicated device or element must have a specific orientation or a specific orientation. construction and operation, and therefore should not be construed as limitations on the present disclosure.

It will be understood that the terms "first", "second", etc. used in this disclosure may be used to describe various structures in this disclosure, but these structures are not limited by these terms. These terms are used only to distinguish one structure from another.

In one or more of the figures, identical elements are designated with similar reference numbers. For the sake of clarity, various parts of the figures are not drawn to scale. Additionally, some well-known parts may not be shown. For the sake of simplicity, the structure obtained after several steps can be described in one figure. Many specific details of the present disclosure are described below, such as device structures, materials, dimensions, processing processes and techniques, to provide a clearer understanding of the present disclosure. However, as one skilled in the art will appreciate, the present disclosure may be practiced without these specific details.

Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present disclosure, but not to limit it; although the present disclosure has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that it can still be used Modifications are made to the technical solutions described in the foregoing embodiments, or equivalent substitutions are made to some or all of the technical features; however, these modifications or substitutions do not cause the essence of the corresponding technical solutions to depart from the scope of the technical solutions of the embodiments of the present disclosure.

Industrial applicability

In the manufacturing method of a semiconductor structure provided by embodiments of the present disclosure, a first thin film deposition process is used to form a first thin film layer. The first thin film layer contains oxygen-loving elements, and the oxygen-loving elements are easily oxidized to form oxides; for the formed first thin film Surface treatment of the first film layer can remove oxides formed on the surface of the first film layer due to the oxidation of oxygen-loving elements, reduce the oxygen content on the surface of the first film layer, and inhibit the continued oxidation of the first film layer. When the second thin film deposition process of the thin film deposition process forms the second thin film layer, it can effectively improve the interface performance between the first thin film layer and the second thin film oxide layer, avoid the occurrence of the interface layer, and avoid causing deformation of the second thin film layer. , thereby improving the performance of the stacked layer and ensuring the performance of the semiconductor device. In the semiconductor structure provided by the embodiment of the present disclosure, when the semiconductor first thin film layer and the second thin film layer are used as part of the gate structure, the interface performance between the layers of the gate structure is good, ensuring the performance of the gate structure, and the gate structure has good performance. The sidewalls on the side walls of the gate structure can provide good protection for the side walls of the gate structure.

Claims (15)

1. A method of manufacturing a semiconductor structure, the manufacturing method comprising:

   provide a base;

   Using a first thin film deposition process, a first thin film layer is formed on the surface of the substrate, wherein the first thin film layer has an oxygen-loving element;

   Perform surface treatment on the first thin film layer to inhibit oxidation of the first thin film layer;

   Using a second thin film deposition process that is different from the first thin film deposition process, a second thin film layer is formed on the surface of the first thin film layer after surface treatment.
2. The method of manufacturing a semiconductor structure according to claim 1, wherein before performing the second thin film deposition process and after performing surface treatment on the first thin film layer, at least the semiconductor structure formed with the first thin film layer is placed on in nitrogen atmosphere.
3. The method of manufacturing a semiconductor structure according to claim 1 or 2, wherein the oxygen-loving element includes silicon and/or aluminum.
4. The method of manufacturing a semiconductor structure according to claim 3, wherein the material of the first thin film layer is at least one of TiSiN, TiAlN, TiSiAl, TiAlC, TaSiN, TaAlN, and TaAlC.
5. The manufacturing method of a semiconductor structure according to claim 4, wherein the step of surface treatment of the first thin film layer includes: etching back to remove a part of the thickness of the first thin film layer, reducing the thickness of the first thin film layer. The content of the oxygen-loving elements on the surface is to inhibit the oxidation of the first thin film layer.
6. The manufacturing method of a semiconductor structure according to claim 5, wherein the etching liquid in the etching back process is a mixed liquid of NH ₄ OH, H ₂ O ₂ and H ₂ O, wherein NH ₄ OH, H ₂ The volume ratio of O ₂ and H ₂ O is 1: (1～10): (20～50).
7. The method of manufacturing a semiconductor structure according to claim 4, wherein the step of surface treating the first thin film layer includes: using ammonia gas to nitride the surface of the first thin film layer to suppress the Oxidation of a thin film layer, wherein the processing temperature of the nitriding treatment is 300°C to 450°C, and the flow rate of ammonia gas is 2000sccm to 3000sccm.
8. The manufacturing method of a semiconductor structure according to claim 4, wherein the step of surface treatment of the first thin film layer includes: cleaning the surface of the first thin film layer using an acidic solution with a concentration of less than or equal to 1%, to inhibit oxidation of the first thin film layer.
9. The method of manufacturing a semiconductor structure according to claim 1, wherein the second thin film layer is a metal layer, and the deposition temperature of the metal layer is greater than or equal to 500°C.
10. The method of manufacturing a semiconductor structure according to claim 1, wherein the first thin film deposition process is one of a chemical vapor deposition process, a physical vapor deposition process, a physical chemical vapor deposition or an atomic layer deposition process;

    The second thin film deposition process is one of a chemical vapor deposition process, a physical vapor deposition process, a physical and chemical vapor deposition process, or an atomic layer deposition process.
11. The method of manufacturing a semiconductor structure according to claim 1, wherein the second thin film layer contains a metal element; before forming the second thin film layer, further comprising: forming a transition layer on the surface of the first thin film layer, The transition layer contains the oxygen-loving element and the metal element.
12. A semiconductor structure manufactured using the manufacturing method described in any one of claims 1 to 11, the semiconductor structure comprising:

    base;

    A first thin film layer is located on the surface of the substrate, and the first thin film layer has an oxygen-loving element;

    A second thin film layer is located on the surface of the first thin film layer.
13. The semiconductor structure according to claim 12, wherein the material of the first thin film layer is at least one of TiSiN, TiAlN, TiSiAl, TiAlC, TaSiN, TaAlN, and TaAlC.
14. The semiconductor structure according to claim 13, wherein there is a polysilicon layer between the substrate and the first thin film layer, the first thin film layer includes a TiSiN layer, and the second thin film layer includes a metal layer, wherein, The polysilicon layer, the TiSiN layer and the metal layer together form a part of the gate structure.
15. The semiconductor structure of claim 13, wherein there is a polysilicon layer between the substrate and the first thin film layer, the first thin film layer includes a TiAlN layer, and the second thin film layer includes a metal layer, Wherein, the polysilicon layer, the TiAlN layer and the metal layer together form a part of the gate structure.

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