WO2024045144A1

WO2024045144A1 - Power amplification circuit and radio-frequency transceiving apparatus

Info

Publication number: WO2024045144A1
Application number: PCT/CN2022/116613
Authority: WO
Inventors: 杜清兆; 李科; 杨超伟; 刘沛玮; 余卓哲
Original assignee: 华为技术有限公司
Priority date: 2022-09-01
Filing date: 2022-09-01
Publication date: 2024-03-07

Abstract

The present application relates to the technical field of radio frequency communications. Provided are a power amplification circuit and a radio-frequency transceiving apparatus, which are used for further improving the rollback efficiency under a broadband to realize efficient power amplification within a relatively large rollback range. The power amplification circuit comprises: a Doherty combiner and two power amplification circuits, wherein each power amplification circuit further comprises a mean amplifier, an orthogonal splitter, an orthogonal combiner, a first peak amplifier, a second peak amplifier, a phase shift network and a load resistor. Different operation modes, which involve bias states of different power amplifiers, are set, for example, amplification is performed by a single mean amplifier when rollback is performed within a small power range, mean amplifiers of two power amplification circuits operate in a Doherty mode when rollback is performed within a medium power range, and the two power amplification circuits operate in an LMBA-BSS mode when rollback is performed within a large power range. In this way, a relatively large rollback range can be ensured, and the efficiency can also be improved.

Description

A power amplifier circuit and radio frequency transceiver device

Technical field

Embodiments of the present application relate to the field of radio frequency communications, and specifically relate to a power amplifier circuit and a radio frequency transceiver device.

Background technique

With the continuous development of wireless communication technology, more and more frequency bands of different standards are deployed. If a communication system can achieve simultaneous coverage of multiple frequency bands, the complexity of wireless transmitters can be greatly reduced, which means that continuous evolution towards large bandwidth is needed.

Due to the popularity and widespread application of wireless communications, the scarcity of limited electromagnetic spectrum resources has gradually emerged. Therefore, how to improve the utilization of spectrum resources has become a hot topic. As an important part of the wireless communication system transceiver, the radio frequency power amplifier directly affects the size and overall efficiency of the output signal, and is the key to determining the utilization rate of spectrum resources.

Modern wireless systems often use modulated signals with peak-to-average power ratios to improve the utilization of scarce spectrum resources. However, due to the low user load in actual wireless services, the power amplifier operates in a power backoff state that is much greater than the signal peak-to-average ratio. At this time, the operating efficiency of the power amplifier is not high and the power consumption is large. In order to cope with this situation, the double-balanced-end single-tube load-modulated balanced amplifier structure (load modulated balanced amplifier-balance single-end single-end, LMBA-BSS) appeared. LMBA-BSS is a classic quadrature balanced amplifier, including two balanced power amplifiers and one control power amplifier. The balanced power amplifier uses a peaking tube and the control power amplifier uses an averaging tube. The input signal is divided into two channels through the power splitter, one channel flows to the control power amplifier, and the other channel is distributed to the two balanced power amplifiers through the input coupler. The output signals of the two balanced power amplifiers and one control power amplifier are synthesized through the output coupler. At low power The lower peak tube is in a cut-off state, and only the average tube works. As the power continues to increase, the peak tube starts to work. This implementation method effectively improves the amplification efficiency of the power amplifier under low-power input signals. When combined with the dual-input design under high-power input signals, it can also achieve a large bandwidth and a backoff of about 9dB. However, when the amount of backoff is further increased, for example, for the amount of backoff above 9dB, the efficiency of using the existing power amplifier structure will be greatly reduced. The LMBA-BSS structure can only achieve a backoff amount of about 9dB, and cannot achieve a larger amount. High efficiency under fallback range.

Contents of the invention

Embodiments of the present application provide a power amplifier circuit and a radio frequency transceiver device to improve the problem of low efficiency when backoff is large.

In order to achieve the above objectives, the embodiments of the present application adopt the following technical solutions:

In a first aspect, embodiments of the present application provide a power amplifier circuit, including a Doherty combiner and two power amplifier circuits: a first power amplifier circuit and a second power amplifier circuit:

Wherein, any power amplifier circuit includes a first radio frequency signal input terminal, a second radio frequency signal input terminal, an average amplifier, a quadrature splitter, a quadrature combiner, a first peak amplifier, a second peak amplifier and a radio frequency signal output terminal. ;

The input end of the averaging amplifier is connected to the first radio frequency signal input end; the input end of the orthogonal splitter is connected to the second radio frequency signal input end, the isolation end of the orthogonal splitter is connected to the ground through the load resistor, and the The direct end is connected to the input end of the first peak amplifier, and the coupling end of the quadrature splitter is connected to the input end of the second peak amplifier;

The first input end of the quadrature combiner is connected to the output end of the first peak amplifier, the second input end of the quadrature combiner is connected to the output end of the second peak amplifier, and the isolation end of the quadrature combiner is connected to the average The output terminal of the amplifier is connected, and the output terminal of the quadrature combiner is connected with the radio frequency output terminal of the power amplifier circuit;

The radio frequency output terminal of the first power amplifier circuit is connected to the first input terminal of the Doherty combiner, the radio frequency output terminal of the second power amplifier circuit is connected to the second input terminal of the Doherty combiner, and the average value of the first power amplifier circuit The bias states of the averaging amplifiers of the amplifier and the second power amplifier circuit are different, and the Doherty combiner is used to power combine the amplified signals of the first power amplifier circuit and the second power amplifier circuit. The power amplifier circuit provided by the embodiment of the present application amplifies the signal through two power amplifier circuits and six power amplifiers. The peak amplifier is used to achieve a high-efficiency state when the input signal is a high-power signal. Different average amplifiers in the two power amplifier circuits The bias states are different, which can more effectively amplify signals in different power ranges, so that each power amplifier operates in an efficient state. In different fallback intervals, multiple power amplifiers can operate in different operating modes. Work in combination to improve the output efficiency of the power amplifier under different backoff conditions.

In a possible implementation, the averaging amplifier of the first power amplifier circuit is in a class AB bias state, and the output stage of the averaging amplifier in the class AB bias state combines the high fidelity of the class A bias state amplifier with the class B bias state. The high conversion efficiency of the state amplifier achieves better power amplification effect. The averaging amplifier of the second power amplifier circuit is biased in the class C bias state. The averaging amplifier in the class AB bias state can achieve a high efficiency state when the signal power is small, while the averaging amplifier in the class C bias state can achieve high efficiency when the signal power is small. In the case of larger power, a high efficiency state is achieved. When the backoff is large, for example, when the backoff is above 15dB, the power of the input signal is low. In this case, the average amplifier of the first power amplifier circuit is in a high-efficiency operating state, and the average amplifier of the second power amplifier circuit is in a cut-off state. When the input signal power gradually increases, for example, when it falls back in the fallback range of 15dB to 9dB, the average amplifier of the first power amplifier circuit and the average amplifier of the second power amplifier circuit can operate in Doherty mode to improve output efficiency.

In a possible implementation, the peak amplifiers of the first power amplifier circuit and the second power amplifier circuit are biased in a Class C bias state. The peak amplifier in the Class C bias state can reach a peak value when the power of the signal is high. In the high-efficiency state, when the signal power continues to increase, for example, when the fallback range is 0dB to 9dB, that is, when the signal is high power, the first power amplifier circuit and the second power amplifier circuit operate in the LMBA-BSS state. , jointly amplify the power of the signal.

In a possible implementation, the power amplifier circuit includes a phase-shifting network, and the phase-shifting network is disposed between the radio frequency signal input end and the input end of the averaging amplifier. The phase-shifting network can control the input signal of the averaging amplifier to produce a phase shift to control the amplitude and phase of the power amplifier, thereby regulating the load amplitude and phase of the power amplifier.

In a possible implementation, the power amplifier circuit includes a first power divider, a second power divider, a third power divider and a signal input end; the signal input end is connected to the input end of the first power divider, and the first The first output end of the power divider is connected to the input end of the second power divider, the second output end of the first power divider is connected to the input end of the third power divider; the first output end of the second power divider is connected to The first radio frequency signal input end of the first power amplifier circuit is connected, the second output end of the second power divider is connected to the second radio frequency signal input end of the first power amplifier circuit; the first output end of the third power divider is connected to the second The first radio frequency signal input terminal of the power amplifier circuit is connected, and the second output terminal of the third power splitter is connected to the second radio frequency signal input terminal of the second power amplifier circuit. The power distribution of the signal is achieved through three power dividers, so that each power amplifier circuit can work independently, thereby achieving the effect that the power amplifier circuit will work in different modes under different scenarios.

In a possible implementation, the power amplifier circuit further includes a phase line, and the phase line is provided between the output end of the first power divider and the input end of the third power divider. The phase line is a 1/4 wavelength phase line, which can compensate the phase of multi-channel amplified signals after being combined by the Doherty combiner, so that the signal phases of different amplification paths are aligned.

In another possible implementation, the power amplifier circuit includes a first power divider, a second power divider, a first signal input end, and a second signal input end; the first signal input end is connected to the input end of the first device , the second signal input end is connected to the input end of the second power divider, the first output end of the first power divider is connected to the second radio frequency signal input end of the first power amplifier circuit, and the second output of the first power divider The terminal is connected to the first radio frequency signal input terminal of the second power amplifier circuit;

The first output end of the second power divider is connected to the first radio frequency signal input end of the first power amplifier circuit, and the first radio frequency signal input end of the first power amplifier circuit is connected to the input end of the orthogonal splitter; the second power divider The second output terminal of the amplifier is connected to the second radio frequency signal input terminal of the second power amplifier circuit, and the second radio frequency signal input terminal is connected to the input terminal of the orthogonal splitter. This dual-input design can achieve high-efficiency power amplification with a larger bandwidth.

In another possible implementation, the power amplifier circuit includes a first phase line and a second phase line; the first phase line is located between the second output end of the first power divider and the phase shifting network, and the second phase line The phase line is located between the second output of the second power divider and the input of the quadrature combiner. The phase line is a 1/4 wavelength phase line. A 1/4-wavelength phase line is set between the second output end of the first power splitter and the phase-shifting network, and a 1/4-wavelength phase line is set between the second output end of the second power splitter and the input end of the quadrature combiner. Phase line, when the average amplifier of the second power amplifier circuit starts to work and all peak amplifiers are turned on, more than one output signal will flow into the Doherty combiner for power synthesis. At this time, phase alignment can be performed through the 1/4 wavelength phase line to ensure the fidelity of the output.

In another possible implementation, the Doherty combiner includes a first input end, a second input end, an output end and a microstrip line; the first input end of the Doherty combiner is connected to the first power amplifier circuit The RF signal output end of the Doherty combiner is connected to the RF signal output end of the second power amplifier circuit, and the first input end of the Doherty combiner is connected to the output end through a microstrip line; the microstrip The phase delay of the line is the same as the phase delay of the phase line. Using a Doherty combiner for combining can achieve the effect of impedance pulling, and by continuously adjusting the impedance of the input and output ends, the power amplification can be maximized.

In a second aspect, this application also provides a radio frequency transceiver device. The radio frequency transceiver device includes a radio frequency chip and a power amplification circuit, wherein the power amplification circuit is the power amplification circuit provided by any implementation method of the first aspect, and the radio frequency chip is connected to the aforementioned power amplification circuit. Among them, the technical effects brought by the second aspect can be found in the technical effects brought by different implementations in the first aspect, and will not be described again here.

Description of drawings

Figure 1 shows a schematic structural diagram of a wireless communication system;

Figure 2 shows the structural diagram of a traditional LMBA;

Figure 3 shows a schematic structural diagram of an LMBA provided by an embodiment of the present application;

Figure 4 shows a schematic structural diagram of the LMBA-BSS provided by the embodiment of the present application;

Figure 5 shows a schematic diagram of the output power and efficiency curve of the LMBA-BSS structure provided by the embodiment of the present application;

Figure 6 shows a comparison diagram of the efficiency curves of traditional balanced power amplifiers and LMBA power amplifiers;

Figure 7 shows a schematic diagram of a power amplifier circuit provided by an embodiment of the present application;

Figure 8 shows a schematic diagram of a multi-input power amplifier circuit provided by an embodiment of the present application;

Figure 9 shows a schematic diagram of power amplifier efficiency curves in different modes provided by the embodiment of the present application;

Figure 10 shows a schematic diagram of the impedance traction paths of the two main power amplifiers passing through the Doherty combiner provided by the embodiment of the present application;

Figure 11 shows a schematic diagram of another power amplifier circuit provided by an embodiment of the present application;

Figure 12 shows a schematic diagram of a multi-input power amplifier circuit provided by an embodiment of the present application;

Figure 13 shows a schematic diagram of the output efficiency curve of a power amplifier with multiple signal inputs provided by an embodiment of the present application;

Figure 14 shows a schematic diagram of another power amplifier circuit provided by an embodiment of the present application;

Figure 15 shows a schematic diagram of the efficiency variation curve with power provided by the embodiment of the present application;

Figure 16 shows a schematic diagram of another power amplifier circuit provided by an embodiment of the present application;

Figure 17 shows a schematic diagram of another multi-input power amplifier circuit provided by an embodiment of the present application;

Figure 18 shows a schematic diagram of another multi-input power amplifier circuit provided by an embodiment of the present application.

Detailed ways

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of this application.

The terms “first” and “second” are used for descriptive purposes only and shall not be understood as indicating or implying relative importance or implicitly indicating the quantity of indicated technical features. Therefore, features defined as "first" and "second" may explicitly or implicitly include one or more of these features. In the description of this application, unless otherwise stated, "plurality" means two or more.

In the description of the embodiments of this application, it should be noted that those of ordinary skill in the art can understand the specific meanings of the above terms in this application under specific circumstances.

In the embodiments of this application, words such as "exemplary" or "for example" are used to represent examples, illustrations or explanations. Any embodiment or design described as "exemplary" or "such as" in the embodiments of the present application is not to be construed as preferred or advantageous over other embodiments or designs. Rather, use of the words "exemplary" or "such as" is intended to present the concept in a concrete manner.

With the continuous advancement of science and technology, wireless communication technology has made great progress since the beginning of the 21st century. Wireless communication refers to long-distance transmission communication between multiple nodes without propagating through conductors or cables. Wireless communication carries information and transmits it through electromagnetic waves. People choose the appropriate frequency band for operation based on the natural characteristics of the electromagnetic wave frequency band. Because the propagation penetration loss of higher-frequency electromagnetic waves is too large, they are not suitable for wireless communications; because the wavelength of lower-frequency electromagnetic waves is too long, they require very large antennas and are not suitable for wireless antennas, so there is a concentration of low-frequency bands. The phenomenon of a large number of businesses, such as radio and television, satellite communications, transportation, railways, etc. As a result, a contradiction arises between the scarcity of spectrum resources and the high demand for spectrum resources.

In order to improve the problem of high demand for limited spectrum resources, modern wireless systems usually use modulated signals with peak-to-average power ratio (PAPR) to improve the utilization of scarce spectrum resources.

As shown in FIG. 1 , the wireless communication system includes a transmitting device 100 and a receiving device 120 . The transmitting device 100 includes a converter 101, a transmitter 102 and a transmitting antenna 103. The converter 101 is used to receive data or information sent by a signal source. The signal source sends out information that needs to be transmitted. The converter 101 converts the information to be transmitted into Corresponding electrical signals are then converted into high-frequency oscillation signals by the transmitter 102, and then the high-frequency oscillation signals are converted into electromagnetic waves by the transmitting antenna 103 and transmitted into space.

The receiving device 120 includes a converter 123, a receiver 122 and a receiving antenna 121. When the electromagnetic wave reaches the receiving device, the receiving antenna 121 converts the received electromagnetic wave into a high-frequency oscillation signal. The receiver 122 converts the high-frequency oscillation signal into the original electrical signal, and then the converter 123 restores it to the original transmitted information and sends it to the recipient. By. The core device of the wireless communication system is the transmitter 102. The most power-consuming and core component of the transmitter 102 is the power amplifier. The power amplifier may also be referred to as a power amplifier.

Single-tube RF power amplifier devices are a type of power amplifier widely used in wireless communication systems. The efficiency of single-tube RF power amplifier devices increases as the output power increases. When the power is small, the efficiency of the power amplifier decreases rapidly.

In order to meet the high linearity requirements required for wireless communication quality, the power amplifier needs to often work in the fallback state and have high efficiency. The fallback state refers to ensuring that the output power operation maintains linearity within the linear region. Prevent the waveform from being clipped and distorted and the power amplifier operating below the saturation point, that is, the power amplifier operates below the maximum output power level. In addition, in most wireless business scenarios in practice, due to The user business load is not high, and the power amplifier often works in a power backoff state that is much greater than the signal peak-to-average ratio. At this time, the efficiency of the power amplifier is not high, and the operating power consumption of the network is still relatively large, which cannot meet the requirements of the wireless communication system for the power amplifier. High efficiency requirements under larger backoff.

In order to improve the power amplifier efficiency during power rollback and take into account broadband design, various power amplifier structures have emerged, such as Doherty and load modulated balanced amplifier (LMBA).

Figure 2 shows a schematic structural diagram of an LMBA power amplifier provided by an embodiment of the present application. The core of the LMBA structure lies in two couplers: the input coupler and the output coupler, and the power amplifier between the input coupler and the output coupler. The control signal is fed into the isolation port 210c of the output coupler and modulated through the two power amplifiers connected to the balanced port 210b and the balanced port 210d of the output coupler. Among them, the power amplifier 220 is the main power amplifier and the power amplifier 230 is the auxiliary power amplifier. Such a structure It can improve the rollback efficiency under a wide bandwidth. However, the backoff amount of this structure is mainly determined by the main power amplifier. To obtain a large backoff amount, the load modulation ratio of the main power amplifier is very large, which limits the realization of broadband under large backoff.

LMBA uses broadband devices and has the function of load modulation. It has been attracting attention as a new type of load modulation power amplifier structure since it was proposed. Therefore, many improved structures have appeared based on the traditional LMBA power amplifier structure.

Figure 3 shows a schematic structural diagram of another LMBA provided by an embodiment of the present application. As shown in Figure 3, the LMBA includes: a power divider 301, a first coupler 303, a second coupler 307, a load resistor 302, a first averaging amplifier 304, a second averaging tube 305 and a peak amplifier 306. The signal enters from the input end of the power divider 301, the first output end of the power divider 301 is connected to the second input end of the first coupler 303, and the second output end of the power divider 301 is connected to the input end of the peak amplifier 306; The output terminal of the peak amplifier 306 is connected to the second output terminal of the second coupler 307 . The first output terminal of the first coupler 303 is connected to ground through the load resistor 302. The first output terminal of the first coupler 303 and the first input terminal of the second coupler 307 are connected through an averaging amplifier. The second output terminal and the second input terminal of the second coupler 307 are connected through an averaging amplifier.

The LMBA shown in Figure 3 contains three power amplifiers, namely two balanced power amplifiers and one control power amplifier. For example, with reference to Figure 3, the average amplifier 304 and the average amplifier 305 are two balanced circuit power amplifiers, the peak amplifier 306 is a control circuit power amplifier, the balanced circuit power amplifier is biased to class AB, and the control circuit power amplifier is biased to class C. The input and output There are two directional couplers at each end for power synthesis and power distribution. For example, as shown in Figure 3, the first coupler 303 is used for power distribution, the second coupler 307 is used for power synthesis, and the two-way balanced power amplifier, the average amplifier 304 and the average Amplifier 305 is exactly the same, and the control power amplifier is used to modulate the load of the balanced power amplifier in the backoff zone. The amplitude and phase of the control power amplifier will have an impact on the load amplitude and phase of the balanced power amplifier.

For a two-way balanced power amplifier, since there is a 90° phase difference between the two output ports of the bridge, the in-phase synthesis of power can be achieved through two directional couplers, and the power of the controlled power amplifier will eventually be output to the load. Theoretically, the bandwidth of the LMBA will only be limited by the bandwidth of the directional coupler. Since the bandwidth of the directional coupler can be very wide, the LMBA has the potential for broadband applications.

Two balanced power amplifiers and one control power amplifier are connected and power combined through the second coupler 307 . When it works, the port impedance of the second coupler 307 serves as the load impedance of the balanced circuit amplifier and is subject to amplitude adjustment and phase control of the output signal of the control circuit power amplifier. Finally, the goals of high efficiency and 6dB backoff range can be achieved in a broadband state, but the same Limited by the load modulation ratio of the balanced path, the efficiency will decrease under a larger backoff state, and high efficiency under a larger backoff cannot be achieved.

In order to solve the problem of being unable to achieve high-efficiency power amplifier output under a larger backoff due to the limitation of the load modulation ratio of the averaging tube power amplifier, people have proposed a LMBA-BSS (load modulated balanced amplifier-balance single-end single-end, LMBA-BSS) structure, as shown in Figure 4, the LMBA-BSS structure includes: power divider 401, load resistor 402, first coupler 403, second coupler 408, first peak amplifier 404, second peak amplifier 405 , averaging amplifier 406 and phase shift network 407.

Among them, the coupler has four ports in order from left to right and top to bottom, respectively a first input terminal, a first output terminal, a second input terminal, and a second output terminal. The power splitter 401 includes an input terminal 401a, a first output terminal 401b and a second output terminal 401c. The input terminal of the power splitter 401 is used to receive an input signal. The first output terminal 401b of the power splitter 401 is connected to the first coupler. The second input terminal of 403 is connected, and the second output terminal 401c of the power divider 401 is connected to the input terminal of the averaging amplifier 406 through the phase shift network 407; the output terminal of the averaging amplifier 406 is connected to the second output terminal of the second coupler 408. The first output terminal of the first coupler 403 is connected to the ground through the load resistor 402. The first output terminal of the first coupler 403 and the first input terminal of the second coupler 408 are connected through a peak amplifier. The second output terminal is connected to the second input terminal of the second coupler 408 through a peak amplifier.

By using the averaging amplifier 406 as a control circuit and using the port of the coupler as a control signal to modulate the impedances of the two peak pipes, high-efficiency power amplification is maintained.

As shown in the LMBA-BSS provided in Figure 4, the signal enters from the input end of the power divider 401. When the input signal received by the power divider 401 is a low-power signal, the control circuit where the average amplifier is located is turned on, and the control power amplifier is used to Modulating the load of the balanced power amplifier in the fallback area causes the impedance of the balanced path where the peak amplifier is located to increase, and the peak path is in a cut-off state because it cannot meet the operating requirements of the bias state. The signal passes through the second output end of the power splitter 401 for phase shifting through the phase shifting network 407, and then passes through the averaging amplifier 406 for power amplification. The amplified signal enters the 3dB coupler as a control signal to load the two input ends of the 3dB coupler. modulation;

When the power divider 401 receives a high-power input signal, the first peak amplifier 404, the second peak amplifier 405 and the average amplifier 406 all reach the working state, the peak circuit is turned on, and the peak circuit power amplifier is modulated through the control circuit where the average amplifier is located. .

Combined with the dual-input design, only the main average amplifier is always working. Unlike the LMBA structure power amplifier shown in Figure 3, both the peak amplifier and the average amplifier are always working, so there is no load modulation ratio limited by the main power amplifier. Therefore, it can achieve high efficiency within a larger fallback range than the traditional LMBA structure power amplifier.

Combined with Figure 5, Figure 5 shows the output power and efficiency curve of the LMBA-BSS power amplifier structure. The graph includes three consecutive parts: the linear straight line part, the first curve part and the second curve part. The highest point of the linear part reaches an efficiency of 78.5%, and the two curve parts remain between 70% and 78.5%. The difference in the abscissa value of the two curves represents the retreat range of the LMBA-BSS power amplifier structure. As shown in Figure 5, the rollback range of the LMBA-BSS power amplifier structure reaches 9.5dB. The first curve in the figure is the efficiency output diagram when all power tubes are operating in full state. The second curve in the figure is the output efficiency when only the main path of the averaging tube is turned on and all peak paths are turned off. The LMBA-BSS structure power amplifier can achieve an efficiency of about 75% in a rollback range of about 9dB. However, when the rollback amount is greater than 9dB, the efficiency of the power amplifier is greatly reduced linearly. When the rollback range is about 12dB, the efficiency of the power amplifier is already low. to about 20%.

Figure 6 shows a comparison of the efficiency curves of traditional balanced power amplifiers and LMBA structures. Among them, the black curve is a traditional balanced power amplifier without a control signal power amplifier at the isolation end. Other circular curves represent different output powers. Under constant control signal power excitation, when the control signal phase is rotated 360 degrees (20 degree steps), the power amplifier efficiency changes with the total output power. The phase value above the circular curve represents the maximum Control signal phase shift at efficiency. The points at the maximum efficiency of each circular curve are connected with polylines, as shown by the dotted lines in the figure.

Through the comparison between the dotted line and the black solid line, it is easy to see that the LMBA power amplifier with control signal has a greater efficiency improvement than the traditional balanced power amplifier within the same fallback range. As shown in Figure 6, the difference between the abscissas of the maximum efficiency points of 30dBm and 40.8dBm after phase rotation on the circular curve reaches 9dB, which means that the LMBA can maintain higher efficiency over a wide frequency band than the balanced amplifier. The optimal backoff is about 9dB. However, when the backoff exceeds 9dB, as shown in Figure 6, when the output power of the LMBA reaches the peak power backoff of 12dB, the efficiency has dropped from the highest 78.5% to around 20%. If the output power continues to decrease, the efficiency of the power amplifier will become even lower. However, in actual business, power amplifiers often work in a backoff state of more than 9dB. However, the existing technology is unable to handle high backoff power amplification of more than 9dB, and the efficiency will be greatly reduced.

Therefore, current wireless communication systems have a strong demand for power amplifiers with higher backoff efficiency and larger bandwidth. How to simultaneously take into account the power amplifier bandwidth and efficiency improvement under large backoff has become a technical problem that needs to be solved. Although people have continuously improved the LMBA structure and the rollback range while maintaining high efficiency has been continuously expanded, 9dB still cannot satisfy people's efficiency improvement for large rollback states under bandwidth.

In view of this, in order to improve the above technical problems, embodiments of the present application provide a power amplifier circuit. This is used to achieve the effect that the power amplifier can still maintain high efficiency within a larger retreat range. This application proposes a power amplifier structure that combines two LMBA-BSS through a Doherty combiner. Through the different bias states of different power tubes, the grid voltage configuration at different power levels is performed to achieve multi-tube hybrid output. , thereby ensuring high-efficiency output under different input states, improving work efficiency in the fallback state, achieving greater fallback design, and facilitating the design and implementation of broadband power amplifiers.

For example, please refer to Figure 7. Figure 7 shows a power amplification circuit provided by an embodiment of the present application. The power amplification circuit includes a Doherty combiner 770 and two power amplifier circuits: a first power amplifier circuit 700 and a second power amplifier circuit. 710. The first power amplifier circuit 700 and the second power amplifier circuit 710 are connected to the Doherty combiner 770. The Doherty combiner 770 performs power synthesis on the signals output by the first power amplifier circuit 700 and the second power amplifier circuit 710 and then outputs the power.

Each power amplifier circuit includes two RF signal input terminals, an averaging amplifier, a quadrature splitter, a quadrature combiner, two peak amplifiers and an RF signal output terminal. The radio frequency signal input end is the actual input of the power amplifier circuit; the average amplifier and the peak amplifier serve as the core of the power amplifier circuit to amplify the input power; the orthogonal splitter and the orthogonal combiner are 3dB couplers in the embodiment of this application. Power distribution and integration can be achieved.

Among them, the first power amplifier circuit 700 and the second power amplifier circuit 710 have the same structure. The first power amplifier circuit 700 will be introduced below as an example.

For example, the first power amplifier circuit 700 includes a first radio frequency signal input terminal 701a, a second radio frequency signal input terminal 701b, a first averaging amplifier 702, a first coupler 703, a second coupler 704, a first peak amplifier 705, a second Peak amplifier 707 and RF signal output terminal 708.

Among them, the four ports of the coupler are the first input terminal a, the first output terminal b, the second input terminal c, and the second output terminal d in order from left to right and top to bottom. The first coupler 703 is used as a quadrature splitter, the second coupler 704 is used as a quadrature combiner, the first radio frequency signal input terminal 701a is connected to the second input terminal c of the first coupler 703, and the first The first output terminal b of the coupler 703 is connected to the input terminal of the first peak amplifier 705 , the second output terminal d of the first coupler 703 is connected to the input terminal of the second peak amplifier 707 , and the first output terminal b of the first coupler 703 is connected to the input terminal of the second peak amplifier 707 . The input terminal a is connected to the ground through the load resistor 706; the second radio frequency signal input terminal 701b is connected to the input terminal of the first averaging amplifier 702 through the phase shift network 709, and the output terminal of the first averaging amplifier 702 is connected to the second output terminal of the second coupler 704. d is connected, the output end of the first peak amplifier 705 is connected to the first input end a of the second coupler 704, the output end of the second peak amplifier 707 is connected to the second input end c of the second coupler 704, and the second coupling The first output terminal b of the converter 704 is connected to the radio frequency signal output terminal 708.

Among them, the first power amplifier circuit 700 includes a control channel power amplifier and two balanced channel power amplifiers. As shown in Figure 7, the first peak amplifier 705 and the second peak amplifier 707 are used as two balanced circuit power amplifiers, and the first average amplifier 702 is used as a control circuit power amplifier. The first average amplifier 702 is in the on state when there is an input signal, while the first peak amplifier 705 and the second peak amplifier 707 are in the off state before the power of the input signal increases to the set threshold. It will be turned on after it reaches the set threshold.

Among them, the bias state of the two balanced circuit power amplifiers, the first peak amplifier 705 and the second peak amplifier 707, is a class C bias state, and the bias state of the control circuit power amplifier, that is, the first average amplifier 702, is a class AB bias state. The input and output ends of the first power amplifier circuit 700 have two directional couplers respectively for power synthesis and power distribution. For example, as shown in Figure 7, the first coupler 703 serves as an orthogonal splitter for power distribution, and the second coupler 704 As a quadrature combiner for power synthesis, the two balanced path power amplifiers, that is, the first peak amplifier 705 and the second peak amplifier 707 are exactly the same, and the control path power amplifier, that is, the first average amplifier 702 is used for balancing in the backoff area. The load of the power amplifier is modulated, and controlling the amplitude and phase of the power amplifier will have an impact on the load amplitude and phase of the balanced power amplifier. When the input signal is a low-power signal, the backoff range reaches 15dB, the first average amplifier 702 is in the on state, and the peak amplifier is in the off state because it is biased in the Class C bias state. When the input signal power continues to increase, the signal amplified by the first averaging amplifier 702 enters the second coupler 704 as a control signal. The impedance of the first averaging amplifier 702 gradually decreases until the peak amplifier starts working in the 6dB backoff range.

The second power amplifier circuit 710 has the same structure as the first power amplifier circuit 700, including a first radio frequency signal input section 711a, a second radio frequency signal input terminal 711b, a second averaging amplifier 712, a third coupler 713, a fourth coupler 714, The third peak amplifier 715, the fourth peak amplifier 717 and the radio frequency signal output terminal 718.

Among them, the second radio frequency signal input terminal 711b is connected to the first input terminal a of the third coupler 713, the first output terminal b of the third coupler 713 is connected to the input terminal of the third peak tube 715, and the third coupler 713 The second output terminal d is connected to the input terminal of the second peak tube 717, the second input terminal of the third coupler 713 is connected to the ground through the load resistor 716; the first radio frequency signal input terminal 711a is connected to the second averaging amplifier through the phase shift network 719 The input end of 712 is connected, the output end of the second average amplifier 712 is connected to the first output end b of the fourth coupler 714, the output end of the third peak amplifier 715 is connected to the first input end a of the fourth coupler 714, and the The output terminal of the four-peak amplifier 717 is connected to the second input terminal c of the fourth coupler 714 , and the second output terminal d of the fourth coupler 714 is connected to the radio frequency signal output terminal 718 .

The working principle of the second power amplifier circuit 701 is the same as that of the first power amplifier circuit 700. The second power amplifier circuit 710 also includes a control circuit power amplifier and two balanced circuit power amplifiers. As shown in Figure 7, the third peak amplifier 715 and the fourth peak amplifier 717 are used as two balanced circuit power amplifiers, and the second average amplifier 712 is used as a control circuit power amplifier.

Among them, the two balanced circuit power amplifiers, the third peak amplifier 715 and the fourth peak amplifier 717, are biased in the Class C bias state, and the control circuit power amplifier of the second average amplifier 717 is also biased in the Class C bias state. There are two directional couplers at the input end and output end of the two-power amplifier circuit respectively for power synthesis and power distribution. For example, as shown in Figure 7, the third coupler 713 serves as an orthogonal splitter for power distribution, and the fourth coupler 717 serves as The quadrature combiner is used for power synthesis, and the two-way balanced power amplifier: the third peak amplifier 715 is exactly the same as the fourth peak amplifier 717, and the control path power amplifier is used to modulate the load of the balanced path power amplifier in the fallback area.

In conjunction with FIG. 7 , the embodiment provided by this application also includes a first power splitter 760 , a second power splitter 720 , a third power splitter 716 , a quarter-wavelength phase line 730 and a Doherty combiner 770 .

The above-mentioned power dividers are all one-to-two power dividers and include three ports: an input terminal, a first output terminal and a second output terminal. Since the microstrip line of the Doherty combiner will cause phase transformation of the signal, a 1/4 wavelength phase line is required to achieve phase alignment of the two signals in the combiner; among them, the input terminal 760a of the first power divider 760 For receiving input signals, the first output terminal 760b is connected to the input terminal 720a of the second power splitter 720, and the first output terminal 720b of the second power splitter 720 is connected to the first radio frequency signal input terminal 701a of the first power amplifier circuit 700, The second output terminal 720c of the second power splitter 720 is connected to the second radio frequency signal input terminal 701b of the first power amplifier circuit 700. The second output terminal 760c of the first power divider 760 is connected to the input terminal 740a of the third power divider 740 through the phase line 730, and the first output terminal 740b of the third power divider 740 is connected to the first radio frequency of the second power amplifier circuit 710. The signal input terminal 711a and the second output terminal 716c of the third power divider 716 are connected to the second radio frequency signal input terminal 716b of the second power amplifier circuit 710.

The Doherty combiner 770 includes a first input terminal 771, a second input terminal 772, an output terminal 773 and a microstrip line 774. The Doherty combiner 770 is used for power synthesis in a filter multiplexing manner. Working, more than two channels of signal synthesis can be realized to integrate the output signals of each power tube. For example, in the embodiment of the present application, the Doherty combiner 770 is used to output the first power amplifier circuit 700 and the second power amplifier circuit 710 The signals are integrated or combined, wherein the first input terminal 771 of the Doherty combiner 770 is connected to the radio frequency signal output terminal 708, and the second input terminal 772 of the Doherty combiner 770 is connected to the radio frequency signal output terminal 718, The output terminal 773 of the Doherty combiner 770 is connected to ground through a load resistor 780.

When the power amplifier circuit receives an input signal, the input signal is divided into two paths through the first power divider 760 , one path enters the first power amplifier circuit 700 , and the other path passes through the 1/4 wavelength phase line 730 and enters the second power amplifier circuit 710 . After being amplified by the two power amplifier circuits, it enters the Doherty combiner 770 to combine the outputs.

As shown in Figure 9, the power amplifier circuit proposed in this application works in two modes and three different scenarios. The Doherty working range corresponds to the low-power and medium-power scenarios, and the LMBA-BSS working range corresponds to the high-power scenario.

The working status of different output power scenarios is as follows:

When the input signal is a low-power signal, when the power of the input signal is small, for example, when the backoff is above 15dB, only the first averaging amplifier 702 biased in class AB works in a high-efficiency state, and the other power tubes are not turned on. , the output power retreats >15dB from full power and maintains high efficiency. At this time, the effective path of the signal is to pass through the first output terminal 760b of the first power divider 760, enter the first power amplifier circuit 700, change the phase amplitude through the phase shift network 709, and then perform power amplification through the first averaging amplifier 702. Finally, It enters the second output terminal d of the second coupler 704, and then is output by the first output terminal b of the second coupler 704 and enters the output of the Doherty combiner 770. The remaining signals return to the original path because they have not reached the bias state of each power tube. Under this working condition, the power amplifier circuit achieves the same effect as the Doherty amplifier.

When the input signal is a medium power signal, as the input signal power continues to increase, for example, when the backoff reaches about 15dB, the second averaging amplifier 712 of the second power amplifier circuit 710 biased in the Class C state turns on and interacts with The first averaging amplifier 702 works together in the Doherty mode until the two power amplifiers reach maximum power at the same time. At this time, the power amplifier output power is >9dB lower than the full power and maintains high efficiency. At this time, there are two effective paths for the signal. One path passes through the first output terminal 760b of the first power divider 760 and enters the first power amplifier circuit 700 to change the phase amplitude through the phase shifting network 709, and then passes through the first averaging amplifier 702. The power is amplified and finally enters the second output terminal d of the second coupler 704, and then is output from the first output terminal b of the second coupler 704 to the output of the Doherty combiner 770. The other path passes through the second output terminal 760c of the first power divider 760 and enters the second power amplifier circuit 710 through the 1/4 wavelength phase line 730. In the second power amplifier circuit 710, only the second averaging amplifier 712 is in operation. The signal changes the phase amplitude through the phase shifting network 719, then passes through the second averaging amplifier 712 for power amplification, and finally enters the fourth coupler 714. The second output terminal d then enters the Doherty combiner 770 from the first output terminal b to integrate and output the two output power signals.

As the input power further increases, for example, from 9dB backoff to full power, the four peak amplifiers of the two power amplifier circuits reach the bias state, the paths are opened, and are connected to the first average amplifier 702 and the second average amplifier respectively. The amplifier 717 forms the LMBA-BSS working mode until the two average amplifiers and the four peak amplifiers reach the maximum power output. At this time, the output power of the power amplifier circuit reaches the maximum power and maintains high efficiency.

As shown in FIG. 10 , the two curves in the Smith circle respectively represent the impedance pulling paths of the first averaging amplifier 702 and the second averaging amplifier 717 through the Doherty combiner 770 . The Smith chart is for impedance matching. Each point on the chart represents a complex impedance value. The center of the circle is called the matching point, which represents the ideal impedance. The two curves in the figure plan the route of the first averaging tube and the second averaging tube from the impedance point to the matching point. It can be seen that the impedance of the first averaging amplifier 702 and the second averaging amplifier 717 will decrease as the power continues to increase. Finally, when the first averaging amplifier 702 and the second averaging amplifier 717 reach the full power amplification state, the impedance tends to at the same stable value.

The power amplifier circuit proposed in this application adopts a multi-power amplifier hybrid combining structure and uses Doherty combining of multiple different power amplifiers of the same LMBA-BSS structure to further improve the back-off efficiency and can achieve a 15dB back-off. Maintaining a high efficiency within the range further meets the needs of actual wireless communication services. Because the main road of the LMBA-BSS structure has no load traction characteristics, wideband design can be realized. By setting the bias state of each power tube, before the peak path is turned on, the two main path average amplifiers perform Doherty-type load pull, which can obtain an additional 6dB high backoff range, significantly improving the efficiency under low power. , and at the same time, because the symmetrical Doherty main road load traction ratio is small, it can meet the broadband design, and the use of symmetrical anti-Doherty design can further expand the bandwidth.

It should be noted that the couplers in the embodiments of this application are all 3dB bridges. The bridge structure has the advantages of simple structure, stable performance, and wide bandwidth, and is suitable as the core power synthesis device of the amplifier. The Doherty combiner is a passive combining network. When more than one signal needs to be combined in a path state, phase alignment is required. Functionally equivalent to a 1/4 wavelength phase line.

In the above example, the power amplifier circuit amplifies one input signal. After the first input signal is divided into two channels by the first power divider 760, the second power divider 720 divides one of the signals output by the first power divider 760 into two channels. The signal is divided into two channels and transmitted to the first power amplifier circuit 700 as a control signal and an input signal for amplification. The third power divider 740 divides the other signal output by the first power divider 760 into two channels and transmits it to the second power amplifier circuit 710 as a control signal and an input signal. The control signal and the input signal are amplified. In another possible implementation, for power amplification of multiple signal inputs, embodiments of the present application provide another power amplification circuit. The specific implementation is shown in Figure 11. When there are two input signals, one of the input signals can be used as a control signal to achieve amplitude adjustment and phase control of the power amplifier circuit.

Please refer to Figure 11. The power amplifier circuit provided by the embodiment of the present application also includes: a Doherty combiner 770 and two power amplifier circuits: a first power amplifier circuit 700 and a second power amplifier circuit 710. The structure of this part is the same as that of the aforementioned Figure 7 The example shown is the same, the first power amplifier circuit 700 and the second power amplifier circuit 710 are connected to the Doherty combiner 770, and the signals output by the Doherty combiner 770 to the first power amplifier circuit 700 and the second power amplifier circuit 710 are Output after power synthesis. The above structure has been described in detail in the foregoing example shown in FIG. 7 and will not be repeated here.

The difference from the above example is that the power amplifier circuit provided by the embodiment of the present application includes a first input signal terminal and a second input signal terminal, as well as a first power divider 760, a second power divider 720, two λ/ 4

wavelength phase lines

730, 731 and Doherty combiner 770.

The first input signal terminal is used to access the first input signal, the first input signal is used as the control signal, the second input signal terminal is used for the second input signal, and the second input signal is used as the signal to be amplified, wherein the first function The input terminal 760a of the splitter 760 is connected to the first input signal terminal, the first output terminal 760b of the first power splitter 760 is connected to the first radio frequency signal 701a of the first power amplifier circuit 700, and the second terminal of the first power splitter 760 The output terminal 760c is connected to the first radio frequency signal input terminal 711a of the second power amplifier circuit 710 through one of the λ/4 phase lines 730; the input terminal 720a of the second power splitter 720 is connected to the second input signal terminal, and the second power splitter The first output terminal 720b of the second power splitter 720 is connected to the second radio frequency signal input terminal 701b of the first power amplifier circuit 700, and the second output terminal 720c of the second power splitter 720 is connected to the second power amplifier circuit 710 through another λ/4 phase line 731. The second radio frequency signal input terminal 711b is connected. The radio frequency signal output terminal 708 is connected to the first input terminal 771 of the Doherty combiner 770, and the second radio frequency signal output terminal 718 is connected to the second input terminal 772 of the Doherty combiner 770. The Doherty combiner The output terminal 773 of the converter 770 is connected to ground through the load resistor 780.

In this embodiment of the present application, the first input signal is used as a control signal. After the first input signal is power-equalized by the first power divider 760, an output signal is used as the control signal input of the first power amplifier circuit 700. After passing through the phase-shifting network 709, it enters the first averaging amplifier 702 for amplification. The amplified signal enters the first averaging amplifier 702 for amplification. The second output terminal d of the second coupler serves as a control signal to modulate the impedance of the input terminal of the second coupler 704 of the first power amplifier circuit 700.

The other output signal passes through a section of λ/4 phase line 730 and is input as a control signal of the second power amplifier circuit 710. After passing through the phase shift network 719, it enters the second averaging amplifier 712 for amplification. The amplified signal enters the third terminal of the fourth coupler 714. An output terminal b serves as a control signal to modulate the impedance of the input terminal of the fourth coupler 714 of the second power amplifier circuit 710.

After the second input signal is power-balanced by the second power divider 720, an output signal is used as the input of the first coupler 703 of the first power amplifier circuit 700. The power distributed through the first coupler 703 enters the first peak amplifier 705 and the first peak amplifier 705 respectively. The second peak amplifier 707 performs amplification and output. The signals amplified by the first peak amplifier 705 and the second peak amplifier 707 are combined through the second coupler 704 and then output. After the other output signal passes through a section of λ/4 phase line 731, it serves as the input of the third coupler 713 of the second power amplifier circuit 710, and enters the third peak amplifier 715 and the fourth peak amplifier 717 respectively for amplification and output. The signals amplified by the third peak amplifier 715 and the fourth peak amplifier 717 are combined through the fourth coupler 714 and then output. The signal output by the first power amplifier circuit 700 and the signal output by the second power amplifier circuit are Doherty combined through a Doherty combiner 770 and then output.

The multi-input signal power amplifier structure provided by this application also works in three scenarios. As shown in Figure 13, it can be seen that the power amplifier is in a high-efficiency state in low-power, medium-power, and high-power scenarios.

In a low-power scenario, when the input signal is small, only the first averaging amplifier 702 works in a high-efficiency state, and other power tubes are not turned on. The output power is >15dB lower than the full power, and high efficiency is maintained. At this time, the effective path of the signal is to pass through the first output terminal 760b of the first power divider 760, enter the first power amplifier circuit 700, change the phase amplitude through the phase shift network 709, and then perform power amplification through the first averaging amplifier 702. Finally, It enters the second output terminal d of the second coupler 704, and then enters the Doherty combiner 770 through the first output terminal b. The remaining signals return to the original path because they have not reached the bias state of each power tube.

In the medium power scenario, as the input power continues to increase, the second averaging amplifier 712 of the second power amplifier circuit 710 is turned on and works together with the first averaging amplifier 702 in the Doherty mode until the two power amplifiers reach the maximum power at the same time. , at this time, the output power of the power amplifier is >9dB lower than the full power and maintains high efficiency. At this time, there are two effective paths for the signal. One path passes through the first output terminal 760b of the first power divider 760 and enters the first power amplifier circuit 700 to change the phase amplitude through the phase shifting network 709, and then passes through the first averaging amplifier 702. The power is amplified and finally enters the second output terminal d of the second coupler 704, and then enters the Doherty combiner 770 for output from the first output terminal b. The other path passes through the second output terminal 760c of the first power divider 760 and enters the second power amplifier circuit 710 through the 1/4 wavelength phase line 731. In the second power amplifier circuit 710, only the second averaging amplifier 712 is in operation. The signal changes the phase amplitude through the phase shifting network 719, then passes through the second averaging tube 712 for power amplification, and finally enters the fourth coupler 714. The first output terminal b and then the second output terminal d enter the Doherty combiner 770 to integrate and output the two output power signals.

As the input power further increases, the four peak power amplifiers of the two LMBA-BSS circuits reach the bias state, the paths are opened, and form the LMBA-BSS working mode with the first average amplifier 702 and the second average amplifier 712 respectively until The two average amplifiers and the four peak amplifiers all reach maximum power output. At this time, the power amplifier output power reaches the maximum power and maintains high efficiency.

As shown in Figure 12, in the case where the power amplifier circuit includes two input signal terminals, one of the input signals may be power distributed by the first power divider 760 and then transmitted to the first radio frequency signal input terminal of the first power amplifier circuit 700. 701a and the second radio frequency signal input terminal 701b, the other input signal is divided by the second power divider 720 and then transmitted to the first radio frequency signal input terminal 711a and the second radio frequency signal input terminal 711b of the second power amplifier circuit 710.

The power amplifier circuits provided in Figures 7, 8 and 11 all include two power amplifier circuits. The difference between the two is that the input signals of the power amplifier circuits are different. In the power amplifier circuit shown in Figure 7, the first power divider 760 is used to connect the input signal, distribute the power of the signal through the first power divider 760, the second power divider 720 and the third power divider 740 and then transmit it to the first power amplifier circuit 700 and the second power amplifier circuit 710 respectively, but For the power amplifier circuit, there is essentially only one input signal.

The power amplifier circuit shown in Figures 8 and 11 includes a first power divider 760 and a second power divider 720, wherein the input terminal 760a of the first power divider 760 and the input terminal 720a of the second power divider 720 are respectively Used to receive one input signal, and then distribute the power of the two input signals through the first power divider 760 and the second power divider 720 before transmitting to the first power amplifier circuit 700 and the second power amplifier circuit 710. The number of input signals The increase brings more variables, greater freedom, and greater bandwidth.

Of course, in order to achieve a larger bandwidth, more channels of input signals can also be accessed. For example, as shown in Figure 12, another power amplifier circuit provided by an embodiment of the present application can convert the first power amplifier circuit 700 into The first radio frequency signal input terminal 701a, the second radio frequency signal input terminal 701b of the first power amplifier circuit 700, the first radio frequency signal input terminal 711a of the second power amplifier circuit 710, and the second radio frequency signal input terminal 711b of the second power amplifier circuit 710 serve as The input signal end of the power amplifier circuit is used to access 4 input signals, which can further increase the bandwidth of the power amplifier circuit.

In the above-mentioned embodiments of the present application, two LMBA-BSS power amplifier circuits are combined in a two-way Doherty manner. In some embodiments, multiple power amplifier circuits can also be connected in parallel in a multi-way multi-channel manner. The combination is performed in the Hetty way, for example, as shown in Figure 14, three power amplifier circuits are combined. Each additional power amplifier circuit needs to be connected in series with an additional λ/4 phase line in front of the RF signal input end of the new power amplifier circuit to ensure phase alignment. In the case of three power amplifier circuits, for example, two power amplifier circuits need to be connected in series. Each radio frequency signal input terminal is connected in series with two λ/4 phase lines. For a power amplifier circuit with n power amplifier circuits connected in parallel, n-1 λ/4 phase lines need to be connected in series at the RF signal input end of the n-th power amplifier circuit, and n-1 Doherty junctions need to be connected at the output end of the power amplifier circuit. The circuit breaker performs the circuit merging.

For example, the power amplifier circuit shown in FIG. 14 includes a first power amplifier circuit 810, a second power amplifier circuit 820 and a third power amplifier circuit 830, in which a first λ/4 phase line is provided in front of the radio frequency signal input end of the second power amplifier circuit 820. 865. The radio frequency signal input end of the third power amplifier circuit 830 is provided with a second λ/4 phase line 866 and a third λ/4 phase line 867. The first power amplifier circuit 810 and the second power amplifier circuit 820 are combined through the first Doherty The signal output by the first Doherty combiner 840 and the signal output by the third power amplifier circuit 830 are combined by the second Doherty combiner 850 .

The power amplifier circuit also includes a first power divider 861, a second power divider 862, a third power divider 863 and a fourth power divider 864.

The first power divider 861 is a one-to-three power divider, including an input terminal 861a, a first output terminal 861b, a second output terminal 861c and a third output terminal 861d. The second power divider 816, the third power divider 826, and the third power divider 836 are all divided into two power dividers, including an input end, a first output end, and a second output end.

Among them, the first power divider 861 is used to divide the input signal into three signals, and each signal enters a power amplifier circuit respectively.

For example, the first output terminal 861b of the first power divider 861 is connected to the input terminal 862a of the second power divider 862, and the first output terminal 862b of the second power divider 862 is connected to the first radio frequency signal input of the first power amplifier circuit 810. The terminal 811a is connected, and the second output terminal 862c of the second power divider 862 is connected to the second radio frequency signal input terminal 811b of the first power amplifier circuit 810 . The second power divider 862 is used to further divide the signal output by the first output terminal 861b of the first power divider 861 into two signals, and transmit them to the control path power amplifier and the balance path power amplifier of the first power amplifier circuit 810 respectively. The first power amplifier circuit 810 amplifies this signal.

The second output terminal 861c of the first power divider 861 is connected to the input terminal 863a of the third power divider 863 through the first λ/4 phase line 865. The first output terminal 863b of the third power divider 863 is connected to the first radio frequency signal input terminal 821a of the second power amplifier circuit 820, and the second output terminal 863c of the third power divider 863 is connected to the second radio frequency signal input terminal 821a of the second power amplifier circuit 820. The signal input terminal 821b is connected, and the third power divider 863 is used to further divide the signal output by the second output terminal 861c of the first power divider 861 into two signals, and transmit them to the control circuit of the second power amplifier circuit 820 respectively. The second power amplifier circuit 820 amplifies the signal of this channel.

The third output terminal of the first power divider 800 is connected to the input terminal 864a of the fourth power divider 864 through the second λ/4 phase line 866 and the third λ/4 phase line 867 in sequence. The first output terminal 864b of the fourth power divider 864 is connected to the first radio frequency signal input terminal 831a of the third power amplifier circuit 830, and the second output terminal 864c of the fourth power divider 864 is connected to the second radio frequency signal of the third power amplifier circuit 830. Input 831b. The fourth power divider 863 is used to further divide the signal output by the third output terminal 861d of the first power divider 861 into two signals, and transmit them to the control path power amplifier and the balance path power amplifier of the third power amplifier circuit 830 respectively. The third power amplifier circuit 830 amplifies this signal.

The radio frequency signal output terminal 817 of the first power amplifier circuit 810 is connected to the first input terminal 841 of the first Doherty combiner 840 , and the radio frequency signal output terminal 827 of the second power amplifier circuit 820 is connected to the first Doherty combiner 840 The second input terminal 842 is connected to the first Doherty combiner 840 for power synthesis of the amplified signals of the first power amplifier circuit 810 and the second power amplifier circuit 820. Terminal 843 is connected to the first input terminal 851 of the second Doherty combiner 850, and the second input terminal 852 of the second Doherty combiner 850 is connected to the radio frequency signal output terminal of the third power amplifier circuit 830. The second The Doherty combiner 850 is used to combine and output the power-synthesized signal of the first power amplifier circuit 810 and the second power amplifier circuit 820 with the amplified signal of the third power amplifier circuit 830, where the second Doherty combiner The output 853 of 850 is also connected to ground via load resistor 880 .

The working principle of the power amplifier circuit of the three power amplifier circuits is the same as the working principle of the power amplifier circuit of the two power amplifier circuits shown in FIG. 7 , and will not be described again here. By connecting more power amplifier circuits, high-efficiency power amplification with a larger backoff range can be achieved.

The efficiency versus power variation curve of the embodiment of the present application is shown in Figure 15. The dotted line represents the gain curve of the power amplification point, and the solid line represents the efficiency curve. As shown in Figure 15, the output power of the solid line ranges from 44dBm to 59dBm, and still maintains an efficiency of more than 60%, achieving high efficiency under a large rollback range. The dotted line represents the compression characteristics of the power amplifier circuit provided by the embodiment of the present application as the power changes.

In the above example, the power amplifier circuit includes an input signal terminal, and the input signal is divided into three paths through the first power divider 861, and then the second power divider 862, the third power divider 863 and the fourth power divider respectively 864 distributes the signal and transmits it to the first power amplifier circuit 810, the second power amplifier circuit 820 and the third power amplifier circuit 830.

The embodiment of the present application also provides the structure of a dual-input multi-power amplifier circuit, as shown in Figure 16. The power amplifier circuit includes a first input signal terminal and a second input signal terminal. The first input signal terminal is connected to the input terminal 861a of the first power divider 861. The first output terminal 861b of the first power divider 861 is connected to the first power amplifier circuit. The second radio frequency signal input terminal 811b of 810; the second output terminal 861c of the first power divider 861 is connected to the first radio frequency signal input terminal 821a of the second power amplifier circuit 820 through the λ/4 phase line 863; the first power divider 861 The third output terminal 861d is connected to the first radio frequency signal input terminal 831a of the third power amplifier circuit 830 through the λ/4 phase line 864 and the λ/4 phase line 865 in sequence.

The second input signal terminal is connected to the input terminal 862a of the second power divider 862, and the first output terminal 862b of the second power divider 862 is connected to the first radio frequency signal input terminal 811a of the first power amplifier circuit 810;

The second output terminal 862c of the second power divider 862 is connected to the second radio frequency signal input terminal 821b of the second power amplifier circuit 820 through the λ/4 phase line 866; the third output terminal 862d of the second power divider 862 is connected through the λ/4 phase line 866. The phase line 867 and the λ/4 phase line 868 are connected to the second radio frequency signal input terminal 831b of the third power amplifier circuit 830; the working principle of the power amplification circuit of the three power amplifier circuits is the same as the power amplification of the two power amplifier circuits provided in the previous embodiment. The working principle of the circuit is the same and will not be described in detail here. By connecting more power amplifier circuits, high-efficiency power amplification with a larger backoff range can be achieved.

The dual-input power amplifier circuit in the above example is only an illustrative description of the embodiments of the present application and is not a limitation of the embodiments of the present application. The dual-input power amplifier circuit may also include other power distribution methods for input signals.

In addition, in order to achieve a larger bandwidth, more variables can be controlled, and a greater degree of freedom can be achieved. The embodiment of the present application provides a multi-input power amplification circuit as shown in Figure 17. The power amplifier circuit includes a first input signal terminal, a second input signal terminal and a third signal input terminal, wherein the first input signal terminal is connected to the input terminal 862a of the second power divider 862, and the two outputs of the second power divider 862 The terminals are respectively connected to the first radio frequency signal input terminal 811a and the second radio frequency signal input terminal 811b of the first power amplifier circuit 810.

The second input signal terminal is connected to the input terminal 863a of the third power divider 863 through the λ/4 phase line 865; the two output terminals of the third power divider 863 are respectively connected to the first radio frequency signal input terminal 821a of the second power amplifier circuit 820. and the second radio frequency signal input terminal 821b.

The third input signal terminal is connected to the input terminal 864a of the fourth power divider 864 through the λ/4 phase line 866 and the λ/4 phase line 867. The two output terminals of the fourth power divider 864 are respectively connected to the first radio frequency signal input terminal 831a and the second radio frequency signal input terminal 831b of the third power amplifier circuit 830.

As can be seen from Figure 17, the power amplifier circuit can also process three input signals to increase the bandwidth of the power amplifier circuit. By connecting more power amplifier circuits, high-efficiency power amplification with a larger backoff range can be achieved.

Of course, in order to achieve a larger bandwidth, more channels of input signals can also be connected. For example, as shown in Figure 18, another power amplifier circuit provided by the embodiment of the present application can use the first power amplifier circuit 810. The first radio frequency signal input terminal 811a, the second radio frequency signal input terminal 811b of the first power amplifier circuit 810, the first radio frequency signal input terminal 821a of the second power amplifier circuit 820, the second radio frequency signal input terminal 821b of the second power amplifier circuit 820, The first radio frequency signal input terminal 831a of the third power amplifier circuit 830 and the second radio frequency signal input terminal 831b of the third power amplifier circuit 830 are used as input signal terminals of the power amplifier circuit for accessing 6 input signals, which can further increase the power. The bandwidth of the amplifier circuit.

Of course, the power amplifier circuit provided by the embodiment of the present application can also have a larger number of power amplifier circuits, or can also have a larger number of input signal terminals, so as to achieve high power with larger bandwidth and larger backoff. enlarge. In the embodiment of the present application, in order to increase the bandwidth, a larger number of input signal terminals can be used to provide independent phase adjustment. For example, the second input signal terminal in Figure 8 can provide independent phase adjustment. In actual implementation, the λ/4 phase line 730 In the process, the λ/4 phase line 730 and λ/4 phase line 731 in Figure 12 can be omitted; the λ/4 phase line 865, λ/4 phase line 866 and λ/4 phase line 867 in Figure 17; Figure The λ/4 phase line 864, λ/4 phase line 865, λ/4 phase line 866, λ/4 phase line 867, λ/4 phase line 868 and λ/4 phase line 869 in 18 can be omitted for the same reason. . Embodiments of the present application also provide a radio frequency transceiver device. The radio frequency transceiver device may be a transmitting device in the wireless communication system shown in FIG. 1 , or may also be a receiving device in the wireless communication system shown in FIG. 1 . The radio frequency transceiver device includes a radio frequency chip and the power amplifier circuit provided in the previous embodiment. The radio frequency chip is connected to the power amplifier circuit, so that the signal output by the radio frequency chip can be amplified and transmitted to the transmitter for transmission, or the signal received by the antenna can be amplified. and then transmitted to the radio frequency chip.

The above are only specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto. Any person familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed by the present invention. should be covered by the protection scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claims.

Claims

A power amplifier circuit, characterized in that it includes: a Doherty combiner and two power amplifier circuits; the two power amplifier circuits include: a first power amplifier circuit and a second power amplifier circuit:

The power amplifier circuit includes a first radio frequency signal input terminal, a second radio frequency signal input terminal, an average amplifier, a quadrature splitter, a quadrature combiner, a first peak amplifier, a second peak amplifier and a radio frequency signal output terminal;

The input terminal of the averaging amplifier is connected to the first radio frequency signal input terminal;

The input end of the orthogonal splitter is connected to the second radio frequency signal input end, the isolation end of the orthogonal splitter is grounded through a load resistor, and the through end of the orthogonal splitter is connected to the third radio frequency signal input end. The input end of a peak amplifier is connected, and the coupling end of the quadrature splitter is connected to the input end of the second peak amplifier;

The first input end of the quadrature combiner is connected to the output end of the first peak amplifier, the second input end of the quadrature combiner is connected to the output end of the second peak amplifier, and the The isolation end of the quadrature combiner is connected to the output end of the averaging amplifier, and the output end of the quadrature combiner is connected to the radio frequency output end of the power amplifier circuit;

The radio frequency output end of the first power amplifier circuit is connected to the first input end of the Doherty combiner, and the radio frequency output end of the second power amplifier circuit is connected to the second input end of the Doherty combiner. Connection, the Doherty combiner is used to power combine the amplified signals of the first power amplifier circuit and the second power amplifier circuit;

Wherein, the bias states of the averaging amplifier of the first power amplifier circuit and the averaging amplifier of the second power amplifier circuit are different.
The power amplifier circuit according to claim 1, characterized in that the average amplifier of the first power amplifier circuit is biased in a class AB bias state, and the average amplifier of the second power amplifier circuit is biased in a class C bias state. .
The power amplifier circuit according to claim 1 or 2, characterized in that the first peak amplifier and the second peak amplifier of the first power amplifier circuit and the first peak amplifier and the second peak amplifier of the second power amplifier circuit Both are biased in class C bias state.
The power amplifier circuit according to any one of claims 1 to 3, characterized in that the power amplifier circuit includes a phase-shifting network, and the phase-shifting network is disposed between the radio frequency signal input end and the input end of the averaging amplifier. between.
The power amplifier circuit according to any one of claims 1 to 4, characterized in that the power amplifier circuit further includes a first power divider, a second power divider, a third power divider and a signal input terminal;

The signal input end is connected to the input end of the first power divider, the first output end of the first power divider is connected to the input end of the second power divider, and the first power divider The second output terminal is connected to the input terminal of the third power device;

The first output end of the second power divider is connected to the first radio frequency signal input end of the first power amplifier circuit, and the second output end of the second power divider is connected to the second end of the first power amplifier circuit. RF signal input terminal connection;

The first output end of the third power divider is connected to the first radio frequency signal input end of the second power amplifier circuit, and the second output end of the third power divider is connected to the second end of the second power amplifier circuit. RF signal input terminal connection.
The power amplifier circuit according to claim 1, characterized in that the power amplifier circuit further includes a phase line, and the phase line is connected between the output end of the first power divider and the input end of the third power divider. Wire.
The power amplifier circuit according to any one of claims 1 to 4, further comprising a first power divider, a second power divider, a first signal input terminal and a second signal input terminal;

The first signal input end is connected to the input end of the first device, the second signal input end is connected to the input end of the second power divider, and the first output end of the first power divider is is connected to the second radio frequency signal input end of the first power amplifier circuit, and the second output end of the first power divider is connected to the first radio frequency signal input end of the second power amplifier circuit;

The first output end of the second power splitter is connected to the first radio frequency signal input end of the first power amplifier circuit, and the first radio frequency signal input end of the first power amplifier circuit is connected to the input end of the quadrature splitter. Connection; the second output end of the second power splitter is connected to the second radio frequency signal input end of the second power amplifier circuit, and the second radio frequency signal input end is connected to the input end of the orthogonal splitter.
The power amplifier circuit according to claim 7, characterized in that it includes a first phase line and a second phase line;

The first phase line is located between the second output end of the first power divider and the phase shifting network, and the second phase line is located between the second output end of the second power divider and the between the input terminals of the quadrature combiner.
The power amplifier circuit according to claim 6 or 8, characterized in that the Doherty combiner includes a first input terminal, a second input terminal, a microstrip line and an output terminal;

The first input end of the Doherty combiner is connected to the radio frequency signal output end of the first power amplifier circuit, and the second input end of the Doherty combiner is connected to the radio frequency signal output end of the second power amplifier circuit. end;

The first input end of the Doherty combiner is connected to the output end through the microstrip line;

The phase delay of the microstrip line is the same as the phase delay of the phase line.
A radio frequency transceiver device, characterized in that the radio frequency transceiver device includes a radio frequency chip and a power amplifier circuit according to any one of claims 1 to 9, and the radio frequency chip is connected to the power amplifier circuit.