WO2024035394A1 - Appareil et procédé pour un sous-système de traitement de petits paquets adaptatif - Google Patents

Appareil et procédé pour un sous-système de traitement de petits paquets adaptatif Download PDF

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Publication number
WO2024035394A1
WO2024035394A1 PCT/US2022/039840 US2022039840W WO2024035394A1 WO 2024035394 A1 WO2024035394 A1 WO 2024035394A1 US 2022039840 W US2022039840 W US 2022039840W WO 2024035394 A1 WO2024035394 A1 WO 2024035394A1
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WIPO (PCT)
Prior art keywords
small
packet
subsystem
during
processing subsystem
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PCT/US2022/039840
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English (en)
Inventor
Su-Lin Low
Jian Gu
Na CHEN
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Zeku, Inc.
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Priority to PCT/US2022/039840 priority Critical patent/WO2024035394A1/fr
Publication of WO2024035394A1 publication Critical patent/WO2024035394A1/fr

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W76/00—Connection management
    • H04W76/20—Manipulation of established connections
    • H04W76/28—Discontinuous transmission [DTX]; Discontinuous reception [DRX]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
    • H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
    • H04L1/18—Automatic repetition systems, e.g. Van Duuren systems
    • H04L1/1829—Arrangements specially adapted for the receiver end
    • H04L1/1854—Scheduling and prioritising arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W52/00—Power management, e.g. TPC [Transmission Power Control], power saving or power classes
    • H04W52/02—Power saving arrangements
    • H04W52/0209—Power saving arrangements in terminal devices
    • H04W52/0212—Power saving arrangements in terminal devices managed by the network, e.g. network or access point is master and terminal is slave
    • H04W52/0216—Power saving arrangements in terminal devices managed by the network, e.g. network or access point is master and terminal is slave using a pre-established activity schedule, e.g. traffic indication frame
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W52/00—Power management, e.g. TPC [Transmission Power Control], power saving or power classes
    • H04W52/02—Power saving arrangements
    • H04W52/0209—Power saving arrangements in terminal devices
    • H04W52/0225—Power saving arrangements in terminal devices using monitoring of external events, e.g. the presence of a signal
    • H04W52/0229—Power saving arrangements in terminal devices using monitoring of external events, e.g. the presence of a signal where the received signal is a wanted signal
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W76/00—Connection management
    • H04W76/20—Manipulation of established connections
    • H04W76/27—Transitions between radio resource control [RRC] states

Definitions

  • Embodiments of the present disclosure relate to apparatus and method for wireless communication.
  • Wireless communication systems are widely deployed to provide various telecommunication services such as telephony, video, data, messaging, and broadcasts.
  • cellular communication such as the 4th-gen eration (4G) Long Term Evolution (LTE) and the 5th- generation (5G) New Radio (NR)
  • 4G Long Term Evolution
  • 5G 5th- generation
  • 3GPP 3rd Generation Partnership Project
  • VoIP voice over internet protocol
  • a baseband chip may include a small-packet processing subsystem.
  • the small-packet processing subsystem may be configured to receive a semi -persistent scheduling (SPS) activation message associated with a downlink (DL) small-packet reception interval.
  • SPS semi -persistent scheduling
  • the small-packet processing subsystem may be configured to enter a sleep mode during an inactive period of the DL smallpacket reception interval.
  • the small-packet processing subsystem may be configured to enter an awake mode during an active period of the DL small-packet reception interval.
  • the small-packet processing subsystem may be configured to attempt to decode a physical downlink shared channel (PDSCH) during the active period of the DL small-packet reception interval to receive a DL smallpacket from a base station.
  • the base band chip may include a Layer 1 physical downlink control channel (PDCCH) subsystem.
  • the Layer 1 PDCCH subsystem may be configured to remain powered down during the DL small-packet reception interval unless the small-packet processing subsystem is unable to decode the PDSCH during the active period of the DL small-packet reception interval.
  • a baseband chip may include a small-packet processing subsystem located in a first power domain.
  • the baseband chip may include a DL data plane subsystem located in a second power domain separate from the first power domain.
  • the baseband chip may include a UL data plane subsystem located in a third power domain separate from the first power domain and the second power domain.
  • the small-packet processing subsystem may be configured for single CC-only communication.
  • the DL data plane subsystem and the UL data plane subsystem may be configured for multi -CC communication.
  • a method of wireless communication of a baseband chip may include receiving, by a smallpacket processing subsystem, an SPS activation message associated with a DL small-packet reception interval.
  • the method may include entering, by the small-packet processing subsystem, a sleep mode during an inactive period of the DL small-packet reception interval.
  • the method may include entering, by the small-packet processing subsystem, an awake mode during an active period of the DL small-packet reception interval.
  • the method may include attempting, by the small-packet processing subsystem, to decode a PDSCH during the active period to receive a DL small-packet from a base station.
  • the method may include powering down a Layer 1 PDCCH subsystem during the DL small-packet reception interval unless the small-packet processing subsystem is unable to decode the PDSCH during the active period of the DL small-packet reception interval.
  • FIG. 1 illustrates a block diagram of an example baseband chip protocol stack.
  • FIG. 2 illustrates an exemplary wireless network, according to some embodiments of the present disclosure.
  • FIG. 3 illustrates a block diagram of an exemplary node, according to some embodiments of the present disclosure.
  • FIG. 4 illustrates a block diagram of an exemplary apparatus including a baseband chip, a radio frequency (RF) chip, and a host chip, according to some embodiments of the present disclosure.
  • RF radio frequency
  • FIG. 5A illustrates a detailed block diagram of an exemplary baseband chip, according to some embodiments of the present disclosure.
  • FIG. 5B illustrates a conceptual flow diagram of an exemplary data flow between an apparatus that includes the exemplary baseband chip of FIG. 5 A and a base station, according to some embodiments of the present disclosure.
  • FIG. 5C illustrates a timing diagram of small-packet processing operations implemented by the exemplary baseband chip of FIG. 5 A, according to some embodiments of the present disclosure.
  • FIGs. 6A-6C are a flowchart of an exemplary method of wireless communication, according to some embodiments of the present disclosure.
  • references in the specification to “one embodiment,” “an embodiment,” “an example embodiment,” “some embodiments,” “certain embodiments,” etc. indicate that the embodiment described may include a particular feature, structure, or characteristic, but every embodiment may not necessarily include the particular feature, structure, or characteristic. Moreover, such phrases do not necessarily refer to the same embodiment. Further, when a particular feature, structure, or characteristic is described in connection with an embodiment, it would be within the knowledge of a person skilled in the pertinent art to effect such feature, structure, or characteristic in connection with other embodiments whether or not explicitly described.
  • terminology may be understood at least in part from usage in context.
  • the term “one or more” as used herein, depending at least in part upon context may be used to describe any feature, structure, or characteristic in a singular sense or may be used to describe combinations of features, structures or characteristics in a plural sense.
  • terms, such as “a,” “an,” or “the,” again, may be understood to convey a singular usage or to convey a plural usage, depending at least in part upon context.
  • the term “based on” may be understood as not necessarily intended to convey an exclusive set of factors and may, instead, allow for existence of additional factors not necessarily expressly described, again, depending at least in part on context.
  • CDMA code division multiple access
  • TDMA time division multiple access
  • FDMA frequency division multiple access
  • OFDMA orthogonal frequency division multiple access
  • SC- FDMA single-carrier frequency division multiple access
  • WLAN wireless local area network
  • a CDMA network may implement a radio access technology (RAT), such as Universal Terrestrial Radio Access (UTRA), evolved UTRA (E-UTRA), CDMA 2000, etc.
  • RAT radio access technology
  • UTRA Universal Terrestrial Radio Access
  • E-UTRA evolved UTRA
  • CDMA 2000 etc.
  • GSM Global System for Mobile Communications
  • An OFDMA network may implement a RAT, such as LTE or NR.
  • a WLAN system may implement a RAT, such as Wi-Fi.
  • the techniques described herein may be used for the wireless networks and RATs mentioned above, as well as other wireless networks and RATs.
  • FIG. 1 illustrates a block diagram of an example baseband chip 100.
  • a conventional baseband chip 100 may include PHY subsystem 102 configured to transmit and/or receive data packets over an air interface, a protocol stack 104 (e.g., residing at the baseband chip) that includes a control plane 106 and a DP 108, Layer 3/Layer 4 subsystems 110, and an application processor (AP)/host 112.
  • PHY subsystem 102 configured to transmit and/or receive data packets over an air interface
  • a protocol stack 104 e.g., residing at the baseband chip
  • AP application processor
  • Control plane 106 performs two main functions: non-access stratum (NAS) function and radio resource control (RRC) function.
  • NAS non-access stratum
  • RRC radio resource control
  • the NAS function performs network layer control that relates to mobility management, session management, security management, and system selection, just to name a few.
  • the RRC function performs radio resource allocation and configuration, as well as the radio channel control of radio bearers, logical channels, and security (ciphering, integrity configurations).
  • DP 108 performs Layer 2 and Layer 3/4 functions.
  • Layer 2 functions relate to protocol data unit (PDU) processing.
  • the medium access control (MAC) layer performs multiplexing and demultiplexing, and mapping of logical channels to transport channels.
  • the radio link control (RLC) layer performs automatic repeat request (ARQ) procedures at the radio link level and the error recovery of each logical channel.
  • the packet data convergence protocol (PDCP) layer performs packet level processing for data ciphering, integrity, and compression.
  • SDAP service data adaptation protocol
  • QoS quality-of-service
  • the example baseband chip 100 illustrated in FIG. 1 uses a software-centric Layer 2 protocol data stack. Namely, the data stack processing resides on a Layer 2 main processor and uses a limited number of hardware accelerators. As such, the Layer 2 main processor (not shown) may access a data packet by direct memory access (DMA) from a physical (PHY) layer memory at the PHY subsystem(s) 102. Furthermore, the hardware (HW) accelerators may DMA a UL data packet to the Layer 3 external memory of Layer 3 subsystem 110.
  • DMA direct memory access
  • PHY physical
  • HW hardware
  • Layer 2 data processing e.g., processing the transport blocks received from Layer 1 (e.g., PHY subsystem 102) in the DL data plane or processing data packets received from Layer 3 in the UL data plane
  • Layer 2 data processing is usually implemented using software modules executed on a generic baseband processor, such as a central processing unit (CPU) or a digital signal processor (DSP).
  • a generic baseband processor such as a central processing unit (CPU) or a digital signal processor (DSP).
  • CPU central processing unit
  • DSP digital signal processor
  • data may be frequently transferred between the generic main processor (not shown) and external memory (Layer 3 external memory or Layer 2 buffer - not shown), e.g., for buffering between each layer.
  • Layer 3 external memory or Layer 2 buffer - not shown external memory
  • the known solutions for Layer 2 data processing suffer from high power consumption, large data buffer, and long process delays.
  • a user equipment when a user equipment (UE) is configurated with Carrier Aggregation (CA), multiple Component Carriers (CCs) are typically aggregated for reception and transmission. As such, the user equipment may receive multiple grants concurrently, one from each CC and Cell, which determines the scheduled packets reception and transmission in the downlink and uplink directions, respectively.
  • CA Carrier Aggregation
  • the DL MAC layer receives code blocks from the PHY subsystem 102 from multiple CCs.
  • the DL MAC layer may then re-order each Transport Block (TB), extract the MACsubPDU headers to obtain the MAC PDUs, and transfer the packet to the RLC and PDCP DP Layer 2 for further processing in each logical channel and associated radio bearers.
  • TB Transport Block
  • the packets are sent to Layer 3/Layer 4 subsystems 110, where the QoS flows in each radio bearer are routed to the appropriate application.
  • the Layer 3/Layer 4 subsystems 110 prepare the UL packets from multiple QoS flows for each radio bearers, and the UL packets may then be transferred to Layer 2 logical channel queues, ready for transmission.
  • the UL MAC layer receives the UL grant, which allocates resources for the physical uplink shared channel (PUSCH)) using the physical downlink control channel (PDCCH) at the beginning of a slot.
  • the UL grant may be received in a downlink control indicator (DCI) on the PDCCH.
  • DCI downlink control indicator
  • the UL grant may inform the UE to transmit the UL medium access control protocol data unit (MACPDU) at a time delay equivalent to K2 slots away from the current slot.
  • DCI downlink control indicator
  • the UL MAC scheduling algorithm uses a Logical Channel Prioritization (LCP) method to schedule packets from a logical channel (LC) according to allocated grant bytes from a configured maximum bucket size setting.
  • LCP Logical Channel Prioritization
  • Baseband chips are generally designed to support different application types, e.g., such as high-throughput, high-latency data transfers, as well as low-latency, low-data rate applications such as VoIP, and hence, one challenge of DP 108 processing relates to power consumption.
  • DP 108 has a single DP processing data path that either has a single power domain for processing all packets of different QoS traffic profiles or two power domains, one for DL DP packet processing and another for UL DP packet processing.
  • baseband chip 100 may be unable to power off subsystems that may not be needed in all use cases.
  • the small-packet processing data stack e.g., VoIP processing data stack
  • the control plane subsystem that implements IP multimedia subsystem (IMS) call setup may be performed independent of the DP processing subsystem and located on a different system-on-chip (SoC).
  • SoC system-on-chip
  • baseband chip 100 monitors the physical downlink control channel (PDCCH) for downlink control information (DCI) related to a DL VoIP packet and/or scheduled resources for a UL VoIP packet in every slot using a power-hungry PHY PDCCH subsystem.
  • PDCCH physical downlink control channel
  • DCI downlink control information
  • baseband chip 100 utilizes hardware and central processing unit (CPU) computational resources for small-packet, low-throughput traffic, e.g., such as VoIP packets and/or industrial intemet-of-things (IIOT) packets, inefficiently.
  • CPU central processing unit
  • IIOT industrial intemet-of-things
  • baseband chip 100 consumes an undesirable amount of power in receiving and transmitting small VoIP and/or IIOT data packets.
  • VoIP applications may require large memory and processor utilization, as well as an undesirable amount of microprocessor without interlocked pipelined stages (MIPS) cycles. This increases power consumption at baseband chip 100.
  • MIPS microprocessor without interlocked pipelined stages
  • the present disclosure provides an exemplary small-packet processing subsystem (e.g., a low-power, VoIP processing subsystem (VPS), an Internet-of-things (IOT) subsystem, an IIOT subsystem, an automotive-communication subsystem, a sidelink-communication subsystem, etc.).
  • VPS VoIP processing subsystem
  • IOT Internet-of-things
  • IIOT IIOT subsystem
  • automotive-communication subsystem e.g., a sidelink-communication subsystem
  • a sidelink-communication subsystem e.g., a sidelink-communication subsystem, etc.
  • this smallpacket processing subsystem is designed to process VoIP data packets faster, more efficiently, and using fewer memory and computational resources than baseband chip 100, for example.
  • the VPS of the present disclosure is designed with a Iite-Layer2/Layer3 (lite-L2/L3) processing component and a lite-physical layer (lite-PHY) processing component located in a VPS- power domain that is dedicated to VoIP data path processing.
  • the lite-L2/L3 processing component and the lite-PHY processing component may each include one or more microcontrollers (uCs) that execute custom instructions.
  • the commands generated by the execution of these custom instructions are used by protocol stack hardware accelerators or circuits, which are less complex and consume less power than the counterpart protocol stack hardware accelerators located along the DL data path and the UL data path.
  • the VPS described below, and its hardware accelerators may be tailored for single component carrier (CC), low- throughput VoIP data packets, which are received and transmitted via the physical downlink shared channel (PDSCH) and the physical uplink shared channel (PUSCH), respectively.
  • CC single component carrier
  • PDSCH physical downlink shared channel
  • PUSCH physical uplink shared channel
  • the hardware accelerators located in the DL DP data path and the UL DP data path may be more complex and consume more power because they are configured for carrier aggregation using multiple CCs.
  • the VPS data processing path may be activated and configured upon control plane IMS call setup.
  • DL semi-persistent scheduling (SPS) and UL configured grant(s) (CG) may configure predefined voice packet sampling intervals (e.g., 20ms, 40ms, etc.), which are used by the control plane RRC function to set up lower layer (e.g., PHY layer) and upper layer (e.g., Layer 2, Layer 3, etc.) parameters for the VPS.
  • SPS semi-persistent scheduling
  • CG UL configured grant(s)
  • predefined voice packet sampling intervals e.g., 20ms, 40ms, etc.
  • lower layer e.g., PHY layer
  • upper layer e.g., Layer 2, Layer 3, etc.
  • the PHY PDCCH subsystem may be activated to monitor the PDCCH for a DCI indicating a DL VoIP data packet retransmission, which may occur less than or equal to 10% of the time.
  • the PDCCH may still be monitored for hybrid-automatic repeat-request (HARQ) feedback from the base station.
  • HARQ hybrid-automatic repeat-request
  • baseband components e.g., PHY PDCCH subsystem, DL DP subsystem, UL DP subsystem, etc.
  • control plane RRC and PDCCH processing may detect this change, and the PHY PDCCH subsystem, the DL data path (e.g., DL subsystem), and the UL data path (e.g., UL subsystem) may be adaptively activated to facilitate non-smallpacket communication.
  • the RRC function of the control plane subsystem may reconfigure the radio bearers and activate the PHY PDCCH subsystem to monitor the PDCCH in every slot, as well as activate the DL/UL DP data paths.
  • the baseband chip of the present disclosure may implement low- latency, small-packet communication without powering on the PHY PDCCH subsystem for DCI decoding, the DL/UL DP subsystems, or the AP when only small-packet application(s) is/are running.
  • the CPU core and hardware resources may be optimized for various trafficpattern use cases, e.g., such as low-latency, low-throughput communications and high-latency, high-throughput communications, just to name a few; and resource utilization may be adaptively adjusted based on the setup or break down of DP data path radio bearers/logical channels.
  • the VoIP data processing technique described herein utilizes minimal memory and processing resources, as well as an optimized number of MIPS cycles.
  • the present disclosure achieves efficient usage of modem resources to process VoIP protocol data stack using a single microcontroller (uC) in a vertical thread with on-the-fly packet processing.
  • uC microcontroller
  • the signal overhead and bus transactions for interworking with multiple processors and/or SoCs for the VoIP processing data stack may be limited, as compared to other baseband chips in which the VoIP processing data spans multiple power domains, processors, and/or SoCs.
  • the following description of the exemplary small-packet processing subsystem focuses on an exemplary VPS. It is understood that exemplary small-packet processing subsystem and small-packet processing data path are not limited thereto. Instead, the small-packet processing subsystem may include, e.g., an IIOT processing subsystem, an IOT processing subsystem, an automotive-communications processing subsystem, or a sidelinkcommunications processing subsystem, just to name a few. Thus, the structure, design, dedicated power domains, SPS/CG operations, etc.
  • VPS and/or VoIP data processing path may be equally applicable and extended to any small-packet processing subsystem and/or small-packet processing data path without departing from the scope of the present disclosure. Additional details of the exemplary small-packet processing subsystem and its associated baseband chip are provided below in connection with FIGs. 2-7.
  • FIG. 2 illustrates an exemplary wireless network 200, in which some aspects of the present disclosure may be implemented, according to some embodiments of the present disclosure.
  • wireless network 200 may include a network of nodes, such as user equipment 202, an access node 204, and a core network element 206.
  • User equipment 202 may be any terminal device, such as a mobile phone, a desktop computer, a laptop computer, a tablet, a vehicle computer, a gaming console, a printer, a positioning device, a wearable electronic device, a smart sensor, or any other device capable of receiving, processing, and transmitting information, such as any member of a vehicle to everything (V2X) network, a cluster network, a smart grid node, or an Internet-of-Things (loT) node.
  • V2X vehicle to everything
  • cluster network such as a cluster network
  • smart grid node such as a smart grid node
  • Internet-of-Things (loT) node such as any member of a vehicle to everything (V2X) network, a cluster network, a smart grid node, or an Internet-of-Things (loT) node.
  • V2X vehicle to everything
  • LoT Internet-of-Things
  • Access node 204 may be a device that communicates with user equipment 202, such as a wireless access point, a base station (BS), a Node B, an enhanced Node B (eNodeB or eNB), a next-generation NodeB (gNodeB or gNB), a cluster master node, or the like. Access node 204 may have a wired connection to user equipment 202, a wireless connection to user equipment 202, or any combination thereof. Access node 204 may be connected to user equipment 202 by multiple connections, and user equipment 202 may be connected to other access nodes in addition to access node 204. Access node 204 may also be connected to other user equipments.
  • BS base station
  • eNodeB or eNB enhanced Node B
  • gNodeB or gNB next-generation NodeB
  • gNodeB next-generation NodeB
  • access node 204 may operate in millimeter wave (mmW) frequencies and/or near mmW frequencies in communication with the user equipment 202.
  • mmW millimeter wave
  • the access node 204 may be referred to as an mmW base station.
  • Extremely high frequency (EHF) is part of the radio frequency (RF) in the electromagnetic spectrum. EHF has a range of 30 GHz to 300 GHz and a wavelength between 1 millimeter and 10 millimeters. Radio waves in the band may be referred to as a millimeter wave.
  • Near mmW may extend down to a frequency of 3 GHz with a wavelength of 200 millimeters.
  • the super high frequency (SHF) band extends between 3 GHz and 30 GHz, also referred to as centimeter wave. Communications using the mmW or near mmW radio frequency band have extremely high path loss and a short range.
  • the mmW base station may utilize beamforming with user equipment 202 to compensate for the extremely high path loss and short range. It is understood that access node 204 is illustrated by a radio tower by way of illustration and not by way of limitation.
  • Access nodes 204 which are collectively referred to as E-UTRAN in the evolved packet core network (EPC) and as NG-RAN in the 5G core network (5GC), interface with the EPC and 5GC, respectively, through dedicated backhaul links (e.g., SI interface).
  • EPC evolved packet core network
  • 5GC 5G core network
  • access node 204 may perform one or more of the following functions: transfer of user data, radio channel ciphering and deciphering, integrity protection, header compression, mobility control functions (e.g., handover, dual connectivity), inter-cell interference coordination, connection setup and release, load balancing, distribution for non-access stratum (NAS) messages, NAS node selection, synchronization, radio access network (RAN) sharing, multimedia broadcast multicast service (MBMS), subscriber and equipment trace, RAN information management (RIM), paging, positioning, and delivery of warning messages.
  • Access nodes 204 may communicate directly or indirectly (e.g., through the 5GC) with each other over backhaul links (e.g., X2 interface).
  • the backhaul links may be wired or wireless.
  • Core network element 206 may serve access node 204 and user equipment 202 to provide core network services.
  • core network element 206 may include a home subscriber server (HSS), a mobility management entity (MME), a serving gateway (SGW), or a packet data network gateway (PGW).
  • HSS home subscriber server
  • MME mobility management entity
  • SGW serving gateway
  • PGW packet data network gateway
  • EPC evolved packet core
  • core network element 206 includes an access and mobility management function (AMF), a session management function (SMF), or a user plane function (UPF) of the 5GC for the NR system.
  • the AMF may be in communication with a Unified Data Management (UDM).
  • UDM Unified Data Management
  • the AMF is the control node that processes the signaling between the user equipment 202 and the 5GC. Generally, the AMF provides QoS flow and session management. All user Internet protocol (IP) packets are transferred through the UPF. The UPF provides user equipment (UE) IP address allocation as well as other functions. The UPF is connected to the IP Services.
  • the IP Services may include the Internet, an intranet, an IP Multimedia Subsystem (IMS), a PS Streaming Service, and/or other IP services. It is understood that core network element 206 is shown as a set of rack-mounted servers by way of illustration and not by way of limitation.
  • Core network element 206 may connect with a large network, such as the Internet 208, or another Internet Protocol (IP) network, to communicate packet data over any distance.
  • a large network such as the Internet 208, or another Internet Protocol (IP) network
  • IP Internet Protocol
  • data from user equipment 202 may be communicated to other user equipments connected to other access points, including, for example, a computer 210 connected to Internet 208, for example, using a wired connection or a wireless connection, or to a tablet 212 wirelessly connected to Internet 208 via a router 214.
  • computer 210 and tablet 212 provide additional examples of possible user equipments
  • router 214 provides an example of another possible access node.
  • a generic example of a rack-mounted server is provided as an illustration of core network element 206.
  • Database 216 may, for example, manage data related to user subscription to network services.
  • a home location register (HLR) is an example of a standardized database of subscriber information for a cellular network.
  • authentication server 218 may handle authentication of users, sessions, and so on.
  • an authentication server function (AUSF) device may be the entity to perform user equipment authentication.
  • a single server rack may handle multiple such functions, such that the connections between core network element 206, authentication server 218, and database 216, may be local connections within a single rack.
  • Each element in FIG. 2 may be considered a node of wireless network 200. More detail regarding the possible implementation of a node is provided by way of example in the description of a node 300 in FIG. 3.
  • Node 300 may be configured as user equipment 202, access node 204, or core network element 206 in FIG. 2.
  • node 300 may also be configured as computer 210, router 214, tablet 212, database 216, or authentication server 218 in FIG. 2.
  • node 300 may include a processor 302, a memory 304, and a transceiver 306. These components are shown as connected to one another by a bus, but other connection types are also permitted.
  • node 300 When node 300 is user equipment 202, additional components may also be included, such as a user interface (UI), sensors, and the like. Similarly, node 300 may be implemented as a blade in a server system when node 300 is configured as core network element 206. Other implementations are also possible.
  • UI user interface
  • sensors sensors
  • core network element 206 Other implementations are also possible.
  • Transceiver 306 may include any suitable device for sending and/or receiving data.
  • Node 300 may include one or more transceivers, although only one transceiver 306 is shown for simplicity of illustration.
  • An antenna 308 is shown as a possible communication mechanism for node 300. Multiple antennas and/or arrays of antennas may be utilized for receiving multiple spatially multiplex data streams.
  • examples of node 300 may communicate using wired techniques rather than (or in addition to) wireless techniques.
  • access node 204 may communicate wirelessly to user equipment 202 and may communicate by a wired connection (for example, by optical or coaxial cable) to core network element 206.
  • Other communication hardware such as a network interface card (NIC), may be included as well.
  • NIC network interface card
  • node 300 may include processor 302. Although only one processor is shown, it is understood that multiple processors can be included.
  • Processor 302 may include microprocessors, microcontroller units (MCUs), digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), programmable logic devices (PLDs), state machines, gated logic, discrete hardware circuits, and other suitable hardware configured to perform the various functions described throughout the present disclosure.
  • Processor 302 may be a hardware device having one or more processing cores.
  • Processor 302 may execute software.
  • node 300 may also include memory 304. Although only one memory is shown, it is understood that multiple memories can be included. Memory 304 can broadly include both memory and storage.
  • memory 304 may include random-access memory (RAM), read-only memory (ROM), static RAM (SRAM), dynamic RAM (DRAM), ferroelectric RAM (FRAM), electrically erasable programmable ROM (EEPROM), compact disc readonly memory (CD-ROM) or other optical disk storage, hard disk drive (HDD), such as magnetic disk storage or other magnetic storage devices, Flash drive, solid-state drive (SSD), or any other medium that can be used to carry or store desired program code in the form of instructions that can be accessed and executed by processor 302.
  • RAM random-access memory
  • ROM read-only memory
  • SRAM static RAM
  • DRAM dynamic RAM
  • FRAM ferroelectric RAM
  • EEPROM electrically erasable programmable ROM
  • CD-ROM compact disc readonly memory
  • HDD hard disk drive
  • Flash drive such as magnetic disk storage or other magnetic storage devices
  • SSD solid-state drive
  • memory 304 may be embodied by any computer-readable medium, such as a non-transitory computer-readable medium.
  • Processor 302, memory 304, and transceiver 306 may be implemented in various forms in node 300 for performing wireless communication functions.
  • processor 302, memory 304, and transceiver 306 are integrated into a single system- on-chip (SoC) or a single system-in-package (SiP).
  • SoC system- on-chip
  • SiP single system-in-package
  • processor 302, memory 304, and transceiver 306 of node 300 are implemented (e.g., integrated) on one or more SoCs.
  • processor 302 and memory 304 may be integrated on an application processor (AP) SoC (sometimes known as a “host,” referred to herein as a “host chip”) that handles application processing in an operating system (OS) environment, including generating raw data to be transmitted.
  • API application processor
  • processor 302 and memory 304 may be integrated on a baseband processor (BP) SoC (sometimes known as a “modem,” referred to herein as a “baseband chip”) that converts the raw data, e.g., from the host chip, to signals that can be used to modulate the carrier frequency for transmission, and vice versa, which can run a real-time operating system (RTOS).
  • API SoC sometimes known as a “host,” referred to herein as a “host chip”
  • BP baseband processor
  • modem modem
  • RTOS real-time operating system
  • processor 302 and transceiver 306 may be integrated on an RF SoC (sometimes known as a “transceiver,” referred to herein as an “RF chip”) that transmits and receives RF signals with antenna 308.
  • RF SoC sometimes known as a “transceiver,” referred to herein as an “RF chip”
  • RF chip may be integrated as a single SoC.
  • a baseband chip and an RF chip may be integrated into a single SoC that manages all the radio functions for cellular communication.
  • user equipment 202 may include an exemplary baseband chip designed with an adaptive, low-power VPS and/or one or more of the other small-packet processing subsystems mentioned herein.
  • VPS may include simplified hardware, firmware, and custom instructions along the Layer 2/Layer 3 data path and the PHY data path to process VoIP data packets configured for a limited bandwidth (e.g., a single CC).
  • the exemplary baseband chip of user equipment 202 may consume minimal memory and computational resources to process VoIP traffic by placing the VPS in its own power domain.
  • FIG. 4 illustrates a block diagram of an apparatus 400 including a baseband chip 402, an RF chip 404, and a host chip 406, according to some embodiments of the present disclosure.
  • Apparatus 400 may be implemented as user equipment 202 of wireless network 200 in FIG. 2.
  • apparatus 400 may include baseband chip 402, RF chip 404, host chip 406, and one or more antennas 410.
  • baseband chip 402 is implemented by a processor and a memory
  • RF chip 404 is implemented by a processor, a memory, and a transceiver.
  • on-chip memory 418 also known as “internal memory,” e.g., registers, buffers, or caches
  • apparatus 400 may further include an external memory 408 (e.g., the system memory or main memory) that can be shared by each chip 402, 404, or 406 through the system/main bus.
  • baseband chip 402 is illustrated as a standalone SoC in FIG. 4, it is understood that in one example, baseband chip 402 and RF chip 404 may be integrated as one SoC or one SiP; in another example, baseband chip 402 and host chip 406 may be integrated as one SoC or one SiP; in still another example, baseband chip 402, RF chip 404, and host chip 406 may be integrated as one SoC or one SiP, as described above.
  • host chip 406 may generate raw data and send it to baseband chip 402 for encoding, modulation, and mapping. Interface 414 of baseband chip 402 may receive the data from host chip 406. Baseband chip 402 may also access the raw data generated by host chip 406 and stored in external memory 408, for example, using the direct memory access (DMA). Baseband chip 402 may first encode (e.g., by source coding and/or channel coding) the raw data and modulate the coded data using any suitable modulation techniques, such as multi-phase shift keying (MPSK) modulation or quadrature amplitude modulation (QAM).
  • MPSK multi-phase shift keying
  • QAM quadrature amplitude modulation
  • Baseband chip 402 may perform any other functions, such as symbol or layer mapping, to convert the raw data into a signal that can be used to modulate the carrier frequency for transmission.
  • baseband chip 402 may send the modulated signal to RF chip 404 via interface 414.
  • RF chip 404 through the transmitter, may convert the modulated signal in the digital form into analog signals, i.e., RF signals, and perform any suitable front-end RF functions, such as filtering, digital pre-distortion, up-conversion, or sample-rate conversion.
  • Antenna 410 e.g., an antenna array
  • antenna 410 may receive RF signals from an access node or other wireless device.
  • the RF signals may be passed to the receiver (Rx) of RF chip 404.
  • RF chip 404 may perform any suitable front-end RF functions, such as filtering, IQ imbalance compensation, down-paging conversion, or sample-rate conversion, and convert the RF signals (e.g., transmission) into low-frequency digital signals (baseband signals) that can be processed by baseband chip 402.
  • baseband chip 402 may be grouped into multiple power domains according to use-case operations to efficiently control the turning on/off of the appropriate functions.
  • the power domains include power domain A, power domain B, power domain C, power domain D, and power domain E.
  • Power domain A which includes a PHY PDCCH subsystem (e.g. PHY PDCCH subsystem 520 in FIG. 5A), may be responsible for the monitoring/reception of the PDCCH and the decoding of the DCI, which schedules the DL grant and the UL grant.
  • the DL grant may include SPS
  • the UL grant for VoIP may include a CG.
  • Power domain B which includes a VPS (e.g., VPS 522 in FIG.
  • Power domain B may encompass the entire data path from RF, digital front end (DFE) circuit, demodulator, PDSCH decoder, and Layer 2/Layer 3 hardware accelerators for, e.g., the MAC layer, the RLC layer, the PDCP layer, the ROHC layer, the IP layer, the UDP layer, and the RTP layer.
  • Power domain C which includes DL DP subsystem (e.g., DL DP subsystem 524 in FIG.
  • Power domain C may include RF chip 404, a PHY receiption (RX) subsystem (e.g., PHY RX subsystem 512 in FIG. 5A), and the DL DP subsystem (e.g., DL DP subsystem 510 in FIG. 5 A).
  • the DL DP subsystem may include Layer 2/Layer 3 hardware accelerators/circuits (e.g., the MAC layer, the RLC layer, the PDCP layer, the ROHC layer, the IP layer, the UDP layer, and the RTP layer).
  • Power domain D which includes a UL DP subsystem (e.g., UL DP subsystem 526 in FIG.
  • the processing of UL data packets may include DP Layer 2/Layer 3 encoding, PHY TX encoding, and baseband/RF transmission to the base station. It also includes the transmission of UL control information via the physical uplink control channel (PUCCH). UL control information may be sent via PUCCH when there is no UL data packets to send via the physical uplink shared channel (PUSCH).
  • Power domain E which includes a control plane subsystem (e.g., control plane subsystem 528 in FIG. 5A), may be responsible for the control plane functions, e.g., such as those associated with the RRC layer, the NAS layer, the IP layer, the UDP layer, the SIP layer, and the IMS layer.
  • FIG. 5 A illustrates a detailed block diagram 500 of baseband chip 402 of FIG. 4, according to some embodiments of the present disclosure.
  • FIG. 5B illustrates a conceptual flow diagram of an exemplary data flow 535 between an apparatus and a base station, according to some embodiments of the present disclosure.
  • FIG. 5C illustrates a timing diagram 555 of VoIP operations implemented by the exemplary baseband chip of FIG. 5A, according to some embodiments of the present disclosure.
  • FIGs. 5A-5C will be described together.
  • baseband chip 402 includes a PHY PDCCH subsystem 520 located in power domain A, a VPS 522 located in power domain B, a DL DP subsystem 524 located in power domain C, a UL DP subsystem 526 located in power domain D, and a control plane subsystem 428 located in power domain E.
  • VPS 522 may include simplified hardware, firmware, and custom instructions along the Layer 2/Layer 3 data path
  • lite-PHY subsystem 508 may include simplified hardware, firmware, and custom instructions along the PHY data path to process VoIP data packets for a single CC-only bandwidth.
  • baseband chip 402 may consume minimal memory and computational resources to process VoIP traffic by placing each of the various subsystems 520, 522, 524, 526, and 528 in dedicated power domains. In so doing, the PHY PDCCH subsystem 520, DL DP subsystem 524, UL DP subsystem 526, and control plane subsystem 528 may be powered down at least a portion of the time when only VoIP applications are active. Still further, by using SPS for DL VoIP reception, baseband chip 402 may power down PHY PDCCH subsystem 520 during the DL VoIP reception interval, except in instances where VPS 522 is unable to properly decode the PDSCH. In such instances, baseband chip 402 may activate PHY PDCCH subsystem 520 to monitor for DCI associated with an incoming VoIP retransmission.
  • baseband chip 402 may include AP/host 502 in addition to on-chip memory 418, PHY PDCCH subsystem 420, VPS 422, DL subsystem 424, UL subsystem 426, and control plane subsystem 428.
  • VSP 422 may include voice codec/VoIP application 504 (referred to hereinafter as “VoIP application 504”), lite-Layer 2/Layer 3 subsystem, which includes at least one lite-uC, lite-DL DP hardware accelerators and/or circuits and UL DP hardware accelerators and/or circuits, and lite-PHY subsystem 508.
  • the lite- uC and lite-DL/UL DP hardware accelerators may be less complex than their counterparts in DL DP subsystem 510 and/or UL DP subsystem 514 because VPS 522 may be tailored for single-CC communication. As such, the power consumption of VPS 522 is minimal.
  • Lite-PHY subsystem 508 may be configured to process the PDSCH and/or PUSCH for single-CC communications only.
  • DL DP subsystem 524 includes at least one DL uC and DP hardware accelerators, and PHY RX subsystem 512.
  • DL DP subsystem 524 may be responsible for receiving and processing high- throughput DL packets.
  • DL DP subsystem 524 may also include on-chip memory 418 and AP/host 502.
  • UL DP subsystem 526 may include at least one UL uC, Layer 2/Layer 3 DP hardware accelerators, radio bearer queues, etc., and PHY TX subsystem 516.
  • Control plane subsystem 428 may perform control plane functions, e.g., such as the RRC function, the NAS function, the IP function, the UDP function, the IMS function, and the session initiate protocol (SIP) function, just to name a few.
  • baseband chip 402 When a VoIP active session is activated at baseband chip 402, and no other applications are running, baseband chip 402 can set up configured scheduling for both UL and DL periodic small-packet transmission. As such, packet transmission can occur at pre-defined scheduled intervals without decoding PDCCH. Hence, VPS 522 may be triggered to wake up at a periodic time interval to process the PDSCH directly, send the DL VoIP data packets to the lite-Layer 2/Layer 3 subsystem 506 for quick processing, and then go back to sleep. In so doing, no other power domains need to be turned on, thereby saving power.
  • lite-Layer 2/Layer 3 subsystem 506 provides a lightweight single vertical thread of on-the-fly efficient packet processing for VoIP and other low-latency small packets (e.g., IIOT packets, IOT packets, etc.).
  • the DL hardware accelerators of lite-Layer 2/Layer 3 subsystem 506 may include a DL decipher circuit, a DL RLC circuit, a DL PDCP circuit, a DL ROHC circuit, a DL RTP circuit, a DL UDP circuit, and a DL IP circuit.
  • the UL hardware accelerators of lite- Layer 2/Layer 3 subsystem 506 include a UL ROHC circuit, a UL RTP circuit, a UL UDP circuit, a UL IP circuit, a UL PDCP circuit, a UL RLC circuit, a UL cipher circuit, etc. These various functions performed by each of the DL and UL hardware accelerators may be implemented using a set of customized instructions executed by their respective uC.
  • small packets e.g., VoIP data packets, IOT data packets, IIOT data packets, automotive-communication data packets, sidelink data packets, etc.
  • VoIP data packets may be efficiently processed through the RLC and PDCP layers with very light functions, since these packets are typically RLC unacknowledged mode (UM) unsegmented packets with no RLC automatic repeat request (ARQ) requirements or window variable maintenance.
  • UM RLC unacknowledged mode
  • ARQ RLC automatic repeat request
  • the PDCP layer checks for duplication or out-of- window discards.
  • the VoIP data packet is ROHC decompressed and processed by the RTP layer. Once the VoIP data packet is reordered and processed, it is routed to VoIP application 504.
  • control plane subsystem 528 may perform (at 501) RRC connection set up and NAS registration with the base station/network 550.
  • VoIP application 504 may request (at 503) a VoIP call session to be initiated.
  • the RRC function of control plane subsystem 528 may setup (at 505) PHY layer and Layer 2 parameters (e.g., such as radio bearers, logical channels, CCs, etc.), as well as configure (at 505) the DL voice reception interval (e.g., 20ms, 40ms, etc.) and the UL voice reception interval (e.g., 20ms, 40ms, etc.) based, respectively, on DL SPS and UL CG received from the base station.
  • PHY layer and Layer 2 parameters e.g., such as radio bearers, logical channels, CCs, etc.
  • the DL voice reception interval e.g., 20ms, 40ms, etc.
  • the UL voice reception interval e.g., 20ms, 40ms,
  • the DL VoIP transmission interval set by DCI parameters for the SPS and the UL VoIP transmission interval set by DCI parameters for the CG may be configured upon the decoding of the DCI from the PDCCH.
  • the cell-specific radio-network temporary identifier (CS-RNTI) may be used for descrambling the DCI’s cyclic redundancy check (CRC).
  • the DCI parameters may be validated in order to confirm the activation of the SPS and/or CG.
  • the VPS data path may be activated and configured upon IMS call setup (at 507) by control plane subsystem 528. Control plane subsystem 528 may configure (at 509) the RRC parameters and IMS parameters.
  • base station 550 may send (at 511) a CG activation message via the PDCCH, which is decoded by PHY PDCCH subsystem 520.
  • PHY PDCCH subsystem 520 may trigger (at 513) the UL voice transmission interval for VPS 522 based on the CG activation message.
  • VoIP application 504 may send (at 515) UL VoIP data packets to VPS 522.
  • VPS 522 wakes up to process and encode the UL VoIP data packets, which are transmitted (at 517) to base station 550.
  • PHY PDCCH subsystem 520 monitors the PDCCH until the CG timer expires (e.g., 5ms, 10ms, 15ms, etc.) or the maximum number of UL retransmissions (e.g., 1 retransmission, 2 retransmissions, 3 retransmissions, 4 retransmissions, etc.)is reached. If a NACK is received during this period, VPS 522 sends (at 519) a VoIP retransmission to base station 550.
  • the CG timer e.g., 5ms, 10ms, 15ms, etc.
  • the maximum number of UL retransmissions e.g., 1 retransmission, 2 retransmissions, 3 retransmissions, 4 retransmissions, etc.
  • base station 550 may send (at 521) an SPS activation message via the PDCCH, which is decoded by PHY PDCCH subsystem 520.
  • PHY PDCCH subsystem 420 may trigger (at 523) the DL voice transmission interval for VPS 522 based on the SPS activation message.
  • base station 550 may send (at 525) a DL VoIP data packet at the predetermined DL voice reception interval.
  • VPS 522 activates/wakes up in time to decode the PDSCH, process any received the DL VoIP data packet, and send (at 527) the processed DL VoIP packet to VoIP application 504 before returning to sleep.
  • VPS 522 may send (at 527) a NACK via the PUCCH to base station 550.
  • PHY PDCCH subsystem 520 may be activated to decode a DCI indicating a retransmission via the PDSCH.
  • PHY PDCCH subsystem 520 monitors the PDCCH in every slot until the DCI is received, at which time it may be powered off again.
  • the PDCCH may only be monitored about 10% of the time, and this only occurs when VPS 522 is unable to decode the PDSCH and sends a NACK.
  • base station 550 may send (at 529) a retransmission of the DL VoIP data packet. If the retransmission is properly decoded, and after it is processed, VPS 522 may send (at 531) the retransmission to VoIP application 504.
  • VPS 522 can be triggered with a timer callback to start the wakeup process at a backoff time of Tvon before the scheduled reception and/or transmission.
  • a timer callback may include the loading of firmware code and hardware/software states from memory, and power up warm boot handling.
  • VPS 522 may process the PDSCH/PUSCH to deliver/send the voice packet to/from VoIP application 504. VPS 522 then shuts down to sleep within Tvoff time.
  • the VoIP active period may include the time period between the start of Tvon and the end of Tvoff.
  • Baseband chip 402 may only turn on VPS power between Tvon and Tvoff, while the subsystems may be powered off, thereby allowing operations at an optimized low-power state.
  • FIGs. 6A-6C are a flowchart of an exemplary method 600 of wireless communication, according to some embodiments of the present disclosure.
  • Method 600 may be performed by an apparatus for wireless communication, e.g., such as a UE, a baseband chip, a small-packet processing subsystem, a VPS, a PHY PDCCH subsystem, a DL DP subsystem, a UL DP subsystem, a control plane subsystem, just to name a few.
  • Method 600 may include steps 602- 650 as described below. It is to be appreciated that some of the steps may be optional, and some of the steps may be performed simultaneously, or in a different order than shown in FIGs. 6A-6C. [0065] Referring to FIG.
  • the apparatus may perform RRC connection setup and NAS registration; at 604, the apparatus may connect with the network; at 606, the apparatus may perform RRC reconfiguration; at 608, the apparatus may perform IMS session setup; and at 610, the apparatus may configure the VPS using the RRC and IMS parameters obtained at 606 and 608, for example.
  • These parameters may include, e.g., the SPS periodic-time interval (e.g., 5ms, 10ms, 20ms, 40ms, 60ms, etc.) and/or the CG periodic-time interval (e.g., 5ms, 10ms, 20ms, 40ms, 60ms, etc.).
  • the SPS periodic-time interval e.g., 5ms, 10ms, 20ms, 40ms, 60ms, etc.
  • the CG periodic-time interval e.g., 5ms, 10ms, 20ms, 40ms, 60ms, etc.
  • Each of these functions may be performed by, e.
  • the apparatus may enter connected mode discontinuous reception (CDRX) to enable power savings.
  • CDRX discontinuous reception
  • the apparatus may enter deep-sleep mode and wake periodically to decode the PDCCH for a DCI, which may include an SPS and/or CG activation message.
  • the apparatus may determine whether the DCFs CRC can be decoded with a CS-RNTI. In response to the DCFs CRC being decoded with a CS-RNTI (YES: at 616), the operations may move to 618. Otherwise, when the DCFs CRC cannot be decoded using CS-RNTI (NO: at 616), the operations may move to 620.
  • the apparatus may determine whether the DCI includes a DL SPS activation/deactivation message.
  • the operations move to 624 in FIG. 6B. Otherwise, when the DCI does not validate a DL SPS (NO: at 618), the operations may move to 620.
  • the apparatus may determine whether the DCI includes an activation/deactivation message of a UL CG. In response to the DCI including a UL CG activation/deactivation message (YES: at 620), the operations may move to 636 in FIG. 6B. Otherwise, when the DCI does not include a UL CG activation/deactivation message (NO: at 620), the operations may move to 622.
  • the apparatus may determine whether the DCI includes a UL grant and/or a DL grant scheduling nonsmall-packet communication with the base station.
  • the operations may move to 648 in FIG. 6C. Otherwise, when the DCI does not include a UL or DL grant (NO: at 622), the operations may return to 614.
  • the operations associated with 616-622 may be performed by PHY PDCCH subsystem 520, as described above in connection with FIGs. 5 A and 5B.
  • the apparatus may schedule a timer to wake up the VPS based on the SPS configuration information and/or SPS activation message.
  • the apparatus may wake up the VPS at Tvon at the start of the active period of a DL small-packet reception interval to be ready for DL small-packet processing.
  • the apparatus may attempt to decode the PDSCH to receive a DL small-packet transmission from the base station. In the event that the PDSCH cannot be properly decoded, at 628, the apparatus may send a NACK and trigger the PHY PDCCH subsystem to wake up.
  • the PDCCH may be monitored for DCI related to an incoming PDSCH small-packet retransmission. Once the small-packet retransmission is received, or at the expiration of a timer, the apparatus may trigger the PHY PDCCH subsystem to return to sleep mode. At 630, the apparatus may perform Layer 2/Layer 3 processing of the DL small-packet transmission. After Layer 2/Layer 3 processing, the apparatus may route (at 632) the processed small packets to the VoIP application. At 634, the apparatus may return to sleep at Tvoff at the end of the active period of the DL small-packet reception interval.
  • the apparatus may schedule a timer to wake up the VPS based on the CG configuration information and/or CG activation message.
  • the apparatus may wake up the VPS at Tvon at the start of the active period of a UL small-packet transmission interval.
  • the apparatus may enqueue small packets received from the VoIP application.
  • the apparatus may retrieve the small packets and perform Layer 2/Layer 3 processing thereon, among other tasks, e.g., such as encoding logical channel prioritization (LCP), etc.
  • LCP encoding logical channel prioritization
  • the apparatus may transmit the encoded small packets via the PUSCH and monitor the PDCCH for HARQ feedback from the base station.
  • the apparatus may retransmit the small-packet during the activation period of the same UL small-packet transmission interval.
  • the apparatus may return to sleep mode at Tvoff, which is the end of the active period of the UL small-packet transmission interval.
  • the operations of 636-646 may be performed by VPS 522, as described above in connection with FIGs. 5A-5C.
  • the apparatus may activate the power domains that include the DL DP subsystem, the PHY RX subsystem, the UL DP subsystem, and the PHY TX subsystem to perform normal (e.g., non-small packet) reception and/or transmission when nonsmall-packet radio bearers are set up, for example.
  • the apparatus may return the DL DP subsystem, the PHY RX subsystem, the UL DP subsystem, and the PHY TX subsystem to sleep mode when there are no longer any UL or DL normal data packets to transmit or receive.
  • Operations 648 and 650 may be performed by, e.g., DL DP subsystem 510, the PHY RX subsystem 512, the UL DP subsystem 514, and the PHY TX subsystem 516, as described above in connection with FIG. 5 A.
  • the apparatus may resume PDCCH monitoring using the PHY PDCCH subsystem.
  • the functions described herein may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or encoded as instructions or code on a non-transitory computer-readable medium.
  • Computer-readable media includes computer storage media. Storage media may be any available media that can be accessed by a computing device, such as node 300 in FIG. 3.
  • such computer-readable media can include RAM, ROM, EEPROM, CD-ROM or other optical disk storage, HDD, such as magnetic disk storage or other magnetic storage devices, Flash drive, SSD, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a processing system, such as a mobile device or a computer.
  • Disk and disc includes CD, laser disc, optical disc, digital video disc (DVD), and floppy disk where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.
  • a baseband chip is provided.
  • the baseband chip may include a small-packet processing subsystem.
  • the small-packet processing subsystem may be configured to receive an SPS activation message associated with a DL smallpacket reception interval.
  • the small-packet processing subsystem may be configured to enter a sleep mode during an inactive period of the DL small-packet reception interval.
  • the small -packet processing subsystem may be configured to enter an awake mode during an active period of the DL small-packet reception interval.
  • the small-packet processing subsystem may be configured to attempt to decode a PDSCH during the active period of the DL small-packet reception interval to receive a DL small-packet from a base station.
  • the base band chip may include a Layer 1 PDCCH subsystem.
  • the Layer 1 PDCCH subsystem may be configured to remain powered down during the DL small-packet reception interval unless the small-packet processing subsystem is unable to decode the PDSCH during the active period of the DL small-packet reception interval.
  • the small-packet processing subsystem in response to the small-packet processing subsystem being unable to decode the PDSCH during the active period of the DL small-packet reception interval, the small-packet processing subsystem may be further configured to send a NACK to the base station during the DL small-packet reception interval.
  • the Layer 1 PDCCH subsystem in response to the small-packet processing subsystem being unable to decode the PDSCH during the active period of the DL small-packet reception interval, may be further configured to power on during the active period of the DL small-packet reception interval. In some embodiments, in response to the small-packet processing subsystem being unable to decode the PDSCH during the active period of the DL smallpacket reception interval, the Layer 1 PDCCH subsystem may be further configured to monitor the PDCCH for control information associated with a retransmission of the DL small-packet.
  • the Layer 1 PDCCH subsystem in response to the small-packet processing subsystem being unable to decode the PDSCH during the active period of the DL small-packet reception interval, may be further configured to send the control information associated with the retransmission of the DL small-packet to the small-packet processing subsystem.
  • the small-packet processing subsystem may be further configured to monitor the PDSCH based on the control information received from the Layer 1 PDCCH subsystem for the retransmission of the DL small-packet during the active period of the DL small-packet reception period.
  • the small-packet processing subsystem may be further configured to receive a CG activation message associated with a UL small-packet transmission interval. In some embodiments, the small-packet processing subsystem may be further configured to enter a sleep mode during an inactive period of the UL small-packet transmission interval. In some embodiments, the small-packet processing subsystem may be further configured to enter an awake mode during an active period of the UL small-packet transmission interval. In some embodiments, the small-packet processing subsystem may be further configured to perform UL packet processing to generate a UL small-packet during the active period of the UL small-packet transmission interval.
  • the small-packet processing subsystem may be further configured to transmit the UL small-packet to the base station during the active period of the UL small-packet transmission interval via a PUSCH.
  • the Layer 1 PDCCH subsystem may be further configured to monitor, during the active period of the UL smallpacket transmission interval, the PDCCH for HARQ feedback from the base station after the UL small-packet is transmitted.
  • the Layer 1 PDCCH subsystem may be configured to monitor the PDCCH until a CG timer expires or until a maximum number of retransmission attempts by the small-packet processing subsystem is reached.
  • the baseband chip may further include a DL data plane subsystem.
  • the DL data plane subsystem may be configured to, in response to no DL data path activity during a small-packet communication session, remain powered off during the small-packet communication session.
  • the DL data plane subsystem may be configured to, in response to DL data path activity during the small-packet communication session, power on to receive and processes a DL data packet.
  • the baseband chip may further include a UL data plane subsystem.
  • the UL data plane subsystem may be configured to, in response to no UL data path activity during the small-packet communication session, remain powered off during the small-packet communication session.
  • a UL data plane subsystem configured to, in response to UL data path activity during the small-packet communication session, power on to receive and processes a UL data packet.
  • the small-packet processing subsystem may include one or more of a VPS, an IOT processing subsystem, an IIOT processing subsystem, an automotivecommunication processing subsystem, or a sidelink-communication processing subsystem.
  • a baseband chip may include a small-packet processing subsystem located in a first power domain.
  • the baseband chip may include a DL data plane subsystem located in a second power domain separate from the first power domain.
  • the baseband chip may include a UL data plane subsystem located in a third power domain separate from the first power domain and the second power domain.
  • the small-packet processing subsystem may be configured for single CC-only communication.
  • the DL data plane subsystem and the UL data plane subsystem may be configured for multi -CC communication.
  • the baseband chip may include a control plane subsystem located in a fourth power domain separate from the first power domain, the second power domain, and the third power domain.
  • the baseband chip may include a Layer 1 PDCCH subsystem located in a fifth power domain separate from the first power domain, the second power domain, the third power domain, and the fourth power domain.
  • control plane subsystem may be configured to perform an IMS procedure to set up a small-packet communication session for the small-packet processing subsystem.
  • the fourth power domain may be powered down after the smallpacket communication session the small-packet processing subsystem is set up.
  • the fifth power domain may be powered down at predetermined intervals during the small-packet communication session.
  • a method of wireless communication of a baseband chip may include receiving, by a smallpacket processing subsystem, an SPS activation message associated with a DL small-packet reception interval for a small-packet communication session.
  • the method may include entering, by the small-packet processing subsystem, a sleep mode during an inactive period of the DL smallpacket reception interval.
  • the method may include entering, by the small-packet processing subsystem, an awake mode during an active period of the DL small-packet reception interval.
  • the method may include attempting, by the small-packet processing subsystem, to decode a PDSCH during the active period to receive a DL small-packet from a base station.
  • the method may include powering down a Layer 1 PDCCH subsystem during the DL small-packet reception interval unless the small-packet processing subsystem is unable to decode the PDSCH during the active period of the DL small-packet reception interval.
  • the method may further include sending, by the small-packet processing subsystem, a NACK to the base station during the DL small-packet reception interval.
  • the method in response to the small-packet processing subsystem being unable to decode the PDSCH during the active period of the DL small-packet reception interval, may further include powering on the Layer 1 PDCCH subsystem during the active period of the DL small-packet reception interval. In some embodiments, in response to the smallpacket processing subsystem being unable to decode the PDSCH during the active period of the DL small-packet reception interval, the method may further include monitoring, by the Layer 1 PDCCH subsystem, the PDCCH for control information associated with a retransmission of the DL small-packet.
  • the method may further include sending, by the Layer 1 PDCCH subsystem, the control information associated with the retransmission of the DL small-packet to the small-packet processing subsystem.
  • the method may include monitoring, by the small-packet processing subsystem, the PDSCH based on the control information received from the Layer 1 PDCCH subsystem for the retransmission of the DL small-packet during the active period of the DL small-packet reception period.
  • the method may include receiving, by the small-packet processing subsystem, a CG activation message associated with a UL small-packet transmission interval for a small-packet communication session. In some embodiments, the method may include entering, by the small-packet processing subsystem, a sleep mode during an inactive period of the UL small-packet transmission interval. In some embodiments, the method may include entering, by the small-packet processing subsystem, an awake mode during an active period of the UL smallpacket transmission interval.
  • the method may include performing, by the small-packet processing subsystem, UL packet processing to generate a UL small-packet during the active period of the UL small-packet transmission interval. In some embodiments, the method may include transmitting, by the small-packet processing subsystem, the UL small-packet to the base station during the active period of the UL small-packet transmission interval via a PUSCH. In some embodiments, the method may include monitoring, by the Layer 1 PDCCH subsystem during the active period of the UL small-packet transmission interval, the PDCCH for HARQ feedback from the base station after the UL small-packet is transmitted.
  • the monitoring the PDCCH after the transmission of the UL small-packet for HARQ feedback from the base station during the active period of the UL smallpacket transmission interval may include monitoring, by the Layer 1 PDCCH subsystem, the PDCCH until a CG timer expires or until a maximum number of retransmission attempts by the small-packet processing subsystem is reached.
  • the method in response to no DL data path activity during the smallpacket communication session, may include powering off a DL data plane subsystem during the small-packet communication session. In some embodiments, in response to DL data path activity during the small-packet communication session, the method may include powering on the DL data plane subsystem to receive and processes a DL data packet. In some embodiments, in response to no UL data path activity during the small-packet communication session, the method may include powering off a UL data plane subsystem during the small-packet communication session. In some embodiments, in response to UL data path activity during the small-packet communication session, the method may include powering on the UL data plane subsystem to receive and processes a UL data packet.
  • the small-packet processing subsystem may include one or more of a VPS, an IOT processing subsystem, an IIOT processing subsystem, an automotivecommunication processing subsystem, or a sidelink-communication processing subsystem.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Mobile Radio Communication Systems (AREA)

Abstract

Selon un aspect, l'invention concerne une puce de bande de base. La puce de bande de base peut comprendre un sous-système de traitement de petit paquet situé dans un premier domaine de puissance. La puce de bande de base peut comprendre un sous-système de plan de données de DL situé dans un second domaine de puissance séparé du premier domaine de puissance. La puce de bande de base peut comprendre un sous-système de plan de données de UL situé dans un troisième domaine de puissance séparé du premier domaine de puissance et du second domaine de puissance. Le sous-système de traitement de petits paquets peut être configuré pour une seule communication uniquement CC. Le sous-système de plan de données DL et le sous-système de plan de données UL peuvent être configurés pour une communication multi-CC.
PCT/US2022/039840 2022-08-09 2022-08-09 Appareil et procédé pour un sous-système de traitement de petits paquets adaptatif WO2024035394A1 (fr)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20210120488A1 (en) * 2019-01-08 2021-04-22 Ofinno, Llc Power Saving Mechanism
US11166234B2 (en) * 2019-02-13 2021-11-02 Ofinno, Llc Uplink transmission in power saving mode
US20220116878A1 (en) * 2019-07-12 2022-04-14 Nokia Technologies Oy Mechanism for interactions for entering into sleep mode

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20210120488A1 (en) * 2019-01-08 2021-04-22 Ofinno, Llc Power Saving Mechanism
US11166234B2 (en) * 2019-02-13 2021-11-02 Ofinno, Llc Uplink transmission in power saving mode
US20220116878A1 (en) * 2019-07-12 2022-04-14 Nokia Technologies Oy Mechanism for interactions for entering into sleep mode

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