WO2024028275A1 - Module semiconducteur de puissance - Google Patents

Module semiconducteur de puissance Download PDF

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Publication number
WO2024028275A1
WO2024028275A1 PCT/EP2023/071174 EP2023071174W WO2024028275A1 WO 2024028275 A1 WO2024028275 A1 WO 2024028275A1 EP 2023071174 W EP2023071174 W EP 2023071174W WO 2024028275 A1 WO2024028275 A1 WO 2024028275A1
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WO
WIPO (PCT)
Prior art keywords
power
plus
semiconductor module
circuit board
power semiconductor
Prior art date
Application number
PCT/EP2023/071174
Other languages
German (de)
English (en)
Inventor
Kevin Böhm
Ruben Bärenweiler
Ivonne TRENZ
Original Assignee
Zf Friedrichshafen Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Zf Friedrichshafen Ag filed Critical Zf Friedrichshafen Ag
Publication of WO2024028275A1 publication Critical patent/WO2024028275A1/fr

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto

Definitions

  • the present invention relates to the field of electromobility, in particular electronic modules for an electric drive.
  • electronic modules such as power electronics modules
  • the use of electronic modules, such as power electronics modules, in motor vehicles has increased significantly in recent decades. This is due, on the one hand, to the need to improve fuel economy and vehicle performance and, on the other hand, to advances in semiconductor technology.
  • the main component of such an electronic module is a DC/AC inverter, which is used to power electrical machines such as electric motors or generators with a multi-phase alternating current (AC).
  • a direct current generated from a DC energy source, such as a battery, is converted into a multi-phase alternating current.
  • the inverters include a variety of electronic components with which bridge circuits (such as half bridges) are implemented, for example semiconductor power switches, which are also referred to as power semiconductors.
  • GaN power semiconductors currently used for 400V systems are only available as individual switch packages. These are optimized for mounting on a PCB, but are not well suited for high-current applications (i.e. 100A and more) as they are difficult to dissipate heat.
  • Currently known module structures for increasing the current-carrying capacity are also not useful, as there is too high a leakage inductance in the commutation cell and poor gate control due to long signal contacting.
  • lateral components such as GaN HEMTs can only be integrated with major compromises using the known module package methods.
  • the invention is therefore based on the object of providing a power semiconductor module which integrates lateral power semiconductor elements better than previously known modules or packages.
  • ZF Friedrichshafen AG file 213104 Friedrichshafen 2022-08-01 This task is solved by the features of the independent claims.
  • Advantageous refinements are the subject of the dependent claims.
  • What is proposed is a power semiconductor module, having at least three phases with associated power connections and at least one circuit board, and for each phase a semiconductor package arranged below the power connections, having at least two lateral power semiconductor elements embedded in the circuit board, one of which is a high-side switch and one as a low-side -Switch is used.
  • the power semiconductor elements are electrically contacted with the power connections via first electrically conductive and heat-dissipating layers or inlays, and second heat-dissipating layers or inlays are provided on the opposite side to the respective power semiconductor elements and connected thereto.
  • a thermally coupled cooling arrangement is provided below the semiconductor package and connected to the second heat-dissipating layers or inlays, comprising at least one insulator arranged between the second heat-dissipating layers or inlays and a heat sink arranged on its underside, with one between the insulator and the heat sink and each of the power semiconductor elements, thermally coupled metal elements are arranged, which are structured in such a way that they serve as additional heat dissipation and heat spreading of the power semiconductor elements and as additional current conduction, with at least one DC-minus leading busbar, at least one DC-plus leading busbar and on the top of the power semiconductor module An AC busbar is arranged per phase, the busbars being contacted with associated DC minus and DC plus and AC power connections of the power semiconductor module.
  • all semiconductor packages are arranged on a common circuit board or each semiconductor package is arranged on a separate circuit board.
  • a common DC-minus-carrying busbar and a common DC-plus-carrying busbar for all ZF Friedrichshafen AG File 213104 Friedrichshafen 2022-08-01 Semiconductor packages are provided, with each semiconductor package having its own DC-minus-carrying busbar and its own DC-plus-carrying busbar.
  • a first part of an AC power connection is arranged on the top and on an outer region of the circuit board, followed by a first part of a DC plus power connection, in turn followed by a second part of the AC power connection , followed by a DC minus power connection, followed by the third part of the AC power connection, followed by the second part of the DC plus power connection, which is thus arranged opposite the first part of an AC power connection, and with two per semiconductor package Half bridges are provided, the high-side switches and low-side switches of which are arranged opposite one another via the second and third parts of the AC power connection, and on the underside of the circuit board.
  • a metal element serving as an AC power line extends flat below the AC power connections and the DC plus power connection, and is either interrupted in the area of the DC minus power connection by at least one metal element serving as a DC minus power line in such a way that the metal element serving as an AC current conductor is interrupted several times or is divided into two separate parts, the at least one DC-plus conducting busbar being formed in such a way that it contacts both DC-plus power connections.
  • the DC-minus-carrying busbar is guided below the DC-plus-carrying busbar and has an opening in the area of contact between the DC-plus-carrying busbar and the associated DC-plus power connection, and the DC-plus leading busbar contacts the DC-plus power connection using step-throughs.
  • a frame in which the power semiconductor module is integrated in such a way that parts of at least one DC-plus busbar are integrated in the frame and the contacting of both DC-plus busbars is on an opposite side of the AC busbars area of ZF Friedrichshafen AG File 213104 Friedrichshafen 2022-08-01 Power semiconductor module is carried out using an I-joint or an overlap joint, or the contacting of both DC-plus busbars takes place via a DC-plus busbar integrated in the frame and guided between the semiconductor packages.
  • two half-bridges are provided per semiconductor package, each of which is formed in such a way that the AC power connection is divided in a T-shape into two mutually perpendicular AC partial connections, of which a first AC partial connection is on an outer one Area of the associated half bridge and the second AC sub-connection runs perpendicular thereto, and in each case a DC minus power connection and a DC plus power connection are arranged such that each runs on a different side of the second AC sub-connection, the two Half bridges are formed in a mirrored manner in such a way that they share the first AC partial connection and the DC negative power connection, and wherein high side switches and low side switches of each half bridge are arranged opposite one another on one side of the second AC partial connection, and where On the underside of the circuit board, a metal element serving as an AC current conductor extends flatly below the AC and DC plus power connections and a metal element serving as a DC minus current conductor extends flatly below the DC minus power connection, and the DC
  • metal elements serving as DC-plus current conductors are provided on the underside of the circuit board between two metal elements of adjacent semiconductor packages that serve as AC current conductors and at the outer ends of the circuit board. In one embodiment it is provided that two adjacent semiconductor packages share a DC plus power connection.
  • the circuit board is a DBC circuit board and on the underside of it there are indentations of a power supply in an adjacent power supply.
  • contacts formed at least as gate contacts are assigned to the high-side switches and low-side switches in order to contact them with the associated power connections.
  • additional driver components are arranged on the top of the circuit board or integrated therein and can be contacted with contact elements provided for this purpose.
  • the cooling arrangement is integrated on the underside of the semiconductor package as an insulator metallized on both sides, or is connected as an external arrangement on its underside.
  • busbars for contacting the power connections in the event that the DC power connections exceed a predetermined length are formed in such a way that they shorten in predetermined areas.
  • the power semiconductor elements are formed as GaN-HEMT.
  • a power electronics device is provided, in particular an inverter, having a power semiconductor module that is designed as described.
  • an electric drive comprising an electric axle drive
  • a motor vehicle with at least one electric machine, a transmission device and the power electronics device.
  • a motor vehicle is also provided, having the electric drive, in particular the electric axle drive, and/or the power electronics device.
  • Figure 2 shows a basic structure of a power semiconductor module according to an embodiment of the present invention.
  • Figures 3 to 18 show different versions of a version of the power semiconductor module according to the present invention.
  • Figures 19 to 24 show different versions of a version of the power semiconductor module according to the present invention.
  • the aim of the present invention is to provide a module or package for new, ever faster switching power semiconductors, which enables lower leakage inductances, low parasitic couplings, and additional gate driver components in the package close to the semiconductor.
  • Materials that can be used as lateral power semiconductors are those semiconductor compounds that, if possible, ZF Friedrichshafen AG file 213104 Friedrichshafen 2022-08-01 have a large bandgap, for example GaN (gallium nitride) or gallium oxide ( ⁇ -Ga2O3).
  • a semiconductor package that serves as a half-bridge package and is optimized for lateral power semiconductors must be provided. This can advantageously be easily expanded into a full bridge package. It should also be noted that current scaling must take place via the number of parallel power semiconductors in the package or the number of packages per phase.
  • a top side contact for the 3D commutation cell must be provided.
  • the concept must enable optimal contacting and fanout (spreading of the contacts) of the drain, source and gate (everything on the top side of the chip in the case of lateral components). It should also be possible to provide additional gate driver components directly on the circuit board with the integrated power semiconductors through an additional wiring level.
  • Power semiconductors, driver output stages and contacts in and/or on an additional substrate should also be possible.
  • PCB organic, ceramic
  • known processes such as power contacting, for example via laser welding, and signal contacting, for example via press fit or soldering pins, should be applicable.
  • the back of the package should be prepared for cohesive cooler integration for the highest power density of the system by e.g. sintering, soldering, pressing using an organic insulator, etc., or as an alternative, a connection using nanowire should be possible.
  • An insulated and non-insulated back (for cooling connection) should also be possible for connecting the cooler via an organic insulator, as an IMS (Isolated Metal Substrate) or as a substrate such as AMB/DBC/DPC.
  • ZF Friedrichshafen AG file 213104 Friedrichshafen 2022-08-01 The basic structure of a power semiconductor module is shown in Figures 1 (state of the art) and 2. What is common to the prior art is that the power semiconductor module has DC minus and DC plus power connections 48, 50 arranged on an upper side thereof and at least one AC power connection 52 for contacting associated busbars 16, 18, 40.
  • a semiconductor package 9 is arranged below the power connections 48, 50, 52, having at least one circuit board 30 (one for all semiconductor packages 9 or one per semiconductor package 9) with at least two lateral power semiconductor elements 12, 14 integrated, ie embedded, in the circuit board 30. Each one of which serves as a high-side switch 12 and the other as a low-side switch 14.
  • the power semiconductor elements 12, 14 are also electrically contacted with the power connections 48, 50, 52 via first, electrically conductive and heat-dissipating layers or inlays 20, 22, 38 .
  • second, heat-dissipating layers or inlays 13, 15 are provided, which, depending on the design, are electrically conductive and are at least partially connected to source potential.
  • the power semiconductor elements 12, 14 can be contacted with the current-carrying busbars 16, 18 via vias 24, 26, 36, 44, as in the prior art.
  • a cooling arrangement 10, 46 connected and thermally coupled below the semiconductor package 9 and connected to the second heat-dissipating layers or inlays 13, 15 is provided, comprising at least one insulator 46 arranged between the second heat-dissipating layers or inlays 13, 15 and one arranged on its underside Heat sink 10.
  • a cooling arrangement 10, 46 connected and thermally coupled below the semiconductor package 9 and connected to the second heat-dissipating layers or inlays 13, 15 is provided, comprising at least one insulator 46 arranged between the second heat-dissipating layers or inlays 13, 15 and one arranged on its underside Heat sink 10.
  • Unlike in FIG. These are structured in such a way that they serve as additional heat dissipation and heat spreading of the power semiconductor elements 12, 14 and, in the embodiment shown in FIG .
  • the AC current is carried by the metal element 102 ZF Friedrichshafen AG file 213104 Friedrichshafen 2022-08-01 improved, as this means that there is a larger copper cross section than before. So far, a relatively thin metal layer 13, 15 (FIG. 1) has only been provided below the power semiconductor elements 12, 14 and above the insulator 46.
  • a relatively thin metal layer 13, 15 (FIG. 1) has only been provided below the power semiconductor elements 12, 14 and above the insulator 46.
  • the cooling structure 10; 101, 102, 46 can be formed on the underside of the semiconductor package 9 as a separate cooling structure and connected mechanically and thermally (for heat dissipation) to the circuit board 30 via a corresponding process, for example sintering.
  • the insulator 46 can be formed as an organic insulator.
  • the cooling structure 10, 101, 102, 46 can also be integrated as an insulator metallized on both sides, for example ceramic, on the underside of the semiconductor package 9, or be part of the circuit board 30, comparable to the use or integration of an IMS.
  • the circuit board 30 can have power conduction layer layers and, for example, be formed as a DBC (direct bonded copper) circuit board 30, but does not have to be. It consists of a substrate material with predeterminable properties.
  • the substrate of the circuit board 30 can be designed organically and ceramically as a PCB or as an embedded PCB or as an IMS substrate. It is only important that the lateral power semiconductor elements 12, 14 are integrated into the circuit board 30, that is to say they are completely embedded therein. Based on the basic structure described in connection with FIG. 2, two different package designs with several possible busbar designs for the DC plus busbars 18 and the DC minus busbars 16 are presented below.
  • the lower substrate (underside) is always structured and is used as a contacting level and thermal connection.
  • the upper substrate (top) has the power semiconductors 12, 14, for example GaN ZF Friedrichshafen AG File 213104 Friedrichshafen 2022-08-01 Semiconductors, as well as driver components and required contacts, and is formed as a so-called embedded PCB, since at least the power semiconductors 12, 14 are integrated into it.
  • all other contacts are provided via a (not shown) busbar (bus bar) by means of, for example, a welded connection, as well as other contact elements such as signal pins or flexible circuit board strips, which, like the signal pins, establish a connection between the semiconductor and the driver board, and are connected via, for example, soldering or press fit.
  • the undersides are each shown as a view through the top.
  • the contact elements in the versions shown are designed as pins (signal pins). But they can also be designed as a flexible circuit board.
  • the AC busbars 40 contact their respective AC power connection 52 and are of course not connected to one another.
  • Each of the AC power connections 52 serves as a connection for one of the phases 1, 2, 3.
  • One or three phases 1-3 are always shown in the figures. However, two or four or more phases can also be implemented without difficulty using the proposed concept. All busbars are contacted using known, suitable processes, such as welding. It is possible in all embodiments for the semiconductor packages 9 to be formed on a common circuit board 30 or separate circuit boards 30 and to be contacted via common or separate busbars 48, 50.
  • an adjustable leakage inductance of the upper and lower loop is determined by the width of the feedthrough 180 (via busbar 18 guided in busbar 16) of the DC-plus busbar 18 on the lower one Reached highside bank. This results in better symmetry. If separate busbars 16 and 18 are used, the current distribution can be optimized as well as the proximity effect reduced and better magnetic field curves can be achieved.
  • Figure 3 shows a top view of a top side of the circuit board 30, and Figures 4 and 5 each show a possible design of an associated underside of the circuit board 30.
  • FIG 3 are on the top in an outer Area (top in Figure 3) a first AC power connection 52 followed by the DC plus power connection 50, followed by a second AC power connection 52 and again followed by a DC minus power connection 48. This is followed by another AC power connection 52 and a DC plus power connection 50, which then forms the other outer end (bottom in Figure 3).
  • two half-bridges H1, H2 are provided, the high-side switches 12 and low-side switches 14 of which are arranged opposite one another via the AC power connections 52, which are not entirely on the outside.
  • the underside is formed in such a way that it is divided into two subareas, one of which is formed as a metal element 102 for AC current conduction and the other as a metal element 101 for DC minus current conduction.
  • the metal element 102 which serves as an AC power supply, extends flat below the AC power connections 52.
  • the DC minus power connection 48 arranged centrally on the top of the circuit board 30 is interrupted.
  • the metal element 101 as shown in FIG. In Figures 5 and 6, three semiconductor packages 9 formed on a common circuit board 30 and lined up directly next to one another are shown to realize the three phases 1, 2, 3 shown, with Figure 5 the top and Figure 6 the bottom ZF Friedrichshafen AG file 213104 Friedrichshafen 2022-08-01 shows the circuit board 30.
  • neighboring semiconductor packages 9 share a metal element 101 that serves as a DC negative current guide.
  • step-throughs 180 are provided in the DC plus busbar 18 in the versions shown in FIGS. 7 and 8. These lead the DC-plus busbar 18 in predetermined areas to the DC-plus power connection 52. Since the DC-minus busbar 16 has to be passed through for this, it is cut out in predetermined areas in order to let the feeders 180 pass through.
  • the risers 180 can be curved tabs or legs or similar shapes from the DC-plus busbar 18, which are suitable for contacting the DC-plus power connection 52.
  • a frame 60 is provided, into which the power semiconductor module is integrated in such a way that parts of at least one DC plus busbar 18 are integrated in the frame, as in FIGS.
  • both DC plus busbars 18 takes place on an area of the power semiconductor module opposite the AC busbars 40 by means of an I-joint 181, i.e. perpendicular to the plane of the circuit board 30, as shown in Figure 11, or an overlap joint 182 (also referred to as through-welding), i.e. in an extension of the circuit board 30, as shown in Figure 11.
  • I-joint 181 i.e. perpendicular to the plane of the circuit board 30, as shown in Figure 11
  • an overlap joint 182 also referred to as through-welding
  • common, continuous DC minus busbars 16 and DC plus busbars 18 are present across all semiconductor packages 9. The shape is adapted to the application.
  • the busbars 16, 18 can therefore be bent several times or formed in steps, as shown in Figures 11 and 12, or have other shapes. Cutouts can also be present, as shown in Figures 7 and 8.
  • the contacting of both DC-plus busbars 18 of a semiconductor package 9 takes place via a DC-plus busbar 18 that is integrated (overmolded) into the frame 60 and guided as a connecting web between the semiconductor packages 9 , which connects the two DC-plus busbars 18 with each other, as can be clearly seen in Figures 14 (view without frame 60), 15 and 16 (view with frame 60). That is why there are separate DC minus busbars 16, since the DC plus busbars 18 are connected to one another via the connecting webs in the frame 60.
  • the circuit board 30 should be formed as a DBC circuit board 30, since otherwise the associated phase 1, 2, 3 can no longer be contacted.
  • the AC contacting then takes place through a surrounding DBC structure, as indicated in Figure 17.
  • This version can be used for all variants shown in Figures 3 to 18.
  • ZF Friedrichshafen AG File 213104 Friedrichshafen 2022-08-01
  • the semiconductor packages 9 are advantageously provided on separate circuit boards 30, but can also be formed on a common circuit board 30.
  • the frame 60 is formed as an electrically non-conductive frame 60, for example made of plastic.
  • FIG. 19 shows a top side of a circuit board 30 according to a further embodiment.
  • the associated underside is shown in Figure 20.
  • two half-bridges H1, H2 are also provided for each semiconductor package 9, each of which is formed in such a way that the AC power connection 52 arranged on the top is divided in a T-shape into two mutually perpendicular AC partial connections 52-1, 52-2 is divided, of which a first AC partial connection 52-1 runs perpendicular to an outer region of the associated half bridge H1, H2 (and usually also on an outer region of the circuit board 30) and the second AC partial connection 52-2.
  • a DC minus power connection 48 and a DC plus power connection 50 are each arranged to the left and right of the second AC partial connection 52-2 (i.e.
  • High-side switches 12 and low-side switches 14 of each half bridge H1, H2 are arranged opposite each other on one side of the second AC partial connection 52-2.
  • the two half-bridges H1, H2 are formed in such a way that they share the first AC partial connection 52-1 and the DC negative power connection 48. So they are mirrored at the DC minus power connection 48.
  • several semiconductor packages 9 can be arranged on a common circuit board 30 in order to provide a multi-phase connection (here three phases 1, 2, 3). In the event that the semiconductor packages 9 are provided on separate circuit boards 30, they do not share a DC plus power connection 50, but a DC plus power connection 50 is provided on opposite outer sides of the circuit board 30.
  • two adjacent semiconductor packages 9 share the DC plus power connection 50.
  • a DC plus power connection 50 is also provided at the outer end of the circuit board 30.
  • ZF Friedrichshafen AG file 213104 Friedrichshafen 2022-08-01 The DC plus and DC minus busbars 16, 18 are contacted with the associated power connections 48, 50 on the top of the power semiconductor module in an area opposite the AC busbars 40, as shown in Figure 24.
  • a metal element 102 serving as an AC current guide extends flatly below the AC and DC plus power connections 50, 52, and a metal element 101 serving as a DC minus current guide extends flatly below the DC minus -Power connection 48, as shown in Figure 22.
  • DBC Direct Bonded Copper
  • indentations from one power line 101-103 into an adjacent power line 101-103 are provided on the underside of the circuit board 30, as can be seen in Figure 23. This means that the metal elements 101-103 are not consistently straight.
  • the indentations can prevent the risk of the DBC ceramic breaking.
  • at least two contact elements designed as pins can also be assigned to the high-side switches 12 and low-side switches 14 and provided on the top of the circuit board 30 in order to contact them with the associated power connections 48, 50, 52.
  • the pins can be arranged in the central area of each half bridge H1, H2. Additional driver components can also be provided above and below the pins, which are contacted with a third pin.
  • the power connections 48, 50, 52 are contacted on the top of the circuit board 30 by means of busbars 16, 18, 40 (bus bars). The shape of these is adapted to the respective design of the circuit board 30.
  • the shape of the busbars 16, 18, 40 depends on the arrangement of the components, ie both the power connections 48, 50, 52, as well as the contact elements designed as pins and the driver modules. For example, a partial area or the entire middle of the half bridge H1, H2 can remain free.
  • the DC minus and the DC plus busbars 16, 18 can be constricted on the capacitor side, which leads to a small increase in the leakage inductance, but improves the symmetry of the currents.
  • the busbars 16, 18 By constricting or shortening the busbars 16, 18, the length of the current guide is shortened and thus a more even current distribution is achieved. Which of the busbars 16, 18 is at which point and how it is contacted can be determined depending on the design.
  • HEMTs when designing, it should be noted that HEMTs must have source potential on the substrate side, i.e. AC for the high-side switches 12 and DC-minus for the low-side switches 14.
  • all metal elements 101-103 are on the underside of the circuit board 30 electrically separated from each other, for example over a suitable distance.
  • Contact elements can also only be present for gate contacting, for example as two pins or as a flexible circuit board. These are used to contact high-side switch 12 or low-side switch 14 with the associated power connections 48, 50, 52.
  • a further contact element for example a third pin or a connection on a flexible circuit board, can be present in order to contact additional driver components.
  • the power semiconductor modules described which each have two half bridges H1, H2, can be expanded to full bridge modules, so-called B6 modules ZF Friedrichshafen AG file 213104 Friedrichshafen 2022-08-01.
  • B6 modules ZF Friedrichshafen AG file 213104 Friedrichshafen 2022-08-01 For this purpose, several power semiconductor modules are arranged adjacent to one another, as described.
  • the advantage of the proposed designs is that only a single DC minus and a DC plus busbar 16, 18 can be used for all phases 1-3, but also that the frame 60 can be used as a DC plus busbar 18 can be used to connect all DC plus power connections 50. However, a separate DC minus and a separate DC plus busbar 16, 18 can also be used per phase 1-3.
  • the proposed power semiconductor modules can be manufactured individually and connected in parallel to one another. But they can also be produced on a common circuit board 30.
  • the power semiconductor module can be part of an electronic module and is used in the field of power electronics, in particular in power electronic devices such as inverters in the field of electromobility.
  • An electronic module within the scope of this invention is used to operate an electric drive of a vehicle, in particular an electric vehicle and/or a hybrid vehicle, and/or electrified axles (electric axle drive).
  • the electronic module includes a DC/AC inverter.
  • the electronic module is used to power an electric machine, for example an electric motor and/or a generator.
  • a DC/AC inverter is preferably used to convert one using a DC ZF Friedrichshafen AG File 213104 Friedrichshafen 2022-08-01 Voltage of an energy source, such as a battery, produces direct current to generate a multi-phase alternating current.
  • Inverters for electric drives of vehicles, especially cars and commercial vehicles, as well as buses, are designed for the high-voltage range and are designed in particular in a reverse voltage class of approximately 650 volts.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Materials Engineering (AREA)
  • Structure Of Printed Boards (AREA)
  • Rectifiers (AREA)

Abstract

Module semiconducteur de puissance comprenant au moins trois phases présentant des bornes de courant associées et au moins une carte de circuit imprimé, et pour chaque phase, un boîtier semiconducteur disposé au-dessous des bornes de courant, présentant au moins deux éléments semiconducteurs de puissance latéraux intégrés dans la carte de circuit imprimé, dont l'un sert respectivement de commutateur côté haute tension et l'autre de commutateur côté basse tension. Les éléments semiconducteurs de puissance sont en contact électrique avec les bornes de courant par l'intermédiaire de premières couches ou d'inserts électriquement conducteurs et dissipant la chaleur. Le module semiconducteur de puissance comporte également au moins une barre omnibus conductrice de courant CC-plus et, par phase, une barre omnibus CA, les barres omnibus étant mises en contact avec des bornes de courant CC-moins et CC-plus et AC correspondantes du module semiconducteur de puissance.
PCT/EP2023/071174 2022-08-01 2023-07-31 Module semiconducteur de puissance WO2024028275A1 (fr)

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SG10201401622RA (en) 2014-04-17 2015-11-27 Delta Electronics Int’L Singapore Pte Ltd Package structure
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