WO2024027731A1 - 承载层设置有双pmut的微机械超声换能器结构及其制造方法 - Google Patents

承载层设置有双pmut的微机械超声换能器结构及其制造方法 Download PDF

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WO2024027731A1
WO2024027731A1 PCT/CN2023/110645 CN2023110645W WO2024027731A1 WO 2024027731 A1 WO2024027731 A1 WO 2024027731A1 CN 2023110645 W CN2023110645 W CN 2023110645W WO 2024027731 A1 WO2024027731 A1 WO 2024027731A1
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pmut
layer
piezoelectric
circuit protection
cavity
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PCT/CN2023/110645
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English (en)
French (fr)
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庞慰
牛鹏飞
张孟伦
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天津大学
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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B06—GENERATING OR TRANSMITTING MECHANICAL VIBRATIONS IN GENERAL
    • B06B—METHODS OR APPARATUS FOR GENERATING OR TRANSMITTING MECHANICAL VIBRATIONS OF INFRASONIC, SONIC, OR ULTRASONIC FREQUENCY, e.g. FOR PERFORMING MECHANICAL WORK IN GENERAL
    • B06B1/00—Methods or apparatus for generating mechanical vibrations of infrasonic, sonic, or ultrasonic frequency
    • B06B1/02—Methods or apparatus for generating mechanical vibrations of infrasonic, sonic, or ultrasonic frequency making use of electrical energy
    • B06B1/06—Methods or apparatus for generating mechanical vibrations of infrasonic, sonic, or ultrasonic frequency making use of electrical energy operating with piezoelectric effect or with electrostriction
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/02—Microstructural systems; Auxiliary parts of microstructural devices or systems containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS]
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C3/00—Assembling of devices or systems from individually processed components

Definitions

  • Embodiments of the present invention relate to the field of semiconductors, and in particular to a micromachined ultrasonic transducer structure with a carrier layer provided with dual PMUTs (Piezoelectric micromachined ultrasonic transducer, PMUT) and a manufacturing method thereof, and a micromachined ultrasonic transducer having the same Structure of electronic equipment.
  • PMUT Pielectric micromachined ultrasonic transducer
  • ultrasonic transducer As an electroacoustic component, ultrasonic transducer is widely used in production and life.
  • the ultrasonic transducer emits ultrasonic waves to the external environment, and receives the reflected ultrasonic waves through the ultrasonic transducer and converts them into electrical signals for sensing, imaging, and acting on the external environment.
  • Typical applications of ultrasonic transducers include fingerprint recognition, ultrasonic imaging, ultrasonic radar and ranging, non-destructive testing, flow measurement, force feedback, etc., in human body imaging, car reversing radar, underwater sonar detection, sweeping robots, ultrasonic smoke It will be used in scenes such as alarms.
  • the above applications all involve the transmission of ultrasonic signals and the reception of ultrasonic signal echoes by the ultrasonic transducer. Therefore, the transmitting sensitivity and receiving sensitivity of the ultrasonic transducer determine the advantages and disadvantages of the ultrasonic transducer to a large extent.
  • Ultrasonic transducers developed using MEMS technology are mainly based on two principles: capacitive and piezoelectric, corresponding to capacitive micromachined ultrasonic transducer (CMUT) and piezoelectric micromachined ultrasonic transducer (PMUT) respectively. ), they can be integrated with complementary metal oxide semiconductor (Complementary Metal Oxide Semiconductor, CMOS) circuits to achieve low-cost, consistent and large-scale manufacturing of micro-ultrasound transducers with high integration and strong computing capabilities.
  • CMUT capacitive micromachined ultrasonic transducer
  • PMUT piezoelectric micromachined ultrasonic transducer
  • the CMUT needs to apply a large bias voltage when working, resulting in high power consumption and certain limitations in application.
  • PMUT is a promising solution.
  • the effective integration of PMUT and CMOS is a crucial factor in realizing the above-mentioned ultrasonic transducer.
  • the transmitting sensitivity and receiving sensitivity of the piezoelectric micromachined ultrasonic transducer PMUT play a vital role in the application of PMUT in the above-mentioned scenarios. If the transmitting sensitivity and receiving sensitivity are too low, the signal signal-to-noise ratio will be affected. Eventually the system becomes inoperable or performs poorly.
  • the PMUT usually exhibits bending vibration mode.
  • an alternating electric field is applied to the electrodes on both sides of the piezoelectric film. Due to the inverse piezoelectric effect, transverse stress is generated in the piezoelectric layer, which in turn generates a bending moment, forcing the film to deviate from the plane and emit into the surrounding medium. Sound pressure wave.
  • the ultrasonic emission sensitivity S T of the flexural vibration PMUT is proportional to the piezoelectric coefficient réelle 31f of the piezoelectric film: S T ⁇ e 31f (1)
  • the receiving sensitivity S R is proportional to the ratio of the piezoelectric coefficient réelle 31f and the dielectric constant ⁇ 33 ; S R ⁇ e 31f / ⁇ 33 (2)
  • the ultrasonic transducer probe In ultrasonic imaging, the ultrasonic transducer probe not only serves as a transmitter to emit ultrasonic waves, but also as a receiver to receive ultrasonic waves reflected back from the object to be imaged.
  • the working mode is usually pulse-echo mode, as shown in formula (3). shows that the PMUT pulse-echo sensitivity S T ⁇ S R is proportional to the ratio of the square of the piezoelectric coefficient réelle 31 to the dielectric constant ⁇ 33 .
  • Piezoelectric coefficient and dielectric constant are the basic properties of piezoelectric materials. Table 1 lists the piezoelectric coefficient and dielectric constant properties of PZT and AlN among common piezoelectric materials.
  • the dielectric constant of PZT is about 110 times that of AlN. times, so the receiving sensitivity of PZT-based PMUT will be about one-twelfth that of AlN-based PMUT.
  • the sensitivity of the pulse-echo (transmit-receive) signal of the PMUT developed is equivalent.
  • the PMUT manufacturing process includes the deposition of various films (such as piezoelectric films, electrode films, etc.) at different temperatures and the etching of corresponding films in different atmospheres and liquid environments. These processing processes may cause damage to CMOS circuits.
  • the thinning and patterning processes of different piezoelectric materials and the electrode materials deposited on both sides of the film are also very different. Therefore, there is a process incompatibility problem when processing PMUTs of two materials on the same substrate. This leads to great risks and difficulties in fabricating PMUTs based on different piezoelectric films layer by layer on the same wafer. It is necessary to develop a PMUT-on-CMOS integration with strong process compatibility and convenience that contains different types of piezoelectric materials. plan.
  • Embodiments of the present invention relate to a micromechanical ultrasonic transducer structure, including:
  • the PMUT unit includes a PMUT carrying layer and first PMUT and second PMUT arranged on the PMUT carrying layer, each PMUT including a first electrode layer, a second electrode layer and a piezoelectric layer,
  • the piezoelectric coefficient of the piezoelectric layer of the first PMUT is higher than the piezoelectric coefficient of the piezoelectric layer of the second PMUT, and the dielectric constant of the piezoelectric layer of the first PMUT is lower than the dielectric constant of the piezoelectric layer of the second PMUT.
  • first PMUT and the second PMUT are respectively arranged on both sides of the PMUT bearing layer.
  • Embodiments of the present invention also relate to a method for manufacturing a micromechanical ultrasonic transducer structure, which includes the steps:
  • the transistor unit includes a transistor substrate, a transistor, and a circuit covering the transistor. road protection;
  • the PMUT unit includes a PMUT carrier layer, a first PMUT and a second PMUT, each PMUT includes a first electrode layer, a second electrode layer and a piezoelectric layer,
  • the piezoelectric coefficient of the piezoelectric layer of the first PMUT is higher than the piezoelectric coefficient of the piezoelectric layer of the second PMUT, and the dielectric constant of the piezoelectric layer of the first PMUT is lower than the dielectric constant of the piezoelectric layer of the second PMUT.
  • the first PMUT and the second PMUT are respectively arranged on both sides of the PMUT bearing layer.
  • Embodiments of the present invention also relate to an electronic device, including the above-mentioned micro-machined ultrasonic transducer structure, or the micro-machined ultrasonic transducer structure manufactured by the above-mentioned manufacturing method.
  • FIGS. 1-5 are schematic structural diagrams of micromachined ultrasonic transducer structures according to different exemplary embodiments of the present invention, in which two PMUTs share the same PMUT bearing layer and are disposed on both sides of the PMUT bearing layer;
  • FIGS. 11A to 11C are schematic cross-sectional views illustrating a manufacturing method of the micromachined ultrasonic transducer structure shown in FIG. 1 according to an exemplary embodiment of the present invention, wherein FIGS. 11A to 11C schematically illustrate Figure 1 shows a schematic diagram of how PMUTs on both sides form electrical connections with CMOS in the micromachined ultrasound transducer structure;
  • FIG. 12-16 are cross-sectional schematic diagrams illustrating a manufacturing method of the micromachined ultrasonic transducer structure shown in FIG. 5 according to an exemplary embodiment of the present invention
  • Figure 17 is a schematic structural diagram of a micromachined ultrasonic transducer structure according to another exemplary embodiment of the present invention, in which two PMUTs share the same PMUT bearing layer and are disposed on one side of the PMUT bearing layer;
  • Figure 18 is a schematic diagram of a PMUT structure array according to an exemplary embodiment of the present invention.
  • a PMUT based on a material with a high voltage electrical coefficient is used as an ultrasonic transmitter and a PMUT based on a low dielectric constant material is used as an ultrasonic receiver, for example, a PZT based PMUT as shown in Table 1 is integrated on a set of ultrasonic transducers.
  • PMUT and AlN-based PMUT where PZT-based PMUT serves as the ultrasonic transmitter and AlN-based PMUT serves as the ultrasonic receiver, its pulse-echo sensitivity will be 100 times higher than that of a single material-based PMUT.
  • Solution 1 Use the CMOS wafer as the substrate and perform various thin film deposition and etching processes on it.
  • the PMUT manufacturing process includes the deposition of various thin films (such as piezoelectric films, electrode films, etc.) at different temperatures and the corresponding The etching of thin films in different atmospheres and liquid environments requires that the processing process does not cause damage to the CMOS circuit.
  • piezoelectric materials only a few piezoelectric films such as AlN-based piezoelectric materials have MEMS manufacturing processes that are compatible with CMOS. Therefore, this solution is mainly used for the development of integrated ultrasonic transducers based on corresponding piezoelectric materials. .
  • the piezoelectric properties of the piezoelectric film are a crucial determinant of PMUT performance.
  • piezoelectric materials with very excellent piezoelectric properties such as PZT and LiNbO 3 have more demanding processing techniques than AlN and poor compatibility with CMOS. Therefore, the development of CMOS integrated PMUT based on the above process flow is very limited and difficult to achieve.
  • the cavity size is the core factor that determines the PMUT ultrasonic frequency, and changes in the cavity size will lead to changes in the PMUT ultrasonic frequency.
  • alignment deviations inevitably occur, resulting in random deviations between the vibration unit area and its own design, resulting in frequency fluctuations of the developed CMOS integrated PMUT.
  • the diameter of PMUT transducers used in the field of ultrasound imaging is very small, usually tens of microns or even smaller. Even an alignment deviation of 1 micron will cause great adverse effects.
  • CMOS and PMUT The electrical material itself is highly universal, and/or the integration process of the CMOS unit and the PMUT unit does not affect the cavity size.
  • the present invention proposes to separately integrate piezoelectric material-based PMUTs with high voltage electrical coefficients (for example, the absolute value is higher than 1C/m 2 , and further higher than 5C/m 2 ) and low voltage electrical coefficients on the same CMOS wafer.
  • ultrasonic transducers piezoelectric material-based PMUTs with dielectric constants (for example, lower than 1200, further lower than 100).
  • piezoelectric material-based PMUTs with high-voltage electric coefficients are dedicated to emitting ultrasonic waves, while those with low dielectric coefficients are
  • the piezoelectric material-based PMUT with electrical constant is used to receive the reflected ultrasonic waves.
  • the above-mentioned PMUT and CMOS integration solution is the key to developing MEMS ultrasound transducers with excellent performance and low cost.
  • the present invention also proposes a solution to simultaneously integrate the above two types of piezoelectric material-based PMUTs on the same CMOS wafer.
  • This solution is a PMUT-on-CMOS integration solution containing different types of piezoelectric materials with strong process compatibility and convenience.
  • the present invention also proposes a micromechanical ultrasonic transducer structure including the above two types of piezoelectric film-based PMUTs.
  • the present invention proposes a solution of integrating two piezoelectric material-based PMUTs back-to-back on both sides of the substrate.
  • the PMUT on a single side only contains one type of piezoelectric material and its matching electrode material, which greatly reduces the cost of processing the second
  • This method also reduces the plane area occupied by the transducer (two piezoelectric material-based PMUTs are integrated back-to-back vertically instead of arranged horizontally) .
  • CMOS unit or transistor unit see Figure 6.
  • CMOS substrate or transistor substrate optional materials are single crystal silicon, gallium nitride, gallium arsenide, sapphire, quartz, silicon carbide, diamond, etc.
  • Circuit protection layer which is an insulating material layer, which can be silicon dioxide, silicon nitride, etc.
  • the electrical connection layer within the transistor unit layer, corresponding to the first electrical connection layer, the material can be molybdenum, ruthenium, gold, aluminum, magnesium, tungsten, copper, titanium, iridium, osmium, chromium or a composite of the above metals or their alloys etc., the above materials are also suitable for other electrical connection layers.
  • PMUT substrate optional materials are single crystal silicon, gallium nitride, gallium arsenide, sapphire, quartz, silicon carbide, diamond, etc.
  • Oxide layer (Fig. 4) or bonding layer (Fig. 5).
  • Support layer the material of which can be the same as the material of the electrode layer, or different.
  • the support layer can be disposed between the PMUT and the PMUT substrate.
  • the support layer is an insulating layer, and its material can be non-conductive materials such as silicon, silicon dioxide, and silicon nitride.
  • the support layer can also be provided on the upper part of the PMUT. It should be pointed out that the support layer does not need to be provided.
  • Electrode layer the material can be molybdenum, ruthenium, gold, aluminum, magnesium, tungsten, copper, titanium, iridium, osmium, chromium or composites of the above metals or their alloys, etc.
  • the materials of the two electrode layers can be the same or different.
  • Piezoelectric layer Materials available include polycrystalline aluminum nitride (AlN), polycrystalline zinc oxide, polycrystalline lead zirconate titanate (PZT), polycrystalline lithium niobate (LiNbO 3 ), polycrystalline lithium tantalate (LiTaO 3 ), polycrystalline niobium Materials such as potassium nitrate (KNbO 3 ), or single crystal aluminum nitride, single crystal gallium nitride, single crystal lithium niobate, single crystal lead zirconate titanate, single crystal potassium niobate, single crystal quartz film, or single crystal tantalum Lithium acid oxide and other materials, the above-mentioned single crystal or polycrystalline materials can also include rare earth element doped materials with a certain atomic ratio, all belong to the piezoelectric layer that can be used in the present invention, such as scandium doped aluminum nitride (AlScN).
  • AlScN scandium doped aluminum nitride
  • Conductive layer or electrical connection layer the material of which can be selected from the materials used to form the electrode layer.
  • Conductive layer or electrical connection layer the material of which can be selected from the materials used to form the electrode layer.
  • Device protective layer usually dielectric material, such as silicon dioxide, aluminum nitride, silicon nitride, etc.
  • Bonding material layer see Figures 1 and 3. It can be a metal bonding layer, such as gold-gold bonding, aluminum-germanium bonding, etc., or other material layers that bond two layers together.
  • FIGS. 1-5 are schematic structural diagrams of micromachined ultrasonic transducer structures according to different exemplary embodiments of the present invention, in which two PMUTs share the same PMUT bearing layer and are disposed on both sides of the PMUT bearing layer.
  • a single PMUT generally includes a support layer 220, a piezoelectric layer 240, and a top electrode layer 250 and a bottom electrode layer 230 on both sides of the piezoelectric layer 240, on the side of the PMUT vibration unit facing the CMOS.
  • the cavity 201 shared by the two PMUTs is provided so that the PMUT vibration unit can generate effective bending vibration to generate ultrasonic waves.
  • two types of ultrasonic transducers, a piezoelectric material-based PMUT with a high voltage coefficient and a piezoelectric material-based PMUT with a low dielectric constant are simultaneously integrated on a CMOS wafer or the transistor unit 1000 as shown in the figure.
  • 240 and 270 represent high-voltage coefficient-based piezoelectric films and low-dielectric-constant-based piezoelectric films, respectively.
  • 201 is the cavity area where the PMUT composed of two types of piezoelectric films performs effective bending vibration.
  • 220 is a carrier layer carrying PMUT, which is the PMUT support layer in the embodiment of FIG. 1
  • 100 is a substrate or transistor base for constructing a CMOS circuit
  • 110 is a circuit protection layer.
  • the absolute value of the piezoelectric coefficient of the piezoelectric layer 240 is greater than 1 C/m 2 , and/or the dielectric constant of the piezoelectric layer 270 is less than 1200. Further, the absolute value of the piezoelectric coefficient of the piezoelectric layer 240 is greater than 5C/m 2 , and/or the dielectric constant of the piezoelectric layer 270 is less than 100.
  • piezoelectric layer 240 is PZT or doped PZT
  • piezoelectric layer 270 is ALN or AlScN.
  • the present invention first builds a piezoelectric material-based PMUT wafer on one side of the PMUT carrier layer, and then bonds it to the CMOS wafer, and then in the partially integrated PMUT-on-CMOS On the wafer, another piezoelectric material-based PMUT is built on the other side of the PMUT carrier layer.
  • a piezoelectric material-based PMUT wafer on one side of the PMUT carrier layer, and then bonds it to the CMOS wafer, and then in the partially integrated PMUT-on-CMOS On the wafer, another piezoelectric material-based PMUT is built on the other side of the PMUT carrier layer.
  • the PMUT wafer electrodes can be interconnected with corresponding electrodes on the CMOS wafer to achieve electrical connection. If necessary, the surface of the device can be protected to provide a device protection layer 290 .
  • the integration scheme shown in FIGS. 1 to 5 of the present invention in the processing of different types of piezoelectric film-based PMUTs, even if the PMUT on the upper side has relatively harsh processing conditions, it will not cause damage to the CMOS wafer. Good process compatibility.
  • the PMUT carrier layer here is used to form the PMUT on it.
  • it can be the support layer 220 in Figures 1-3, or the SOI structure in Figure 4 ( Figure 4 includes the base 200, the oxide layer 210 and the support layer).
  • the material of the PMUT carrying layer may be the same or different metal as the material of the electrode layer; or the material of the PMUT carrying layer may be an insulating material or a semiconductor material, such as silicon, silicon dioxide, silicon nitride, Aluminum nitride, etc.
  • two piezoelectric material-based PMUTs are located on both sides of the support layer 220.
  • the two PMUTs share a cavity 201.
  • a metal bonding layer 500 is used to bond the PMUT unit to a transistor unit such as a CMOS unit.
  • the metal bond The composite layer is also connected to the circuit within the transistor unit.
  • 290 is a device protection layer. As mentioned before, the device protection layer may not be provided.
  • two piezoelectric material-based PMUTs are located on both sides of the support layer 220.
  • the two PMUTs share the cavity 201.
  • the support layer 220 of the PMUT unit is directly bonded or directly connected to the circuit protection layer 110 of the transistor unit such as the CMOS unit. Bond.
  • 290 is a device protective layer. As mentioned before, the device protective layer may not be provided.
  • the two PMUTs share the same PMUT bearing layer and are arranged oppositely on both sides of the PMUT bearing layer in the thickness direction of the PMUT bearing layer.
  • the two PMUTs share a center line. This vibrator layout or the arrangement of two PMUTs helps reduce the size of the PMUT-on-CMOS chip, increasing the integration and imaging performance of the ultimate ultrasound transducer.
  • the two PMUTs do not share a cavity, but each has a corresponding cavity.
  • two piezoelectric material-based PMUTs are located on both sides of the support layer 220.
  • the two material-based PMUTs are staggered and integrated without sharing a cavity.
  • the metal bonding layer 500 is used to connect the PMUT unit with a transistor unit such as a CMOS unit.
  • the metal bonding layer is also connected to the circuit within the transistor unit.
  • 290 is the device protection layer.
  • two piezoelectric material-based PMUTs are located on both sides of the SOI wafer.
  • the two material-based PMUTs are dislocated and integrated without sharing the cavity.
  • the SOI wafer includes a base 200, an oxide layer 210 and a top silicon film layer. Or silicon film layer 220.
  • the silicon film layer 220 in SOI that constructs the PMUT is directly bonded to the circuit protection layer 110 .
  • 290 is the device protection layer. Compared with Figure 3, this solution does not require removal of the substrate 200 and the oxide layer 210.
  • the PMUT based on the piezoelectric material 270 is constructed on a thicker substrate 200, which simplifies the manufacturing process.
  • two piezoelectric material-based PMUTs are located on both sides of the substrate 200.
  • the two material-based PMUTs are staggered and integrated without sharing a cavity.
  • the PMUTs include support layers 221 and 222, a piezoelectric layer, and a piezoelectric layer. cavities on both sides.
  • the support layer can be located outside the electrode on either side, and of course the PMUT does not need to contain a support layer.
  • the substrate 200 on which the PMUT is constructed or the bonding layer 210 is generated on its surface is directly bonded to the circuit protection layer 220 . 290 is the device protection layer.
  • the substrate for building PMUT can choose a common substrate that is cheaper than SOI, reducing the cost.
  • the PMUT wafer substrate layer can be directly bonded to the circuit protection layer of the CMOS wafer (for example, see Figure 5), or it can be bonded through an intermediate bonding layer material (such as metal bonding etc., corresponding to the bonding material layer 500) to realize the integration of the PMUT unit and the CMOS unit (for example, see FIG. 1).
  • the PMUT unit includes two PMUTs arranged on both sides of the PMUT bearing layer, namely a first PMUT and a second PMUT.
  • the piezoelectric coefficient of the piezoelectric layer 240 of the first PMUT is The piezoelectric coefficient of the piezoelectric layer 270 of the second PMUT is higher, and the dielectric constant of the piezoelectric layer 240 of the first PMUT is lower than the dielectric constant of the piezoelectric layer 270 of the second PMUT.
  • the piezoelectric layer 240 of the first PMUT is PZT or doped PZT
  • the piezoelectric layer 270 of the second PMUT is AlN or AlScN.
  • a PMUT-on-CMOS structure is adopted, but the present invention is not limited thereto.
  • the above-mentioned PMUT unit can also be arranged on other structures, and PMUT-on-CMOS is an advantageous embodiment of the present invention.
  • the first PMUT of the PMUT unit is used to transmit ultrasonic waves
  • the second PMUT is used to receive ultrasonic waves.
  • FIG. 6 to 11 are schematic cross-sectional views illustrating a method of manufacturing the micromachined ultrasonic transducer structure shown in FIG. 1 according to an exemplary embodiment of the present invention. More specifically, Figures 6 to 11 take the example of making a PMUT on an SOI wafer and integrating it with a CMOS wafer, combining a PZT piezoelectric film-based PMUT with a high voltage coefficient and a low dielectric constant. An integration solution for AlN piezoelectric film-based PMUT integrated into CMOS wafer.
  • PZT or doped PZT is selected as the high voltage coefficient material 240 or the piezoelectric layer 240 of the first PMUT, and AlN or AlScN is selected as the low dielectric constant material 270 or the piezoelectric layer 270 of the second PMUT. It is possible to construct an ultra-high pulse- Echo-sensitive PMUT-on-CMOS ultrasonic transducer.
  • Transistor unit 1000 is provided first.
  • Figure 6 is a schematic diagram of the CMOS structure, which only shows one transistor, in which 100 is the CMOS substrate, that is, the transistor substrate (which can be silicon, etc.), and 110 is the circuit protection layer (which can be silicon oxide, silicon nitride, etc.).
  • 101 is the source and drain of the transistor
  • 111 is the gate of the transistor poles
  • 113A, 113B, 113 and 115 are electrical connection layers within the CMOS layer
  • 112 and 114 are electrical connection layers between CMOS layers.
  • the transistor unit includes a transistor substrate 100 and first and second transistors spaced apart in the lateral direction. It should be noted that the structure shown in Figure 6 is exemplary.
  • the CMOS unit 1000 may include a CMOS transistor and a circuit protection layer 110, and may optionally include a first electrical connection layer 113A, a second electrical connection layer 113A, and a first electrical connection layer 113A. Connection layer 113B.
  • a PZT piezoelectric material-based PMUT is manufactured on an SOI wafer, where 200 is the base, 210 is the oxide layer, and 220 is the silicon film layer to form an SOI wafer.
  • 240 is the PZT piezoelectric film layer, and 230 and 250 are the top and bottom electrode layers on both sides of the piezoelectric film layer.
  • 245 is an electrical connection channel or electrical connection layer that connects the top and bottom electrodes on both sides of the PZT piezoelectric film to the silicon layer 220, which will be interconnected with the electrical connection end of the CMOS circuit.
  • Figure 8 first remove the circuit protective layer material on the CMOS circuit that will correspond to the electrical interconnection part of the PMUT (that is, forming conductive holes 400A and 400B as shown in Figure 15 below) to expose the electrical connections on the CMOS circuit end; then, bond the piezoelectric film side of the PZT-based PMUT to the CMOS circuit side.
  • Figure 8 illustrates the integration and implementation of the piezoelectric film PZT-based PMUT and the CMOS circuit through metal bonding. Electrical interconnections. That is, the bonding material layer 500 also serves as a part of electrically connecting the PMUT and the CMOS circuit.
  • bonding methods can also be selected, such as using a non-conductive material bonding layer, or directly bonding the silicon film layer 220 and the circuit protection layer 110 (such as silicon-silicon bonding, silicon and silicon oxide bonding). direct bonding, etc.).
  • the bonding layer material can not only realize the bonding function, but also realize the electrical interconnection between PMUT and CMOS.
  • the bonding layer material or the silicon film layer 220 and the circuit protection layer 110 are directly bonded.
  • PMUT achieves effective bending vibration, which has a cavity on the CMOS side.
  • the intermediate bonding layer material is used to bond two wafers together, the existence of the intermediate bonding layer can provide a cavity for the PMUT vibration unit to achieve
  • cavities can also be etched at corresponding positions on the CMOS wafer, or used in combination to provide effective vibration for the PMUT vibration unit.
  • the silicon film layer 220 is directly bonded to the circuit protection layer 110, sufficient cavities need to be formed on the CMOS circuit for the PMUT vibration unit to vibrate effectively.
  • the substrate 200 and the oxide layer 210 of the SOI wafer are removed to expose the unprocessed side of the silicon film layer 220 of the SOI wafer, and a second pressing is performed on this side. Electrical thin film based PMUT processing and manufacturing.
  • another piezoelectric material-based PMUT is constructed on one side of the exposed silicon film layer 220, such as an AlN piezoelectric material-based PMUT, in which 270 is an AlN-based piezoelectric film layer, and 260 and 280 are piezoelectric film layers respectively. Top and bottom electrode layers on both sides of the film.
  • FIG. 11A and 11B exemplarily show a schematic diagram of how PMUTs on both sides form electrical connections with CMOS in the micromachined ultrasound transducer structure shown in FIG. 1 .
  • Figures 11A and 11B illustrate the electrical interconnection between the PMUT on the side of the PMUT carrier layer away from the CMOS wafer (that is, the second piezoelectric material-based PMUT) and the CMOS circuit.
  • the PMUT and CMOS circuits on both sides of the support layer 220 have different locations for electrical interconnection track lines.
  • the PMUTs on both sides are electrically interconnected with the CMOS circuit through A-A′ and B-B′ respectively.
  • the A-A′ and B-B′ lines do not need to be vertical, as long as there is no overlap.
  • FIG. 11B electrically interconnects the electrode layers 260 and 280 of the piezoelectric film 270-based PMUT with the CMOS circuit.
  • the PMUT wafer is bonded to the CMOS circuit, and the electrode layers 230 and 250 of the piezoelectric film 240-based PMUT are interconnected with the CMOS circuit, the second piezoelectric
  • the electrical interconnection material is deposited at the electrical interconnection between the material-based PMUT and the CMOS circuit to form an interconnection channel. That is, the support layer 220 at the corresponding position only needs to be etched to expose the end of the electrical connection channel.
  • FIG. 11C is a schematic cross-sectional view of the finally formed PMUT-on-CMOS device along the side of the support layer 220 facing the CMOS circuit, where the PMUT and CMOS form electrical interconnections, that is, along A-A in FIG. 11A .
  • a device protection layer 290 is deposited on the entire device surface.
  • FIG. 12-16 are schematic cross-sectional views illustrating a method of manufacturing the micromachined ultrasound transducer structure shown in FIG. 5 according to an exemplary embodiment of the present invention.
  • Figures 12 to 16 take the example of making a PMUT on an SOI wafer and integrating it with a CMOS wafer.
  • the PZT piezoelectric film-based PMUT with high voltage coefficient and the AlN piezoelectric film-based PMUT with low dielectric constant are combined.
  • An integration scheme in which PMUTs are integrated into CMOS wafers, in which the two PMUTs are arranged staggered in the lateral direction and do not share the cavity.
  • Figure 12 is a schematic structural diagram of manufacturing a PZT piezoelectric material-based PMUT on an SOI wafer, in which 200 is the substrate, 210 is the oxide layer, and 220 is the silicon film layer; 240 is the PZT piezoelectric thin film layer, and 230 and 250 are the piezoelectric thin film layers.
  • the top and bottom electrode layers on both sides; 245 are electrical connection channels or layers that connect the top and bottom electrodes on both sides of the PZT piezoelectric film to the silicon layer 220, which will subsequently be interconnected with the electrical connection terminals of the CMOS circuit.
  • the piezoelectric film PZT-based PMUT required for vibration is etched into the circuit protection layer of CMOS.
  • Cavity 201 the structure shown in Figure 12 is bonded to the circuit protection layer of CMOS, that is, the piezoelectric film side of the PZT-based PMUT is bonded to the CMOS circuit side, and the vibration part of the PZT-based PMUT is in the cavity Within 201.
  • a PMUT based on another piezoelectric material 270 is constructed on the substrate 200, such as a piezoelectric film AlN-based PMUT.
  • 260 and 280 are electrodes on both sides of the piezoelectric film, which can be formed through a sacrificial layer or other solutions.
  • Cavity 202 is required for the PMUT to fully vibrate effectively.
  • the PMUT may be constructed on a support layer 222 or may not include the support layer.
  • conductive holes 400A and 400B are formed based on the etching process, which penetrate the entire thickness of the PMUT and reach into the circuit protection layer 110 until the circuit protection is exposed. conductive parts within the layer. For each PMUT, a conductive hole 400A and a conductive hole 400B are etched to expose the intra-transistor unit layer electrical connection layer 113A and the intra-transistor unit layer electrical connection layer 113B respectively.
  • the first electrical connection layer 113A is electrically connected to one of the electrodes of the CMOS transistor (for example, the source), and the second electrical connection layer 113B is electrically connected to another one of the electrodes of the CMOS transistor (for example, the gate).
  • the first electrical connection layer 113A and/or the second electrical connection layer 113B can also be electrically connected thereto, which is also within the scope of the present invention. within the range.
  • an electrical connection layer 275 between the PMUT and the CMOS is provided using a deposition process to realize the electrical connection between the PMUT and the CMOS.
  • the electrical connection layer 275 is formed by a deposition method to realize the electrical connection between the PMUT and the CMOS, and finally the device protection layer 290 is covered on the surface of the PMUT.
  • the electrical connection layer 275 can be made of various conductive materials, such as materials used to form electrode layers.
  • the conductive channels or materials used in the electrical connection layer 235 to connect the PZT-based PMUT and the CMOS circuit are related to the realization of the AlN-based PMUT and the CMOS circuit.
  • the connected conductive channels or electrical connection layers 275 may be of the same type of material or may be of different types of conductive materials.
  • the electrical connection layers 235 and 275 are electrically insulated from each other, and the electrical connection layers 235 and 275 form electrical connections with the transistor unit intra-layer electrical connection layer 113A and the intra-layer electrical connection layer 113B respectively through conductive holes.
  • the bonding between the PMUT unit and the transistor unit is achieved by providing the bonding material layer 500, then the PMUT unit, the transistor unit and the bonding material layer jointly define a cavity, and the bonding material layer 500 can be used to define the lateral boundaries of the cavity.
  • CMOS unit 1000 can be protected without considering the impact on the CMOS unit 1000 when preparing the PMUT.
  • CMOS unit 1000 can be protected without considering the impact on the CMOS unit 1000 when preparing the PMUT.
  • This can make the above-mentioned micromechanical ultrasonic transducer structure highly adaptable to piezoelectric materials, which can be aluminum nitride (AlN), lead zirconate titanate (PZT), or lithium niobate (LiNbO 3 ) , lithium tantalate (LiTaO 3 ), potassium niobate (KNbO 3 ) and other materials.
  • joining of the two in the present invention not only includes the situation where the two are directly joined as shown, but may also include the situation where other joining layers or film layers are provided between the two.
  • connection between the PMUT substrate and the circuit protection layer is taken as an example for illustration.
  • connection between the PMUT substrate and the CMOS unit 1000 may be to define the surface of the CMOS unit.
  • the circuit protection layer which may also be other layers defining the surface of the CMOS unit, is within the scope of the present invention.
  • the CMOS unit 1000 further includes a CMOS substrate 100 , one side of the circuit protection layer 110 is bonded to the PMUT carrier layer, and the other side of the circuit protection layer 110 is bonded to the CMOS substrate 100 .
  • the PMUT unit can also be bonded to the CMOS substrate 100, which is also within the protection scope of the present invention.
  • CMOS is used as an example of a transistor, and thus a CMOS unit is used as an example of a transistor unit.
  • the transistor can also be a BiMOS unit or BCD, etc., so that a transistor
  • the unit can also be a BiMOS unit or a BCD unit, etc.
  • the cavity structure required for PMUT vibration is set on the PMUT wafer side, and there is no need to form the cavity 201 on the CMOS wafer before integrating the two, so that the CMOS wafer and In the PMUT wafer integration process, there is no change in the vibration area caused by alignment deviation, and the resulting change in the frequency of the ultrasonic transducer, overcoming the negative impact on the cavity size caused by the integration process of CMOS and PMUT in the existing technology.
  • Such technical issues are provided in wafer-level manufacturing, and there is no need to form the cavity 201 on the CMOS wafer before integrating the two, so that the CMOS wafer and In the PMUT wafer integration process, there is no change in the vibration area caused by alignment deviation, and the resulting change in the frequency of the ultrasonic transducer, overcoming the negative impact on the cavity size caused by the integration process of CMOS and PMUT in the existing technology.
  • the micromachined ultrasonic transducer structure is provided with a first conductive hole 400A and a second conductive hole 400B.
  • the hole 400A penetrates the PMUT substrate 200 and/or the support layer 210 and reaches the first electrical connection layer 113A in the circuit protection layer 110.
  • the second conductive hole 400B penetrates the PMUT substrate 200 and/or the support layer 210 and reaches the circuit protection layer 110.
  • the second electrical connection layer 113B wherein: the first conductive layer 235 is electrically connected to the first electrical connection layer 113A through the first conductive hole 400A, and the second conductive layer 275 is electrically connected to the second electrical connection layer through the second conductive hole 400B. 113B electrical connection.
  • first conductive layer 235 and the second conductive layer 275 may be used in micromachined ultrasonic transducers.
  • the side surfaces of the device structure are electrically connected to the first electrical connection layer 113A and the second electrical connection layer 113B exposed on the sides respectively, which is also within the protection scope of the present invention.
  • FIGS. 1 to 16 a structure in which two PMUTs are provided on both sides of the PMUT carrier plate is shown, but the present invention is not limited to this. As shown in Figure 17, the above two PMUTs spaced apart in the transverse direction can also be provided on the same side of the PMUT carrier plate.
  • the cavity plays a protective role in isolating the PMUT (especially the piezoelectric layer) from the external environment, which can improve the reliability and long-term stability of the PMUT, and then be used in the above-mentioned PMUT structure.
  • the reliability and long-term stability of the final imaging system can be improved.
  • FIG 18 is a schematic diagram of a PMUT structure array according to an exemplary embodiment of the present invention.
  • the above-mentioned PMUT structure 3000 may be only one array element in the array 4000.
  • the hollow circle represents the PMUT vibration area of the PMUT structure 3000. In addition to the circle, it can be any desired shape such as an ellipse, a polygon, and a combination thereof.
  • the solid black circle represents the electrical connection between the PMUT unit and the CMOS unit, as shown in FIG. 6 at the first electrical connection layer 113A and the second electrical connection layer 113B, which can also be in any desired shape.
  • the PMUT structures 3000 are combined to form a PMUT structure array 4000.
  • Each PMUT unit can be individually controlled through a matching CMOS circuit to form a two-dimensional PMUT structure array 4000.
  • Multiple PMUT structures 3000 can also be connected together.
  • the electrodes of the PMUT structures 3000 on the same column are interconnected to form a one-dimensional line array.
  • the electrical connection points between the circuit of the CMOS unit and the PMUT unit are reduced, and a pair of CMOS units are connected with each other.
  • the electrical connection points of the PMUT units control multiple PMUT units simultaneously.
  • An ultrasonic transducer can be formed based on a PMUT structure or a PMUT structure array.
  • the ultrasonic transducer can be used in an ultrasonic imager.
  • the PMUT structure or PMUT structure array can also be used in other electronic devices, such as ultrasonic rangefinders, Ultrasonic fingerprint sensors, non-destructive flaw detectors used in industrial fields, etc.
  • a micromechanical ultrasonic transducer structure including:
  • the PMUT unit includes a PMUT carrying layer and first PMUT and second PMUT arranged on the PMUT carrying layer, each PMUT including a first electrode layer, a second electrode layer and a piezoelectric layer,
  • the piezoelectric coefficient of the piezoelectric layer of the first PMUT is higher than the piezoelectric coefficient of the piezoelectric layer of the second PMUT, and the dielectric constant of the piezoelectric layer of the first PMUT is lower than the dielectric constant of the piezoelectric layer of the second PMUT.
  • the first PMUT and the second PMUT are respectively arranged on both sides of the PMUT carrying layer.
  • the piezoelectric layer of the first PMUT is PZT or doped PZT, and the piezoelectric layer of the second PMUT is AlN or AlScN; and/or
  • the first PMUT is used to transmit ultrasonic waves
  • the second PMUT is used to receive ultrasonic waves.
  • micromechanical ultrasonic transducer structure according to any one of 1-3, wherein:
  • the first PMUT and the second PMUT are arranged oppositely on both sides of the PMUT bearing layer in the thickness direction of the PMUT bearing layer, and the first PMUT and the second PMUT share a cavity for the PMUT.
  • micromechanical ultrasonic transducer structure according to 4, wherein:
  • the PMUT bearing layer is the PMUT support layer
  • the micromechanical ultrasonic transducer structure also includes a transistor unit, including a transistor base, a transistor, and a circuit protection layer covering the transistor, and the circuit protection layer faces the PMUT unit;
  • the circuit protection layer is bonded to the PMUT support layer.
  • a cavity shared by the first PMUT and the second PMUT is provided on one side of the circuit protection layer facing the PMUT unit.
  • the vibration part of the corresponding PMUT is located in the cavity, or the circuit protection layer is connected to the PMUT support layer.
  • the PMUT support layers are connected via a metal bonding layer, and a cavity shared by the first PMUT and the second PMUT is provided between the metal bonding layer, the circuit protection layer and the PMUT support layer.
  • micromechanical ultrasonic transducer structure according to 5, wherein:
  • the transistor unit includes a plurality of electrical connection layers within a circuit protection layer
  • the micromachined ultrasonic transducer structure further includes a plurality of conductive vias that electrically connect the electrode layers of the first PMUT and the second PMUT with corresponding electrical connection layers.
  • the metal bonding layer forms part of the corresponding conductive path.
  • micromechanical ultrasonic transducer structure according to any one of 1-3, wherein:
  • the first PMUT and the second PMUT are spaced apart from each other in the lateral direction and are arranged on both sides of the PMUT bearing layer, and the micromechanical ultrasonic transducer structure is provided with cavities for the first PMUT and the second PMUT respectively.
  • micromechanical ultrasonic transducer structure also includes:
  • the transistor unit includes a transistor substrate, a transistor, and a circuit protection layer covering the transistor.
  • the circuit protection layer faces the PMUT unit, and the circuit protection layer is bonded to the PMUT unit.
  • micromechanical ultrasonic transducer structure according to 9, wherein:
  • the PMUT bearing layer is the PMUT support layer, and the first PMUT and the second PMUT are arranged on the PMUT support layer. both sides;
  • the circuit protection layer and the PMUT support layer are directly bonded or the circuit protection layer and the PMUT support layer are bonded with a bonding layer.
  • the side of the circuit protection layer facing the PMUT unit is respectively provided with cavities for the first PMUT and the second PMUT, corresponding to The vibrating portion of the PMUT is located within the cavity; or the circuit protection layer and the PMUT support layer are bonded with a metal bonding layer that defines the lateral boundaries of the cavity for the first PMUT and the second PMUT. At least part of the cavity is provided between the circuit protection layer and the PMUT support layer for the first PMUT and the second PMUT.
  • micromechanical ultrasonic transducer structure according to 9, wherein:
  • the PMUT carrying layer includes a substrate layer.
  • One of the first PMUT and the second PMUT is disposed on one side of the substrate layer.
  • the other PMUT of the first PMUT and the second PMUT is disposed on the other side of the substrate layer.
  • the substrate layer is on A location corresponding to the one PMUT is thinned or removed to facilitate vibration of the vibrating portion of the one PMUT, and a cavity for the other PMUT is provided in the substrate layer;
  • the circuit protection layer is bonded to the substrate layer, and a cavity for the one PMUT is provided on a side of the circuit protection layer facing the PMUT unit.
  • micromechanical ultrasonic transducer structure according to 11, wherein:
  • the micromachined ultrasound transducer structure further includes: a PMUT support layer for the one PMUT, and/or a PMUT support layer for the other PMUT.
  • micromechanical ultrasonic transducer structure according to 9, wherein:
  • the PMUT carrying layer includes an SOI structure.
  • the SOI structure includes a substrate layer, an oxide layer and a silicon film layer.
  • One of the first PMUT and the second PMUT is disposed on one side of the silicon film layer, and the first PMUT and the second PMUT Another PMUT is provided on one side of the substrate layer, a cavity for the other PMUT is provided in the substrate layer, and the substrate layer is thinned or removed at a position corresponding to the one PMUT to facilitate the one PMUT
  • the vibrating part vibrates;
  • the circuit protection layer is directly connected to the silicon film layer, and a cavity for the one PMUT is provided on the side of the circuit protection layer facing the PMUT unit.
  • micromechanical ultrasonic transducer structure according to any one of 9-13, wherein:
  • the transistor unit includes a plurality of electrical connection layers within a circuit protection layer
  • the micromachined ultrasonic transducer structure further includes a plurality of conductive vias that electrically connect the electrode layers of the first PMUT and the second PMUT with corresponding electrical connection layers.
  • micromechanical ultrasonic transducer structure according to 14, wherein:
  • the metal bonding layer forms part of the corresponding conductive path.
  • the transistor unit includes one of a CMOS unit, a BiMOS unit, and a BCD unit.
  • micromechanical ultrasonic transducer structure according to 1, wherein:
  • the material of the PMUT carrying layer is the same or different metal as the material of the first electrode layer or the second electrode layer; or the material of the PMUT carrying layer is an insulating material or a semiconductor material, such as silicon, silicon dioxide, silicon nitride, aluminum nitride, etc. .
  • the PMUT carrier layer material is silicon, silicon dioxide, silicon nitride or aluminum nitride.
  • the absolute value of the piezoelectric coefficient of the piezoelectric layer of the first PMUT is greater than 1C/m 2 ;
  • the dielectric constant of the piezoelectric layer of the second PMUT is less than 1200.
  • the absolute value of the piezoelectric coefficient of the piezoelectric layer of the first PMUT is greater than 5C/m 2 ;
  • the dielectric constant of the piezoelectric layer of the second PMUT is less than 100.
  • a method for manufacturing a micromechanical ultrasonic transducer structure including the steps:
  • the transistor unit including a transistor substrate, a transistor, and a circuit protection layer covering the transistor;
  • the PMUT unit includes a PMUT carrier layer, a first PMUT and a second PMUT, each PMUT includes a first electrode layer, a second electrode layer and a piezoelectric layer,
  • the piezoelectric coefficient of the piezoelectric layer of the first PMUT is higher than the piezoelectric coefficient of the piezoelectric layer of the second PMUT, and the dielectric constant of the piezoelectric layer of the first PMUT is lower than the dielectric constant of the piezoelectric layer of the second PMUT.
  • the first PMUT and the second PMUT are respectively arranged on both sides of the PMUT carrying layer.
  • Providing a PMUT unit bonded to a circuit protective layer of the transistor unit includes the steps of: forming one of the first PMUT and the second PMUT on one side of the PMUT support layer, bonding said side of the PMUT carrier layer to the circuit protective layer, and forming the first PMUT and the second PMUT on the other side of the PMUT carrying layer another PMUT; or
  • Providing a PMUT unit coupled to a circuit protection layer of the transistor unit includes the steps of: forming one of the first PMUT and the second PMUT on one side of the PMUT support layer, and forming the first PMUT and the second PMUT on the other side of the PMUT support layer. another one of the PMUTs, and bonding the side of the PMUT carrier layer to the circuit protection layer.
  • the first PMUT and the second PMUT are at least partially opposite in the thickness direction of the PMUT support layer.
  • the PMUT bearing layer is the PMUT support layer
  • the side of the circuit protection layer facing the PMUT unit is provided with a cavity shared by the first PMUT and the second PMUT, and the side of the PMUT support layer is directly connected to the circuit protection layer; or between the circuit protection layer and the PMUT support layer They are connected by a metal bonding layer, and a cavity shared by the first PMUT and the second PMUT is provided between the metal bonding layer, the circuit protection layer and the PMUT support layer.
  • the other PMUT and the one PMUT are arranged on both sides of the PMUT carrying layer and are spaced apart from each other in the lateral direction.
  • the PMUT carrier layer is a PMUT support layer, and cavities for the first PMUT and the second PMUT are respectively provided on the side of the circuit protection layer facing the PMUT unit;
  • the vibrating part of the one PMUT is located in the cavity for the one PMUT;
  • the vibrating portion of the other PMUT is made to correspond to the position of the cavity for the other PMUT.
  • the PMUT carrying layer includes a substrate layer, and a cavity for the one PMUT is provided on the side of the circuit protection layer facing the PMUT unit;
  • the circuit protective layer is bonded to the substrate layer, and the vibrating part of the one PMUT is in the cavity for the one PMUT;
  • the step of forming the other PMUT on the other side of the PMUT carrying layer includes: providing a cavity for the other PMUT on the substrate layer, and making the vibration part of the other PMUT be in contact with the cavity for the other PMUT.
  • the position of the cavity of another PMUT corresponds to;
  • the method further includes the step of thinning or removing a substrate layer at a position corresponding to the one PMUT to facilitate vibration of the vibrating portion of the one PMUT.
  • the PMUT carrying layer includes an SOI structure, the SOI structure includes a substrate layer, an oxide layer and a silicon film layer, and a cavity for the one PMUT is provided on the side of the circuit protection layer facing the PMUT unit;
  • the circuit protective layer is directly joined to the silicon film layer, and the vibrating part of the one PMUT is in the cavity for the one PMUT;
  • the step of forming the other PMUT on the other side of the PMUT carrying layer includes: providing a cavity for the other PMUT on the substrate layer, and making the vibration part of the other PMUT be connected to the cavity for the other PMUT. Corresponds to the position of the cavity of a PMUT;
  • the method further includes the step of thinning or removing a substrate layer at a position corresponding to the one PMUT to facilitate vibration of the vibrating portion of the one PMUT.
  • the piezoelectric layer of the first PMUT is PZT or doped PZT, and the piezoelectric layer of the second PMUT is AlN or AlScN; and/or
  • the first PMUT is used to transmit ultrasonic waves
  • the second PMUT is used to receive ultrasonic waves.
  • the transistor unit includes a plurality of electrical connection layers within a circuit protection layer
  • the method further includes the step of: arranging a plurality of conductive vias, the conductive vias electrically connecting the electrode layers of the first PMUT and the second PMUT with corresponding electrical connection layers.
  • Providing a transistor unit includes providing a transistor wafer based on a MEMS process, and the transistor wafer is formed with a plurality of the transistor units;
  • Providing a PMUT unit bonded to the circuit protection layer of the transistor unit includes: providing a PMUT wafer, based on the MEMS process, the PMUT wafer is formed with a plurality of the PMUT units;
  • the method also includes the step of performing cutting to form a micromachined ultrasound transducer structure including a single PMUT unit and a single transistor unit.
  • the absolute value of the piezoelectric coefficient of the piezoelectric layer of the first PMUT is greater than 1C/m 2 ;
  • the dielectric constant of the piezoelectric layer of the second PMUT is less than 1200.
  • the absolute value of the piezoelectric coefficient of the piezoelectric layer of the first PMUT is greater than 5C/m 2 ;
  • the dielectric constant of the piezoelectric layer of the second PMUT is less than 100.
  • An electronic device comprising the micromachined ultrasonic transducer structure according to any one of 1-20, or the micromachined ultrasonic transducer structure manufactured according to the manufacturing method according to any one of 21-34 .
  • the electronic device includes at least one of the following: an ultrasonic imager, an ultrasonic range finder, an ultrasonic fingerprint sensor, a non-destructive flaw detector, a flow meter, a force feedback device, and a smoke alarm.

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Abstract

本发明涉及一种微机械超声换能器结构及其制造方法，该微机械超声换能器结构包括PMUT单元，包括PMUT承载层以及设置于PMUT承载层的第一PMUT和第二PMUT，每个PMUT包括第一电极层、第二电极层与压电层，其中：第一PMUT的压电层的压电系数高于第二PMUT的压电层的压电系数，且第一PMUT的压电层的介电常数低于第二PMUT的压电层的介电常数。进一步的，第一PMUT和第二PMUT分别设置在PMUT承载层的两侧。本发明还涉及一种包括了上述的微机械超声换能器结构的电子设备。

Description

承载层设置有双PMUT的微机械超声换能器结构及其制造方法 技术领域
本发明的实施例涉及半导体领域，尤其涉及一种承载层设置有双PMUT(Piezoelectric micromachined ultrasonic transducer，PMUT)的微机械超声换能器结构及其制造方法、一种具有该微机械超声换能器结构的电子设备。
背景技术
超声换能器作为一种电声元件广泛应用于生产生活中。超声换能器通过发射超声波至外界环境，并通过超声换能器接收反射回来的超声波转换为电信号进行传感、成像以及对外界环境的作用。超声换能器的典型应用包括指纹识别、超声成像、超声雷达和测距、无损检测、流量测量、力觉反馈等，在人体成像、汽车倒车雷达、水下声纳探测、扫地机器人、超声烟雾报警器等场景都会用到。上述应用中，均涉及超声换能器的超声信号发射及超声信号回波的接收，因此超声换能器的发射灵敏度以及接收灵敏度在很大程度上决定了超声换能器的优劣，是上述应用场景下的关键指标。
利用传统机械切割方案制造超声换能器，在振动单元的尺寸微型化方面，以及生产成本、效率及产品一致性和良率等方面受限，不能满足超声成像仪进一步发展，特别是在低成本、便携化、高分辨率等方面的需求。
基于半导体工业的MEMS制造技术是高效、低成本、批量化生产小尺寸器件的非常有效的方式。利用MEMS技术开发的超声换能器主要基于电容式和压电式两种原理，分别对应于电容式微机械超声换能器(Capacitive Micromachined Ultrasonic Transducer，CMUT)和压电式微机械超声换能器(PMUT)，他们能够与互补金属氧化物半导体(Complementary Metal Oxide Semiconductor，CMOS)电路集成，实现具有高集成度、强运算能力的微型超声换能器的低成本、一致性和规模化制造。在这两种换能器中，CMUT工作时需要施加较大偏置电压，致使功耗较高，应用受到一定限制。相比而言，PMUT是一种很有前途的方案。其中PMUT与CMOS的有效集成是实现上述超声换能器的至关重要的因素。
压电式微机械超声换能器PMUT的发射灵敏度和接收灵敏度作为关键性能指标，对PMUT应用于上述多种场景起到至关重要的作用，发射灵敏度和接收灵敏度过低将影响信号信噪比，最终导致系统无法工作或性能低下。
PMUT通常呈弯曲振动模式。作为超声发射器时，在压电薄膜两侧的电极上施加交变电场，由于逆压电效应导致压电层中产生横向应力，进而产生一个弯曲力矩，迫使薄膜偏离平面，向周围介质中发射声压波。如公式(1)所示，弯曲振动的PMUT的超声发射灵敏度ST正比于压电薄膜的压电系数е31f：
ST∝e31f      (1)
当PMUT作为超声接收器时，入射超声波使压电薄膜偏转产生横向应力，由于正压电效应，在压电薄膜两侧的电极上集聚电荷，形成电压信号，如公式(2)所示，其接收灵敏度SR正比于压电系数е31f与介电常数ε33的比值；
SR∝e31f/ε33     (2)
超声成像中，超声换能器探头既做发射器向外发射超声波，又作为接受器，接受从待成像对象处反射回来的超声波，工作模式通常是脉冲-回波模式，如公式(3)所示，PMUT脉冲-回波灵敏度ST·SR正比于压电系数е31的平方与介电常数ε33的比值。
压电系数和介电常数是压电材料的基本特性，表1列举了常见压电材料中PZT和AlN的压电系数和介电常数特性。
表1.常见压电材料中PZT和AlN的性质
比较PZT和AlN两种压电材料可知，当仅作为发射超声波探头使用时，PZT的压电常数比AlN的高10倍，基于公式(1)，PZT基PMUT的发射灵敏度将是AlN基PMUT的10倍。
然而，仅仅作为接收超声波的探头使用时，PZT的介电常数是AlN的约110 倍，因此PZT基PMUT的接收灵敏度将是AlN基PMUT的约十二分之一。在同时做发射和接收模式的超声探头时，利用PZT或者AlN单一压电材料时，如表1所示，其所开发的PMUT的脉冲-回波(发射-接收)信号的灵敏度相当。
因此，单一压电材料难以满足同时具有高压电系数和低介电常数的特性，基于单一压电材料的例如PMUT-on-CMOS器件不能实现同时具有超高超声波发射强度和超高超声接收灵敏度的应用需求。
此外，PMUT制造流程包含多种薄膜(比如压电薄膜、电极薄膜等)在不同温度下的沉积以及相应薄膜在不同气氛、液体环境的刻蚀，这些加工流程可能对CMOS电路造成破坏。另外不同压电材料的薄膜化、图案化工艺及在薄膜两侧沉积的电极材料也存在极大不同，因此在同一衬底上加工两种材质的PMUT存在工艺不兼容问题。这导致在同一片晶圆上依次逐层制作不同压电薄膜基PMUT存在很大的风险和难度，需要开发一种工艺兼容性强、便捷的含有不同类型压电材料的PMUT-on-CMOS集成方案。
另外，当两种压电材料的PMUT集成在晶圆的一侧(即共面)，因压电材料的差异导致加工工艺的极大不同，通常采取分别加工两种压电材料基PMUT的方案，包括相应的压电薄膜层及压电薄膜两侧的顶、底电极层，这种类型的PMUT集成方案通常需要在毫米甚至亚毫米级的空间内依次而非同时性的构建多种类型的微结构，给加工成型带来较大风险和难度。
发明内容
为缓解或解决现有技术中的上述问题的至少一个方面，提出本发明。
本发明的实施例涉及一种微机械超声换能器结构，包括：
PMUT单元，包括PMUT承载层以及设置于PMUT承载层的第一PMUT和第二PMUT，每个PMUT包括第一电极层、第二电极层与压电层，
其中：
第一PMUT的压电层的压电系数高于第二PMUT的压电层的压电系数，且第一PMUT的压电层的介电常数低于第二PMUT的压电层的介电常数。
进一步的，第一PMUT和第二PMUT分别设置在PMUT承载层的两侧。
本发明的实施例还涉及一种微机械超声换能器结构的制造方法，包括步骤：
提供晶体管单元，晶体管单元包括晶体管基底、晶体管、覆盖晶体管的电 路保护层；以及
提供与晶体管单元的电路保护层接合的PMUT单元，PMUT单元包括PMUT承载层、第一PMUT和第二PMUT，每个PMUT包括第一电极层、第二电极层与压电层，
其中：
第一PMUT的压电层的压电系数高于第二PMUT的压电层的压电系数，且第一PMUT的压电层的介电常数低于第二PMUT的压电层的介电常数。
进一步的，在上述方法中，第一PMUT和第二PMUT分别设置在PMUT承载层的两侧。
本发明的实施例还涉及一种电子设备，包括上述的微机械超声换能器结构，或者上述制造方法制造的微机械超声换能器结构。
附图说明
以下描述与附图可以更好地帮助理解本发明所公布的各种实施例中的这些和其他特点、优点，图中相同的附图标记始终表示相同的部件，其中：
图1-图5为根据本发明的不同示例性实施例的微机械超声换能器结构的结构示意图，其中两个PMUT共用同一PMUT承载层且设置在PMUT承载层的两侧；
图6-图11C为根据本发明的一个示例性实施例的示例性示出图1所示的微机械超声换能器结构的制造方法的截面示意图，其中图11A-图11C示例性示出了图1所示的微机械超声换能器结构中两侧的PMUT如何与CMOS形成电连接的示意图；
图12-16为根据本发明的一个示例性实施例的示例性示出图5所示的微机械超声换能器结构的制造方法的截面示意图；
图17为根据本发明的另外的示例性实施例的微机械超声换能器结构的结构示意图，其中两个PMUT共用同一PMUT承载层且设置在PMUT承载层的一侧；
图18为根据本发明的一个示例性实施例的PMUT结构阵列的示意图。
具体实施方式
下面通过实施例，并结合附图，对本发明的技术方案作进一步具体的说明。在说明书中，相同或相似的附图标号指示相同或相似的部件。下述参照附图对 本发明实施方式的说明旨在对本发明的总体发明构思进行解释，而不应当理解为对本发明的一种限制。发明的一部分实施例，而并不是全部的实施例。基于本发明中的实施例，本领域普通技术人员所获得的所有其他实施例，都属于本发明保护的范围。
发明人发现，如果用具有高压电系数材料基PMUT作为超声发射器，低介电常数材料基PMUT作为超声接收器，比如在一套超声换能器上共同集成如表1所示的PZT基PMUT和AlN基PMUT，其中PZT基PMUT作为超声发射器，AlN基PMUT作为超声接收器，其脉冲-回波灵敏度将较单一材料基PMUT高100倍。
此外，现有PMUT与CMOS的集成主要是通过如下两种方案实现的：
方案1.以CMOS晶圆为基片，对其进行各种薄膜沉积和刻蚀流程加工，然而PMUT制造流程包含多种薄膜(比如压电薄膜、电极薄膜等)在不同温度下的沉积以及相应薄膜在不同气氛、液体环境的刻蚀，这就需要该加工工艺流程不对CMOS电路造成破坏。目前已知压电材料中，仅有AlN基压电材料等少数几种压电薄膜的MEMS制造流程与CMOS兼容，故而这种方案主要用于相应压电材料基集成化超声换能器的开发。然而压电薄膜的压电特性是PMUT性能的至关重要的决定部分，比如PZT、LiNbO3等具有非常优异压电特性的压电材料，其加工工艺较AlN苛刻，与CMOS兼容性较差，故而基于上述工艺流程的CMOS集成化PMUT的开发受限较多，很难实现。
方案2.分别加工PMUT晶圆和CMOS晶圆，设定PMUT晶圆的设置压电薄膜的一侧以及CMOS晶圆的设置晶体管的一侧为相应晶圆的正面，将PMUT晶圆的正面和CMOS正面键合，构建CMOS集成化PMUT。与上述方案1相比，该方案对压电材料的局限性较小，然而，PMUT机械振动单元的有效振动是高效地发射和接受超声波的关键，这需要振动单元下方含有空腔结构，提供空间供振动单元有效振动，这需要CMOS上含有相应空腔。然而空腔尺寸是决定PMUT超声频率的核心要素，空腔尺寸的变化将导致PMUT超声频率的变化。在PMUT和CMOS两片晶圆键合时，不可避免的存在对准偏差，导致振动单元区域与本身设计之间存在随机偏差，造成所开发的CMOS集成化PMUT的频率波动。值得指出的是，应用于超声成像领域的PMUT振元的直径都非常小，通常在几十微米甚至更小，即使1微米的对准偏差也将造成很大的不利影响。
因此，现有技术中存在开发出如下的CMOS与PMUT集成方案的需求：对压 电材料本身普适性强，和/或CMOS单元与PMUT单元的集成过程不对空腔尺寸产生影响。
基于上述，本发明提出在同一CMOS晶圆上，分别集成具有高压电系数(例如，绝对值高于1C/m2，进一步的高于5C/m2)的压电材料基PMUT和具有低介电常数(例如，低于1200，进一步的低于100)的压电材料基PMUT两类超声换能器，其中具有高压电系数的压电材料基PMUT专用于发射超声波，而具有低介电常数的压电材料基PMUT用于接收反射回来的超声波。上述PMUT与CMOS集成方案是开发拥有优异性能、低廉成本的MEMS超声换能器的关键。
本发明还提出了一种同时将上述两种类型压电材料基PMUT集成在同一CMOS晶圆上的方案。该方案是工艺兼容性强、便捷的含有不同类型压电材料的PMUT-on-CMOS集成方案。
本发明也提出了一种同时包括上述两种类型压电薄膜基PMUT的微机械超声换能器结构。本发明提出将两种压电材料基PMUT背对背集成在衬底的两侧的方案，在单一侧面的PMUT仅含有一种类型的压电材料及与其匹配的电极材料，极大降低了加工第二种压电薄膜基PMUT时对第一种PMUT的影响；同时，这种方法也缩小了换能器在占用的平面面积(两种压电材料基PMUT背对背在纵向上集成，而非横向排列)。
本发明的附图中的附图标记说明如下：
1000：CMOS单元或晶体管单元，参见图6。
100：CMOS基底或晶体管基底，可选材料为单晶硅、氮化镓、砷化镓、蓝宝石、石英、碳化硅、金刚石等。
101：晶体管的源极和漏极。
110：电路保护层，其为绝缘材料层，可以是二氧化硅、氮化硅等。
111：晶体管的栅极。
113A：晶体管单元层内电连接层，对应于第一电连接层，材料可选钼、钌、金、铝、镁、钨、铜，钛、铱、锇、铬或以上金属的复合或其合金等，上述材料也适用于其他电连接层。
113B：晶体管单元层内电连接层，对应于第二电连接层。
113、115：其他晶体管单元层内电连接层。
112和114：晶体管单元层间电连接层。
200：PMUT基底，可选材料为单晶硅、氮化镓、砷化镓、蓝宝石、石英、碳化硅、金刚石等。
201和202：用于PMUT的空腔。
210：氧化层(图4)或键合层(图5)。
220，221,222：支撑层，其材料可以与电极层的材料相同，或者不同。支撑层可以设置在PMUT与PMUT基底之间，此时支撑层为绝缘层，其材料可以为硅、二氧化硅、氮化硅等不导电材料。支撑层也可以设置在PMUT的上部。需要指出的是，也可以不设置支撑层。
230、250；260,280：电极层，材料可选钼、钌、金、铝、镁、钨、铜，钛、铱、锇、铬或以上金属的复合或其合金等。两个电极层的材料可以相同也可以不同。
240、270：压电层。材料可选多晶氮化铝(AlN)、多晶氧化锌、多晶锆钛酸铅(PZT)、多晶铌酸锂(LiNbO3)、多晶钽酸锂(LiTaO3)、多晶铌酸钾(KNbO3)等材料，或者单晶氮化铝、单晶氮化镓、单晶铌酸锂、单晶锆钛酸铅、单晶铌酸钾、单晶石英薄膜、或者单晶钽酸锂等材料，上述的单晶或多晶材料还可以包括一定原子比的稀土元素掺杂材料，均属于本发明可以使用的压电层，如钪掺杂氮化铝(AlScN)。
245：导电层或电连接层，其材料可以选自用于形成电极层的材料。
275：导电层或电连接层，其材料可以选自用于形成电极层的材料。
290：器件保护层，一般为介质材料，如二氧化硅、氮化铝、氮化硅等。
400A：第一导电用孔。
400B：第二导电用孔。
500：接合材料层，参见图1和图3，其可以是金属键合层，例如金-金键合、铝-锗键合等，也可以是其它将两层接合在一起的材料层。
3000：PMUT结构(参见图1和图18)。
4000：PMUT结构阵列(参见图18)。
图1-图5为根据本发明的不同示例性实施例的微机械超声换能器结构的结构示意图，其中两个PMUT共用同一PMUT承载层且设置在PMUT承载层的两侧。
在图示的实施例中，单个PMUT通常包括支撑层220，压电层240以及压电层240两侧的顶电极层250、底电极层230，在PMUT振动单元面向CMOS的一侧 设置两个PMUT共用的空腔201，使PMUT振动单元能够产生有效的弯曲振动产生超声波。本发明中，CMOS晶圆或者如图所示的晶体管单元1000上同时集成具有高压电系数的压电材料基PMUT和具有低介电常数的压电材料基PMUT两类超声换能器。
如图1-图5所示，240和270分别代表高压电系数基压电薄膜和低介电常数基压电薄膜。201是两种类型压电薄膜所构成PMUT进行有效弯曲振动的空腔区域。220是承载PMUT的承载层，其在图1的实施例中是PMUT支撑层，100是构建CMOS电路的衬底或者晶体管基底，110是电路保护层。
如前所述的，在更具体的实施例中，压电层240的压电系数绝对值大于1C/m2，和/或压电层270的介电常数小于1200。进一步的，压电层240的压电系数绝对值大于5C/m2，和/或压电层270的介电常数小于100。
在更具体的实施例中，压电层240为PZT或掺杂PZT，压电层270为ALN或AlScN。
在PMUT-on-CMOS集成方面，本发明首先在PMUT承载层的一侧构建一种压电材料基PMUT晶圆后，将其与CMOS晶圆键合，之后在部分集成的PMUT-on-CMOS晶圆上，在PMUT承载层的另一侧构建另一种压电材料基PMUT。该集成方案中，不同类型压电薄膜基PMUT的加工中，即使存在比较苛刻、甚至互不兼容的工艺条件，加工时互不接触，不会对彼此的加工产生影响，可操作性好。
如后面参照图15和图16的，可以将PMUT晶圆电极与CMOS晶圆上相应电极互连实现电学连接，如有需要并对器件进行表面保护以设置器件保护层290。在本发明的例如图1-图5所示的集成方案中，不同类型压电薄膜基PMUT加工中，即使在上侧的PMUT存在比较苛刻的加工条件，也不会对CMOS晶圆产生破坏，工艺兼容性好。
另外，在两种压电材料基PMUT的加工过程中，当存在某种压电材料基PMUT的加工工艺与CMOS兼容性较差，甚至不兼容时，可以在没有与CMOS电路键合的PMUT承载层上加工该压电材料基PMUT，之后在部分PMUT-on-CMOS晶圆表面构建另一部分的PMUT，实现不同性能指标压电材料基PMUT与CMOS的集成，获得超声发射和接受灵敏度都很卓越的MEMS超声换能器。
这里的PMUT承载层用来在其上形成PMUT，例如可以是图1-图3中的支撑层220，也可以是图4中的SOI结构(图4中包括了基底200、氧化层210和支 撑层或硅膜层220)，或者是图5中的基底200，也可以是其他的用于生成PMUT的其他支撑结构，这些均在本发明的保护范围之内。
在本发明的实施例中，PMUT承载层的材料可以为与电极层的材料相同或者不同的金属；或者PMUT承载层材料可以为绝缘材料或半导体材料，如硅、二氧化硅、氮化硅、氮化铝等。
如图1所示，两种压电材料基PMUT位于支撑层220两侧，两种PMUT共用空腔201，利用金属键合层500将PMUT单元与例如CMOS单元的晶体管单元接合，同时该金属键合层还与晶体管单元内的电路连接。图1中，290为器件保护层，如前面提及的，也可以不设置器件保护层。
如图2所示，两种压电材料基PMUT位于支撑层220两侧，两种PMUT共用空腔201，PMUT单元的支撑层220与例如CMOS单元的晶体管单元的电路保护层110直接接合或直接键合。图2中，290为器件保护层，如前面提及的，也可以不设置器件保护层。
在图1-图2所示的实施例中，两个PMUT共用同一PMUT承载层、且在PMUT承载层的厚度方向上相对的设置在PMUT承载层的两侧，例如两个PMUT共用中心线，这种振元布局或者是两个PMUT的布置方式有助于缩小PMUT-on-CMOS芯片的尺寸，增加集成度和终极超声换能器的成像性能。
与图1和图2所示结构中分布于PMUT承载层两侧的两种材料基PMUT的位置关系相比，如图3-图5所示，在垂直于衬底平面的轴向上，分布于两侧的两种类型的PMUT可以存在位置偏差，即两个PMUT在横向方向上彼此分隔开的设置在PMUT承载层的两侧。在图3-图5所示的结构中，两个PMUT不共用空腔，而是各自有对应的空腔。
如图3所示，两种压电材料基PMUT位于支撑层220两侧，其中两种材料基PMUT错位集成，不共用空腔，利用金属键合层500将PMUT单元与例如CMOS单元的晶体管单元接合，同时该金属键合层还与晶体管单元内的电路连接。图3中，290为器件保护层。
如图4所示，两种压电材料基PMUT位于SOI晶圆的两侧，其中两种材料基PMUT错位集成，不共用空腔，SOI晶圆包括基底200、氧化层210和顶硅薄膜层或硅膜层220。将构建PMUT的SOI中硅膜层220与电路保护层110直接键合。290为器件保护层。与图3相比，该方案不需要去除基底200和氧化层210，基 于压电材料270的PMUT是在较厚的基底200上构建，简化了制造流程。
如图5所示，两种压电材料基PMUT位于基底200的两侧，其中两种材料基PMUT错位集成，不共用空腔，其中PMUT包含支撑层221和222，压电层以及压电层两侧的空腔。支撑层可以位于任一侧电极的外侧，当然PMUT也可以不含有支撑层。将构建PMUT的基底200或者在其表面生成键合层210与电路保护层220直接键合。290为器件保护层。与图4所示结构相比，构建PMUT的基底可以选择较SOI便宜更多的普通衬底，降低了成本。
在PMUT晶圆与CMOS晶圆的键合中，PMUT晶圆衬底层可与CMOS晶圆的电路保护层直接键合(例如参见图5)，也可通过中间键合层材料(比如金属键合等，对应于接合材料层500)实现PMUT单元与CMOS单元的集成(例如参见图1)。
在图1-图5所示的实施例中，PMUT单元包括了设置在PMUT承载层两侧的两个PMUT，即第一PMUT和第二PMUT，第一PMUT的压电层240的压电系数高于第二PMUT的压电层270的压电系数，且第一PMUT的压电层240的介电常数低于第二PMUT的压电层270的介电常数。在进一步的实施例中，第一PMUT的压电层240为PZT或掺杂PZT，第二PMUT的压电层270为AlN或AlScN。
在图1-图5所示的实施例中，采用了PMUT-on-CMOS的结构，但是本发明不限于此。上述的PMUT单元也可以设置在其他的结构上，PMUT-on-CMOS是本发明的一个有利的实施例。
在图1-图5所示的实施例中，PMUT单元的第一PMUT用于发射超声波，第二PMUT用于接收超声波。
图6-图11为根据本发明的一个示例性实施例的示例性示出图1所示的微机械超声换能器结构的制造方法的截面示意图。更具体的，图6-图11是以在SOI晶圆上制作PMUT，并将其与CMOS晶圆集成为例，将具有高压电系数的PZT压电薄膜基PMUT和具有低介电常数的AlN压电薄膜基PMUT集成到CMOS晶圆的一种集成方案。其中高压电系数材料240或第一PMUT的压电层240选用PZT或掺杂PZT，低介电常数材料270或第二PMUT的压电层270选用AlN或AlScN，可以构建具有超高脉冲-回波灵敏度的PMUT-on-CMOS超声换能器。
先提供晶体管单元1000。图6是CMOS结构示意图，其中仅示出了一个晶体管，其中100为CMOS的衬底，即晶体管基底(可以是硅等)，110为电路保护层(可以是氧化硅、氮化硅等)。101为晶体管的源极和漏级，111为晶体管的栅 极，113A、113B、113和115是CMOS层内电连接层，112和114是CMOS层间电连接层。如图6所示，晶体管单元包括晶体管基底100以及在横向方向上间隔开布置的第一晶体管和第二晶体管。需要指出的是，图6所示结构为示例性的，对于本发明而言，CMOS单元1000可以包括CMOS晶体管和电路保护层110，还可以可选的包括第一电连接层113A、第二电连接层113B。
如图7所示，在SOI晶圆上制造PZT压电材料基PMUT，其中200是基底，210是氧化层，220是硅膜层，形成SOI晶圆。240是PZT压电薄膜层，230和250是压电薄膜层两侧的顶、底电极层。245是将PZT压电薄膜两侧的顶、底电极连接到硅层220的电连接通道或电连接层，其后面会与CMOS电路的电连接端互连。
如图8所示，先去除CMOS电路上将与PMUT电学互连部分对应的电路保护层材料(即如后图15所示的形成导电用孔400A和400B)，以露出CMOS电路上的电连接端；接着，将PZT基PMUT的压电薄膜一侧与CMOS电路一侧键合，图8中示例性展示的是通过金属键合的方式实现压电薄膜PZT基PMUT与CMOS电路的集成并实现电学互连。即接合材料层500同时也作为将PMUT与CMOS电路电连接的一部分。
然而，除此之外，也可选择其他键合方式，比如采用非导电材料键合层，或硅膜层220与电路保护层110直接键合(比如硅-硅键合、硅与氧化硅的直接键合等)。
采用金属键合时，键合层材料可以即实现键合功能，也实现PMUT与CMOS的电学互连，当采用非导电材料键合层材料或者硅膜层220与电路保护层110直接键合的方案时，需要严格限制键合层和电学互连层的高度，在完成键合的同时实现电学互连。
另外，PMUT实现有效的弯曲振动其在CMOS一侧存在空腔，当采用中间键合层材料将两片晶圆键合在一起时，中间键合层的存在可以提供空腔供PMUT振动单元实现有效振动，也可在CMOS晶圆的相应位置上刻蚀出空腔，或者联合使用，供PMUT振动单元有效振动。当通过硅膜层220与电路保护层110直接键合时，需要在CMOS电路上形成足够的空腔，供PMUT振动单元有效振动。
参见图9，在图8中键合步骤后，移除SOI晶圆的基底200和氧化层210，露出SOI晶圆的硅膜层220中未加工的一侧，在该侧进行第二种压电薄膜基PMUT 的加工制造。
参见图10，在裸露的硅膜层220的一侧构建另一种压电材料基的PMUT，例如AlN压电材料基PMUT，其中270为AlN基压电薄膜层，260和280分别为压电薄膜两侧的顶、底电极层。
图11A和图11B示例性示出了图1所示的微机械超声换能器结构中两侧的PMUT如何与CMOS形成电连接的示意图。图11A和图11B展示了将PMUT承载层上远离CMOS晶圆一侧的PMUT(即第二种压电材料基PMUT)与CMOS电路实现电学互连。支撑层220两侧的PMUT与CMOS电路实现电学互连的轨道线存在的位置不同。
如图11A所示，两侧PMUT分别通过A-A′和B-B′处与CMOS电路实现电学互连，当然，A-A′和B-B′线之间不必要垂直，只要不存在重叠即可。
图11B将压电薄膜270基PMUT的电极层260和280与CMOS电路实现电学互连。其中当制备出一种压电材料基PMUT，将PMUT晶圆与CMOS电路键合，并将压电薄膜240基PMUT的电极层230和250与CMOS电路互连时，也在第二种压电材料基PMUT与CMOS电路的电学互连处沉积电学互连材料，形成互联通道，即只需要将相应位置的支撑层220刻蚀即可露出电连接通道端。待电连接端露出，沉积支撑层220上侧的PMUT与CMOS的电连接层275。图11C是最终形成的PMUT-on-CMOS器件沿支撑层220面向CMOS电路一侧中，PMUT与CMOS形成电学互连的位置即图11A中沿A-A的截面示意图。最后如果需要，如图16所示，在整个器件表面沉积器件保护层290。
图12-16为根据本发明的一个示例性实施例的示例性示出图5所示的微机械超声换能器结构的制造方法的截面示意图。图12-图16以在SOI晶圆上制作PMUT，并将其与CMOS晶圆集成为例，将具有高压电系数的PZT压电薄膜基PMUT和具有低介电常数的AlN压电薄膜基PMUT集成到CMOS晶圆的一种集成方案，其中两种PMUT在横向方向上错位排布，不共用空腔。
图12在SOI晶圆上制造PZT压电材料基PMUT的结构示意图，其中200是基底，210是氧化层，220是硅膜层；240是PZT压电薄膜层，230和250是压电薄膜层两侧的顶、底电极层；245是将PZT压电薄膜两侧的顶、底电极连接到硅层220的电连接通道或电连接层，后续其会与CMOS电路的电连接端互连。
如图13所示，在CMOS的电路保护层刻蚀出压电薄膜PZT基PMUT振动所需 的空腔201，将图12所示结构与CMOS的电路保护层键合，即使得PZT基PMUT的压电薄膜一侧与CMOS电路一侧键合，且PZT基PMUT的振动部分处于该空腔201内。
如图14所示，在基底200上构建基于另一种压电材料270的PMUT，比如压电薄膜AlN基PMUT，其中260和280为压电薄膜两侧的电极，可以通过牺牲层等方案形成PMUT有效完全振动所需的空腔202。该PMUT可构建在一层支撑层222上，也可以不含有该支撑层。
如图15所示，在用于将PMUT电极与CMOS电路的电连接处，基于刻蚀工艺，形成导电用孔400A和400B，其贯穿PMUT的整体厚度到达电路保护层110内，直至露出电路保护层内的导电部分。对于每一个PMUT，刻蚀出导电用孔400A和导电用孔400B，以分别露出晶体管单元层内电连接层113A和晶体管单元层内电连接层113B。可选的，第一电连接层113A与CMOS晶体管的电极中的一个(例如源极)电连接，第二电连接层113B与CMOS晶体管的电极中的另外的一个电极(例如栅极)电连接。不过，在CMOS单元中存在其他的电连接结构的情况下，基于需要和要求，第一电连接层113A和/或第二电连接层113B也可以与之电连接，这也在本发明的保护范围之内。
如图16所示，例如以沉积工艺，设置PMUT和CMOS的电连接层275，实现PMUT和CMOS的电连接。
通过沉积的方法形成电连接层275以实现PMUT和CMOS的电连接，最后在PMUT表面覆盖器件保护层290。电连接层275可以选用各种各样的导电材料，例如是形成电极层的材料，另外连接PZT基PMUT与CMOS电路的导电通道或电连接层235所采用的材料与实现AlN基PMUT与CMOS电连接的导电通道或电连接层275可以是同种材料，也可以是不同种导电材料。如能理解的，明显的，电连接层235和275彼此电绝缘，电连接层235和275经由导电用孔分别与晶体管单元层内电连接层113A和层内电连接层113B形成电连接。
如能够理解的，在上述的方法中，如果通过设置接合材料层500实现PMUT单元与晶体管单元之间的接合，则PMUT单元、晶体管单元以及所述接合材料层共同限定空腔，接合材料层500可以用来限定所述空腔的横向边界。
此外，在上述的技术方案中，PMUT承载层的一侧与电路保护层110接合，从而：在后续的步骤中需要在PMUT承载层的另一侧制备PMUT时，PMUT承载层 可以保护CMOS单元1000，不用考虑制备PMUT时对CMOS单元1000的影响。这可以使得上述的微机械超声换能器结构对于压电材料的普适性强，既可以为氮化铝(AlN)，也可以为锆钛酸铅(PZT)、铌酸锂(LiNbO3)、钽酸锂(LiTaO3)、铌酸钾(KNbO3)等材料。
需要指出的是，本发明中的两者接合不仅包括所示的两者直接接合的情况，还可以包括在两者之间设置有其他接合用层或膜层的情况。
需要专门指出的是，在本发明的具体的实施例中，以PMUT基底与电路保护层接合为例作了示例性说明，但是，PMUT基底与CMOS单元1000的接合可以是限定CMOS单元的表面的电路保护层，也可以是限定CMOS单元的表面的其他层，均在本发明的保护范围之内。
如图1-图5所示的实施例中，CMOS单元1000还包括CMOS基底100，电路保护层110的一侧与PMUT承载层接合，电路保护层110的另一侧与CMOS基底100接合。可选的，在有些情况下，PMUT单元也可以与CMOS基底100接合，这也在本发明的保护范围之内。
还需要专门指出的是，在本发明中，以CMOS作为晶体管的一个示例，从而以CMOS单元作为晶体管单元的一个示例，但是本发明不限于此，晶体管还可以是BiMOS单元或BCD等，从而晶体管单元还可以是BiMOS单元或BCD单元等。
如图1所示，在晶圆级制造中，PMUT振动所需的空腔结构设置在PMUT晶圆侧，不需要在两者集成之前在CMOS晶圆上形成空腔201，从而CMOS晶圆与PMUT晶圆集成过程不存在因对准偏差引起的振动区域的变化，以及由此引起的超声换能器频率的变化，克服了现有技术中CMOS与PMUT的集成过程对空腔尺寸产生不利影响这样的技术问题。
例如，如图5和图15所示，在可选的实施例中，对于每一个PMUT，微机械超声换能器结构设置有第一导电用孔400A和第二导电孔400B，第一导电用孔400A贯穿PMUT基底200和/或支撑层210以及抵达电路保护层110内的第一电连接层113A，第二导电用孔400B贯穿PMUT基底200和/或支撑层210以及抵达电路保护层110内的第二电连接层113B，其中：第一导电层235经由第一导电用孔400A与第一电连接层113A电连接，第二导电层275经由第二导电用孔400B与第二电连接层113B电连接。
虽然没有示出，第一导电层235和第二导电层275可以在微机械超声换能 器结构的侧面分别与在侧面露出的第一电连接层113A和第二电连接层113B电连接，这也在本发明的保护范围之内。
在图1-图16中，示出了在PMUT承载板的两侧设置两个PMUT的结构，但是本发明不限于此。如图17所示，也可以在PMUT承载板的同一侧设置在横向方向上间隔开的上述两个PMUT。
另外，当PMUT设置在空腔内时，空腔对PMUT(尤其是压电层)起到与外界环境隔离的保护作用，能够提高PMUT的可靠性和长期稳定性，进而在上述的PMUT结构用在例如成像仪中时，可以提高最终成像系统的可靠性和长期稳定性。
图18为根据本发明的一个示例性实施例的PMUT结构阵列的示意图。如图18所示，上述的PMUT结构3000可以仅仅是阵列4000中的一个阵元。图18中，空心圆代表PMUT结构3000的PMUT振动区域，除了圆形之外，其可以是椭圆、多边形及其组合等任意需要的形状。黑实心圆代表PMUT单元与CMOS单元实现电连接，如图6所示的第一电连接层113A和第二电连接层113B处，其也可以是任意需要的形状。PMUT结构3000组合构成PMUT结构阵列4000。
每个PMUT单元可以通过与之匹配的CMOS电路单独控制，形成二维PMUT结构阵列4000。
也可以将多个PMUT结构3000连接在一起，比如同一列上的PMUT结构3000的电极互联，形成一维线阵列，此时CMOS单元的电路与PMUT单元的电连接点减少，一对CMOS单元与PMUT单元的电连接点对多个PMUT单元同时控制。
可以基于PMUT结构或者PMUT结构阵列，形成超声换能器，该超声换能器可以用在超声成像仪上，PMUT结构或者PMUT结构阵列也可以用在其他的电子设备上，例如超声测距仪、超声指纹传感器、用于工业领域的无损探伤仪等。
基于以上，本发明提出了如下技术方案：
1、一种微机械超声换能器结构，包括：
PMUT单元，包括PMUT承载层以及设置于PMUT承载层的第一PMUT和第二PMUT，每个PMUT包括第一电极层、第二电极层与压电层，
其中：
第一PMUT的压电层的压电系数高于第二PMUT的压电层的压电系数，且第一PMUT的压电层的介电常数低于第二PMUT的压电层的介电常数。
2、根据1所述的微机械超声换能器结构，其中：
第一PMUT和第二PMUT分别设置在PMUT承载层的两侧。
3、根据1所述的微机械超声换能器结构，其中：
第一PMUT的压电层为PZT或掺杂PZT，第二PMUT的压电层为AlN或AlScN；和/或
第一PMUT用于发射超声波，第二PMUT用于接收超声波。
4、根据1-3中任一项所述的微机械超声换能器结构，其中：
第一PMUT和第二PMUT在PMUT承载层的厚度方向上相对的设置在PMUT承载层的两侧，且第一PMUT和第二PMUT共用用于PMUT的空腔。
5、根据4所述的微机械超声换能器结构，其中：
PMUT承载层为PMUT支撑层；
所述微机械超声换能器结构还包括晶体管单元，包括晶体管基底、晶体管、覆盖晶体管的电路保护层，电路保护层面对PMUT单元；
电路保护层与PMUT支撑层接合，电路保护层面对PMUT单元的一侧设置有第一PMUT和第二PMUT共用的空腔，对应的PMUT的振动部分处于所述空腔内，或者电路保护层与PMUT支撑层之间经由金属键合层接合，金属键合层、电路保护层与所述PMUT支撑层之间设置有用于第一PMUT和第二PMUT共用的空腔。
6、根据5所述的微机械超声换能器结构，其中：
所述晶体管单元包括处于电路保护层内的多个电连接层；
所述微机械超声换能器结构还包括多个导电通路，所述导电通路将第一PMUT和第二PMUT的电极层与对应的电连接层电连接。
7、根据6所述的微机械超声换能器结构，其中：
所述金属键合层构成对应的导电通路的一部分。
8、根据1-3中任一项所述的微机械超声换能器结构，其中：
第一PMUT和第二PMUT在横向方向上彼此分隔开的设置在PMUT承载层的两侧，且微机械超声换能器结构设置有分别用于第一PMUT和第二PMUT的空腔。
9、根据8所述的微机械超声换能器结构，还包括：
晶体管单元，包括晶体管基底、晶体管、覆盖晶体管的电路保护层，电路保护层面对PMUT单元，电路保护层与PMUT单元接合。
10、根据9所述的微机械超声换能器结构，其中：
PMUT承载层为PMUT支撑层，第一PMUT和第二PMUT设置在PMUT支撑层的 两侧；
电路保护层与PMUT支撑层直接接合或者电路保护层与PMUT支撑层之间以键合层接合，电路保护层面对PMUT单元的一侧分别设置有用于第一PMUT和第二PMUT的空腔，对应的PMUT的振动部分处于所述空腔内；或者电路保护层与PMUT支撑层之间以金属键合层接合，金属键合层限定用于第一PMUT和第二PMUT的空腔的横向边界的至少一部分，电路保护层与所述PMUT支撑层之间设置有用于第一PMUT和第二PMUT的空腔。
11、根据9所述的微机械超声换能器结构，其中：
PMUT承载层包括衬底层，第一PMUT和第二PMUT中的一个PMUT设置在衬底层的一侧，第一PMUT和第二PMUT中的另一个PMUT设置在衬底层的另一侧，衬底层在对应于所述一个PMUT的位置被减薄或移除以便于所述一个PMUT的振动部分的振动，用于所述另一个PMUT的空腔设置在衬底层中；
电路保护层与衬底层接合，电路保护层面对PMUT单元的一侧设置有用于所述一个PMUT的空腔。
12、根据11所述的微机械超声换能器结构，其中：
所述微机械超声换能器结构还包括：用于所述一个PMUT的PMUT支撑层，和/或用于所述另一个PMUT的PMUT支撑层。
13、根据9所述的微机械超声换能器结构，其中：
PMUT承载层包括SOI结构，所述SOI结构包括衬底层、氧化层和硅膜层，第一PMUT和第二PMUT中的一个PMUT设置在硅膜层一侧，且第一PMUT和第二PMUT中的另一个PMUT设置在衬底层一侧，用于所述另一个PMUT的空腔设置在衬底层中，衬底层在对应于所述一个PMUT的位置被减薄或移除以便于所述一个PMUT的振动部分振动；
电路保护层与硅膜层直接接合，电路保护层面对PMUT单元的一侧设置有用于所述一个PMUT的空腔。
14、根据9-13中任一项所述的微机械超声换能器结构，其中：
所述晶体管单元包括处于电路保护层内的多个电连接层；
所述微机械超声换能器结构还包括多个导电通路，所述多个导电通路将第一PMUT和第二PMUT的电极层与对应的电连接层电连接。
15、根据14所述的微机械超声换能器结构，其中：
所述金属键合层构成对应的导电通路的一部分。
16、根据5或9所述的微机械超声换能器结构，其中：
所述晶体管单元包括CMOS单元、BiMOS单元、BCD单元中的一种。
17、根据1所述的微机械超声换能器结构，其中：
PMUT承载层材料为与第一电极层或第二电极层的材料相同或者不同的金属；或者PMUT承载层材料为绝缘材料或半导体材料，如硅、二氧化硅、氮化硅、氮化铝等。
18、根据17所述的微机械超声换能器结构，其中：
PMUT承载层材料为硅、二氧化硅、氮化硅或者氮化铝。
19、根据1所述的微机械超声换能器结构，其中：
第一PMUT的压电层的压电系数绝对值大于1C/m2；和/或
第二PMUT的压电层的介电常数小于1200。
20、根据19所述的微机械超声换能器结构，其中：
第一PMUT的压电层的压电系数绝对值大于5C/m2；和/或
第二PMUT的压电层的介电常数小于100。
21、一种微机械超声换能器结构的制造方法，包括步骤：
提供晶体管单元，晶体管单元包括晶体管基底、晶体管、覆盖晶体管的电路保护层；以及
提供与晶体管单元的电路保护层接合的PMUT单元，PMUT单元包括PMUT承载层、第一PMUT和第二PMUT，每个PMUT包括第一电极层、第二电极层与压电层，
其中：
第一PMUT的压电层的压电系数高于第二PMUT的压电层的压电系数，且第一PMUT的压电层的介电常数低于第二PMUT的压电层的介电常数。
22、根据21所述的方法，其中：
第一PMUT和第二PMUT分别设置在PMUT承载层的两侧。
23、根据22所述的方法，其中：
提供与晶体管单元的电路保护层接合的PMUT单元包括步骤：在PMUT支撑层的一侧形成第一PMUT和第二PMUT中的一个PMUT，将PMUT承载层的所述一侧与电路保护层接合，以及在PMUT承载层的另一侧形成第一PMUT和第二PMUT中 的另一个PMUT；或者
提供与晶体管单元的电路保护层接合的PMUT单元包括步骤：在PMUT支撑层的一侧形成第一PMUT和第二PMUT中的一个PMUT，在PMUT承载层的另一侧形成第一PMUT和第二PMUT中的另一个PMUT，以及将PMUT承载层的所述一侧与电路保护层接合。
24、根据23所述的方法，其中：
使得第一PMUT和第二PMUT在PMUT支撑层的厚度方向上至少部分相对。
25、根据24所述的方法，其中：
PMUT承载层为PMUT支撑层；
电路保护层的面对PMUT单元的一侧设置有第一PMUT和第二PMUT共用的空腔，将PMUT支撑层的所述一侧与电路保护层直接接合；或者电路保护层与PMUT支撑层之间以金属键合层接合，金属键合层、电路保护层与所述PMUT支撑层之间设置有用于第一PMUT和第二PMUT共用的空腔。
26、根据23所述的方法，其中：
在PMUT承载层的另一侧形成另一个PMUT的步骤中，使得所述另一个PMUT和所述一个PMUT在横向方向上彼此分隔开的设置在PMUT承载层的两侧。
27、根据26所述的方法，其中：
PMUT承载层为PMUT支撑层，在电路保护层的面对PMUT单元的一侧分别设置有用于第一PMUT和第二PMUT的空腔；
将PMUT承载层的所述一侧与电路保护层接合的步骤中，使得所述一个PMUT的振动部分处于用于所述一个PMUT的空腔内；
在PMUT承载层的另一侧形成所述另一个PMUT的步骤中，使得所述另一个PMUT的振动部分与用于所述另一个PMUT的空腔的位置对应。
28、根据26所述的方法，其中：
PMUT承载层包括衬底层，在电路保护层的面对PMUT单元的一侧设置有用于所述一个PMUT的空腔；
将PMUT承载层的所述一侧与电路保护层接合的步骤中，使得电路保护层与衬底层接合，且所述一个PMUT的振动部分处于用于所述一个PMUT的空腔内；
在PMUT承载层的另一侧形成所述另一个PMUT的步骤包括：在衬底层上设置用于所述另一个PMUT的空腔，且使得所述另一个PMUT的振动部分与用于所 述另一个PMUT的空腔的位置对应；
所述方法还包括步骤：在对应于所述一个PMUT的位置将衬底层减薄或移除以便于所述一个PMUT的振动部分振动。
29、根据26所述的方法，其中：
PMUT承载层包括SOI结构，所述SOI结构包括衬底层、氧化层和硅膜层，在电路保护层的面对PMUT单元的一侧设置有用于所述一个PMUT的空腔；
将PMUT承载层的所述一侧与电路保护层接合的步骤中，使得电路保护层与硅膜层直接接合，且所述一个PMUT的振动部分处于用于所述一个PMUT的空腔内；
在PMUT承载层的另一侧形成所述另一个PMUT的步骤包括：在衬底层上设置用于所述另一个PMUT的空腔，且使得所述另一个PMUT的振动部分与用于所述另一个PMUT的空腔的位置对应；
所述方法还包括步骤：在对应于所述一个PMUT的位置将衬底层减薄或移除以便于所述一个PMUT的振动部分振动。
30、根据21所述的方法，其中：
第一PMUT的压电层为PZT或掺杂PZT，第二PMUT的压电层为AlN或AlScN；和/或
第一PMUT用于发射超声波，第二PMUT用于接收超声波。
31、根据23-30中任一项所述的方法，其中：
所述晶体管单元包括处于电路保护层内的多个电连接层；
所述方法还包括步骤：设置多个导电通路，所述导电通路将第一PMUT和第二PMUT的电极层与对应的电连接层电连接。
32、根据23-30中任一项所述的方法，其中：
提供晶体管单元包括提供晶体管晶圆，基于MEMS工艺，所述晶体管晶圆形成有多个所述晶体管单元；
提供与晶体管单元的电路保护层接合的PMUT单元包括：提供PMUT晶圆，基于MEMS工艺，所述PMUT晶圆形成有多个所述PMUT单元；
所述方法还包括步骤：执行切割以形成包括单个PMUT单元与单个晶体管单元的微机械超声换能器结构。
33、根据21所述的方法，其中：
第一PMUT的压电层的压电系数绝对值大于1C/m2；和/或
第二PMUT的压电层的介电常数小于1200。
34、根据33所述的方法，其中：
第一PMUT的压电层的压电系数绝对值大于5C/m2；和/或
第二PMUT的压电层的介电常数小于100。
35、一种电子设备，包括根据1-20中任一项所述的微机械超声换能器结构，或者根据21-34中任一项所述的制造方法制造的微机械超声换能器结构。
36、根据35所述的电子设备，其中：
所述电子设备包括如下中的至少一种：超声成像仪、超声测距仪、超声指纹传感器、无损探伤仪、流量计、力觉反馈设备、烟雾报警器。
尽管已经示出和描述了本发明的实施例，对于本领域的普通技术人员而言，可以理解在不脱离本发明的原理和精神的情况下可以对这些实施例进行变化，本发明的范围由所附权利要求及其等同物限定。

Claims (36)

  1. 一种微机械超声换能器结构，包括：
    PMUT单元，包括PMUT承载层以及设置于PMUT承载层的第一PMUT和第二PMUT，每个PMUT包括第一电极层、第二电极层与压电层，
    其中：
    第一PMUT的压电层的压电系数高于第二PMUT的压电层的压电系数，且第一PMUT的压电层的介电常数低于第二PMUT的压电层的介电常数。
  2. 根据权利要求1所述的微机械超声换能器结构，其中：
    第一PMUT和第二PMUT分别设置在PMUT承载层的两侧。
  3. 根据权利要求1所述的微机械超声换能器结构，其中：
    第一PMUT的压电层为PZT或掺杂PZT，第二PMUT的压电层为AlN或AlScN；和/或
    第一PMUT用于发射超声波，第二PMUT用于接收超声波。
  4. 根据权利要求1-3中任一项所述的微机械超声换能器结构，其中：
    第一PMUT和第二PMUT在PMUT承载层的厚度方向上相对的设置在PMUT承载层的两侧，且第一PMUT和第二PMUT共用用于PMUT的空腔。
  5. 根据权利要求4所述的微机械超声换能器结构，其中：
    PMUT承载层为PMUT支撑层；
    所述微机械超声换能器结构还包括晶体管单元，包括晶体管基底、晶体管、覆盖晶体管的电路保护层，电路保护层面对PMUT单元；
    电路保护层与PMUT支撑层接合，电路保护层面对PMUT单元的一侧设置有第一PMUT和第二PMUT共用的空腔，对应的PMUT的振动部分处于所述空腔内，或者电路保护层与PMUT支撑层之间经由金属键合层接合，金属键合层、电路保护层与所述PMUT支撑层之间设置有用于第一PMUT和第二PMUT共用的空腔。
  6. 根据权利要求5所述的微机械超声换能器结构，其中：
    所述晶体管单元包括处于电路保护层内的多个电连接层；
    所述微机械超声换能器结构还包括多个导电通路，所述导电通路将第 一PMUT和第二PMUT的电极层与对应的电连接层电连接。
  7. 根据权利要求6所述的微机械超声换能器结构，其中：
    所述金属键合层构成对应的导电通路的一部分。
  8. 根据权利要求1-3中任一项所述的微机械超声换能器结构，其中：
    第一PMUT和第二PMUT在横向方向上彼此分隔开的设置在PMUT承载层的两侧，且微机械超声换能器结构设置有分别用于第一PMUT和第二PMUT的空腔。
  9. 根据权利要求8所述的微机械超声换能器结构，还包括：
    晶体管单元，包括晶体管基底、晶体管、覆盖晶体管的电路保护层，电路保护层面对PMUT单元，电路保护层与PMUT单元接合。
  10. 根据权利要求9所述的微机械超声换能器结构，其中：
    PMUT承载层为PMUT支撑层，第一PMUT和第二PMUT设置在PMUT支撑层的两侧；
    电路保护层与PMUT支撑层直接接合或者电路保护层与PMUT支撑层之间以键合层接合，电路保护层面对PMUT单元的一侧分别设置有用于第一PMUT和第二PMUT的空腔，对应的PMUT的振动部分处于所述空腔内；或者电路保护层与PMUT支撑层之间以金属键合层接合，金属键合层限定用于第一PMUT和第二PMUT的空腔的横向边界的至少一部分，电路保护层与所述PMUT支撑层之间设置有用于第一PMUT和第二PMUT的空腔。
  11. 根据权利要求9所述的微机械超声换能器结构，其中：
    PMUT承载层包括衬底层，第一PMUT和第二PMUT中的一个PMUT设置在衬底层的一侧，第一PMUT和第二PMUT中的另一个PMUT设置在衬底层的另一侧，衬底层在对应于所述一个PMUT的位置被减薄或移除以便于所述一个PMUT的振动部分的振动，用于所述另一个PMUT的空腔设置在衬底层中；
    电路保护层与衬底层接合，电路保护层面对PMUT单元的一侧设置有用于所述一个PMUT的空腔。
  12. 根据权利要求11所述的微机械超声换能器结构，其中：
    所述微机械超声换能器结构还包括：用于所述一个PMUT的PMUT支撑层，和/或用于所述另一个PMUT的PMUT支撑层。
  13. 根据权利要求9所述的微机械超声换能器结构，其中：
    PMUT承载层包括SOI结构，所述SOI结构包括衬底层、氧化层和硅膜层，第一PMUT和第二PMUT中的一个PMUT设置在硅膜层一侧，且第一PMUT和第二PMUT中的另一个PMUT设置在衬底层一侧，用于所述另一个PMUT的空腔设置在衬底层中，衬底层在对应于所述一个PMUT的位置被减薄或移除以便于所述一个PMUT的振动部分振动；
    电路保护层与硅膜层直接接合，电路保护层面对PMUT单元的一侧设置有用于所述一个PMUT的空腔。
  14. 根据权利要求9-13中任一项所述的微机械超声换能器结构，其中：
    所述晶体管单元包括处于电路保护层内的多个电连接层；
    所述微机械超声换能器结构还包括多个导电通路，所述多个导电通路将第一PMUT和第二PMUT的电极层与对应的电连接层电连接。
  15. 根据权利要求14所述的微机械超声换能器结构，其中：
    所述金属键合层构成对应的导电通路的一部分。
  16. 根据权利要求5或9所述的微机械超声换能器结构，其中：
    所述晶体管单元包括CMOS单元、BiMOS单元、BCD单元中的一种。
  17. 根据权利要求1所述的微机械超声换能器结构，其中：
    PMUT承载层材料为与第一电极层或第二电极层的材料相同或者不同的金属；或者PMUT承载层材料为绝缘材料或半导体材料，如硅、二氧化硅、氮化硅、氮化铝等。
  18. 根据权利要求17所述的微机械超声换能器结构，其中：
    PMUT承载层材料为硅、二氧化硅、氮化硅或者氮化铝。
  19. 根据权利要求1所述的微机械超声换能器结构，其中：
    第一PMUT的压电层的压电系数绝对值大于1C/m2；和/或
    第二PMUT的压电层的介电常数小于1200。
  20. 根据权利要求19所述的微机械超声换能器结构，其中：
    第一PMUT的压电层的压电系数绝对值大于5C/m2；和/或
    第二PMUT的压电层的介电常数小于100。
  21. 一种微机械超声换能器结构的制造方法，包括步骤：
    提供晶体管单元，晶体管单元包括晶体管基底、晶体管、覆盖晶体管的电路保护层；以及
    提供与晶体管单元的电路保护层接合的PMUT单元，PMUT单元包括PMUT承载层、第一PMUT和第二PMUT，每个PMUT包括第一电极层、第二电极层与压电层，
    其中：
    第一PMUT的压电层的压电系数高于第二PMUT的压电层的压电系数，且第一PMUT的压电层的介电常数低于第二PMUT的压电层的介电常数。
  22. 根据权利要求21所述的方法，其中：
    第一PMUT和第二PMUT分别设置在PMUT承载层的两侧。
  23. 根据权利要求22所述的方法，其中：
    提供与晶体管单元的电路保护层接合的PMUT单元包括步骤：在PMUT支撑层的一侧形成第一PMUT和第二PMUT中的一个PMUT，将PMUT承载层的所述一侧与电路保护层接合，以及在PMUT承载层的另一侧形成第一PMUT和第二PMUT中的另一个PMUT；或者
    提供与晶体管单元的电路保护层接合的PMUT单元包括步骤：在PMUT支撑层的一侧形成第一PMUT和第二PMUT中的一个PMUT，在PMUT承载层的另一侧形成第一PMUT和第二PMUT中的另一个PMUT，以及将PMUT承载层的所述一侧与电路保护层接合。
  24. 根据权利要求23所述的方法，其中：
    使得第一PMUT和第二PMUT在PMUT支撑层的厚度方向上至少部分相对。
  25. 根据权利要求24所述的方法，其中：
    PMUT承载层为PMUT支撑层；
    电路保护层的面对PMUT单元的一侧设置有第一PMUT和第二PMUT共用的空腔，将PMUT支撑层的所述一侧与电路保护层直接接合；或者电路保护层与PMUT支撑层之间以金属键合层接合，金属键合层、电路保护层与所述PMUT支撑层之间设置有用于第一PMUT和第二PMUT共用的空腔。
  26. 根据权利要求23所述的方法，其中：
    在PMUT承载层的另一侧形成另一个PMUT的步骤中，使得所述另一个 PMUT和所述一个PMUT在横向方向上彼此分隔开的设置在PMUT承载层的两侧。
  27. 根据权利要求26所述的方法，其中：
    PMUT承载层为PMUT支撑层，在电路保护层的面对PMUT单元的一侧分别设置有用于第一PMUT和第二PMUT的空腔；
    将PMUT承载层的所述一侧与电路保护层接合的步骤中，使得所述一个PMUT的振动部分处于用于所述一个PMUT的空腔内；
    在PMUT承载层的另一侧形成所述另一个PMUT的步骤中，使得所述另一个PMUT的振动部分与用于所述另一个PMUT的空腔的位置对应。
  28. 根据权利要求26所述的方法，其中：
    PMUT承载层包括衬底层，在电路保护层的面对PMUT单元的一侧设置有用于所述一个PMUT的空腔；
    将PMUT承载层的所述一侧与电路保护层接合的步骤中，使得电路保护层与衬底层接合，且所述一个PMUT的振动部分处于用于所述一个PMUT的空腔内；
    在PMUT承载层的另一侧形成所述另一个PMUT的步骤包括：在衬底层上设置用于所述另一个PMUT的空腔，且使得所述另一个PMUT的振动部分与用于所述另一个PMUT的空腔的位置对应；
    所述方法还包括步骤：在对应于所述一个PMUT的位置将衬底层减薄或移除以便于所述一个PMUT的振动部分振动。
  29. 根据权利要求26所述的方法，其中：
    PMUT承载层包括SOI结构，所述SOI结构包括衬底层、氧化层和硅膜层，在电路保护层的面对PMUT单元的一侧设置有用于所述一个PMUT的空腔；
    将PMUT承载层的所述一侧与电路保护层接合的步骤中，使得电路保护层与硅膜层直接接合，且所述一个PMUT的振动部分处于用于所述一个PMUT的空腔内；
    在PMUT承载层的另一侧形成所述另一个PMUT的步骤包括：在衬底层上设置用于所述另一个PMUT的空腔，且使得所述另一个PMUT的振动部分与用于所述另一个PMUT的空腔的位置对应；
    所述方法还包括步骤：在对应于所述一个PMUT的位置将衬底层减薄或移除以便于所述一个PMUT的振动部分振动。
  30. 根据权利要求21所述的方法，其中：
    第一PMUT的压电层为PZT或掺杂PZT，第二PMUT的压电层为AlN或AlScN；和/或
    第一PMUT用于发射超声波，第二PMUT用于接收超声波。
  31. 根据权利要求23-30中任一项所述的方法，其中：
    所述晶体管单元包括处于电路保护层内的多个电连接层；
    所述方法还包括步骤：设置多个导电通路，所述导电通路将第一PMUT和第二PMUT的电极层与对应的电连接层电连接。
  32. 根据权利要求23-30中任一项所述的方法，其中：
    提供晶体管单元包括提供晶体管晶圆，基于MEMS工艺，所述晶体管晶圆形成有多个所述晶体管单元；
    提供与晶体管单元的电路保护层接合的PMUT单元包括：提供PMUT晶圆，基于MEMS工艺，所述PMUT晶圆形成有多个所述PMUT单元；
    所述方法还包括步骤：执行切割以形成包括单个PMUT单元与单个晶体管单元的微机械超声换能器结构。
  33. 根据权利要求21所述的方法，其中：
    第一PMUT的压电层的压电系数绝对值大于1C/m2；和/或
    第二PMUT的压电层的介电常数小于1200。
  34. 根据权利要求33所述的方法，其中：
    第一PMUT的压电层的压电系数绝对值大于5C/m2；和/或
    第二PMUT的压电层的介电常数小于100。
  35. 一种电子设备，包括根据权利要求1-20中任一项所述的微机械超声换能器结构，或者根据权利要求21-34中任一项所述的制造方法制造的微机械超声换能器结构。
  36. 根据权利要求35所述的电子设备，其中：
    所述电子设备包括如下中的至少一种：超声成像仪、超声测距仪、超声指纹传感器、无损探伤仪、流量计、力觉反馈设备、烟雾报警器。
PCT/CN2023/110645 2022-08-05 2023-08-02 承载层设置有双pmut的微机械超声换能器结构及其制造方法 WO2024027731A1 (zh)

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CN110575946A (zh) * 2019-09-26 2019-12-17 索夫纳特私人有限公司 一种压电微机械超声换能器
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CN110575946A (zh) * 2019-09-26 2019-12-17 索夫纳特私人有限公司 一种压电微机械超声换能器
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