WO2024021657A1

WO2024021657A1 - Storage control method and apparatus, device, storage medium, chip, and memory

Info

Publication number: WO2024021657A1
Application number: PCT/CN2023/084426
Authority: WO
Inventors: 刘卓睿
Original assignee: 哲库科技(上海)有限公司
Priority date: 2022-07-25
Filing date: 2023-03-28
Publication date: 2024-02-01
Also published as: CN117492553A

Abstract

A storage control method and apparatus, a device, a storage medium, a chip, and a memory, relating to the technical field of storage. The method comprises: on the basis of a memory switching from a first working mode to a second working mode, controlling a second memory element group of the memory to switch from a power-off state to a power-on state, wherein the memory comprising a first memory element group, configured to store a first type of data, and the second memory element group, configured to store a second type of data (510). The present application can implement on-demand use of memory element groups, and by means of an on-demand distribution and control means, power consumption of the memory can be reduced and a better energy-saving effect can be achieved.

Description

Storage control method, device, equipment, storage medium, chip and memory

This application claims priority to the Chinese patent application with application number 202210875910.9 and the invention name "storage control method, device, equipment, storage medium, chip and memory" submitted on July 25, 2022, the entire content of which is incorporated by reference. in this application.

Technical field

The embodiments of the present application relate to the field of storage technology, and in particular to a storage control method, device, equipment, storage medium, chip and memory.

Background technique

Memory is an essential electronic component in terminal equipment.

In related art, a memory includes multiple storage elements. When the memory needs to work, all the storage elements included in the memory can be set to the powered-on state; when the memory does not need to work, all the storage elements included in the memory can be set to the powered-off state to save power consumption.

However, the above method can no longer meet the power saving needs in some scenarios.

Contents of the invention

Embodiments of the present application provide a storage control method, device, equipment, storage medium, chip and memory. The technical solutions are as follows:

According to one aspect of the embodiment of the present application, a storage control method is provided, and the method includes:

Based on the memory switching from the first operating mode to the second operating mode, control the second storage element group of the memory to switch from the power-off state to the power-on state;

Wherein, the memory includes a first storage element group configured to store a first type of data and a second storage element group configured to store a second type of data.

According to one aspect of the embodiment of the present application, a storage control device is provided, and the device is configured to:

According to an aspect of an embodiment of the present application, a terminal device is provided. The terminal device includes a processor and a memory. A computer program is stored in the memory. The processor executes the computer program to implement the above storage control method. .

According to one aspect of an embodiment of the present application, a computer-readable storage medium is provided, and a computer program is stored in the storage medium, and the computer program is used to be executed by a processor to implement the above storage control method.

According to one aspect of the embodiment of the present application, a chip is provided, and the chip includes the above-mentioned storage control device.

According to one aspect of the embodiment of the present application, a memory is provided, and the memory includes:

A first storage element group used to store first type data;

A second storage element group is used to store second type data, wherein the second storage element group is configured to switch from a power-down state to a power-on state based on the memory switching from the first operating mode to the second operating mode.

According to an aspect of an embodiment of the present application, a computer program product is provided. The computer program product includes computer instructions. The computer instructions are stored in a computer-readable storage medium. A processor reads the computer-readable storage medium from the computer-readable storage medium. Fetch and execute the computer instructions to implement the above storage control method.

The technical solutions provided by the embodiments of this application can bring the following technical effects:

By dividing the memory into multiple storage element groups (for example, including at least a first storage element group and a second storage element group), different storage element groups are used to store different types of data, thereby enabling on-demand use of the storage element groups. , for example, when there is no data corresponding to a certain storage element group that needs to be stored, the storage element group can be controlled to be in a power-off state. When there is data corresponding to the storage element group that needs to be stored, the storage element group can be controlled to power off. The power state is switched to the power-on state. This on-demand allocation and control method can save the power consumption of the memory and achieve better energy-saving effects.

Description of drawings

Figure 1 is a schematic structural diagram of a system-on-chip including a memory provided by an embodiment of the present application;

Figure 2 is a schematic structural diagram of a memory provided by an embodiment of the present application;

Figure 3 is a schematic diagram of storage element group division provided by an embodiment of the present application;

Figure 4 is a schematic diagram of storage element group division provided by another embodiment of the present application;

Figure 5 is a flow chart of a storage control method provided by an embodiment of the present application;

Figure 6 is a schematic diagram of the division and use of storage element groups provided by an embodiment of the present application;

Figure 7 is a schematic diagram of application type conversion provided by an embodiment of the present application;

Figure 8 is a flow chart of a storage control method provided by another embodiment of the present application;

Figure 9 is a block diagram of a storage control device provided by an embodiment of the present application;

Figure 10 is a schematic diagram of a terminal device provided by an embodiment of the present application.

Detailed ways

In order to make the purpose, technical solutions and advantages of the present application clearer, the embodiments of the present application will be further described in detail below with reference to the accompanying drawings.

Figure 1 is a schematic structural diagram of a system on chip (SoC) including a memory provided by an exemplary embodiment of the present application. The system-on-chip in this application can be used in mobile terminals, such as smartphones, smart watches, e-book readers, tablet computers, laptop computers, desktop computers, televisions, game consoles, and augmented reality (Augmented Reality, AR) terminals. Taking at least one of a virtual reality (Virtual Reality, VR) terminal, a mixed reality (MR) terminal, a wearable device, etc. as an example for explanation. The system-on-chip 100 in this embodiment includes: a main device 101, a main bus 103, a memory controller 105 and a memory 200.

The main device 101 is connected to the storage controller 105 through the main bus 103 (Primary Bus), and the storage controller 105 is connected to the memory 200 through a physical layer (Physical Layer, PHY) interface. In some embodiments, the memory 200 is a dynamic random access memory (Dynamic Random Access Memory, DRAM). Optionally, the DRAM adopts Packaging on Packaging (PoP) packaging.

The master device 101 is a processor or non-processor with data reading and writing requirements. The main device may include, but is not limited to, a central processing unit (CPU), a graphics processor (Graphics Processing Unit, GPU), a neural network processor (Neural-network Processing Unit, NPU), a digital signal processor (Digital Signal) Processors such as Processor (DSP), and non-processors such as Image Sensor (Image Sensor), Image Signal Processing Unit (ISP), and Video Processing Unit (VPU). The above-mentioned main devices all have memory data reading and/or writing requirements during operation. In Figure 1, processors include CPU, GPU and NPU, and non-processors An image sensor and a VPU are taken as examples for schematic explanation, but this does not constitute a limitation.

Among them, the processor uses various interfaces and lines to connect various parts of the entire terminal device, and executes the terminal device by running or executing instructions, programs, code sets or instruction sets stored in the memory, and calling data stored in the memory. various functions and process data.

In some embodiments, the processor may adopt at least one of digital signal processing (Digital Signal Processing, DSP), field-programmable gate array (Field-Programmable Gate Array, FPGA), and programmable logic array (Programmable Logic Array, PLA). A form of hardware implementation.

The processor can integrate one or a combination of CPU, GPU, NPU and baseband chip. Among them, the CPU mainly handles the operating system, user interface and applications; the GPU is responsible for the rendering and drawing of the content that needs to be displayed on the display; the NPU is used to implement AI (Artificial Intelligence, artificial intelligence) functions; the baseband chip is used for processing Wireless communication.

In some embodiments, m links using the AXI (Advanced eXtensible Interface, Advanced Extension Interface) protocol are established between the main device 101 and the main bus 103, and between the main bus 103 and the storage controller 105. As shown in FIG. 1 , four AXI links with a width of 256 bits are established between each master device 101 and the main bus 103, and between the main bus 103 and the memory controller 105.

In some embodiments, the storage controller 105 includes a secondary bus, k controllers (corresponding to k memory channels), and physical layer interfaces corresponding to each controller, where k is a positive integer.

In some embodiments, a link using the AXI protocol is established between the slave bus and the controller, and the branching function is implemented at the slave bus. For example, after the slave bus is branched (k branches are n branches, n is a positive integer), 8 AXI links with a bit width of 128 bits are established between the slave bus and the controller. Correspondingly, eight AXI links with a bit width of 128 bits are established between the memory controller 105 and the memory 200 .

The memory 200 is a memory that supports n (n>k) memory channels, and the n storage elements in the memory 200 each have a working bus, that is, the working bus of each storage element is connected to the storage controller 105 in a concurrent manner.

Figure 1 takes a system on a chip that integrates a memory (that is, the memory is arranged inside the system on a chip) as an example. In other possible designs, the memory can be arranged outside the system on a chip. This is not limited in the embodiments of the present application.

Figure 2 is a schematic structural diagram of a memory provided by an exemplary embodiment of the present application.

The memory 200 includes n storage elements 201, where n is an integer greater than 1. In some embodiments, the memory 200 is a DRAM, and the storage element 201 is a memory die. Optionally, the DRAM is packaged in TOP. The embodiment of the present application does not limit the specific types of the memory 200 and the storage element 201.

In some embodiments, the internal particles of the storage element 201 may be arranged in a 2D (Two Dimensional, two-dimensional) manner or a 3D (Three Dimensional, three-dimensional) manner. Among them, the 3D arrangement can adopt simple stack (Simple Stack), vertical channel (Vertical Channel, VC) or vertical gate (Vertical Grid, VG) and other methods.

In some embodiments, the element parameters (such as capacity) of each storage element 201 are the same. For example, each storage element 201 has a specification of 16Gb×16 data width (Datawidth). In other embodiments, some storage elements have the same component parameters, some storage components have different component parameters, or different storage components have different component parameters. The embodiments of this application do not limit the specific component parameters of each storage component.

n storage elements 201 are packaged into a storage particle, such as a DRAM device using POP packaging. In some possible designs, the n storage elements 201 adopt 2D packaging or 3D packaging. The embodiments of this application do not limit the specific packaging method.

The memory 200 in the embodiment of the present application supports n memory channels, so the number of storage elements 201 in the memory 200 is equal to n, and different storage elements 201 correspond to respective memory channels, that is, n storage elements correspond to n memory channels. . For example, for a memory that supports 8 memory channels, 8 storage elements are provided in the memory; for a memory that supports 6 memory channels, 6 storage elements are provided with the memory. The embodiments of the present application do not limit the specific number of storage elements (a positive integer is sufficient, and it can be an even number or an odd number).

In some embodiments, the memory 200 includes: m storage element groups, each storage element group includes at least one storage element 201, and m is an integer greater than 1. That is to say, the n storage elements 201 included in the memory 200 are divided into m storage element groups. One storage element group may have one and only one storage element 201, or may include multiple (two or more) storage elements 201. Storage element 201.

In some embodiments, for the above m storage element groups, the number of storage elements 201 included in each storage element group is the same.

For example, as shown in Figure 3, the memory 200 includes 8 storage elements 201, which are divided into 2 storage element groups, denoted as a first storage element group and a second storage element group, each A storage element group includes four storage elements 201. In FIG. 3 , the first storage element group includes storage elements 201 corresponding to memory channels A, B, C and D respectively, and the second storage element group includes storage elements 201 corresponding to memory channels E, F, G and H respectively.

For another example, the memory 200 includes 8 storage elements 201, and the 8 storage elements 201 are divided into 4 storage element groups, and each storage element group includes 2 storage elements 201. Alternatively, each storage element group includes one storage element 201, and the memory 200 includes 8 storage elements 201, and the 8 storage elements 201 are divided into 8 storage element groups. In the embodiment of the present application, when the number of storage elements 201 included in each storage element group is the same, there is no limit to the number of storage elements 201 included in each storage element group, which can be flexibly set according to actual needs. .

In some embodiments, for the above-mentioned m storage element groups, there are at least two storage element groups that contain different numbers of storage elements 201 .

For example, as shown in Figure 4, the memory 200 includes 6 storage elements 201. The 6 storage elements 201 are divided into 2 storage element groups, denoted as a first storage element group and a second storage element group. The first The storage element group includes 2 storage elements 201, and the second storage element group includes 4 storage elements 201. In FIG. 4 , the first storage element group includes storage elements 201 corresponding to memory channels A and B respectively, and the second storage element group includes storage elements 201 corresponding to memory channels C, D, E and F respectively.

For another example, the memory 200 includes 8 storage elements 201, and the 8 storage elements 201 are divided into 3 storage element groups, denoted as the first storage element group, the second storage element group and the third storage element group; wherein, the One storage element group includes two storage elements 201 , a second storage element group includes two storage elements 201 , and a third storage element group includes four storage elements 201 . In the embodiment of the present application, in the case where the number of storage elements 201 included in at least two storage element groups is different, the number of storage elements 201 included in each storage element group is not limited, and this can be done in accordance with actual needs. Flexible settings.

Of course, the above embodiments are only examples of how to divide several storage element groups. This application specifies the number of storage element groups included in the memory 200 and the number of storage elements 201 included in each storage element group. There is no limit, this can be designed and divided according to actual needs.

Figure 5 is a flow chart of a storage control method provided by an embodiment of the present application. The method can be performed by a control circuit. The control circuit is used to control the memory, such as controlling the power-on or power-off state of each storage element or storage element group in the memory. The control circuit can be any form of processor, controller, microprocessor or integrated circuit chip with data processing capabilities. This application describes the implementation form of the control circuit. The formula is not limited. In some embodiments, the control circuit may be provided inside the memory. The control circuit may also be provided inside the power management chip corresponding to the memory (the power management chip is used to provide input voltage for the memory). The control circuit may also be provided inside the memory chip for carrying the memory. This application does not limit the location of the control circuit on the circuit board of the memory and/or power management chip. The method may include the following steps 510:

Step 510: Based on the memory switching from the first operating mode to the second operating mode, control the second storage element group of the memory to switch from the power-off state to the power-on state; wherein the memory includes a first storage configured to store the first type of data. A group of elements and a second group of storage elements configured to store data of a second type.

In this embodiment of the present application, the memory includes multiple storage element groups, and each storage element group includes at least one storage element. For an introduction to the memory, please refer to the above embodiment, which will not be described again in this embodiment.

The first storage element group and the second storage element group are different storage element groups. Exemplarily, as shown in Figure 6, the memory includes two storage element groups, the first storage element group 61 is one of the two storage element groups, and the second storage element group 62 is the two storage element groups. Another storage element group within the group. Exemplarily, the memory includes 3 or more storage element groups, the first storage element group is at least one storage element group among the 3 or more storage element groups, and the second storage element group is the 3 or more storage element groups. At least one storage element group among three or more storage element groups, and the second storage element group and the first storage element group do not have the same storage element group. For example, the first storage element group is at least one storage element group among the 3 or more storage element groups, and the second storage element group is the 3 or more storage element groups except the first storage element group. The remaining storage element groups outside the group.

In the embodiment of the present application, a certain storage element group is in a powered-on state, which means that the power management chip of the memory provides an input voltage to each storage element in the storage element group, so that each storage element in the storage element group can Normal work is used to store the state of data. A certain storage element group is in a power-off state, which means that the power management chip of the memory does not provide input voltage to each storage element in the storage element group, so that each storage element in the storage element group does not receive input voltage to work. state. The storage element group in the powered-on state can be used to store data, while the storage element group in the powered-off state cannot be used to store data.

In some embodiments, in the first operating mode of the memory, the first storage element group is controlled to be in a power-on state, and the second storage element group is controlled to be in a power-down state. In the first working mode, since only the first type of data needs to be stored, and the first type of data is stored by the first storage element group , so the first storage element group of the control memory is in the powered-on state, and the second storage element group of the control memory is in the powered-off state. When the first storage element group is in a powered-on state, the power management chip of the memory provides an input voltage to each storage element in the first storage element group, so that the first storage element group can operate normally and is used to store the first type of storage element. The data. At the same time, since only the first type of data needs to be stored and there is no data that needs to be stored by the second storage element group, the second storage element group is controlled to be in a power-off state, that is, the power management chip of the memory does not provide power to the second storage element group. Each storage element in the storage element group provides an input voltage, so that the second storage element group does not work when powered off, thereby saving power.

In the second working mode, since there is a second type of data that needs to be stored, and the second type of data is stored by the second storage element group, when the memory switches from the first working mode to the second working mode In this case, it is necessary to control the second storage element group of the memory to switch from the power-off state to the power-on state. For example, the power management chip of the control memory provides an input voltage to each storage element in the second storage element group, so that the second storage element group can operate normally and is used to store the second type of data.

Optionally, when switching from the first operating mode to the second operating mode, the first storage element group is controlled to remain powered on, that is, the first storage element group is always powered on regardless of whether it is in the first operating mode or the second operating mode. Is powered on and provides the necessary storage area. By controlling the first storage element group to always be in a powered-on state, it is ensured that an application program using the first storage element group can efficiently use the storage area.

In this embodiment of the present application, the second type of data is different from the first type of data, that is, the first type of data and the second type of data are two different types of data. In the embodiment of the present application, the method of classifying data types is not limited. For example, the types can be classified according to the source of the data (such as the data producer or provider).

In some embodiments, different types of data are divided based on whether the application that generates the data belongs to the target type. Optionally, there is no application program of the target type running in the first working mode, there is an application program running of the target type in the second working mode, and the second type of data includes data corresponding to the application program of the target type. Optionally, based on determining the target type of application program execution, the control memory switches to the second working mode. Exemplarily, in the absence of an application program of the target type running, it is determined that the memory operates in a first operating mode, the first storage element group of the memory is controlled to be in a powered-on state, and the second storage element group of the memory is controlled In the power-off state; when there is an application program of the target type running, it is determined that the memory operates in the second working mode, and the first storage element group and the second storage element group of the control memory are both in the power-on state.

In some embodiments, the second type of data includes data corresponding to the target type of application, and the first One type of data includes data corresponding to applications other than the target type application. For example, the applications of the terminal device are divided into normal applications (Normal Usage APP) and high-performance applications (Performance Usage APP). The target type of applications is high-performance applications, except for the target type of applications. The other apps are normal apps. For example, as shown in FIG. 6 , the first storage element group 61 is used by ordinary applications, and the second storage element group 62 is used by high-performance applications. Optionally, the first storage element group 61 is also used to provide default kernel space and reserved space for use by the kernel and storage requirements under some special circumstances.

It should be noted that the target type of application can be fixed, that is, it will not change dynamically. Alternatively, the target type of application can also be dynamically determined, that is, it can be dynamically changed. For example, an application can change from belonging to the target type to not belonging to the target type, or from not belonging to the target type to belonging to the target type. . For the method of dynamically determining the application program of the target type, please refer to the introduction in the embodiment below.

In some embodiments, the second type of data generated in the second operating mode is stored in the second storage element group. The first storage element group is not used to store the second type of data generated in the second operating mode. That is to say, the first storage element group is only used to store the first type of data, and the second type of data can only be stored through the second storage element group and cannot be stored through the first storage element group. In this way, the isolation of different types of data storage in different working modes is achieved, which helps to improve the security and reliability of data storage.

In some embodiments, the operating frequencies of various storage element groups included in the memory can be controlled uniformly or independently. The above operating frequency can also be called the operating rate. The operating frequency of the storage element group refers to the clock frequency of the storage element group, or it can also be the data reading and writing frequency of the storage element group. The above clock frequency is also related to the data reading and writing frequency. The clock frequency and the data reading and writing frequency are positively correlated. relation. Unified control of the operating frequencies of each storage element group refers to unified control of the operating frequencies of each storage element group based on unified parameter indicators, and the operating frequencies of each storage element group are the same. The operating frequency of each storage element group is independently controlled, which means that the operating frequency of each storage element group is independently controlled according to the parameter index of each storage element group. The operating frequency of each storage element group may be the same or different. Implementation Decoupling between the operating frequencies of each storage element group provides greater flexibility.

Exemplarily, the operating frequency of the first storage element group and the operating frequency of the second storage element group are independently controlled. In other words, the operating frequency of the first storage element group and the operating frequency of the second storage element group are controlled independently. For example, when the first storage element group is in a powered-on state, according to the first storage element The parameter index of the group determines the operating frequency of the first storage element group (recorded as the first operating frequency), and controls the first storage element group to operate according to the first operating frequency. When the second storage element group is in the powered-on state, the operating frequency of the second storage element group (denoted as the second operating frequency) is determined according to the parameter index of the second storage element group, and the second storage element group is controlled according to the second operating frequency. Work at two operating frequencies. The above-mentioned first operating frequency and the second operating frequency may be the same or different, thereby achieving independent control. In addition, the above-mentioned parameter index used to determine the operating frequency may be a load parameter, which may also be called a bandwidth parameter. The load parameter of a storage element group refers to the amount of access to the storage element group within a unit time. Optionally, there is a positive correlation between the operating frequency of the storage element group and the load parameter, that is, the greater the load parameter, the greater the operating frequency, and conversely, the smaller the load parameter, the smaller the operating frequency. For example, if both the first storage element group and the second storage element group are in a powered-on state, assuming that the load parameter of the first storage element group is greater than the load parameter of the second storage element group, then the operation of the first storage element group can be controlled. The frequency (that is, the first operating frequency) is greater than the operating frequency of the second storage element group (that is, the second operating frequency); assuming that the load parameter of the first storage element group is smaller than the load parameter of the second storage element group, then the The operating frequency of the first storage element group (that is, the first operating frequency) is smaller than the operating frequency of the second storage element group (that is, the second operating frequency); assuming that the load parameter of the first storage element group is equal to the load parameter of the second storage element group Load parameters, then the operating frequency of the first storage element group (that is, the first operating frequency) and the operating frequency of the second storage element group (that is, the second operating frequency) can be controlled to be equal. Through the above method, the operating frequencies of different storage element groups are decoupled and independently controlled, and the operating frequency of each storage element group is determined according to the load parameters of each storage element group, which can realize the actual access requirements of the storage element group. Properly setting the operating frequency will help further improve energy saving effects.

In the embodiment of the present application, by dividing the memory into multiple storage element groups (for example, including at least a first storage element group and a second storage element group), different storage element groups are used to store different types of data, so that it can be achieved On-demand use of storage element groups. For example, when there is no data corresponding to a certain storage element group that needs to be stored, the storage element group can be controlled to be in a power-off state. When there is need to store data corresponding to the storage element group, the storage element group can be controlled to power off. Controlling the storage element group to switch from the power-off state to the power-on state, this on-demand allocation and control method can save the power consumption of the memory and achieve a better energy-saving effect.

Next, an application that dynamically determines the target type is introduced.

In some embodiments, historical running data of at least one application program in the terminal device is obtained, and a target type of application program is determined from each application program based on the historical running data of each application program.

The historical running data of the application is used to record the historical running status of the application. Optionally, the historical running data of the application includes but is not limited to at least one of the following: historical storage space usage, historical power consumption, historical usage frequency, and historical CPU usage. Among them, the historical storage space usage is used to reflect the application's demand for storage space. For example, the indicator can be obtained by counting the storage space usage when the application is running in the recent period. Historical power consumption is used to reflect the battery power consumption of the application. For example, this indicator can be obtained by counting the battery power consumption of the application during the recent period of operation. The historical usage frequency is used to reflect the user's frequency of use of the application. For example, the indicator can be obtained by counting the number of times and/or the running time of the application in the recent period. The historical CPU usage is used to reflect the application's usage of CPU processing resources. For example, this indicator can be obtained by counting the CPU usage of the application when it was running in the recent period. Each of the above indicators can reflect the performance requirements of the application. For example, the greater the historical storage space usage, the greater the historical power consumption, the greater the historical frequency of use, and the greater the historical CPU usage, the greater the historical CPU usage. The higher the performance requirements. Therefore, based on the above indicators, we can classify whether the application belongs to the target type from the perspective of performance requirements, and obtain the applications that belong to the target type (such as high-performance applications) and the applications that do not belong to the target type (such as common applications). Among them, the performance requirements of applications belonging to the target type (such as high-performance applications) are greater than those of applications that do not belong to the target type (such as ordinary applications).

In addition, the above-mentioned latest period of time refers to a period of time starting from the current moment and working backwards. The length of the latest period of time can be reasonably set based on actual needs, such as 1 month, 1 week, 1 day, 1 hour, etc. This application does not limit this.

In some embodiments, when the historical operating data only includes one indicator, a threshold corresponding to the indicator can be set. If the indicator of the application is greater than (or less than) the threshold, it is determined that the application belongs to the target type, and vice versa. If the indicator of an application is less than (or greater than) the threshold, it is determined that the application does not belong to the target type. Taking the indicator as historical storage space usage as an example, if the historical storage space usage of an application is greater than the threshold, it is determined that the application belongs to the target type. On the contrary, if the historical storage space usage of the application is less than the threshold, it is determined that the application does not belong to the target type. Belongs to target type.

In some embodiments, when the historical operating data only includes multiple indicators, a comprehensive indicator can be calculated based on the multiple indicators, and a threshold corresponding to the comprehensive indicator can be set. Among them, the comprehensive indicator reflects the overall situation of the above-mentioned indicators. If the comprehensive indicator of the application is greater than (or less than) the threshold, it is determined that the application belongs to the target type. On the contrary, if the comprehensive indicator of the application is less than (or greater than) >) threshold determines that the application does not belong to the target type. Take historical operating data including historical storage space usage, historical power consumption, historical usage frequency, and historical CPU usage as an example. For each application, based on the application’s historical storage space usage and historical power consumption , historical usage frequency, historical CPU usage, calculate the comprehensive indicator of the application. If the comprehensive indicator of the application is greater than the threshold, it is determined that the application belongs to the target type. On the contrary, if the comprehensive indicator of the application is less than the threshold It is determined that the application does not belong to the target type. Optionally, the above method of calculating the comprehensive index can be to perform a weighted average or weighted sum of multiple indicators to obtain a comprehensive index, or to input multiple indicators into a neural network model and output the comprehensive index through the neural network model, or to use This application does not limit other calculation methods.

Illustratively, as shown in Figure 7, applications are divided into two major categories, including high-performance applications and ordinary applications. The memory includes a first storage element group and a second storage element group. Data of ordinary application programs are stored in the first storage element group, and data of high-performance application programs are stored in the second storage element group. Among them, the first storage element group cannot be used to store data of high-performance applications, and the second storage element group cannot be used to store data of ordinary applications, so that the data of the two types of applications are isolated from each other. For any application, whether it is a high-performance application or a normal application can be determined and adjusted dynamically. For example, the historical running data of the application is obtained, and whether the application is a high-performance application or a normal application is determined based on the historical running data of the application.

In some embodiments, a switching strategy may be used in combination with historical running data of each application in the terminal device to determine the application belonging to the target type from each application. Among them, the switching policy refers to the policy used to determine whether the application belongs to the target type. For example, the switching strategy may be a dynamic selection strategy based on Markov chain, or other dynamic selection strategies, which is not limited in this application.

In the embodiment of the present application, by dynamically determining whether the application program belongs to the target type, the usage relationship between the application program and the storage element group is not static. When the application program belongs to the target type, it uses the second storage element group. For data storage, when the application does not belong to the target type, it uses the first storage element group for data storage, and whether the application belongs to the target type can be dynamically switched according to the user's recent usage of the application, improving It improves the flexibility of memory usage and the rationality of memory allocation.

Figure 8 is a flow chart of a storage control method provided by another embodiment of the present application. This method can be performed by the control circuit introduced above. The method may include at least one of the following steps 810 to 830: Steps:

Step 810: In the first working mode of the memory, the first storage element group of the control memory is in the powered-on state, and the second storage element group of the control memory is in the powered-off state; wherein, the first storage element group is used to store the first A type of data.

Step 820: Based on the memory switching from the first working mode to the second working mode, control the second storage element group of the memory to switch from the power-off state to the power-on state. The second storage element group is used to store the data generated in the second working mode. The second type of data is different from the first type of data.

For the above steps 810-820, please refer to the introduction in the above embodiment, which will not be described again in this embodiment.

Step 830: Based on the memory switching from the second operating mode to the first operating mode, control the second storage element group of the memory to switch from the power-on state to the power-off state.

When there is no need to store the second type of data, the memory can be controlled to switch from the second working mode to the first working mode, and the second storage element group of the memory can be controlled to switch from the power-on state to the power-off state, thereby saving power. For example, if it is determined that no application program of the target type is running, the second storage element group is controlled to switch from the power-on state to the power-off state.

Optionally, after switching from the first working mode to the second working mode, if there is no application program of the target type running within the target time period, control the second storage element group to switch from the power-on state to the power-off state; wherein , within the target duration, the second storage element group remains powered on. That is to say, after the application program of the target type stops running, the second storage element group is not controlled to power off immediately at the moment when it stops running. Instead, it waits for a period of time and no application program of the target type is running during this period of time. In this case, the second storage element group is then controlled to power off. In this way, the second storage element group can be avoided from being powered on and off frequently, and when an application of the target type is started again in a short period of time, the second storage element group can be directly used to improve the normal operation of the application of the target type after being restarted. state efficiency.

The following are device embodiments of the present application, which can be used to execute method embodiments of the present application. For details not disclosed in the device embodiments of this application, please refer to the method embodiments of this application.

Figure 9 is a block diagram of a storage control device provided by an embodiment of the present application. The device has the function of implementing the above method example, and the function can be implemented by hardware, or can be implemented by hardware executing corresponding software. The device 900 may be the control circuit introduced above, or may be provided in the control circuit.

In some embodiments, the device 900 is configured to switch from the first operating mode to the The second operating mode controls the second storage element group of the memory to switch from the power-off state to the power-on state; wherein the memory includes a first storage element group configured to store the first type of data and a second storage element group configured to store the second type of data. The second storage element group of type data.

In some embodiments, the device 900 is further configured to, in the first operating mode of the memory, control the first storage element group to be in a power-on state, and control the second storage element group to be in a power-down state. power status.

In some embodiments, the device 900 is further configured to control the memory to switch to the second working mode based on determining the target type of application execution.

In some embodiments, the apparatus 900 is further configured to dynamically determine the target type of application.

In some embodiments, the apparatus 900 is further configured to obtain historical running data of at least one application in the terminal device; wherein the historical running data is used to record the historical running status of the application; according to each of the The historical running data of the application program determines the application program of the target type from each of the application programs.

In some embodiments, the device 900 is further configured to store the second type of data generated in the second operating mode in the second storage element group.

In some embodiments, the device 900 is further configured to control the second storage element group to switch from the power-on state to the first operating mode based on the memory switching from the second operating mode to the first operating mode. Describe the power-off status.

In some embodiments, the device 900 is further configured to, after switching from the first working mode to the second working mode, if there is no application program of the target type running within a target duration, control all The second storage element group switches from the power-on state to the power-down state; wherein, within the target time period, the second storage element group maintains the power-on state.

In some embodiments, the device 900 is further configured to control the first storage element group to maintain the power-on state when switching from the first operating mode to the second operating mode.

In some embodiments, the apparatus 900 is further configured to independently control the operating frequency of the first storage element group and the operating frequency of the second storage element group.

In some embodiments, the device 900 may include: a first control module 910 and a second control module 920 . The first control module 910 is configured to control the clock frequency and/or data reading and writing frequency of the first storage element group. The second control module 920 is configured to control the clock frequency of the second storage element group and/or data read and write frequency.

In the embodiment of the present application, by dividing the memory into multiple storage element groups (for example, including at least a first storage element group and a second storage element group), different storage element groups are used to store different types of data, thereby enabling storage On-demand use of element groups. For example, when there is no data corresponding to a certain storage element group that needs to be stored, the storage element group can be controlled to be in a power-off state. When there is need to store data corresponding to the storage element group, the storage element group can be controlled again. The storage element group switches from the power-off state to the power-on state. This on-demand allocation and control method can save the power consumption of the memory and achieve a better energy-saving effect.

It should be noted that when implementing the functions of the device provided by the above embodiments, only the division of the above functional modules is used as an example. In practical applications, the above functions can be allocated to different functional modules according to needs, that is, The internal structure of the device is divided into different functional modules to complete all or part of the functions described above. In addition, the apparatus and method embodiments provided in the above embodiments belong to the same concept, and the specific implementation process can be found in the method embodiments, which will not be described again here.

Figure 10 is a schematic diagram of a terminal device provided by an exemplary embodiment of the present application. Take the terminal device 1500 in this embodiment including the main device 101 and the memory 200 as an example for explanation:

The terminal device 1500 is provided with a main device 101 and the memory 200 described in the above embodiment, and the main device 101 and the memory 200 are electrically connected. The memory 200 may be provided inside the system-on-chip or outside the system-on-chip. It should be noted that in addition to the system on a chip, the terminal device 1500 may also include other necessary components, such as read-only memory (Read-Only Memory, ROM), display components, input units, audio circuits, speakers, microphones, power supplies and other components. This embodiment will not be described in detail here.

The terminal device 1500 may be an electronic device such as a mobile phone, a tablet computer, a game console, an e-book reader, a multimedia playback device, a wearable device, etc. Optionally, the terminal device 1500 is a mobile terminal device. The terminal device is used to implement the storage control method provided in the above embodiment.

In some embodiments, the terminal device includes a processor and a memory. The processor may be the processor in the main device 101 described above, and the memory may be the memory 200 described above. A computer program is stored in the memory, and the processor executes the computer program to implement the above storage control method.

In some embodiments, the present application also provides a computer-readable storage medium in which a computer program is stored, and when executed by a processor, the computer program implements the above storage control method.

Optionally, the computer-readable storage medium may include: ROM (Read-Only Memory), RAM (Random-Access Memory), SSD (Solid State Drives, solid state drive) or optical disk, etc. Among them, random access memory can include ReRAM (Resistance Random Access Memory, resistive random access memory) and DRAM (Dynamic Random Access Memory, dynamic random access memory).

In some embodiments, the present application also provides a chip, which includes the storage control device as provided in the above embodiments. For unspecified details of the storage control device, please refer to the above embodiments and will not be described again here.

In some embodiments, this application also provides a memory, the memory includes:

A first storage element group used to store first type data;

A second storage element group is used to store second type data, wherein the second storage element group is configured to switch from a power-down state to a power-on state based on the memory switching from the first operating mode to the second operating mode. For unspecified details of the memory, please refer to the above embodiments and will not be described again here.

In some embodiments, the present application also provides a computer program product, the computer program product includes a computer program, and the computer program is stored in a computer-readable storage medium. The processor of the terminal device reads the computer program from the computer-readable storage medium, and the processor executes the computer instructions, so that the terminal device executes the above storage control method.

The "plurality" mentioned in this article means two or more than two. "And/or" describes the relationship between related objects, indicating that there can be three relationships. For example, A and/or B can mean: A exists alone, A and B exist simultaneously, and B exists alone. The character "/" generally indicates that the related objects are in an "or" relationship.

The above are only optional embodiments of the present application and are not intended to limit the present application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the protection of the present application. within the range.

Claims

A storage control method, the method includes:

Based on the memory switching from the first operating mode to the second operating mode, control the second storage element group of the memory to switch from the power-off state to the power-on state;

Wherein, the memory includes a first storage element group configured to store a first type of data and a second storage element group configured to store a second type of data.
The method of claim 1, further comprising:

In the first operating mode of the memory, the first storage element group is controlled to be in a power-on state, and the second storage element group is controlled to be in a power-down state.
The method of claim 1, further comprising:

Based on determining the target type of application program execution, the memory is controlled to switch to the second working mode.
The method of claim 3, further comprising:

Dynamically determine the target type of application.
The method of claim 4, wherein the dynamically determining the target type of application includes:

Obtain historical running data of at least one application program in the terminal device; wherein the historical running data is used to record the historical running status of the application program;

The application program of the target type is determined from each of the application programs according to the historical operation data of each of the application programs.
The method according to any one of claims 1 to 5, wherein the method further includes:

The second type data generated in the second operating mode is stored in the second storage element group.
The method according to any one of claims 1 to 6, wherein the method further includes:

Based on the memory switching from the second operating mode to the first operating mode, the second storage element group is controlled to switch from the power-on state to the power-down state.
The method of claim 7, further comprising:

After switching from the first working mode to the second working mode, if there is no application program of the target type running within a target time period, execute the control of the second storage element group from the above The step of switching the power state to the power-off state;

Wherein, within the target duration, the second storage element group maintains the power-on state.
The method according to any one of claims 1 to 8, wherein the method further includes:

When switching from the first operating mode to the second operating mode, the first storage element group is controlled to maintain the power-on state.
The method according to any one of claims 1 to 9, wherein the method further includes:

The operating frequency of the first storage element group and the operating frequency of the second storage element group are controlled independently.
A storage control device, the device is configured to:

Based on the memory switching from the first operating mode to the second operating mode, controlling the second storage element group of the memory to switch from the power-off state to the power-on state;

Wherein, the memory includes a first storage element group configured to store a first type of data and a second storage element group configured to store a second type of data.
The device of claim 11, wherein said device includes:

A first control module configured to control the clock frequency and/or data reading and writing frequency of the first storage element group;

The second control module is configured to control the clock frequency and/or data reading and writing frequency of the second storage element group.
A terminal device, the terminal device includes a processor and a memory, a computer program is stored in the memory, and the processor executes the computer program to implement the method according to any one of claims 1 to 10.
A computer-readable storage medium, in which a computer program is stored, and the computer program is used to be executed by a processor to implement the method according to any one of claims 1 to 10.
A chip comprising the storage control device according to any one of claims 11 to 12.
A memory including:

A first storage element group used to store first type data;

A second storage element group is used to store second type data, wherein the second storage element group is configured to switch from a power-down state to a power-on state based on the memory switching from the first operating mode to the second operating mode.