WO2024017121A1 - 批量控制方法及装置 - Google Patents

批量控制方法及装置 Download PDF

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Publication number
WO2024017121A1
WO2024017121A1 PCT/CN2023/107059 CN2023107059W WO2024017121A1 WO 2024017121 A1 WO2024017121 A1 WO 2024017121A1 CN 2023107059 W CN2023107059 W CN 2023107059W WO 2024017121 A1 WO2024017121 A1 WO 2024017121A1
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WIPO (PCT)
Prior art keywords
plc
address
bit
group
write
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PCT/CN2023/107059
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English (en)
French (fr)
Inventor
段正
廖翼
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华为技术有限公司
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Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Publication of WO2024017121A1 publication Critical patent/WO2024017121A1/zh

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B3/00—Line transmission systems
    • H04B3/54—Systems for transmission via power distribution lines
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L61/00—Network arrangements, protocols or services for addressing or naming
    • H04L61/50—Address allocation
    • H04L61/5069—Address allocation for group communication, multicast communication or broadcast communication

Definitions

  • the present application relates to the field of communication technology, and in particular to a batch control method and device.
  • Power line communication refers to a communication method that uses power lines as information transmission media for voice or data transmission.
  • the transmitting end of PLC technology loads the high-frequency signal carrying information into the current, and then transmits it through the power line.
  • the receiving end separates the high-frequency signal from the current and transmits it to the computer or telephone to realize the information transmission.
  • the existing PLC host can send the write group address defined in the "Power Line Carrier Communication (PLC) Whole House Interconnection Standard Specification" to PLC equipment (such as brush motors, switching power supplies, fluorescent lamps, halogen lamps or various other Home appliances) are sent to control the status of PLC equipment (such as turning on, off, and brightness of halogen lamps).
  • PLC equipment such as brush motors, switching power supplies, fluorescent lamps, halogen lamps or various other Home appliances
  • the PLC device to be controlled is identified by the device application address (DEV Addr) in the write group address.
  • DEV Addr device application address
  • the writing group address needs to include the device application addresses of multiple PLC devices, resulting in an increase in the number of messages written to the group address.
  • the write group address When the write group address exceeds the size of the message specified in the underlying link (for example, the maximum length of the message transmitted by the Transmission Control Protocol (TCP) message is 1472 bytes), the write group address will be divided Bag. However, subpackaging will increase the number of link layer messages, causing the write group address to be transmitted on the power line for a long time, affecting the control efficiency of the PLC device.
  • TCP Transmission Control Protocol
  • embodiments of the present application provide a batch control method, which is applied to a power line carrier communication PLC host.
  • the batch control method includes: sending a write group address to at least two PLC devices, where the write group address includes Group control mapping bits, the group control mapping bits include at least two target bits, each of the target bits is used to identify the corresponding PLC device, and the write group address is used to control the target bits identified by the target bits.
  • the PLC device receives the write group address response sent by the PLC device.
  • the PLC host when the PLC host sends write group addresses to multiple PLC devices, at least two PLC devices to be controlled are identified by at least two target bits, so as to achieve batch control of multiple PLC devices and reduce writing The size occupied by the identification of the PLC device in the group address is used to avoid subcontracting caused by writing too large a group address and affecting the control efficiency of the PLC device.
  • the PLC device After the PLC device receives the write group address, it determines whether the write group address is used to control the current PLC device based on the target bit in the group control mapping bit. If the write group address is used to control the current PLC device, it The PLC host sends a write group address response.
  • the size of the group control mapping bit is N bytes, and N is a positive integer.
  • the batch control method further includes: sending a writing device application address to the PLC device, where the writing device application address is used to allocate target bits to the PLC device. bit; receive the writing device application address response sent by the PLC device.
  • the PLC host allocates corresponding target bits to the PLC device by sending the write device application address to the PLC device.
  • the writing device application address includes the group control mapping bit
  • the group control mapping bit of the writing device application address includes a group control mapping bit for identifying the PLC device. target bits.
  • the PLC host sends the write device application address to the PLC device including the group control mapping bit, and allocates corresponding target bits to the PLC device through the group control mapping bit.
  • the group control mapping bits include target bits and non-target bits, the value of the target bit is 1, and the value of the non-target bit is 0.
  • inventions of the present application provide a batch control method applied to power line carrier communication PLC equipment.
  • the batch control method includes: receiving a write group address sent by the PLC host, and the write group address includes a group control mapping. bit, the group control mapping bit has at least two target bits, each of the target bits is used to identify the corresponding PLC device, and the write group address is used to control the PLC identified by the target bits.
  • Device responds to the write group address corresponding to the write group address sent to the PLC host.
  • the method further includes: receiving a writing device application address sent by the PLC host, where the writing device application address includes a group control mapping bit, and the group control mapping
  • the bits include target bits, and the target bits are used to identify the PLC device; and send a writing device application address response corresponding to the writing device application address to the PLC host.
  • the group control mapping bits include target bits and non-target bits, the value of the target bit is 1, and the value of the non-target bit is 0.
  • a bit identifier allocation method is provided, which is applied to a power line carrier communication PLC host.
  • the bit identifier allocation method includes: sending a write device application address to the PLC device, and the write device application address includes a group control mapping bit.
  • the group control mapping bits include target bits, and the target bits are used to identify the corresponding PLC device; receiving a writing device application address response corresponding to the writing device application address sent by the PLC device.
  • the writing device application address also includes a device application address, and the device application address is used to identify the PLC device.
  • the method further includes: establishing a correspondence between the allocated target bits and the device application address.
  • a bit identification allocation method is provided, which is applied to power line carrier communication PLC equipment.
  • the bit identification allocation method includes: receiving a writing device application address sent by the PLC host, and the writing device application address includes a group control mapping. bit, the group control mapping bit includes a target bit, and the target bit is used to identify the PLC device; and sends a writing device application address response corresponding to the writing device application address to the PLC host.
  • a power line carrier communication PLC system includes a PLC host and a plurality of PLC devices; the PLC host is used to send a write group address to the PLC device, and the write group address includes a group control Mapping bits, the group control mapping bits have at least two target bits, the target bits are used to identify the PLC device; the PLC device is used to receive the write group address sent by the PLC host, and sends a write group address response corresponding to the write group address to the PLC host.
  • the PLC host is further configured to send a writing device application address to the PLC device, where the writing device application address includes a group control mapping bit, and the group control mapping bit has a target bit, and the target bit is used to identify the PLC device; the PLC device is also used to receive the write device application address sent by the PLC host, and send the write device application address to the PLC host Write the device application address response corresponding to the device application address.
  • a PLC host in a sixth aspect, includes: one or more processors; a storage device for storing one or more programs; when the one or more programs are processed by the one or more The processor executes, so that the one or more processors implement the batch control method as described in any one of the first aspect or the bit identification allocation method as described in any one of the third aspect.
  • a PLC device in a seventh aspect, includes: one or more processors; a storage device for storing one or more programs; when the one or more programs are processed by the one or more The processor executes, so that the one or more processors implement the batch control method as described in any one of the second aspect or the bit identification allocation method as described in the fourth aspect.
  • An eighth aspect provides a computer-readable storage medium on which a computer program is stored.
  • the program is executed by a processor, the batch control method or the batch control method described in any one of the first aspect or the second aspect is implemented.
  • the bit identifier allocation method according to any one of the three aspects or the fourth aspect.
  • Figure 1 is a schematic diagram of the architecture of a PLC system.
  • Figure 2 is a schematic diagram of a write group address for batch control.
  • FIG. 3 is a schematic diagram of a writing group address for batch control provided by an embodiment of the present application.
  • Figure 4 is a schematic flowchart of a batch control method provided by an embodiment of the present application.
  • FIG. 5 is a schematic flowchart of another batch control method provided by an embodiment of the present application.
  • FIG. 6 is a schematic flowchart of a bit identifier allocation method provided by an embodiment of the present application.
  • FIG. 7A is a schematic diagram of a writing device application address provided by an embodiment of the present application.
  • FIG. 7B is a schematic diagram of an allocation response provided by an embodiment of the present application.
  • FIG. 8 is a schematic flowchart of another bit identifier allocation method provided by an embodiment of the present application.
  • FIG. 9 is a module diagram of the PLC system provided by the embodiment of the present application.
  • FIG 10 is a schematic structural diagram of a PLC host provided by an embodiment of the present application.
  • Figure 11 is a schematic structural diagram of a PLC device provided by an embodiment of the present application.
  • first and second are used for descriptive purposes only and cannot be understood as indicating or implying relative importance or implicitly indicating the quantity of indicated technical features.
  • features defined as “first” and “second” may explicitly or implicitly include one or more of the described features.
  • words such as “exemplary” or “for example” are used to identify examples, illustrations or illustrations. Any embodiment or design described as “exemplary” or “such as” in the embodiments of the present application is not to be construed as preferred or advantageous over other embodiments or designs. Rather, use of the words “exemplary” or “such as” is intended to present the concept in a concrete manner.
  • the PLC system includes a PLC host and PLC equipment.
  • the PLC host communicates with PLC equipment.
  • PLC communication means that PLC equipment and PLC host communicate according to the power line carrier communication (PLC) whole-house interconnection standard specification.
  • PLC power line carrier communication
  • the PLC host controls the PLC devices of the PLC system by sending control instructions (such as writing group addresses) to the PLC devices.
  • control instructions such as writing group addresses
  • the PLC system can include multiple PLC devices.
  • the write device attributes sent by the PLC host can control a single PLC device, and the write group addresses sent by the PLC host can control multiple PLC devices in batches.
  • the PLC device is a halogen lamp
  • the PLC host sends control instructions to the halogen lamp to control the switching of the halogen lamp or the brightness of the halogen lamp.
  • the PLC host is also called a gateway
  • the PLC device is also called a sub-device.
  • users can control or maintain the PLC system through the client of the PLC host or the mobile phone software APP connected to the PLC host.
  • the mobile phone software APP connected to the PLC host assigns device application addresses to PLC devices newly connected to the PLC system.
  • the PLC host In whole-house intelligence application scenarios, the PLC host often sends a write group address through broadcast or multicast to control multiple PLC devices. For example, the PLC host controls multiple smart home appliances at the same time through a write group address: turning off the TV, turning on the refrigerator and the ceiling light in the living room.
  • Figure 2 is the write group address for batch control of multiple PLC devices specified in the Power Line Carrier Communications (PLC) whole-house interconnection standard specification.
  • DEV Number is used to identify the number of PLC devices to be controlled in the write group address.
  • DEV Addr is the device application address of the PLC device to be controlled in the group address, and DEV Addr is used to identify the PLC device to be controlled.
  • DEV Addr1 is the device application address of the first PLC device
  • DEV Addr2 is the device application address of the second PLC device
  • DEV Addrn is the device application address of the nth PLC device.
  • Siid and Ciid represent the device attribute changes of the PLC device to be controlled.
  • Siid is used to represent the functional functions that users can use in PLC equipment, which includes the data that implements the input and output of the function and the behavior that implements the function.
  • Ciid identifies characteristics of data or related behavior, such as the on or off characteristics of a switch.
  • the size of the device application address of each controlled PLC device in Figure 2 is 2 bytes. If the PLC host controls multiple PLC devices at the same time through a write group address, such as 16 PLC devices, then write The device application address of the PLC device in the group address occupies 32 bytes of space, which can easily cause the size of the entire write group address to exceed the packet size specified by the underlying link. For example, the maximum data length in an Ethernet frame is 1500 bytes. If it exceeds 1500 bytes, the message needs to be subpackaged.
  • this application provides a batch control method, bit address allocation method and device, which identifies PLC equipment through bit identification.
  • the group control mapping bits include at least two target bits, and each target bit is used to identify the corresponding PLC equipment.
  • the corresponding PLC device is identified by the target bit, which can effectively reduce the size of the device application address in the written group address when controlling multiple PLC devices in batches, and avoid sub-packaging due to excessively large messages, thereby affecting the control of PLC devices. efficiency.
  • Figure 3 is a schematic diagram of writing a group address provided by an embodiment of the present application. Compared with the write group address in Figure 2, the write group address in Figure 3 identifies multiple PLC devices at the same time through the group control mapping bit Group DevListBitMap field.
  • Group DevListBitMap is N bytes, then Group DevListBitMap has M target bits, each bit can identify a PLC device in a PLC system, where N is a positive integer, 8*N ⁇ M ⁇ 2, Then the Group Dev Bit Value written in the group address can identify M PLC devices at the same time.
  • the Mth bit in the Group DevListBitMap is used to identify the target PLC device. If the Mth bit in the Group DevListBitMap in the write group address is a preset value (for example, 1), it means that the PLC device used to control the write group address sent by the PLC host through multicast or broadcast includes the target PLC equipment. If the Mth bit in the Group DevListBitMap in the write group address is not the default value (for example, 0), it means that the PLC device controlled by the write group address sent by the PLC host through multicast or broadcast does not include the target PLC device. .
  • a preset value for example, 1
  • the PLC device receives the write group address sent by the PLC host, Parsing the Group DevListBitMap (i.e. 00000000 00000001) in the write group address indicates that the write group address is used to control the current PLC device, and the PLC device is the target PLC device.
  • Group DevListBitMap is 2 bytes, and the bit identifier of PLC device 1 is 0x0001, then PLC device 1 corresponds to the first bit of Group DevListBitMap, and the bit identifier of PLC device 2 is 0x0011, then PLC device 2 corresponds to The second bit of Group DevListBitMap, then the PLC device receives the write group address sent by the PLC host and parses the Group DevListBitMap in the write group address. If Group DevListBitMap is 00000000 00000011, then the first bit of Group DevListBitMap and The second bits are all 1, indicating that the write group address is used to control PLC device 1 and PLC device 2.
  • the default value of the target bit is 0. If the target bit of the Group DevListBitMap is used to identify the target PLC device, the target bit of the Group DevListBitMap in the written group address received by the PLC device is The default value, and is 0, means that the write group address is the same as the current PLC device, that is, it is used to control the current PLC device; the target bit of the Group DevListBitMap in the write group address received by the PLC device is 1, which means This write group address has nothing to do with the current PLC device, that is, the write group address is not used to control the current PLC device.
  • M may be 1, that is, the Group DevListBitMap only includes one target bit, and the Group DevListBitMap written in the group address is only used to identify one PLC device.
  • FIG 4 is a schematic flow chart of a batch control method provided by an embodiment of the present application.
  • This batch control method is used for the PLC host of the PLC system.
  • the following takes the batch control method applied to the PLC host in Figure 1 as an example for detailed explanation.
  • the PLC host sends write group addresses to multiple PLC devices in the PLC system.
  • the PLC host can send a write group address to multiple PLC devices in the PLC system through broadcast or multicast.
  • the write group address is used to control at least two PLC devices, for example, to control the on or off of multiple PLC devices.
  • the written group address includes the group control mapping bit.
  • the group control mapping bit includes at least two target bits, each target bit is used to identify a PLC device, and the written group address is used to control the PLC device identified by the target bit.
  • Group DevListBitMap has M target bits, each bit can identify a PLC device in a PLC system, where N is a positive integer, 8*N ⁇ M ⁇ 2, Then the Group DevListBitMap written in the group address can identify M PLC devices at the same time.
  • the PLC host receives the write group address response sent by the PLC device.
  • the PLC host sends write group addresses to multiple PLC devices.
  • the write group addresses include group control mapping bits.
  • the group control mapping bits include multiple target bits. Each target bit is used to identify a PLC device. Then the group The control mapping bit can identify multiple PLC devices at the same time, and the PLC host can control multiple PLC devices at the same time by writing the group address.
  • the PLC device receives the write group address and determines whether the write group address is used to control the current PLC device based on the group control mapping bit in the write group address.
  • write group address is used to control the current PLC device, then Return the write group address response to the PLC host, and perform the corresponding action according to the attribute field corresponding to the target bit; if the write group address is not used to control the current PLC device, the write group address is ignored.
  • the above technical solution identifies multiple PLC devices through the target bits of the group control mapping bit in the write group address. Compared with Figure 2, which only identifies one PLC device through a 2-byte DEV Addr, it reduces the number of write groups. The size of the address prevents the PLC host from controlling multiple PLC devices. If the write group address is larger, the write group address will be sub-packaged. The sub-packet processing will cause the write group address transmission time to be longer, thereby affecting the control efficiency of the PLC device. .
  • FIG 5 is a schematic flow chart of a batch control method provided by an embodiment of the present application.
  • This batch control method is used in PLC systems PLC equipment. The following takes the batch control method applied to the PLC equipment in Figure 1 as an example for detailed explanation.
  • the PLC device receives the write group address sent by the PLC host.
  • the write group address includes a group control mapping bit.
  • the group control mapping bit includes at least two target bits. Each target bit is used to identify a corresponding PLC device.
  • the write group address is used to control the target bit. Identified PLC device.
  • the PLC device determines the write group address for controlling the current PLC device, and sends a write group address response to the PLC host.
  • the PLC device receives the write group address sent by the PLC host, parses the write group address to obtain the group control mapping bit in the write group address, and determines whether the write group address is used to control the current PLC based on the group control mapping bit. device, if the write group address is used to control the current PLC device, the write group address response is returned to the PLC host, and the corresponding action is performed based on the attribute field corresponding to the target bit; if the write group address is not used for control For the current PLC device, the write group address is ignored.
  • the PLC device receives the write group address sent by the PLC host, parses the write group address to obtain the group control mapping bit in the write group address, and determines whether the target bit in the group control mapping bit is 1, The target bit is used to identify the current PLC device; if the value of the target bit is 1, determine that the write group address corresponds to the PLC device to be controlled, including the current PLC device, and then obtain the corresponding attribute content (such as Siid, Ciid) , and change the attributes of the current PLC device (such as on, off, brightness) according to the attribute content; if the value of the target bit is 0, the write group address is ignored.
  • the target bit is used to identify the current PLC device; if the value of the target bit is 1, determine that the write group address corresponds to the PLC device to be controlled, including the current PLC device, and then obtain the corresponding attribute content (such as Siid, Ciid) , and change the attributes of the current PLC device (such as on, off, brightness) according to the attribute
  • the target bit of PLC device 1 is the third bit from low to high in the group control mapping bit
  • the target bit of PLC device 2 is the fourth bit
  • the target bit of PLC device 3 bit is the fifth bit.
  • the group control mapping bit included in the write group address sent by the PLC host is 00000000 00011000.
  • the fourth and fifth bits in the group control mapping bit are 1, Indicates that the write group address is used to control the attribute content of PLC device 2 and PLC device 3; since the third bit is 0, it indicates that the write group address has nothing to do with PLC device 1, that is, the write group address is not used to control PLC.
  • the target bit corresponding to each PLC device can be pre-configured in the PLC device.
  • the PLC host can allocate the target bit in the group control mapping bit to the newly added PLC device.
  • the corresponding relationship between the PLC device and the target bit can be established in the PLC host and PLC device.
  • FIG. 6 is a schematic flowchart of a bit identifier allocation method provided in an embodiment of the present application. This bit identifies the allocation method that applies to the PLC host of the PLC system. The following uses the bit identification allocation method applied to the PLC host in Figure 1 as an example for detailed explanation.
  • bit identification allocation method includes the following steps:
  • the PLC host sends the write device application address to the PLC device.
  • the writing device application address is used to allocate the target bit in the group control mapping bit to the PLC device.
  • the PLC host receives the write device application address response sent by the PLC device.
  • the PLC host allocates the target bit in the corresponding group control mapping bit to the PLC device by writing the device application address.
  • the PLC device After the PLC device receives the writing device application address, it forms a writing device application address response and sends the writing device to the PLC host. Incoming device application address responses, the PLC host and PLC device can locally establish the corresponding relationship between the target bits and the PLC device.
  • the writing device application address includes a group control mapping bit, and the target bit of the group control mapping bit is used to identify the PLC device. In this way, after the PLC device receives the writing device application address, it determines the target bit corresponding to the current PLC device according to the group control mapping bit in the writing device application address.
  • the PLC device receives the group control mapping bit in the written device application address, which has 8*N bits, of which the target bit is 1 and the remaining bits are 0. Then, after the PLC device receives the written device application address, Determine which target bit is 1 corresponding to the current PLC device.
  • the PLC host can set the target bit of the group control mapping bit in the sent writing device application address to 0, and set the other bits to 1, then the PLC device receives the writing device application address Finally, determine that the target bit is 0 corresponding to the current PLC device.
  • the write device application address sent by the PLC host to the PLC device includes the number of target bits corresponding to the PLC device in the group control mapping bit.
  • the Nth bit of the group control mapping bit is
  • the writing device application address includes the group bit address value Group Dev Bit Value
  • the value of the Group Dev Bit Value is N.
  • FIG. 7A and Figure 7B is a schematic diagram of the writing device application address and allocation response provided by the embodiment of the present application.
  • the writing device application address sent by the PLC host to the PLC device includes the Group Dev Bit Value, and the PLC device receives the writing device application address. Enter the device application address, parse the Group Dev Bit Value written in the device application address, determine the target bit in the group control mapping bit corresponding to the PLC device, and then the PLC device sends a response message to the PLC host.
  • the write device application address response includes the device application address.
  • the PLC host receives the write device application address response, a corresponding relationship can be established based on the device application address in the response message and the target bit of the PLC device.
  • the PLC host also stores a mapping relationship, where the mapping relationship includes a device application address, and a corresponding relationship between each device application address and a bit identifier.
  • the above bit identification method also includes:
  • the PLC host when the PLC host determines that the PLC terminal in the PLC system is logged out, the PLC host is also used to update the mapping relationship.
  • FIG. 8 is a schematic flowchart of a bit identifier allocation method provided in an embodiment of the present application.
  • This bit identification allocation method can be used for PLC devices in PLC systems. The following uses the bit identification allocation method applied to the PLC device in Figure 1 as an example for detailed explanation.
  • the bit identification allocation method includes the following steps:
  • the PLC device receives the writing device application address sent by the PLC host.
  • the PLC device sends a write device application address response to the PLC host.
  • the PLC host allocates the target bit in the corresponding group control mapping bit to the PLC device by writing the device application address, so as to establish a corresponding relationship between the target bit and the PLC device.
  • the PLC system includes PLC host computer and PLC equipment.
  • the PLC host includes a device management module and a first device link module.
  • the PLC device includes a second device connection module and a device control module.
  • the device management module is used to manage PLC devices in the PLC system and allocate target bits to the PLC devices.
  • the first device link module of the PLC host and the second device link module of the PLC device are both used to assemble and parse PLC protocol messages, such as the writing group address described above, and provide protocol message sending and receiving functions.
  • the device control module is used to parse the content of protocol messages and implement device control.
  • the device management module is used to determine the PLC devices to be controlled and the control content (such as attribute changes) corresponding to each PLC device.
  • the first device link module is configured to form a write group address based on the PLC device to be controlled and the control content corresponding to each PLC device, and send the write group address to at least two PLC devices.
  • the written group address includes a group control mapping bit, the group control mapping bit has at least two target bits, and the target bits are used to identify the PLC device.
  • the second device link module is used to receive the write group address, and the device control module is used to parse the write group address and determine whether the write group address is for the current PLC device based on the parsing result. If the written group address is used to control the current PLC device, the PLC device will execute the corresponding action content (such as switch, etc.).
  • the second device link module is also used to form a write group address response and send the write group address response to the PLC host.
  • the first device link module is also configured to receive a write group address response corresponding to the write group address.
  • the device management module is also used to allocate the target bit of the group control mapping bit to the PLC device.
  • the first device link module is based on the location information of the allocated target bit (for example, the target bit is the group control mapping bit).
  • the Nth bit forms a writing device application address, and sends the writing device application address to the PLC device.
  • the writing device application address includes a group control mapping bit, and the group control mapping bit has a target bit. , the target bit is used to identify the PLC device;
  • the second device link module is also used to receive the written device application address.
  • the device control module is also used to parse the written device application address, store the target bit identifier in the written device application address, and establish the current PLC device and target bit identifier. correspondence between them.
  • the second device link module is also used to form a write device application address response, and send a write device application address response corresponding to the write device application address to the PLC host;
  • the first device link module is also configured to receive a write device application address response.
  • FIG. 9 is only an example of a PLC host and a PLC device, and is not limiting. PLC hosts and PLC devices can have more or fewer modules than shown in Figure 9.
  • FIG 10 shows a schematic structural diagram of a PLC host provided by an exemplary embodiment of the present application.
  • the PLC host can be implemented as the function of the PLC host in Figure 1, Figure 4 or Figure 6 above.
  • the PLC host 20 includes: a processor 21 , a bus 22 , a memory 23 and a power line interface 24 .
  • the processor 21 may include one or more central processing units (Central Processing Unit, CPU), such as CPU0 and CPU1.
  • CPU Central Processing Unit
  • the processor 21 executes various functional applications and business processes by running software programs and modules.
  • the power line interface 24 is used to access the power transmission network, analyze the voltage pulse signal and the power line carrier signal in the power transmission network, obtain the data included in the voltage pulse signal or the power line carrier signal, and send the analyzed data to the processor 21 for processing. .
  • the memory 23 and the power line interface 24 are connected to the processor 21 through the bus 22 respectively.
  • Memory 23 may be used to store software programs and modules that are executed by processor 21 . Additionally, the memory 23 Various business data can also be stored in it. In this embodiment of the present application, the software programs and modules stored in the memory 23 may include application program modules 26 required for at least one function executed by the processor 21 .
  • FIG 11 shows a schematic structural diagram of a PLC device provided by an exemplary embodiment of the present application.
  • the PLC device can be implemented as the function of the PLC device in Figure 1, Figure 4 or Figure 6 mentioned above.
  • the PLC device 120 includes: a processor 121, a bus 122, a memory 123 and a power line interface 124.
  • the processor 121 may include one or more central processing units (English: Central Processing Unit, abbreviation: CPU), such as CPU0 and CPU1.
  • CPU Central Processing Unit
  • the processor 121 executes various functional applications and business processes by running software programs and modules.
  • the power line interface 124 is used to access the power transmission network, analyze the voltage pulse signal and power line carrier signal in the power transmission network, obtain the data included in the voltage pulse signal or the power line carrier signal, and send the analyzed data to the processor 121 for processing. .
  • the memory 123 and the power line interface 124 are connected to the processor 121 through the bus 122 respectively.
  • Memory 123 may be used to store software programs and modules that are executed by processor 121 .
  • various types of business data can also be stored in the memory 123 .
  • the software programs and modules stored in the memory 123 may include an application module 126 required for at least one function executed by the processor 121 .
  • embodiments of the present application may be provided as methods, systems, or computer program products. Accordingly, the present application may take the form of a hardware embodiment, a software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) having computer-usable program code embodied therein. These computer program codes may be stored in computer-readable memory that directs a computer or other programmable data processing device to operate in a particular manner.
  • This embodiment also provides a computer storage medium that stores computer instructions.
  • the entrance device executes the above related method steps to implement the batch control method in the above embodiment.
  • This embodiment also provides a computer program product.
  • the computer program product When the computer program product is run on the portal device, it causes the portal device to perform the above related steps to implement the batch control method in the above embodiment.
  • inventions of the present application also provide a device.
  • This device may be a chip, a component or a module.
  • the device may include a connected processor and a memory.
  • the memory is used to store computer execution instructions.
  • the processor can execute computer execution instructions stored in the memory, so that the chip executes the batch control method in each of the above method embodiments.
  • the disclosed devices and methods can be implemented in other ways.
  • the device embodiments described above are only illustrative.
  • the modules or the division of modules are only a logical function division. In actual implementation, there may be other division methods, for example, multiple modules or components may be combined. Either it can be integrated into another device, or some features can be ignored, or not implemented.
  • the coupling or direct coupling or communication connection between each other shown or discussed may be through some interfaces, indirect coupling or communication connection of devices or modules, which may be in electrical, mechanical or other forms.
  • a module described as a separate component may or may not be physically separate.
  • a component shown as a module may be one physical module or multiple physical modules, that is, it may be located in one place, or it may be distributed to multiple different places. Some or all of the modules can be selected according to actual needs to achieve the purpose of the solution of this embodiment.
  • each functional module in each embodiment of the present application can be integrated into one processing module, or each module can exist physically alone, or two or more modules can be integrated into one module.
  • the above integrated modules can be implemented in the form of hardware or software function modules.
  • the integrated module is implemented in the form of a software function module and sold or used as an independent product, it can be stored in a readable storage medium.
  • the technical solutions of the embodiments of the present application are essentially or contribute to the existing technology, or all or part of the technical solution can be embodied in the form of a software product, and the software product is stored in a storage medium , including several instructions to cause a device (which can be a microcontroller, a chip, etc.) or a processor to execute all or part of the steps of the methods described in various embodiments of this application.
  • the aforementioned storage media include: U disk, mobile hard disk, read-only memory (ROM), random access memory (Random Access Memory, RAM), magnetic disk or optical disk and other media that can store program code. .

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Abstract

本申请提供一种批量控制方法及装置，该批量控制方法应用于电力线载波通信PLC主机，批量控制方法包括：向至少两个PLC设备发送写入组地址，写入组地址包括组控映射位，组控映射位包括至少两个目标比特位，每个目标比特位用于标识对应的PLC设备，写入组地址用于控制目标比特位标识的PLC设备；接收PLC设备发送写入组地址响应，通过目标比特位标识PLC设备，以减少写入组地址中PLC设备的标识所占的空间，避免因写入组地址太大导致写入组地址被分包，影响PLC设备的控制效率。

Description

批量控制方法及装置
本申请要求于2022年7月21日提交中国专利局、申请号为202210864914.7，发明名称为“批量控制方法及装置”的中国专利的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及通信技术领域，尤其涉及一种批量控制方法及装置。
背景技术
电力线通信(power line communication，PLC)是指利用电力线作为信息传输媒介进行语音或数据传输的一种通信方式。PLC技术的发送端把载有信息的高频信号加载于电流，然后用电力线传输，接收端把高频信号从电流中分离出来，并传送到计算机或电话以实现信息传递。
例如，现有PLC主机可将《电力线载波通信(PLC)全屋互联标准规范》中定义的写入组地址通过电力线向PLC设备(例如电刷电机、开关电源、荧光灯、卤素灯或其他各种家电)发送，以控制PLC设备的状态(例如卤素灯的打开、关闭、亮度)。其中，写入组地址中通过设备应用地址(DEV Addr)标识待控制的PLC设备。显然，若需通过写入组地址同时对多个PLC设备进行控制，写入组地址中需包括多个PLC设备的设备应用地址，导致写入组地址的报文增大。当写入组地址超出底层链路中规定报文的大小(例如传输控制协议(Transmission Control Protocol，TCP)报文传输的报文最大长度为1472字节)时，将对写入组地址进行分包。然而，分包会使链路层报文数量增多，导致写入组地址在电力线传输的时间过长，影响PLC设备的控制效率。
发明内容
鉴于以上内容，有必要提供一种批量控制方法及装置，通过比特位标识待控制的PLC设备，以减少写入组地址的大小，避免因写入组地址过大导致分包。
第一方面，本申请实施例提供了一种批量控制方法，应用于电力线载波通信PLC主机，所述批量控制方法包括：向至少两个PLC设备发送写入组地址，所述写入组地址包括组控映射位，所述组控映射位包括至少两个目标比特位，每个所述目标比特位用于标识对应的PLC设备，所述写入组地址用于控制所述目标比特位标识的所述PLC设备；接收所述PLC设备发送的写入组地址响应。
采用上述技术方案，在PLC主机向多个PLC设备发送写入组地址时，通过至少两个目标比特位标识至少两个待控制的PLC设备，以实现批量控制多个PLC设备，可减少写入组地址中PLC设备的标识所占用的大小，避免因为写入组地址过大导致分包，影响PLC设备的控制效率。PLC设备接收到该写入组地址之后，依据组控映射位中目标比特位判断该写入组地址是否用于控制当前PLC设备，若该写入组地址用于控制当前的PLC设备，则向PLC主机发送写入组地址响应。
进一步地，组控映射位的大小为N字节，N为正整数。
在上述第一方面的一种可能的实现中，所述批量控制方法还包括：向所述PLC设备发送写入设备应用地址，所述写入设备应用地址用于为所述PLC设备分配目标比特位；接收所述PLC设备发送的写入设备应用地址响应。
采用上述技术方案，PLC主机通过向PLC设备发送写入设备应用地址，以为PLC设备分配对应的目标比特位。
在上述第一方面的一种可能的实现中，所述写入设备应用地址包括所述组控映射位，所述写入设备应用地址的所述组控映射位包括用于标识所述PLC设备的目标比特位。
采用上述技术方案，PLC主机通过向PLC设备发送的写入设备应用地址包括组控映射位，通过组控映射位为PLC设备分配对应的目标比特位。
在上述第一方面的一种可能的实现中，所述组控映射位包括目标比特位和非目标比特位，所述目标比特位的值为1，所述非目标比特位的值为0。
第二方面，本申请实施例提供一种批量控制方法，应用于电力线载波通信PLC设备，所述批量控制方法包括：接收PLC主机发送的写入组地址，所述写入组地址包括组控映射位，所述组控映射位具有至少两个目标比特位，每个所述目标比特位用于标识对应的PLC设备，所述写入组地址用于控制所述目标比特位标识的所述PLC设备；向所述PLC主机发送的所述写入组地址对应的写入组地址响应。
在上述第二方面的一种可能的实现中，所述方法还包括：接收所述PLC主机发送的写入设备应用地址，所述写入设备应用地址包括组控映射位，所述组控映射位包括目标比特位，所述目标比特位用于标识所述PLC设备；向所述PLC主机发送所述写入设备应用地址对应的写入设备应用地址响应。
在上述第二方面的一种可能的实现中，所述组控映射位包括目标比特位和非目标比特位，所述目标比特位的值为1，所述非目标比特位的值为0。
第三方面，提供一种位标识分配方法，应用于电力线载波通信PLC主机，所述位标识分配方法包括：向PLC设备发送写入设备应用地址，所述写入设备应用地址包括组控映射位，所述组控映射位包括目标比特位，所述目标比特位用于标识对应的PLC设备；接收所述PLC设备发送的所述写入设备应用地址对应的写入设备应用地址响应。
在上述第三方面的一种可能的实现中，所述写入设备应用地址还包括设备应用地址，所述设备应用地址用于标识所述PLC设备。
在上述第三方面的一种可能的实现中，所述方法还包括：建立已分配的所述目标比特位与所述设备应用地址之间的对应关系。
第四方面，提供一种位标识分配方法，应用于电力线载波通信PLC设备，所述位标识分配方法包括：接收PLC主机发送的写入设备应用地址，所述写入设备应用地址包括组控映射位，所述组控映射位包括目标比特位，所述目标比特位用于标识所述PLC设备；向所述PLC主机发送所述写入设备应用地址对应的写入设备应用地址响应。
第五方面，提供一种电力线载波通信PLC系统，PLC系统包括PLC主机和多个PLC设备；所述PLC主机用于向所述PLC设备发送写入组地址，所述写入组地址包括组控映射位，所述组控映射位具有至少两个目标比特位，所述目标比特位用于标识所述PLC设备；所述PLC设备用于接收所述PLC主机发送的所述写入组地址，并向所述PLC主机发送所述写入组地址对应的写入组地址响应。
在上述第五方面的一种可能的实现中，所述PLC主机还用于向所述PLC设备发送写入设备应用地址，所述写入设备应用地址包括组控映射位，所述组控映射位具有目标比特位，所述目标比特位用于标识所述PLC设备；所述PLC设备还用于接收所述PLC主机发送所述写入设备应用地址，向所述PLC主机发送所述写入设备应用地址对应的写入设备应用地址响应。
第六方面，提供一种PLC主机，所述PLC主机包括：一个或多个处理器；存储装置，用于存储一个或多个程序；当所述一个或多个程序被所述一个或多个处理器执行，使得所述一个或多个处理器实现如第一方面任一项所述的批量控制方法或如第三方面任一项所述的位标识分配方法。
第七方面，提供一种PLC设备，所述PLC设备包括：一个或多个处理器；存储装置，用于存储一个或多个程序；当所述一个或多个程序被所述一个或多个处理器执行，使得所述一个或多个处理器实现如第二方面任一项所述的批量控制方法或如第四方面所述的位标识分配方法。
第八方面，提供一种计算机可读存储介质，其上存储有计算机程序，所述程序被处理器执行时，实现如第一方面或第二方面中任一项所述的批量控制方法或第三方面或第四方面中任一项所述的位标识分配方法。
应当理解地，第二方面至第八方面中任一种设计所带来的技术效果可参考上文所提供的对应的方法中的有益效果，此处不再赘述。
附图说明
图1为一种PLC系统的架构示意图。
图2为一种用于批量控制的写入组地址的示意图。
图3为本申请实施例提供的一种用于批量控制的写入组地址的示意图。
图4为本申请实施例提供的一种批量控制方法的流程示意图。
图5为本申请实施例提供的另一种批量控制方法的流程示意图。
图6为本申请实施例提供的一种位标识分配方法的流程示意图。
图7A为本申请实施例提供的一种写入设备应用地址的示意图。
图7B为本申请实施例提供的一种分配响应的示意图。
图8为本申请实施例提供的另一种位标识分配方法的流程示意图。
图9为本申请实施例提供的PLC系统的模块图。
图10为本申请实施例提供的PLC主机的结构示意图。
图11为本申请实施例提供的PLC设备的结构示意图。
具体实施方式
以下，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个所述特征。在本申请实施例的描述中，“示例性的”或者“例如”等词用于标识作例子、例证或说明。本申请实施例中被描述为“示例性的”或者“例如”的任何实施例或设计方案不应被解释为比其它实施例或设计方案更优选或更具优势。确切而言，使用“示例性的”或者“例如”等词旨在以具体方式呈现相关概念。
除非另有定义，本文所使用的所有的技术和科学术语与属于本申请中的技术领域的技术人员通常理解的含义相同。本申请的说明书中所使用的术语只是为了描述具体的实施例的目的，不是旨在于限制本申请。应理解，本申请中除非另有说明，“多个”是指两个或多于两个，“和/或”包括关联的所列项目中的一个或多个的任何和所有组合。
为了便于理解，下面结合附图对本申请实施例中的技术方案进行描述。
首先结合图1介绍一种PLC系统的架构示意图。如图1所示，PLC系统包括PLC主机和PLC设备。PLC主机与PLC设备进行PLC通信。其中PLC通信是PLC设备和PLC主机依据电力线载波通信(PLC)全屋互联标准规范进行通信。
PLC主机通过向PLC设备发送控制指令(例如写入组地址)，对PLC系统的PLC设备进行控制。其中，PLC系统可包括多个PLC设备，PLC主机发送的写入设备属性可对单个PLC设备进行控制、PLC主机发送的写入组地址可对多个PLC设备进行批量控制。
示例性地，PLC设备为卤素灯，PLC主机向卤素灯发送控制指令，以控制卤素灯的开闭或控制卤素灯的亮度。
其中，在一些实施例中，PLC主机又称为网关，PLC设备又称为子设备。
进一步地，用户可通过PLC主机的客户端或与PLC主机连接的手机软件APP控制或维护PLC系统。例如，请参见图1，与PLC主机连接的手机软件APP为新接入PLC系统的PLC设备分配设备应用地址。
在全屋智能的应用场景中，PLC主机常常通过广播或组播发送一条写入组地址以控制多个PLC设备。例如，PLC主机通过一条写入组地址同时控制多个智能家电：关闭电视、打开冰箱和客厅的顶灯。
请参见图2，图2是电力线载波通信(PLC)全屋互联标准规范中规定的批量控制多个PLC设备的写入组地址。如图2中所示，DEV Number用于标识写入组地址中待控制的PLC设备的数量。DEV Addr为写入组地址中待控制的PLC设备的设备应用地址，DEV Addr用于标识待控制的PLC设备。例如，DEV Addr1为第一个PLC设备的设备应用地址，DEV Addr2为第二个PLC设备的设备应用地址，DEV Addrn为第n个PLC设备的设备应用地址。Siid、Ciid表示待控制的PLC设备的设备属性变化内容。其中，Siid用于表示PLC设备中用户可使用的功能函数，其包含实现该函数输入输出的数据以及实现该函数的行为。Ciid标识数据或相关行为的特征，例如开关的开或关特性。
可以理解，图2中的每个被控制的PLC设备的设备应用地址的大小为2个字节，若PLC主机通过一条写入组地址同时控制多个PLC设备，例如16个PLC设备，则写入组地址中PLC设备的设备应用地址占用32个字节的空间，很容易导致整个写入组地址的大小超过底层链路规定的报文的大小。例如，以太网帧中的数据长度最大为1500字节，若超过1500字节，则需对报文进行分包处理。而分包后导致需要传输的报文的数量增多，且由于每个PLC主机与多个PLC设备之间通过电力线进行数据的传输，当报文数量增多，写入组地址对应的报文到达对应的PLC设备的时间变长，影响PLC设备的控制效率。
基于上述问题，本申请提供一种批量控制方法、位地址分配方法及装置，通过比特位标识来标识PLC设备，组控映射位包括至少两个目标比特位，每个目标比特位用于标识对应的PLC设备。如此，通过目标比特位标识对应的PLC设备，可有效减少批量控制多个PLC设备时写入组地址中设备应用地址所占的大小，避免因报文过大导致分包进而影响PLC设备的控制效率。
请参见图3，为本申请实施例提供的一种写入组地址的示意图。相较于图2中的写入组地址，图3中的写入组地址通过组控映射位Group DevListBitMap字段同时标识多个PLC设备。
具体地，Group DevListBitMap为N个字节，则Group DevListBitMap具有M个目标比特位，每个比特位可标识一个PLC系统中的一个PLC设备，其中N为正整数，8*N≥M≥2，则写入组地址中的Group Dev Bit Value可同时标识M个PLC设备。
在一些实施例中，由于8*N≥M≥2，则当Group DevListBitMap具有8N个比特位时，Group DevListBitMap中的第M个比特位用于标识目标PLC设备。若写入组地址中Group DevListBitMap中的第M个比特位为预设值(例如，为1)，则表示PLC主机通过组播或广播发送的写入组地址用于控制的PLC设备包括目标PLC设备。若写入组地址中Group DevListBitMap中的第M个比特位不是预设值(例如，为0)，则表示PLC主机通过组播或广播发送的写入组地址控制的PLC设备不包括目标PLC设备。
示例性地，以Group DevListBitMap为2个字节，例如00000000 00000001，PLC设备的位标识为0x0001，即Group DevListBitMap的第一位比特位为例，PLC设备接收到PLC主机发送的写入组地址，解析写入组地址中的Group DevListBitMap(即00000000 00000001)，表示该写入组地址用于控制当前的PLC设备，PLC设备为目标PLC设备。
又示例性地，Group DevListBitMap为2个字节，PLC设备1的位标识为0x0001，则PLC设备1对应Group DevListBitMap的第一位比特位，PLC设备2的位标识为0x0011，则PLC设备2对应Group DevListBitMap的第二位比特位，则PLC设备接收到PLC主机发送的写入组地址，解析写入组地址中的Group DevListBitMap，若Group DevListBitMap为00000000 00000011，则Group DevListBitMap的第一位比特位和第二位比特位均为1，表示该写入组地址用于控制PLC设备1和PLC设备2。
当然，在其他实施例中，目标比特位的预设值为0，若Group DevListBitMap的目标比特位用于标识目标PLC设备，PLC设备接收到的写入组地址中的Group DevListBitMap的目标比特位为预设值，且为0，则表示该写入组地址与当前PLC设备，即用于控制当前PLC设备；PLC设备接收到的写入组地址中的Group DevListBitMap的目标比特位为1，则表示该写入组地址与当前PLC设备无关，即该写入组地址不是用于控制当前PLC设备。
当然，在其他实施例中，M可为1，即Group DevListBitMap中仅包括一个目标比特位，写入组地址中的Group DevListBitMap仅用于标识一个PLC设备。
请参见图4，为本申请实施例提供的一种批量控制方法的流程示意图。该批量控制方法用于PLC系统的PLC主机。下面以批量控制方法应用于图1中的PLC主机为例进行详细说明。
S401、PLC主机向PLC系统内的多个PLC设备发送写入组地址。
具体地，PLC主机可通过广播或组播方式向PLC系统内的多个PLC设备发送写入组地址，写入组地址用于控制至少两个PLC设备，例如，控制多个PLC设备的开或闭。其中，写入组地址包括组控映射位。该组控映射位包括至少两个目标比特位，每个目标比特位用于标识一个PLC设备，写入组地址用于控制目标比特位标识的PLC设备。
若组控映射位为N个字节，则Group DevListBitMap具有M个目标比特位，每个比特位可标识一个PLC系统中的一个PLC设备，其中N为正整数，8*N≥M≥2，则写入组地址中的Group DevListBitMap可同时标识M个PLC设备。
S402、PLC主机接收PLC设备发送的写入组地址响应。
如此，PLC主机向多个PLC设备发送写入组地址，写入组地址包括组控映射位，组控映射位包括多个目标比特位，每个目标比特位用于标识一个PLC设备，则组控映射位可同时标识多个PLC设备，PLC主机可通过写入组地址同时控制多个PLC设备。PLC设备接收到写入组地址，依据写入组地址中的组控映射位判断该写入组地址是否用于控制当前的PLC设备，若该写入组地址用于控制当前的PLC设备，则向PLC主机返回写入组地址响应，并依据目标比特位对应的属性字段执行对应的动作；若写入组地址不是用于控制当前的PLC设备，则忽略该写入组地址。
上述技术方案，通过在写入组地址中组控映射位的目标比特位标识多个PLC设备，相较于图2中通过一个2字节的DEV Addr仅标识一个PLC设备，减少了写入组地址的大小，避免PLC主机控制多个PLC设备时，写入组地址较大导致写入组地址被分包处理，分包处理导致写入组地址传输时间边长，进而影响PLC设备的控制效率。
请参见图5，为本申请实施例提供的一种批量控制方法的流程示意图。该批量控制方法用于PLC系统 的PLC设备。下面以批量控制方法应用于图1中的PLC设备为例进行详细说明。
S501、PLC设备接收PLC主机发送的写入组地址。
其中，写入组地址包括组控映射位，该组控映射位的包括至少两个目标比特位，每个目标比特位用于标识一个对应的PLC设备，写入组地址用于控制目标比特位标识的PLC设备。
S502、PLC设备确定写入组地址用于控制当前PLC设备，并向PLC主机发送写入组地址响应。
如此，PLC设备接收到PLC主机发送的写入组地址，解析写入组地址获取写入组地址内的组控映射位，依据组控映射位确定该写入组地址是否用于控制当前的PLC设备，若该写入组地址用于控制当前的PLC设备，则向PLC主机返回写入组地址响应，并依据目标比特位对应的属性字段执行对应的动作；若写入组地址不是用于控制当前的PLC设备，则忽略该写入组地址。
在一些实施例中，PLC设备接收到PLC主机发送的写入组地址，解析写入组地址获取写入组地址内的组控映射位，判断组控映射位中的目标比特位是否为1，其中目标比特位用于标识当前的PLC设备；若目标比特位的值为1，则确定该写入组地址对应待控制PLC设备包括当前PLC设备，然后获取对应的属性内容(例如Siid、Ciid)，并依据属性内容改变当前PLC设备的属性(例如开、关、亮度)；若目标比特位的值为0，则忽略该写入组地址。
示例性地，假设PLC设备1的目标比特位为组控映射位中的从低位至高位的第三位比特位，PLC设备2的目标比特位为第四位比特位，PLC设备3的目标比特位为第五个比特位，PLC主机发送的写入组地址中包括的组控映射位为00000000 00011000，其中，由于组控映射位中的第四位比特位和第五位比特位为1，表示写入组地址用于控制PLC设备2和PLC设备3的属性内容；由于第三位比特位为0，则标识该写入组地址与PLC设备1无关，即写入组地址不用于控制PLC设备1的属性内容。
其中，每个PLC设备对应的目标比特位可预先配置在PLC设备，例如，当新的PLC设备接入PLC系统，PLC主机可为新增的PLC设备分配组控映射位中的目标比特位，PLC主机和PLC设备中可建立PLC设备与目标比特位的对应关系。具体地，请参见图6，为本申请实施例中提供的一种位标识分配方法的流程示意图。该位标识分配方法应用于PLC系统的PLC主机。下面以位标识分配方法应用于图1中的PLC主机为例进行详细说明。
如图6所示，位标识分配方法包括以下步骤：
S601、PLC主机向PLC设备发送写入设备应用地址。
其中，写入设备应用地址用于为PLC设备分配组控映射位中的目标比特位。
S602、PLC主机接收PLC设备发送的写入设备应用地址响应。
如此，PLC主机通过写入设备应用地址为PLC设备分配对应的组控映射位中的目标比特位，PLC设备接收到写入设备应用地址之后，形成写入设备应用地址响应并向PLC主机发送写入设备应用地址响应，PLC主机和PLC设备可在本地建立目标比特位与PLC设备之间的对应关系。
在一些实施例中，写入设备应用地址包括组控映射位，该组控映射位的目标比特位用于标识PLC设备。如此，PLC设备接收到写入设备应用地址之后，依据写入设备应用地址中的组控映射位确定当前PLC设备对应的目标比特位。
具体地，PLC设备接收到写入设备应用地址中的组控映射位具有8*N个比特，其中目标比特位为1，其余比特位为0，则PLC设备接收到写入设备应用地址后，确定目标比特位为1的对应当前PLC设备。
当然，在其他实施例中，PLC主机可将发送的写入设备应用地址中的组控映射位的目标比特位设置为0，其他比特位设置为1，则PLC设备接收到写入设备应用地址后，确定目标比特位为0的对应当前PLC设备。
当然，在其他实施例中，PLC主机向PLC设备发送的写入设备应用地址中包括PLC设备对应的目标比特位在组控映射位的位数，例如组控映射位的第N位比特位用于标识对应的PLC设备，则写入设备应用地址包括组位地址数值Group Dev Bit Value，且该Group Dev Bit Value的值为N，PLC设备接收到写入设备应用地址之后，依据写入设备应用地址中的Group Dev Bit Value的值确定组控映射位的第N位比特位用于标识当前的PLC设备。
请参见图7A和图7B，为本申请实施例提供的写入设备应用地址和分配响应的示意图，PLC主机向PLC设备发送的写入设备应用地址中包括Group Dev Bit Value，PLC设备接收到写入设备应用地址，解析写入设备应用地址中的Group Dev Bit Value，确定PLC设备对应的组控映射位中的目标比特位，然后PLC设备向PLC主机发送响应消息。
请参见图7B，写入设备应用地址响应中包括设备应用地址，当PLC主机接收到写入设备应用地址响应时，可以基于响应消息中的设备应用地址与PLC设备的目标比特位建立对应关系。
在一些实施例中，PLC主机还存储有映射关系，其中映射关系包括设备应用地址、及每个设备应用地址和位标识的对应关系。PLC主机向PLC设备发送写入设备应用地址之后，上述位标识方法还包括：
依据PLC设备对应的目标比特位更新映射关系。
在一些实施例中，当PLC主机确定PLC系统中的PLC终端被注销之后，则PLC主机还用于更新映射关系。
请参见图8，为本申请实施例中提供的一种位标识分配方法的流程示意图。该位标识分配方法可用于PLC系统的PLC设备。下面以位标识分配方法应用于图1中的PLC设备为例进行详细说明。
位标识分配方法包括以下步骤：
S801、PLC设备接收PLC主机发送的写入设备应用地址。
S802、PLC设备向PLC主机发送写入设备应用地址响应。
如此，PLC主机通过写入设备应用地址为PLC设备分配对应的组控映射位中的目标比特位，以将目标比特位与PLC设备建立对应关系。
请参见图9，为本申请实施例提供的PLC系统的模块示意图。PLC系统包括PLC主机和PLC设备。PLC主机包括设备管理模块和第一设备链路模块。PLC设备包括第二设备连接模块和设备控制模块。其中，设备管理模块用于管理PLC系统中的PLC设备，并为PLC设备分配目标比特位。PLC主机的第一设备链路模块和PLC设备的第二设备链路模块均用于组装和解析PLC协议报文，例如上文所述的写入组地址，并提供协议报文收发功能。设备控制模块用于解析协议报文内容并实现设备控制。
举例来说，设备管理模块用于确定待控制的PLC设备及每个PLC设备对应的控制内容(例如属性变化)。第一设备链路模块用于依据待控制的PLC设备及每个PLC设备对应的控制内容形成写入组地址，并向至少两个PLC设备发送写入组地址。所述写入组地址包括组控映射位，所述组控映射位具有至少两个目标比特位，所述目标比特位用于标识所述PLC设备。
第二设备链路模块用于接收写入组地址，设备控制模块用于解析写入组地址并依据解析结果确定写入组地址是否针对当前PLC设备。若写入组地址用于控制当前的PLC设备，则PLC设备执行对应的动作内容(例如开关等)。第二设备链路模块还用于形成写入组地址响应，并将写入组地址响应向PLC主机发送。
第一设备链路模块还用于接收写入组地址对应的写入组地址响应。
在一些实施例中，设备管理模块还用于为PLC设备分配组控映射位的目标比特位，第一设备链路模块依据分配的目标比特位的位置信息(例如目标比特位为组控映射位的第N位比特位)形成写入设备应用地址，并向所述PLC设备发送写入设备应用地址，所述写入设备应用地址包括组控映射位，所述组控映射位具有目标比特位，所述目标比特位用于标识所述PLC设备；
第二设备链路模块还用于接收写入设备应用地址，设备控制模块还用于解析写入设备应用地址，并存储写入设备应用地址中的目标位标识，建立当前PLC设备与目标位标识之间的对应关系。第二设备链路模块还用于形成写入设备应用地址响应，并向PLC主机发送写入设备应用地址对应的写入设备应用地址响应；
第一设备链路模块还用于接收写入设备应用地址响应。
可理解地，图9仅作为PLC主机和PLC设备的一种示例，而非限定。PLC主机和PLC设备可以有比图9所示的更多或更少的模块。
请参考图10，其示出了本申请一个示例性实施例提供的PLC主机的结构示意图。该PLC主机可以实现为上述图1中、图4或图6中PLC主机的功能。
该PLC主机20包括：处理器21、总线22、存储器23以及电力线接口24。
处理器21可以包括一个或者一个以上中央处理单元(Central Processing Unit，CPU)，例如CPU0、CPU1。处理器21通过运行软件程序以及模块，从而执行各种功能应用以及业务处理。
电力线接口24用于接入输电网络，并解析输电网络中的电压脉冲信号和电力线载波信号，获得电压脉冲信号或者电力线载波信号中包括的数据，并将解析获得的数据发送给处理器21进行处理。
存储器23和电力线接口24分别通过总线22与处理器21相连。
存储器23可用于存储软件程序以及模块，该软件程序以及模块由处理器21执行。此外，该存储器23 中还可以存储各类业务数据。在本申请实施例中，存储器23中存储的软件程序以及模块中可以包括由处理器21执行的至少一个功能所需的应用程序模块26。
请参考图11，其示出了本申请一个示例性实施例提供的PLC设备的结构示意图。该PLC设备可以实现为上述图1中、图4或图6中PLC设备的功能。
该PLC设备120包括：处理器121、总线122、存储器123以及电力线接口124。
处理器121可以包括一个或者一个以上中央处理单元(英文：Central Processing Unit，缩写：CPU)，例如CPU0、CPU1。处理器121通过运行软件程序以及模块，从而执行各种功能应用以及业务处理。
电力线接口124用于接入输电网络，并解析输电网络中的电压脉冲信号和电力线载波信号，获得电压脉冲信号或者电力线载波信号中包括的数据，并将解析获得的数据发送给处理器121进行处理。
存储器123和电力线接口124分别通过总线122与处理器121相连。
存储器123可用于存储软件程序以及模块，该软件程序以及模块由处理器121执行。此外，该存储器123中还可以存储各类业务数据。
在本发明实施例中，存储器123中存储的软件程序以及模块中可以包括由处理器121执行的至少一个功能所需的应用程序模块126。
本领域内的技术人员应明白，本申请的实施例可提供为方法、系统、或计算机程序产品。因此，本申请可采用硬件实施例、软件实施例、或结合软件和硬件方面的实施例的形式。而且，本申请可采用在一个或多个其中包含有计算机可用程序代码的计算机可用存储介质(包括但不限于磁盘存储器、CD-ROM、光学存储器等)上实施的计算机程序产品的形式。这些计算机程序代码可以存储在能引导计算机或其他可编程数据处理设备以特定方式工作的计算机可读存储器中。
本实施例还提供一种计算机存储介质，该计算机存储介质中存储有计算机指令，当该计算机指令在入口设备上运行时，使得入口设备执行上述相关方法步骤实现上述实施例中的批量控制方法。
本实施例还提供了一种计算机程序产品，当该计算机程序产品在入口设备上运行时，使得入口设备执行上述相关步骤，以实现上述实施例中的批量控制方法。
另外，本申请的实施例还提供一种装置，这个装置具体可以是芯片，组件或模块，该装置可包括相连的处理器和存储器；其中，存储器用于存储计算机执行指令，当装置运行时，处理器可执行存储器存储的计算机执行指令，以使芯片执行上述各方法实施例中的批量控制方法。
通过以上的实施方式的描述，所属领域的技术人员可以清楚地了解到，为描述的方便和简洁，仅以上述各功能模块的划分进行举例说明，实际应用中，可以根据需要而将上述功能分配由不同的功能模块完成，即将装置的内部结构划分成不同的功能模块，以完成以上描述的全部或者部分功能。
在本申请所提供的几个实施例中，应该理解到，所揭露的装置和方法，可以通过其他的方式实现。例如，以上所描述的装置实施例仅仅是示意性的，例如，该模块或模块的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个模块或组件可以结合或者可以集成到另一个装置，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或模块的间接耦合或通信连接，可以是电性，机械或其他的形式。
作为分离部件说明的模块可以是或者也可以不是物理上分开的，作为模块显示的部件可以是一个物理模块或多个物理模块，即可以位于一个地方，或者也可以分布到多个不同地方。可以根据实际的需要选择其中的部分或者全部模块来实现本实施例方案的目的。
另外，在本申请各个实施例中的各功能模块可以集成在一个处理模块中，也可以是各个模块单独物理存在，也可以两个或两个以上模块集成在一个模块中。上述集成的模块既可以采用硬件的形式实现，也可以采用软件功能模块的形式实现。
该集成的模块如果以软件功能模块的形式实现并作为独立的产品销售或使用时，可以存储在一个可读取存储介质中。基于这样的理解，本申请实施例的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的全部或部分可以以软件产品的形式体现出来，该软件产品存储在一个存储介质中，包括若干指令用以使得一个设备(可以是单片机，芯片等)或处理器(processor)执行本申请各个实施例所述方法的全部或部分步骤。而前述的存储介质包括：U盘、移动硬盘、只读存储器(Read-Only Memory，ROM)、随机存取存储器(Random Access Memory，RAM)、磁碟或者光盘等各种可以存储程序代码的介质。
以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何在本申请揭露的技 术范围内的变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以所述权利要求的保护范围为准。

Claims (10)

  1. 一种批量控制方法，其特征在于，所述批量控制方法应用于电力线载波通信PLC主机，所述批量控制方法包括：
    向至少两个PLC设备发送写入组地址，所述写入组地址包括组控映射位，所述组控映射位包括至少两个目标比特位，每个所述目标比特位用于标识对应的PLC设备，所述写入组地址用于控制所述目标比特位标识的所述PLC设备；
    接收所述PLC设备发送的写入组地址响应。
  2. 如权利要求1所述的批量控制方法，其特征在于，所述批量控制方法还包括：
    向所述PLC设备发送写入设备应用地址，所述写入设备应用地址用于为所述PLC设备分配目标比特位；
    接收所述PLC设备发送的写入设备应用地址响应。
  3. 如权利要求2所述的批量控制方法，其特征在于，所述写入设备应用地址包括所述组控映射位，所述组控映射位包括用于标识所述PLC设备的目标比特位。
  4. 如权利要求2所述的批量控制方法，其特征在于，所述写入设备应用地址包括组位地址数值，所述包括组位地址数值用于指示所述PLC设备对应的目标比特位在所述组控映射位中的位数。
  5. 一种批量控制方法，其特征在于，所述批量控制方法应用于PLC设备，所述批量控制方法包括：
    接收PLC主机发送的写入组地址，所述写入组地址包括组控映射位，所述组控映射位具有至少两个目标比特位，每个所述目标比特位用于标识对应的PLC设备，所述写入组地址用于控制所述目标比特位标识的所述PLC设备；
    确定所述写入组地址用于控制当前所述PLC设备，并向所述PLC主机发送写入组地址响应。
  6. 如权利要求5所述的批量控制方法，其特征在于，所述批量控制方法还包括：
    接收所述PLC主机发送的写入设备应用地址，所述写入设备应用地址用于为所述PLC设备分配所述目标比特位；
    向所述PLC主机发送写入设备应用地址响应。
  7. 如权利要求6所述的批量控制方法，其特征在于，所述写入设备应用地址包括组控映射位，所述组控映射位包括用于标识所述PLC设备的目标比特位。
  8. 一种PLC主机，其特征在于，所述PLC主机包括：
    一个或多个处理器；
    存储装置，用于存储一个或多个程序；
    所述一个或多个程序被所述一个或多个处理器执行，使得所述一个或多个处理器实现如权利要求1至4中任一项所述的批量控制方法。
  9. 一种PLC设备，其特征在于，所述PLC设备包括：
    一个或多个处理器；
    存储装置，用于存储一个或多个程序；
    所述一个或多个程序被所述一个或多个处理器执行，使得所述一个或多个处理器实现如权利要求5至7中任一项所述的批量控制方法。
  10. 一种计算机可读存储介质，其上存储有计算机程序，其特征在于，所述计算机程序被处理器执行时，实现如权利要求1至7中任一项所述的批量控制方法。
PCT/CN2023/107059 2022-07-21 2023-07-12 批量控制方法及装置 WO2024017121A1 (zh)

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