WO2024016870A1

WO2024016870A1 - Signal processing method, device, and system

Info

Publication number: WO2024016870A1
Application number: PCT/CN2023/098494
Authority: WO
Inventors: 程宁
Original assignee: 苏州旭创科技有限公司
Priority date: 2022-07-18
Filing date: 2023-06-06
Publication date: 2024-01-25
Also published as: CN114928409A; CN114928409B

Abstract

The present invention relates to a signal processing method, device, and system. The method comprises: performing direct-current balance coding on a signal sent by a signal source, so as to obtain a coded signal; modulating the coded signal to obtain a modulated signal; and sending the modulated signal to a receiving end so as to instruct the receiving end to perform high-pass filtering processing on the received modulated signal to obtain a modulated signal of which the frequency is higher than a preset value, and demodulating and decoding the modulated signal of which the frequency is higher than the preset value, so as to obtain a processed signal. According to embodiments of the present invention, high-pass filtering processing is performed on the received modulated signal at the receiving end to obtain the modulated signal of which the frequency is higher than the preset value, such that the effect of MPI noise on the transmission performance can be effectively reduced, and the tolerance to the MPI noise is improved.

Description

Signal processing methods, devices and systems

This application claims priority to the Chinese patent application filed with the China Patent Office on July 18, 2022, with the application number 202210838818.5 and the invention title "Method, Device and System for Signal Processing", the entire content of which is incorporated into this application by reference. middle.

Technical field

The present disclosure relates to the field of communication technology, and in particular to signal processing methods, devices and systems.

Background technique

With the development of the field of communication technology, high-order modulation technologies that increase bit rates have emerged, such as pulse amplitude modulation (PAM) and dual-binary modulation. However, high-order modulation signals are more susceptible to the multi-path interference (MPI) effect during transmission. In the actual transmission system, the optical transmitting end, optical receiving end and optical fiber connector will cause reflection. During the transmission process, the modulated signal passes through multiple reflection end surfaces, causing a multipath interference effect, and the MPI noise generated by the multipath interference effect has a negative impact on the detection of the transmitted signal. MPI noise causes the bit error rate to increase significantly, thereby bringing a large optical power cost to the optical transmission system.

In related technologies, the return loss of optical transmitters, optical receivers and optical fiber connectors is strictly limited. For example, international standards such as IEEE802.3 and 100G Lambda MSA have increased the maximum return loss of optical fiber connectors from the original -26dB. reduced to -35dB. However, in the actual optical fiber links that have been deployed, because there are many optical fiber connectors, and the return loss of the optical fiber connectors is difficult to control below -35dB, MPI noise in the actual system may have a great impact on the modulated signal. The cost of optical power, and even in some actual links, even if complex forward error correction (FEC) is used, error-free transmission still cannot be achieved. How to reduce the impact of multiple interference on optical transmission? Impact is an issue that has been plaguing the industry.

Contents of the invention

The present disclosure provides a signal processing method, device and system to at least solve the problem in related technologies of reducing the impact of multipath interference noise on optical transmission. The technical solutions of the present disclosure are as follows:

According to a first aspect of the embodiment of the present disclosure, a signal processing method is provided, which is applied to the sending end, The methods include:

Perform DC balance encoding on the signal emitted by the signal source to obtain the encoded signal;

Perform modulation processing on the encoded signal to obtain a modulated signal;

Send the modulated signal to the receiving end to instruct the receiving end to perform high-pass filtering on the received modulated signal to obtain a modulated signal with a frequency higher than a preset value, and to filter the modulated signal with a frequency higher than the preset value. Perform demodulation and decoding to obtain the processed signal.

In a possible implementation, the modulation processing includes pulse amplitude modulation processing, and performing DC balance encoding on the signal emitted by the signal source to obtain a coded signal includes:

According to the modulation order of pulse amplitude modulation, determine the number of signals sent by the signal source to be demultiplexed;

Demultiplexing the signal into the number of sub-signals;

Perform DC balance coding on the said number of sub-signals respectively to obtain the said number of sub-coded signals;

The step of performing modulation processing on the encoded signal to obtain a modulated signal includes:

Pulse amplitude modulation is performed according to the number of sub-coded signals to obtain a modulated signal.

In a possible implementation, the pulse amplitude modulation is performed according to the number of sub-coded signals to obtain a modulated signal, which includes:

Convert the said number of sub-coded signals into Gray code signals according to Gray code conversion rules;

Pulse amplitude modulation is performed according to the Gray code signal to obtain a modulated signal.

In a possible implementation, the modulated signal includes a dual-binary modulated signal, and performing modulation processing on the encoded signal to obtain a modulated signal includes:

The encoded signal is subjected to duobinary modulation processing to obtain a duobinary modulated signal.

Obtain a coded signal delayed by a preset bit from the coded signal;

Perform XOR processing on the encoded signal and the encoded signal of the delayed preset bits to obtain a precoded signal;

Perform precoding processing and duobinary modulation processing on the precoded signal to obtain a duobinary modulated signal.

In a possible implementation, the DC balanced encoding includes at least one of the following:

8B10B encoding, MB810 encoding, 5S/6S encoding, 27S/32S encoding.

According to a second aspect of an embodiment of the present disclosure, a signal processing device is provided, including:

The encoding module is used to perform DC balance encoding on the signal emitted by the signal source to obtain the encoded signal;

A modulation module, used to modulate the encoded signal to obtain a modulated signal;

A processing module configured to send the modulated signal to the receiving end to instruct the receiving end to perform high-pass filtering on the received modulated signal to obtain a modulated signal with a frequency higher than a preset value. The modulated signal of the value is demodulated and decoded to obtain the processed signal.

In a possible implementation, the modulation processing includes pulse amplitude modulation processing, and the encoding module includes:

The determination submodule is used to determine the number of demultiplexing signals sent by the signal source according to the modulation order of the pulse amplitude modulation;

Demultiplexing sub-module, used to demultiplex the signal into the number of sub-signals;

A coding sub-module, used to perform DC balance coding on the said number of sub-signals respectively, to obtain the said number of sub-coded signals;

The modulation module includes:

The first modulation sub-module is used to perform pulse amplitude modulation according to the number of sub-coded signals to obtain a modulated signal.

In a possible implementation, the first modulation sub-module includes:

A conversion unit, used to convert the said number of sub-coded signals into Gray code signals according to Gray code conversion rules;

A modulation unit, configured to perform pulse amplitude modulation according to the Gray code signal to obtain a modulated signal.

In a possible implementation, the modulation signal includes a duobinary modulation signal, and the modulation module includes:

The second modulation submodule is used to perform duobinary modulation processing on the encoded signal to obtain a duobinary modulated signal.

Acquisition submodule, used to acquire a coded signal delayed by preset bits from the coded signal;

A processing submodule, configured to perform XOR processing on the encoded signal and the encoded signal of the delayed preset bits to obtain a precoded signal;

The third modulation submodule is used to perform precoding processing and duobinary modulation processing on the precoded signal to obtain a duobinary modulated signal.

8B10B encoding, MB810 encoding, 5S/6S encoding, 27S/32S encoding.

According to a third aspect of an embodiment of the present disclosure, a signal processing system is provided, including a sending end and a receiving end, wherein the sending end includes:

Encoder is used to perform DC balanced encoding on the signal emitted by the signal source to obtain the encoded signal;

A modulator, used to modulate the encoded signal to obtain a modulated signal;

Modulated laser, used to send the modulated signal to the receiving end;

The receiving end includes:

Photoelectric receiver for receiving modulated signals;

A high-pass filter is used to perform high-pass filtering on the received modulated signal to obtain a modulated signal with a frequency higher than the preset value;

A decoder is used to demodulate and decode the modulated signal with a frequency higher than the preset value to obtain a processed signal.

According to a third aspect of an embodiment of the present disclosure, an electronic device is provided, including:

processor;

memory for storing instructions executable by the processor;

Wherein, the processor is configured to execute the instructions to implement the signal processing method as described in any one of the embodiments of the present disclosure.

According to a fourth aspect of an embodiment of the present disclosure, a computer-readable storage medium is provided, which when instructions in the computer-readable storage medium are executed by a processor of an electronic device, enables the electronic device to execute implementations of the present disclosure. The signal processing method described in any one of the examples.

According to a fifth aspect of an embodiment of the present disclosure, a computer program product is provided. The computer program product includes instructions. When the instructions are executed by a processor of an electronic device, the electronic device causes the electronic device to The method of signal processing according to any one of the embodiments of the present disclosure can be performed.

The technical solution provided by the embodiments of the present disclosure at least brings the following beneficial effects: In the embodiments of the present disclosure, DC balance encoding is performed on the signal emitted by the signal source to obtain a coded signal. Through DC balance coding, the number of high levels and the number of low levels in the signal can be kept equal. After modulating the coded signal, the energy of the modulated signal in the low frequency band near zero frequency can be very low. Therefore, the embodiment of the present disclosure performs high-pass filtering on the received modulated signal at the receiving end to obtain a modulated signal with a frequency higher than the preset value, which can effectively reduce the impact of MPI noise on transmission performance and improve the tolerance of MPI noise. Spend.

It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only, and do not limit the present disclosure.

Description of drawings

The drawings herein are incorporated into and constitute a part of this specification, illustrate embodiments consistent with the disclosure, and together with the description are used to explain the principles of the disclosure, and do not constitute undue limitations on the disclosure.

Figure 1 is an application environment diagram of a signal processing method according to an exemplary embodiment;

Figure 2 is a flow chart of a signal processing method according to an exemplary embodiment;

Figure 3 is a schematic diagram of the MPI noise spectrum generated by PAM4 signal transmission through optical fiber according to an exemplary embodiment;

Figure 4 is a schematic diagram of the MPI noise spectrum generated by PAM4 signal transmission through optical fiber according to another exemplary embodiment;

Figure 5 is a schematic diagram of the MPI noise spectrum generated by PAM4 signal transmission through optical fiber according to another exemplary embodiment;

Figure 6 is a flow chart of a signal processing method according to another exemplary embodiment;

Figure 7 is a flow chart of a signal processing method according to another exemplary embodiment;

Figure 8 is a flow chart of a signal processing method according to another exemplary embodiment;

Figure 9 is a flow chart of a signal processing method according to another exemplary embodiment;

Figure 10 is a flow chart of a signal processing method according to another exemplary embodiment;

Figure 11 is a flow chart of a signal processing method according to another exemplary embodiment;

Figure 12 is a schematic diagram of the power spectrum of an 8B10B encoded PAM4 signal according to an exemplary embodiment;

Figure 13 is a schematic diagram of the power spectrum of a duobinary signal according to another exemplary embodiment;

Figure 14 is a schematic diagram of a bit error rate curve of 25Gbaud PAM4 optical signal transmission according to an exemplary embodiment;

Figure 15 is a schematic diagram of the optical power cost of the 25Gbaud PAM4 optical transmission system under different MPIs according to another exemplary embodiment;

Figure 16 is a schematic block diagram of a signal processing device according to an exemplary embodiment;

Figure 17 is a schematic block diagram of an electronic device according to an exemplary embodiment.

Detailed ways

In order to allow ordinary people in the art to better understand the technical solutions of the present disclosure, the technical solutions in the embodiments of the present disclosure will be clearly and completely described below in conjunction with the accompanying drawings.

It should be noted that the terms "first", "second", etc. in the description and claims of the present disclosure and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It is to be understood that the data so used are interchangeable under appropriate circumstances so that the embodiments of the disclosure described herein can be practiced in sequences other than those illustrated or described herein. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present disclosure. Rather, they are merely examples of apparatus and methods consistent with aspects of the disclosure as detailed in the appended claims.

It should also be noted that the user information (including but not limited to user equipment information, user personal information, etc.) and data (including but not limited to data for display, analyzed data, etc.) involved in this disclosure are all obtained from users. Information and data authorized or fully authorized by all parties.

In order to facilitate those skilled in the art to understand the technical solutions provided by the embodiments of the present disclosure, the technical environment in which the technical solutions are implemented is first described below.

In view of the impact of MPI noise on high-order modulated signals, filtering methods are used in related technologies to reduce noise. However, when the MPI noise is large or the high-order modulation signal has large chirps, the MPI noise cannot be effectively filtered. For the high-order modulation signal generated by a Directly Modulated Laser (DML), the signal itself has a large chirp, which causes the MPI noise to extend to high frequencies. Therefore, the filtering method It is basically ineffective in reducing MPI noise. In addition, at the receiving end, the high-order modulation signal will produce DC drift after being filtered, which will adversely affect the recovery of the modulation signal.

Based on actual technical requirements similar to those described above, embodiments of the present disclosure propose signal processing methods, devices, and systems.

The signal processing method provided by the present disclosure can be applied in the application environment as shown in Figure 1.

Among them, the sending end 110 communicates with the receiving end 120 through optical fiber. The transmitting end 110 may be, but is not limited to, various encoders and modulated lasers. The modulated lasers include, but are not limited to, EML (Electroabsorption-Modulated Laser), DML (Direcctly Modulated Laser), MZM (Mach-Zehnder Modualtor, photoelectric modulator). The receiving end 120 may be, but is not limited to, various photodiodes, transimpedance amplifiers, high-pass filters, decoders, etc. The signal S sent by the signal source undergoes DC balance encoding and modulation processing, and the optical signal is sent out through the modulated laser. During the transmission of optical signals over optical fibers, MPI noise will be generated due to reflections at the transmitting end, receiving end and optical fiber link. The optical signal with MPI noise is received by the photodiode at the receiving end, where the photodiode is used to convert the optical signal. into an electrical signal, and is amplified by a transimpedance amplifier (TIA, transimpedance amplifier), and then passed through a high-pass filter to filter out the low-frequency MPI noise, reducing the impact of MPI noise on signal recovery, and finally the processed signal S ^' ( restore signal).

Fig. 2 is a flow chart of a signal processing method according to an exemplary embodiment. As shown in Fig. 2, the method is used in a transmitting end and includes the following steps.

In step S201, DC balance encoding is performed on the signal sent by the signal source to obtain a coded signal.

In the embodiment of the present disclosure, the signal sent by the signal source is used as data to be transmitted, and its format includes but is not limited to binary, octal, and hexadecimal. The signal is subjected to DC balanced encoding, where the encoding method of the DC balanced encoding includes but is not limited to 8B10B encoding, MB810 encoding, 5S/6S encoding, and 27S/32S encoding.

In step S203, the encoded signal is modulated to obtain a modulated signal.

In the embodiment of the present disclosure, the encoded signal is modulated, where the modulation method includes but is not limited to pulse amplitude modulation PAM-N (N represents the modulation order), duobinary modulation, non-return to zero binary modulation (NRZ, Non- Return-to-Zero), partial response modulation, and a combination of PAM-N and partial response modulation. PAM signal elements can have multiple levels. For example, PAM4 has four levels, and PAM8 has Eight levels, PAM16 has sixteen levels. Compared with PAM4 signals, duobinary coding can achieve transmission at the same bit rate under the same bandwidth. Among them, duobinary coding has three transmission levels.

In step S205, the modulated signal is sent to the receiving end to instruct the receiving end to perform high-pass filtering on the received modulated signal to obtain a modulated signal with a frequency higher than a preset value. The modulated signal of the value is demodulated and decoded to obtain the processed signal.

In the embodiment of the present disclosure, the modulated signal can be sent to the receiving end through optical fiber communication. Modulated signals are easily affected by MPI noise during transmission. The received modulated signal includes the modulated signal sent by the transmitting end and the MPI noise signal. At the receiving end, the received modulated signal can be converted into an electrical signal through a photodiode, the electrical signal is amplified through a transimpedance amplifier, and the amplified electrical signal is filtered through a high-pass filter to filter out the low-frequency MPI noise, and then process the filtered signal in the demodulation method and decoding method corresponding to the encoding end to obtain the processed signal. For example, the encoding end uses 8B10B encoding, and the decoding end uses 8B10B decoding; the encoding end uses PAM4 modulation, and the decoding end uses PAM4 demodulation. In the embodiment of the present disclosure, the high-pass filter may include any type of high-pass filter, such as a first-order RC high-pass filter or a fourth-order Bessel high-pass filter. This disclosure does not limit this.

In the embodiment of the present disclosure, DC balance encoding is performed on the signal emitted by the signal source to obtain a coded signal. Through DC balance coding, the number of high levels and the number of low levels in the signal can be kept equal. After using the encoded signal for optical modulation, the energy of the modulated signal in the low frequency band near zero frequency can be very low (the power spectrum is in the low frequency band (There is very little energy below 100MHz). Referring to Figures 3 to 5, the transmitter uses a 25Gbaud PAM4 signal to modulate the EML signal. During the transmission process in the optical fiber, MPI noise is generated due to link reflection. Figure 3 corresponds to the effective MPI of MPI at -36dB. Noise power spectrum, Figure 4 corresponds to the MPI noise power spectrum when the effective MPI is -33dB, and Figure 5 corresponds to the MPI noise power spectrum when the effective MPI is -30dB. It can be seen that the MIP noise power spectrum is distributed within 0-25GHz, but the main energy is distributed in the low frequency band. Therefore, the embodiment of the present disclosure performs high-pass filtering on the received modulated signal at the receiving end to obtain a modulated signal with a frequency higher than the preset value, thereby filtering out most of the MPI noise. Therefore, in the embodiment of the present disclosure, the transmitter uses DC balanced coding and the receiver uses high-pass filtering technology, which can effectively reduce the impact of MPI noise on transmission performance and improve the tolerance to MPI noise. In addition, since DC balanced encoding does not have zero frequency components, it will not DC drift is generated, so high-pass filtering does not affect the recovery of the modulated signal.

In a possible implementation, the modulation processing includes pulse amplitude modulation processing. Step S201, performing DC balance coding on the signal sent by the signal source to obtain a coded signal, including:

Demultiplexing the signal into the number of sub-signals;

Step S203, perform modulation processing on the encoded signal to obtain a modulated signal, including:

In this embodiment of the present disclosure, the pulse amplitude modulation may include PAM-N, where N represents the modulation order, such as PAM4, PAM8, PAM16 or higher-order PAM coding. According to the modulation order of pulse amplitude modulation, such as N, in one example, the number of demultiplexing signals sent by the signal source is determined to be log2N. Demultiplex the signal into the number of sub-signals. For example, when N is 4, the signal is split into two signals; when N is 8, the signal is split into three signals. signal; when N is 16, the signal is split into four signals. A specific demultiplexing method may include sequentially allocating the code stream corresponding to the signal emitted by the signal source to a number of sub-signals corresponding to the modulation order to obtain a corresponding number of sub-encoded signals. In an example, refer to FIG. 6 , taking PAM4 as an example. Since the modulation order of PAM4 is 4, the number of demultiplexing is 2. The signal sent by the signal source corresponds to the binary code stream 0101111000100110. This code stream is allocated to the upper and lower sub-signal code streams in sequence. For example, the first number 0 is allocated to the first sub-signal 601, and the second number 1 is allocated to For the second sub-signal 602, the third number 0 is assigned to the first sub-signal 601, and the fourth number 1 is assigned to the second sub-signal 602, and so on. It happens to be the odd-numbered digits of the binary code stream. The first sub-signal 601, specifically 00110101, and the even-digit numbers of the binary code stream (the numbers underlined in the aforementioned binary code stream) constitute the second sub-signal 602, specifically 11100010.

In one example, referring to FIG. 7 , taking PAM8 as an example, since the modulation order of PAM8 is 8, the number of demultiplexing is 3. The signal S sent by the signal source is 001011001111100011011101, and the code stream is sequentially allocated to the first sub-signal 701, the second sub-signal 702, and the third sub-signal 703. Specifically, the first number 0 of the signal S is assigned to the first sub-signal 701 as the first number of the first sub-signal 701. A number; assign the second number 1 of the signal S to the second sub-signal 702 as the first number of the second sub-signal 702; assign the third number 1 of the signal S to the third sub-signal 703 , as the first number of the third sub-signal 703; assign the fourth number 0 of the signal S to the first sub-signal 701, as the second number of the first sub-signal 701; assign the fifth number of the signal S The number 1 is assigned to the second sub-signal 702 as the second number of the second sub-signal 702; the sixth number 1 of the signal S is assigned to the third sub-signal 703 as the third number of the third sub-signal 703. numbers, and so on, respectively, to obtain the first sub-signal 701, specifically 00011001; the second sub-signal 702, specifically 01010110; and the third sub-signal 703, specifically 11110111. Similarly, if it is PAM16, the signal from the signal source can be demultiplexed into four channels. The specific demultiplexing method is the same as above and will not be described again here.

The said number of sub-signals are respectively subjected to DC balance coding to obtain the said number of sub-encoded signals. DC balanced encoding takes 8B10B as an example. In one example, as described with reference to Figure 6 , the first sub-signal 601 is encoded by 8B10B and becomes the first sub-encoded signal 603, specifically: 0011011010. The second sub-signal 602 is encoded by 8B10B and becomes the second sub-encoded signal 604, specifically: 1110000101. Pulse amplitude modulation is performed according to the number of sub-coded signals to obtain a modulated signal. In one example, referring to FIG. 6 , the first sub-encoding signal 603 can be used as the most significant bit (MSB) of PAM4, and the second sub-encoding signal 604 can be used as the least significant bit (LSB) of PAM4. significant bit). In another example, the first sub-encoding signal 603 may also be used as the least significant bit of PAM4, and the second sub-encoding signal 604 may be used as the most significant bit of PAM4. Referring to Figure 6, taking the first sub-encoding signal 603 as the most significant bit of PAM4 as an example, according to the corresponding encoding rules of PAM4: binary 00 is encoded as PAM4 symbol 0, binary 01 is encoded as PAM4 symbol 1, binary 10 is encoded as PAM4 symbol 2, and binary 11 is encoded as PAM4 symbol 3. The first number 0 of the first sub-encoding signal 603 is used as the most significant bit of the first symbol of PAM4, and the first number 1 of the second sub-encoding signal 604 is used as the least significant bit of the first symbol of PAM, Then the first code element of PAM4 is 01. According to the encoding rules of PAM4, 01 corresponds to code element 1, so the first code element of PAM4 is 1. The second number 0 of the first sub-encoding signal 603 is used as the most significant bit of the second symbol of PAM4, and the second number 1 of the second sub-encoding signal 604 is used as the least significant bit of the second symbol of PAM4, According to the encoding rules of PAM4, 01 corresponds to code element 1, so the second code element of PAM4 is 1. By analogy, the PAM4 modulated signal 605 is obtained, specifically 1132022121. Next, adjust the PAM4 The DC balanced properties of control signal 605 are described.

Each symbol of PAM4 will be represented by different levels. For example, symbol 0 of PAM4 is represented by -3V, symbol 1 of PAM4 is represented by -1V, symbol 2 is represented by 1V, and symbol 3 is represented by 3V. For the PAM4 modulated signal 605, specifically No. 1132022121, the number of high levels (eg: 1V, 3V) and low levels (eg: -1V, -3V) is equal, so it has DC balance.

The said number of sub-signals are respectively subjected to DC balance coding to obtain the said number of sub-encoded signals. DC balanced encoding takes 8B10B as an example. In one example, as described with reference to Figure 7, the first sub-signal 701 is encoded by 8B10B to obtain the first sub-encoded signal 704, specifically 1100110010; the second sub-signal 702 is encoded by 8B10B to obtain The second sub-encoded signal 705 is specifically 0101011100; the third sub-signal 703 is encoded by 8B10B to obtain the third sub-encoded signal 706, which is specifically 0101110001. The first number 1 of the first sub-encoding signal 704, the first number 0 of the second sub-encoding signal 702, and the first number 0 of the third sub-encoding signal 703 are respectively selected to form 100. According to the encoding rules of PAM8, 100 corresponds to symbol 4, then 4 is used as the first symbol of PAM8. By analogy, the modulated signal of PAM8 is 707, specifically 4703572241.

The above discussed how to encode the binary code stream into a DC-balanced PAM code stream. At the receiving end, it is necessary to perform an inverse transformation according to the aforementioned encoding process to restore the binary code stream. Taking PAM4 using 8B10B encoding as an example, refer to Figure 8. As shown in Figure 8, after the receiving end receives the filtered PAM4 modulated signal, it decodes it through PAM4 to obtain the first sub-encoded signal 603 and the second sub-encoded signal 604. . Perform 8B10B decoding on the first sub-encoded signal 603 to obtain the first sub-signal 601, perform 8B10B decoding on the second sub-encoded signal 604 to obtain the second sub-signal 602, and combine the first sub-signal 601 and the second sub-signal 602 according to The corresponding multiplexing method during encoding is to multiplex the two sub-signals together to obtain the processed signal S ^' .

In the embodiment of the present disclosure, DC balance can be achieved by passing an ordinary binary code stream through 8B10B encoding, MB810 encoding or other DC balanced encoding. However, if the final line encoding is PAM encoding (such as PAM4, PAM8, PAM16 or higher-order PAM encoding), due to PAM encoding rules, the DC-balanced binary code stream will lose part or all of its DC-balanced characteristics after PAM encoding. Take the original code stream 0101111000100110 in Figure 6 as an example. Without the demultiplexing step, DC balanced encoding (8B10B) is directly performed to obtain 01011011001101010011, and then PAM4 encoding is performed to obtain 1123031103. The number of high levels and low levels in the PAM4 signal obtained in this way is not equal. Therefore, the DC balanced binary code stream will lose part or all of its DC balanced characteristics after PAM encoding.

Therefore, for the pulse amplitude modulation processing, the embodiment of the present disclosure determines the number of demultiplexed sub-signals according to the modulation order of the pulse amplitude modulation, and then performs DC balance coding on the sub-signals of the said number. , obtain the said number of sub-coded signals, perform pulse amplitude modulation according to the said number of sub-coded signals, and obtain a modulated signal, which can ensure that the finally obtained modulated signal has DC balanced properties. The subsequent receiving end adopts high-pass filtering technology, which can effectively reduce the impact of MPI noise on transmission performance and improve the tolerance of MPI noise.

Figure 8 is a flow chart of a signal processing method according to an exemplary embodiment. Referring to Figure 8, pulse amplitude modulation is performed according to the number of sub-coded signals to obtain a modulated signal, including:

In the embodiment of the present disclosure, the Gray code is also called a cyclic binary code or a reflected binary code. Taking PAM4 and 8B10B encoding as an example, the code stream corresponding to the signal S sent by the signal source, specifically 010111100100110, can be demultiplexed into the first sub-signal 601 according to the method disclosed in the above embodiment. is 00110101, and the second sub-signal 602 is specifically 11100010. The first sub-signal 601 and the second sub-signal 602 are respectively subjected to 8B10B encoding to obtain a first sub-encoded signal 603, specifically 0011011010, and a second sub-encoded signal 604, specifically 1110000101. According to the Gray code conversion rule, if the bit of the first sub-encoded signal 603 is 0 or 1, the bit of the second sub-encoded signal 604 is flipped, that is, if the bit of the first sub-encoded signal 603 is 1, then the bit of the first sub-encoded signal 603 is 1. The bits of the second sub-encoding signal 604 are flipped; if the bits of the first sub-encoding signal 603 are 0, the bits of the second sub-encoding signal 604 are not inverted. This process can be implemented by XOR logic on the first sub-encoding signal 603 and the second sub-encoding signal 604, as shown in Figure 8, That means XOR logic (i.e. ). By performing Gray code conversion on the first sub-encoded signal and the second sub-encoded signal, a Gray code signal 801 is obtained. Further, the Gray code signal is encoded with PAM4 to obtain a modulated signal 802. Specifically, if the first sub-code (MSB) is 0 and the second sub-code (LSB) is 0, the PAM4 code generated after Gray code conversion is 0; if the first sub-code is 0, the second sub-code is 1. The PAM4 code generated after Gray code conversion is 1; if the first The sub-code is 1, the second sub-code is 1, and the PAM4 code generated by Gray code conversion is 2. If the first sub-code is 1 and the second sub-code is 0, the PAM4 code generated by Gray code conversion is 3. .

As shown in Figure 9, after the receiving end restores the PAM4 code stream, it becomes two binary code streams, MSB code stream 901 and LSB code stream 902, through PAM4 decoding, and then the LSB code stream 902 and the MSB code stream 901 are XORed to form a new LSB code stream 903. After the MSB code stream 901 and the new LSB code stream 903 are decoded 8B10B respectively, they are multiplexed into a binary code stream, which is the original binary code stream S.

In the embodiment of the present disclosure, the sub-encoded signal is converted into a Gray code signal according to Gray code conversion rules. Taking PAM4 encoding as an example, the common PAM4 encoding rules are: binary 00 is encoded as PAM code element 0, binary 01 is encoded as PAM code element 1, binary 10 is encoded as PAM code element 2, and binary 11 is encoded as PAM code element Yuan 3; for PAM4 using Gray code, the encoding rules are: binary 00 is encoded as PAM symbol 0, binary 01 is encoded as PAM symbol 1, binary 11 is encoded as PAM symbol 2, and binary 10 is encoded as PAM code element 3. PAM4 modulation using Gray code, the binary codes represented by two adjacent PAM4 symbols are only different in one bit, and the error symbols caused by symbol misjudgment are often adjacent symbols, and each symbol error The resulting error rate of two bits is very low, so the bit error rate is lower than that of ordinary PAM4 modulation.

In a possible implementation, the modulated signal includes a dual-binary modulated signal. Step S203, performing modulation processing on the encoded signal to obtain a modulated signal, includes:

In the embodiment of the present disclosure, the encoded signal is subjected to duobinary modulation processing to obtain a duobinary modulated signal. The duobinary modulated signal is a duobinary code. The duobinary code converts the original binary logical signal "1" or "0" into logical signals "+1", "-1" and "0" according to certain rules, so that the spectrum bandwidth of the signal is reduced to the original half of. The use of duobinary modulation can reduce the bandwidth occupied by the signal, improve frequency utilization, and increase the transmission distance of optical signals in optical fibers.

In the embodiment of the present disclosure, the encoded signal is subjected to duobinary modulation processing. Compared with the PAM4 modulated signal, the duobinary transmission has better MPI tolerance. At the transmitting end, the signal sent by the source is subjected to DC balance coding, and after dual-binary modulation, high-pass filtering is used at the receiving end, which can better reduce MPI noise interference.

FIG. 10 is a flow chart of a signal processing method according to an exemplary embodiment. Refer to FIG. As shown in 10,

The modulated signal includes a dual-binary modulated signal. Step S203 is to perform modulation processing on the encoded signal to obtain a modulated signal, including:

Obtain a coded signal delayed by a preset bit from the coded signal;

In the embodiment of the present disclosure, before the duobinary modulation processing, referring to the precoding and duobinary coding 1002 in Figure 10 , the precoding signal is subjected to precoding processing and duobinary modulation processing to obtain a duobinary modulated signal. The precoding process includes delaying the precoded signal by preset bits to obtain a delayed precoded signal; and performing XOR processing on the delayed precoded signal and the precoded signal. Through the above precoding processing, the decision making at the receiving end is simpler, and the bit error rate in duobinary transmission can be reduced. However, the precoding process will destroy the DC balance characteristics of the encoded signal. Therefore, referring to the XOR process 1001 in Figure 10, the embodiment of the present disclosure obtains the encoded signal delayed by preset bits from the encoded signal, and performs the encoding on the encoded signal. Exclusive OR processing is performed with the coded signal delayed by the preset bits to obtain a precoded signal. Through the above XOR processing, embodiments of the present disclosure can make the final duobinary modulation signal possess DC balanced properties. In Figure 10, Represents XOR logic, z ^-1 means delaying one bit, represents the algebraic sum.

Referring to Figure 11, at the receiving end, the high-pass filtered duobinary modulated signal is duobinary decoded, and the resulting binary code stream is XORed 1101 to obtain an 8B10B encoded binary code stream. Finally, the 8B10B encoded binary code stream is Decode the binary code stream to obtain the original binary code stream. In one example, the decoding method of duobinary decoding may include: if a duobinary ±1 symbol is received, the decision is bit 0; if the duobinary 0 symbol is received, the decision is bit 1, and the original is restored in the above manner. The binary code stream does not require pre-decoding.

Through the embodiments of the present disclosure, a DC-balanced duobinary coding method is provided, and this method can reduce the bit error rate of duobinary coding. The duobinary code stream is subjected to high-pass filtering at the receiving end to obtain a processed signal. Improved the tolerance of duobinary code streams to MPI noise.

In a possible implementation, the DC balanced encoding includes at least one of the following: 8B10B encoding, MB810 encoding, 5S/6S encoding, and 27S/32S encoding.

Referring to Figure 12, curve 1203 represents the power spectral density of the 50Gbaud/s NRZ signal, curve 1201 represents the power spectral density of the 25Gbaud/s PAM4 signal, and curve 1202 represents the power spectral density of the 25Gbaud/s 8B10B+PAM4 signal. The bit rates of the three signals are all 50Gb/s, but the power spectral density of the 25Gbaud/s PAM4 signal and the 25Gbaud/s 8B10B+PAM4 signal is only half the bandwidth of the 50Gbaud/s NRZ signal. The 25Gbaud/s 8B10B+PAM4 signal has no zero frequency component, so it is a DC balanced signal.

Referring to Figure 13, curve 1303 represents the power spectral density of the 50Gbaud/s NRZ signal, curve 1301 represents the power spectral density of the 25Gbaud/s duobinary signal, and curve 1302 represents the power spectrum of the 25Gbaud/s duobinary coding + 8B10B signal. density. The bit rates of these three signals are all 50Gb/s. The 25Gbaud/s duobinary signal and the 25Gbaud/s duobinary encoding + 8B10B signal are only half of the 50Gbaud NRZ signal. The duobinary coded +8B10B signal at 25Gbaud/s has no zero frequency component and is therefore a DC balanced signal.

Refer to Figure 14, which shows the variation curve of the bit error rate of 25Gbuad PAM4 optical transmission with the received optical power. Among them, MPI=0 means that there is no MPI bit error rate in the optical fiber link, and MPI=-28dB is the equivalent MPI bit error rate of -28dB in the optical fiber link. It can be seen that MPI=-28dB has a great impact on the bit error rate, which is several orders of magnitude worse than the bit error rate without MPI. MPI=-28, 7.5MHz HPF is the bit error rate after the traditional PAM4 signal is transmitted through optical fiber and the receiving end adopts high-pass filtering. The high-pass filter can partially filter out the MPI noise, but it will also cause certain noise to the traditional MPI signal. Distortion (such as baseline drift, baseline wanderer), so the cutoff frequency of the high-pass filter needs to be optimized to achieve the minimum bit error rate. In the figure, MPI=-28, 7.5MHz HPF is the bit error rate after optimization of the high-pass filter cutoff frequency (7.5MHz). Compared with the bit error rate without filter (black dot), the performance is slightly improved. In the figure, MPI=-28, 8B10B&31MHz HPF is the bit error rate of the 8B10B encoded PAM4 signal after being transmitted through optical fiber under the equivalent MPI=-28dB. Since the receiving end uses a high-pass filter (the cutoff frequency is 31MHz after optimization), it can MPI noise is filtered out to the greatest extent, with little impact on the PAM4 signal, so the bit error rate is improved by several orders of magnitude compared to the bit error rate without filtering.

Refer to Figure 15, which shows that under different effective MPI, 25Gbaud/s PAM4 optical transmission is compared with no There is an optical power penalty for MPI optical transmission. Dot PAM4 is the optical power cost of traditional PAM4 transmission under different MPIs. If the optical power cost is limited to ≤1dB, then the tolerance of 25Gbaud/s PAM4 optical transmission to MPI is about -32dB. The square point is the optical power cost of PAM4&HPF of 25Gbaud/s after PAM4 is transmitted through optical fiber and high-pass filtered at the receiving end; the receiving end adopts high-pass filtering with a cutoff frequency of 7.5MHz. At this time, the transmission system's tolerance to MPI is approximately -31dB. Compared with the case where there is no high-pass filter at the receiving end, the MPI tolerance is improved by 1dB. The triangle in the figure is PAM4&8B10BEncoding+HPF, which is the optical power cost when the transmitter uses 8B10B PAM4 encoding and the receiver uses a high-pass filter with a cutoff frequency of 31MHz. The system's tolerance to MPI is about -27dB. Compared with without 8B10B encoding, Without high-pass filtering at the receiving end (as shown by the dots), the MPI tolerance increases by 5dB. It can be seen that through DC balanced coding (such as 8B10B or MB810) at the transmitting end and high-pass filtering at the receiving end, the tolerance of the optical communication system to MPI can be effectively improved.

It should be understood that although various steps in the flowchart are shown in sequence as indicated by arrows, these steps are not necessarily executed in the order indicated by arrows. Unless explicitly stated in this article, there is no strict order restriction on the execution of these steps, and these steps can be executed in other orders. Moreover, at least some of the steps in the figure may include multiple steps or stages. These steps or stages are not necessarily executed at the same time, but may be executed at different times. The order of execution of these steps or stages does not necessarily change. It must be performed sequentially, but may be performed in turn or alternately with other steps or at least part of steps or stages in other steps.

It can be understood that the same/similar parts between the various embodiments of the above methods in this specification can be referred to each other. Each embodiment focuses on the differences from other embodiments. For relevant parts, please refer to other method embodiments. The description is enough.

FIG. 16 is a schematic block diagram of a signal processing device according to an exemplary embodiment. Referring to Figure 16, the device 1600 includes:

The encoding module 1601 is used to perform DC balance encoding on the signal emitted by the signal source to obtain the encoded signal;

Modulation module 1603, used to modulate the encoded signal to obtain a modulated signal;

The processing module 1605 is used to send the modulated signal to the receiving end to instruct the receiving end to perform high-pass filtering on the received modulated signal to obtain a modulated signal with a frequency higher than a preset value. The modulated signal with a frequency higher than the preset value is demodulated and decoded to obtain the processed signal.

The modulation module includes:

In a possible implementation, the first modulation sub-module includes:

8B10B encoding, MB810 encoding, 5S/6S encoding, 27S/32S encoding.

A modulator, used to modulate the encoded signal to obtain a modulated signal;

Modulated laser, used to send the modulated signal to the receiving end;

The receiving end includes:

Optoelectronic receiver for receiving modulated signals;

Regarding the devices in the above embodiments, the specific manner in which each module performs operations has been described in detail in the embodiments related to the method, and will not be described in detail here.

FIG. 17 is a block diagram of an electronic device 1700 for signal processing according to an exemplary embodiment. For example, electronic device 1700 may be a server. Referring to FIG. 17 , electronic device 1700 includes a processing component 1720 , which further includes one or more processors, and memory resources, represented by memory 1722 , for storing instructions, such as application programs, executable by processing component 1720 . Applications stored in memory 1722 may include one or more modules, each of which corresponds to a set of instructions. Furthermore, the processing component 1720 is configured to execute instructions to perform the above-described method.

Electronic device 1700 may also include a power supply component 1724 configured to perform power management of electronic device 1700 , a wired or wireless network interface 1726 configured to connect electronic device 1700 to a network, and an input-output (I/O) interface 1728 . The electronic device 1700 may operate based on an operating system stored in the memory 1722, such as Windows Server, Mac OS X, Unix, Linux, FreeBSD or the like.

In an exemplary embodiment, a computer-readable storage medium including instructions, such as a memory 1722 including instructions, which can be executed by a processor of the electronic device 1700 to complete the above method is also provided. The storage medium may be a computer-readable storage medium, for example, the computer-readable storage medium may be ROM, random access memory (RAM), CD-ROM, magnetic tape, floppy disk, optical data storage device, etc.

In an exemplary embodiment, a computer program product is also provided, the computer program product includes instructions, and the instructions can be executed by a processor of the electronic device 1700 to complete the above method.

It should be noted that the above-mentioned devices, electronic equipment, computer-readable storage media, computer program products, etc. may also include other implementations according to the description of the method embodiments. For specific implementations, please refer to the description of the relevant method embodiments. I won’t go into details one by one.

Other embodiments of the disclosure will be readily apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. The present disclosure is intended to cover any variations, uses, or adaptations of the disclosure that follow the general principles of the disclosure and include common common sense or customary technical means in the technical field that are not disclosed in the disclosure. . It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.

It is to be understood that the present disclosure is not limited to the precise structures described above and illustrated in the accompanying drawings, and various modifications and changes may be made without departing from the scope thereof. The scope of the disclosure is limited only by the appended claims.

Claims

A signal processing method, characterized in that it is applied to the sending end, and the method includes:

Perform DC balance encoding on the signal emitted by the signal source to obtain the encoded signal;

Perform modulation processing on the encoded signal to obtain a modulated signal;

Send the modulated signal to the receiving end to instruct the receiving end to perform high-pass filtering on the received modulated signal to obtain a modulated signal with a frequency higher than a preset value, and filter the modulated signal with a frequency higher than the preset value. Perform demodulation and decoding to obtain the processed signal.
The method according to claim 1, wherein the modulation processing includes pulse amplitude modulation processing, and performing DC balance encoding on the signal emitted by the signal source to obtain a coded signal, including:

According to the modulation order of pulse amplitude modulation, determine the number of signals sent by the signal source to be demultiplexed;

Demultiplexing the signal into the number of sub-signals;

Perform DC balance coding on the said number of sub-signals respectively to obtain the said number of sub-coded signals;

The step of performing modulation processing on the encoded signal to obtain a modulated signal includes:

Pulse amplitude modulation is performed according to the number of sub-coded signals to obtain a modulated signal.
The method according to claim 2, characterized in that, performing pulse amplitude modulation on the sub-coded signals according to the number to obtain a modulated signal, including:

Convert the said number of sub-coded signals into Gray code signals according to Gray code conversion rules;

Pulse amplitude modulation is performed according to the Gray code signal to obtain a modulated signal.
The method according to claim 1, wherein the modulation signal includes a duobinary modulation signal, and performing modulation processing on the encoded signal to obtain a modulation signal includes:

The encoded signal is subjected to duobinary modulation processing to obtain a duobinary modulated signal.
The method according to claim 1, wherein the modulation signal includes a duobinary modulation signal, and performing modulation processing on the encoded signal to obtain a modulation signal includes:

Obtain a coded signal delayed by a preset bit from the coded signal;

Perform XOR processing on the encoded signal and the encoded signal of the delayed preset bits to obtain a precoded signal;

Perform precoding processing and duobinary modulation processing on the precoded signal to obtain a duobinary modulated signal.
The method according to claim 1, characterized in that the DC balanced encoding includes at least one of the following:

8B10B encoding, MB810 encoding, 5S/6S encoding, 27S/32S encoding.
A signal processing device, characterized in that it includes:

The encoding module is used to perform DC balance encoding on the signal emitted by the signal source to obtain the encoded signal;

A modulation module, used to modulate the encoded signal to obtain a modulated signal;

A processing module configured to send the modulated signal to the receiving end to instruct the receiving end to perform high-pass filtering on the received modulated signal to obtain a modulated signal with a frequency higher than a preset value. The modulated signal of the value is demodulated and decoded to obtain the processed signal.
The device according to claim 7, wherein the modulation processing includes pulse amplitude modulation processing, and the encoding module includes:

The determination submodule is used to determine the number of demultiplexing signals sent by the signal source according to the modulation order of the pulse amplitude modulation;

Demultiplexing sub-module, used to demultiplex the signal into the number of sub-signals;

A coding sub-module, used to perform DC balance coding on the said number of sub-signals respectively, to obtain the said number of sub-coded signals;

The modulation module includes:

The first modulation sub-module is used to perform pulse amplitude modulation according to the number of sub-coded signals to obtain a modulated signal.
The device according to claim 8, characterized in that the first modulation sub-module includes:

A conversion unit, used to convert the said number of sub-coded signals into Gray code signals according to Gray code conversion rules;

A modulation unit, configured to perform pulse amplitude modulation according to the Gray code signal to obtain a modulated signal.
The device of claim 7, wherein the modulated signal includes a duobinary Modulation signal, the modulation module includes:

The second modulation submodule is used to perform duobinary modulation processing on the encoded signal to obtain a duobinary modulated signal.
The device according to claim 7, wherein the modulation signal includes a duobinary modulation signal, and the modulation module includes:

Acquisition submodule, used to acquire a coded signal delayed by preset bits from the coded signal;

A processing submodule, configured to perform XOR processing on the encoded signal and the encoded signal of the delayed preset bits to obtain a precoded signal;

The third modulation submodule is used to perform precoding processing and duobinary modulation processing on the precoded signal to obtain a duobinary modulated signal.
The device according to claim 7, characterized in that the DC balanced encoding includes at least one of the following:

8B10B encoding, MB810 encoding, 5S/6S encoding, 27S/32S encoding.
A signal processing system, characterized by including a sending end and a receiving end, wherein the sending end includes:

Encoder is used to perform DC balanced encoding on the signal emitted by the signal source to obtain the encoded signal;

A modulator, used to modulate the encoded signal to obtain a modulated signal;

Modulated laser, used to send the modulated signal to the receiving end;

The receiving end includes:

Photoelectric receiver for receiving modulated signals;

A high-pass filter is used to perform high-pass filtering on the received modulated signal to obtain a modulated signal with a frequency higher than the preset value;

A decoder is used to demodulate and decode the modulated signal with a frequency higher than the preset value to obtain a processed signal.
An electronic device, characterized by including:

processor;

memory for storing instructions executable by the processor;

Wherein, the processor is configured to execute the instructions to implement the signal processing method according to claim 1.
A computer-readable storage medium, characterized in that, when the instructions in the computer-readable storage medium are executed by a processor of an electronic device, the electronic device is enabled to perform the signal processing method as claimed in claim 1 .
A computer program product, the computer program product includes instructions, characterized in that when the instructions are executed by a processor of an electronic device, the electronic device can perform the signal processing method as claimed in claim 1.