WO2023273873A1 - 访问存储器中数据的方法、电子设备及存储介质 - Google Patents

访问存储器中数据的方法、电子设备及存储介质 Download PDF

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WO2023273873A1
WO2023273873A1 PCT/CN2022/098776 CN2022098776W WO2023273873A1 WO 2023273873 A1 WO2023273873 A1 WO 2023273873A1 CN 2022098776 W CN2022098776 W CN 2022098776W WO 2023273873 A1 WO2023273873 A1 WO 2023273873A1
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reading
read
scheme
library
target
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PCT/CN2022/098776
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English (en)
French (fr)
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张帆
徐云川
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中兴通讯股份有限公司
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061—Improving I/O performance
    • G06F3/0611—Improving I/O performance in relation to response time
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0629—Configuration or reconfiguration of storage systems
    • G06F3/0631—Configuration or reconfiguration of storage systems by allocating resources to storage systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0638—Organizing or formatting or addressing of data
    • G06F3/0644—Management of space entities, e.g. partitions, extents, pools

Definitions

  • the present application relates to the technical field of memory, and in particular to a method for accessing data in a memory, electronic equipment and a storage medium.
  • Embodiments of the present application provide a method for accessing data in a storage
  • the storage includes multiple storage banks and multiple encoding libraries, and the encoding libraries are used to store encoded versions of the data in the storage banks;
  • each The memory bank is preset with multiple reading schemes;
  • the reading scheme involves reading at least one of the memory banks and/or at least one of the encoding banks;
  • the method includes:
  • Synchronous reading of data is performed according to the determined reading scheme of the target storage library of each reading request.
  • Embodiments of the present application also provide an electronic device, including:
  • the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor, so that the at least one processor can execute the method for accessing data in the memory as described above.
  • the embodiment of the present application also provides a computer-readable storage medium storing a computer program, and when the computer program is executed by a processor, the above-mentioned method for accessing data in the memory is realized.
  • FIG. 1 is a data storage structure diagram of a memory constructed based on a hypergraph construction method in an embodiment of the present application
  • FIG. 2 is a data storage structure diagram of a memory constructed based on a one-dimensional encoding method in an embodiment of the present application
  • FIG. 3 is a data storage structure diagram of a memory constructed based on a two-dimensional coding method in an embodiment of the present application
  • Fig. 4 is a data storage structure diagram of another memory constructed based on the two-dimensional coding method in the embodiment of the present application;
  • FIG. 5 is a specific flow chart 1 of a method for accessing data in a memory according to an embodiment of the present application
  • FIG. 6 is a specific flow chart II of a method for accessing data in a memory according to an embodiment of the present application
  • Fig. 7 is a data storage structure diagram of an encoder in a memory provided according to an embodiment of the present application.
  • FIG. 8 is a specific flowchart three of a method for accessing data in a memory according to an embodiment of the present application.
  • FIG. 9 is a specific flowchart of a data writing method provided according to an embodiment of the present application.
  • FIG. 10 is a process diagram of data writing in a storage repository according to an embodiment of the present application.
  • Fig. 11 is a schematic structural diagram of an electronic device provided according to an embodiment of the present application.
  • the purpose of the embodiments of the present application is to provide a method for accessing data in a memory, an electronic device, and a storage medium, which can effectively solve the problem of using a truth table to record all combinations of reading schemes when a multi-port memory is used for multi-channel reading. This results in a larger truth table and more resource consumption.
  • the method for accessing data in the memory is to sequentially determine the reading scheme of the target memory bank of each read request when assigning a read scheme to multiple read requests; After fetching the read plan of the requested target storage library, all the read libraries involved in the determined read plan will be used as the target library, and in all the read plans of each storage library, the library involved in reading any target library will be The read plan is marked as unavailable, and the read plan of the target repository of each read request is selected from the available read plans, so as to ensure that the read plan selected for the current read request is consistent with the allocated
  • the reading scheme does not conflict, that is, there is no same library in the library involved in the reading between the two; according to the determined reading scheme of the target storage library of each read request, the data is read synchronously, so as to realize Multiple read access to memory.
  • this scheme adopts the dynamic allocation process to assign the reading scheme to the target storage library of each read request in turn, it is only necessary to know the library involved in reading for each reading scheme during the allocation process, and there is no need to build all the reading schemes Truth tables for combined cases, thereby reducing consumption of storage resources.
  • the allocation of read solutions can use pipelined logic operations to achieve faster read operations.
  • An embodiment of the present application relates to a method for accessing data in a memory
  • the memory includes multiple storage banks and multiple encoding libraries, and the encoding libraries are used to store the encoded version of the data in the storage banks; each storage bank is preset with Multiple reading schemes; the reading scheme involves reading at least one storage library and/or at least one encoding library.
  • the storage library and the coding library may be, but not limited to, random access memory (random access memory, RAM), or a memory bank constructed based on multiple RAMs.
  • one RAM is used to represent the memory bank or the encoding bank, and the RAMs are numbered to refer to different memory banks and encoding banks, for example, RAM1 is the memory bank, and RAM2 is the encoding bank.
  • the encoded version stored in the encoding library can be the data formed after encoding at least part of the data in the above-mentioned multiple storage banks by using finite field addition; finite field addition can include any of the following methods: hypergraph construction method , a one-dimensional encoding method, a two-dimensional encoding method and a multidimensional encoding method. These methods are described below.
  • the hypergraph construction method is based on the points and lines of the hypergraph, and the points are used as the storage library, and the lines are used as the code library to construct the memory.
  • Figure 1 shows the hypergraph construction method with 10 points and 10 lines.
  • the one-dimensional encoding method is the basis of the two-dimensional and multi-dimensional encoding methods. By encoding the one-dimensional storage library, one encoding library is obtained.
  • Figure 2 is a one-dimensional encoding method.
  • the two-dimensional storage base is encoded, that is, the two-dimensional storage base is subdivided into multiple one-dimensional storage bases, and then the one-dimensional encoding method is performed.
  • Figure 3 shows the encoding method for 4 ⁇ 4 memory bank to realize 3-way reading.
  • Fig. 4 is a coding method for realizing 4-way reading in a 4 ⁇ 4 memory bank.
  • the construction principle of the multi-dimensional encoding method is consistent with the two-dimensional encoding method, and the encoding is performed by a dimensionality reduction method.
  • the complexity of the multi-dimensional encoding method is proportional to the number of dimensions.
  • the redundant encoding library multiple reading schemes can be provided for a set of data (data in the repository). According to different encoding methods, the number of reading schemes that can be provided for each set of data is also different.
  • the method for accessing data in the memory may be executed by a controller of the memory, and includes the following steps.
  • Step 101 Receive multiple read requests.
  • the multi-way read request may be a multi-way read request sent to the controller of the memory when an external processor such as a multi-core processor shares the memory, and is used to read data in the storage bank in the memory.
  • the data requested by the multi-way read request may be data in the same storage repository, or data in different storage libraries.
  • Step 102 sequentially determine the reading scheme of the target storage bank of each read request; wherein, after each determination of the reading scheme of the target storage bank of a read request, the read scheme involved in the determined read scheme All of the libraries are used as the target library, and in all the reading plans of each storage library, the reading plan involving reading any of the target libraries is marked as unavailable, and the reading of the target storage library of each read request Protocols are selected among the available read protocols.
  • the controller After receiving multiple read requests, the controller sequentially determines the read scheme of the target memory bank of each read request.
  • the determination process is:
  • Step 1 From all the reading plans of the target memory bank of the current read request, an available read plan is determined as the read plan of the target memory bank of the current read request.
  • the repository where the data read by the read request resides is recorded as the target repository of the corresponding read request.
  • the available read schemes corresponding to each target repository are dynamically changing. This depends on whether the read scheme assigned to the previously processed read requests and the read scheme of the current target storage library exist in the same library in the library involved in the read. A read scheme containing the same library is considered unavailable if the same library exists, otherwise it is considered available.
  • step 2 all the libraries involved in the determined reading scheme are regarded as target libraries, and among all the reading schemes of each storage library, the reading scheme involving reading any target library is marked as unavailable.
  • the specific operation process is as follows: all the read libraries involved in the read scheme determined for the current read request are used as the target library, traverse all the read schemes of each storage library in the memory, and select any library involved in the read The read scheme for the target library is identified as unavailable. In order to improve the identification efficiency, when traversing the read plans of each repository, the read plans that have been marked as unavailable will not be used as the objects of the traversal.
  • Step 103 Perform synchronous reading of data according to the determined reading scheme of the target storage library of each read request.
  • the reading solution is to directly read from the storage repository
  • the data may be directly read from the corresponding storage repository (target storage repository), and the read data is the data corresponding to the read request.
  • the reading scheme that involves reading from the encoding library
  • logical processing should be performed on the data in these libraries to obtain the data corresponding to the read request (the target storage library data in ).
  • the logic processing adopted is related to the encoding method adopted by the encoding library.
  • the encoded version stored in the encoded library is the data formed by encoding at least part of the data in the multiple storage banks by using finite field addition, correspondingly, according to the determined read request of each channel
  • the read scheme of the target repository after synchronous reading of data, also includes:
  • a finite-field subtraction is performed on the read encoding library and the data in multiple storage banks corresponding to the encoding library to obtain the data in the target storage library.
  • the one-way read request is to read the data in memory bank 1
  • the implemented reading scheme is to read the code library 1+2+ 3+4 and Repositories 2, 3, 4.
  • the finite field subtraction performed correspondingly is the data in the encoding library 1+2+3+4 minus the data in the memory banks 2, 3, and 4, so as to obtain the data in the memory bank 1.
  • the reading scheme of the target storage library of each reading request is sequentially determined; Finally, all the libraries involved in the determined reading scheme are regarded as the target library, and among all the reading schemes of each storage library, the reading scheme involving the reading of any target library is marked as unavailable.
  • the read scheme of the target repository of the read request is selected from the available read schemes, so as to ensure that the read scheme selected for the current read request does not conflict with the assigned read scheme, that is, the read scheme between the two
  • the same library does not exist in the libraries involved in the reading; according to the determined reading scheme of the target storage library of each read request, the data is read synchronously, thereby realizing multi-way read access to the memory.
  • this scheme adopts the dynamic allocation process to assign the reading scheme to the target storage library of each read request in turn, it is only necessary to know the library involved in reading for each reading scheme during the allocation process, and there is no need to build all the reading schemes Truth tables for combined cases, thereby reducing consumption of storage resources.
  • the allocation of read solutions can use pipelined logic operations to achieve faster read operations.
  • Another embodiment of the present application relates to a method of accessing data in a memory.
  • the reading scheme of the target memory bank of the current read request is determined through the pre-built first truth table.
  • the above step 102 may specifically include the following sub-steps.
  • Sub-step 1021 In the pre-built first truth table, select the reading scheme of the target memory bank to be determined; wherein, the first truth table is used to store all the reading schemes of each memory bank, and each The read scheme described above involves a library of reads.
  • an encoding method for realizing 4-way reading in a 4 ⁇ 4 memory bank is taken as an example, and each memory bank has 4 reading schemes.
  • the storage bank corresponds to 16 RAMs, and the encoding library corresponds to 9 RAMs.
  • 1-16 are the RAM numbers of the storage bank, and 17-25 are the RAM numbers of the encoding library.
  • the specific encoding data corresponding to the RAM numbers of the encoding library are shown in Figure 7.
  • Table 1 is a first truth table for implementing 4-way read for a 4 ⁇ 4 memory bank.
  • Read RAM number Scheme number A collection of RAM involved in reading 1 1 1 1 1 2 2,3,4,17 1 3 5,9,13,21 1 4 6,7,8,10,11,12,14,15,16,18,19,20,22,23,24,25 2 1 2 2 2 1,3,4,17 2 3 6,10,14,22 2 4 5,7,8,9,11,12,13,15,16,18,19,20,21,23,24,25 3 1 3 3 2 1,2,4,17 3 3 3, 7,11,15,23 3 4 5,6,8,9,10,12,13,14,16,18,19,20,21,22,24,25 4 1 4 4 2 1,2,3,17 4 3 8,12,16,24 4 4 5,6,7,9,10,11,13,14,15,18,19,20,21,22,23,25 5 1 5 5 5 2 6,7,8,18 5 3 1,9,13,21 5 4 2,3,4,10,11,12,14,15,16,17,19,20,22,23,24,25
  • Sub-step 1022 Among the selected reading schemes, select any available reading scheme as the reading scheme of the target memory bank of the current read request.
  • the reading schemes corresponding to RAM1 in Table 1 only the reading schemes with the scheme numbers 1 and 2 are available reading schemes, then one of the available reading schemes can be selected from these two reading schemes , for example, the read plan whose number is 1 is used as the read plan of the target repository of the current read request.
  • Substeps 1021-1022 can be used as a specific implementation process in which the reading scheme of the target storage bank of each read request is selected from the available reading schemes.
  • Sub-step 1023 All the read libraries involved in the determined read plan are regarded as target libraries, and among all the read plans of each storage library, the read plan involving reading any target library is marked as unavailable.
  • the reading scheme may involve any read scheme in the RAM set to be read.
  • a RAM (only including RAM1) is used as a target library, and a read scheme involving reading RAM1 among the read schemes in each memory bank is searched.
  • the reading scheme 2 of RAM2 the reading scheme 2 of RAM3, the reading scheme 2 of RAM4, the reading scheme 3 of RAM5, the reading scheme 4 of RAM6, the reading scheme 4 of RAM7, the reading scheme of RAM8 4.
  • the pre-built first truth table through the pre-built first truth table, it is convenient to select the reading scheme assigned to the target storage library of the current read request, and the data stored in the first truth table is less, which will not affect the storage Resource consumption is high.
  • Another embodiment of the present application relates to a method of accessing data in a memory.
  • the conflicting reading schemes corresponding to the reading schemes of the storage banks are identified through the pre-built second truth table.
  • the above step 102 may specifically include the following sub-steps.
  • Sub-step 1024 From all the reading schemes of the target storage bank of the current one-way read request, determine an available reading scheme as the reading scheme of the target storage bank of the current one-way read request.
  • the reading scheme 1 of the RAM1 is finally determined as the reading scheme of the current one-way read request.
  • Sub-step 1025 In the pre-built second truth table, select the reading scheme that conflicts with the reading scheme determined as the target storage bank of the current read request; wherein, the second truth table is used to store Among all read plans of each repository, read plans that conflict with each read plan of each repository, two read plans conflict when at least one of the same read plans exists in the library involved in the read library.
  • each bit (ordinal number) of the bitmap represents a read scheme
  • the 64-bit bitmap represents 64 read schemes in total
  • each group of four bits represents four read schemes of a RAM.
  • the bit corresponding to the read scheme 1 of RAM1 is 1, and the bit corresponding to the read scheme 2 of RAM1 is 2. . . , the bit corresponding to the reading scheme 1 of RAM2 is 5, and the bit corresponding to the reading scheme 2 of RAM2 is 6. . . , the bit corresponding to the read scheme 3 of the RAM16 is 63, and the bit corresponding to the read scheme 4 of the RAM16 is 64.
  • the second truth table is formed by mapping the bitmap into the truth table of the read scheme, which indicates an unavailable read scheme corresponding to a certain read scheme.
  • the entry "conflicting bit” indicates that the read scheme corresponding to the bit conflicts with the read scheme of the current entry.
  • the definition of conflict between two reading schemes is that there is at least one identical library in the library that the two reading schemes involve reading.
  • Table 2 is a second truth table for implementing 4-way read for a 4 ⁇ 4 memory bank.
  • the conflicting bits can also be directly replaced with the numbers of the conflicting reading schemes, such as the reading scheme 1 of RAM1.
  • Sub-step 1026 Identify the selected conflicting read scheme as unavailable.
  • the sub-steps 1025-1026 can be used as the above-mentioned steps. After each determination of the reading plan of the target storage library of a read request, all the libraries involved in the determined reading plan are used as the target library, and in each Among all the read plans of the repository, the specific process of marking the read plan involving reading any target library as unavailable.
  • the availability status of each reading scheme may be recorded through the above-mentioned pre-constructed bitmap.
  • the bit in the bitmap Bits correspond to each read scheme of each storage bank one by one, the value of the bit corresponding to the available read scheme is 0, and the value of the bit corresponding to the unavailable read scheme is 1; in the bitmap, select The value of the bit corresponding to the conflicting read scheme above is set to 1.
  • the reading scheme corresponding to the bit whose bit value is 0 may also be selected as the reading scheme of the target storage bank corresponding to the read request.
  • all the read plans of each repository can be identified as available, thereby providing the largest combination of read plans for multi-way read requests space.
  • the reading scheme of the target storage library of the last read request may also include: omitting to use all the libraries involved in the reading in the determined reading scheme as the target library, and to read all the reading data in each storage library.
  • a read protocol that involves reading either target library is identified as an unavailable processing step. Since the read plan of the target storage bank of the last read request is determined, there is no need to redistribute the read plan, so the subsequent processing steps of marking the unavailable read plan can be omitted, reducing processing complexity and saving computing resources.
  • the target storage banks of each read request can be selected from Select the read scheme from the available read schemes for this target repository. For example, using the corresponding relationship between the bits in the above bitmap and the reading scheme, when selecting the reading scheme of the target storage bank each time, from the four reading schemes of the target storage bank, according to the numbers 1 to 4 The order of selection is sequentially selected (the smaller the number, the higher the priority). Then, in principle, the read plan numbered 4 is always selected when the last request is processed in the multi-way read request, so it is not necessary to pre-store all the read plans that conflict with the read plan numbered 4. Read scheme.
  • the reads that conflict with the last read scheme (such as the read scheme numbered 4) corresponding to the above priority order
  • the table entry of the scheme is empty.
  • the pre-built second truth table it is possible to quickly and accurately learn the currently unavailable reading scheme after each determination of the reading scheme of the target storage library for a read request, thereby ensuring that the next read request
  • the read scheme for the fetch request can be selected among the available read schemes.
  • the conflicting scheme corresponding to the reading scheme reduces processing complexity, saves computing resources, and saves storage resources.
  • Another embodiment of the present application relates to a method of accessing data in a memory.
  • the processing operation of one write request is added.
  • the method for processing the write request includes the following steps.
  • Step 201 Receive a write request.
  • the one-way write request may be a one-way write request sent to the controller of the memory when an external processor such as a multi-core processor shares the memory, and is used for writing data into the storage bank in the memory.
  • This one-way write request is to write data to a repository.
  • Step 202 Determine a target storage library for data to be written, and a target coding library formed based on the target storage library.
  • the memory bank where the data written by the write request is written is recorded as the target memory bank of the corresponding write request. Since each memory bank has its corresponding code library built based on the code of the memory bank, it is also necessary to start from In the coding library, a target coding library formed based on the target storage library is determined.
  • Step 203 Read the data in the target storage repository and the target encoding repository.
  • the data in the target storage library is A
  • Step 204 Obtain the data to be written that needs to be written into the target storage library and the coded version that needs to be written into the target code library through the addition and subtraction calculation of the finite field.
  • the new data that needs to be written to the target repository is A’, then the data to be written in the target repository is A’;
  • the data to be written in the target encoding library is P-A+A', that is, through finite field subtraction, subtract A from P, and then add A' to P-A through finite field addition;
  • Step 205 Synchronously write the data to be written to the target storage repository of the data to be written, and write the encoded version to the target encoding repository.
  • the process of changing data in the target storage library A and the encoding library A+B+C+D are respectively shown during the data writing process.
  • the method steps of this embodiment also include: when receiving multiple read requests and one write request synchronously, based on a predetermined access priority, determine the processing between the multiple read requests and one write request sequence and perform corresponding processing.
  • the memory controller can pre-set the priority of processing multiple read requests and one write request.
  • the controller can be based on the preset priority , which determines the order in which requests are processed.
  • a processing solution of one write is provided on the basis of multiple reads.
  • an arbitration mechanism between multiple reads and one write is provided.
  • FIG. 11 Another embodiment of the present application relates to an electronic device, as shown in FIG. 11 , including at least one processor 302; and a memory connected in communication with at least one processor 302; wherein, the memory 301 stores information that can be processed by at least one The instructions executed by the processor 302 are executed by at least one processor 302, so that the at least one processor 302 can execute any one of the above method embodiments.
  • the memory 301 and the processor 302 are connected by a bus, and the bus may include any number of interconnected buses and bridges, and the bus connects one or more processors 302 and various circuits of the memory 301 together.
  • the bus may also connect together various other circuits such as peripherals, voltage regulators, and power management circuits, all of which are well known in the art and therefore will not be further described herein.
  • the bus interface provides an interface between the bus and the transceivers.
  • a transceiver may be a single element or multiple elements, such as multiple receivers and transmitters, providing means for communicating with various other devices over a transmission medium.
  • the data processed by the processor 302 is transmitted on the wireless medium through the antenna, and further, the antenna also receives the data and transmits the data to the processor 302 .
  • Processor 302 is responsible for managing the bus and general processing, and may also provide various functions including timing, peripheral interfacing, voltage regulation, power management, and other control functions. And the memory 301 may be used to store data used by the processor 302 when performing operations.
  • Another embodiment of the present application relates to a computer-readable storage medium storing a computer program.
  • the computer program is executed by the processor, any one of the above method embodiments is implemented.
  • the program is stored in a storage medium, and includes several instructions to make a device ( It may be a single chip microcomputer, a chip, etc.) or a processor (processor) to execute all or part of the steps of the methods described in the various embodiments of the present application.
  • the aforementioned storage media include: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), magnetic disk or optical disc, etc., which can store program codes. .

Abstract

本申请实施例涉及存储器技术领域，公开了一种访问存储器中数据的方法、电子设备及存储介质，在接收多路读取请求后，依次确定各路读取请求的目标存储库的读取方案；其中，在每确定一路读取请求的目标存储库的读取方案后，将确定的读取方案所涉及读取的库均作为目标库，并在各存储库的所有读取方案中，将涉及读取任一目标库的读取方案标识为不可用，各路读取请求的目标存储库的读取方案均在可用的读取方案中选择；根据确定的各路读取请求的目标存储库的读取方案，进行数据的同步读取。

Description

访问存储器中数据的方法、电子设备及存储介质
相关申请的交叉引用
本申请基于申请号为“202110739406.1”、申请日为2021年06月30日的中国专利申请提出，并要求该中国专利申请的优先权，该中国专利申请的全部内容在此以引入方式并入本申请。
技术领域
本申请涉及存储器技术领域，特别涉及一种访问存储器中数据的方法、电子设备及存储介质。
背景技术
目前普遍是通过编码方法由单端口存储器集合构造多端口存储器，通过算法逻辑为输入的k路读取请求，分配所需要读取的存储库和编码库的具体存储器，再通过有限域的减法，计算出所需要读取的数据，并作为结果输出。
通过使用真值表为k路读取分配读取方案，由于真值表需要包含所有读取情况的方案组合，所以对于k较大或编码复杂的编码方法，真值表将会非常巨大，需要消耗非常多的资源。例如，在4×4存储库实现4路读取的编码方法中，4路读取的所有情况有16 4＝65536种，需要构建65536行的真值表，资源消耗巨大。
发明内容
本申请的实施例提供了一种访问存储器中数据的方法，所述存储器包含多个存储库和多个编码库，所述编码库用于存储所述存储库中的数据的编码版本；每个所述存储库预设有多种读取方案；所述读取方案涉及读取至少一个所述存储库和/或至少一个所述编码库；所述方法包括：
接收多路读取请求；
依次确定各路读取请求的目标存储库的读取方案；其中，在每确定一路读取请求的目标存储库的读取方案后，将所述确定的读取方案所涉及读取的库均作为目标库，并在各存储库的所有读取方案中，将涉及读取任一所述目标库的读取方案标识为不可用，各路读取请求的目标存储库的读取方案均在可用的读取方案中选择；
根据确定的各路读取请求的目标存储库的读取方案，进行数据的同步读取。
本申请的实施例还提供了一种电子设备，包括：
至少一个处理器；以及，
与所述至少一个处理器通信连接的存储器；其中，
所述存储器存储有可被所述至少一个处理器执行的指令，所述指令被所述至少一个处理器执行，以使所述至少一个处理器能够执行如上所述的访问存储器中数据的方法。
本申请的实施例还提供了一种计算机可读存储介质，存储有计算机程序，所述计算机程序被处理器执行时实现如上所述的访问存储器中数据的方法。
附图说明
图1是本申请实施例中基于超图构造法构建的存储器的数据存储结构图；
图2是本申请实施例中基于一维编码方法构建的存储器的数据存储结构图；
图3是本申请实施例中基于二维编码方法构建的存储器的数据存储结构图；
图4是本申请实施例中基于二维编码方法构建的另一存储器的数据存储结构图；
图5是根据本申请实施例提供的访问存储器中数据的方法的具体流程图一；
图6是根据本申请实施例提供的访问存储器中数据的方法的具体流程图二；
图7是根据本申请实施例提供的存储器中编码器的数据存储结构图；
图8是根据本申请实施例提供的访问存储器中数据的方法的具体流程图三；
图9是根据本申请实施例提供的数据写入的方法的具体流程图；
图10是根据本申请实施例提供的存储库中数据写入的过程图；
图11是根据本申请实施例提供的电子设备的结构示意图。
具体实施方式
为使本申请实施例的目的、技术方案和优点更加清楚，下面将结合附图对本申请的各实施例进行详细的阐述。然而，本领域的普通技术人员可以理解，在本申请各实施例中，为了使读者更好地理解本申请而提出了许多技术细节。但是，即使没有这些技术细节和基于以下各实施例的种种变化和修改，也可以实现本申请所要求保护的技术方案。
本申请实施例的目的在于提供一种访问存储器中数据的方法、电子设备及存储介质，能够有效解决多端口存储器进行多路读取时，由于需要采用真值表记录所有读取方案组合，而导致真值表较大，对资源消耗较多的问题。
本申请实施例提供的访问存储器中数据的方法，在对多路读取请求分配读取方案时，是依次确定各路读取请求的目标存储库的读取方案；其中，在每确定一路读取请求的目标存储库的读取方案后，将确定的读取方案所涉及读取的库均作为目标库，并在各存储库的所有读取方案中，将涉及读取任一目标库的读取方案标识为不可用，各路读取请求的目标存储库的读取方案均在可用的读取方案中选择，从而保证每次为当前读取请求所选择的读取方案与已分配的读取方案不冲突，即二者之间所涉及读取的库中不存在相同的库；根据确定的各路读取请求的目标存储库的读取方案，进行数据的同步读取，从而实现对存储器进行多路读取的访问。本方案由于采用动态分配过程依次为每一路读取请求的目标存储库分配读取方案，分配过程中仅需要知晓每种读取方案涉及读取的库即可，而无需构建包含所有读取方案组合情况的真值表，从而降低了对存储资源的消耗。对多路读取请求分配读取方案，可以采用流水线的逻辑运算，从而达到更快速的读取操作。
本申请的一实施例涉及一种访问存储器中数据的方法，该存储器包含多个存储库和多个编码库，编码库用于存储存储库中的数据的编码版本；每个存储库预设有多种读取方案；读取方案涉及读取至少一个存储库和/或至少一个编码库。其中，存储库和编码库可以但不局限为随机存取存储器(random access memory，RAM)，或基于多个RAM构建的存储体。为方 便描述，本实施例中均采用一个RAM代表存储库或者编码库，并通过对RAM进行编号，以指代不同的存储库和编码库，例如RAM1为存储库、RAM2为编码库。编码库存储的编码版本可以为对上述多个存储库中至少部分存储库中数据，采用有限域加法进行编码后形成的数据；有限域加法可包括如下方法中的任一种：超图构造法、一维编码方法、二维编码方法以及多维编码方法。以下对这些方法进行介绍说明。
超图构造法，基于超图的点和线，点作为存储库，线作为编码库，构造存储器，图1为10点10线的超图构造法。
一维编码方法，是二维及多维编码方法的基础，通过对一维的存储库进行编码，得到1个编码库，图2为一种一维编码方法。
二维编码方法，通过对二维的存储库进行编码，即将二维的存储库细分为多个一维的存储库，再进行一维的编码方法。图3为4×4存储库实现3路读取的编码方法。图4为4×4存储库实现4路读取的编码方法。
多维编码方法的构造原理，与二维编码方法一致，通过降维的方法来进行编码，多维编码方法的复杂度与维数成正比。
通过冗余的编码库，可以为一组数据(存储库中的数据)提供多种读取方案，根据编码方法的不同，每组数据可以提供的读取方案数也不相同。以图4中4×4存储库实现4路读取的编码方法为例，读取存储库1中的数据有四种读取方案：读取存储库1；读取编码库1+2+3+4和存储库2、3、4；读取编码库1+5+9+13和存储库5、9、13；读取剩余所有的编码库和存储库。由于存储库有16个(16个RAM)，所以一共有16×4＝64种读取方案。一般来说，对于n个RAM的k路读取的编码方法，一共有n×k种读取方案，且每个RAM的k个读取方案读取的RAM没有重复。
如图5所示，本实施例提供的访问存储器中数据的方法的执行主体可以为存储器的控制器，包括如下步骤。
步骤101：接收多路读取请求。
其中，该多路读取请求可以是外部处理器如多核处理器共享存储器时向存储器的控制器发送的多路读取请求，用于读取存储器中存储库中的数据。该多路读取请求所请求的数据可以是相同存储库中的数据，也可以是不同存储库中的数据。
步骤102：依次确定各路读取请求的目标存储库的读取方案；其中，在每确定一路读取请求的目标存储库的读取方案后，将所述确定的读取方案所涉及读取的库均作为目标库，并在各存储库的所有读取方案中，将涉及读取任一所述目标库的读取方案标识为不可用，各路读取请求的目标存储库的读取方案均在可用的读取方案中选择。
控制器接收到多路读取请求后，依次确定各路读取请求的目标存储库的读取方案。确定过程为：
步骤1，从当前一路读取请求的目标存储库的所有读取方案中，确定一可用的读取方案作为当前一路读取请求的目标存储库的读取方案。
其中，将读取请求所读数据所在的存储库记为相应读取请求的目标存储库。每个目标存储库对应的可用的读取方案是动态变化的。这取决于在前处理的几路读取请求所被分配的读取方案与当前目标存储库的读取方案，在涉及读取的库中是否存在相同的库。如果存在相同库，则包含该相同库的读取方案视为不可用，否则视为可用。在为当前目标存储库选取读取 方案时，需从可用读取方案中选取以读取方案，作为当前一路读取请求的目标存储库的读取方案。
步骤2，将确定的读取方案所涉及读取的库均作为目标库，并在各存储库的所有读取方案中，将涉及读取任一目标库的读取方案标识为不可用。
为方便从可用的读取方案中，确定下一路读取请求的目标存储库的读取方案，可以在每确定一路读取请求的目标存储库的读取方案后，对各存储库的所有读取方案中的不可用的读取方案进行更新标识。
具体操作过程为：将针对当前一路读取请求所确定的读取方案所涉及读取的库均作为目标库，对存储器中各存储库的所有读取方案进行遍历，将其中涉及读取任一目标库的读取方案标识为不可用。为了提高标识效率，在遍历各存储库的读取方案时，已被标识为不可用的读取方案将不作为遍历的对象。
步骤103：根据确定的各路读取请求的目标存储库的读取方案，进行数据的同步读取。
本实施例中，针对读取方案为直接从存储库中读取，则可直接从相应存储库(目标存储库)中读取数据，读取的数据即为读取请求对应的数据。针对读取方案中涉及从编码库中读取，则在从编码库以及存储库读取出数据后，还要对这些库中数据进行逻辑处理，以得到读取请求对应的数据(目标存储库中的数据)。其中，所采用的逻辑处理与编码库采用的编码方法相关。
在一个例子中，当编码库存储的编码版本为对多个存储库中至少部分存储库中数据，采用有限域加法进行编码后形成的数据时，相应地，在根据确定的各路读取请求的目标存储库的读取方案，进行数据的同步读取之后，还包括：
对读取的编码库，以及该编码库对应的多个存储库中的数据执行有限域减法，得到目标存储库的数据。
例如，以图4中4×4存储库实现4路读取的编码方法为例，一路读取请求为读取存储库1中的数据，实施的读取方案为读取编码库1+2+3+4和存储库2、3、4。则对应执行的有限域减法为编码库1+2+3+4中的数据减去存储库2、3、4中的数据，从而得到存储库1中的数据。
本实施例在对多路读取请求分配读取方案时，是依次确定各路读取请求的目标存储库的读取方案；其中，在每确定一路读取请求的目标存储库的读取方案后，将确定的读取方案所涉及读取的库均作为目标库，并在各存储库的所有读取方案中，将涉及读取任一目标库的读取方案标识为不可用，各路读取请求的目标存储库的读取方案均在可用的读取方案中选择，从而保证每次为当前读取请求所选择的读取方案与已分配的读取方案不冲突，即二者之间所涉及读取的库中不存在相同的库；根据确定的各路读取请求的目标存储库的读取方案，进行数据的同步读取，从而实现对存储器进行多路读取的访问。本方案由于采用动态分配过程依次为每一路读取请求的目标存储库分配读取方案，分配过程中仅需要知晓每种读取方案涉及读取的库即可，而无需构建包含所有读取方案组合情况的真值表，从而降低了对存储资源的消耗。对多路读取请求分配读取方案，可以采用流水线的逻辑运算，从而达到更快速的读取操作。
本申请的另一实施例涉及一种访问存储器中数据的方法。在本实施例中，通过预先构建的第一真值表中，确定当前一路读取请求的目标存储库的读取方案。相应的，如图6所示， 上述步骤102可具体包括如下子步骤。
子步骤1021：在预先构建的第一真值表中，选择当前待确定的目标存储库的读取方案；其中，第一真值表用于存储各存储库的所有读取方案，以及各所述读取方案涉及读取的库。
本实施例中，以4×4的存储库实现4路读取的编码方法为例，每个存储库有4种读取方案。存储库对应16个RAM，编码库对应9个RAM，1-16为存储库的RAM编号，17-25为编码库的RAM编号，编码库的RAM编号对应的具体编码数据如图7所示。表1为针对4×4的存储库实现4路读取的第一真值表。
表1 第一真值表
读取RAM编号 方案编号 涉及读取的RAM集合
1 1 1
1 2 2,3,4,17
1 3 5,9,13,21
1 4 6,7,8,10,11,12,14,15,16,18,19,20,22,23,24,25
2 1 2
2 2 1,3,4,17
2 3 6,10,14,22
2 4 5,7,8,9,11,12,13,15,16,18,19,20,21,23,24,25
3 1 3
3 2 1,2,4,17
3 3 7,11,15,23
3 4 5,6,8,9,10,12,13,14,16,18,19,20,21,22,24,25
4 1 4
4 2 1,2,3,17
4 3 8,12,16,24
4 4 5,6,7,9,10,11,13,14,15,18,19,20,21,22,23,25
5 1 5
5 2 6,7,8,18
5 3 1,9,13,21
5 4 2,3,4,10,11,12,14,15,16,17,19,20,22,23,24,25
6 1 6
6 2 5,7,8,18
6 3 2,10,14,22
6 4 1,3,4,9,11,12,13,15,16,17,19,20,21,23,24,25
7 1 7
7 2 5,6,8,18
7 3 3,11,15,23
7 4 1,2,4,9,10,12,13,14,16,17,19,20,21,22,24,25
8 1 8
8 2 5,6,7,18
8 3 4,12,16,24
8 4 1,2,3,9,10,11,13,14,15,17,19,20,21,22,23,25
9 1 9
9 2 10,11,12,19
9 3 1,5,13,21
9 4 2,3,4,6,7,8,14,15,16,17,18,20,22,23,24,25
10 1 10
10 2 9,11,12,19
10 3 2,6,14,22
10 4 1,3,4,5,7,8,13,15,16,17,18,20,21,23,24,25
11 1 11
11 2 9,10,12,19
11 3 3,7,15,23
11 4 1,2,4,5,6,8,13,14,16,17,18,20,21,22,24,25
12 1 12
12 2 9,10,11,19
12 3 4,8,16,24
12 4 1,2,3,5,6,7,13,14,15,17,18,20,21,22,23,25
13 1 13
13 2 14,15,16,20
13 3 1,5,9,21
13 4 2,3,4,6,7,8,10,11,12,17,18,19,22,23,24,25
14 1 14
14 2 13,15,16,20
14 3 2,6,10,22
14 4 1,3,4,5,7,8,9,11,12,17,18,19,21,23,24,25
15 1 15
15 2 13,14,16,20
15 3 3,7,11,23
15 4 1,2,4,5,6,8,9,10,12,17,18,19,21,22,24,25
16 1 16
16 2 13,14,15,20
16 3 4,8,12,24
16 4 1,2,3,5,6,7,9,10,11,17,18,19,21,22,23,25
基于表1中的数据，在确定当前一路读取请求的目标存储库为RAM1时，可先从表1中选择出该RAM1对应的所有读取方案。
子步骤1022：在选择的读取方案中，选择任一个可用的读取方案作为当前一路读取请求的目标存储库的读取方案。
例如，当表1中RAM1对应的所有读取方案中，只有方案编号为1、2的读取方案为可用读取方案，则可从这两个读取方案中任选一个可用的读取方案，如方案编号为1的读取方案作为当前一路读取请求的目标存储库的读取方案。
子步骤1021～1022可作为各路读取请求的目标存储库的读取方案均在可用的读取方案中选择的具体实现过程。
子步骤1023：将确定的读取方案所涉及读取的库均作为目标库，并在各存储库的所有读取方案中，将涉及读取任一目标库的读取方案标识为不可用。
例如，当确定表1中RAM1对应的方案编号为1的读取方案作为当前一路读取请求的目标存储库(RAM1)的读取方案后，可以该读取方案涉及读取的RAM集合中任一RAM(仅包含RAM1)作为目标库，查找各存储库中的读取方案中涉及读取RAM1的读取方案。经查找，RAM2的读取方案2、RAM3的读取方案2、RAM4的读取方案2、RAM5的读取方案3、RAM6的读取方案4、RAM7的读取方案4、RAM8的读取方案4、RAM9的读取方案3、RAM10的读取方案4、RAM11的读取方案4、RAM12的读取方案4、RAM13的读取方案3、RAM14的读取方案4、RAM15的读取方案4以及RAM16的读取方案4均涉及读取RAM1。因此将这些读取方案均标识为不可用。
本申请实施例通过预先构建的第一真值表，可以方便选择出分配给当前一路读取请求的目标存储库的读取方案，且第一真值表存储的数据较少，不会对存储资源造成较大消耗。
本申请的另一实施例涉及一种访问存储器中数据的方法。在本实施例中，通过预先构建的第二真值表，标识各存储库的读取方案对应的相冲突的读取方案。相应的，如图8所示，上述步骤102可具体包括如下子步骤。
子步骤1024：从当前一路读取请求的目标存储库的所有读取方案中，确定一可用的读取方案作为当前一路读取请求的目标存储库的读取方案。
具体地，以表1为例，假设当前一路读取请求的目标存储库为RAM1，最终确定该RAM1的读取方案1作为当前一路读取请求的读取方案。
子步骤1025：在预先构建的第二真值表中，选择与已确定为当前一路读取请求的目标存储库的读取方案相冲突的读取方案；其中，第二真值表用于存储各存储库的所有读取方案中，与各存储库的各读取方案相冲突的读取方案，两个读取方案相冲突为两个读取方案涉及读取的库中存在至少一个相同的库。
本实施例中，以表1为例，将表1中所有读取方案按当前顺序映射到64比特的位图中。位图的每一个比特位(序数)表示一种读取方案，64比特的位图共表示64种读取方案，每四个比特为一组，表示一个RAM的四种读取方案。例如，RAM1的读取方案1对应的比特位为1、RAM1的读取方案2对应的比特位为2，。。。，RAM2的读取方案1对应的比特位为5、RAM2的读取方案2对应的比特位为6，。。。，RAM16的读取方案3对应的比特位为63、RAM16的读取方案4对应的比特位为64。将位图映射到读取方案的真值表中形成第二真值表，表示某个读取方案对应的不可用的读取方案。其中，表项“相冲突的比特位”表示该比特位对应的读取方案与当前表项的读取方案相冲突。本实施例中，对两个读取方案相冲突的定义为这两个读取方案涉及读取的库中存在至少一个相同的库。表2为针对4×4的存储库实现4路读取的第二真值表。
表2 第二真值表
读取RAM编号 方案编号 相冲突的比特位
1 1 1,6,10,14,19,35,51
1 2 2,5,9,13
1 3 3,17,33,49
2 1 5,2,10,14,23,39,55
2 2 6,1,9,13
2 3 7,21,37,53
3 1 9,2,6,14,27,43,59
3 2 10,1,5,13
3 3 11,25,41,57
4 1 13,2,6,10,31,47,63
4 2 14,1,5,9
4 3 15,29,45,61
5 1 17,22,26,30,3,35,51
5 2 18,21,25,29
5 3 19,1,33,49
6 1 21,18,26,30,7,39,55
6 2 22,17,25,29
6 3 23,5,37,53
7 1 25,18,22,30,11,43,59
7 2 26,17,21,29
7 3 27,9,41,57
8 1 29,18,22,26,15,47,63
8 2 30,17,21,25
8 3 31,13,45,61
9 1 33,38,42,46,3,19,51
9 2 34,37,41,45
9 3 35,1,17,49
10 1 37,34,42,46,7,23,55
10 2 38,33,41,45
10 3 39,5,21,53
11 1 41,34,38,46,11,27,59
11 2 42,33,37,45
11 3 43,9,25,57
12 1 45,34,38,42,15,31,63
12 2 46,33,37,41
12 3 47,13,29,61
13 1 49,54,58,62,3,19,35
13 2 50,53,57,61
13 3 51,1,17,33
14 1 53,50,58,62,7,23,39
14 2 54,49,57,61
14 3 55,5,21,37
15 1 57,50,54,62,11,27,43
15 2 58,49,53,61
15 3 59,9,25,41
16 1 61,50,54,58,15,31,47
16 2 62,49,53,57
16 3 63,13,29,45
基于表2中的数据，在确定出RAM1的读取方案1作为当前一路读取请求的读取方案后，可先从表2中选择出该RAM1的读取方案1对应的所有相冲突的比特位。然后基于比特位与读取方案的对应关系，可以获悉与该RAM1的读取方案1相冲突的读取方案，即涉及读取的库与该RAM1的读取方案所涉及读取的库中具有相同库的读取方案。
当然，在构建第二真值表时，也可以直接将相冲突的比特位替换为相冲突的读取方案的编号，如RAM1的读取方案1。
子步骤1026：将选择的相冲突的读取方案标识为不可用。
其中，子步骤1025～1026可作为上述步骤中，在每确定一路读取请求的目标存储库的读取方案后，将确定的读取方案所涉及读取的库均作为目标库，并在各存储库的所有读取方案中，将涉及读取任一目标库的读取方案标识为不可用的具体处理过程。
进一步地，可以通过预先构建的上述位图，记录各读取方案的是否可用的状态。
本实施例中，在预先构建的位图中，选择与已确定为当前一路读取请求的目标存储库的读取方案相冲突的读取方案所对应的比特位；其中，位图中的比特位与各存储库的各读取方案一一对应，可用读取方案对应的比特位上的值为0，不可用读取方案对应的比特位上的值为1；在位图中，将选择的上述相冲突的读取方案对应的比特位上的值置为1。
通过更新各比特位上的值，可以清晰的记录当前各存储库的所有读取方案的可用状态。基于此，在确定目标存储库的可用读取方案时，也可以选择比特位值为0的比特位对应的读取方案作为相应读取请求的目标存储库的读取方案。
此外，在依次确定各路读取请求的目标存储库的读取方案之前，还可以将各存储库的所有读取方案均标识为可用，从而为多路读取请求提供最大的读取方案组合空间。
此外，在确定最后一路读取请求的目标存储库的读取方案后，还可包括：省略将确定的读取方案所涉及读取的库均作为目标库，并在各存储库的所有读取方案中，将涉及读取任一目标库的读取方案标识为不可用处理步骤。由于确定最后一路读取请求的目标存储库的读取方案后，无需再分配读取方案，因此可以省略后续标记不可用读取方案的处理步骤，降低处理复杂度，节省计算资源。
在此基础上，如果是采用上述第二真值表记录与各读取方案相冲的读取方案，那么原则上无需记录最后一路读取请求的读取方案所对应的冲突读取方案。
在一个例子中，在实现各路读取请求的目标存储库的读取方案均在可用的读取方案中选择的过程中，可针对各路读取请求的目标存储库，按优先级顺序从该目标存储库的可用读取方案中选取读取方案。例如，采用上述位图中比特位与读取方案的对应关系，在每次选取目标存储库的读取方案时，都从该目标存储库的四种读取方案中，按编号1到编号4的顺序依次进行选取(编号越小对应优先级越高)。那么原则上编号为4的读取方案总是在多路读取请求中处理最后一路请求时才有机会被选择，因此可以不预先存储所有存储库中与编号为4的读取方案相冲突的读取方案。
相应的，在第二真值表中，用于存储各存储库的所有读取方案中，与上述优先级顺序对应的最后一个读取方案(如编号为4的读取方案)相冲突的读取方案的表项为空。
本申请实施例通过预先构建的第二真值表，可以在每确定一路读取请求的目标存储库的读取方案后，快速、准确地获悉当前不可用的读取方案，从而保证下一路读取请求的读取方案能够在可用读取方案中选择。
此外，通过预先构建的位图，可以在分配读取方案的过程中，标识各存储库的所有读取方案的可用情况，从而快速实现为当前存储库分配可用的读取方案。
由于确定最后一路读取请求的目标存储库的读取方案后，无需再分配读取方案，因此可以省略后续标记不可用读取方案的处理步骤，同时在第二真值表中也无需存储与该读取方案对应的冲突方案，从而在降低处理复杂度，节省计算资源的同时，节省存储资源。
本申请的另一实施例涉及一种访问存储器中数据的方法。在本实施例中，增加一路写入请求的处理操作。相应的，如图9所示，该写入请求的处理方法包括如下步骤。
步骤201：接收一路写入请求。
其中，该一路写入请求可以是外部处理器如多核处理器共享存储器时向存储器的控制器发送的一路写入请求，用于向存储器中存储库写入数据。这个一路写入请求为向一个存储库 写入数据。对某一个存储库写入数据时，除了需要写入该存储库外，还需要将新数据写入其对应的编码库内。
步骤202：确定待写入数据的目标存储库，以及基于该目标存储库形成的目标编码库。
其中，将写入请求所写数据所写入的存储库记为相应写入请求的目标存储库，由于每个存储库均有其对应的基于该存储库编码构建的编码库，因此还需从所述编码库中确定基于该目标存储库形成的目标编码库。
步骤203：读取目标存储库和目标编码库中的数据。
例如，目标存储库的数据为A，与其对应的一个编码库为A+B+C+D，记为P，P＝A+B+C+D。读取出目标存储库和目标编码库中的数据A和P(P有多个，为P 1，P 2等)。
步骤204：通过有限域的加减法计算，得到需要写入目标存储库的待写入数据和需要写入目标编码库的编码版本。
需要写入目标存储库的新数据为A’，则目标存储库的待写入数据为A’；
目标编码库的待写入数据(编码版本)为P-A+A’，即通过有限域减法，对P减去A，再通过有限域加法，对P-A加上A’；
得到需要写入目标存储库的待写入数据和需要写入目标编码库的编码版本。
步骤205：同步将待写入数据写入到待写入数据的所述目标存储库，将所述编码版本写入到所述目标编码库。
如图10所示，分别示出了数据写入过程中，目标存储库A和编码库A+B+C+D中数据的变化过程。
此外，本实施例的方法步骤中还包括：当同步接收多路读取请求和一路写入请求时，基于预先确定的访问优先级，确定多路读取请求和一路写入请求之间的处理顺序，并执行相应处理。
例如，存储器的控制器可预先设置处理多路读取请求和一路写入请求的优先级，在实际应用场景中，如果控制器同步接收到读写请求，则可基于各请求预先设置的优先级，确定处理请求的顺序。
本实施例中，在多路读取的基础上，提供一路写入的处理方案。另外，通过设置读写请求的优先级，从而提供多路读取和一路写入之间的仲裁机制。
本申请的另一实施例涉及一种电子设备，如图11所示，包括至少一个处理器302；以及，与至少一个处理器302通信连接的存储器；其中，存储器301存储有可被至少一个处理器302执行的指令，指令被至少一个处理器302执行，以使至少一个处理器302能够执行上述任一方法实施例。
其中，存储器301和处理器302采用总线方式连接，总线可以包括任意数量的互联的总线和桥，总线将一个或多个处理器302和存储器301的各种电路连接在一起。总线还可以将诸如外围设备、稳压器和功率管理电路等之类的各种其他电路连接在一起，这些都是本领域所公知的，因此，本文不再对其进行进一步描述。总线接口在总线和收发机之间提供接口。收发机可以是一个元件，也可以是多个元件，比如多个接收器和发送器，提供用于在传输介质上与各种其他装置通信的单元。经处理器302处理的数据通过天线在无线介质上进行传输，进一步，天线还接收数据并将数据传送给处理器302。
处理器302负责管理总线和通常的处理，还可以提供各种功能，包括定时，外围接口， 电压调节、电源管理以及其他控制功能。而存储器301可以被用于存储处理器302在执行操作时所使用的数据。
本申请的另一实施例涉及一种计算机可读存储介质，存储有计算机程序。计算机程序被处理器执行时实现上述任一方法实施例。
即，本领域技术人员可以理解，实现上述实施例方法中的全部或部分步骤是可以通过程序来指令相关的硬件来完成，该程序存储在一个存储介质中，包括若干指令用以使得一个设备(可以是单片机，芯片等)或处理器(processor)执行本申请各个实施例所述方法的全部或部分步骤。而前述的存储介质包括：U盘、移动硬盘、只读存储器(ROM，Read-Only Memory)、随机存取存储器(RAM，Random Access Memory)、磁碟或者光盘等各种可以存储程序代码的介质。
本领域的普通技术人员可以理解，上述各实施例是实现本申请的具体实施例，而在实际应用中，可以在形式上和细节上对其作各种改变，而不偏离本申请的精神和范围。

Claims (13)

  1. 一种访问存储器中数据的方法，所述存储器包含多个存储库和多个编码库，所述编码库用于存储所述存储库中的数据的编码版本；每个所述存储库预设有多种读取方案；所述读取方案涉及读取至少一个所述存储库和/或至少一个所述编码库；所述方法包括：
    接收多路读取请求；
    依次确定各路读取请求的目标存储库的读取方案；其中，在每确定一路读取请求的目标存储库的读取方案后，将所述确定的读取方案所涉及读取的库均作为目标库，并在各存储库的所有读取方案中，将涉及读取任一所述目标库的读取方案标识为不可用，各路读取请求的目标存储库的读取方案均在可用的读取方案中选择；
    根据确定的各路读取请求的目标存储库的读取方案，进行数据的同步读取。
  2. 根据权利要求1所述的方法，其中，所述各路读取请求的目标存储库的读取方案均在可用的读取方案中选择，包括：
    在预先构建的第一真值表中，选择当前待确定的目标存储库的读取方案；其中，所述第一真值表用于存储各存储库的所有读取方案，以及各所述读取方案涉及读取的库；
    在选择的读取方案中，选择任一个可用的读取方案作为当前一路读取请求的目标存储库的读取方案。
  3. 根据权利要求1或2所述的方法，其中，所述在每确定一路读取请求的目标存储库的读取方案后，将所述确定的读取方案所涉及读取的库均作为目标库，并在各存储库的所有读取方案中，将涉及读取任一所述目标库的读取方案标识为不可用，包括：
    在预先构建的第二真值表中，选择与已确定为当前一路读取请求的目标存储库的读取方案相冲突的读取方案；其中，所述第二真值表用于存储各存储库的所有读取方案中，与各存储库的各读取方案相冲突的读取方案，两个读取方案相冲突为所述两个读取方案涉及读取的库中存在至少一个相同的库；
    将选择的所述相冲突的读取方案标识为不可用。
  4. 根据权利要求3所述方法，其中，所述将选择的所述相冲突的读取方案标识为不可用，包括：
    在预先构建的位图中，选择与已确定为当前一路读取请求的目标存储库的读取方案相冲突的读取方案所对应的比特位；其中，所述位图中的比特位与各存储库的各读取方案一一对应，可用读取方案对应的比特位上的值为0，不可用读取方案对应的比特位上的值为1；
    在所述位图中，将选择的所述相冲突的读取方案对应的比特位上的值置为1。
  5. 根据权利要求1-4中任一项所述的方法，其中，所述依次确定各路读取请求的目标存储库的读取方案之前，包括：
    将各存储库的所有读取方案均标识为可用。
  6. 根据权利要求1-4中任一项所述的方法，其中，在确定最后一路读取请求的目标存储库的读取方案后，包括：
    省略所述将所述确定的读取方案所涉及读取的库均作为目标库，并在各存储库的所有读取方案中，将涉及读取任一所述目标库的读取方案标识为不可用的处理步骤。
  7. 根据权利要求3所述的方法，其中，在确定最后一路读取请求的目标存储库的读取方 案后，包括：
    省略所述将所述确定的读取方案所涉及读取的库均作为目标库，并在各存储库的所有读取方案中，将涉及读取任一所述目标库的读取方案标识为不可用的处理步骤；
    所述各路读取请求的目标存储库的读取方案均在可用的读取方案中选择，包括：
    针对各路读取请求的目标存储库，按优先级顺序从该目标存储库的可用读取方案中选取读取方案；
    其中，所述第二真值表中，用于存储各存储库的所有读取方案中，与所述优先级顺序对应的最后一个读取方案相冲突的读取方案的表项为空。
  8. 根据权利要求1-7中任一项所述的方法，其中，所述编码库存储的所述编码版本为对所述多个存储库中至少部分存储库中数据，采用有限域加法进行编码后形成的数据；所述有限域加法包括如下方法中的任一种：
    超图构造法、一维编码方法、二维编码方法以及多维编码方法。
  9. 根据权利要求8所述的方法，其中，所述根据确定的各路读取请求的目标存储库的读取方案，进行数据的同步读取之后，包括：
    对读取的所述编码库，以及该编码库对应的多个存储库中的数据执行有限域减法，得到所述目标存储库的数据。
  10. 根据权利要求8或9所述的方法，其中，所述方法还包括：
    接收一路写入请求；
    确定待写入数据的目标存储库，以及基于该目标存储库形成的目标编码库；
    读取所述目标存储库和所述目标编码库中的数据；
    通过有限域的加减法计算，得到需要写入目标存储库的待写入数据和需要写入目标编码库的编码版本；
    同步将待写入数据写入到待写入数据的所述目标存储库，将所述编码版本写入到所述目标编码库。
  11. 根据权利要求10所述的方法，其中，所述方法包括：
    当同步接收多路读取请求和一路写入请求时，基于预先确定的访问优先级，确定所述多路读取请求和一路写入请求之间的处理顺序，并执行相应处理。
  12. 一种电子设备，包括：
    至少一个处理器；以及，
    与所述至少一个处理器通信连接的存储器；其中，
    所述存储器存储有可被所述至少一个处理器执行的指令，所述指令被所述至少一个处理器执行，以使所述至少一个处理器能够执行如权利要求1至11中任一项所述的访问存储器中数据的方法。
  13. 一种计算机可读存储介质，存储有计算机程序，所述计算机程序被处理器执行时实现权利要求1至11中任一项所述的访问存储器中数据的方法。
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