WO2023272615A1

WO2023272615A1 - Quiescent power dissipation estimation method and related apparatus

Info

Publication number: WO2023272615A1
Application number: PCT/CN2021/103711
Authority: WO
Inventors: 顾郁炜; 魏威; 陈立前; 姚琮
Original assignee: 华为技术有限公司
Priority date: 2021-06-30
Filing date: 2021-06-30
Publication date: 2023-01-05

Abstract

Embodiments of the present application provide a quiescent power dissipation estimation method and a related apparatus. The method comprises: obtaining a first quiescent current IDDQ of a first working circuit belonging to a target power domain; and inputting the first IDDQ into a power dissipation model to obtain first quiescent power dissipation of the first working circuit, wherein the power dissipation model is determined according to at least two historical IDDQs and historical quiescent power dissipation corresponding to the historical IDDQs.

Description

A static power consumption estimation method and related device

technical field

The present application relates to the technical field of semiconductors, and in particular to a method for estimating static power consumption and related devices.

Background technique

Static power consumption is an important statistic in semiconductor technology. Static power consumption, also known as leakage power consumption, is the power consumption generated by leakage current when the circuit is in a waiting or inactive state.

The static power consumption is related to the process angle of the circuit, the current temperature, and the current voltage. Since the process angle cannot be directly obtained, an intermediate quantity is needed to represent the influence of the process angle on the static power consumption.

In a method for estimating power consumption, a delay chain can be set in the circuit, the current time delay is collected when the circuit is used, and the current static power consumption of the circuit is determined by using the corresponding relationship between time delay and static power consumption.

However, there are often deviations in estimating static power consumption using delay information collected by delay chains.

Contents of the invention

The present application provides a control method and a related device for data transmission between devices, which can improve the satisfaction of business requirements.

In a first aspect, the present application provides a static power consumption estimation method, the method comprising:

Acquiring a first quiescent current IDDQ of a first working circuit belonging to a target power domain;

Inputting the first IDDQ into a power consumption model to obtain a first static power consumption corresponding to the first working circuit;

Wherein, the power consumption model is determined according to at least two historical IDDQs and historical static power consumption corresponding to each of the historical IDDQs.

In a possible implementation, the power consumption model is a rate model

P=K*P _base ; where, K=F ₁ (Q);

Wherein, P is the first static power consumption, the current ratio Q is the current ratio between the _first IDDQ and the reference IDDQ, and the power consumption current ratio relationship function F1 is used to reflect the current ratio Q and the power consumption ratio The relationship between K, the base IDDQ is one of the at least two historical IDDQs, and the base static power consumption P _base is the historical static power consumption corresponding to the base IDDQ.

In a possible implementation, the power consumption model is a calibration model

P=Ca(K*P _base ); where, K=F ₁ (Q);

Wherein, P is the first static power consumption, the current ratio Q is the current ratio between the _first IDDQ and the reference IDDQ, and the power consumption current ratio relationship function F1 is used to reflect the current ratio Q and the power consumption ratio The relationship between K, the calibration function Ca is used to reflect the relationship between the calculated static power consumption and the actual static power consumption, the reference IDDQ is a historical IDDQ in the at least two historical IDDQs, the reference static power consumption P _base is the historical static power consumption corresponding to the base IDDQ.

In a possible implementation manner, the at least two historical IDDQs and the historical static power consumption corresponding to each of the historical IDDQs are: sample data obtained from at least two samples; wherein,

The power consumption model is obtained by training using sample data of the at least two samples; wherein the at least two samples are located on different dies, and each sample includes the first work belonging to the target power domain circuit;

The sample data of each sample includes: at least one historical IDDQ of the at least two historical IDDQs, and historical static power consumption corresponding to each historical IDDQ of the at least one historical IDDQ.

In a possible implementation manner, the base sample is the sample Y ₀ with the smallest historical IDDQ among the at least two samples; the base static power consumption P _base is the historical static power consumption IDDQ ₀ of the sample Y ₀ Corresponding P ₀ ;

The number of the at least two samples is n+1, where n is an integer greater than 0; among the n+1 samples, other samples except the Y ₀ are Y ₁ ... Y _n ;

The power consumption current ratio relationship function F1 in the power consumption model is to use the historical current ratio and historical current ratio _of each sample in the samples _Y1 ... _Yn , and the power consumption current ratio relationship model K ₌ F1 (Q) conduct training, sure;

Among the historical power consumption ratios K ₁ ...K _n corresponding to the samples Y ₁ ...Y _n , the historical power consumption ratios corresponding to the i-th sample Y _i

P _i is the historical static power consumption of Y _i ; among the historical current multipliers Q ₁ ...Q _n of the samples Y ₁ ...Y _n , the historical current multiplier corresponding to the ith sample Y _i

IDDQ _i is the historical IDDQ of Y _i , and i is an integer greater than 0 and less than or equal to n-1.

In a possible implementation manner, before inputting the first IDDQ into the power consumption model to obtain the first static power consumption corresponding to the first working circuit, the method further includes:

Acquiring the current voltage and current temperature of the first working circuit;

The inputting the first IDDQ into the power consumption model to obtain the first static power consumption corresponding to the first working circuit includes: inputting the first IDDQ, the current voltage and the current temperature into the power consumption consumption model, to obtain the first static power consumption corresponding to the first working circuit;

Wherein, the power consumption model is determined according to the historical IDDQ of the at least two samples under at least two sets of historical temperature and historical voltage combinations and the historical static power consumption corresponding to each of the historical IDDQs.

In a possible implementation manner, the base power consumption P _base in the rate model is determined according to P _base = F ₀ (V, T); wherein, the base power consumption relationship function F ₀ is based on at least two A historical temperature and historical voltage combination and the historical static power consumption of the sample Y ₀ under the at least two historical temperature and historical voltage combinations are determined;

Wherein, the sample data of each sample includes: historical IDDQ and historical static power consumption of each sample under each historical temperature and historical voltage combination in the at least two historical temperature and historical voltage combinations.

In a possible implementation manner, the reference power consumption relationship function F ₀ in the power consumption model uses the at least two historical temperature and historical voltage combinations, and the sample Y ₀ is in the at least two The historical static power consumption under the combination of historical temperature and historical voltage is determined by training the power consumption current ratio relationship model P _base =F ₀ (V,T).

In a possible implementation manner, the process angle of the first working circuit in each of the at least two samples satisfies:

Process corners of each of the at least two samples are equally spaced within the range of process corners of the first working circuit;

There are a first sample and a second sample among the at least samples, the process angle of the first sample is the minimum value SS in the process angle range of the first working circuit; the process angle of the second sample is The maximum value FF of the process angle range.

In a possible implementation, the method further includes:

determining the average power consumption of the first working circuit within a preset time period according to the first static power consumption and the power-on state of the first working circuit within a preset time period;

Wherein, the power-on state of the first working circuit within a preset time period is determined based on a level signal of the first working circuit received through a signal line.

In a second aspect, the embodiment of the present application provides an electronic device, including:

An acquisition module, configured to acquire the first quiescent current IDDQ of the first working circuit belonging to the target power domain;

A processing module, configured to input the first IDDQ into a power consumption model to obtain a first static power consumption corresponding to the first working circuit;

In a possible implementation manner, the acquiring module is further configured to acquire the current voltage and current temperature of the first working circuit;

The processing module is further configured to input the first IDDQ, the current voltage and the current temperature into the power consumption model to obtain the first static power consumption corresponding to the first working circuit;

Wherein, the power consumption model is determined according to historical IDDQs of at least two samples under at least two sets of historical temperature and historical voltage combinations and historical static power consumption corresponding to each of the historical IDDQs.

In a third aspect, a circuit system supporting power consumption estimation is provided, including:

A first working circuit belonging to the target power domain, where the first working circuit stores a quiescent current IDDQ of the first working circuit;

an estimation circuit, configured to acquire the IDDQ of the first operating circuit from the first operating circuit, and input the IDDQ of the first operating circuit into a power consumption model to obtain the static power of the first operating circuit Consumption estimation results;

In a possible implementation manner, the first working circuit includes a non-volatile memory;

The IDDQ of the first working circuit is measured by an IDDQ test tool under the combined conditions of preset temperature and preset voltage, and is stored in the non-volatile memory of the first working circuit;

The estimation device is used to read the IDDQ of the first working circuit from the non-volatile memory of the first working circuit through the system bus.

In a possible implementation manner, the circuit system further includes:

a temperature sensor, configured to report the current temperature data of the first working circuit to the estimation circuit;

a voltage data register, configured to store voltage data currently configured by the first working circuit;

The estimating device is further configured to read the voltage data of the current configuration of the first working circuit from the voltage data register.

In a possible implementation manner, the target power domain circuit is connected to the estimation circuit through a signal line;

The target power domain circuit is further configured to send a level signal to the estimation circuit through the signal line;

The estimation circuit is further configured to determine the power-on/off state of the target power supply circuit through the level signal.

In a possible implementation manner, the estimation circuit is connected to the first working circuit through a bus.

In a fourth aspect, the embodiment of the present application provides a data transmission method, the method comprising:

Inputting the first IDDQ into a power consumption model to obtain a first static power consumption of the first working circuit;

Using the estimation method provided in the embodiment of the present application, compared with the method of determining the static power consumption by using the delay chain, for a circuit including transistors (for example, there is an oxide layer), the delay chain cannot obtain MOS tubes, P tubes, and N tubes. The tunneling current (Tunneling), that is, the delay information can only reflect the static power consumption due to the drift current, omitting the static power consumption due to the tunneling current, so there is a problem of inaccurate power consumption estimation. The power consumption estimation method provided by the embodiment of the present application can cover all leakage components, and the power consumption estimation is more accurate.

In a possible implementation, the power consumption model is a rate model

P=K*P _base ; where, K=F ₁ (Q);

Wherein, the current multiplying factor Q is the current multiplying factor between the _first IDDQ and the reference IDDQ, and the power consumption current multiplying factor relationship function F1 is used to reflect the relationship between the current multiplying factor Q and the power consumption multiplying factor K, and the said reference IDDQ is said at least A historical IDDQ in two historical IDDQs, the base static power consumption P _base is the historical static power consumption corresponding to the base IDDQ;

_The F1 is based on the historical current multiplier between other historical IDDQs except the reference IDDQ in the at least two IDDQs and the reference IDDQ, and the historical static power consumption corresponding to the other historical IDDQs and determined by the historical power multiplier between the P _base .

P=Ca(K*P _base ); where, K=F ₁ (Q);

Among them, the current multiplier Q is the current multiplier between the _first IDDQ and the reference IDDQ, the power consumption current multiplier relationship function F1 is used to reflect the relationship between the current multiplier Q and the power consumption multiplier K, and the calibration function Ca is used to reflect the calculation static A relationship between power consumption and actual static power consumption, wherein the base IDDQ is one historical IDDQ in the at least two historical IDDQs, and the base static power consumption P _base is the historical static power consumption corresponding to the base IDDQ;

_The F1 is based on the historical current multiplier between other historical IDDQs except the reference IDDQ in the at least two IDDQs and the reference IDDQ, and the historical static power consumption corresponding to the other historical IDDQs and Determined by the historical power consumption ratio between the P _bases ;

The Ca is determined based on the historical static power consumption corresponding to the at least two IDDQs and the historical calculation static power consumption corresponding to the at least two IDDQs, wherein each of the historical IDDQs in the at least two historical IDDQs The calculated static power consumption corresponding to the IDDQ is calculated according to each historical IDDQ and P=K*P _base .

In a possible implementation manner, before inputting the first IDDQ into the power consumption model to obtain the first static power consumption corresponding to the first IDDQ of the first working circuit, the method further includes:

obtaining sample data corresponding to each sample in at least two samples;

Using the sample data of the at least two samples, train to obtain the power consumption model;

Wherein, the at least two samples are located on different dies, and each sample includes the first working circuit belonging to the target power domain; the sample data of each sample includes: historical IDDQ and historical IDDQ corresponding to historical static power consumption; the baseline IDDQ is a historical IDDQ of a baseline sample among the at least two samples;

The training to obtain the power consumption model by using the sample data of the at least two samples includes:

Determine the historical power consumption ratio K ₁ ...K _n of the samples Y ₁ ...Y _n ; wherein, the historical power consumption ratio corresponding to the i-th sample Y _i

P _i is the historical static power consumption of Y _i ;

Determine the historical current rate Q ₁ ... Q _n of the samples Y ₁ ... Y _n ; wherein, the historical current rate corresponding to the ith sample Y _i

IDDQ _i is the historical IDDQ of Y _i , i is an integer greater than 0 and less than or equal to n-1;

Using the historical current ratios and historical current ratios of each of the samples Y ₁ . . . Y _n , train the power consumption current ratio relationship model K=F ₁ (Q), and determine the power consumption current ratio relationship function F ₁ .

In a possible implementation manner, before inputting the first IDDQ into the power consumption model to obtain the first static power consumption of the first working circuit, the method further includes:

acquiring the current voltage and current temperature of the first working circuit belonging to the target power domain;

The inputting the first IDDQ into the power consumption model to obtain the first static power consumption of the first working circuit includes: inputting the first IDDQ, the current voltage and the current temperature into the power consumption a model to obtain a first static power consumption of the first working circuit;

Wherein, the power consumption model is based on historical IDDQs under combinations of at least two groups of historical temperatures and historical voltages and historical static power consumption corresponding to each of the historical IDDQs.

The acquiring sample data corresponding to each sample in at least two samples includes:

obtaining sample data at at least two historical temperature and historical voltage combinations for each of the at least two samples;

Wherein, the sample data of each sample includes: historical IDDQ and historical static power consumption under each historical temperature and historical voltage combination in the at least two historical temperature and historical voltage combinations.

In a possible implementation manner, the training to obtain the power consumption model by using the sample data of the at least two samples further includes:

Using at least two historical temperature and historical voltage combinations, and the historical static power consumption of the sample Y ₀ under the at least two historical temperature and historical voltage combinations, the power consumption current ratio relationship model P _base =F ₀ ( V, T) for training to determine the reference power consumption relation function F ₀ .

In a possible implementation manner, the process angle of the first working circuit in each of the at least two samples satisfies;

In a possible implementation manner, the reference sample _Y0 is a sample with a process corner of SS.

In a possible implementation, the first IDDQ is the IDDQ when the first working circuit is in the power-on state, wherein whether the first working circuit is in the power-on state is based on the determined by the level signal of the first working circuit.

In the fifth aspect, a device for estimating static power consumption is provided, including:

An interface, configured to obtain the first IDDQ of the first working circuit belonging to the target power domain.

A processor configured to execute the first aspect or any one of the methods in the first aspect.

In a possible implementation manner, the interface includes:

The first interface is connected to the system bus and is used to obtain the first IDDQ;

The second interface is connected to the first working circuit through a power line, and is used to obtain power-on and power-off information of the first working circuit;

The third interface is connected to a temperature sensor and is used to obtain the current temperature of the first working circuit;

The fourth interface is connected to the voltage data register and is used to obtain the current voltage of the first working circuit.

In yet another aspect, an embodiment of the present application provides a static power consumption estimation device, the device includes a processing module and a transceiver module, and the processing unit executes instructions to control the device to perform the first aspect or any possible design of the first aspect method.

In a possible implementation manner, the device may further include a storage module.

In a possible implementation manner, the apparatus may be a system on a chip, or a chip in the system on a chip.

When the device is a system on chip, the processing module may be a processor, and the transceiver module may be a transceiver; if it further includes a storage module, the storage module may be a memory.

When the device is a chip in a system on chip, the processing module can be a processor, and the transceiver module can be an input/output interface, a pin or a circuit, etc.; if it also includes a storage module, the storage module can be a storage module in the chip (for example, a register, a cache, etc.), or a storage module (for example, a read-only memory, a random access memory, etc.) outside the chip.

Among them, the processor mentioned in any of the above places can be a general-purpose central processing unit (Central Processing Unit, referred to as CPU), a microprocessor, a specific application integrated circuit (application-specific integrated circuit, referred to as ASIC), or one or A plurality of integrated circuits for controlling program execution of the spatial multiplexing method of the above aspects.

In yet another aspect, the present application provides a computer-readable storage medium having instructions stored therein, and the instructions can be executed by one or more processors on a processing circuit. When it runs on a computer, it causes the computer to execute the method in the above first aspect or any possible implementation thereof.

In yet another aspect, a computer program product including instructions is provided, which, when run on a computer, causes the computer to execute the method in the above first aspect or any possible implementation thereof.

Description of drawings

In order to more clearly illustrate the technical solutions in this application or the prior art, the accompanying drawings that need to be used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the accompanying drawings in the following description are the present For some embodiments of the application, those of ordinary skill in the art can also obtain other drawings based on these drawings without any creative effort.

FIG. 1A is a schematic diagram of an electronic device application static power consumption optimization device performance in an embodiment of the present application;

FIG. 1B is a schematic diagram of the division of power domains on an SOC provided with a CPU in an electronic device in an embodiment of the present application;

FIG. 2A is a schematic diagram of the production process of mass-produced chips in the embodiment of the present application;

FIG. 2B is a schematic diagram of a process of acquiring parameters of a power consumption model in an embodiment of the present application;

3A is a schematic diagram of the system structure of the circuit system in the mass-produced chip applying the estimation method in the embodiment of the present application;

FIG. 3B is a schematic diagram of the internal structure of the estimation device in the embodiment of the present application;

FIG. 4 is a schematic flowchart of a method for estimating static power consumption provided by an embodiment of the present application;

5 is a schematic diagram of the acquisition process of the model parameters of the magnification model provided by the embodiment of the present application;

Fig. 6 is a schematic diagram of the distribution of process angles of samples at equal intervals in the range of process angles in the embodiment of the present application;

Fig. 7 is a schematic diagram of the combination of temperature and voltage values covered by sample data in the embodiment of the present application;

FIG. 8 is a schematic diagram of an implementation process of a static power consumption estimation method in an embodiment of the present application;

FIG. 9 is a schematic diagram of the IDDQ corresponding to the sample in the embodiment of the present application;

Fig. 10 is a schematic diagram of the training process in the embodiment of the present application;

FIG. 11 is a schematic structural diagram of a static power consumption estimation device provided by an embodiment of the present application;

FIG. 12 is another schematic structural diagram of the static power consumption estimating device provided by the embodiment of the present application.

detailed description

The terms used in the embodiments of the present application are only used to explain specific embodiments of the present application, and are not intended to limit the present application.

Embodiment one

The method provided by the embodiment of the present application can be applied to estimate the static power consumption of a chip or a circuit in an electronic device. As an example, the electronic device may be various terminal devices such as a mobile phone.

In the embodiment of this application, the static power consumption results can be used in electronic equipment for thermal control, scheduling control, dynamic voltage frequency adjustment (DVFS), task scheduling and other fields, and accurate static power consumption estimation will be better Help electronic equipment to play the overall performance of electronic equipment.

FIG. 1A is a schematic diagram of an electronic device applying static power consumption to optimize device performance in an embodiment of the present application.

As shown in FIG. 1 , as an example, a CPU of an electronic device may include: a power consumption estimation unit, a temperature control unit, a scheduling unit, and a dynamic voltage frequency adjustment unit.

Wherein, the power consumption estimation unit may also be referred to as a power consumption calculation unit, and the power consumption estimation unit may be used to estimate at least one of dynamic power consumption and static power consumption of circuits in the CPU. As an example, the power consumption estimation unit may include a static power consumption estimation unit, and the static power consumption estimation unit may be used to estimate static power consumption of circuits in the CPU.

As an example, the power consumption estimation unit may collect relevant information for calculating the static power consumption of circuits in the CPU and calculate the static power consumption, and the power consumption estimation unit may report the calculation results to the temperature control unit and the scheduling control unit. As an example, the temperature control unit may control the DVFS to adjust the working voltage of the circuits in the CPU according to the temperature and power consumption calculation results. As an example, the scheduling unit can control the DVFS to adjust the operating voltage of the circuit in the CPU according to the power consumption calculation result, load and other information. In addition, the scheduling unit can also control the task according to the power consumption calculation result, CPU load and other information. The migration unit allocates, migrates, and manages tasks running in each CPU. As an example, the temperature control unit may also adjust the temperature of the operating environment in the electronic device according to the power consumption calculation result.

In the embodiment of the present application, the power consumption estimating unit may be referred to as an estimating device for short, and the estimating device may be realized by a circuit, and a circuit for realizing the estimating device may be called an estimating circuit.

In the technical solution provided by the embodiment of the present application, the estimating device can acquire quiescent current (Integrated Circuit Quiescent Current, IDDQ) for a circuit involved in a power domain or circuits involved in multiple power domains on the electronic device, and perform quiescent current based on the quiescent current. Estimation of power consumption.

In practical applications, the division of power domains in electronic equipment can be divided by designers according to actual power supply control needs when designing circuits. For a power domain, the power supply voltage of all logic circuits in the power domain is the same. All the logic circuits in a power domain can be all in the power-on state, or part of them can be in the power-on state and some can be in the power-off state. As an example, when a power domain contains multiple logic circuits, one or more switches can be set in the circuits contained in a power domain, and each switch can switch logic circuits in a control area in the power domain. electric control.

In the embodiment of the present application, the electronic device may include one or more systems on chip (system on chip, SOC) or SOC. As an example, one SOC may belong to one power domain, multiple SOCs may also belong to one power domain, and some circuits in one SOC may also belong to one power domain. The estimating means can estimate the static power consumption of the circuits of the power domains located on the same or different SOCs in the electronic equipment. It should be noted that the estimation circuit corresponding to the estimation device may also be located on a certain SOC, and the estimation device may also estimate the static power consumption of its own circuit.

As an example, one or more CPUs in an electronic device may reside on one SOC.

FIG. 1B is a schematic diagram of division of power domains on an SOC provided with a CPU in an electronic device in an embodiment of the present application. As shown in FIG. 1B , for example, one or more devices may be included on the SOC. For example, an SOC may include one or more CPUs, each CPU may include one or more cores (core), and each core may include one or more logic circuits. Each logic circuit can be used to realize some set logic functions. As an example, multiple cores can employ a big.LITTLE heterogeneous architecture. The architecture is designed to assign the right processor to the right job.

In one example, a circuit in a power domain may include one or more logic circuits, in another example, a circuit in a power domain may include one or more cores, in yet another example, a circuit in a power domain The circuits in one power domain may include one or more CPUs, and in another example, the circuits in one power domain may include one SOC. It should be noted that multiple logic circuits in one core can be located in one power domain or in multiple power domains; multiple cores in one CPU can be located in one power domain or in multiple power domains. One SOC Multiple CPUs in the CPU may be located in one power domain or in multiple power domains, which is not limited in this embodiment of the present application.

In the embodiment of the present application, after performing static power consumption estimation on circuits in one power domain, various subsystems in the electronic device may also be estimated based on static power consumption estimation results of circuits in multiple power domains in the electronic device Perform static power estimation. As an example, static power consumption may be estimated based on circuits in multiple power domains involved in an SOC, and static power consumption of the entire SOC may be determined based on static power consumption of circuits in multiple power domains. Details will be described in other embodiments of this application.

Taking the estimating device estimating the static power consumption of the first working circuit belonging to the target power domain as an example, the application of the estimating method provided by the embodiment of the present application will be exemplarily described below.

In the embodiment of the present application, the working circuits belonging to the target power domain may be referred to as circuits in the target power domain.

In practical applications, as an example, the target power domain circuit and the estimation circuit may be located on a mass-produced chip.

FIG. 2A is a schematic diagram of the production process of mass-produced chips in the embodiment of the present application. As an example, a mass-produced chip including a target power domain circuit and an estimation circuit can be generated using the process shown in FIG. 2A.

As shown in Figure 2A, the production process of mass-produced chips can include:

Firstly, the die production apparatus 1001 can process the wafer into a die, which includes a target power domain circuit and an estimation circuit, and the estimation circuit includes a basic power consumption model.

Then, the IDDQ testing device 1002 can perform IDDQ measurement on the target power domain circuit in the die, and write the measured IDDQ into the memory in the target power domain circuit, so as to obtain the target power domain circuit and the estimation circuit including the IDDQ stored therein. die. In an example, the IDDQ testing device 1002 can set the die to be mass-produced to test the IDDQ under a preset combination of temperature and voltage.

Afterwards, the packaging device 1003 may package the bare chip storing the target power domain circuit and the estimation circuit of the IDDQ to obtain a mass-produced chip.

Afterwards, the configuring device 1004 can configure the pre-acquired power consumption model parameters in the estimation circuit of the mass-produced chip.

After the mass production chip is configured with the power consumption model parameters, the estimated circuit can read the IDDQ of the target power domain circuit from the memory of the target power domain circuit when the mass production chip is working normally, and configure the IDDQ input with the power consumption model parameters The power consumption model of the target power domain circuit is estimated to obtain the static power consumption.

It should be noted that the parameters of the power consumption model stored in the configuring device 1004 may be obtained in advance.

Fig. 2B is a schematic diagram of the process of obtaining power consumption model parameters in the embodiment of the present application. As shown in Fig. 2B, as an example, the process of obtaining power consumption model parameters may include:

First, the die production apparatus 1001 processes the wafer to obtain at least two samples located on one or more dies, wherein each sample includes a target power domain circuit. It should be noted that, when generating the samples, the die production apparatus 1001 can set the process angles of the target power domain circuits in all samples to cover multiple value points between the minimum value and the maximum value of the process angle range. In other embodiments of the present application, the process angle covering multiple value points will be described in detail, which will not be repeated here.

Then, for each sample, the IDDQ testing device 1002 runs through and tests the IDDQ of the target power domain circuit under different temperature and voltage combination conditions, and stores the tested IDDQ into the memory of the target power domain circuit in each sample. In other embodiments of the present application, the IDDQ under different temperature and voltage combination conditions of the traversal test will be described in detail, which will not be repeated here.

Afterwards, the training device 1005 extracts multiple sets of sample data from at least two samples, wherein each sample data includes the IDDQ of the corresponding sample. Then, the training device 1004 can use multiple sets of sample data to train the power consumption model to obtain power consumption model parameters. In other embodiments of the present application, a detailed description will be given on obtaining the parameters of the power consumption model by using the training data, which will not be repeated here.

After that, the training device 1005 can send the obtained power consumption model parameters to the configuration device 1004 . The configuration device can configure the parameters of the power consumption model in the estimation circuit of the mass-produced chip when the mass-produced chip is upgraded or the software is updated. As an example, the training device 1005 and the configuration device 1004 may also be the same device, which is not limited in this embodiment of the present application.

In the embodiment of the present application, as an example, a mass-produced chip may include a system composed of a target power domain circuit and an estimation device. As an example, other devices or circuits in the circuit system may be placed in the bare die before mass-production chip packaging by the die production device.

FIG. 3A is a schematic structural diagram of a circuit system in a mass-produced chip to which the estimation method in the embodiment of the present application is applied.

As shown in FIG. 3A , the circuit system may include: an estimating device 10 , a target power domain circuit 20 for estimating static power consumption, and a system bus (not shown in the figure). As an example, the circuit system may further include: a temperature sensor 30 and the like.

In the embodiment of the present application, the estimation device 10 and the target power domain circuit 20 may be respectively connected to a system bus (not shown in the figure). The estimating device 10 may acquire integrated circuit quiescent current (Integrated Circuit Quiescent Current, IDDQ) data of the target power domain circuit 20 through the system bus. IDDQ can also be called static leakage value.

It should be noted that, in the embodiment of this application, as an example, the power domain corresponding to the target power domain circuit may be the target power domain, and the target power domain circuit may have the ability to count and report the IDDQ data of the circuits in the target power domain . The target power domain may be any power domain in the electronic device.

In the embodiment of the present application, the target power domain circuit may include a non-volatile memory, for example, a one-time programmable memory (eFuse), a read-only memory (Read-Only Memory, ROM), and the like. Non-volatile memory can be used to store the IDDQ of the target power domain circuit at a preset temperature and voltage combination. As an example, the target power domain circuit IDDQ may be measured by an IDDQ test device in an ATE test stage before packaging.

In the embodiment of the present application, the estimating device 10 may also be connected to a temperature sensor 30 to acquire temperature data corresponding to the target power domain circuit.

In the embodiment of the present application, the system may further include: a voltage data register 40 .

Wherein, the voltage data register 40 can be connected with the estimation device 10 . The estimating device 10 can acquire current power supply voltage data corresponding to the target power supply domain. The allowable value of the voltage of the target power domain may be one or more fixed values, or may be an adjustment interval. The target power domain circuit can write the current power supply voltage into the voltage data register. It should be noted that the voltage data register can be realized by software or by hardware.

As an optional implementation, when the allowable value of the voltage of the target power domain has only one fixed value, the estimating device may also store the allowable value of the target power domain in advance, without obtaining the target power domain through the voltage data register. Corresponding current voltage data.

In the embodiment of the present application, the estimating means may be implemented by software or by hardware.

The embodiment of the present application also provides an optional implementation manner of the estimation device.

Fig. 3B is a schematic diagram of the internal structure of the estimation device in the embodiment of the present application. As shown in FIG. 3B, as an example, the estimation device may include: a configuration (CFG) module, a clock reset group (Clock Reset Group, CRG) module, a timer control (TIMER_CTRL) module, and a processing (Process) module. in:

(1) The CFG module can be responsible for the configuration of the entire hardware circuit, communicate with the outside through the BUS, and perform related configuration through the software. The clock/reset of the CFG module itself can be controlled by an external module.

(2) The CRG module is responsible for providing clock/reset signals to the TIMER_CTRL and Process modules.

(3) The TIMER_CTRL module can be used to generate a control signal for calculating the statistical window size of the static power consumption, and the statistical window size can be controlled by the software of the system bus (BUS) through the CFG module.

(4) The CTRL module in the Process module can be responsible for controlling the start and stop of static power consumption calculation and the multiplexing of computing resources; the Signal module in the Process module can be responsible for asynchronous processing of external signals; the computing unit in the Process module Can be responsible for the specific implementation of the algorithm model.

It should be noted that the implementation of the algorithm involved in the embodiment of the present application includes but is not limited to the above-mentioned hardware structure, and may also be implemented by software or other hardware structures.

In an optional implementation of the embodiment of the present application, when the estimating device is implemented by hardware, the estimating device can also be connected to the power control device 50 of the target power domain circuit; A signal (eg MTCMOS_EN) is sent to the estimation means. Since the power-on and power-on process of the target power domain is usually completed at the millisecond or microsecond level, using hardware interconnection to obtain power-on and power-on signals can help the estimation device accurately obtain various data during the power-on time period, avoiding Incorporating various data of electrical time into the estimation process leads to inaccurate results. In this embodiment of the present application, the power-on/off signal may also be referred to as an enable signal.

As an example, the static power consumption of the target power domain circuit reported by the estimating device to the CPU may be the average power consumption within a preset time period. In one example, the preset time period may be 10 ms. The target power domain circuit is in the power-on state in the first 5ms of 10ms, and in the power-off state in the last 5ms, then the static power consumption in the first 5ms can be determined according to IDDQ, temperature and voltage, for example, the static power consumption in the first 5ms is 0.5 watts , the average power consumption within 10ms can be 0.25 watts.

The method for estimating static power consumption provided by the embodiment of the present application is described below with an example.

FIG. 4 is a schematic flowchart of a method for estimating static power consumption provided by an embodiment of the present application.

As shown in Figure 4, the execution subject of the embodiment of the present application may be an estimation device, and the steps of the embodiment of the present application may include:

S101. Acquire a first IDDQ of a first working circuit belonging to a target power domain.

In this embodiment of the present application, as an example, based on the estimating apparatus shown in the foregoing embodiments, the IDDQ of the first working circuit may be extracted from the memory of the first working circuit belonging to the target power domain through the system bus.

In this embodiment of the present application, as an example, the estimating device may also acquire current temperature data and current voltage data corresponding to the first working circuit. It should be noted that, as an example, the estimating device may obtain the temperature of the target power domain circuit through a temperature sensor when the target power domain circuit is powered on, and read the current voltage used by the target power domain circuit from the voltage data register. .

In this embodiment of the present application, as an example, the estimating device may prepare to acquire the first IDDQ of the first job by using an enable signal. It should be noted that the estimation device directly obtains the enable signal MTCMOS_EN through direct hardware interconnection, and can accurately know the power-on/off status of the target power domain. For example, it can be accurate to the millisecond level. Afterwards, the estimating device can prepare to extract various data during the power-on period, such as temperature, voltage, IDDQ, etc., according to the enabling signal.

S102. Input the first IDDQ into the power consumption model to obtain the first static power consumption of the first working circuit, wherein the power consumption model is determined according to at least one historical IDDQ and historical static power consumption corresponding to each historical IDDQ.

In the embodiment of the present application, as an example, the power consumption model may be written or fixed in the estimation device when the estimation device is produced. As an example, the estimating means may provide an interface for modifying parameters in the power consumption model. As an example, the parameters in the power consumption model may be determined when the model is trained using a set of sample training data.

In the embodiment of the present application, the processing steps of model training may be performed by the estimation device, or may be performed by other devices. If it is performed by other devices, the other devices may send the power consumption model parameters to the estimation device after the model training, by The estimation device configures the model parameters in its own power consumption model. In the following description, the step of model training is performed by the estimation device as an example for illustration.

In this embodiment of the present application, as an example, the parameters of the power consumption model may be configured by the estimating device during upgrade. The estimation device can read the IDDQ of the target power domain circuit from the eFuse every time it is powered on.

In the embodiment of the present application, there are multiple optional implementation manners for the power consumption model.

In a first optional implementation manner, the power consumption model may be a first model P=F(IDDQ), where F is used to represent the relationship between IDDQ and static power consumption. Inputting the first IDDQ into the power consumption model can obtain the first static power consumption corresponding to the first IDDQ.

In a second optional implementation manner, the power consumption model may be a second model P=F'(IDDQ, V, T), where F' is used to represent IDDQ, voltage data V, temperature data T and static power relationship between consumption. At this time, the estimating device may also acquire current temperature data and current voltage data of the first working circuit. The first static power consumption corresponding to the first IDDQ can be obtained by inputting the first IDDQ, current temperature data, and current voltage data of the first working circuit into the second model.

In a third optional implementation manner, the power consumption model may be a third model P=K*P _base .

Among them, P _base is the base power consumption; K=F ₁ (K _base ,V,T), K _base is the base magnification corresponding to P _base , and F ₁ is the first static power based on the combination of K _base and temperature V and voltage T Power dissipation vs. rate function of P _base .

In a fourth optional implementation manner, the power consumption model may be a fourth model P=Ca(K*P _base ).

Among them, P _base is the base power consumption; K=F ₁ (Q, V, T), Q is the current multiplier between the first IDDQ and the base IDDQ, and F ₁ is the current power consumption based on the combination of temperature V and voltage T The relationship function between the rate and the current current rate.

By adopting the technical solution provided by the embodiment of the present application, the static power consumption of the target power domain circuit can be determined based on the IDDQ of the target power domain circuit.

Embodiment two

In this embodiment of the present application, an optional implementation manner of determining parameters of a power consumption model is provided. The process flow of determining the parameters of the power consumption model is exemplarily described below by taking the rate model as an example.

FIG. 5 is a schematic diagram of an acquisition process of model parameters of a magnification model provided by an embodiment of the present application. The execution subject of the embodiment of the present application may be any one of the estimation device, the training device, and the configuration device in the foregoing embodiments. The estimating device is taken as an example below for illustrative description. As shown in Figure 5, the steps of the embodiment of the present application may include:

S201. Acquire sample data of n+1 samples.

In this embodiment of the present application, each sample may be a first working circuit belonging to the same target power domain in different dies with the same circuit structure.

In the embodiment of the present application, each of the n samples may satisfy the following sample selection conditions. As an example, the process corners of the n samples are not all the same. In this manner, the IDDQ data can be made to cover as many process corners as possible. As yet another example, the process angle range of the first working circuit may be an interval from SS to FF, and the process angles of samples in the sample set may be equally spaced within the process angle range. Please refer to FIG. 6 , which is a schematic diagram showing that process angles of the samples in the embodiment of the present application are distributed at equal intervals in the range of process angles. As shown in Figure 6, each point on the horizontal axis is the process corner of a sample. Wherein, there may be a first sample and a second sample in the sample set, the process corner of the first sample is SS, the process corner of the second sample is FF, and other samples may be equally spaced from SS to FF. In practical applications, a group of samples that meet the sample selection conditions can be produced in the production stage. In this way, the training samples can cover a more comprehensive range of process angles, and can cover various values within the range of process angles, and the model parameters obtained after training are more accurate.

In this embodiment of the present application, the sample data of each sample may include IDDQ and static power consumption of each sample.

As an example, the estimating means may extract the IDDQ per sample from the system bus.

As an example, the estimating means may determine the static power consumption corresponding to the IDDQ of each sample according to the temperature and voltage of each sample. For example, the estimating device may determine the static power consumption of the target power domain circuit within the time period according to the extracted temperature data and voltage data within the time period.

In the embodiment of the present application, as an optional implementation manner, the sample data of each sample may include sample data under at least two combinations of temperatures and voltages.

As an example, the estimating device may determine the temperature traversal interval and the voltage traversal interval, and then select several sequentially equidistant temperature values in the temperature traversal interval, and select several sequentially equidistant voltage values in the voltage traversal interval, and then, Obtain the IDDQ and static power consumption of the sample at all possible combinations of temperature values and all voltage values. FIG. 7 is a schematic diagram of sample data covering combinations of temperature and voltage values in the embodiment of the present application. As an example, each sample may be placed in an incubator, and the estimating means may set or adjust the temperature in the incubator, as well as the voltage of the target power domain. Then, the estimating device may traverse in the two dimensions T and V, and collect the IDDQ at each intersection point.

In the embodiment of the present application, as an example, the estimation device can accurately detect the power-on and power-off conditions of the target power domain based on the enable signal EN (such as MTCMOS_EN in FIG. 4 ) obtained through direct hardware connection, for example, it can be accurate to milliseconds After that, the estimating device can prepare to extract various sample data in the power-on time period according to the enable signal, such as temperature, voltage, and IDDQ.

In the embodiment of the present application, as an example, the sample data of each sample can be obtained through the ATE test, and when the ATE test is performed on each sample, the estimation device or other test devices can use the IDDQ and static data of each sample during the ATE test Power consumption is written into eFuse. Afterwards, the estimation device can read the sample data of each sample from the eFuse corresponding to each sample.

Wherein, n may be an integer greater than 0.

S202. Determine a reference sample Y ₀ from n+1 samples.

As an example, the reference sample Y ₀ may be a sample with the smallest IDDQ data. Exemplarily, the IDDQ of the reference sample Y ₀ may be IDDQ ₀ . As another example, the reference sample may be a sample with a process corner of SS. In other embodiments of the present application, the reference sample may also be any sample. As an example, n is an integer greater than 0.

S203. Determine the base power consumption P _base of the base sample Y ₀ .

In the embodiment of the present application, under the same temperature and voltage, the base power consumption of the reference sample Y ₀ may be the static power consumption P _base when the IDDQ of the reference sample Y ₀ is IDDQ ₀ .

In the embodiment of the present application, the estimation device can respectively use the sample data obtained by each sample under different temperature and voltage combinations to train the reference power consumption determination model P _base =F ₀ (V,T), after training, it can be obtained Baseline power consumption relationship function F ₀ .

Afterwards, the estimation device may determine the base power consumption P _base corresponding to the base sample Y ₀ under any combination of temperature and voltage according to the base power consumption determination model.

S204. Determine power consumption ratios K ₁ ...K _n of other samples Y ₁ ...Y _n .

Among them, the power consumption ratio corresponding to the i-th sample Y _i

P _i is the static power consumption of Y _i , and i is an integer greater than 0 and less than or equal to n-1.

Wherein, the power consumption ratio may refer to the ratio of the static power consumption of other samples relative to the static power consumption P _base of the reference sample Y ₀ under the same combination of temperature and voltage.

S205. Determine current multipliers Q ₁ ...Q _n of other samples Y ₁ ...Y _n .

Among them, the current rate corresponding to the i-th sample Y _i

IDDQ _i is the IDDQ of Y _i .

Wherein, as an example, the current rate Q may also be recorded as K _base .

S206, using the power consumption ratios K ₁ ...K _n corresponding to all other samples and the current ratios Q ₁ ...Q _n of all other samples to train the power consumption current ratio relationship model K=F ₁ (Q), and determine the power consumption current Multiplier relationship function F ₁ .

Wherein, the power consumption current ratio relationship function F ₁ is used to reflect the relationship between the current ratio and the power consumption ratio.

In the embodiment of the present application, the power consumption current ratio relationship model can also consider the combined conditions of temperature and voltage. For example, the power consumption current ratio relationship model can also be:

K=F ₁ (Q,V,T),

That is, the estimating device can determine the power consumption ratio and current ratio of other samples based on different temperatures and voltages, and determine the power consumption and current ratio relationship model K=F ₁ ( F ₁ in Q, V, T).

S207. Using the actual static power consumption of each sample and the calculated static power consumption calculated based on P=K*P _base , train the calibration model P=Ca(K*P _base ), and determine the calibration function Ca.

Wherein, the calibration function Ca is used to reflect the relationship between the calculated static power consumption and the actual static power consumption.

In this embodiment of the present application, the actual static power consumption may be calculated by the estimating device according to static current, voltage, and the like.

It should be noted that the step of determining the calibration function in step S206 is not mandatory in this embodiment of the present application.

Using the above steps provided in the embodiment of the present application, parameters related to each function involved in the power consumption model can be determined.

In this embodiment of the present application, after S206, the estimating device may configure the parameters related to the power consumption model determined by the above steps in the relevant programs of the estimating device. In other embodiments of the present application, if the parameters related to the power consumption model are obtained by other devices, the other devices may also configure the parameters related to the power consumption model in the relevant programs of the estimating device. This embodiment of the present application does not limit this.

After configuring the parameters of the power consumption model in the estimating device, the estimating device can estimate the current power consumption of the working circuit based on the current IDDQ and power consumption model of the working circuit obtained from the bus when the working circuit in the target power domain is actually working. Static power.

For example, the power consumption model may be: P=Ca(K*P _base ), where K=F ₁ (Q,V,T), P _base =F ₀ (V,T),

Wherein, it should be noted that the calibration (Calibration) function Ca, the power consumption current ratio relationship function F ₁ , and the reference power consumption relationship function F ₀ can all be determined by the steps in the second embodiment. IDDQ ₀ may be the IDDQ of sample Y ₀ used in the second embodiment. The power consumption model only needs to input the first static current IDDQ of the target power domain circuit, the current temperature T, and the current voltage V to obtain the first static power consumption P of the target power domain circuit.

Embodiment Three

The implementation process of the estimation method provided by the embodiment of the present application will be exemplarily described below in combination with practical applications.

FIG. 8 is a schematic diagram of an implementation process of a static power consumption estimation method provided by an embodiment of the present application.

The static power consumption estimation method provided by the embodiment of this application can be divided into 8 steps as a whole, including hardware circuit design before silicon, programming IDDQ data on EFUSE after silicon, large sample selection, large data collection, and model training And software driver configuration and enablement. On the one hand, the real-time calculation and the adaptability of the scene are guaranteed through the hardware circuit; on the other hand, the comprehensive coverage of the PVT dimension of the sample space and the richness of the training set are guaranteed through large sample selection and big data collection; on the other hand, , through the static power consumption training algorithm based on K_BASE for magnification mapping, the calculation is simplified, the calculation accuracy is high, the hardware implementation is simple, and the estimated device area and power consumption are small.

As shown in Figure 8, the steps of the embodiment of the present application include:

S301. Design the hardware circuit according to the model format before silicon.

In the embodiment of the present application, in the static power consumption training algorithm based on K_BASE magnification mapping, the format of the algorithm model may be fixed. For the specific content of the algorithm, refer to the description in S305 below, which will not be repeated here.

In the embodiment of the present application, the hardware circuit can be designed according to the model format at the pre-silicon stage.

In the embodiment of the present application, as an example, after the designer determines the basic power consumption model, he may write the basic power consumption model into a selected group of samples. Afterwards, the ATE test can be performed on each sample to obtain training data.

S302. The ATE test acquires the IDDQ value of each sample, and writes it in EFUSE.

Wherein, as an example, the ATE test may obtain the IDDQ value of each cluster (cluster). During the ATE test, the IDDQ value corresponding to the power domain that needs to be estimated for static power consumption is burned into EFUSE. The IDDQ value measured in the ATE stage is highly accurate and suitable for mass production.

S303. Select samples of a certain magnitude according to the IDDQ value.

Among them, when selecting the model training set samples, it can be selected according to the IDDQ distribution interval. First of all, the upper and lower limits of the IDDQ value of the IDDQ distribution interval can be determined through a large sample, and the points are evenly distributed in the distribution interval (that is, equally spaced distribution) and a certain number k must be satisfied to ensure the richness of the training set and the comprehensiveness of coverage. Meet the big data needs of the process manufacturing dimension.

S304. Collect various samples to traverse the static leakage values of each voltage at different temperature points.

Each sample in the training set is configured to a certain state and placed in an incubator environment, traversed in the two dimensions of temperature (Temperature, T) and voltage (Voltage, V), and collects the quiescent current at the intersection. As shown in FIG. 7 , (1) V1 is the lower boundary of the voltage traversal interval, Vn is the upper boundary of the voltage traversal interval, and V_step is the interval between the voltage traversal of two adjacent points. V1 and Vn can be determined in combination with the actual voltage range, and the adjustment of V_step affects the accuracy of the model. (2) T1 is the lower bound of the temperature traversal interval, Tn is the upper bound of the temperature traversal interval, and T_step is the interval between the temperature traversal of two adjacent points. T1 and Tn can be determined based on the estimated actual temperature distribution range, and the adjustment of T_step affects the accuracy of the model. (3) k samples, each sample corresponds to n*m quiescent currents Ln_m in the two dimensions of V and T, forming a sample space coverage of PVT.

S305. Train the static power consumption model.

As an example, FIG. 9 is a schematic diagram of the IDDQ corresponding to the sample in the embodiment of the present application. As shown in FIG. 9, the sample is selected according to S303, wherein Y0 is the lower bound of the interval, representing the minimum value of IDDQ in the sample space; Yn is the upper bound of the interval, representing the maximum value of IDDQ in the sample space.

In the embodiment of this application, the entire training algorithm can be divided into three parts. The core idea is to convert the direct calculation of static power consumption into the calculation of static power consumption ratio under different V/T combinations between samples:

(1) The first part

P _base is introduced, and P _base refers to the static power consumption model P _base of Y ₀ at various temperatures and voltages based on the sample Y ₀ with the smallest IDDQ value. Among them, P _base is related to temperature and voltage.

As an example, P _base =F ₀ (V,T), F ₀ is a function of P _base of Y ₀ calculated based on the combination of V/T. Exemplarily, it can be obtained by training a regression algorithm, and is not limited to a specific form.

(2) The second part

a) K is introduced, and K refers to the ratio of the static power consumption of the remaining samples Y ₁ ... Y _n relative to the static power consumption P _base of the sample Y ₀ (under the same temperature and voltage combination).

b) Introducing K _base , K _base refers to the base multiples of IDDQ ₁ , ... IDDQ _n in the remaining samples Y ₁ ... Y _n relative to IDDQ ₀ of the sample Y ₀ .

c) Since K is related to K _base , temperature, and voltage, K=F ₁ (K _base ,V,T) can be obtained, where F ₁ is based on the combination of Kbase, V, and T to calculate other samples under the current temperature and voltage A function of the multiplier between the static power consumption of any sample in Y ₁ ... Y _n and the static power consumption P _base of sample Y ₀ . Exemplarily, it can be obtained by training a regression algorithm, and is not limited to a specific form.

(3) The third part

Introducing P, which may refer to the final static power consumption value. This part is to perform a calibration in the full sample space after obtaining the preliminary static power consumption on the basis of part (1)/(2), so that P=Ca(K*P _base ) can be obtained, where Ca can be The sample space is a function of calibration based on the calculated power consumption value calculated by K*P _base and the measured power consumption value. Exemplarily, it can be obtained by training a regression algorithm, and is not limited to a specific form.

As an example, FIG. 10 is a schematic diagram of the training process in the embodiment of the present application. Combining the above three parts of the training algorithm, the entire training process can be shown in FIG. 10 .

S306. The boot software reads the eFuse IDDQ value.

In this step, when the device is turned on, the software driver reads the IDDQ value of each target power domain from the corresponding section of the eFuse. It only needs to be read once, and it does not need to be read again until the device is turned on again.

S307. The software drives the configuration parameters to the hardware circuit registers.

Wherein, some parameters required by the hardware circuit of the estimation device may be configured through software driving. For example, IDDQ-related information, statistical window duration and other information. In addition, relevant information for optimizing computing resources may also be included. E.g,

S308. Enable the hardware circuit, and periodically report the result.

Among them, after the hardware initialization and related parameter configuration are completed, the enable signal can be configured through the software driver, so that the hardware circuit can start to work, and the estimation result of the static power consumption can be reported periodically.

In the embodiment of the present application, the relationship between the quiescent current and the quiescent power consumption is used to determine the quiescent power consumption corresponding to the quiescent current of the circuit in the current power domain, and the process of estimating the power consumption may not be limited by temperature, that is, in various The actual static power consumption of the circuit can be reflected more accurately at any temperature.

Adopting the technical solutions provided by the embodiments of the present application has multiple beneficial effects.

On the one hand, based on the IDDQ value (eFuse), temperature and voltage obtained by ATE, the static power consumption Training algorithm for magnification mapping is performed through K_BASE. The calculation steps can be simplified, and the calculation precision is high, the hardware implementation is simple, and the area power consumption is small. It should be noted that, using the IDDQ value, temperature and voltage to cover PVT, under the sample selection and data collection methods in the above-mentioned embodiments, the calculation accuracy of large sample and big data Training is high; the key core of the multiplier mapping through K_BASE is to convert the static power The direct calculation of power consumption is transformed into the calculation of static power consumption multiplier under different V/T between samples, so that the calculation can be simplified, the hardware implementation is simple, and the area power consumption is small.

On the other hand, based on MTCMOS_EN (power-on and power-off enable signals) and Voltage signals, the hardware circuit structure is realized through hardened training algorithms. It can calculate and respond quickly to various scene changes including DVFS and power-on and power-off in real time, and enhance the accuracy of static power consumption calculations in different scenarios. It should be noted that when the chip is actually running, the voltage is switched and powered on and off frequently, and there are many target power domains. If the software responds to these events, the software load will be overloaded; The power-off enable signal and voltage value signal, combined with the hardened training (Training) algorithm, the hardware real-time calculation quickly responds to various events, and the processing timeliness is higher.

On the other hand, the processes of various training algorithms include but not limited to sample selection methods and data collection methods. It can guarantee the accuracy of the training algorithm. First of all, in the sample selection method, the ATE stage determines the upper and lower bounds of the IDDQ value of the sample space through batch samples (including each Corner), and evenly sprinkles points in the IDDQ interval, so that the density can meet the requirements of large samples, that is, the distribution of training data more evenly. Secondly, in the data collection method, after each sample is configured to a certain state, it is placed in an incubator environment, an external power supply is set, and then the traversal test is performed in two dimensions of temperature and voltage. Through the above method, the large sample space coverage in the three dimensions of PVT is formed, that is, the relationship between the static current and power consumption reflected by the large data of the determination model is more accurate, and the large data training based on this can fully guarantee the calculation accuracy.

For other technical solutions and technical effects of the embodiments of the present application, reference may be made to relevant descriptions in other embodiments of the present application.

Embodiment four

The embodiment of the present application also provides a device for estimating static power consumption.

FIG. 11 is a schematic structural diagram of an apparatus for estimating static power consumption provided by an embodiment of the present application. As shown in FIG. 11 , an apparatus 1200 in this embodiment of the present application may include a processing module 1210 and a transceiver module 1220 . in:

The transceiver module is configured to acquire the first quiescent current IDDQ of the first working circuit belonging to the target power domain.

A processing module, configured to input the first IDDQ into a power consumption model to obtain a first static power consumption of the first working circuit; wherein, the power consumption model is based on at least two historical IDDQs and each of the historical IDDQs The corresponding historical static power consumption is determined.

In a possible implementation manner, the power consumption model is a rate model

P=K*P _base ; where, K=F ₁ (Q);

In _an example, the F1 is based on the historical current multiplier between other historical IDDQs except the reference IDDQ among the at least two IDDQs and the reference IDDQ, and the other historical IDDQs correspond to Determined by historical power dissipation multiplier between historical static power consumption and the P _base .

In a possible implementation manner, the power consumption model is a calibration model

P=Ca(K*P _base ); where, K=F ₁ (Q);

In _an example, the F1 is based on the historical current multiplier between other historical IDDQs except the reference IDDQ among the at least two IDDQs and the reference IDDQ, and the other historical IDDQs correspond to Determined by the historical power consumption ratio between historical static power consumption and the P _base ;

In a possible implementation manner, the acquiring module is further configured to acquire the first static power consumption corresponding to the first working circuit before inputting the first IDDQ into the power consumption model the current voltage and current temperature of the first working circuit;

In a possible implementation manner, the process angle of the first working circuit in each of the at least two samples satisfies: the process angle of each of the at least two samples is within the Distributed at equal intervals within the process angle range of the first working circuit; the first sample and the second sample exist in the at least one sample, and the process angle of the first sample is within the process angle range of the first working circuit The minimum value SS; the process angle of the second sample is the maximum value FF of the process angle range.

In a possible implementation manner, the first IDDQ is the IDDQ when the first working circuit is in the power-on state, wherein whether the first working circuit is in the power-on state is based on the determined by the received power-on/off enable signal of the first working circuit.

In a possible implementation manner, the processing module is further configured to determine the first working circuit according to the first static power consumption and the power-on state of the first working circuit within a preset time period Average power consumption over a preset time period;

For details of other technical solutions and technical effects of the embodiments of the present application, refer to relevant descriptions in other embodiments of the present application.

As shown in FIG. 12 , an apparatus 1300 in this embodiment of the present application may include: a processor 1310 and an interface 1320;

Wherein, the interface may be used to acquire the first IDDQ of the first working circuit belonging to the target power domain.

A processor, configured to execute the method described in any one of the embodiments of the present application.

In a possible implementation, the interface may include:

The second interface is connected to the first working circuit through a signal line, and is used to obtain a level signal of the first working circuit;

As an example, the signal line is a hardware cable, a high-level signal in the level signal of the first working circuit may indicate that the first working circuit is in a power-on state, and a low-level signal may indicate that the first working circuit is in a power-off state state.

In practical applications, as an optional implementation manner, the device 1200 may further include a memory 1330 for storing instructions and data.

The embodiment of the present application also provides a circuit system supporting power consumption estimation, including:

In a possible implementation manner, the circuit system further includes:

In the above embodiments, all or part of them may be implemented by software, hardware, firmware or any combination thereof. When implemented using software, it may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on the computer, the processes or functions according to the present application will be produced in whole or in part. The computer can be a general purpose computer, a special purpose computer, a computer network, or other programmable devices. The computer instructions may be stored in or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be transmitted from a website, computer, server, or data center Transmission to another website site, computer, server, or data center by wired (eg, coaxial cable, optical fiber, DSL) or wireless (eg, infrared, wireless, microwave, etc.) means. The computer-readable storage medium may be any available medium that can be accessed by a computer, or a data storage device such as a server or a data center integrated with one or more available media. The available medium may be a magnetic medium (for example, a floppy disk, a hard disk, a magnetic tape), an optical medium (for example, DVD), or a semiconductor medium (for example, a Solid State Disk).

Claims

A method for estimating static power consumption, characterized in that the method comprises:

Acquiring a first quiescent current IDDQ of a first working circuit belonging to a target power domain;

Inputting the first IDDQ into a power consumption model to obtain a first static power consumption corresponding to the first working circuit;

Wherein, the power consumption model is determined according to at least two historical IDDQs and historical static power consumption corresponding to each of the historical IDDQs.
The method according to claim 1, wherein the power consumption model is a rate model

P=K*P base ; where, K=F 1 (Q);

Wherein, P is the first static power consumption, the current ratio Q is the current ratio between the first IDDQ and the reference IDDQ, and the power consumption current ratio relationship function F1 is used to reflect the current ratio Q and the power consumption ratio The relationship between K, the base IDDQ is one of the at least two historical IDDQs, and the base static power consumption P base is the historical static power consumption corresponding to the base IDDQ.
The method according to claim 1, wherein the power consumption model is a calibration model

P=Ca(K*P base ); where, K=F 1 (Q);

Wherein, P is the first static power consumption, the current ratio Q is the current ratio between the first IDDQ and the reference IDDQ, and the power consumption current ratio relationship function F1 is used to reflect the current ratio Q and the power consumption ratio The relationship between K, the calibration function Ca is used to reflect the relationship between the calculated static power consumption and the actual static power consumption, the reference IDDQ is a historical IDDQ in the at least two historical IDDQs, the reference static power consumption P base is the historical static power consumption corresponding to the base IDDQ.
The method according to claim 2 or 3, wherein the at least two historical IDDQs and the historical static power consumption corresponding to each of the historical IDDQs are: sample data obtained from at least two samples; wherein,

The power consumption model is obtained by training using sample data of the at least two samples; wherein the at least two samples are located on different dies, and each sample includes the first work belonging to the target power domain circuit;

The sample data of each sample includes: at least one historical IDDQ of the at least two historical IDDQs, and historical static power consumption corresponding to each historical IDDQ of the at least one historical IDDQ.
The method according to claim 4, wherein the reference sample is the sample Y 0 with the smallest historical IDDQ among the at least two samples; the base static power consumption P base is the historical static of the sample Y 0 P 0 corresponding to power consumption IDDQ 0 ;

The number of the at least two samples is n+1, where n is an integer greater than 0; among the n+1 samples, other samples except the Y 0 are Y 1 ... Y n ;

The power consumption current ratio relationship function F1 in the power consumption model is to use the historical current ratio and historical current ratio of each sample in the samples Y1 ... Yn , and the power consumption current ratio relationship model K = F1 (Q) conduct training, sure;

Among the historical power consumption ratios K 1 ...K n corresponding to the samples Y 1 ...Y n , the historical power consumption ratios corresponding to the i-th sample Y i
P i is the historical static power consumption of Y i ; among the historical current multipliers Q 1 ...Q n of the samples Y 1 ...Y n , the historical current multiplier corresponding to the ith sample Y i
IDDQ i is the historical IDDQ of Y i , and i is an integer greater than 0 and less than or equal to n-1.
The method according to claim 5, wherein before the first IDDQ is input into the power consumption model to obtain the first static power consumption corresponding to the first working circuit, the method further comprises:

Acquiring the current voltage and current temperature of the first working circuit;

The inputting the first IDDQ into the power consumption model to obtain the first static power consumption corresponding to the first working circuit includes: inputting the first IDDQ, the current voltage and the current temperature into the power consumption consumption model, to obtain the first static power consumption corresponding to the first working circuit;

Wherein, the power consumption model is determined according to the historical IDDQ of the at least two samples under at least two sets of historical temperature and historical voltage combinations and the historical static power consumption corresponding to each of the historical IDDQs.
The method according to claim 6, wherein the base power consumption P base in the rate model is determined according to P base = F 0 (V, T); wherein, the base power consumption relationship function F 0 determined according to at least two historical temperature and historical voltage combinations and the historical static power consumption of the sample Y0 under the at least two historical temperature and historical voltage combinations;

Wherein, the sample data of each sample includes: historical IDDQ and historical static power consumption of each sample under each historical temperature and historical voltage combination in the at least two historical temperature and historical voltage combinations.
The method according to claim 7, characterized in that, the reference power consumption relation function F0 in the power consumption model utilizes the combination of the at least two historical temperatures and historical voltages, and the sample Y0 is in the The historical static power consumption under at least two historical temperature and historical voltage combinations is determined by training the power consumption current ratio relationship model P base =F 0 (V,T).
The method according to any one of claims 4-8, wherein the process angle of the first working circuit in each of the at least two samples satisfies:

Process corners of each of the at least two samples are equally spaced within the range of process corners of the first working circuit;

There are a first sample and a second sample among the at least samples, the process angle of the first sample is the minimum value SS in the process angle range of the first working circuit; the process angle of the second sample is The maximum value FF of the process angle range.
The method according to any one of claims 1-9, wherein the method further comprises:

determining the average power consumption of the first working circuit within a preset time period according to the first static power consumption and the power-on state of the first working circuit within a preset time period;

Wherein, the power-on state of the first working circuit within a preset time period is determined based on a level signal of the first working circuit received through a signal line.
An electronic device, characterized in that it comprises:

An acquisition module, configured to acquire the first quiescent current IDDQ of the first working circuit belonging to the target power domain;

A processing module, configured to input the first IDDQ into a power consumption model to obtain a first static power consumption corresponding to the first working circuit;

Wherein, the power consumption model is determined according to at least two historical IDDQs and historical static power consumption corresponding to each of the historical IDDQs.
The electronic device according to claim 11, wherein,

The obtaining module is also used to obtain the current voltage and current temperature of the first working circuit;

The processing module is further configured to input the first IDDQ, the current voltage and the current temperature into the power consumption model to obtain the first static power consumption corresponding to the first working circuit;

Wherein, the power consumption model is determined according to historical IDDQs of at least two samples under at least two sets of historical temperature and historical voltage combinations and historical static power consumption corresponding to each of the historical IDDQs.
The electronic device according to claim 12, wherein the process angle of the first working circuit in each of the at least two samples satisfies:

Process corners of each of the at least two samples are equally spaced within the range of process corners of the first working circuit;

There are a first sample and a second sample among the at least samples, the process angle of the first sample is the minimum value SS in the process angle range of the first working circuit; the process angle of the second sample is The maximum value FF of the process angle range.
A circuit system supporting power consumption estimation, comprising:

A first working circuit belonging to the target power domain, where the first working circuit stores a quiescent current IDDQ of the first working circuit;

an estimating circuit, configured to acquire a first IDDQ of the first operating circuit from the first operating circuit, and input the IDDQ of the first operating circuit into a power consumption model, and obtain an IDDQ of the first operating circuit a first static power consumption estimation result;

Wherein, the power consumption model is determined according to at least two historical IDDQs and historical static power consumption corresponding to each of the historical IDDQs.
The circuit system according to claim 14, wherein the first working circuit comprises a non-volatile memory;

The IDDQ of the first working circuit is measured by an IDDQ test tool under the combined conditions of preset temperature and preset voltage, and is stored in the non-volatile memory of the first working circuit;

The estimation device is used to read the IDDQ of the first working circuit from the non-volatile memory of the first working circuit through the system bus.
The circuit system according to claim 14 or 15, wherein the circuit system further comprises:

a temperature sensor, configured to report the current temperature data of the first working circuit to the estimation circuit;

a voltage data register, configured to store voltage data currently configured by the first working circuit;

The estimating device is further configured to read the voltage data of the current configuration of the first working circuit from the voltage data register.
The circuit system according to any one of claims 14-16, wherein the target power domain circuit is connected to the estimation circuit through a signal line;

The target power domain circuit is further configured to send a level signal to the estimation circuit through the signal line;

The estimation circuit is further configured to determine the power-on/off state of the target power supply circuit through the level signal.