WO2023241017A1

WO2023241017A1 - Ultrasonic transceiving system and electronic device

Info

Publication number: WO2023241017A1
Application number: PCT/CN2022/144383
Authority: WO
Inventors: 杜灿鸿
Original assignee: 深圳市汇顶科技股份有限公司
Priority date: 2022-06-14
Filing date: 2022-12-30
Publication date: 2023-12-21
Also published as: CN116140169A

Abstract

Provided in the present application are an ultrasonic transceiving system and an electronic device. The ultrasonic transceiving system comprises a signal generation circuit and an ultrasonic sensor chip, wherein the signal generation circuit is composed of discrete devices and comprises a pulse generation circuit and a resonance circuit; the pulse generation circuit receives a control signal output by the ultrasonic sensor chip, and generates, according to the control signal, a first pulse voltage signal and a second pulse voltage signal, which are in opposite phases; the resonance circuit receives the first pulse voltage signal and the second pulse voltage signal, which are in opposite phases, and generates a driving signal under the action of the first pulse voltage signal and the second pulse voltage signal; and the ultrasonic sensor chip receives the driving signal and generates an ultrasonic signal according to the driving signal. When a driving signal is generated, a voltage value of the driving signal can be increased by means of a first pulse voltage signal and a second pulse voltage signal, which are in opposite phases, without the need for a boost operation, such that the problem of a complicated circuit caused by boosting and the problem of a poor driving effect caused by a low voltage value are overcome, and a circuit structure is simple, can be easily implemented and controlled, and has a good boost effect.

Description

Ultrasonic transceiver systems and electronic equipment

This application requires the priority of the PCT international application filed with the China Patent Office on June 14, 2022, with the application number PCT/CN2022/098576 and the application name "Signal Generating Circuit and Ultrasonic Fingerprint Identification Device", and on July 14, 2022 Priority is granted to the PCT international application with the application number PCT/CN2022/105775 and the application title "Ultrasonic Fingerprint Detection Device and Electronic Equipment" filed with the China Patent Office on 2012-07-21, the entire content of which is incorporated into this application by reference.

Technical field

The present application relates to the technical field of fingerprint detection, and in particular to an ultrasonic transceiver system and electronic equipment.

Background technique

With the development and progress of science and technology, fingerprint detection technology is increasingly used in smart terminal devices such as mobile phones and computers, thereby improving people's experience in using smart terminal devices.

In the solution of ultrasonic fingerprint detection technology, it is usually necessary to generate a sine wave signal, and then use the sine wave signal as a driving signal to generate an ultrasonic signal for fingerprint detection. Among them, in some implementation methods of generating sine wave signals, complex circuit structures are usually required to achieve multiple voltage boosts, resulting in large system architecture size, complex circuits and high cost of the solution. In some implementation methods that can generate a sine wave signal with a single voltage boost, because the voltage value of the sine wave signal is low, there is a problem of poor driving effect of the sine wave signal as a driving signal.

Contents of the invention

This application provides an ultrasonic transceiver system and electronic equipment to solve the technical problems of complex circuit structure and poor driving effect as a driving signal in the generation of sine wave signals in ultrasonic fingerprint detection technology.

In the first aspect, this application provides an ultrasonic transceiver system, including: a signal generating circuit and an ultrasonic sensor chip;

The signal generating circuit is composed of discrete components and includes: a pulse generating circuit and a resonant circuit. The pulse generating circuit is used to receive the control signal output by the ultrasonic sensor chip and generate an inverted first signal according to the control signal. a pulse voltage signal and a second pulse voltage signal. The resonant circuit is configured to receive the first pulse voltage signal and the second pulse voltage signal in inversion, and to generate a signal according to the first pulse voltage signal in inversion and the second pulse voltage signal. Two pulse voltage signals generate driving signals;

The ultrasonic sensor chip is used to receive the driving signal and generate an ultrasonic signal according to the driving signal.

In a possible design, the resonant circuit includes a resonant inductor and a resonant capacitor;

One end of the resonant inductor is connected to the first pulse output end of the pulse generating circuit, the other end of the resonant inductor, one end of the resonant capacitor and the input end of the ultrasonic sensor chip are connected, and the first The pulse output terminal is used to output the first pulse voltage signal;

The other end of the resonant capacitor is connected to the second pulse output end of the pulse generating circuit, and the second pulse output end is used to output the second pulse voltage signal;

Wherein, the resonant inductor and the resonant capacitor resonate under the action of the first pulse voltage signal and the second pulse voltage signal to generate a sine wave driving signal.

In a possible design, the signal generating circuit further includes: a braking circuit, the braking circuit includes a damping resistor;

One end of the damping resistor is connected to the first pulse output end of the pulse generating circuit, and the other end of the damping resistor is connected to ground.

In a possible design, the pulse generating circuit includes a first half-bridge circuit, a second half-bridge circuit, and a first inverter and a second inverter;

The input end of the first half-bridge circuit is connected to the first output end and the second output end of the ultrasonic sensor chip, and the output end of the first half-bridge circuit is the first pulse output end of the pulse generating circuit. ;

The input terminal of the second half-bridge circuit is connected to the output terminal of the first inverter and the output terminal of the second inverter, and the output terminal of the second half-bridge circuit is the pulse generating circuit. The second pulse output terminal;

The input end of the first inverter is connected to the first output end of the ultrasonic sensor chip, and the input end of the second inverter is connected to the second output end of the ultrasonic sensor chip.

In a possible design, the first output end and the second output end of the ultrasonic sensor chip are used to output a first pulse control signal and a second pulse control signal respectively, and the control signal includes the first pulse control signal. signal and the second pulse control signal.

In a possible design, the first half-bridge circuit includes a first PMOS transistor and a first NMOS transistor;

The gate of the first PMOS tube is connected to the second output terminal of the ultrasonic sensor chip, and the source of the first PMOS tube is connected to the power input terminal of the pulse generating circuit;

The drain of the first PMOS transistor is connected to the drain of the first NMOS transistor and is the output end of the first half-bridge circuit. The gate of the first NMOS transistor is connected to the gate of the ultrasonic sensor chip. The first output terminal is connected, and the source of the first NMOS transistor is connected to ground.

In a possible design, the second half-bridge circuit includes a second PMOS transistor and a second NMOS transistor;

The gate of the second PMOS tube is connected to the output terminal of the first inverter, and the source of the second PMOS tube is connected to the power input terminal of the pulse generating circuit;

The drain of the second PMOS transistor is connected to the drain of the second NMOS transistor and is the output terminal of the second half-bridge circuit, and the gate of the second NMOS transistor is connected to the second inverting The output end of the transistor is connected, and the source of the second NMOS transistor is connected to ground.

In a possible design, the ultrasonic transceiver system also includes a main control module;

The main control module includes a power supply, and the power supply is used to supply power to the signal generating circuit and the ultrasonic sensor chip.

In a possible design, the main control module also includes an SPI interface;

The SPI interface is used for communication between the main control module and the ultrasonic sensor.

In a possible design, the first pulse voltage signal is also input to the ultrasonic sensor chip as a synchronization signal of the driving signal.

In a possible design, the ultrasonic sensor chip includes an ultrasonic transducer;

The sine wave driving signal is used to drive the ultrasonic transducer to generate the ultrasonic signal.

In a second aspect, this application provides an electronic device, including: a cover plate, and any possible ultrasonic transceiver system provided in the first aspect;

Wherein, the cover is used to receive the press of the user's finger, and the ultrasonic transceiver system is provided below the cover and is used to detect the fingerprint of the user's finger pressed on the cover.

In a possible design, the electronic device further includes: a display screen, the cover is disposed above the display screen, and the ultrasonic transceiver system is disposed below the display screen.

This application provides an ultrasonic transceiver system and electronic equipment. The ultrasonic transceiver system includes a signal generating circuit and an ultrasonic sensor chip. The signal generating circuit is composed of discrete components and includes a pulse generating circuit and a resonant circuit. The pulse generating circuit can receive the control signal output by the ultrasonic sensor chip and generate a first pulse voltage signal and a second pulse voltage signal in inversion according to the control signal. The resonant circuit can receive the first pulse voltage signal and the second pulse voltage signal in inversion. The pulse voltage signal generates a driving signal under its action. The ultrasonic sensor chip receives the driving signal and generates an ultrasonic signal according to the driving signal. The ultrasonic transceiver system provided by this application does not need to boost the voltage on the one hand when generating the driving signal, but on the other hand increases the voltage value of the driving signal through the inverted first pulse voltage signal and the second pulse voltage signal, which can overcome the problems caused by the voltage boosting. The complex circuit problem and low voltage value cause poor driving effect. The circuit structure is simple, easy to implement and control, and has a good boost effect.

Description of the drawings

Figure 1 is a schematic structural diagram of an ultrasonic transceiver system provided by an embodiment of the present application;

Figure 2 is a schematic diagram of a waveform provided by an embodiment of the present application;

Figure 3 is a schematic circuit diagram of another ultrasonic transceiver system provided by an embodiment of the present application;

Figure 4 is another waveform schematic diagram provided by an embodiment of the present application;

FIG. 5 is a schematic circuit diagram of yet another ultrasonic transceiver system provided by an embodiment of the present application.

Detailed ways

In order to make the purpose, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments These are part of the embodiments of this application, but not all of them. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of this application.

The terms "first", "second", "third", "fourth", etc. (if present) in the description and claims of this application and the above-mentioned drawings are used to distinguish similar objects without necessarily using Used to describe a specific order or sequence. It is to be understood that the data so used are interchangeable under appropriate circumstances so that the embodiments of the application described herein can, for example, be practiced in sequences other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, e.g., a process, method, system, product, or apparatus that encompasses a series of steps or units and need not be limited to those explicitly listed. Those steps or elements may instead include other steps or elements not expressly listed or inherent to the process, method, product or apparatus.

In order to solve the above-mentioned problems existing in the prior art, this application provides an ultrasonic transceiver system and electronic equipment. The inventive concept of the ultrasonic transceiver system provided by this application is to provide an ultrasonic transceiver system including a signal generating circuit and an ultrasonic sensor chip, wherein the signal generating circuit is composed of discrete devices and includes a pulse generating circuit and a resonant circuit. The ultrasonic sensor chip outputs a control signal to the pulse generating circuit. The pulse generating circuit can generate a first pulse voltage signal and a second pulse voltage signal in reverse phase under the action of the control signal. The resonant circuit receives the first pulse voltage signal in reverse phase. The signal and the second pulse voltage signal resonate under its action to generate a driving signal. The ultrasonic sensor chip receives the driving signal and generates an ultrasonic signal under the action of the driving signal. The ultrasonic signal can be used for fingerprint detection. In the embodiment of the present application, there is no need to boost the voltage in the implementation of generating the driving signal, and the pulse generation signal can generate a first pulse voltage signal and a second pulse voltage signal in reverse phase. Therefore, when the first pulse voltage signal is in reverse phase Compared with the driving signal generated by one pulse voltage signal, the voltage value of the driving signal generated by the signal and the second pulse voltage signal will be doubled, thereby increasing the voltage value of the driving signal and improving the driving effect. It can overcome the complex circuit problems caused by boosting in the prior art and the problem of poor driving effect caused by low voltage value. The circuit structure is simple, easy to implement and control, and has good boosting effect.

The technical solution of the present application and how the technical solution of the present application solves the above technical problems will be described in detail below with specific embodiments. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments. The embodiments of the present application will be described below with reference to the accompanying drawings.

Figure 1 is a schematic structural diagram of an ultrasonic transceiver system provided by an embodiment of the present application. As shown in FIG. 1 , an ultrasonic transceiver system 101 provided by an embodiment of the present application includes: a signal generating circuit 101 and an ultrasonic sensor chip 102 .

The signal generating circuit 101 is composed of discrete components and includes: a pulse generating circuit 1011 and a resonance circuit 1012.

The pulse generating circuit 1011 is configured to receive a control signal output by the ultrasonic sensor chip 102 and generate a first pulse voltage signal and a second pulse voltage signal in opposite phases according to the control signal.

The resonant circuit 1012 is configured to receive the first pulse voltage signal and the second pulse voltage signal in inversion, and generate a driving signal according to the first pulse voltage signal and the second pulse voltage signal in inversion.

The ultrasonic sensor chip 102 is used to receive the driving signal and generate an ultrasonic signal according to the driving signal.

Among them, the signal generating circuit 101 can be a circuit structure composed of discrete devices instead of being configured as a chip, so the manufacturing cost can be reduced. Rather. Therefore, compared with the "dual-chip" architecture, the ultrasonic fingerprint detection device 200 provided in the embodiment of the present application only includes one ultrasonic fingerprint sensor chip 220, and the overall manufacturing cost will be greatly reduced.

Specifically, the pulse generating circuit 1011 can receive a control signal provided by the ultrasonic fingerprint sensor chip 102, and generate a first pulse voltage signal and a second pulse voltage signal in opposite phases under the action of the control signal. The resonant circuit 1012 is connected to the pulse generating circuit 1011. The inverted first pulse voltage signal and the second pulse voltage signal generated by the pulse generating circuit 1011 can be input to the resonant circuit 1012, and the resonant circuit 1012 receives the inverted first pulse. voltage signal and a second pulse voltage signal, and generate a driving signal under the action of the inverted first pulse voltage and second pulse voltage signal. The resonant circuit 1012 is also connected to the ultrasonic sensor chip 102. The driving signal generated by the resonant circuit 1012 can be output to the ultrasonic sensor chip 102. The ultrasonic sensor chip 102 receives the driving signal and generates an ultrasonic signal under the action of the driving signal. The ultrasonic signal is, for example, Can be used for fingerprint detection.

Alternatively, the signal generating circuit 101 and the ultrasonic sensor chip 102 may share an input power supply, and the input power supply may provide the same voltage value for both. For example, the input power supply can provide a voltage value between 3V and 4.5V.

Optionally, the ultrasonic transceiver system 100 may also include a main control module 103. The main control module 103 may include a power supply VDD, which may be used as an input power supply to provide power for the signal generation circuit 101 and the ultrasonic sensor chip 103.

In some embodiments, the main control module 103 may be provided with a control chip of an electronic device of the ultrasonic transceiver system 100 , and the electronic device may be a terminal device such as a mobile phone or a tablet computer. The power supply VDD included in the main control module 103 can be the power supply for the terminal device, so that no additional power supply is needed, and the overall power consumption of the ultrasonic fingerprint detection transceiver system 100 can be saved.

Optionally, the main control module 103 may also include a Serial Peripheral Interface (SPI) interface, and the SPI interface may be used for communication between the main control module 103 and the ultrasonic sensor 102 .

The pulse generating circuit 1011 can generate an inverted first pulse voltage signal and a second pulse voltage signal under the action of the control signal, and the resonant circuit 1012 can generate an inverted first pulse voltage signal and a second pulse voltage signal under the action of the inverted phase. The generated driving signal will have twice the voltage value compared to the driving signal generated by a single pulse voltage signal. It can be seen that the driving signal generated by the signal generating circuit 101 in the ultrasonic transceiver system 100 provided by the embodiment of the present application does not require a boosting operation to obtain a driving signal with a higher voltage value, which can overcome the problems caused by the need for a boosting operation in the prior art. The complexity of the circuit and the low driving signal voltage value cause poor driving effects. The circuit structure is simple, easy to implement and control, and has a good boost effect.

In a possible design, the resonant circuit 1012 includes a resonant inductor L and a resonant capacitor C.

Referring to FIG. 1 , one end of the resonant inductor L is connected to the first pulse output end of the pulse generating circuit 1011 , and the other end of the resonant inductor L is connected to one end of the resonant capacitor C and the input end of the ultrasonic sensor chip 102 . The first pulse output terminal of the pulse generating circuit 1011 is used to output a first pulse voltage signal.

The other end of the resonant capacitor C is connected to the second pulse output terminal of the pulse generating circuit 1011, and the second pulse output terminal of the pulse generating circuit 1011 is used to output a second pulse voltage signal. The first pulse voltage signal and the second pulse voltage signal are in opposite phases.

Among them, the resonant inductor L and the resonant capacitor C resonate under the action of the first pulse voltage signal and the second pulse voltage signal, and can generate a sine wave drive signal V _TX . The drive signal described above includes the sine wave drive signal V _TX .

For example, by controlling the first pulse voltage signal and the second pulse voltage signal output by the pulse generating circuit 1011, the resonant circuit 1012 can resonate to generate the sine wave driving signal V _TX under the action of the first pulse voltage signal and the second pulse voltage signal. .

For ease of understanding, FIG. 2 shows a schematic waveform diagram of the first pulse voltage signal, the second pulse voltage signal and the sine wave driving signal V _TX provided by the embodiment of the present application.

As shown in Figure 2, the working states of the signal generating circuit 101 include: waiting stage, excitation stage and inversion stage.

In the waiting stage of the signal generating circuit 101, the resonant circuit 1012 does not generate resonance, the first pulse voltage signal output by the pulse generating circuit 1011 may be 0 or a high resistance state, and the second pulse voltage signal output by the pulse generating circuit 1011 may be 0, 1 or high impedance state. Among them, 0 means that the output voltage is 0, which is a low level, 1 means that the output voltage is the power supply voltage VDD, which is a high level, and the high resistance state means that there is no output voltage in a high resistance state. In FIG. 2 , the first pulse voltage signal and the second pulse voltage signal in the waiting stage are shown as outputting 0 as an example. Correspondingly, the driving signal V _TX in the waiting stage is low level.

During the excitation stage of the signal generating circuit 101, the first pulse voltage signal and the second pulse voltage signal output by the pulse generating circuit 1011 are controlled to have an inverse phase relationship, so that the first pulse voltage signal and the second pulse voltage signal are in high voltage. The alternating transformation between the high level and the low level further causes the resonant inductor L and the resonant capacitor C in the resonant circuit 1012 to alternately transform between the high level and the low level. Resonance occurs under the action of the voltage signal, generating a sine wave driving signal V _TX .

When it is necessary to stop outputting the sine wave driving signal V _TX , for example, the first pulse voltage signal and the second pulse voltage signal can be output to a low level or a high resistance state to pass through the equivalent resistance R of the resonant inductor L in the resonant circuit 1012 (Not shown in Figure 1) Zero out the resonance. But in fact, since the oscillation energy of the resonant circuit 1012 cannot disappear immediately, the sine wave driving signal V _TX slowly decreases to zero. Therefore, before outputting the first pulse voltage signal and the second pulse voltage signal to a low level or high resistance state, an inversion driving method can be used, that is, the first pulse voltage signal and the second pulse voltage signal are both inverted. to output, thereby accelerating the resonant energy of the resonant circuit 1012 to return to zero.

Specifically, the first pulse voltage signal and the second pulse voltage signal are each inverted and output alternately with low level and high level to generate an inverted first pulse voltage signal and an inverted second pulse voltage signal, as shown in Figure In 2, the phase of the first pulse voltage signal in the inversion phase and the phase of the first pulse voltage signal in the excitation phase are inverse to each other, and the phase of the second pulse voltage signal in the inversion phase is in phase with the phase of the second pulse voltage signal in the excitation phase. The inverted first pulse voltage signal and the inverted second pulse voltage signal are in inverse phase with each other and act on the resonant circuit 1012 to generate the sine wave driving signal V _TX in the inverted phase. It can be seen from Figure 2 that the resonant energy of the sine wave drive signal V _TX in the inversion phase is lower than the resonant energy of the sine wave drive signal V _TX in the excitation phase.

Since the oscillation energy of the resonant circuit 1012 cannot disappear immediately and there is a residual vibration phenomenon, in some embodiments, the signal generating circuit 101 may also include a braking circuit 1013.

Continuing to refer to FIG. 1 , the braking circuit 1013 may include a damping resistor R1.

One end of the damping resistor R1 is connected to the first pulse output end of the pulse generating circuit 1011, and the other end of the damping resistor R1 is connected to the ground. A brake circuit 1013 including a damping resistor R1 is added to the signal generating circuit 101. It is expected that when the resonant circuit 1012 stops outputting the sine wave driving signal V _TX , the excess signal energy generated by the resonant circuit 1012 can be absorbed, thereby improving the sine wave output by the resonant circuit 1012. The residual vibration of the wave driving signal V _TX improves the quality of the sine wave driving signal V _TX .

The equivalent resistance R of the resonant inductor L in the resonant circuit 1012 can work together with the damping resistor R1 to dampen and "brake" the resonance. In the damping braking stage in the working state of the signal generating circuit 210 as shown in Figure 2, the first pulse voltage signal and the second pulse voltage signal are controlled to be low level, and the damping resistor R1 in the braking circuit 1013 can continue to control the resonant circuit. The resonance of 1012 acts as a damping "brake", which can quickly reduce the resonance energy of the resonant circuit 1012 and make the resonance quickly return to zero. Optionally, during the damping braking stage, the second pulse voltage signal may also be at a high level.

The resistance value of the damping resistor R1 is related to the characteristic impedance Z of the resonant circuit 1012 . In order to achieve a better damping "braking" effect, in some embodiments, the resistance value of the damping resistor R1 may be between 0.8*Z and 2*Z.

Among them, the characteristic impedance Z and the values of the resonant inductor L and the resonant capacitor C in the resonant circuit 1012 satisfy the following formula (1):

L ₁ and C ₁ are the values of the resonant inductor L and the resonant capacitor C in the resonant circuit 1012 respectively.

Optionally, the resistance value of the damping resistor R1 includes but is not limited to 1.4*Z.

It can be understood that the above Figures 1 and 2 are only for illustration and not limitation, showing the circuit structure of the resonant circuit 1012 and the pulse generating circuit 1011 and the corresponding signal waveform diagrams under one embodiment. In some alternative implementations, the resonant circuit 1012 and the pulse generating circuit 1011 can also adopt other circuit structures, so that the two can cooperate to achieve the effect of resonant boosting of the input power supply. In the embodiment of the present application, the resonant circuit 1012 The specific circuit structure of the pulse generating circuit 1011 is not limited.

In addition, in the waveform schematic diagram shown in Figure 2 and below, the excitation stage only shows the first pulse voltage signal and the second pulse voltage signal of 2 periods. The 2-period signals are only for illustration. The excitation stage also shows It can be any other signal with any number of cycles, and the embodiment of the present application does not limit the number of cycles of the signal in the excitation phase.

The ultrasonic transceiver system provided by the embodiment of the present application includes a signal generating circuit and an ultrasonic sensor chip. The signal generating circuit is composed of discrete components and includes a pulse generating circuit and a resonant circuit. The pulse generating circuit can receive the control signal output by the ultrasonic sensor chip and generate a first pulse voltage signal and a second pulse voltage signal in inversion according to the control signal. The resonant circuit can receive the first pulse voltage signal and the second pulse voltage signal in inversion. The pulse voltage signal generates a driving signal under its action. The ultrasonic sensor chip receives the driving signal and generates an ultrasonic signal according to the driving signal. When generating the drive signal, on the one hand, there is no need to boost the voltage, but on the other hand, the voltage value of the drive signal is increased through the inverted first pulse voltage signal and the second pulse voltage signal, which can overcome the complex circuit problems and low voltage value caused by boosting. It causes the problem of poor driving effect. The circuit structure is simple, easy to implement and control, and has good boosting effect.

Optionally, the first pulse voltage signal can also be input to the ultrasonic sensor chip 102 as a synchronization signal of the above-mentioned driving signal to synchronize the driving signal. It can be understood that the driving signal includes a sine wave driving signal V _TX .

In some embodiments, the ultrasonic transducer 102 may be included in the ultrasonic sensor chip 102 . The ultrasonic transducer 1021 can generate ultrasonic signals under the action of the driving signal provided by the above-mentioned signal generating circuit 1012. For example, when the ultrasonic transceiver system 100 is used for fingerprint detection, the ultrasonic transducer 1021 can generate an ultrasonic signal under the action of a driving signal, and can receive the echo signal reflected by the user's finger to generate an electrical signal. The electrical signal can then be detected by other detection circuits in the ultrasonic sensor chip 102, such as an echo detection circuit, to implement fingerprint detection.

Optionally, the ultrasonic transducer 1021 may include a piezoelectric layer and upper and lower electrode layers. For example, the piezoelectric material in the piezoelectric layer includes, but is not limited to, polyvinylidene fluoride (PVDF), polyvinylidene fluoride (PVDF), Ethylene-trifluoroethylene (polyvinylidene fluoride–Trifluoroethene, PVDF-TrFE) copolymer, etc. When the piezoelectric layer receives high-voltage driving signals from the upper and lower electrode layers, it converts electrical energy into mechanical energy, thereby generating ultrasonic signals. Correspondingly, the piezoelectric layer can also convert the returned ultrasonic echo signal from mechanical energy into electrical energy, thereby generating an electrical signal corresponding to the echo signal.

Since the ultrasonic transducer 1021 is a capacitive load, assuming its capacitance value is C ₀ , then the relationship between C0 and the capacitance value C ₁ of the resonant capacitor C can satisfy C ₁ ≥ _{C 0} to obtain the optimal output voltage amplitude. At the same time, the inductance value L ₁ of the resonant inductor L, the capacitance value C ₀ of the ultrasonic transducer 1021, the capacitance value C ₁ of the resonant capacitor C, and the pulse frequency f need to satisfy the following formula (2):

In some embodiments, the ultrasonic sensor chip 102 in the ultrasonic transceiver system 100 also includes: a control module 1022, a transducer module and a detection module.

The control module 1022 is used to provide a control signal to the signal generating circuit 101 to control the signal generating circuit 101 to generate a driving signal. The transducer module is used to receive the driving signal to generate an ultrasonic signal, and uses the ultrasonic signal to generate an echo signal. The transducer module is also used to convert the echo signal into an electrical signal. The transducer module may include an ultrasonic transducer 1021. The detection module is used to detect electrical signals to implement corresponding functions, such as detecting electrical signals to implement fingerprint detection. The detection module is not shown in the drawings of the embodiment of this application.

The control module 1022 can be understood as the controller of the ultrasonic sensor chip 102, which can be connected to the above-mentioned transducing module and detection module, and controls the operation of the transducing module and the detection module. In addition, the control module 1022 can also be used to receive synchronization signals.

Optionally, the detection module may include a receiving module, a detection module and a signal accumulation module. Wherein, the receiving module is used to receive multiple electrical signals. The detection module is used to detect the amplitudes of the plurality of electrical signals. The signal accumulation module is used to accumulate the amplitudes of multiple electrical signals to obtain a signal accumulation value. The signal accumulation value is used to be averaged and calculated to implement corresponding related functions, such as transmitting the digital signal of fingerprint data to an external device so that The digital signal is averaged to detect the fingerprint of the user's finger.

Optionally, the signal accumulation module may be an analog signal accumulator or integrator, or may be other types of circuit structures or devices, which are not specifically limited in the embodiments of the present application.

Optionally, the ultrasonic sensor chip 102 may also include a readout module 1023, an analog-to-digital conversion module 1024, and an interface module 1025.

The reading module 1023 can read the signal accumulation value generated by the above-mentioned signal accumulation module to the analog-to-digital conversion module 1024. The analog-to-digital conversion module 1024 converts the signal accumulation value into a digital signal. The interface module 1025 can transmit the digital signal to an external device so that the digital signal is averaged and calculated to implement corresponding related functions.

Optionally, the readout module 1023 may be a readout circuit. The analog-to-digital converter module 1024 may be an analog-to-digital converter (ADC). The interface module 1025 includes but is not limited to an SPI interface.

Optionally, in some alternative implementations, the above-mentioned readout module 1023, analog-to-digital conversion module 1024 and interface module 1025 may not be integrated into the ultrasonic sensor chip 102, but may be provided outside the ultrasonic sensor chip 102, thereby reducing the ultrasonic wave. The installation space required for the sensor chip 102.

Further, the ultrasonic sensor chip 102 may also include a pixel array (Pixel Array), which is composed of a plurality of pixel units (Pixel Cell). The control module 1022 is connected to the pixel array. Each pixel unit may include: an upper electrode, a piezoelectric layer, and a lower electrode. The upper electrodes of the plurality of pixel units can be connected to each other to form an integral upper electrode. The integral upper electrode point can be electrically connected to a TX interface, and the TX interface can receive the driving signal VTX generated by the signal generating circuit 101. Optionally, when the ultrasonic transceiver system 100 is used for fingerprint detection, the pixel array is used for ultrasonic fingerprint imaging.

The lower electrodes of multiple pixel units can be arranged separately from each other, that is, the lower electrodes of multiple pixel units can form a lower electrode array, and the multiple lower electrodes in the lower electrode array have the same structure and are arranged on the same plane. The lower electrode in the pixel unit may also be called a pixel electrode. In each pixel unit, the combination of the upper electrode, the piezoelectric layer and the lower electrode can form an ultrasonic transducer unit, and the multiple ultrasonic transducer units of the multiple pixel units can form a transducer module, which can be used in The ultrasonic signal is generated under the action of the driving signal V _TX , and the echo signal of the ultrasonic signal can also be received to generate a corresponding electrical signal.

Based on the above embodiments, FIG. 3 is a schematic circuit diagram of another ultrasonic transceiver system provided by an embodiment of the present application. As shown in Figure 3, the pulse generation circuit 1011 in the ultrasonic transceiver system 100 provided by the embodiment of the present application includes: a first half-bridge circuit 10111, a second half-bridge circuit 10112, and a first inverter S1 and a second inverter. S2.

Among them, the input terminal of the first half-bridge circuit 10111 is connected to the first output terminal and the second output terminal of the ultrasonic sensor chip 102, and the output terminal of the first half-bridge circuit 10111 is the first pulse output terminal of the pulse generating circuit 102, The first pulse output terminal of the pulse generating circuit 102 is used to output a first pulse voltage signal.

The first output terminal and the second output terminal of the ultrasonic sensor chip 102 are used to output the control signal described above. Specifically, the control signal may include a first pulse control signal (DRN) and a second pulse control signal (DRP). For example, the first output terminal is used to output the first pulse control signal, and the second output terminal is used to output the second pulse control signal. Signal.

The input terminal of the second half-bridge circuit 10112 is connected to the output terminal of the first inverter S1 and the output terminal of the second inverter S2. The output terminal of the second half-bridge circuit 10112 is the second pulse output of the pulse generating circuit 102. terminal, the second pulse output terminal of the pulse generating circuit 102 is used to output a second pulse voltage signal.

The input terminal of the first inverter S1 is connected to the first output terminal of the ultrasonic sensor chip 102 , and the input terminal of the second inverter S2 is connected to the second output terminal of the ultrasonic sensor chip 102 . The function of the first inverter S1 and the second inverter S2 is to invert the signal passing through them. As shown in Figure 3, since the input terminal of the first inverter S1 is connected to the first output terminal of the ultrasonic sensor chip 102, when the first pulse control signal output by the first output terminal of the ultrasonic sensor chip 102 is low level , the first pulse control signal will become high level after passing through the first inverter S1. When the first pulse control signal output by the first output terminal of the ultrasonic sensor chip 102 is high level, the first pulse control signal will become low level after passing through the first inverter S1. The second inverter S2 is similar to the first inverter S1 , except that the input terminal of the second inverter S2 is connected to the second output terminal of the ultrasonic sensor chip 102 .

The pulse generating circuit in the ultrasonic transceiver system provided by the embodiment of the present application includes a first half-bridge circuit, a second half-bridge circuit, and a first inverter and a second inverter. By setting the first inverter and the second inverter, The phaser can realize inversion control of the first pulse control signal and the second pulse control signal. Setting the first half-bridge circuit and the second half-bridge circuit can enable the pulse generation circuit to generate an inverted first pulse under the action of the control signal. voltage signal and the second pulse voltage signal. Therefore, the voltage value of the driving signal can be increased through the inverted first pulse voltage signal and the second pulse voltage signal without boosting, thereby overcoming the circuit complexity problem caused by boosting and the problem of poor driving effect caused by low voltage value. The circuit The structure is simple, easy to implement and control, and has good voltage boosting effect.

Continuing to refer to FIG. 3 , the first half-bridge circuit 10111 may include a first PMOS transistor Q1 and a first NMOS transistor Q2.

The gate of the first PMOS transistor Q1 is connected to the second output terminal of the ultrasonic sensor chip 102 for inputting the second pulse control signal (DRP) to the first PMOS transistor Q1. The source of the first PMOS transistor Q1 is connected to the power input terminal of the pulse generating circuit 1011, and the power input terminal is used to input electric energy provided by the power supply VDD.

The drain of the first PMOS transistor Q1 is connected to the drain of the first NMOS transistor Q2 and serves as the output terminal of the first half-bridge circuit 10111 for outputting the first pulse voltage signal. The gate of the first NMOS transistor Q2 is connected to the first output terminal of the ultrasonic sensor chip 102 for inputting the first pulse control signal (DRN) to the first NMOS transistor Q2. The source of the first NMOS transistor Q2 is grounded.

When the first pulse control signal and the second pulse control signal are output at a high level, the first PMOS transistor Q1 is turned off, the first NMOS transistor Q2 is turned on, and the first pulse voltage signal output by the first half-bridge circuit 10111 is high level. flat. When the first pulse control signal and the second pulse control signal are output at a low level, the first PMOS transistor Q1 is turned on, the first NMOS transistor Q2 is turned off, and the first pulse voltage signal output by the first half-bridge circuit 10111 is low level. flat. It can be seen that by controlling the level state of the first pulse control signal and the second pulse control signal, the level state of the first pulse voltage signal can be controlled under the action of the first PMOS transistor Q1 and the first NMOS transistor Q2.

Continuing to refer to FIG. 3 , the second half-bridge circuit 10112 includes a second PMOS transistor Q3 and a second NMOS transistor Q4.

The gate of the second PMOS transistor Q3 is connected to the output terminal of the first inverter S1 for inputting the inverted first pulse control signal to the second PMOS transistor Q3. The source of the second PMOS transistor Q3 is connected to the power input terminal of the pulse generating circuit 1011, and the power input terminal is used to input electric energy provided by the power supply VDD.

The drain of the second PMOS transistor Q3 is connected to the drain of the second NMOS transistor Q4 and serves as the output terminal of the second half-bridge circuit 10112 for outputting the second pulse voltage signal. The gate of the second NMOS transistor Q4 is connected to the output terminal of the second inverter S2 for inputting the inverted second pulse control signal to the second NMOS transistor Q4. The source of the second NMOS transistor Q4 is grounded.

When the first pulse control signal and the second pulse control signal are output at a high level, since the first pulse control signal is inverted through the first inverter S1 and then input to the second PMOS transistor Q3, the second PMOS transistor Q3 conducts On, the second pulse control signal will be inverted through the second inverter S2 and then input to the second NMOS transistor Q4. Therefore, the second NMOS transistor Q4 is turned off, and the second pulse voltage signal output by the second half-bridge circuit 10112 is low. level. When the first pulse control signal and the second pulse control signal are output at a low level, since the first pulse control signal is inverted through the first inverter S1 and then input to the second PMOS transistor Q3, the second PMOS transistor Q3 is turned off. off, the second pulse control signal will be inverted through the second inverter S2 and then input to the second NMOS transistor Q4. Therefore, the second NMOS transistor Q4 is turned on, and the second pulse voltage signal output by the second half-bridge circuit 10112 is high. level. It can be seen that by controlling the level states of the first pulse control signal and the second pulse control signal, the functions of the first inverter S1, the second inverter S2, the second PMOS transistor Q3 and the second NMOS transistor Q4 The level state of the second pulse voltage signal can be controlled.

Based on the above, it can be seen that under the action of the first half-bridge circuit 10111 and the second half-bridge circuit 10112 and the first inverter S1 and the second inverter S2, when the first pulse control signal and the second pulse control signal are at low When the level is output, the first NMOS transistor Q2 and the second PMOS transistor Q3 are turned off, the first PMOS transistor Q1 and the second NMOS transistor Q4 are turned on, the first pulse voltage signal is output at a low level, and the second pulse voltage signal is High level output, the two are inverted. When the first pulse control signal and the second pulse control signal are output at a high level, the first NMOS transistor Q2 and the second PMOS transistor Q3 are closed, the first PMOS transistor Q1 and the second NMOS transistor Q4 are turned off, and the first pulse voltage The signal is a high-level output, the second pulse voltage signal is a low-level output, and the two are in reverse phase.

In some embodiments, by controlling the level states of the first pulse control signal and the second pulse control signal, the pulse generating circuit 1011 shown in FIG. 3 can output an inverted first pulse voltage signal under the action of the pulse generating circuit 1011 shown in FIG. 3 . and the second pulse voltage signal. Based on Figure 2, Figure 4 shows the level states of the first pulse control signal and the second pulse control signal, and the corresponding signal generation circuit under the action of the pulse generation circuit 1011 shown in Figure 3. 101 working status. The signal-related technical solutions at each stage of the working state shown in Figure 4 can be similar to each stage in the embodiment shown in Figure 2 above. For specific implementation, please refer to the above description, and will not be elaborated here.

The pulse generating circuit in the ultrasonic transceiver system provided by the embodiment of the present application includes a first half-bridge circuit composed of a first PMOS transistor and a first NMOS transistor, a second half-bridge circuit composed of a second PMOS transistor and a second NMOS transistor, Under the action of the first inverter and the second inverter, the level state of the first pulse control signal and the second pulse control signal can be controlled, so that the pulse generating circuit outputs a first pulse that is inverted between the two. voltage signal and the second pulse voltage signal. Therefore, the voltage value of the driving signal can be increased through the inverted first pulse voltage signal and the second pulse voltage signal without boosting, thereby overcoming the circuit complexity problem caused by boosting and the problem of poor driving effect caused by low voltage value. , the circuit structure is simple, easy to implement and control, and has good boosting effect.

Optionally, the pulse generating circuit 1011 may be provided with multiple input/output ports. As shown in Figure 4, port K1 can be a power input terminal, port K2 is used to input a first pulse control signal, and port K3 is used to input a second pulse control signal. The port K4 is used to output the first pulse voltage signal, and the port K5 is used to output the second pulse voltage signal. Port K6 is used for grounding the pulse generating circuit 1011.

Based on the above embodiments, the ultrasonic sensor chip 102 shown in FIG. 4 also includes: a control module 1022, a transducing module and a detection module, and a pixel array, where the control module 1022, the transducing module, the detection module, and the pixel array are implemented individually. , the principles and technical effects are similar to the control module 1022, the transducer module and the detection module and the pixel array shown in Figure 1, and will not be described again here.

Further, based on FIG. 4 , the ultrasonic transceiver system 100 shown in FIG. 5 also schematically shows a block diagram of each pixel unit.

When the signal generating circuit 101 outputs the driving signal V _TX , the first switch CK1 is turned on, and the transducer module is in a transmitting state and emits ultrasonic waves. When the transmission is completed, the first switch CK1 is turned off and waits for a period of time to receive the echo signal. When the echo signal reaches the transducer module, the second switch CK2 is closed. The transducer module converts the echo signal into an electrical signal. The electrical signal passes through The second switch CK2 is transmitted to the receiving module 301 and the detection module 302 to complete the reception and detection of the echo signal, and is transmitted to the signal accumulation module 303 .

Optionally, the first switch CK1 and the second switch CK2 can be cycled through the control module 10221, thereby controlling the operating status of the transducer module. Among them, the control module 1022 includes a loop control module 10221.

Optionally, in some implementations, in each pixel unit, a receiving module 301 and a detection module 302 may be provided correspondingly. Alternatively, in other implementations, the same receiving module 301 and detection module 302 may be provided for the ultrasonic transducer units of multiple pixel units.

An embodiment of the present application also provides an electronic device, including a cover plate and the ultrasonic transceiver system 100 in any of the above embodiments. Wherein, the cover is used to provide a pressing interface for the user's fingers and receive the pressing from the user's fingers. The ultrasonic transceiver system 100 is disposed under the cover and is used to detect the fingerprint of the user's finger pressed against the cover.

In some possible implementations, the electronic device further includes a display screen. The cover is disposed above the display screen, and correspondingly, the ultrasonic transceiver system 100 is disposed below the display screen to realize the under-screen ultrasonic fingerprint recognition function of the electronic device.

It can be understood that in the embodiment of the present application, the ultrasonic signal generated by the ultrasonic transceiver system 100 can penetrate the display screen and reach the cover, and the ultrasonic signal can propagate at the cover and be reflected by the user's finger pressing on the cover. An echo signal is formed, which can penetrate the display screen and reach the ultrasonic transceiver system 100 so that it can realize the fingerprint detection function.

Optionally, the electronic device includes but is not limited to mobile terminal devices, such as mobile phones, laptops, tablets, etc.

Other embodiments of the present application will be readily apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of this application that follow the general principles of this application and include common knowledge or customary technical means in the technical field that are not disclosed in this application. . It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the application being indicated by the following claims.

It is to be understood that the present application is not limited to the precise structures described above and illustrated in the accompanying drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the application is limited only by the appended claims.

Claims

An ultrasonic transceiver system, characterized by including: a signal generating circuit and an ultrasonic sensor chip;

The signal generating circuit is composed of discrete components and includes: a pulse generating circuit and a resonant circuit. The pulse generating circuit is used to receive the control signal output by the ultrasonic sensor chip and generate an inverted first signal according to the control signal. a pulse voltage signal and a second pulse voltage signal. The resonant circuit is configured to receive the first pulse voltage signal and the second pulse voltage signal in inversion, and to generate a signal according to the first pulse voltage signal in inversion and the second pulse voltage signal. Two pulse voltage signals generate driving signals;

The ultrasonic sensor chip is used to receive the driving signal and generate an ultrasonic signal according to the driving signal.
The ultrasonic transceiver system according to claim 1, wherein the resonant circuit includes a resonant inductor and a resonant capacitor;

One end of the resonant inductor is connected to the first pulse output end of the pulse generating circuit, the other end of the resonant inductor, one end of the resonant capacitor and the input end of the ultrasonic sensor chip are connected, and the first The pulse output terminal is used to output the first pulse voltage signal;

The other end of the resonant capacitor is connected to the second pulse output end of the pulse generating circuit, and the second pulse output end is used to output the second pulse voltage signal;

Wherein, the resonant inductor and the resonant capacitor resonate under the action of the first pulse voltage signal and the second pulse voltage signal to generate a sine wave driving signal.
The ultrasonic transceiver system according to claim 2, wherein the signal generating circuit further includes: a braking circuit, and the braking circuit includes a damping resistor;

One end of the damping resistor is connected to the first pulse output end of the pulse generating circuit, and the other end of the damping resistor is connected to ground.
The ultrasonic transceiver system according to claim 2 or 3, wherein the pulse generating circuit includes a first half-bridge circuit, a second half-bridge circuit, a first inverter and a second inverter;

The input end of the first half-bridge circuit is connected to the first output end and the second output end of the ultrasonic sensor chip, and the output end of the first half-bridge circuit is the first pulse output end of the pulse generating circuit. ;

The input terminal of the second half-bridge circuit is connected to the output terminal of the first inverter and the output terminal of the second inverter, and the output terminal of the second half-bridge circuit is the pulse generating circuit. The second pulse output terminal;

The input end of the first inverter is connected to the first output end of the ultrasonic sensor chip, and the input end of the second inverter is connected to the second output end of the ultrasonic sensor chip.
The ultrasonic transceiver system according to claim 4, wherein the first output end and the second output end of the ultrasonic sensor chip are respectively used to output a first pulse control signal and a second pulse control signal, and the control signal including the first pulse control signal and the second pulse control signal.
The ultrasonic transceiver system according to claim 4 or 5, wherein the first half-bridge circuit includes a first PMOS transistor and a first NMOS transistor;

The gate of the first PMOS tube is connected to the second output terminal of the ultrasonic sensor chip, and the source of the first PMOS tube is connected to the power input terminal of the pulse generating circuit;

The drain of the first PMOS transistor is connected to the drain of the first NMOS transistor and is the output end of the first half-bridge circuit. The gate of the first NMOS transistor is connected to the gate of the ultrasonic sensor chip. The first output terminal is connected, and the source of the first NMOS transistor is connected to ground.
The ultrasonic transceiver system according to claim 6, wherein the second half-bridge circuit includes a second PMOS transistor and a second NMOS transistor;

The gate of the second PMOS tube is connected to the output terminal of the first inverter, and the source of the second PMOS tube is connected to the power input terminal of the pulse generating circuit;

The drain of the second PMOS transistor is connected to the drain of the second NMOS transistor and is the output terminal of the second half-bridge circuit, and the gate of the second NMOS transistor is connected to the second inverting The output end of the transistor is connected, and the source of the second NMOS transistor is connected to ground.
The ultrasonic transceiver system according to claim 6 or 7, characterized in that the ultrasonic transceiver system further includes a main control module;

The main control module includes a power supply, and the power supply is used to supply power to the signal generating circuit and the ultrasonic sensor chip.
The ultrasonic transceiver system according to claim 8, wherein the main control module further includes an SPI interface;

The SPI interface is used for communication between the main control module and the ultrasonic sensor.
The ultrasonic transceiver system according to any one of claims 1 to 9, wherein the first pulse voltage signal is also input to the ultrasonic sensor chip as a synchronization signal of the drive signal.
The ultrasonic transceiver system according to any one of claims 2-10, wherein the ultrasonic sensor chip includes an ultrasonic transducer;

The sine wave driving signal is used to drive the ultrasonic transducer to generate the ultrasonic signal.
An electronic device, characterized by including: a cover, and

The ultrasonic transceiver system according to any one of claims 1 to 11;

Wherein, the cover is used to receive the press of the user's finger, and the ultrasonic transceiver system is provided below the cover and is used to detect the fingerprint of the user's finger pressed on the cover.
The electronic device according to claim 12, characterized in that the electronic device further includes: a display screen, the cover plate is disposed above the display screen, and the ultrasonic transceiver system is disposed below the display screen. .