WO2023222240A1 - Method for manufacturing an optoelectronic device and optoelectronic device - Google Patents

Method for manufacturing an optoelectronic device and optoelectronic device Download PDF

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Publication number
WO2023222240A1
WO2023222240A1 PCT/EP2022/063742 EP2022063742W WO2023222240A1 WO 2023222240 A1 WO2023222240 A1 WO 2023222240A1 EP 2022063742 W EP2022063742 W EP 2022063742W WO 2023222240 A1 WO2023222240 A1 WO 2023222240A1
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WO
WIPO (PCT)
Prior art keywords
solder material
carrier substrate
contact areas
optoelectronic
sacrificial layer
Prior art date
Application number
PCT/EP2022/063742
Other languages
French (fr)
Inventor
Robert Schulz
Christoph MANNAL
Mathias Wendt
Original Assignee
Ams-Osram International Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ams-Osram International Gmbh filed Critical Ams-Osram International Gmbh
Priority to PCT/EP2022/063742 priority Critical patent/WO2023222240A1/en
Publication of WO2023222240A1 publication Critical patent/WO2023222240A1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0095—Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/022—Mountings; Housings
    • H01S5/0235—Method for mounting laser chips
    • H01S5/02355—Fixing laser chips on mounts
    • H01S5/0237—Fixing laser chips on mounts by soldering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/022—Mountings; Housings
    • H01S5/0235—Method for mounting laser chips
    • H01S5/02375—Positioning of the laser chips

Definitions

  • the present invention concerns a method for manufacturing an optoelectronic device as well as an optoelectronic device .
  • an optoelectronic device comprising a carrier substrate and optoelectronic components arranged on the carrier substrate
  • a stamp or the like for parallel die transfer of the optoelectronic components from a first substrate to a carrier substrate .
  • the components are for example placed directly on a solderable material (e . g . indium) .
  • the components are then bonded to the carrier substrate using the solderable material under heat and pressure , partly in order to break through a possibly occurring oxide layer located on the solderable material surface and partly to electrically and mechanically connect the components to the carrier substrate .
  • the application of pressure in the process can cause the components to slip or even break .
  • tilting of the components can occur because the solderable material can melt unevenly .
  • the oxide layer poses a problem as it may interrupt the electrical connection between the components and the carrier substrate .
  • the concept is to provide a spatially limited solder depot in openings of a sacrificial layer on a carrier substrate , and to place optoelectronic components above the openings on the sacrificial layer, wherein the amount of solder material in the openings is chosen such that the optoelectronic components do in a first step not contact the solder depots when being placed above the openings .
  • the solder material of the solder depot contracts to a space between the optoelectronic components and the carrier substrate thereby increasing its height and builds up a positionally accurate electrical contact between the carrier substrate and the optoelectronic components .
  • a wetting of the solder material to both the carrier substrate and the optoelectronic component takes place .
  • the optoelectronic components remain with a positionally accurate electrical contact in form of a solder connection between the carrier substrate and the optoelectronic components on the carrier substrate .
  • a further positive effect of such a method is that due to the liquif ication of the solder material a possibly occurring oxide layer located on the solder material surface can break and the optoelectronic components can form a good and reliable electrical connection with the solder material .
  • an alignment of the optoelectronic components can be achieved for example by providing alignment posts /surfaces arranged on or at least partially embedded in the carrier substrate at a desired location to be used to align the optoelectronic components with them.
  • the alignment posts/surf aces can therefore comprise a material having better wetting properties with respect to the solder material than a surface of the carrier substrate surrounding the alignment posts /surfaces , to centre the solder material in its liquid phase above the alignment posts/surfaces .
  • the liquid solder simultaneously centres optoelectronic components placed above the solder material above the alignment posts .
  • the alignment posts in addition eliminate a possible runout issue of the solder material during bonding .
  • an alignment process and in particular a desired formation of the solder material after liquif ication can be set .
  • an alignment process and in particular a desired formation of the solder material after liquif ication can be set .
  • a method for manufacturing an optoelectronic device comprising the steps :
  • an optoelectronic component on the structured sacrificial layer above each of the separate contact areas , the optoelectronic components each comprising an electric contact facing the contact areas ;
  • the contact areas can in particular relate to positions on the carrier substrate , which in the later optoelectronic device each relate to a pixel or a subpixel of the optoelectronic device .
  • the optoelectronic device can in particular be part of a display or form a display with a plurality of pixel for example arranged in rows and columns , wherein each one or several contact areas are arranged on the carrier substrate at a position relating to a pixel of the display .
  • the contact areas may thereby comprise a different material than the carrier substrate , in particular a conductive material , forming a separate electric contact , or may be formed only by "imaginary" areas on the carrier substrate defining the later positions of the optoelectronic components on the carrier .
  • the amount of solder material provided on the contact areas in openings in the sacrificial layer is chosen such that the sacrificial layer still protrudes the solder material .
  • the solder material on the contact areas is thus thinner than the structured sacrificial layer . This is to ensure that the optoelectronic components , when being placed on the sacrificial layer above the contact areas , in a first step do not contact the solder material . Only by heating the solder material above its melting temperature , the solder material on the contact areas contracts in the space between the optoelectronic components and the carrier substrate and forms an electrical contact between the electric contacts and the optoelectronic components .
  • the sacrificial layer is thereby in particular of a material with a certain stickiness , to hold the optoelectronic components in place after the optoelectronic have been placed on the sacrificial layer and until the solder material contacts with the optoelectronic components when being liquified .
  • the structured sacrificial layer can comprise at least one of the following : a photoresist material , a hard mas k of for example silicon nitride or silicon dioxide , an epoxide , an adhesive , and Benzocyclobutene ( BCB ) .
  • the step of providing the solder material comprises sputtering or gas phase depositing the solder material on the separate contact areas . Thereby the entire surface of the structured sacrificial layer and the exposed contact areas can be covered with the solder material . Solder material which is , either accidentally or due to covering the entire surface of the structured sacrificial layer and the exposed contact areas , arranged on the structured sacrificial layer but not on the contact areas can be removed, in particular by a lift off process .
  • the step of depositing the structured sacrificial layer comprises generating openings in the sacrificial layer above the separate contact areas .
  • the solder material is in particular provided on the contact areas in the openings . Due to the processes to provide the opening , by for example depositing and structuring the sacrificial layer , the openings may each comprising an undercut , due to for example a so-called T-Topping photolithography .
  • the step of depositing the structured sacrificial layer comprises exposing additional areas on the carrier substrate adj acent to and contacting the contact areas .
  • the additional areas adj acent to and contacting the contact areas can in particular be exposed by the same openings exposing the contacting areas .
  • One opening in the structured sacrificial layer can for example expose one contact area and one or several additional areas adj acent to and contacting the contact area , however it may also be expedient , that one opening exposes all or at least a plurality of the contact areas as well as all or at least a plurality of the respective additional areas adj acent to and contacting the contact areas .
  • the step of providing the solder material comprises providing a solder material on the contact areas as well as on the additional areas , the solder material on the additional areas serving as solder depots .
  • the solder material on the additional areas is as the solder material on the contact areas thereby thinner than the structured sacrificial layer . This is to ensure that the optoelectronic components , when being placed on the sacrificial layer above the contact areas , in a first step do not contact the solder material on the contact areas and on the additional areas .
  • the solder depots serve to provide enough solder material above the contact area when being heated to ensure that the solder material has enough "spare" material to increase its height and to build up a connection with the optoelectronic components .
  • the solder material may be deposited on a respective contact area such that , when viewed in a plan view on the carrier substrate , the solder material covers not only the contact area but also an area of the carrier substrate surrounding the contact area, namely the additional areas .
  • portions of the solder material can thus comprise a first cross section that is larger than a cross section of the respective contact area .
  • cross-section with regard to the solder material , the alignment posts and the optoelectronic components is to be understood in particular as the area/ surface of the solder material , the alignment posts and the optoelectronic components respectively that is visible in the top view of the carrier substrate , or that results from a cut through the solder material , the alignment posts or the optoelectronic components along a plane that is parallel to a top surface of the carrier substrate .
  • the contact areas comprise better wetting properties with respect to the solder material than the additional areas/a surface of the carrier substrate surrounding the contact areas .
  • the contact areas comprise , when viewed in a plan view on the carrier substrate , a smaller cross section than a cross section of optoelectronic components .
  • openings in the structured sacrificial layer above the contact areas can be dimensioned in such that although the contact areas are exposed, edges of the optoelectronic components are at the same time arranged on the sacrificial layer above an opening rest on the sacrificial layer and the optoelectronic component covers the opening .
  • the electric contacts of the optoelectronic components comprise better wetting properties with respect to the solder material than the contact areas and/or a surface of the carrier substrate surrounding the contact areas .
  • a heating of the solder material above its melting temperature and thus a liquif ication of the solder material causes the solder material to wet the electric contacts when getting into close contact to the electric contacts .
  • the heating of the solder material above its melting temperature and thus a liquif ication of the solder material causes the solder material to build up a connection between the contact areas and the electric contacts of the optoelectronic components .
  • a contact angle between the carrier substrate and the solder material before the step of heating is substantially 0 ° and greater than 0 ° , in particular greater than 10 ° , after the step of heating .
  • the solder material may in particular be deposited on the contact areas in a non liquified state a contact angle between the carrier substrate and the solder material after depositing is substantially 0 ° , meaning that the carrier substrate after depositing the solder is "wetted" perfectly with the solder material .
  • "wetted" in this context has to be understood not in the common meaning as the solder material is deposited in a non liquified state , the solder material thus rather perfectly contacts and not wets the carrier substrate after being deposited .
  • a contact angle between the carrier substrate and the solder material is due to cohesion forces within the solder material and the wetting properties of the contact areas/the surface of the carrier substrate greater than 0 ° , greater than 10 ° , or greater than 45 ° .
  • the contact angle between the carrier substrate and the solder material can in particular be between 0 ° and 90
  • the solder material is provided on the contact areas , when viewed in a plan view on the carrier substrate , with a first cross section, and the step of heating causes the solder material due to cohesion forces within the solder material and the wetting properties of the contact areas and the surface of the carrier substrate surrounding the contact areas to reduce the first cross section to a smaller second cross section .
  • This reduction of the cross section relates to a contraction of the solder material in the direction of the contact areas forming a disc or a droplet with an increased height of the solder material compared to before the heating .
  • the increased height results in the solder material contacting the optoelectronic components .
  • the method further comprises a step of providing a plurality of alignment posts arranged on the separate contact areas or at least partially embedded into the carrier substrate and at least partially forming the separate contact areas .
  • the alignment posts comprise a material having better wetting properties with respect to the solder material than a surface of a material surrounding the alignment posts .
  • the solder material can in particular be deposited on a respective alignment post such that , when viewed in a plan view on the carrier substrate , the solder material covers not only the alignment posts but also an area of the carrier substrate surrounding the alignment posts . When viewed in a plan view on the carrier substrate , the solder material thus comprise a first cross section that is larger than a cross section of the respective alignment posts .
  • the alignment posts comprise a material having better wetting properties with respect to the solder material than the surface of the carrier substrate surrounding the alignment posts , a heating of the solder material above its melting temperature and thus a liquif ication of the solder material causes the solder material due to cohesion forces within the solder material to contract in the direction of the alignment posts forming a disc with a curved surface , like for example a lens , or a droplet .
  • the heating of the solder material above its melting temperature and thus a liquif ication of the solder material causes the solder material to reduce its cross section from a first cross section to a smaller second cross section, when viewed in a plan view on the carrier substrate , while increasing its height , to contact the electric contact of the optoelectronic component .
  • the step of heating, and thus a liquif ication of the solder material causes in some aspects optoelectronic components that are off-centred relative to their respective alignment post to align with their respective alignment post when being in contact with the solder material .
  • the optoelectronic components arranged on the solder material are detached from the sacrificial layer due to an increased height of the solder material and follow the movement of the solder material into the direction of the alignment posts due to surface tensions of the solder material . This results in an alignment of the optoelectronic components with the alignment posts .
  • the step of heating and thus a liquif ication of the solder material causes portions of the solder material that are off-centred relative to their respective contact are/ alignment post to align with the same . Due to the step of heating , the solder material contracts in the direction of the alignment posts/contact areas resulting in an alignment of the portions of the solder material with their respective alignment post/contact area .
  • the contact areas are arranged in a matrix pattern on the carrier substrate .
  • the optoelectronic device can in particular be part of a display with a plurality of pixel arranged in rows and columns , wherein each one or several contact areas are arranged on the carrier substrate at a position relating to a pixel of the display .
  • the step of placing the optoelectronic components comprises a parallel die transfer process .
  • Such a process may be relatively inaccurate , particularly when placing very small optoelectronic components on a carrier substrate , and therefore subsequent alignment of the optoelectronic components on the carrier substrate may be desirable .
  • an optoelectronic device comprising a carrier substrate with a plurality of contact areas as well as separate portions of a solder material each arranged on a respective contact area .
  • An optoelectronic component is each arranged on one of the separate portions of the solder material , wherein the contact areas comprise a surface having better wetting properties with respect to the solder material than a surface of the carrier substrate surrounding the contact areas .
  • the contact areas When viewed in a plan view on the carrier substrate , the contact areas , and in particular the portions of the solder material comprise a smaller cross section than a cross section of optoelectronic components .
  • the centre of gravity of the optoelectronic components is each aligned with a respective contact area, and in particular with the centre of gravity of a respective contact area .
  • the optoelectronic components are thus each aligned with a respective contact area .
  • the centre of gravity of the separate portions of the solder material is each aligned with a respective contact area .
  • the separate portions of the solder material are thus each aligned with a respective contact area .
  • the separate portions of the solder material are each arranged on a respective contact area and extend partially onto the surface of the carrier substrate surrounding the contact areas .
  • the separate portions of the solder material are thus not limited to the contact areas , but can also extend partially onto the carrier substrate surrounding the contact areas .
  • the separate portions of the solder material in particular when viewed in a plan view on the carrier substrate , each form a solder disc above a respective contact areas with a cross section larger than a cross section of a respective optoelectronic component arranged on the separate portion of the solder material .
  • the separate portions of the solder material in some aspects thus comprise a larger cross section than a respective optoelectronic component arranged on the separate portion of the solder material .
  • the contact areas are arranged in a matrix pattern on/in the carrier substrate .
  • the optoelectronic device can in particular be part of a display with a plurality of pixel arranged in rows and columns , wherein each one or several contact areas are arranged on/in the carrier substrate at a position relating to a pixel of the display .
  • the contact areas each comprise an alignment post arranged on the carrier substrate or at least partially embedded in the carrier substrate .
  • an alignment process of the optoelectronic components arranged on the solder material can be set during manufacture of the optoelectronic device in a desired way .
  • the degree to which alignment can take place with respect to a lateral displacement of the optoelectronic components it is in particular possible , to set the optoelectronic components do not tilt or tilt only slightly during the alignment process .
  • the resulting optoelectronic device can subsequently be characterized in particular by the fact that the optoelectronic components are each aligned with a respective alignment post and that a portion of solder material arranged in between to electrically and mechanically connect the optoelectronic components with the carrier substrate .
  • a width of the portions of the solder material can thereby for example be at least 2 times greater than a height of the portions of the solder material such that the portions of the solder material form something more like a disc with a greater width than height compared to a solder droplet .
  • the surface of the solder material facing the optoelectronic components can in some aspects be a curved surface , like for example of a lens , on top of which the optoelectronic component is arranged . In combination with the solder material forming something more like a disc with a greater width than height compared to a droplet , a tilting of the optoelectronic components on the solder material can be reduced or even omitted .
  • the separate portions of the solder material are in particular deposited on a respective alignment post such that , when viewed in a plan view on the carrier substrate , the solder material covers not only the alignment posts but also an area of the carrier substrate surrounding the alignment posts .
  • the separate portions of the solder material thus comprise a first cross section that is larger than a cross section of the respective alignment posts .
  • a heating of the solder material above its melting temperature and thus a liquif ication of the solder material causes the solder material due to cohesion forces within the solder material to contract in the direction of the alignment posts forming a disc with a curved surface , like for example a lens , or a droplet .
  • the heating of the solder material above its melting temperature and thus a liquif ication of the solder material causes the solder material to reduce its cross section from a first cross section to a smaller second cross section, when viewed in a plan view on the carrier substrate .
  • the alignment posts comprise at least one of :
  • Such materials or material combinations can in particular have good wetting properties with respect to a solder material .
  • the alignment posts can in particular comprise a material , or material combination with a higher wettability with respect to a solder material than at least a surface of the carrier layer surrounding the alignment posts .
  • the carrier substrate can therefore comprise a material with a lower wettability with respect to the solder material , such as for example Indium Tin Oxide ( ITO ) , and/or the surface of the carrier layer surrounding the alignment posts can comprise a coating with a lower wettability with respect to the solder material .
  • ITO Indium Tin Oxide
  • the solder material comprise Indium, Tin or a combination thereof .
  • the solder material can however also comprise any other solderable materials known in the art which provide the respective properties with regard to the wettability of the alignment posts and the surface of the carrier layer surrounding the alignment posts .
  • the optoelectronic components are , for example , radiation-emitting optoelectronic semiconductor chips .
  • the semiconductor chips may be light emitting diode ( LED) chips or a: laser chips .
  • the optoelectronic semiconductor chips may generate light during operation .
  • the optoelectronic semiconductor chips generates light in the spectral range from UV radiation to light in the infrared range , in particular visible light .
  • the optoelectronic semiconductor chips are radiationdetecting semiconductor chips , for example a- photodiodes .
  • the optoelectronic components may for example comprise edge lengths of less than 100 pm, or less than 40 pm, and in particular less than 10pm, while a height of the optoelectronic components can for example be less than 25 pm, or less than 10 pm, and in particular less than 5pm .
  • the optoelectronic semiconductor chips can thus for example be p-LEDs ( LED for light emitting device , p-LED for micro-LED) or p-LED-chips .
  • Figure 1 shows steps of a method for manufacturing an optoelectronic device in accordance with some aspects of the proposed principle
  • Figure 2 shows steps another embodiment of a method for manufacturing an optoelectronic device in accordance with some aspects of the proposed principle ;
  • Figure 3 shows detailed views on a carrier substrate in accordance with some aspects of the proposed principle ; and Figure 4 shows detailed views of a carrier substrate comprising an alignment post in accordance with some aspects of the proposed principle .
  • Figure 1 shows steps of a method for manufacturing an optoelectronic device 1 in accordance with some aspects of the proposed principle .
  • exemplary only an excerpt with only one optoelectronic components being placed on a carrier substrate is shown . It is however to be understood that the method particularly concerns the placement of several optoelectronic components on a carrier substrate .
  • a carrier substrate 2 is provided in a first step , as shown in subfigure a ) of Fig . 1 .
  • the carrier substrate can for example comprise an electrically conductive material with however a low wettability with respect to a solder material , such as for example Indium Tin Oxide ( ITO ) .
  • the carrier substrate can however also comprise a conductive material such as a metal with generally a high wettability and with a surface treatment in certain areas to set a wettability in the certain areas as desired .
  • the carrier substrate can also comprise a non- conductive material with conductive paths integrated into it .
  • a structured sacrificial layer 7 is deposited on the carrier substrate 2 such that a contact area 8 as well as two additional areas 11 are exposed on the carrier substrate 2 .
  • the position of the contact areas 8 on the carrier substrate 2 can for example correlate to a desired pixel pitch and can be created relative accurate with regard to the pixel pitch using for example a photolithographic process .
  • the structured sacrificial layer 7 can for example be created on the carrier substrate 2 by depositing a photoresist layer on the carrier substrate 2 and exposing the contact area 8 as well as two additional areas 11 on the carrier substrate 2 by structuring and thus removing the photoresist layer in the respective areas .
  • opening 9 is created in the sacrificial layer 7 .
  • the opening comprises an undercut 10 , which results from the processes to provide the opening 9 due a so-called T-Topping effect .
  • the additional areas 11 are adj acent to the contact area 8 and contact the same .
  • the opening 9 exposes both the additional areas 11 and the contact area 8 at the same time with only one continuous opening .
  • the opening could be interrupted by the sacrificial layer 7 and further contact areas 8 and additional areas 11 could be exposed by further openings 9 , or the opening 9 could be continued and expose further contact areas 8 and additional areas 11 symmetric to the shown excerpt .
  • a solder material 4 is deposited on the exposed contact area 8 and the additional areas 11 as well as on the top surface of the sacrificial layer 7 .
  • the solder material is in particular deposited on the entire surface of the sacrificial layer 7 and the surfaces which have been exposed from the sacrificial layer 7 .
  • the solder material 4 can for example be deposited on the sacrificial layer 7 by sputtering or gas phase depositing the solder material on the entire surface .
  • the amount of solder material 4 is thereby chosen such that the solder material 4 covers the exposed areas but does not fill up the opening 9 completely .
  • solder material 4 in the opening 9 has a lower height than the sacrificial layer 7 .
  • solder material 4 arranged on the sacrificial layer 7 but not in the opening 9 is then in a further step , as shown in subfigure d) of Fig . 1 , removed using for example a lift off technique .
  • an optoelectronic component 5 is placed on the sacrificial layer above the contact area 8 with an electric contact 6 facing the contact area 8 for example using a parallel chip transfer process .
  • the opening 9 is dimensioned such that the optoelectronic component 5 rests with its edges on the sacrificial layer 7 and covers the opening 9 above the contact area 8 .
  • the sacrificial layer 7 particularly comprises a material with a certain stickiness to pre-adhere the optoelectronic component 5 on the sacrificial layer 7 above the contact area 8 .
  • the lower height of the solder material 4 than the sacrificial layer 7 leads to the desired fact , that at this point of the manufacturing process the optoelectronic component 5 is not yet in contact with the solder material 4 .
  • solder material 4 is now heated and the solder material 4 liquefies .
  • the solder material 4 due to cohesion forces within the solder material 4 then contracts in the direction of the contact area 8 forming, when viewed in a plan view on the carrier substrate , a disc with a smaller cross section than its cross section before heating .
  • solder material 4 is aligned with the contact area now having a smaller cross section, when viewed in a plan view on the carrier substrate 2 , but a larger height compared to before heating the same .
  • the optoelectronic component 5 is electrically as well as mechanically connected to the carrier substrate 2 via the solder material 4 at the desired position above the contact area 8 without an application of pressure to the optoelectronic component while bonding .
  • the structured sacrificial layer 7 is removed resulting in the optoelectronic device 1 comprising the carrier substrate 2 , a portion the solder material 4 arranged on contact area 8 , and an optoelectronic component 5 arranged on the portion of the solder material 4 .
  • Fig . 2 shows steps of another embodiment of a method for manufacturing an optoelectronic device 1 in accordance with some aspects of the proposed principle .
  • the first row of the subfigures a ) to g ) of Fig . 2 shows steps of the method in a plan view on a carrier substrate 2
  • the second row shows the same steps in a cross-sectional view along cutting line A-A
  • the third row shows the same steps in a cross-sectional view along cutting line B-B
  • the method comprises in addition a step of providing an alignment post 3 embedded into the carrier substrate 2 .
  • the alignment post 3 is provided with the carrier substrate 2 in the first step , as shown in subfigure a ) of Fig . 2 .
  • the alignment post 3 can for example be created in the carrier substrate 2 by depositing a structured photoresist layer on the carrier substrate , wherein areas of the carrier substrate 2 of the later alignment posts 3 are exposed, etching cavities into the carrier substrate 2 in the exposed areas , sputtering or gas phase depositing a material of the alignment posts 2 in the cavities and optionally on the remaining photoresist layer, and removing the structured photoresist layer and the optionally remaining material of the alignment posts on the photoresist layer, in particular by a lift off technique .
  • the alignment post 3 partially forms the contact area 8 and comprises better wetting properties than the surrounding surface of the carrier substrate 2 .
  • the further steps of the method shown in Fig . 2 are substantially like the method shown in Fig . 1 .
  • the optoelectronic component 5 is however undergoing an alignment if it is positioned off-centred with regard to the alignment posts 3 .
  • an alignment process and in particular a contraction of the solder material after heating of the solder material can be set , to align the solder material 4 and coming with this the optoelectronic component 5 properly with regard to the alignment post 3 .
  • a greater amount of solder material 4 below the electric contact 6 can for example , when being heated and building up a contact with the electric contact 6 , lift up the optoelectronic component 5 and align it with the alignment posts 3 it is positioned off-centred with regard to the alignment posts 3 .
  • Fig . 3 shows in subfigures a ) to d) possible layout options of additional areas 11/solder depots 12 arranged around a contact are 8 on the carrier substrate 2 already with ( lower row ) and without (upper row ) and optoelectronic component 5 arranged on the sacrificial layer 7 above the contact area 8 .
  • the solder depots 12 can be arranged all around the contact area 8 and can be of any number arranged on the carrier substrate 2 around the contact area 8 . It has however to be ensured, that at least some portions of the sacrificial layer 7 remain close to the contact area 8 /contact the contact area 8 to provide a support on which the optoelectronic component 5 can be arranged .
  • the layout options all have the goal of minimizing the contact area of the optoelectronic component 5 and the sacrificial layer , and at the same time increasing the size of the solder depots 12 .
  • Fig . 4 shows in subfigures a ) to c ) possible layout options of the alignment post 3 being arranged on or embedded in the carrier substrate 2 .
  • the alignment post 3 is simply arranged on the carrier substrate 2 and the solder material covers the alignment post completely .
  • the alignment post comprises better wetting properties with respect to the solder material than the surrounding surface of the carrier substrate 2 for providing the alignment effect .
  • the alignment post 3 is also arranged on the carrier substrate 2 but embedded in a coating 13 laterally surrounding the alignment post . In this case the alignment post comprises better wetting properties with respect to the solder material than the coating 13 for providing the alignment effect .
  • the coating can thereby be provided on the carrier substrate 2 specifically in areas where worse wetting properties with respect to the solder material are desired .
  • the alignment post 3 is completely embedded in the carrier substrate exposing only a top surface of the alignment post 3 .
  • the alignment post 2 comprises better wetting properties with respect to the solder material than the surrounding surface of the carrier substrate 2 for providing the alignment effect .
  • the proposed principle can in particular be suitable for especially small optoelectronic components such as p-LEDs , as a reliable and accurate direct placement of such components can be very difficult .
  • Such p-LEDs can for example comprise edge lengths of less than 100 pm, or less than 40 pm, and in particular less than 10pm, while a height of the optoelectronic components can for example be less than 25 pm, or less than 10 pm, and in particular less than 5pm.
  • the solder material for such an optoelectronic component can in the final optoelectronic device 1 for example comprise a height of 50 to 500 nm and can wet the whole electric contact 6 of the optoelectronic component 5 .

Abstract

The invention concerns a method for manufacturing an optoelectronic device comprising the steps: Providing a carrier substrate; Depositing a structured sacrificial layer on the carrier substrate such that a plurality of separate contact areas of the carrier substrate are exposed; Providing a solder material on the separate contact areas, wherein the solder material on the separate contact areas is thinner than the structured sacrificial layer; Placing an optoelectronic component on the structured sacrificial layer above each of the separate contact areas, the optoelectronic components each comprise an electric contact facing the contact areas; Heating the solder material above its melting temperature such that the solder material each forms a solder disc on the separate contact areas contacting an optoelectronic component above a respective contact area; and Removing the structured sacrificial layer.

Description

METHOD FOR MANUFACTURING AN OPTOELECTRONIC DEVICE AND OPTOELECTRONIC
DEVICE
The present invention concerns a method for manufacturing an optoelectronic device as well as an optoelectronic device .
BACKGROUND
For manufacturing an optoelectronic device comprising a carrier substrate and optoelectronic components arranged on the carrier substrate , it is often used a stamp or the like for parallel die transfer of the optoelectronic components from a first substrate to a carrier substrate . By this , the components are for example placed directly on a solderable material ( e . g . indium) . The components are then bonded to the carrier substrate using the solderable material under heat and pressure , partly in order to break through a possibly occurring oxide layer located on the solderable material surface and partly to electrically and mechanically connect the components to the carrier substrate .
With such a process it is however difficult , in particular for very small optoelectronic components , to place the components with good placement accuracy, without runout of the solderable material and at the same time to omit a breakage of the components .
Indeed, the application of pressure in the process , can cause the components to slip or even break . On the other hand, without applying a pressure , tilting of the components can occur because the solderable material can melt unevenly . Also , the oxide layer poses a problem as it may interrupt the electrical connection between the components and the carrier substrate .
It is thus an obj ect of the present application to counteract at least one of the aforementioned problems and to provide an enhanced method for manufacturing an optoelectronic device and an optoelectronic device in which optoelectronic components are bonded to a carrier substrate with a high positioning accuracy and in particular without a pressure application to omit a breakage of the components .
SUMMARY OF THE INVENTION
This and other obj ects are addressed by the subj ect matter of the independent claims . Features and further aspects of the proposed principles are outlined in the dependent claims .
The concept , the inventors propose , is to provide a spatially limited solder depot in openings of a sacrificial layer on a carrier substrate , and to place optoelectronic components above the openings on the sacrificial layer, wherein the amount of solder material in the openings is chosen such that the optoelectronic components do in a first step not contact the solder depots when being placed above the openings . By choosing/setting the wetting properties of the contacting surface of the carrier substrate and the solder material , and by heating the solder material above its melting temperature , the solder material of the solder depot contracts to a space between the optoelectronic components and the carrier substrate thereby increasing its height and builds up a positionally accurate electrical contact between the carrier substrate and the optoelectronic components . Thus , a wetting of the solder material to both the carrier substrate and the optoelectronic component takes place . After removing the sacrificial layer , the optoelectronic components remain with a positionally accurate electrical contact in form of a solder connection between the carrier substrate and the optoelectronic components on the carrier substrate .
A further positive effect of such a method is that due to the liquif ication of the solder material a possibly occurring oxide layer located on the solder material surface can break and the optoelectronic components can form a good and reliable electrical connection with the solder material .
In addition to this an alignment of the optoelectronic components can be achieved for example by providing alignment posts /surfaces arranged on or at least partially embedded in the carrier substrate at a desired location to be used to align the optoelectronic components with them. The alignment posts/surf aces can therefore comprise a material having better wetting properties with respect to the solder material than a surface of the carrier substrate surrounding the alignment posts /surfaces , to centre the solder material in its liquid phase above the alignment posts/surfaces . The liquid solder simultaneously centres optoelectronic components placed above the solder material above the alignment posts . The alignment posts in addition eliminate a possible runout issue of the solder material during bonding . By such a method it is further not necessary to apply pressure to the optoelectronic components during the bonding process , which compared to a regular bonding process which use a pressure to realize an electrical as well as mechanical connection between the carrier substrate and the components reduces a possible breakage of the optoelectronic components .
By varying the amount of solder material in the openings , as well as by varying the wetting properties of the carrier substrate , the optional alignment post/surf ace , the surface of the carrier substrate surrounding the optional alignment posts /surfaces , and the surface of the optoelectronic components contacting the solder material , an alignment process and in particular a desired formation of the solder material after liquif ication can be set . By this it is in particular possible , to set the degree to which an alignment can take place with respect to a lateral displacement of the optoelectronic components , and to set that the optoelectronic components do not tilt or tilt only slightly during the alignment process .
In one aspect , a method for manufacturing an optoelectronic device is provided comprising the steps :
Providing a carrier substrate ;
Depositing a structured sacrificial layer on the carrier substrate such that a plurality of separate contact areas on the carrier substrate are exposed; Providing a solder material on the separate contact areas , wherein the solder material on the separate contact areas is thinner than the structured sacrificial layer;
Placing an optoelectronic component on the structured sacrificial layer above each of the separate contact areas , the optoelectronic components each comprising an electric contact facing the contact areas ;
Heating the solder material above its melting temperature such that the solder material each forms a solder disc on the separate contact areas contacting an optoelectronic component above a respective contact area ; and
Removing the structured sacrificial layer .
The contact areas can in particular relate to positions on the carrier substrate , which in the later optoelectronic device each relate to a pixel or a subpixel of the optoelectronic device . The optoelectronic device can in particular be part of a display or form a display with a plurality of pixel for example arranged in rows and columns , wherein each one or several contact areas are arranged on the carrier substrate at a position relating to a pixel of the display . The contact areas may thereby comprise a different material than the carrier substrate , in particular a conductive material , forming a separate electric contact , or may be formed only by "imaginary" areas on the carrier substrate defining the later positions of the optoelectronic components on the carrier .
The amount of solder material provided on the contact areas in openings in the sacrificial layer is chosen such that the sacrificial layer still protrudes the solder material . The solder material on the contact areas is thus thinner than the structured sacrificial layer . This is to ensure that the optoelectronic components , when being placed on the sacrificial layer above the contact areas , in a first step do not contact the solder material . Only by heating the solder material above its melting temperature , the solder material on the contact areas contracts in the space between the optoelectronic components and the carrier substrate and forms an electrical contact between the electric contacts and the optoelectronic components . The sacrificial layer is thereby in particular of a material with a certain stickiness , to hold the optoelectronic components in place after the optoelectronic have been placed on the sacrificial layer and until the solder material contacts with the optoelectronic components when being liquified . The structured sacrificial layer can comprise at least one of the following : a photoresist material , a hard mas k of for example silicon nitride or silicon dioxide , an epoxide , an adhesive , and Benzocyclobutene ( BCB ) .
In some aspects , the step of providing the solder material comprises sputtering or gas phase depositing the solder material on the separate contact areas . Thereby the entire surface of the structured sacrificial layer and the exposed contact areas can be covered with the solder material . Solder material which is , either accidentally or due to covering the entire surface of the structured sacrificial layer and the exposed contact areas , arranged on the structured sacrificial layer but not on the contact areas can be removed, in particular by a lift off process .
In some aspects , the step of depositing the structured sacrificial layer comprises generating openings in the sacrificial layer above the separate contact areas . The solder material is in particular provided on the contact areas in the openings . Due to the processes to provide the opening , by for example depositing and structuring the sacrificial layer , the openings may each comprising an undercut , due to for example a so-called T-Topping photolithography .
In some aspects , the step of depositing the structured sacrificial layer comprises exposing additional areas on the carrier substrate adj acent to and contacting the contact areas . The additional areas adj acent to and contacting the contact areas can in particular be exposed by the same openings exposing the contacting areas . One opening in the structured sacrificial layer can for example expose one contact area and one or several additional areas adj acent to and contacting the contact area , however it may also be expedient , that one opening exposes all or at least a plurality of the contact areas as well as all or at least a plurality of the respective additional areas adj acent to and contacting the contact areas .
In some aspects , the step of providing the solder material comprises providing a solder material on the contact areas as well as on the additional areas , the solder material on the additional areas serving as solder depots . The solder material on the additional areas is as the solder material on the contact areas thereby thinner than the structured sacrificial layer . This is to ensure that the optoelectronic components , when being placed on the sacrificial layer above the contact areas , in a first step do not contact the solder material on the contact areas and on the additional areas . The solder depots serve to provide enough solder material above the contact area when being heated to ensure that the solder material has enough "spare" material to increase its height and to build up a connection with the optoelectronic components .
The solder material may be deposited on a respective contact area such that , when viewed in a plan view on the carrier substrate , the solder material covers not only the contact area but also an area of the carrier substrate surrounding the contact area, namely the additional areas . When viewed in a plan view on the carrier substrate , portions of the solder material can thus comprise a first cross section that is larger than a cross section of the respective contact area .
In this context , the term "cross-section" with regard to the solder material , the alignment posts and the optoelectronic components is to be understood in particular as the area/ surface of the solder material , the alignment posts and the optoelectronic components respectively that is visible in the top view of the carrier substrate , or that results from a cut through the solder material , the alignment posts or the optoelectronic components along a plane that is parallel to a top surface of the carrier substrate .
In some aspects , the contact areas comprise better wetting properties with respect to the solder material than the additional areas/a surface of the carrier substrate surrounding the contact areas . By this a heating of the solder material above its melting temperature and thus a liquif ication of the solder material causes the solder material due to cohesion forces within the solder material to contract in the direction of the contact areas forming a disc with a curved surface , like for example a lens , or a droplet . Hence the heating of the solder material above its melting temperature and thus a liquif ication of the solder material causes the solder material to reduce its cross section from a first cross section to a smaller second cross section, when viewed in a plan view on the carrier substrate .
In some aspects , the contact areas comprise , when viewed in a plan view on the carrier substrate , a smaller cross section than a cross section of optoelectronic components . By this , openings in the structured sacrificial layer above the contact areas can be dimensioned in such that although the contact areas are exposed, edges of the optoelectronic components are at the same time arranged on the sacrificial layer above an opening rest on the sacrificial layer and the optoelectronic component covers the opening .
In some aspects , the electric contacts of the optoelectronic components comprise better wetting properties with respect to the solder material than the contact areas and/or a surface of the carrier substrate surrounding the contact areas . By this , a heating of the solder material above its melting temperature and thus a liquif ication of the solder material causes the solder material to wet the electric contacts when getting into close contact to the electric contacts . Hence the heating of the solder material above its melting temperature and thus a liquif ication of the solder material causes the solder material to build up a connection between the contact areas and the electric contacts of the optoelectronic components .
In some aspects , a contact angle between the carrier substrate and the solder material before the step of heating is substantially 0 ° and greater than 0 ° , in particular greater than 10 ° , after the step of heating . As the solder material may in particular be deposited on the contact areas in a non liquified state a contact angle between the carrier substrate and the solder material after depositing is substantially 0 ° , meaning that the carrier substrate after depositing the solder is "wetted" perfectly with the solder material . However, "wetted" in this context has to be understood not in the common meaning as the solder material is deposited in a non liquified state , the solder material thus rather perfectly contacts and not wets the carrier substrate after being deposited . After the step of heating the solder material and thus liquifying the solder material a contact angle between the carrier substrate and the solder material is due to cohesion forces within the solder material and the wetting properties of the contact areas/the surface of the carrier substrate greater than 0 ° , greater than 10 ° , or greater than 45 ° . After the step of heating the contact angle between the carrier substrate and the solder material can in particular be between 0 ° and 90
In some aspects , the solder material is provided on the contact areas , when viewed in a plan view on the carrier substrate , with a first cross section, and the step of heating causes the solder material due to cohesion forces within the solder material and the wetting properties of the contact areas and the surface of the carrier substrate surrounding the contact areas to reduce the first cross section to a smaller second cross section . This reduction of the cross section relates to a contraction of the solder material in the direction of the contact areas forming a disc or a droplet with an increased height of the solder material compared to before the heating . The increased height results in the solder material contacting the optoelectronic components .
In some aspects , the method further comprises a step of providing a plurality of alignment posts arranged on the separate contact areas or at least partially embedded into the carrier substrate and at least partially forming the separate contact areas . The alignment posts comprise a material having better wetting properties with respect to the solder material than a surface of a material surrounding the alignment posts .
The solder material can in particular be deposited on a respective alignment post such that , when viewed in a plan view on the carrier substrate , the solder material covers not only the alignment posts but also an area of the carrier substrate surrounding the alignment posts . When viewed in a plan view on the carrier substrate , the solder material thus comprise a first cross section that is larger than a cross section of the respective alignment posts . In combination with the fact that the alignment posts comprise a material having better wetting properties with respect to the solder material than the surface of the carrier substrate surrounding the alignment posts , a heating of the solder material above its melting temperature and thus a liquif ication of the solder material causes the solder material due to cohesion forces within the solder material to contract in the direction of the alignment posts forming a disc with a curved surface , like for example a lens , or a droplet . Hence the heating of the solder material above its melting temperature and thus a liquif ication of the solder material causes the solder material to reduce its cross section from a first cross section to a smaller second cross section, when viewed in a plan view on the carrier substrate , while increasing its height , to contact the electric contact of the optoelectronic component .
At the same time the step of heating, and thus a liquif ication of the solder material causes in some aspects optoelectronic components that are off-centred relative to their respective alignment post to align with their respective alignment post when being in contact with the solder material . As the solder material due to the step of heating contracts in the direction of the alignment posts , the optoelectronic components arranged on the solder material are detached from the sacrificial layer due to an increased height of the solder material and follow the movement of the solder material into the direction of the alignment posts due to surface tensions of the solder material . This results in an alignment of the optoelectronic components with the alignment posts .
The same applies in some aspects to the solder material . The step of heating , and thus a liquif ication of the solder material causes portions of the solder material that are off-centred relative to their respective contact are/ alignment post to align with the same . Due to the step of heating , the solder material contracts in the direction of the alignment posts/contact areas resulting in an alignment of the portions of the solder material with their respective alignment post/contact area .
In some aspects , the contact areas are arranged in a matrix pattern on the carrier substrate . The optoelectronic device can in particular be part of a display with a plurality of pixel arranged in rows and columns , wherein each one or several contact areas are arranged on the carrier substrate at a position relating to a pixel of the display .
In some aspects , the step of placing the optoelectronic components comprises a parallel die transfer process . Such a process may be relatively inaccurate , particularly when placing very small optoelectronic components on a carrier substrate , and therefore subsequent alignment of the optoelectronic components on the carrier substrate may be desirable .
Some other aspects concern an optoelectronic device comprising a carrier substrate with a plurality of contact areas as well as separate portions of a solder material each arranged on a respective contact area . An optoelectronic component is each arranged on one of the separate portions of the solder material , wherein the contact areas comprise a surface having better wetting properties with respect to the solder material than a surface of the carrier substrate surrounding the contact areas . When viewed in a plan view on the carrier substrate , the contact areas , and in particular the portions of the solder material comprise a smaller cross section than a cross section of optoelectronic components . This results due to the manufacture of the optoelectronic device , as the portions of the solder material are during manufacture spatially limited by openings of a structured sacrificial layer above the contact areas , which need to be dimensioned that small that the optoelectronic component can cover the openings and thereby rest on the sacrificial layer .
In some aspects , the centre of gravity of the optoelectronic components is each aligned with a respective contact area, and in particular with the centre of gravity of a respective contact area . The optoelectronic components are thus each aligned with a respective contact area .
In some aspects , the centre of gravity of the separate portions of the solder material is each aligned with a respective contact area . The separate portions of the solder material are thus each aligned with a respective contact area .
In some aspects , the separate portions of the solder material are each arranged on a respective contact area and extend partially onto the surface of the carrier substrate surrounding the contact areas . The separate portions of the solder material are thus not limited to the contact areas , but can also extend partially onto the carrier substrate surrounding the contact areas .
In some aspects , the separate portions of the solder material , in particular when viewed in a plan view on the carrier substrate , each form a solder disc above a respective contact areas with a cross section larger than a cross section of a respective optoelectronic component arranged on the separate portion of the solder material . When viewed in a plan view on the carrier substrate , the separate portions of the solder material in some aspects thus comprise a larger cross section than a respective optoelectronic component arranged on the separate portion of the solder material .
In some aspects , the contact areas are arranged in a matrix pattern on/in the carrier substrate . The optoelectronic device can in particular be part of a display with a plurality of pixel arranged in rows and columns , wherein each one or several contact areas are arranged on/in the carrier substrate at a position relating to a pixel of the display .
In some aspects , the contact areas each comprise an alignment post arranged on the carrier substrate or at least partially embedded in the carrier substrate . By choosing the size of the alignment posts , the amount of solder material on the alignment posts , and the wetting properties of the alignment post , the surface of the carrier substrate surrounding the alignment posts , and the surface of the optoelectronic components contacting the solder material , an alignment process of the optoelectronic components arranged on the solder material can be set during manufacture of the optoelectronic device in a desired way . By changing aforementioned parameters , it is in particular possible , to set the degree to which alignment can take place with respect to a lateral displacement of the optoelectronic components , and to set that the optoelectronic components do not tilt or tilt only slightly during the alignment process . The resulting optoelectronic device can subsequently be characterized in particular by the fact that the optoelectronic components are each aligned with a respective alignment post and that a portion of solder material arranged in between to electrically and mechanically connect the optoelectronic components with the carrier substrate . A width of the portions of the solder material can thereby for example be at least 2 times greater than a height of the portions of the solder material such that the portions of the solder material form something more like a disc with a greater width than height compared to a solder droplet . The surface of the solder material facing the optoelectronic components can in some aspects be a curved surface , like for example of a lens , on top of which the optoelectronic component is arranged . In combination with the solder material forming something more like a disc with a greater width than height compared to a droplet , a tilting of the optoelectronic components on the solder material can be reduced or even omitted .
The separate portions of the solder material are in particular deposited on a respective alignment post such that , when viewed in a plan view on the carrier substrate , the solder material covers not only the alignment posts but also an area of the carrier substrate surrounding the alignment posts . When viewed in a plan view on the carrier substrate , the separate portions of the solder material thus comprise a first cross section that is larger than a cross section of the respective alignment posts . In combination with the fact that the alignment posts comprise a material having better wetting properties with respect to the solder material than the surface of the carrier substrate surrounding the alignment posts , a heating of the solder material above its melting temperature and thus a liquif ication of the solder material causes the solder material due to cohesion forces within the solder material to contract in the direction of the alignment posts forming a disc with a curved surface , like for example a lens , or a droplet . Hence the heating of the solder material above its melting temperature and thus a liquif ication of the solder material causes the solder material to reduce its cross section from a first cross section to a smaller second cross section, when viewed in a plan view on the carrier substrate .
In some aspects , the alignment posts comprise at least one of :
- Indium;
- Nickel ;
- Tin;
- Palladium;
- Platinum; and
- Copper .
Such materials or material combinations can in particular have good wetting properties with respect to a solder material . The alignment posts can in particular comprise a material , or material combination with a higher wettability with respect to a solder material than at least a surface of the carrier layer surrounding the alignment posts . The carrier substrate can therefore comprise a material with a lower wettability with respect to the solder material , such as for example Indium Tin Oxide ( ITO ) , and/or the surface of the carrier layer surrounding the alignment posts can comprise a coating with a lower wettability with respect to the solder material .
In some aspects , the solder material comprise Indium, Tin or a combination thereof . The solder material can however also comprise any other solderable materials known in the art which provide the respective properties with regard to the wettability of the alignment posts and the surface of the carrier layer surrounding the alignment posts .
The optoelectronic components are , for example , radiation-emitting optoelectronic semiconductor chips . For example , the semiconductor chips may be light emitting diode ( LED) chips or a: laser chips . The optoelectronic semiconductor chips may generate light during operation . In particular , it is possible that the optoelectronic semiconductor chips generates light in the spectral range from UV radiation to light in the infrared range , in particular visible light . Alternatively, it is possible that the optoelectronic semiconductor chips are radiationdetecting semiconductor chips , for example a- photodiodes .
The optoelectronic components may for example comprise edge lengths of less than 100 pm, or less than 40 pm, and in particular less than 10pm, while a height of the optoelectronic components can for example be less than 25 pm, or less than 10 pm, and in particular less than 5pm . The optoelectronic semiconductor chips can thus for example be p-LEDs ( LED for light emitting device , p-LED for micro-LED) or p-LED-chips .
SHORT DESCRIPTION OF THE DRAWINGS
Further aspects and embodiments in accordance with the proposed principle will become apparent in relation to the various embodiments and examples described in detail in connection with the accompanying drawings in which
Figure 1 shows steps of a method for manufacturing an optoelectronic device in accordance with some aspects of the proposed principle ;
Figure 2 shows steps another embodiment of a method for manufacturing an optoelectronic device in accordance with some aspects of the proposed principle ;
Figure 3 shows detailed views on a carrier substrate in accordance with some aspects of the proposed principle ; and Figure 4 shows detailed views of a carrier substrate comprising an alignment post in accordance with some aspects of the proposed principle .
DETAILED DESCRIPTION
The following embodiments and examples disclose various aspects and their combinations according to the proposed principle . The embodiments and examples are not always to scale . Likewise , different elements can be displayed enlarged or reduced in size to emphasize individual aspects . It goes without saying that the individual aspects of the embodiments and examples shown in the figures can be combined with each other without further ado , without this contradicting the principle according to the invention . Some aspects show a regular structure or form. It should be noted that in practice slight differences and deviations from the ideal form may occur without , however, contradicting the inventive idea .
In addition, the individual figures and aspects are not necessarily shown in the correct size , nor do the proportions between individual elements have to be essentially correct . Some aspects are highlighted by showing them enlarged . However , terms such as "above" , "over" , "below" , "under" "larger" , "smaller" and the like are correctly represented with regard to the elements in the figures . So it is possible to deduce such relations between the elements based on the figures .
Figure 1 shows steps of a method for manufacturing an optoelectronic device 1 in accordance with some aspects of the proposed principle . In the embodiment shown, exemplary only an excerpt with only one optoelectronic components being placed on a carrier substrate is shown . It is however to be understood that the method particularly concerns the placement of several optoelectronic components on a carrier substrate . The first row of the subfigures a ) to g ) of Fig . 1 shows started from the left ( a ) ) to the right ( g ) ) steps of the method in a plan view on a carrier substrate 2 , the second row shows the same steps in a cross sectional view along cutting line A-A, and the third row shows the same steps in a cross sectional view along cutting line B-
B .
In a first step , as shown in subfigure a ) of Fig . 1 , a carrier substrate 2 is provided . The carrier substrate can for example comprise an electrically conductive material with however a low wettability with respect to a solder material , such as for example Indium Tin Oxide ( ITO ) . The carrier substrate can however also comprise a conductive material such as a metal with generally a high wettability and with a surface treatment in certain areas to set a wettability in the certain areas as desired . The carrier substrate can also comprise a non- conductive material with conductive paths integrated into it .
In a second step, as shown in subfigure b ) of Fig . 1 , a structured sacrificial layer 7 is deposited on the carrier substrate 2 such that a contact area 8 as well as two additional areas 11 are exposed on the carrier substrate 2 . The position of the contact areas 8 on the carrier substrate 2 can for example correlate to a desired pixel pitch and can be created relative accurate with regard to the pixel pitch using for example a photolithographic process . The structured sacrificial layer 7 can for example be created on the carrier substrate 2 by depositing a photoresist layer on the carrier substrate 2 and exposing the contact area 8 as well as two additional areas 11 on the carrier substrate 2 by structuring and thus removing the photoresist layer in the respective areas . Due to the structuring/removal of the sacrificial layer 7 in the respective areas , opening 9 is created in the sacrificial layer 7 . The opening comprises an undercut 10 , which results from the processes to provide the opening 9 due a so-called T-Topping effect .
The additional areas 11 are adj acent to the contact area 8 and contact the same . The opening 9 exposes both the additional areas 11 and the contact area 8 at the same time with only one continuous opening . In case of more contact areas 8 and additional areas 11 , for example arranged left and/or right of the shown excerpt , the opening could be interrupted by the sacrificial layer 7 and further contact areas 8 and additional areas 11 could be exposed by further openings 9 , or the opening 9 could be continued and expose further contact areas 8 and additional areas 11 symmetric to the shown excerpt .
In a third step , as shown in subfigure c ) of Fig . 1 , a solder material 4 is deposited on the exposed contact area 8 and the additional areas 11 as well as on the top surface of the sacrificial layer 7 . The solder material is in particular deposited on the entire surface of the sacrificial layer 7 and the surfaces which have been exposed from the sacrificial layer 7 . The solder material 4 can for example be deposited on the sacrificial layer 7 by sputtering or gas phase depositing the solder material on the entire surface . The amount of solder material 4 is thereby chosen such that the solder material 4 covers the exposed areas but does not fill up the opening 9 completely . Rather the amount of solder material is chosen such that the sacrificial layer still protrudes the solder material 4 in the opening 9 , said with other words that the solder material 4 in the opening 9 has a lower height than the sacrificial layer 7 .
The solder material 4 arranged on the sacrificial layer 7 but not in the opening 9 is then in a further step , as shown in subfigure d) of Fig . 1 , removed using for example a lift off technique . This results in solder material only being arranged on the contact area 8 and on the additional areas 11 in the opening with each a lower height than the sacrificial layer 7 .
In a fifth step , as shown in subfigure e ) of Fig . 1 , an optoelectronic component 5 is placed on the sacrificial layer above the contact area 8 with an electric contact 6 facing the contact area 8 for example using a parallel chip transfer process . The opening 9 is dimensioned such that the optoelectronic component 5 rests with its edges on the sacrificial layer 7 and covers the opening 9 above the contact area 8 . The sacrificial layer 7 particularly comprises a material with a certain stickiness to pre-adhere the optoelectronic component 5 on the sacrificial layer 7 above the contact area 8 . The lower height of the solder material 4 than the sacrificial layer 7 leads to the desired fact , that at this point of the manufacturing process the optoelectronic component 5 is not yet in contact with the solder material 4 .
In a sixth step, as shown in subfigure f ) of Fig . 1 , the solder material 4 is now heated and the solder material 4 liquefies . In case of the contact area 8 and/or the electric contact 6 comprising better wetting properties with respect to the solder material 4 than the surface of the carrier substrate 2 surrounding the contact area 8 , namely the additional areas 11 , the solder material 4 due to cohesion forces within the solder material 4 then contracts in the direction of the contact area 8 forming, when viewed in a plan view on the carrier substrate , a disc with a smaller cross section than its cross section before heating . The contraction of the solder material 4 in the direction of the contact area 8 at the same time causes the solder material 4 to increase its height and to build up a connection to the electric contact 6 of the optoelectronic component 5 . The solder material on the additional areas thereby acts as solder depots 12 "delivering" enough solder material to build up the connection between the contact area 8 and the electric contact 6 . As a result , the solder material 4 is aligned with the contact area now having a smaller cross section, when viewed in a plan view on the carrier substrate 2 , but a larger height compared to before heating the same . In addition, the optoelectronic component 5 is electrically as well as mechanically connected to the carrier substrate 2 via the solder material 4 at the desired position above the contact area 8 without an application of pressure to the optoelectronic component while bonding .
In a further step, as shown in subfigure g ) of Fig . 1 , the structured sacrificial layer 7 is removed resulting in the optoelectronic device 1 comprising the carrier substrate 2 , a portion the solder material 4 arranged on contact area 8 , and an optoelectronic component 5 arranged on the portion of the solder material 4 .
Fig . 2 shows steps of another embodiment of a method for manufacturing an optoelectronic device 1 in accordance with some aspects of the proposed principle . As in Fig . 1 the first row of the subfigures a ) to g ) of Fig . 2 shows steps of the method in a plan view on a carrier substrate 2 , the second row shows the same steps in a cross-sectional view along cutting line A-A, and the third row shows the same steps in a cross-sectional view along cutting line B-B . In contrast to Fig . 1 the method comprises in addition a step of providing an alignment post 3 embedded into the carrier substrate 2 . The alignment post 3 is provided with the carrier substrate 2 in the first step , as shown in subfigure a ) of Fig . 2 .
The alignment post 3 can for example be created in the carrier substrate 2 by depositing a structured photoresist layer on the carrier substrate , wherein areas of the carrier substrate 2 of the later alignment posts 3 are exposed, etching cavities into the carrier substrate 2 in the exposed areas , sputtering or gas phase depositing a material of the alignment posts 2 in the cavities and optionally on the remaining photoresist layer, and removing the structured photoresist layer and the optionally remaining material of the alignment posts on the photoresist layer, in particular by a lift off technique .
The alignment post 3 partially forms the contact area 8 and comprises better wetting properties than the surrounding surface of the carrier substrate 2 . By this the contraction of the solder material 4 when being heated in the direction of the alignment post and thus the contact area can be further enhanced .
The further steps of the method shown in Fig . 2 are substantially like the method shown in Fig . 1 . The optoelectronic component 5 is however undergoing an alignment if it is positioned off-centred with regard to the alignment posts 3 . By choosing the size of the alignment post 3 , the amount of solder material 4 on the alignment post 3 , and the wetting properties of the alignment post 3 , the surface of the carrier substrate 2 surrounding the alignment post 3 , and an electric contact 6 of the optoelectronic component 5 contacting the solder material 4 , an alignment process and in particular a contraction of the solder material after heating of the solder material can be set , to align the solder material 4 and coming with this the optoelectronic component 5 properly with regard to the alignment post 3 . A greater amount of solder material 4 below the electric contact 6 can for example , when being heated and building up a contact with the electric contact 6 , lift up the optoelectronic component 5 and align it with the alignment posts 3 it is positioned off-centred with regard to the alignment posts 3 .
Fig . 3 shows in subfigures a ) to d) possible layout options of additional areas 11/solder depots 12 arranged around a contact are 8 on the carrier substrate 2 already with ( lower row ) and without (upper row ) and optoelectronic component 5 arranged on the sacrificial layer 7 above the contact area 8 . The solder depots 12 can be arranged all around the contact area 8 and can be of any number arranged on the carrier substrate 2 around the contact area 8 . It has however to be ensured, that at least some portions of the sacrificial layer 7 remain close to the contact area 8 /contact the contact area 8 to provide a support on which the optoelectronic component 5 can be arranged . By this it can be ensured that during the step of placing the optoelectronic component 5 the optoelectronic component rests on the sacrificial layer and does not yet contact the solder material 4 . The layout options all have the goal of minimizing the contact area of the optoelectronic component 5 and the sacrificial layer , and at the same time increasing the size of the solder depots 12 .
Fig . 4 shows in subfigures a ) to c ) possible layout options of the alignment post 3 being arranged on or embedded in the carrier substrate 2 . As shown in subfigure a ) the alignment post 3 is simply arranged on the carrier substrate 2 and the solder material covers the alignment post completely . In this case the alignment post comprises better wetting properties with respect to the solder material than the surrounding surface of the carrier substrate 2 for providing the alignment effect . As shown in subfigure b ) the alignment post 3 is also arranged on the carrier substrate 2 but embedded in a coating 13 laterally surrounding the alignment post . In this case the alignment post comprises better wetting properties with respect to the solder material than the coating 13 for providing the alignment effect . The coating can thereby be provided on the carrier substrate 2 specifically in areas where worse wetting properties with respect to the solder material are desired . As shown in subfigure c ) the alignment post 3 is completely embedded in the carrier substrate exposing only a top surface of the alignment post 3 . Again, the alignment post 2 comprises better wetting properties with respect to the solder material than the surrounding surface of the carrier substrate 2 for providing the alignment effect .
The proposed principle can in particular be suitable for especially small optoelectronic components such as p-LEDs , as a reliable and accurate direct placement of such components can be very difficult .
Such p-LEDs can for example comprise edge lengths of less than 100 pm, or less than 40 pm, and in particular less than 10pm, while a height of the optoelectronic components can for example be less than 25 pm, or less than 10 pm, and in particular less than 5pm. The solder material for such an optoelectronic component can in the final optoelectronic device 1 for example comprise a height of 50 to 500 nm and can wet the whole electric contact 6 of the optoelectronic component 5 .
LIST OF REFERENCES
1 optoelectronic device
2 carrier substrate 3 alignment post
4 solder material
5 optoelectronic component
6 electric contact
7 sacrificial layer 8 contact area
9 opening
10 undercut
11 additional area
12 solder depot 13 coating

Claims

CLAIMS Method for manufacturing an optoelectronic device (1) comprising the steps :
Providing a carrier substrate (2) ;
Depositing a structured sacrificial layer (7) on the carrier substrate (2) such that a plurality of separate contact areas (8) of the carrier substrate (2) are exposed;
Providing a solder material (4) on the separate contact areas (8) , wherein the solder material (4) on the separate contact areas (8) is thinner than the structured sacrificial layer (7) ;
Placing an optoelectronic component (5) on the structured sacrificial layer (7) above each of the separate contact areas (8) , the optoelectronic components (5) each comprise an electric contact (6) facing the contact areas (8) ;
Heating the solder material (4) above its melting temperature such that the solder material (4) each forms a solder disc on the separate contact areas (8) contacting an optoelectronic component (5) above a respective contact area (8) ; and
Removing the structured sacrificial layer (7) . The method according to claim 1, wherein the step of providing the solder material (4) comprises sputtering or gas phase depositing the solder material (4) , in particular covering the entire surface of the structured sacrificial layer (7) and the exposed contact areas (8) with the solder material (4) . The method according to claim 1 or 2 wherein the step of providing the solder material (4) comprises removing solder material (4) arranged on the structured sacrificial layer (7) , in particular by a lift off process. The method according to any one of claims 1 to 3, wherein the step of depositing the structured sacrificial layer (7) comprises generating openings (9) in the sacrificial layer (7) above the separate contact areas (8) , in particular the openings each comprising an undercut (10) . The method according to any one of claims 1 to 4, wherein the step of depositing the structured sacrificial layer (7) comprises exposing additional areas (11) on the carrier substrate (2) adjacent to and contacting the contact areas (8) . The method according to claim 5, wherein the step of providing the solder material (4) comprises providing the solder material on the additional areas (11) serving as solder depots (12) , wherein the solder material (4) on the additional areas (11) is thinner than the structured sacrificial layer (7) . The method according to claim 5 or 6, wherein the contact areas (8) comprise better wetting properties with respect to the solder material (4) than the additional areas (11) . The method according to any one of claims 1 to 7, wherein the contact areas (8) comprise a smaller cross section than a cross section of optoelectronic components (5) . The method according to any one of claims 1 to 8, wherein the electric contacts (6) of the optoelectronic components comprise better wetting properties with respect to the solder material (4) than the contact areas (8) and/or a surface of the carrier substrate (2) surrounding the contact areas (8) . The method according to any one of claims 1 to 9, wherein a contact angle between the carrier substrate (2) and the solder material (4) before the step of heating is substantially 0° and greater than 0°, in particular greater than 10°, after the step of heating. The method according to any one of claims 1 to 10, wherein the solder material (4) is provided on the contact areas (8) with a first cross section, and wherein the step of heating causes the solder material (4) to reduce the first cross section to a smaller second cross section. The method according to any one of claims 1 to 11 further comprising a step of providing a plurality of alignment posts (3) arranged on the separate contact areas (8) or at least partially embedded into the carrier substrate (2) and at least partially forming the separate contact areas (8) , wherein the alignment posts (3) comprise a material having better wetting properties with respect to the solder material (4) than a surface of a material surrounding the alignment posts (3) . The method according to any one of claims 1 to 12, wherein the step of heating causes optoelectronic components (5) that are off-centred relative to their respective contact area (8) to align with their respective contact area (8) . The method according to any one of claims 1 to 13, wherein the separate contact areas (8) are arranged in a matrix pattern. The method according to any one of claims 1 to 14, wherein the step of placing the optoelectronic components (5) comprises a parallel chip transfer process . An optoelectronic device (1) comprising: a carrier substrate (2) with a plurality of contact areas (8) ; separate portions of a solder material (4) each arranged on a respective contact area (8) ; and an optoelectronic component (5) on each of the separate portions of the solder material (4) ; wherein the contact areas (8) comprise a surface having better wetting properties with respect to the solder material (4) than a surface of the carrier substrate (2) surrounding the contact areas (8) . The optoelectronic device according to claim 16, wherein the centre of gravity of the optoelectronic components (5) is each aligned with a respective contact area (8) .
18. The optoelectronic device according to claim 16 or 17, wherein the centre of gravity of the separate portions of the solder material (4) is each aligned with a respective contact area (8) .
19. The optoelectronic device according to any one of claims 16 to 18, wherein the separate portions of the solder material (4) are each arranged on a contact area (8) and extend partially onto the surface of the carrier substrate (2) surrounding the contact areas (8) .
20. The optoelectronic device according to any one of claims 16 to 19, wherein the separate portions of the solder material (4) each form a solder disc above a respective contact area (8) with a cross section larger than a cross section of a respective optoelectronic component (5) arranged on the contact area (8) .
21. The optoelectronic device according to any one of claims 16 to 20, wherein the contact areas (8) are arranged in a matrix pattern.
22. The optoelectronic device according to any one of claims 16 to 21 wherein the contact areas (8) each comprise an alignment post (3) arranged on the carrier substrate (2) or at least partially embedded in the carrier substrate (2) .
23. The optoelectronic device according to claim 22, wherein a cross section of the portions of the solder material (4) is larger than a cross section of the respective alignment posts (3) .
24. The optoelectronic device according to claim 22 or 23, wherein the alignment posts (3) comprise at least one of:
- Indium;
- Nickel;
- Tin;
- Palladium;
- Platinum; and
- Copper.
25. The optoelectronic device according to any one of claims 16 to 24, wherein the optoelectronic components (5) are p-LEDs .
PCT/EP2022/063742 2022-05-20 2022-05-20 Method for manufacturing an optoelectronic device and optoelectronic device WO2023222240A1 (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130126891A1 (en) * 2011-11-18 2013-05-23 Andreas Bibl Micro light emitting diode
EP2688093B1 (en) * 2012-07-19 2018-07-18 Technische Universität Ilmenau Method of and apparatus for fluidic self-assembly of components on a substrate
US20210320088A1 (en) * 2020-04-08 2021-10-14 Asti Global Inc., Taiwan Led chip initial structure, substrate structure, chip transferring method and image display device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130126891A1 (en) * 2011-11-18 2013-05-23 Andreas Bibl Micro light emitting diode
EP2688093B1 (en) * 2012-07-19 2018-07-18 Technische Universität Ilmenau Method of and apparatus for fluidic self-assembly of components on a substrate
US20210320088A1 (en) * 2020-04-08 2021-10-14 Asti Global Inc., Taiwan Led chip initial structure, substrate structure, chip transferring method and image display device

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