WO2023204723A1

WO2023204723A1 - Software-defined transceiving device

Info

Publication number: WO2023204723A1
Application number: PCT/RU2022/000131
Authority: WO
Inventors: Олеся Викторовна БОЛХОВСКАЯ; Вадим Сергеевич СЕРГЕЕВ; Антон Вадимович ЕЛОХИН
Original assignee: Общество С Ограниченной Ответственностью "Радио Лаб Нн"; Олеся Викторовна БОЛХОВСКАЯ; Вадим Сергеевич СЕРГЕЕВ; Антон Вадимович ЕЛОХИН
Priority date: 2022-04-18
Filing date: 2022-04-18
Publication date: 2023-10-26

Abstract

The invention relates to software-configurable radio systems applicable in the field of communications and radiolocation and in mobile radio communication systems. A software-defined transceiving device (1) comprises a processor (2), a storage (3) coupled to the processor, and a multi-channel transceiving unit (4) coupled to the processor. The device further comprises antenna element arrays (61-62), and pattern-forming units (51-52) coupled to the antenna element arrays, the multi-channel transceiving unit and the processor, wherein the multi-channel transceiving unit contains ports (14-15), each of which is coupled to one pattern-forming unit, each pattern-forming unit also being coupled to one antenna element array, and the processor is configured to be capable of adjusting the radiation pattern of the antenna element arrays. The invention is directed toward the creation of a software-controllable radiation pattern such as to allow the concentration or attenuation of the radiated energy, the amplification and/or suppression of received signals for given directions, the amplification of useful signals, a reduction of interference in given directions, and an increase in the range and reliability of communication and in the data transmission rate, using software-defined signal parameters.

Description

SOFTWARE-DEFINED TRANSMITTER DEVICE

Technical field

The invention relates to software-defined radio systems that can be used in the field of communications technology, radar, and mobile radio communication systems.

Prior Art

In modern conditions of the rapidly developing segment of the wireless technology industry, the issue of accelerating the process of developing and debugging new technological solutions and communication standards arises. The ever-increasing requirements for data transmission speeds of wireless equipment are forcing manufacturers to look for ways to optimize the development process and minimize the cost of updating existing hardware solutions. One possible solution to this problem is to introduce software-defined wireless technology (Software Defined Radio - SDR) into this process.

The idea behind existing SDR devices is that the hardware can be completely configured or defined by software. The received radio signal is converted into digital format in a fairly universal receiving unit, and its further processing is carried out in the digital domain. The transmitted signal is digitally generated according to user-specified configurations and converted to an analog signal in the transmitting unit. The main advantage of this approach is that such transmitting and receiving equipment can be completely reconfigured by simply replacing the software and configured by the user to receive and transmit almost any signal-code structures in a given frequency range. The ability to configure the software allows you to use equipment for receiving and transmitting radio signals built in accordance with new communication standards, explore various noise-resistant coding schemes and types of signal modulation without changing the hardware of the equipment. At the same time, the use of one hardware platform for the development and testing of various transceiver devices can significantly reduce development costs and improve the quality of products.

Among the typical existing SDR devices are the following.

Multiple waveform software radio US6, 181,734 is known, which describes a radio station with software-defined functionality that can use different signal forms. The radio has a memory that stores software for processing different types of signals and additionally includes one or more processors that retrieve waveform-specific software to process information when transmitting or receiving. All information processing between receiving or reproducing speech and transmitting or receiving radio frequency signals, respectively, is done in software. The US6, 181,734 device meets the needs of so-called "dual mode" cell phones, where different modes refer to different waveforms. In addition, the operator can switch from one waveform mode to another to communicate over various radio networks, such as Motorola, Inc.'s Iridium satellite communications network, TDMA and/or CDMA cellular networks, or other land mobile two-way radios, systems, or communications for all or several of them simultaneously.

Software defined cognitive radio US8,036,240 is known, which describes a computing device with a software-defined radio device, which has an architecture with separate components to provide control functions and data processing functions. Control components configure the processing components so that the software-defined radio provides the required performance characteristics. Components in the data layer may receive information characterizing operating conditions that may be provided to one or more control components. In response, control components can modify data-level components to regulate operating conditions. In one of the possible implementations, the Software defined cognitive radio US8, 036,240 has an architecture with separate logical levels: a control level and a data level. The data layer performs data processing operations associated with wireless communications. The control plane allows the data plane to be reconfigured to change the wireless technology under which the radio operates or to adjust operating parameters without changing the wireless technology. Due to the flexibility provided by such an architecture, the software defined radio device can be configured or changed to support efficient communication using one or more wireless communication technologies. As one example of the flexibility provided by software-defined radios, a feedback channel can be easily formed between data plane components and control plane components. Data plane components can generate status information about the communication channel being used, such as error rate and noise level. Such information can be provided to a cognitive module in the control layer, which can identify adjustments required for components in the data layer that allow adaptation to current operating conditions. Software defined radio and radio system US7,043,023 was selected as the closest to the invention (prototype), in which the software defined radio device contains: an antenna for transmitting and receiving radio signals, a radio frequency signal processing unit, a baseband signal processing unit, a control unit, storage storing software for defining a function of a software-defined radio and a specification criterion defining reference radio transmission characteristics, a measurement circuit for measuring the transmission characteristics of a radio signal transmitted from said software-defined radio device, and a switch coupled to said antenna, said radio frequency unit, and said measurement circuitry. . The control unit is configured to change the settings of the baseband signal processing unit and the RF signal processing unit so as to satisfy the target transmission and reception performance specification criteria. At time intervals when said measurement circuit measures transmission characteristics, said switch disconnects said RF unit from the antenna and connects it to the measurement circuit to redirect the signal to the measurement circuit. However, the above examples of known SDR devices do not use multi-element antenna arrays and thus lack the ability to use a wide range of spatial signal processing technologies, such as forming steerable narrow beams using phased array antenna technology to increase communication range and reduce interference in unwanted areas. directions, the formation of several independent spatial subchannels through the use of transmission technology with multiple inputs and outputs (Multiple Input Multiple Output - MIMO) to increase the data transfer rate due to the simultaneous transmission of information in the same same frequency resources over different spatial subchannels, as well as other multi-antenna signal processing techniques.

Disclosure of the Invention

The problem to be solved by the invention is the creation of a transceiver device (RTD) with a controlled modular multi-element antenna system with a large number of antenna elements, which makes it possible to significantly expand the scope of application of the TRU: increase the communication range and data transmission speed, reduce mutual interference between stations along the compared to existing SDR devices using unsteered antennas.

The technical result is the creation by the claimed PPU of a program-controlled radiation pattern with the ability to concentrate and/or attenuate emitted energy, as well as amplify and/or suppress received signals for one or more specified directions, amplify one or more useful signals and/or reduce interference in one or several specified directions, increasing the range and reliability of communication and data transmission speed when using software-defined shape, carrier frequency, bandwidth, signal-code structures and other signal parameters. The solution to the problem is achieved by the fact that a software-defined transceiver device containing a processor with a digital signal processing (DSP) unit included in it, configured for digital processing of transmitted and/or received signals, a control and configuration unit, as well as storage connected to the processor, configured to store instructions for the processor, a multi-channel transceiver unit connected to the processor and configured for analog and/or radio frequency processing of transmitted and/or received signals, additionally contains arrays of antenna elements, beamforming units connected to the antenna arrays elements, and to a multi-channel transceiver unit, and to a processor, wherein the multi-channel transceiver unit contains ports, each of which is connected to one beamforming unit, and each beamforming unit is also connected to one array of antenna elements, and the processor configured with the ability to change the radiation pattern of the antenna element arrays.

In this case, the beamforming unit contains a power division device connected to the processor and configured to divide the power of transmitted signals between the antenna elements of the array connected to the beamformer and/or to sum the power of the signals received from the elements of the antenna array connected to the beamformer radiation patterns, as well as circuits for radio frequency processing of received and/or transmitted signals, each circuit connected to a power division device and to one antenna element of the array, which is connected to this beamforming unit.

The radio frequency processing circuit for received and/or transmitted signals is configured to adjust the phase of received and/or transmitted signals using configuration information coming from the processor.

A DSP digital signal processing unit, including a digital processing unit for transmitted signals, in which a transmitter signal combinator is connected in series with the transmitter DSP pipeline, and a digital processing unit for received signals, in which a receiver signal combinator is connected in series with the receiver DSP pipeline, also contains a channel characteristics estimation unit communication connected to a digital processing unit for received signals, and a block for calculating radiation patterns connected to a unit for estimating communication channel characteristics, the operating parameters of which are determined by configuration and status information coming from the control and configuration unit algorithms executed by the processor.

In this case, the multi-channel transceiver unit is configured to process signals containing in-phase and quadrature components, and the processor is configured to exchange with the multi-channel transceiver unit at least the first and second signals having in-phase and quadrature components for processing, respectively , the first and second channels of a multi-channel transceiver unit, wherein the in-phase and quadrature components of the second signal are a linear combination of the in-phase and quadrature components of the first signal.

In an alternative solution to the problem, the transceiver unit is also configured to process signals containing in-phase and quadrature components, and the processor is configured to process at least one digital signal having in-phase and quadrature components, the processor is also configured to exchange with a multi-channel receiver - a transmitting unit, at least the first and second signals having in-phase and quadrature components, for processing, respectively, by the first and second channel of the multi-channel transceiver unit, wherein the in-phase and quadrature components of the first signal represent a first linear combination of the in-phase and quadrature components at least one digital signal, and the in-phase and quadrature components of the second signal are a second linear combination of the in-phase and quadrature components of the at least one digital signal.

In a third possible solution to the problem, the processor is configured to process at least one digital signal having in-phase and quadrature components, the processor also configured to exchange with the multi-channel transceiver unit at least first and second signals having in-phase and quadrature components, for processing, respectively, the first and second channel of the multi-channel transceiver unit, wherein the in-phase and quadrature components are at least , one digital signal are a linear combination of in-phase and quadrature components of at least the first and second signals.

Embodiments of the Invention

In fig. 1 shows the specified transceiver device 11NU 1, which contains a processor 2, with a digital signal processing unit (DSP) 20 included in it, configured for digital processing of transmitted and/or received signals, a control and configuration unit 21, performing digital signal processing, control and configuration of PPU 1, storage 3, which includes a memory 30, connected to processor 2 and storing software for processor 2, as well as configuration parameters of PPU 1 blocks and modules, multi-channel transceiver unit 4, connected to processor 2 and carrying out analog and radio frequency processing of transmitted and received radio signals, antenna module 5, including N _AAR antenna arrays 61 - 62 and N _AAR radiation pattern formation blocks 51 - 52, where NAAR is an integer greater than or equal to two, each of the antenna arrays connected to the multi-channel transmitting and receiving unit 4 through one beamforming unit. The antenna module 5 is connected to the multi-channel transmitting and receiving unit 4 and to the processor 2 and carries out, together with the processor 2, the digital-analog formation of the radiation pattern (AP) 33 of the antenna system from N _AAR antenna arrays 61 - 62.

PPU 1 is used to exchange digital data 10 with other transceiver devices by transmitting and/or receiving NAAR radio signals 18 - 19 using antenna arrays 61 - 62. In this case, digital signal processing (DSP) algorithms 20 convert between digital data 10 and NAAR digital signals, which the processor 2 exchanges with the multi-channel transceiver unit 4 through the digital port 12; multi-channel transceiver unit 4 converts between N _A AR digital signals of digital port 12 and N _A AR radio frequency (RF) signals, which multi-channel transceiver unit 4 exchanges with antenna module 5 through N _A AR RF ports 14 - 15; antenna module 5 converts between N _A AR RF signals of digital ports 14 - 15 and N _A AR radio signals 18 - 19. In this case, N _A AR radio signals 18 - 19 are transmitted and/or received by NAAR antenna subarrays 61 - 62, respectively having N _A AR radiation patterns (DP) 31 - 32, formed respectively by NAAR radiation pattern formation units (PDN) 51 - 52 of the antenna module 5. Processor 2 controls the multi-channel transceiver unit 4 through the control port 25 and the antenna module 5 through the control port 26.

In one embodiment, processor 2 is connected to user interface 8 to receive control information 23, based on which control and configuration algorithms 21 executed by processor 2 control the control panel 1, including loading user blocks and/or digital processing algorithms into processor 2 signals 20, the configuration of analog and radio frequency signal processing in the multi-channel transmitting and receiving unit 4, as well as the formation of DN 33 of PPU 1 based on N _A AR DN 31 - 32 generated by the antenna module 5. In this embodiment, the control and configuration algorithms 21 accept the control information 23 from the user interface 8 and store it in storage 3 for future use. In another embodiment, the PPU 1 can be configured once for the purpose of autonomous operation as an independent station of the communication system without further use of the user interface 8. In this alternative implementation, the control and configuration algorithms 21 control the PPU 1 based on the control previously stored in the storage 3 information 22.

It should be understood that although in the embodiment of the present invention shown in FIG. 1, the antenna module 5 contains two antenna arrays 61 and 62 and two FDN units 51 and 52; the range of possible embodiments of the invention is not limited to these values. Thus, in other embodiments of the invention, the value of N _AAR may be greater than two, that is, the antenna module 5 may contain more than two antenna arrays and, accordingly, more than two FDN units connected to these arrays, one FDN unit per antenna array. In fig. 2 shows an example structure of digital signal processing (DSP) algorithms 20 executed by processor 2 in accordance with one embodiment of the present invention. Among the DSP algorithms 20 executed by the processor 2, the following logical blocks can be distinguished, described below in more detail with reference to FIG. 2 - fig. 5. This division into blocks is carried out conditionally and serves for a more complete understanding of the present invention. At the same time, to describe the operation of DSP 20 algorithms, conditional blocks are described like physical blocks, in particular, it is said that blocks can perform some operations on signals. In fact, it should be understood that the algorithms denoted by these blocks can be implemented both as a sequence of operations performed by processor 2, and in the form of special computing blocks implemented in hardware as part of processor 2.

According to the embodiment of the invention shown in FIG. 2, DSP 20 algorithms contain a digital processing unit for transmitted signals 200. Block 200 includes a transmitter DSP pipeline block 201 that converts transmitted digital data 101 into digital signals 204 having in-phase and quadrature components, and a transmitter signal combiner 203 that converts digital signals 204 into N _AAR digital signals 121 - 122, also having in-phase and quadrature components obtained by implementing linear combinations of the in-phase and quadrature components of the signals 204.

In the embodiment of the invention shown in FIG. 2, DSP algorithms 20 also include a digital processing unit for received signals 210. Unit 210 includes a receiver signal combinator 213 that converts N _AAR of received digital signals 123 - 124, having in-phase and quadrature components, into digital signals 214, also having in-phase and quadrature components. components, by implementing a linear combination of in-phase and quadrature components N _AAR of the received digital signals 123 - 124, and a receiver DSP pipeline unit 211 that converts the digital signals 214 into received digital data 11 1.

The operating parameters of the digital processing unit of transmitted signals 200, including the transmitter DSP pipeline unit 201 and the transmitter signal combinator 203, the digital processing unit of received signals 210, including the receiver DSP pipeline unit 211 and the receiver signal combinator 213, are determined by the configuration and status information 24 coming from the algorithms control and configuration 21 performed by the processor 2. In particular, the configuration and status information 24 includes the coefficients of linear combinations of the in-phase and quadrature components of digital signals 204, performed by the transmitter signal combinator 203, as well as the coefficients of the linear combination of received signals 123 - 124, performed by the combinator receiver signals 213. In fig. 3 shows an example structure of digital signal processing (DSP) algorithms 20 executed by processor 2 in accordance with one embodiment of the present invention. In accordance with this embodiment, DSP algorithms 20 contain a digital processing unit for transmitted signals 200. Unit 200 includes N _TX _DSP blocks of transmitter DSP pipelines 201 - 202, where N _TX _DSP ~ an integer greater than or equal to two, converting N _TX _DSP of transmitted digital data 101 - 102 into N _TX _DSP of digital signals 204 - 205, having in-phase and quadrature components, and a transmitter signal combiner 203, converting N _{TX DS} P of digital signals 204 - 205 into NAAR of digital signals 121 - 122, also having in-phase and quadrature components obtained by implementing linear combinations of in-phase and quadrature components N _{TX DS} p signals 204 - 205.

In the embodiment of the invention shown in FIG. 3, DSP algorithms 20 also contain a digital processing unit for received signals 210. Unit 210 includes a receiver signal combinator 213 that converts N _A AR received digital signals 123 - 124, having in-phase and quadrature components, into N _{RX DS} p digital signals 214 - 215, where NRX DSP is an integer greater than or equal to two, also having in-phase and quadrature components, by implementing linear combinations of the in-phase and quadrature components of the received digital signals 123 - 124, and N _RX _DSP blocks of receiver DSP pipelines 211 - 212, converting N _RX _DSP of digital signals 214 - 215 in N^ DSP of received digital data 1 11 - 112. Operating parameters of the digital processing unit of transmitted signals 200, including the transmitter DSP pipeline blocks 201 - 202 and the transmitter signal combinator 203, the digital processing unit of received signals 210, including the receiver DSP pipeline blocks 211 - 212 and the receiver signal combinator 213 are determined by the configuration and status information 24 coming from the control algorithms and configuration 21 performed by processor 2. In particular, configuration and status information 24 includes coefficients of linear combinations of in-phase and quadrature components of digital signals 204 - 205 performed by the transmitter signal combinator 203, as well as coefficients of linear combinations of received signals 123 - 124 performed by the combinator receiver signals 213.

It should be understood that, although in the embodiment of the present invention shown in FIG. 3, DSP algorithms 20 contain two transmitter DSP pipeline blocks 201 and 202 and two receiver DSP pipeline blocks 211 and 212, the range of possible implementations of the invention is not limited to these values. Thus, in other embodiments of the invention, the values of N _{TX_DSP} AND NRX _DSP may be greater than two, that is, the DSP algorithms 20 may contain more than two blocks of transmitter DSP pipelines and more than two blocks of receiver DSP pipelines.

In the embodiments of the invention shown in FIGS. 2 and fig. 3, the DSP algorithms 20 also include a link performance estimator 220 that calculates estimated link performance 221 based on the received digital signals 123 - 124 processed by the received digital signal processing unit 210. The estimated link performance 221 includes at least one of the following set of possible characteristics: power attenuation coefficient in the communication channel, one or more amplitude-frequency characteristics of the communication channel, one or more impulse characteristics of the communication channel, one or more directions to one or more remote transceiver devices. The operating parameters of the communication channel characteristics evaluation unit 220 are determined by the configuration and status information 24 coming from the control and configuration algorithms 21 performed by the processor 2. In the embodiments of the invention shown in FIGS. 2 and fig. 3, the DSP algorithms 20 also include a block 230 for calculating radiation patterns. Block 230 calculates the parameters of the radiation pattern 33 of the PPU 1 based on the estimated characteristics of the communication channel 221. The parameters of the DP 33 calculated by the block 230 include the coefficients of linear combinations for the transmitter signal combinator 203 and the receiver signal combinator 213, as well as the parameters for the formation of the DP 31 - 32 blocks formation of radiation patterns (PDP) 51 - 52 of the antenna module 5, as will be described below with reference to FIG. 9 - 13. The operating parameters of block 230 when calculating DN 33 of PPU 1 are determined by the configuring part of the configuration and status information 24 coming from control and configuration algorithms 21 performed by processor 2, and the parameters of DN 33 calculated by block 230 are supplied to the control and configuration algorithms in the form status part of configuration and status information 24.

In fig. 4 shows an example of the structure of a transmitter DSP pipeline 201 such as the transmitter DSP pipeline 201 in FIG. 2 or one of the N _TX DSP pipelines of the DSP transmitter 201 - 202 in FIG. 3 in accordance with one embodiment of the present invention. In this embodiment, the transmitter DSP pipeline 201 includes a noise-resistant coding block 251, a data interleaving block 252, a modulation symbol generation block 253, a block 254 for converting signals from the frequency domain into the time domain using an inverse discrete Fourier transform (IDFT), a block 255 for adding protective intervals (SI) in the sequence of digital signal samples, as well as blocks for adding various service signals and service sequences to the incoming information sequences (not shown in Fig. 4). In fig. 5 shows an example structure of a receiver DSP pipeline 211 such as the receiver DSP pipeline 211 in FIG. 2 or one of the N _{RX_DSP} DSP pipelines of the receiver 211 - 212 in FIG. 3 in accordance with one embodiment of the present invention. In this embodiment, the receiver DSP pipeline 21 1 includes a noise-tolerant decoding block 261, a data deinterleaving block 262, a

263 formation of information blocks from modulation symbols, block

264 for converting signals from the time domain to the frequency domain using a discrete Fourier transform (DFT), a block 265 for removing (removing) guard intervals (GS) from a sequence of digital signal samples, as well as blocks for processing service signals and service information sequences (not shown in FIG. 5) and removing them from the output information sequence.

The operation of the DSP algorithms 20, in accordance with the embodiments of the present invention shown in Figs 2-5, is controlled using configuration information 24. In the embodiments of the invention shown in Figs 4-5, the configuration information 24 includes parameters of the noise-correcting coding algorithms 251 and decoding 261. For example, when using signal-code structures of Wi-Fi technology standard IEEE802.1 lax, encoding algorithms 251 and decoding algorithms 261 respectively encode and decode the bit stream of data to provide increased noise immunity to communication using a convolutional code or a code with a small parity check density (English, low density parity check - LDPC), using one of the possible coding rates, such as 1/2, 2/3, 3/4, 5/6, etc. In this case, the error-correcting coding parameters are 251 and decoding 261 contained in the configuration information 24 determine the choice of one of the encoding/decoding types and one of the possible encoding rates. In the embodiments of the invention shown in FIGS. 4-5, the configuration information 24 also includes parameters of the bit sequence interleaving 252 and deinterleaving 262 algorithms that determine the method of interleaving and deinterleaving and the size of the bit block on which the bit sequence is interleaved/deinterleaved.

In the embodiments of the invention shown in FIGS. 4-5, configuration information 24 also includes modulation and demodulation parameters 243 defining the type of modulation used and the number of bits per modulation symbol. For example, when using IEEE802.1 lax Wi-Fi technology signal-code structures, modulation algorithms 253 and demodulation algorithms 263 respectively modulate and demodulate the information flow using various modulation schemes, such as binary phase shift keying BPSK with one bit per modulation symbol, quadrature phase shift keying (QPSK) with two bits per modulation symbol, 16 quadrature amplitude modulation (16-QAM) with four bits per modulation symbol modulation symbol, 64-QAM with six bits per modulation symbol, etc. In this case, the modulation 253 and demodulation 263 parameters contained in the configuration information 24 determine the choice of a particular modulation/demodulation method from among the possibilities.

In the embodiments of the invention shown in FIGS. 4-5, configuration information 24 also includes parameters of the forward Fourier transform 264 and the inverse discrete Fourier transform 254, such as the size of the block of modulation symbols on which the Fourier transform is performed.

In the embodiments of the invention shown in FIGS. 4-5, configuration information 24 also includes insert parameters 255 and removal 265 of guard intervals, defining the method of providing the guard interval, its size and frequency.

In the embodiments of the invention shown in FIGS. 4-5, configuration information 24 also includes parameters for combining transmitted and received signals by signal combiners of transmitter 203 and receiver 213, respectively. These parameters include the coefficients of one or more linear combinations of the in-phase and quadrature components of one or more digital signals, such as signals 204 and 205, performed by the transmitter combinator 203, as well as the coefficients of linear combinations of the in-phase and quadrature components of received digital signals, such as signals 123 and 124 performed by the receiver combinator 213. These coefficients may be calculated, at least in part, based on the estimated characteristics 221 of the communication channel between the PPU 1 and one or more other transceiver devices.

In fig. 6 shows an example block diagram of a multi-channel pre-transmit unit 4 in accordance with one embodiment of the present invention. The multi-channel transceiver unit 4 is connected to the processor 2 via digital port 12 and control port 25, as well as to the antenna module 5 via N _AAR radio frequency ports 14 - 15 (see Fig. 1). Multichannel transceiver unit 4 contains a transmitting signal processing unit 40, including N _AAR transmitter channels 401 - 402, and a received signal processing unit 41, including N _AAR receiver channels 411 - 412. Multichannel transmitting and receiving unit 4 carries out analogue processing N _AAR transmitted signals 141 - 142 and N _AAR received signals 143 - 144, which are exchanged with the antenna module 5 through N _AAR radio frequency ports 14 - 15 in such a way that one transmitted and one received signal is exchanged through one port. Multichannel receiver transmitting unit 4 also performs conversion N _AAR of transmitted digital signals 121 - 122 from digital representation to analog and conversion from analog representation to digital representation N _AAR of received digital signals 123 - 124. Transmitted signal processing unit 40 receives from processor 2 through digital port 12 N _AAR transmitted digital signals 121 - 122. Based on the transmitted digital signals 121 - 122 using N _AAR channels of the transmitter 401 - 402, the transmitted signal processing unit 40 generates N _AAR radio frequency signals 141 - 142 and then transmits them to the antenna module 5 through N _AAR radio frequency ports 14 - 15.

The received signal processing unit 41 receives N _AAR radio frequency signals 143-144 from the antenna module 5 via N _AAR radio frequency ports 14 - 15. Based on the radio frequency signals 143 - 144 using N _AAR receiver channels 411 - 412, the received signal processing unit 41 generates N _AAR received digital signals 123 - 124 and then transmits them to the processor 2 through the digital port 12.

It should be understood that although in the embodiment of the present invention shown in FIG. 6, the transceiver unit 4 contains two transmitter channels 401 and 402 and two receiver channels 411 and 412, the range of possible embodiments of the invention is not limited to these values. Thus, in other embodiments of the invention, the value of N _AAR may be greater than two, that is, the transceiver unit 4 may contain more than two transmitter channels and more than two receiver channels. In fig. 7 shows an example implementation of a transmitter channel 401 in accordance with one embodiment of the present invention. Transmitter channel 401 receives an input digital transmit signal 121 having in-phase and quadrature components 1210 and 1211, respectively. The common mode component 1210 of the digital signal 121 is converted from digital to analog using digital analog converter (DAC) 4011. The quadrature component 1211 of the digital signal 121 is converted from digital to analog form using a digital-to-analog converter (DAC) 4012.

Next, the transmitter channel 401 performs operations on analog signals, including filtering using low-pass filters 4013 and 4014 of analog in-phase and quadrature signals, respectively, transferring to an intermediate and/or carrier frequency using mixers 4015 and 4016 of the filtered in-phase and quadrature signals, respectively, summing the transferred to the intermediate and/or carrier frequency of the in-phase and quadrature signals using an adder 4019, and amplifying the power of the sum signal using a power amplifier 4020. The RF signal 141 obtained as a result of processing in block 401 is transmitted further to the antenna module 5 through an RF port, such as one from RF ports 14 - 15.

The transceiver unit 4 also generates a service sinusoidal signal at an intermediate and/or carrier frequency using a generator 4017 and separating the generated service sinusoidal signal into in-phase and quadrature components using a phase divider 4018.

Parameters for processing transmitted signals, such as filter characteristics, carrier and/or intermediate frequency values, bandwidth of transmitted signals, digitization frequency of transmitted signals, etc., are set using configuration information coming from processor 2 through control port 25.

In fig. 8 shows an example implementation of receiver channel 411 in accordance with one embodiment of the present invention. Receiver channel 41 1 receives an RF signal 143 from the antenna module 5 through an RF port, such as one of the RF ports 14 - 15. The received RF signal 143 is amplified by a low noise amplifier 4119 and supplied to mixers 41 15 and 4116 for transfer to intermediate and/or fundamental (video) frequency, as well as for highlighting the in-phase and quadrature components of the received analog signals. The in-phase and quadrature components of the analog signal are then subjected to further processing, including filtering using low-pass filters 4113 and 4114, respectively. Further processing of the filtered in-phase and quadrature components of the analog signal involves conversion to digital form using analog-to-digital converters (ADCs) 4111 and 4112, respectively. The result is an in-phase component 1230 and a quadrature component 1231 of the received digital signal 123.

The transceiver unit 4 also generates a service sinusoidal signal at an intermediate and/or carrier frequency using generator 4117 and separating the generated service sinusoidal signal into in-phase and quadrature components using a phase divider 4118. In one embodiment, generators 4017 and 4117 can be configured as separate devices. In another embodiment, generators 4017 and 4117 may technically be the same device.

It should also be understood that although oscillator 4017 and phase divider 4018 are shown as being part of a transmitter channel, and oscillator 4117 and phase divider 41 18 are shown as being part of a receiver channel, the transmit/receive unit 4 may be configured such that one oscillator 4017 and one phase divider 4018 are used to provide overhead to multiple transmitter channels, such as transmitter channels 401 and 402, and one oscillator 4117 and one phase divider 4118 are used to provide overhead to multiple receiver channels, such as receiver channels 411 and 412 .

Parameters for processing received signals, such as filter characteristics, carrier and/or intermediate frequency values, bandwidth of received signals, digitization frequency of received signals, etc., are set using configuration information coming from processor 2 through control port 25.

In fig. 9 is a block diagram of an antenna module 5 in accordance with one embodiment of the present invention. The antenna module 5 is connected to the multi-channel transceiver unit 4 via NAAR RF ports 14 - 15, as well as to the processor 2 via control port 26. In the embodiment of the present invention shown in FIG. 9, antenna module 5 consists of N _A AR beamforming units (PDN) 51 - 52, each of which is connected to one of the NAAR radio frequency ports 14 - 15, as well as N _A AR antenna arrays 61 - 62 connected to N _A AR of FDN blocks 51 - 52 in such a way that one grid is connected to one FDN block.

It should be understood that although in the embodiment of the present invention shown in FIG. 9, the antenna module 5 contains two antenna arrays 61 and 62 and two FDN units 51 and 52; the range of possible embodiments of the invention is not limited to these values. Thus, in other embodiments of the invention, the value of N _A AR may be greater than two, that is, the antenna module 5 may contain more than two antenna arrays and, accordingly, more than two FDN units connected to these arrays, one FDN unit per antenna array.

Each of the NAAR blocks FDN 51 - 52 exchanges through one of the NAAR radio frequency ports 14 - 15 with the multi-channel transceiver unit 4 one of the N _A AR transmitted signals 141 - 142 and one of the NAAR received signals 143 - 144. For example, the FDN block 51 through the radio frequency port 14 exchanges with the transceiver unit 4 transmitted signals 141 and received signals 143, and the FDN unit 52 through the radio frequency port 15 exchanges with the transceiver unit 4 transmitted signals 142 and received signals 144.

In the embodiment of the present invention shown in FIG. 9, the FDN block 51 contains a radio frequency (RF) direction switch transmit-receiver 515, power divider 510 and NAE of RF signal processing circuits 511 - 514, where N _AE is an integer greater than or equal to two, connected to N _A E antenna elements 611 - 614 of antenna array 61 so that one RF circuit processing is connected to one antenna element. In this embodiment, the FDN unit 52 includes an RF transmit/receive direction switch 525, a power divider 520, and N _A E RF signal processing circuits 521 - 524 coupled to N _{A E} antenna elements 621 - 624 of antenna array 61 such that one RF circuit processing is connected to one antenna element. An RF transmit/receive direction switch 515 connects a transmit signal 141 or a received signal 143 to a power divider 510. An RF transmit/receive direction switch 525 connects a transmit signal 142 or a received signal 144 to a power divider 520. RF processing circuits 511 - 514 are configured with the ability to regulate the phases of N _AE signals 161 - 162 between the power division device 510 and antenna elements 611 - 614, and the RF processing circuits 521 - 524 are configured to regulate the phases of N _AE signals 171 - 172 between the power division device 520 and antenna elements 621 - 624 A power divider 510 in the transmit direction divides the signal power from RF switch 515 between RF processing circuits 511 - 514, and in the receive direction it sums the power of the signals from RF processing circuits 511 - 514. A power divider 520 in the transmit direction performs power division signal from the RF switch 525 between the RF processing circuits 521 - 524, and in the receiving direction it sums the power of the signals from the RF processing circuits 521 - 524.

For the sake of simplicity, FIG. 9, part of the RF processing circuits of the FDN blocks 51 and 52 and part of the antenna elements of the antenna arrays 61 and 62 are not shown and are replaced with ellipses. Specifically not shown, but implied to be included within the respective blocks, are the RF processing circuits 512, 513, 522, 523, as well as antenna elements 612, 613, 622, 623. However, it is assumed that these elements are present in the circuit and participate in the operation of antenna module 5.

In the embodiment shown in FIG. 9, the configuration information entering the antenna module 5 from the processor 2 through the control port 26 sets the direction of switching the reception and transmission of the signal by RF switches 515 - 525, as well as the values of phase shifts in the RF processing circuits 511 - 514 and 521 - 524.

In fig. 10 shows an example block diagram of a radio frequency (RF) signal processing circuit 511 in accordance with one embodiment of the present invention. RF processing circuit 511 performs the functions of at least one of RF signal processing circuits 511 - 514 and 521 - 524 in FIG. 9. RF processing circuit 511 in FIG. 10 includes a 551 transmitter controlled phase shifter and a receiver controlled phase shifter

552, providing the ability to adjust the phase of transmitted and received signals, RF transmit-receive direction switch

553 connecting either the transmitter phase shifter 551 or the receiver phase shifter 552 to a power divider such as one of the power dividers 510 - 520, and an RF transmit/receive direction switch 554 connecting either the transmitter phase shifter 551 or the receiver phase shifter 552 to the antenna element, such as one of the antenna elements 61 1 - 614 or 621 - 624.

In the embodiment shown in FIG. 10, the configuration information supplied to the antenna module 5 from the processor 2 through the control port 26 specifies the direction of switching the reception and transmission of the RF signal by RF switches 553 and 554, as well as the values of the phase shifts for the transmitter phase shifter 551 and the receiver phase shifter 552.

It should be understood that the range of possible implementations of the present invention is not limited to the embodiment of the RF processing circuit shown in FIG. 10. Thus, in other embodiments of the present of the invention, RF processing circuit 511 may not include RF switches 553 and 554 for separating received and transmitted signals. For example, in the case of using different frequency bands and/or ranges for transmitting and receiving radio signals by the inventive transceiver device, the role of switches 553 and 554 can be performed by filters with amplitude-frequency characteristics selected to ensure sufficient isolation of received signals from transmitted ones and vice versa. Embodiments of the present invention are possible in which the RF processing circuits 511 are implemented using a single bidirectional phase shifter capable of controlling the phase of both transmitted and received signals, eliminating the need for RF switches 553 and 554. It is also possible for embodiments of the present invention in which independent antenna elements connected to independent phase shifters are used to transmit and receive signals. In these alternative embodiments of the present invention, the PDN units may include separate power dividers for transmit and receive signals, such as power dividers 510 and 520 in FIG. 9 and may also not include RF switches, such as RF switches 515 and 525 in FIG. 9.

The advantages of the present invention over the current state of the art are explained below with reference to FIGS. 11 - Fig.15.

In fig. 11 shows an example of a linear phased array antenna 61, such as one of the arrays 61 - 62 in FIG. 1 and fig. 9, in accordance with one embodiment of the present invention. The antenna array 61 consists of N _A E antenna elements, such as antenna elements 611 - 614, located on the same line 615. In the embodiment shown in FIG. 1 1 adjacent antenna elements, for example, elements 611 and 612 or elements 612 and 613, or elements 613 and 614, are located at a distance d from each other. Each of the antenna elements 611 - 614 is connected to one The RF signal processing circuits of the FDN unit, such as the FDN unit 51 of the antenna module, such as the antenna module 5, as shown in FIG. 9. In one embodiment of the present invention, all antenna elements 611 - 614 radiate in phase a periodic signal with wavelength X. In this embodiment, according to a simplified phased array antenna theory based on a geometric optics model, in the far field at direction 616 located along at an angle of 0 _A from the main axis 619 of the antenna array 61, the signals received from two adjacent elements will differ in phase by the amount Df _A , called the differential phase shift and determined by the formula (r _l

.

In another embodiment of the present invention, the phase shifts imposed by the RF processing circuits are set such that the differential phase shift between adjacent elements of the antenna array is equal to -Df _A . In this case, according to the simplified theory of phased array antennas, based on the model of geometric optics, in the direction 616, constructive summation of signals from all elements of the antenna array 61 is ensured, and the wave front 618 propagates predominantly in the direction 616. In this case, the maximum DP of the antenna array 61, such like DN 31 in Fig. 1 or one of the DNs 31 1 or 312 in FIG. 9 appears to be directed along direction 616. Thus, for receiver 620 located in direction 616, due to the constructive summation of signals from antenna elements 611 - 614, the received signal power is increased. This, in turn, allows the data rate of receiver 620 to be increased and/or the signal-to-noise ratio of receiver 620 to be increased, thereby increasing communication reliability, and/or the communication range to be increased. In other embodiments, different phase shift values for antenna elements 611 - 614 may be set to increase and/or maximize the level of power received by receiver 620 at the antenna array 61 side. It is also known from the theory of antenna systems and phased array antennas that the sharpness of the radiation pattern maximum, expressed as the rate of decay of the radiation power flux density when deviating from the direction of the radiation maximum, is determined by the ratio of the aperture 637 of the antenna array 61 to the wavelength X of the emitted signal. In this case, the larger the aperture of the antenna array 61, the faster the radiation power flux density of the antenna array 61 decreases when deviating from the direction of the maximum, and the sharper the pattern of the antenna array 61 becomes. Due to the decrease in the power flux density when deviating from the direction of the maximum, the pattern ensures a decrease in power interference in directions other than the direction of the maximum pattern of the antenna array 61.

In the third embodiment, the phase shifts specified by the RF processing circuits are set in such a way that the differential phase shift between adjacent elements of the antenna array is equal to 2 lx/? _AE - Df _A , where N _AE is the number of antenna elements in the antenna array 61, and k is a positive integer. In this case, in direction 616 destructive summation of signals from all elements of the antenna array is provided, and the wave front 618 practically does not propagate in direction 616. As a result, the minimum or zero pattern of the antenna array 61, such as pattern 31 in FIG. . 1 or one of the DNs 31 1 or 312 in FIG. 9. Thus, for receiver 620 located in direction 616, due to the destructive summation of signals from antenna elements 611 - 614, the received signal power is significantly reduced or eliminated. This, in turn, eliminates interference to receiver 620 from antenna array 61, thereby improving receiver 620's ability to receive signals from other transmitting devices not shown in FIG. I. In other implementations, other phase shift values for antenna elements 611 - 614 can be set to reduce and/or null the power level received by the receiver 620 from the antenna array 61. When using PPU 1 to exchange information with one or more other PPUs, phase shift values for antenna elements 611 - 614 can be calculated, at least in part, based on the estimated characteristics 221 of the communication channel between PPU 1 and one or more other PPUs.

In fig. 12 shows an example of an antenna system 6 of two antenna arrays 61 and 62 in accordance with one embodiment of the present invention. In this embodiment, the antenna arrays 61 and 62 are located in line at a distance D from each other, with their main axes 619 and 629 oriented parallel along the same direction, as shown in FIG. 12. In this case, each of the antenna elements 611 - 614 of the array 61 is connected to one RF signal processing circuit of the FDN unit, such as the FDN unit 51 of the antenna module, such as the antenna module 5, and each of the antenna elements 621 - 624 of the array 62 is connected to one RF circuit signal processing unit FDN, such as FDN unit 52 of an antenna module, such as antenna module 5, as shown in FIG. 9.

In the embodiment shown in FIG. 12, the phase shifts specified by the RF processing circuits of the FDN block 51 are set in such a way that the wave front 618 created by the antenna array 61 propagates predominantly in the direction 616 at an angle of 0 _A 1 to the main axis 619 of the array 61, and the phase shifts specified by the radio frequency circuits processing unit FDN 52 are set in such a way that the wave front 628 created by the antenna array 62 propagates predominantly in the direction 626 at an angle of 0 _A2 to the main axis 629 of the array 62, directions 616 and 626 are parallel to each other, and the phase shift for the antenna element 611 of the array 61 and antenna element 621 of the array 62 coincide. From the simplified theory of phased array antennas, based on the model of geometric optics, it follows that in such an implementation, wave fronts 618 and 628 emitted respectively antenna arrays 61 and 62, turn out to be shifted in phase relative to each other by the value Af ₀ , determined by the formula

In one embodiment, the transmitted signal 141 arriving at the FDN block 51 is generated by the transmitter channel 401 based on the transmitted digital signal 121 generated by the DSP block 20 (see FIG. 6), and the transmitted signal 142 entering the FDN block 52 is generated by the channel transmitter 402 based on the transmitted digital signal 122 generated by the DSP unit 20 (Fig. 6). In this case, the coefficients of linear combinations performed by the transmitter signal combinator 203 are set in such a way that the digital transmitted signals 121 and 122, generated by the DSP unit 20, differ in phase by the amount -Af ₀ . In this case, according to the simplified theory of phased array antennas, based on the model of geometric optics, in direction 636, constructive summation of signals from all elements of both antenna arrays is ensured, and wave fronts 618 and 628 are combined into a single wave front 638, propagating predominantly in direction 636 ( see Fig. 12). In this case, the maximum DP of the antenna system 6, such as DP 33 in FIG. 1 or one of the DNs 331 and 332 in FIG. 9 appears to be directed along direction 636.

It is also known from the theory of antenna systems and phased array antennas that since antenna system 6 contains more elements than individual arrays 61 or 62, direction 636 provides constructive summation of more transmitted signals from more antenna elements compared to just one array, and therefore the antenna system 6 provides greater gain than each of the arrays 61 or 62 individually. As a result, the speed and/or range and/or reliability of data transmission for the antenna system 6 is greater than for the arrays 61 or 62 separately. In addition, since the total aperture of the antenna system 6 is larger than the aperture each of the arrays 61 or 62 separately, the pattern of the antenna system 6 is sharper compared to the pattern of the grid 61 or the grid 62 separately. This leads to a greater attenuation of the radiation power flux density in directions other than the direction of the maximum radiation pattern of the antenna system 6 compared to antenna arrays 61 or 62 individually. Consequently, at the same level of radiated power and with the same direction of the maximum radiation pattern, the antenna system 6 in directions other than the direction of the maximum radiation pattern creates interference of less power than the antenna arrays 61 or 62 separately.

When using PPU 1 to exchange information with one or more other PPUs, the phase shift values for antenna elements 611 - 614 and 621 - 624 in FIG. 12 may be calculated, at least in part, based on the estimated characteristics 221 of the communication channel between PPU 1 and one or more other PPUs. To implement the digital-analog formation of the DN 33 PPU 1 in the direction of transmitting radio signals, these phase shifts can be set together with setting the coefficients of linear combinations performed by the linear combinator of the transmitter 203. To implement the digital-analog formation of the DN 33 PPU 1 in the direction of receiving radio signals, these phase the shifts can be set in conjunction with the setting of linear combination coefficients performed by the linear combinator of the receiver 213.

In fig. 13 shows an example of an antenna system 6 of two antenna arrays 61 and 62 in accordance with one embodiment of the present invention. In this embodiment, the antenna elements of the arrays 61 and 62 are located in the same plane, and the antenna elements of each of the arrays 61 and 62 are spaced apart along the Z axis of the coordinate system 625 associated with the antenna system 6, the antenna elements 61 and 62 are spaced relative to each other along the Y axis of the coordinate system 625, and the directions of the main axes of both the array 61 and the array 62 are directed along the X axis of the coordinate system 625. Moreover, each of the antenna elements 611 - 614 array 61 is connected to one RF signal processing circuit of an FDN unit, such as an FDN unit 51 of an antenna module, such as antenna module 5, and each of the antenna elements 621 - 624 of array 62 is connected to one RF signal processing circuit of a FDN unit, such as an FDN unit 52 antenna module, such as antenna module 5 as shown in FIG. 9.

In the embodiment shown in FIG. 13, the phase shifts specified by the RF signal processing circuits of the FDN block 51 are set in such a way that the wavefront 618 created by the antenna array 61 propagates predominantly in the direction 616 at an angle of 0 _Ai to the main axis 619 of the array 61 in the XZ plane of the coordinate system 625, and the phase shifts specified by the RF signal processing circuits of the FDN block 52 are set in such a way that the wave front 628 created by the antenna array 62 propagates predominantly in the direction 626 at an angle of 0 _A2 to the main axis 629 of the array 62 in the XZ plane of the coordinate system 625, the direction 616 and 626 are parallel to each other, and the phase shifts for antenna element 611 of array 61 and antenna element 621 of array 62 are the same.

In one embodiment, the transmit signal 141 arriving at the FDN block 51 is generated by the transmitter channel 401 based on the digital transmit signal 121 generated by the DSP unit 20, and the transmit signal 142 entering the FDN block 52 is generated by the transmitter channel 402 based on the digital transmit signal. 122, generated by the DSP block 20. In this case, the weighting coefficients of the transmitter signal combinator 203 are set in such a way that the digital transmitted signals 121 and 122, generated by the DSP block 20, differ in phase by the amount -Df _o . In this case, according to the simplified theory of phased array antennas, based on the model of geometric optics, in the direction 636, which differs from the directions 616 and 626 by the angle 0 _DH in the XY plane of the coordinate system 625, constructive summation of signals from all elements is ensured both antenna arrays, and the wavefronts 618 and 628 are combined into a single wavefront 638, propagating predominantly in the direction 636. In this case, the maximum beam pattern of the antenna system 6, such as beam pattern 33 in FIG. 1 or one of the DNs 331 and 332 in FIG. 9 appears to be directed along direction 636.

It is also known from the theory of antenna systems and phased array antennas that since antenna system 6 contains more elements than individual arrays 61 or 62, direction 636 provides constructive summation of more transmitted signals from more antenna elements compared to just one array, and therefore the antenna system 6 provides greater gain than each of the arrays 61 or 62 individually. As a result, the speed and/or range and/or reliability of data transmission for the antenna system 6 is greater than for the arrays 61 or 62 separately. In addition, since the aperture of the antenna system 6 along the Y axis of the coordinate system 625 is larger than the aperture of each of the arrays 61 and 62 individually, and the aperture of the antenna system 6 along the Z axis of the coordinate system 625 coincides with the apertures of the antenna arrays 61 and 62, the DP of the antenna system 6 is in the XY plane of the coordinate system 625 is sharper than the pattern of the grating 61 or the grating 62 separately, and in the XZ plane of the coordinate system 625 has the same sharpness as the pattern of each of the gratings 61 or 62 separately. This leads to a greater attenuation of the radiation power flux density in directions different in the XY plane of the coordinate system 625 from the direction of the maximum pattern of the antenna system 6 in comparison with the antennas of each of the arrays 61 or 62 separately.

Consequently, at the same level of radiated power and with the same direction of the maximum radiation pattern, the antenna system 6 in directions other than the direction of the maximum radiation pattern creates interference of less power than each of the antenna arrays 61 or 62 separately. When using PPU 1 to exchange information with one or more other PPUs, the phase shift values for antenna elements 611 - 614 and 621 - 624 in FIG. 13 may be calculated, at least in part, based on the estimated characteristics 221 of the communication channel between PPU 1 and one or more other PPUs. To implement the digital-analog formation of the DN 33 PPU 1 in the direction of transmitting radio signals, these phase shifts can be set together with setting the coefficients of linear combinations performed by the linear combinator of the transmitter 203. To implement the digital-analog formation of the DN 33 PPU 1 in the direction of receiving radio signals, these phase the shifts can be set in conjunction with the set of coefficients of linear combinations performed by the linear combinator of the receiver 213.

Industrial applicability

To confirm the feasibility of the proposed PPU, using several antenna arrays, sample 9 PPU 1 was manufactured, operating in the frequency ranges of 2.4 GHz and 5 GHz. The block diagram of the manufactured sample 9 is shown in Fig. 14. In the implemented sample 9 of the PPU 1, the functions of the processor 2, storage 3 and multi-channel transceiver unit 4 are performed by the system-on-module (English, system on module - SoM) ADRV9361-Z7035, supplied by Analog Devices. This system is a Software-Defined Radio (SDR) platform that combines an analog AD9361 (Integrated RF Agile Transceiver) device used as a transceiver unit 4, and a digital Xilinx Z7035 Zynq-7000 device, used as processor 2 and coupled with memory 30, in a small form factor well suited for integration into the final product.

Antenna module 5 was developed as a separate block containing two FDN boards 51 and 52, connected to the radio frequency inputs and outputs of SoM ADRV9361-Z7035 by high-frequency cables 121, 131, 122 and 132. Samples of antenna arrays 61 and 62 are made in the form vertical columns of four dipole antenna elements each, similar to the antenna system 6 in the configuration shown in FIG. 13. Antenna arrays 61 and 62 are located horizontally relative to each other. Each of the antenna elements of the samples of both arrays 61 and 62 is connected to a separate RF signal processing circuit of the FDN blocks 51 and 52, respectively. Each of the RF processing circuits of the antenna module sample 9 PPU 1 has two phase shifters - one for receiving and one for transmitting the signal, as shown in Fig. 10. The phase adjustment step of the transmitter phase shifter and the receiver phase shifter is 22.5 degrees, providing 16 possible phase shift values ranging from 0 to 360 degrees. Thus, the pattern of the antenna system in the vertical (angular) plane was mainly determined by the settings of the FDN blocks 51 and 52 of the antenna module 5, while the pattern in the horizontal (azimuth) plane was determined mainly by the parameters of the signal combiners 203 and 213 of the DSP block 20, made in the programmable logic 29 of the Xilinx Z7035 Zynq-7000 digital device.

Control of sample 9 of PPU 1 was carried out using graphical user interface (GUI) software 8 running on a personal computer 86 and allowing the user to configure the parameters of the DSP algorithms 20 using the DSP configuration block 82, reception parameters - transmitting unit 4 using analog processing configuration block 83, parameters for the formation of patterns by antenna module 5 using antenna module configuration block 84. GUI 8 software also allows the user to save settings using the block 85 for saving configuration settings and process the results of experiments using the block 81 for processing and outputting measurement results.

The antenna system configuration implemented in sample 9 PPU 1 is well suited for use at a base station of a cellular system connection, an example of which is shown in Fig. 15. As shown in FIG. 15, cellular communication system 700 may include a base station 701 surrounded by multiple user devices, such as devices 702 and 703. The locations of user devices 702 and 703 relative to base station 701 are characterized by distances 712 and 713 from user devices 702 and 703 to antenna system 6 base station 701, heights 722 and 723 of devices 702 and 703, respectively, above ground level, as well as elevation plane angles, such as angle 715 between direction 713 and the ground, and azimuth plane angles, such as angle 716 between axis 710 projection 711 antenna system 6 on the earth's surface and projection 714 on the earth's surface of the direction 712 to the user device 702.

In one embodiment, the antenna system 6 of base station 701 is configured to direct the maximum of its beam pattern, such as beam pattern 33 in FIG. 1 or one of the DN 331 and/or DN 332 in FIG. 9 to user device 702. In such an embodiment, user device 702 receives increased signal power compared to other peak directions of antenna system 6. As explained above with reference to FIGS. And - fig. 13, in such an implementation, communication between the base station 701 and the user device 702 can be organized at distances greater than other directions of the antenna system 6 beam pattern maximum and/or communication between the base station 701 and the user device 702 can be organized at speeds greater than compared to other antenna system 6 pattern peak directions and/or communication between base station 701 and user device 702 may provide fewer transmission errors compared to other antenna system 6 pattern peak directions.

In another embodiment, the antenna system 6 of the base station 701 generates two patterns, such as pattern 331 and/or pattern 332 in FIG. 9. At the same time at least one DN, for example DN 331 in FIG. 9 is directed to user device 702, and at least another AP, such as AP 332 in FIG. 9 is directed to user device 703. In this embodiment, base station 701 simultaneously sends first and second signals to two user devices 702 and 703 using DPs 332 and 331, respectively. directed to user device 702, user device 702 receives the first signals with minor interference from the second signals. Likewise, because the minimum DP 332 is directed and the minimum DP 331 is not directed at the user device 703, the user device 703 receives the second signals with little interference from the first signals. This makes it possible, using the antenna system 6, to simultaneously transmit two signals in the same frequency band, thereby increasing the overall data transmission rate in the cellular communication network 700.

Preliminary comparative modeling of communication systems, such as the 700 cellular system, with base stations equipped with either 4-array antenna systems of 4 elements each in a (1 x 4) x (4 x 1) configuration, or fully adaptive two-dimensional 16-element antennas arrays (4x4), or adaptive one-dimensional 4-element arrays (1 x4), showed that base stations with antenna systems of several arrays in a (1x4)x(4x1) configuration are no more than 5% inferior in data transfer speed base stations with fully adaptive two-dimensional 16-element antenna arrays (4x4) with the same number and geometric arrangement of antenna elements.

On the other hand, according to the simulation results, base stations with antenna systems of several arrays in the (1 x 4) x (4 x 1) configuration provide a gain in data transmission speed of up to 25% compared to base stations with one-dimensional adaptive arrays (1 x4). Obviously, the increase in data transfer rate is due to the larger aperture of the multi-array antenna system in the (1 x 4) x (4 x 1) configuration compared to the aperture of a one-dimensional adaptive array (1 ^x 4). Moreover, in this comparison, both antenna systems use the same number of radio frequency circuits, which practically equalizes the cost of manufacturing antenna systems of both types. The simulation also showed that under the considered communication conditions, in order to achieve a 25% increase in transmission speed for a communication system with adaptive antenna arrays (1 ^x 4), the transmitter power would have to be increased fourfold, which confirms the high efficiency of the design of the proposed PPU.

In the course of an experimental study of sample 9 of a software-defined transceiver device 1 with an antenna system of several antenna arrays, measurements of the radiation pattern formation characteristics were carried out by the developed FDN blocks 51 and 52 and the algorithms for combining signals 203 and 213 in the DSP PPU block, described above with reference to FIG. . 11 - 13.

In the first series of experiments, measurements were made of the maximum gain of the antenna subarrays 61 and 62 as a function of the angle between the direction of radiation 616 and the main axis 619 of the antenna array 61, as shown in FIG. 11. Using the example of the antenna array 61 and the FDN block 51: in the FDN block 51, the required distribution of phase shifts was set for the antenna elements 611 - 614 of the antenna array 61 in accordance with the selected direction 616 of signal radiation. Then, in this direction, the gain of the antenna subarray 61 was measured. In the range of elevation angles from -45 to 45 degrees, the calculated value of the gain of the antenna array 61 was from 5.5 to 6 dB relative to a single antenna element, similar to antenna elements 611 - 614 and emitting a signal with just as full power, like the entire array 61. In this case, the measured value of the gain of the antenna array 61 turned out to be less than the calculated value by an amount not exceeding 0.5 dB over the entire specified range of elevation angles. A similar experiment was carried out for the antenna array 62 connected to the FDN unit 52, during which similar results were obtained.

In the second series of experiments, measurements were made of the gain of the antenna system 6, consisting of two subarrays 61 and 62, 4 elements each, located as shown in Fig. 13 and connected to the FDN blocks 51 and 52, as shown in FIG. 9. At the same time, zero phase shifts were set in the FDN blocks 51 and 52, at which the directions of the radiation maxima 616 and 626 are parallel to the main axes 619 and 629 of the antenna arrays 61 and 62, respectively. Then, using algorithms for combining signals 203 and 213, the direction of the maximum radiation 636 of the entire antenna system 6 was deviated in the azimuthal plane by an angle ranging from -45 to +45 degrees, and in this direction the gain of the antenna system 6 was measured. The calculated value of the gain antenna system in this range of angles of deviation of the direction of radiation 636 was from 8.5 to 9 dB relative to a single antenna element, similar to antenna elements 611 - 614 and emitting a signal with the same total power as antenna system 6. In this case, the measured gain of the antenna system 6 turned out to be less than the calculated value by an amount not exceeding 0.7 dB over the entire specified range of azimuthal angles.

The results of the first and second series of experiments show that by using a single 4-element array antenna, such as Array 61, at one end of a data link, it is possible to increase the signal power received by a remote receiver by up to 6 dB, allowing for increased range in free space communication up to 2 times without loss of quality and/or increase the data transfer rate by approximately 1 bit/s/Hz, and by using an antenna system 6 of two 4-element arrays it is possible to increase the received signal power by up to 9 dB, which allows you to increase the communication range to 2.8 in free space times without loss of quality and/or increase the data transfer rate by approximately 1.5 bps/Hz. By using 4-element antenna arrays at both ends of the communication link, it is possible to increase the free-range communication range by up to 4 times without loss of communication quality and/or increase the data transfer rate by approximately 2 bps/Hz. When using antenna systems of 6 of two 4-element arrays each at both ends of the data transmission line, it is possible to increase the communication range up to 8 times and/or increase the data transmission rate to 3 bit/s/Hz.

In the third series of experiments, measurements were taken of the accuracy of formation of the pattern 33 of the antenna system 6 consisting of two subarrays of 4 elements each, as shown in Fig. 13, in multi-stream data transfer mode. For this purpose, the phase shifts in the FDN blocks 51 and 52 were set so as to direct the radiation of the gratings 61 and 62 along their axes 619 and 629, respectively. Then, using algorithms for combining signals 203 and 213, two patterns were formed, such as patterns 331 and 332. For the experiment, two mutually orthogonal sequences of samples of signals 204 and 205 were generated, so that the receiver could tune to one of them and completely exclude the second using time processing algorithms. Using utility software, these sequences were directly fed to the inputs of the signal combiner of the transmitter 203, bypassing the transmitter DSP pipelines. As a result of combining digital signals 204 and 205 by the signal combiner of the transmitter 203, digital signals 121 and 131 were generated, which were simultaneously sent to the transceiver unit 4 and further, through RF ports 14 and 15, to the antenna module 5. In this case, each of the arrays 61 and 62 emitted a weighted sum of signals from both sequences 204 and 205. The measured value was the ratio of the powers of the signals received by the same receiver from each of the sequences 204 and 205. During the experiments it was found that with the calculated ratio of the powers of the received signals up to 6 dB, the deviation of the measured value from the calculated one did not exceed 0.2 dB, and with a calculated power ratio of up to 20 dB (at the minimum DP for one of the sequences), the deviation of the measured value from the calculated value was less than 3 dB. This deviation is explained by errors in the manufacture of antenna arrays 61 and 62 and a slight discrepancy in the gains of the FDN blocks 51 and 52 of the antenna module 5 PPU.

The results of the third series of experiments show that with the help of antenna system 6, consisting of two arrays connected to independent channels of analog (channels 401 and 402 in Fig. 6) and digital (channels 201 and 202 in Fig. 3) signal processing, in free space, it is possible to up to 2 times the data rate of a communications system, such as communications system 700 in FIG. 15, by simultaneously transmitting data to two users in the same frequency band.

Thus, even on a pre-fabricated prototype, fairly high accuracy indicators of pattern formation were obtained in both the vertical and horizontal planes, which confirms the feasibility of the proposed PPU and the achievability of the characteristics of range, speed and communication reliability predicted by theoretical calculations and numerical modeling.

Claims

Claim

Clause 1. A software-defined transceiver device containing a processor with a digital signal processing (DSP) unit included in it, configured for digital processing of transmitted and/or received signals, a control and configuration unit, as well as a storage unit connected to the processor, configured for storage of instructions for the processor, a multi-channel transceiver unit connected to the processor and configured for analog and/or radio frequency processing of transmitted and/or received signals, characterized in that the device additionally contains arrays of antenna elements, beamforming units connected to the arrays antenna elements, and to a multi-channel transceiver unit, and to a processor, wherein the multi-channel transceiver unit comprises ports, each of which is connected to one beamforming unit, and each beamforming unit is also connected to one array of antenna elements, and the processor is configured to change the radiation pattern of the arrays of antenna elements. Claim 2. The device according to claim 1, characterized in that the beamforming unit contains a power division device configured to divide the power of transmitted signals between antenna elements of the array connected to the beamforming unit and/or to sum the power of signals received from the elements an antenna array connected to a beamforming unit, as well as a radio frequency processing circuit for received and/or transmitted signals, each circuit connected to a power division device and to one antenna element of the array, which is connected to this beamformer. Clause 3. The device according to claim 2, characterized in that at least one radio frequency processing circuit of received and/or transmitted signals is configured to adjust the phase of received and/or transmitted signals using configuration information coming from the processor

Clause 4. The device according to claim 1, characterized in that a DSP, including a digital processing unit for transmitted signals, in which a combinator of transmitter signals is connected in series with the transmitter DSP pipeline, and a digital processing unit for received signals, in which a combinator is connected in series with the receiver DSP pipeline signals of the receiver, also contains a block for estimating the characteristics of the communication channel, connected to the block for digital processing of received signals, and a block for calculating the directional patterns, connected to the block for estimating the characteristics of the communication channel, the operating parameters of which are determined by the configuring and status information coming from the algorithms of the control and configuration block, executed by the processor.

Clause 5. The device according to claim 1, characterized in that the multi-channel transceiver unit is configured to process signals containing in-phase and quadrature components.

Clause 6. The device according to claim 1, characterized in that the processor is configured to exchange with the multi-channel transceiver unit at least the first and second signals having in-phase and quadrature components, for processing, respectively, the first and second channels of the multi-channel reception -transmitting unit, wherein the in-phase and quadrature components of the second signal are a linear combination of the in-phase and quadrature components of the first signal.

Clause 7. The device according to claim 1, characterized in that the processor is configured to process at least one digital signal having in-phase and quadrature components, the processor is also configured to exchange with the multi-channel transceiver unit at least the first and second signals having in-phase and quadrature components, for processing, respectively, by the first and second channel of the multi-channel transceiver unit, wherein the in-phase and quadrature components of the first signal are a first linear combination of the in-phase and quadrature components of the at least one digital signal, and the in-phase and quadrature components of the second signal are a second linear combination of the in-phase and quadrature components of the at least one digital signal.

Clause 8. The device according to claim 1, characterized in that the processor is configured to process at least one digital signal having in-phase and quadrature components, the processor is also configured to communicate with a multi-channel transceiver unit, at least the first and second signals having in-phase and quadrature components for processing, respectively, by the first and second channels of the multi-channel transceiver unit, wherein the in-phase and quadrature components of at least one digital signal are a linear combination of the in-phase and quadrature components of at least first and second signals.