WO2023195265A1

WO2023195265A1 - Sensor device

Info

Publication number: WO2023195265A1
Application number: PCT/JP2023/006902
Authority: WO
Inventors: 恭輔山田
Original assignee: ソニーセミコンダクタソリューションズ株式会社
Priority date: 2022-04-08
Filing date: 2023-02-27
Publication date: 2023-10-12

Abstract

The present invention provides a sensor device comprising: a semiconductor substrate including a wiring layer and provided with a first Cu electrode electrically connected to the wiring layer; an image sensor chip which is placed on the semiconductor substrate and in which a pixel array having photoelectric conversion elements arranged in an array form is formed; and a semiconductor integrated circuit chip placed on the semiconductor substrate in parallel with the image sensor chip. Each of the image sensor chip and the semiconductor integrated circuit chip is provided with a second electrode bonded to the first Cu electrode on a surface opposed to the semiconductor substrate. Further, the image sensor chip and the semiconductor integrated circuit chip are configured such that the heights of upper end surfaces thereof are aligned.

Description

sensor device

The present technology relates to a semiconductor device, and particularly relates to a sensor device including an image sensor.

2. Description of the Related Art Semiconductor devices having a multi-chip structure in which a plurality of IC chips are provided on one silicon substrate and packaged are known. For example, a semiconductor device manufactured by stacking a plurality of IC chips on a silicon wafer, dicing them into chips, and packaging them is called a COW (Chip on Wafer). A COW type sensor device is formed by juxtaposing an image sensor chip on which a photoelectric conversion element array (pixel array) is formed and a logic chip on which a logic circuit is formed, for example, on a silicon substrate.

For example, Patent Document 1 listed below discloses a sensor chip that is a back-illuminated CMOS solid-state image sensor that is provided with an imaging pixel section and a signal processing section that is provided with a peripheral circuit section that performs signal processing etc. on an interposer (intermediate substrate). This disclosure discloses a semiconductor image sensor module in which a chip is mounted on a support substrate (see FIG. 42). In the semiconductor image sensor module, the sensor chip and the signal processing chip are electrically connected to a land formed by exposing a part of the wiring surface of the interposer through a protruding electrode (microbump).

Japanese Patent Application Publication No. 2013-179313

In semiconductor devices such as those mentioned above, the use of interposers makes it possible to form fine wiring, but electrical connections using microbumps provided on the interposer require longer wiring lengths, resulting in higher resistance and capacitance. Therefore, there was a problem that the wiring impedance was affected. In particular, with the recent miniaturization and speeding up of semiconductor devices, even a slight increase in resistance or capacitance has a non-negligible effect on wiring impedance. This was a hindrance to increasing communication speeds.

Additionally, electrical connections using microbumps require an area of at least 10 μm or more in the current semiconductor manufacturing process, making it difficult to increase the integration density of wiring. In addition, in order to make electrical connections using microbumps, it was necessary to fill the space between the semiconductor substrate and the chips stacked there with an underfill resin. When filling with such underfill resin, a blocking structure (so-called dam structure) is formed to prevent the resin being dripped and filled from spreading, resulting in an increase in the chip size of the final product, resulting in a single chip. There is a problem in that the number of products that can be produced from a wafer is reduced, and as a result, the yield is reduced.

Furthermore, when an interposer and a chip are bonded via a microphone bump under flip-chip mounting technology, there is a problem in that it is difficult to thin the interposer by back grinding (BGR) in the manufacturing process. Ta.

Additionally, due to the thermal constraints of the color filter and on-chip lens used in the image sensor chip, when bonding the image sensor chip on which these are formed to the interposer, bonding is performed via microbumps. Ta. On the other hand, if the heights of the top surfaces of the image sensor chip and other chips placed on the interposer are not the same, there is a problem that it is difficult to form color filters and on-chip lenses due to the manufacturing process. Was.

Therefore, the present disclosure aims to suppress the influence of wiring impedance and provide a semiconductor device that can operate at high speed.

Specifically, the present disclosure aims to provide a semiconductor device in which a semiconductor substrate (for example, an interposer substrate) and a plurality of chips arranged thereon can be connected by a new electrical connection structure in place of microbumps. purpose.

Another object of the present disclosure is to provide a semiconductor device that makes it possible to reduce the size of the entire packaged chip by suppressing the size of the chip formed on the semiconductor substrate.

Further, the present disclosure aims to provide a semiconductor device having a new electrical connection structure that allows BGR of various chip substrates in a semiconductor manufacturing process.

Another object of the present disclosure is to provide a semiconductor device having a new electrical connection structure that can increase the wiring density between a semiconductor substrate and a chip placed thereon.

The present technology for solving the above problems is configured including the technical features shown below.

The present technology according to a certain aspect includes a semiconductor substrate including a wiring layer and having a first Cu electrode electrically connected to the wiring layer, and photoelectric conversion elements placed on the semiconductor substrate and arranged in an array. The sensor device includes the image sensor chip having a pixel array formed thereon, and a semiconductor integrated circuit chip disposed on the semiconductor substrate in parallel with the image sensor chip. Each of the image sensor chip and the semiconductor integrated circuit chip includes a second electrode bonded to the first Cu electrode on a surface facing the semiconductor substrate. Further, the image sensor chip and the semiconductor integrated circuit chip are configured so that the heights of their upper end surfaces are the same.

Furthermore, the present technology according to a certain aspect can be understood as a method for manufacturing the above-mentioned sensor device.

Note that in this specification and the like, the term "means" does not simply mean physical means, but also includes cases in which the functions of the means are realized by software. Further, the function of one means may be realized by two or more physical means, or the functions of two or more means may be realized by one physical means. In addition, a "system" refers to a logical collection of multiple devices (or functional modules that realize a specific function), and whether each device or functional module is in a single housing or not. There is no particular question.

Other technical features, objects, and effects or advantages of the present technology will be made clear by the following embodiments described with reference to the attached drawings. The effects described in this disclosure are merely examples and are not limiting, and other effects may also be present.

FIG. 1 is a plan view showing an example of a schematic structure of a sensor device according to an embodiment of the present technology. FIG. 2 is a partial cross-sectional view showing an example of a schematic structure of a sensor device according to an embodiment of the present technology. FIG. 3 is a partial cross-sectional view showing a first modified example of the schematic structure of the sensor device according to an embodiment of the present technology. FIG. 4 is a partial cross-sectional view showing a second modification of the schematic structure of the sensor device according to an embodiment of the present technology. FIG. 5 is a partial cross-sectional view showing a second modification of the schematic structure of the sensor device according to an embodiment of the present technology. FIG. 6 is a partial cross-sectional view showing a fourth modification of the schematic structure of the sensor device according to an embodiment of the present technology. FIG. 7A is a diagram for explaining an example of a method for manufacturing a sensor device according to an embodiment of the present technology. FIG. 7B is a diagram for explaining an example of a method for manufacturing a sensor device according to an embodiment of the present technology.

Hereinafter, embodiments of the present technology will be described with reference to the drawings. However, the embodiments described below are merely examples, and there is no intention to exclude the application of various modifications and techniques not specified below. The present technology can be implemented with various modifications (for example, by combining the embodiments) without departing from the spirit of the technology. In addition, in the description of the drawings below, the same or similar parts are denoted by the same or similar symbols. The drawings are schematic and do not necessarily correspond to actual dimensions or proportions. The drawings may also include portions that differ in dimensional relationships and ratios.

(Sensor device configuration)
FIG. 1 is a plan view showing an example of a schematic structure of a sensor device according to an embodiment of the present technology. Moreover, FIG. 2 is a partial sectional view showing an example of a schematic structure of a sensor device according to an embodiment of the present technology.

As shown in these figures, the sensor device 1 is an LSI chip in which a plurality of semiconductor chips (hereinafter referred to as "chips") 20 including an image sensor chip 20(1) are juxtaposed and packaged on an interposer substrate 10. It is. The sensor device 1 of the present disclosure may be, for example, a COW type semiconductor device. The interposer substrate 10 is a semiconductor substrate that includes a support substrate mainly made of silicon (Si), for example, and a wiring layer 11 including a wiring pattern formed thereon. As shown in other examples, interposer substrate 10 may be replaced with a logic circuit board that includes an integrated circuit layer. Several electrode pads 30 are formed on the periphery of the interposer substrate 10 . For example, wire bonding is formed on the electrode pad 30.

The interposer substrate 10 and the plurality of chips 20 placed thereon are electrically connected by bonding between copper (Cu) electrodes formed on their respective bonding surfaces. Thereby, the plurality of chips 20 arranged in parallel on the interposer substrate 10 are electrically connected via the wiring layer 11 of the interposer substrate 10. In this disclosure, such a connection structure in which Cu electrodes are joined together may be referred to as a "Cu--Cu connection structure." Such a Cu--Cu connection structure can suppress wiring impedance lower than the conventional connection structure using microbumps, and enables faster operation of the sensor device 1. For convenience, hereinafter, the Cu electrode on the interposer substrate 10 side will be referred to as the first Cu electrode 12, and the Cu electrodes on the multiple chips 20 side will be referred to as the second Cu electrode 23.

Each of the plurality of chips 20 is a substrate on which various semiconductor integrated circuits are formed. In the present disclosure, the plurality of chips 20 includes an image sensor chip 20(1) and an associated semiconductor integrated circuit chip 20(n) (n is a positive number used to distinguish each chip). be done. The semiconductor integrated circuit chip 20(n) includes, for example, a PLL chip that generates a clock, a memory chip that stores data, a signal processing chip that performs arithmetic processing such as distance measurement, and a communication chip that enables connection with the outside. It can be at least one of an interface chip and a light emitting element chip that emits distance measuring light. In this example, it is assumed that among the plurality of chips 20, the chips 20(n) other than the image sensor chip 20(1) are memory chips 20(2). In the present disclosure, each of the plurality of chips 20 is configured such that the heights of the upper end surfaces thereof are the same. Here, "the heights of the upper end surfaces are the same" means that the heights of the substantial semiconductor material surfaces of each chip 20 are the same or the same. For example, in the case of the image sensor chip 20(1), the upper end surface is a surface that does not include the color filter 21 or on-chip lens 22 formed on the semiconductor material surface.

The image sensor chip 20(1) is a semiconductor substrate that includes a pixel array in which a plurality of light receiving elements (photoelectric conversion elements) forming pixels that receive incident light are arranged in an array. Each of the plurality of light receiving elements is, for example, a SPAD, but is not limited to this. Each SPAD is a semiconductor element that detects incoming light (photons), converts carriers generated thereby into electrical signals using avalanche multiplication, and outputs the electrical signals. The image sensor chip 20(1) may have a light-receiving element that converts visible light (RGB light) into an electrical signal, or converts invisible light (for example, infrared light) into an electrical signal. It may also consist of something that converts into .

Further, as shown in FIG. 2, the image sensor chip 20(1) of the present disclosure includes a sensor substrate 20(1)a on which a pixel array is formed, and a logic substrate on which a logic circuit for controlling the pixel array is formed. 20(1)b is a stacked image sensor chip. The sensor board 20(1)a and the logic board 20(1)b each have

wiring layers

24a and 24b, and are stacked by bonding the wiring layers 24a and 24b to each other. Further, the image sensor chip 20(1) may be, for example, a back-illuminated image sensor that receives light on its back surface (top surface). A color filter 21 and an on-chip lens 22 are laminated on the upper surface of the image sensor chip 20(1) (that is, the back surface of the sensor substrate 20(1)a).

Furthermore, the logic board 20(1)b includes, for example, a pixel control circuit that controls the operation of each pixel, a front end circuit that realizes quenching and recharging of each pixel, and the like. Alternatively, the logic board 20(1)b may include a signal processing circuit.

Further, several second Cu electrodes 23 are formed on the lower surfaces of the plurality of chips 20 (that is, the surfaces where each chip 20 faces the upper surface of the interposer substrate 10). The second Cu electrode 23 of the image sensor chip 20(1) is connected to the logic board 20(1)b through a via hole 25 (through electrode) formed through the logic board 20(1)b, for example. It is connected to the wiring layer 24b. The second Cu electrodes 23 of the plurality of chips 20 are joined to the first Cu electrodes 12 formed on the upper surface of the interposer substrate 10 to form a Cu--Cu connection structure. Thereby, the plurality of chips 20 are electrically connected via the wiring layer of the interposer substrate 10.

(Modified example)
Here, a modification of the chip structure of the sensor device 1 of the present disclosure will be described. In the above example, the sensor device 1 has a configuration in which the image sensor chip 20 (1) and the memory chip 20 (2) are placed on the interposer substrate 10 as an interposer substrate, but the configuration is not limited to this, and the following will be described. As described in , various configurations are possible.

FIG. 3 is a partial cross-sectional view showing a first modification of the schematic structure of the sensor device according to an embodiment of the present technology. In the figure, a sensor device 1 includes a plurality of chips 20, such as an image sensor chip 20 (1), a memory chip 20 (2), and a signal processing chip 20 (3), mounted on an interposer substrate 10. Illustrated. In the sensor device 1 shown in the figure, the plurality of chips 20 and the interposer substrate 10 are also electrically connected by a Cu--Cu connection structure. Thereby, the wiring impedance is kept low and the sensor device 1 can operate at high speed. Further, in this example, an antireflection film 26 is formed on each surface or a portion of the memory chip 20(2) and the signal processing chip 20(3).

The anti-reflection film 26 prevents reflected light from light irradiated onto another chip 20(n) arranged in parallel to the image sensor chip 20(1) from entering the image sensor chip 20(1). The antireflection film 26 is made of the same material as the blue color filter 21, for example. The blue color filter 21 transmits blue wavelength light and absorbs red and green wavelength light. Therefore, although the blue light passes through the blue color filter 21 and reaches the other chip 20(n), it is easily absorbed by the silicon that is the constituent material of the other chip 20(n), which may affect its operation. There is no problem. Such an anti-reflection film 26 is formed, for example, on the other chip 20(n) at the same time as the process of forming the color filter 21 on the image sensor chip 20(1). That is, as described above, in the sensor device 1 of the present disclosure, since the height of the top surface of the image sensor chip 20(1) and the other chips 20(n) are the same, the formation of the antireflection film 26 is The process for forming the color filter 21 can be used in this manner.

Alternatively, the antireflection film 26 may be formed by stacking color filters 21 of each color (that is, RGB) using the process of forming the color filters 21. Thereby, the anti-reflection film 26 absorbs light of a specific color wavelength by the color filter 21 of each color, so that it is possible to prevent light from entering the image sensor chip 20(1).

Furthermore, as another example, the antireflection film 26 may be formed of a tungsten (W) compound material with low reflectance, for example. In the sensor device 1 as disclosed herein, tungsten is used to form optical black pixels for pixel output calibration. Therefore, the tungsten antireflection film 26 can be formed using the optical black pixel formation process.

FIG. 4 is a partial cross-sectional view showing a second modification of the schematic structure of the sensor device according to an embodiment of the present technology. In the figure, a sensor device 1 includes a plurality of chips 20, such as an image sensor chip 20 (1), a memory chip 20 (2), and a signal processing chip 20 (3), mounted on an interposer substrate 10. Illustrated. Further, in this example, an antireflection film 26 is filled between each chip 20. The antireflection film 26 is made of, for example, a resin composition material. Such an antireflection film 26 is used in a semiconductor manufacturing process, for example, to prevent uneven coating of resist resin in a lithography process, and is not removed.

In the sensor device 1 shown in the figure, the plurality of chips 20 and the interposer substrate 10 are also electrically connected by a Cu--Cu connection structure. Thereby, the wiring impedance is kept low and the sensor device 1 can operate at high speed.

FIG. 5 is a partial cross-sectional view showing a second modification of the schematic structure of the sensor device according to an embodiment of the present technology. In the figure, a sensor device 1 is illustrated in which an image sensor chip 20(1) and a light emitting element chip 20(4) are placed as a plurality of chips 20 on an interposer substrate 10. The light emitting element chip 20 (4) is, for example, a vertical cavity surface emitting laser (VCSEL) chip that emits light for distance measurement. The LSI chip in which the image sensor chip 20(1) and the light emitting element chip 20(4) are integrated in this way is known as a distance measurement sensor device.

FIG. 6 is a partial cross-sectional view showing a fourth modification of the schematic structure of the sensor device according to an embodiment of the present technology. The figure shows an example of the sensor device 1 in which the semiconductor substrate is a logic substrate 40 instead of the interposer substrate 10. That is, the sensor device 1 of this example includes a logic board 40 and a plurality of chips 20 mounted on the logic board 40. As described above, the plurality of chips 20 are the image sensor chip 20(1) and other chips 20(n) related thereto. The logic board 40 and the plurality of chips 20 mounted thereon are electrically connected by the above-mentioned Cu--Cu connection structure. Thereby, the wiring impedance is kept low and the sensor device 1 can operate at high speed.

The image sensor chip 20(1) may be of a laminated type or may be of a single layer type including only the sensor substrate. In the case of the stacked image sensor chip 20(1), a part of the logic circuit of the logic board 20(1)b described above may be formed on the logic board 40. The image sensor chip 20(1) is electrically connected to the logic circuit in the logic board 40, the memory chip 20(2), and the signal processing chip 20(3) via a Cu-Cu connection structure with the logic board 40. be done.

(Method for manufacturing sensor device)
Next, a method for manufacturing the sensor device 1 will be described. 7A and 7B are diagrams for explaining an example of a method for manufacturing a sensor device according to an embodiment of the present technology.

First, a wafer W1 on which the sensor substrate 20(1)a is formed and a wafer W2 on which the logic substrate 20(1)b is formed are respectively produced (FIG. 7(a)). A known semiconductor manufacturing process can be used to fabricate the wafers W1 and W2.

Next, the wafer W1 and the wafer W2 are bonded together in a predetermined positional relationship so that their wiring layers face each other (FIG. 7(b)). Let W be a wafer in which the wafer W1 and the wafer W2 are integrated. In addition, in the example shown in FIG. 2(b), one surface of the logic board 20(1)b (the surface opposite to the bonded surface) is thinned by a BGR (back grinder), and furthermore, via holes are formed. 25 is formed, and a second Cu electrode 23 is formed.

Next, the wafer W is diced after a temporary protective sheet is pasted thereon, thereby obtaining individualized stacked image sensor chips 20(1) (FIG. 7(c)). ). Note that although not shown in the figure, other chips other than the image sensor chip 20(1) among the plurality of chips 20 are also manufactured by the same process. Here, it is assumed that the other chips are the memory chip 20(2) and the signal processing chip 20(3).

Next, the image sensor chip 20(1) that has been separated into pieces is placed on the interposer substrate 10 and combined together with the memory chip 20(2) and the signal processing chip 20(3) (FIG. 7(d) ). At this time, the second Cu electrode 23 of each chip 20 is bonded to the first Cu electrode 12 of the interposer substrate 10 by, for example, thermocompression bonding, forming a Cu--Cu connection structure. Furthermore, the spaces formed between the plurality of chips 20 are filled with an antireflection film 26 . The antireflection film 26 prevents nonuniform application of resist resin during, for example, a lithography process. Furthermore, the upper surfaces of the plurality of chips 20 formed on the interposer substrate 10 are polished to have the same height, for example. Thereby, even in subsequent steps, conventional equipment and equipment can be used without using special equipment or equipment.

Next, a color filter 21 is formed on the upper surface of the image sensor chip 20(1) placed on the interposer substrate 10, and an on-chip lens 22 is further formed (FIG. 7(e)). As described above, in the manufacturing method of this example, the color filter 21 and the on-chip lens 22 can be formed after the bonding process by thermocompression bonding with the top surfaces of the plurality of chips 20 having the same height.

Then, the antireflection film 26 filled between the plurality of chips on the interposer substrate 10 is removed, and furthermore, the electrode pads 30 are formed to form the sensor device 1 as a product.

In this way, in the sensor device 1 of the present disclosure, the interposer substrate 10 and the plurality of chips 20 arranged thereon have a Cu-Cu connection structure, so that the impedance can be kept lower than before. This makes it possible to adapt to high-speed communication.

Further, in the sensor device 1 of the present disclosure, the electrical connection between the interposer substrate 10 and the plurality of chips 20 is a Cu-Cu connection structure, which enables miniaturization of the Cu electrode and also reduces the wiring density. This makes it possible to increase the density, thereby making it possible to further reduce the chip size.

Furthermore, in the sensor device 1 of the present disclosure, the heights of the upper end surfaces of the plurality of chips 20 placed on the intermediate substrate are the same, so the semiconductor manufacturing process is not complicated and existing equipment can be used. It can be manufactured using

The embodiments described above are examples for explaining the present technology, and are not intended to limit the present technology only to these embodiments. The present technology can be implemented in various forms without departing from the gist thereof.

For example, in the methods disclosed herein, steps, acts, or functions may be performed in parallel or in a different order unless the results are inconsistent. The steps, acts, and functions described are provided as examples only, and some of the steps, acts, and functions may be omitted or combined with each other without departing from the spirit of the technology. It is also possible to add other steps, actions, or functions.

Further, although various embodiments are disclosed in this specification, specific features (technical matters) in one embodiment may be added to other embodiments while improving them as appropriate, or Certain features in the embodiments may be replaced and such forms are also within the scope of the present technology.

Further, the present technology may be configured to include the following technical matters.
(1)
a semiconductor substrate including a wiring layer and having a first Cu electrode electrically connected to the wiring layer;
an image sensor chip placed on the semiconductor substrate and formed with a pixel array in which photoelectric conversion elements are arranged in an array;
a semiconductor integrated circuit chip juxtaposed to the image sensor chip on the semiconductor substrate;
Each of the image sensor chip and the semiconductor integrated circuit chip includes a second electrode bonded to the first Cu electrode on a surface facing the semiconductor substrate.
sensor device.
(2)
The image sensor chip and the semiconductor integrated circuit chip have upper end surfaces that are the same in height;
The sensor device according to (1) above.
(3)
the semiconductor substrate is an interposer substrate;
The sensor device according to (1) or (2) above.
(4)
The semiconductor substrate is a logic substrate on which a logic circuit is formed.
The sensor device according to any one of (1) to (3) above.
(5)
The image sensor chip is a stacked image sensor chip in which a sensor substrate including the pixel array and a logic board that controls the pixel array are stacked.
The sensor device according to any one of (1) to (4) above.
(6)
The semiconductor integrated circuit chip is at least one of a memory chip, a signal processing chip, and a light emitting element chip.
The sensor device according to any one of (1) to (5) above.
(7)
An anti-reflection film is formed on at least a portion of the surface of the semiconductor integrated circuit chip to prevent reflection of irradiated light.
The sensor device according to any one of (1) to (6) above.
(8)
The anti-reflection film is a color filter,
The sensor device according to any one of (1) to (3) above.
(9)
The sensor device according to (8), wherein the color filter is a blue filter that transmits at least blue wavelength light.

1...Sensor device 10...Interposer board 11...Wiring layer 12...1st Cu electrode 20...Chip 20(1)...Image sensor chip 20(1)a...Sensor board 20(1)b...Logic board 20(2) ...Memory chip 20 (3) ... Signal processing chip 20 (4) ... Light emitting element chip 21 ... Color filter 22 ... On-chip lens 23 ...

Second Cu electrode

24a, 24b ... Wiring layer 25 ... Via hole 26 ... Antireflection film 27 ...embedding material 30...electrode pad 40...logic board

Claims

a semiconductor substrate including a wiring layer and having a first Cu electrode electrically connected to the wiring layer;
an image sensor chip placed on the semiconductor substrate and formed with a pixel array in which photoelectric conversion elements are arranged in an array;
a semiconductor integrated circuit chip juxtaposed to the image sensor chip on the semiconductor substrate;
Each of the image sensor chip and the semiconductor integrated circuit chip includes a second electrode bonded to the first Cu electrode on a surface facing the semiconductor substrate.
sensor device.
The image sensor chip and the semiconductor integrated circuit chip are configured such that the heights of their upper end surfaces are the same;
The sensor device according to claim 1.
the semiconductor substrate is an interposer substrate;
The sensor device according to claim 2.
The semiconductor substrate is a logic substrate on which a logic circuit is formed.
The sensor device according to claim 2.
The image sensor chip is a stacked image sensor chip in which a sensor substrate including the pixel array and a logic board that controls the pixel array are stacked.
The sensor device according to claim 2.
The semiconductor integrated circuit chip is at least one of a memory chip, a signal processing chip, and a light emitting element chip.
The sensor device according to claim 2.
An anti-reflection film is formed on at least a portion of the surface of the semiconductor integrated circuit chip to prevent reflection of irradiated light.
The sensor device according to claim 2.
The anti-reflection film is a color filter,
The sensor device according to claim 7.
The sensor device according to claim 8, wherein the color filter is a blue filter that transmits at least light of a blue wavelength.