WO2023193136A1 - Affichage de papier électronique et procédé d'affichage - Google Patents

Affichage de papier électronique et procédé d'affichage Download PDF

Info

Publication number
WO2023193136A1
WO2023193136A1 PCT/CN2022/085292 CN2022085292W WO2023193136A1 WO 2023193136 A1 WO2023193136 A1 WO 2023193136A1 CN 2022085292 W CN2022085292 W CN 2022085292W WO 2023193136 A1 WO2023193136 A1 WO 2023193136A1
Authority
WO
WIPO (PCT)
Prior art keywords
data
pixel
voltage
pixels
sub
Prior art date
Application number
PCT/CN2022/085292
Other languages
English (en)
Inventor
Yasuyuki Teranishi
Original Assignee
Huawei Technologies Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Huawei Technologies Co., Ltd. filed Critical Huawei Technologies Co., Ltd.
Priority to PCT/CN2022/085292 priority Critical patent/WO2023193136A1/fr
Publication of WO2023193136A1 publication Critical patent/WO2023193136A1/fr

Links

Images

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/3433—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using light modulating elements actuated by an electric field and being other than liquid crystal devices and electrochromic devices
    • G09G3/344—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using light modulating elements actuated by an electric field and being other than liquid crystal devices and electrochromic devices based on particles moving in a fluid or in a gas, e.g. electrophoretic devices
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2092—Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0252—Improving the response speed

Definitions

  • Embodiments described herein relate to an electronic paper display and a display method.
  • EPDs electronic paper displays
  • Reasons why the electronic paper display (EPD) are preferred includes:
  • E-books Electronic paper displays
  • ESL electronic shelf labels
  • EPDs Electronic paper displays
  • E-books such as tablets, digital signage, price tags, electronic shelf labels (ESL) or the like.
  • E-books such as tablets, digital signage, price tags, electronic shelf labels (ESL) or the like.
  • E-books such as tablets, digital signage, price tags, electronic shelf labels (ESL) or the like.
  • E-books such as tablets, digital signage, price tags, electronic shelf labels (ESL) or the like.
  • ESL electronic shelf labels
  • Patent Document Japanese Patent Publication No. 2008-262105
  • Patent Document Japanese Patent Publication No. 2009-229853
  • EPD electronic paper displays
  • LCDs liquid crystal displays
  • OLED organic light emitting diodes
  • uLED ultra-light emitting diodes
  • the embodiments of the invention as described in the present application provide EPDs that have increased display rates.
  • An embodiment in one aspect described herein provides an electronic paper display (EPD) .
  • EPD electronic paper display
  • the electronic paper display comprising:
  • a data line driver configured to supply data signals to a plurality of data lines which are coupled with the plurality of pixels
  • a scan line driver configured to drive a plurality of scan lines which are coupled with the plurality of pixels
  • a power supplier configured to supply a predetermined voltage to the plurality of pixels
  • each pixel of the plurality of pixels includes a data hold unit and a micro element, wherein when a scan line coupled to the pixel is activated, the data hold unit receives the data signal from a data line coupled to the pixel and holds electrical charge;
  • micro element includes a pixel electrode, a common electrode, and an electrophoresis element intervening between the pixel electrode and the common electrode;
  • the scan line driver drives the plurality of scan lines, and the appearance of the one or more pixels is changed in accordance with the frame period;
  • the power supply unit supplies a first constant voltage to the common electrode in a predetermined number of sub-frames of the frame period, while it supplies a second constant voltage to the common electrode in remaining sub-frames, the second constant voltage being different from the first constant voltage.
  • FIG 1 illustrates an electronic paper display (EPD) according to an embodiment.
  • FIG. 2 illustrates pixels in detail.
  • Figure 3 illustrates a timing chart for various signals that may be used in an electronic paper display (EPD) .
  • EPD electronic paper display
  • Figure 4 illustrates exemplary optical response property for Ink voltage.
  • Figure 5 illustrates a relation between Ink voltage and response time.
  • Figure 6 illustrates a drawing for explaining a principle of overdrive technology.
  • Figure 7 illustrates a drawing for explaining a principle of overdrive technology.
  • FIG. 8 illustrates a flowchart of operations according to an embodiment.
  • Figure 9 illustrates a timing chart for various signals that may be used in an electronic paper display (EPD) according to an embodiment.
  • EPD electronic paper display
  • Figure 10 illustrates a timing chart for various signals that may be used in an electronic paper display (EPD) according to an embodiment.
  • EPD electronic paper display
  • Figure 11 illustrates a relation between Ink voltage and response time.
  • Figure 12 illustrates effects according to an embodiment.
  • Figure 13 illustrates effects according to an embodiment.
  • FIG. 14 illustrates effects according to another embodiment.
  • Figure 15 illustrates a variation when implementing an electronic paper display (EPD) .
  • Figure 16 illustrates a variation when implementing an electronic paper display (EPD) .
  • Figure 17 illustrates a variation when implementing an electronic paper display (EPD) .
  • FIG. 18 illustrates an electronic device in which an electronic paper display (EPD) according to an embodiment may be used.
  • EPD electronic paper display
  • Partitions in the following description are not essential for embodiments. Descriptions in two or more partitions may be combined, and descriptions in one of partitions may be applied to descriptions in another partition (unless contraindicated) , if necessary.
  • FIG. 1 illustrates an electronic paper display (EPD) 10 according to an embodiment.
  • the electronic paper display (EPD) includes a plurality of pixels 11, a data line drive unit 12, a scan line drive unit 13, a power supply unit, and a control unit 15.
  • each pixel of the plurality of pixels 11 illustrates a display according to a data signal which is supplied from a data line Data j coupled to the pixel.
  • i is an index to indicate a scan line
  • j is an index to indicate a data line (the same shall apply hereinafter) .
  • the control unit 15 controls the data line drive unit 12 to supply data signals to a plurality of data lines Data 1 to Data N which are coupled with the plurality of pixels 11.
  • the control unit 15 controls the scan line drive unit 13 drives a plurality of scan lines Gate 1 to Gate M which are coupled with the plurality of pixels 11.
  • the control unit 15 controls the power supply unit 14 to supply a predetermined voltage to the plurality of pixels 11.
  • N and M may be any suitable positive integer.
  • N and M may be hundreds, thousands or the like.
  • FIG. 2 illustrates pixels in detail, more specifically, a partial equivalent circuit for the electronic paper display (EPD) 10 as depicted in Fig. 1.
  • EPD electronic paper display
  • other numerical values may be used in other embodiments.
  • Each pixel of the plurality of pixels 11 includes a transmission switch unit 21, a data hold unit 22, and a micro element 23.
  • the transmission switch unit 21 connects or disconnects between a data line Data j and a pixel node Pix i-j depending on whether the scan line Gate i coupled to the pixel is activated or deactivated.
  • the transmission switch unit 21 may be composed using a thin film transistor (TFT) , e.g., a N-type field effect transistor (FET) which a gate is coupled to the gate line Gate i, a source is coupled to the data line Data j, and a drain is connected to one end of the data hold unit 22.
  • TFT thin film transistor
  • FET N-type field effect transistor
  • a P-type FET may be used in the other embodiments.
  • the data hold unit 22 may receive a data signal from a data line Data j coupled to the pixel and hold electrical charge.
  • the data hold unit 22 may be composed by one capacitor, an embodiment is not limited to such an example, and it may be composed by means of any suitable element which can hold electrical charge.
  • One end of the data hold unit 22 is coupled to a pixel node Pix i-j, while other end of the data hold unit 22 is coupled to a voltage CS of a backplane (not shown) of the electronic paper display (EPD) 10.
  • the backplane voltage CS is a common voltage for the plurality of pixels 11, and is supplied from the power supply unit 14.
  • the micro element 23 includes a pixel electrode 24, a common electrode 25, and an electrophoresis element 26 intervening between the pixel electrode 24 and the common electrode 25.
  • the electrophoresis element 26 includes at least first color particles which are electrically charged, and second color particles which are electrically charged.
  • the second color is different from the first color.
  • the first color particles may be composed of pigment which is negatively charged.
  • the second color particles may be composed of black pigment which is positively charged.
  • the micro element 23 may be arranged in order to implement two-color electronic ink in a microcapsules scheme.
  • the micro element 23 may be arranged in order to implement three-color electronic ink in a microcup scheme.
  • the micro element 23 may be arranged by means of any suitable material such that an electronic ink using electrophoresis is implemented.
  • the pixel electrode 24 is coupled to the pixel node Pix i-j.
  • the common electrode 25 is coupled to a common voltage VCOM which is common for the plurality of pixels 11.
  • the common voltage VCOM is supplied from the power supply unit 14.
  • an electrode (not shown) providing the common voltage VCOM is located opposing to a backplane which provides the voltage CS, which may be referred to as an opposing electrode. Because the opposing electrode is electrically coupled to the backplane, the common voltage VCOM and the voltage CS are same.
  • a side in which there is the opposing electrode supplying the common voltage VCOM is a side from which a user views the electronic paper display (EPD) 10.
  • EPD electronic paper display
  • the common electrical voltage VCOM is set to 0 [V] and the voltage of the pixel node Pix i-j is negative, a side of the common electrical voltage VCOM is in a relatively high voltage, and negatively charged particles (e.g., white pigment) are gathered, and so the pixel will appear to be white.
  • negatively charged particles e.g., white pigment
  • the voltage causing the electrophoresis is an Ink voltage which is applied to the micro element 23, the Ink voltage is defined as a difference between a voltage of the pixel node Pix i-j and the common voltage VCOM.
  • VCOM is always set to be 0 [V] .
  • the Ink voltage is equal to a voltage of a data signal Data*which is supplied from a data line.
  • Pix i-j may represent a pixel node or a voltage at the pixel node.
  • Figure 3 illustrates an exemplary timing chart for various signals that may be used in an electronic paper display (EPD) in Figure 1 and Figure 2.
  • EPD electronic paper display
  • the frame period includes 10 sub-frames.
  • one sub-frame is 50 ms, and one frame period is 500 ms.
  • the total number N of the scan lines Gate i is 3, and the total number M of the data lines Data j is 3.
  • H-level voltage (15 [V] in an example as depicted in the figure) is applied to a data line Data*.
  • the data signal Data* is supplied such that a black color is displayed.
  • “*” is an index to distinguish a data line, corresponds to j in the above explanation, and equals to 1, 2 or 3 in the present situation.
  • any of scan line Gate i is not activated.
  • 0 [V] is supplied in the common voltage VCOM (and CS) .
  • scan lines Gate 1, Gate 2, and Gate 3 are sequentially activated for every sub-frame.
  • the scan line’s drive is performed instantaneously by means of a pulse.
  • Gate 1 is driven 10 times during one frame period.
  • Gate 2 and Gate 3 are also driven 10 times during one frame period.
  • the pixel node voltage Pix 2-*at this timing is 0 [V] .
  • the voltages of pixel nodes of three pixels belonging to the second row are maintained at the same state (0 [V] ) until the scan line Gate 2 is activated.
  • the scan line Gate 2 When the scan line Gate 2 is activated, three pixels belonging to the second row receive data signals from their data line Data*, and the pixel node voltage Pix 2-*becomes the voltage of Data* (the H-level voltage of 15 [V] in the example as depicted in the figure 3) .
  • the pixel node voltage Pix 2-* transitions from 0 [V] to 15 [V] .
  • the scan line Gate 2 is deactivated, and it stops receiving the data signal. Because the data hold unit 22 continues to hold the accumulated electrical charge, the pixel node voltage Pix 2-*is also maintained.
  • the situation in the second sub-frame t1 to t2 is also similar.
  • the voltages of pixel nodes of three pixels belonging to the second row are maintained at the same state (15 [V] ) until the scan line Gate 2 is activated.
  • the scan line Gate 2 When the scan line Gate 2 is activated, three pixels belonging to the second row receive data signals from their data line Data*, and the pixel node voltage Pix 2-*becomes the voltage of Data* (the H-level voltage of 15 [V] in the example as depicted in the figure 3) .
  • the scan line Gate 2 is deactivated, and it stops receiving the data signal. Because the data hold unit 22 continues to hold the accumulated electrical charge, the pixel node voltage Pix 2-*is also maintained.
  • drive and display for one pixel is performed once for every one sub-frame and performed two or more times for every one frame period.
  • a switching of the appearance of the pixel e.g., black to white, or vice versa
  • drive and display for the pixel is performed two or more times for every one frame period.
  • the voltage of the Data* is a L-level voltage of -15 [V] .
  • the data signal Data* is supplied such that a white color is displayed, which is different from that of the first frame period.
  • An appearance of the pixel is based on a voltage applied to the pixel, more specifically, Ink voltage (mathematical formula (1) ) as described before.
  • Figure 4 illustrates exemplary optical response property (Response Time) for Ink voltage (Waveform) .
  • a waveform of the Ink voltage is represented using rectangular wave. Specifically, white color is displayed in 0-2 seconds, then black color and white color alternate for every 4 seconds. Thus, one frame period is 4 seconds.
  • the optical response property as depicted in Figure 4 may be evaluated using “Rise time” and “Fall time” .
  • the Rise time may be defined as a time interval from 10 %to 90 %in the response outputs when a waveform which increases like a step function is applied.
  • the Fall time may be defined as a time interval from 90 %to 10 %in the response outputs when a waveform which decreases like a step function is applied.
  • other definition may be used in the other embodiments.
  • Figure 5 illustrates Response time when the Ink voltage amplitude as depicted in Figure 4 changes from 5 [V] to 20 [V] .
  • “Rise” indicates Rise time.
  • “Fall” indicates Fall time.
  • Rise time and Fall time tend to decrease as the Ink voltage increases.
  • the Ink voltage amplitude is 5 [V]
  • Rise time and Fall time are about 900 ms (about 1 second) .
  • the Ink voltage amplitude is 20 [V]
  • the Ink voltage (Pix i-j) is equal to the voltage of the data signal Data*.
  • “to increase the Ink voltage” means “to increase the voltage of the data signal Data*” .
  • the data signal Data* is supplied from the data line drive unit 12 ( Figure 1) , which is typically determined by means of a power supply voltage which is supplied to a Display Drive Integrated Circuit (DDIC) .
  • DDIC Display Drive Integrated Circuit
  • the data signal amplitude is set to be 15 [V] (DDIC setting) from a point of view that the Ink voltage is as large as possible while taking the withstand voltage of the DDIC into account.
  • An embodiment is not limited to this numerical example. Other numerical values may be used in the other embodiments.
  • overdrive technology is used to further increase a display rate.
  • Figure 6 illustrates a drawing for explaining a principle of overdrive technology.
  • the dotted line shows a system that has a response property which changes like dot-line ( “Normal Driving” in ⁇ Apply voltage> in Figure 6) when a rectangular waveform which changes like a step function ( “Normal Driving” in ⁇ Repose time> in Figure 6) is applied to the system.
  • the system responds in the manner shown by the solid line ( “Overdrive” in ⁇ Repose time>in Figure 6) .
  • the response time may be shorted by transiently applying a higher voltage than its original one.
  • Figure 7 illustrates an example in which a principle of overdrive technology is applied to an Ink voltage.
  • a waveform indicated as “Normal” is a waveform to which the overdrive technology has not been applied, which relates to Pix 2-*in the Figure 3.
  • a waveform indicated as “Overdrive” is a waveform to which the overdrive technology has been applied.
  • the waveform to display black color is modified as depicted in Figure 6.
  • the waveform to display white color is modified in a different manner, and will be described in detail later.
  • Figure 8 illustrates a flowchart showing operations according to an embodiment.
  • Figure 9 illustrates a timing chart for various signals that may be used in an electronic paper display as depicted in Figure 1 and Figure 2.
  • a frame period includes 10 sub-frames.
  • the total number N of the scan lines Gate i is 3, and the total number M of the data lines Data j is 3.
  • the common voltage VCOM is set to a predetermined overdrive voltage.
  • the overdrive voltage is -5 [V] .
  • other numerical values may be used in the other embodiments.
  • the common voltage VCOM is set to -5 [V] . This is done by supplying a first constant voltage (-5 [V] in this example) to the common electrode 25 ( Figure 2) by means of the power supply unit 14 ( Figure 1) .
  • the voltage CS is equal to the common voltage VCOM.
  • the predetermined number of sub-frames of the frame period may be referred as “overdrive period” , which is one sub-frame in this embodiment.
  • the other numerical values may be used in the other embodiments.
  • the predetermined number may be 2.
  • DDIC Display Drive IC
  • step 803 in Figure 8 drive and display for all pixels are performed.
  • H-level voltage (15 [V] in an example as depicted in the figure) is applied to data line Data*.
  • the data signal Data* is supplied such that a black color is displayed.
  • “*” is an index to distinguish a data line, and is equal to 1, 2 or 3 in the present situation.
  • any of scan line Gate i is not activated.
  • -5 [V] is supplied in the common voltage VCOM (and CS) .
  • the common voltage VCOM (and CS) affects the pixel node voltage Pix 2-*due to coupling.
  • scan lines Gate 1, Gate 2, and Gate 3 are sequentially activated for every sub-frame.
  • the scan line drive is performed instantaneously by means of a pulse.
  • Gate 1 is driven 10 times during one frame period.
  • Gate 2 and Gate 3 are also driven 10 times during one frame period.
  • the pixel node voltages of three pixels belonging to the second row are maintained at the same state (-5 [V] ) until the scan line Gate 2 is activated.
  • the scan line Gate 2 When the scan line Gate 2 is activated, three pixels belonging to the second row receive data signals from their data line Data*, and the pixel node voltage Pix 2-*becomes the voltage of Data* (the H-level voltage of 15 [V] in the example as depicted in the figure 9) .
  • the scan line Gate 2 is deactivated, and it stops receiving the data signal. Because the data hold unit 22 continues to be held the accumulated electrical charge, the pixel node voltage Pix 2-*is also maintained.
  • the common voltage VCOM is set to a predetermined voltage.
  • the common voltage VCOM (and CS) is set to 0 [V] before the scan line Gate 2 is activated yet. This is done by supplying a first constant voltage (0 [V] in this example) to the common electrode 25 ( Figure 2) by means of the power supply unit 14 ( Figure 1) .
  • the data hold unit 22 continues to hold the accumulated electrical charge.
  • the three pixels belonging to the second row are maintained at the same state (20 [V] ) until the scan line Gate 2 is activated.
  • step 807 in Figure 8 drive and display for all pixels are performed.
  • the scan line Gate 2 when the scan line Gate 2 is activated, three pixels belonging to the second row receive data signals from their data line Data*, and the pixel node voltage Pix 2-*becomes the voltage of Data* (the H-level voltage of 15 [V] in the example as depicted in the figure 9) .
  • the pixel node voltage Pix 2-* transitions from 20 [V] to 15 [V] .
  • the scan line Gate 2 is deactivated, and it stops receiving the data signal. Because the data hold unit 22 continues to hold the accumulated electrical charge, the pixel node voltage Pix 2-*is also maintained.
  • the three pixels belonging to the second row are maintained at the same state (15 [V] ) until the scan line Gate 2 is activated.
  • the scan line Gate 2 When the scan line Gate 2 is activated, three pixels belonging to the second row receive data signals from data their line Data*, and the pixel node voltage Pix 2-*becomes the voltage of Data* (the H-level voltage of 15 [V] in the example as depicted in the figure 9) .
  • the scan line Gate 2 is deactivated, and it stops receiving the data signal. Because the data hold unit 22 continues to hold the accumulated electrical charge, the pixel node voltage Pix 2-*is also maintained.
  • the three pixels belonging to the second row are maintained at the same state (15 [V] ) until the scan line Gate 2 is activated.
  • Data* is maintained at 0 [V] .
  • the scan line Gate 2 When the scan line Gate 2 is activated, three pixels belonging to the second row receive data signals from their data line Data*, and the pixel node voltage Pix 2-*becomes the voltage of Data* (0 [V] in the example as depicted in the figure 9) .
  • black color is displayed in the first frame period while white color is displayed in the second frame period.
  • the voltage of the data signal Data*in the first frame period has an opposite polarity to the voltage of the data signal Data*in the second frame period.
  • the common voltage VCOM (and CS) is set to the predetermined overdrive voltage (-5 [V] ) .
  • the data signal Data* is supplied such that while color is displayed.
  • L-level voltage (-15 [V] in an example as depicted in the figure) is applied to data line Data*.
  • any of scan line Gate i is not activated.
  • the common voltage VCOM (and CS) affects the pixel node voltage Pix 2-*due to coupling.
  • the pixel node voltages of three pixels belonging to the second row are maintained at the same state (-5 [V] ) until the scan line Gate 2 is activated.
  • the scan line Gate 2 When the scan line Gate 2 is activated, three pixels belonging to the second row receive data signals from their data line Data*, and the pixel node voltage Pix 2-*becomes the voltage of Data* (the L-level voltage of -15 [V] in the example as depicted in the figure 9) .
  • the pixel node voltage Pix 2-* transitions from -5 [V] to -15 [V] . After that, it stops receiving the data signal. Because the data hold unit 22 continues to hold the accumulated electrical charge, the pixel node voltage Pix 2-*is also maintained.
  • the common voltage VCOM (and CS) is set to 0 [V] before the scan line Gate 2 is activated yet.
  • the data hold unit 22 continues to hold the accumulated electrical charge.
  • the three pixels belonging to the second row are maintained at the same state (-10 [V] ) until the scan line Gate 2 is activated.
  • the scan line Gate 2 when the scan line Gate 2 is activated, three pixels belonging to the second row receive data signals from their data line Data*, and the pixel node voltage Pix 2-*becomes the voltage of Data* (the L-level voltage of -15 [V] in the example as depicted in the figure 9) .
  • the pixel node voltage Pix 2-* transitions from -10 [V] to -15 [V] .
  • the scan line Gate 2 is deactivated, and it stops receiving the data signal. Because the data hold unit 22 continues to hold the accumulated electrical charge, the pixel node voltage Pix 2-*is also maintained.
  • the three pixels belonging to the second row are maintained at the same state (15 [V] ) until the scan line Gate 2 is activated.
  • Data* is maintained at 0 [V] .
  • the scan line Gate 2 When the scan line Gate 2 is activated, three pixels belonging to the second row receive data signals from their data line Data*, and the pixel node voltage Pix 2-*becomes the voltage of Data* (0 [V] in the example as depicted in the figure 9) .
  • an appearance of the pixel is based on the Ink voltage which is applied to the micro element 23 of the pixel:
  • the VCOM was always set to be 0.
  • the common voltage VCOM (and CS) is -5 [V] in the overdrive period, and is 0 [V] in the other periods.
  • the waveform of the Ink voltage indicates 20 [V] which is greater than the voltage of the data signal Data*.
  • Such a voltage waveform strongly affects the electrophoresis of the charged particles, thereby the response time (Fall time) for the display of black color can be shorted.
  • Data 1 may be a data signal for black color while Data 2 may be a data signal for white color ( Figure 10) .
  • a transition time from white color to black color is evaluated by means of the Fall time in an optical response property represented with reflectivity.
  • a transition time from black color to white color is evaluated by means of the Rise time in an optical response property represented with reflectivity.
  • it is required to decrease the Rise time and/or the Fall time which define (s) the response property.
  • the overdrive technology by applying the overdrive technology to the transition from white color to black color, Fall time in the optical response property may be shorted.
  • the overdrive technology is not applied to the transition from black color to white color (No-overdrive) .
  • the overdrive technology can be reversely applied. That is, by applying the overdrive technology to the transition from black color to white color, the Rise time in the optical response property may be shorted. In this case, the overdrive technology is not applied to the transition from white color to black color (No-overdrive) .
  • the Rise time or the Fall time may be appropriately determined depending on the system to be used, particularly materials to be used for charged particles.
  • the Ink voltage amplitude is set to be 15 [V] (DDIC setting) from a point of view that the Ink voltage is as large as possible while taking the withstand voltage of the Display Drive IC (DDIC) into account.
  • the Rise time (Rise) and the Fall time (Fall) are not necessarily same.
  • the data signal amplitude is 15 [V]
  • the Rise time is about 100 ms while Fall time is about 200ms, the latter is longer than the former.
  • it is more desirable to improve the Fall time (Fall) than the Rise time (Rise) .
  • it is intended to decrease the Fall time in the optical response property by applying the overdrive technology to the transition from white color to black color.
  • Figure 12 illustrates effects according to such an embodiment.
  • case 1 in which the overdrive technology is not applied (No Overdrive)
  • case 2 in which the overdrive technology is applied (5V Overdrive) are shown.
  • two arrows in right side in the figure they tend to be similar for Rise time.
  • case 2 is shorter than case 1 with regard to Fall time.
  • Figure 13 illustrates effects according to an embodiment in terms of contrast comparison. Contrast may be represented as (brightness of white color) / (brightness of white color) . As depicted in the figure, contrast is improved from 10.7 to 13.29 by applying the overdrive technology. In terms of ghost elimination or the like, it is preferred to use a higher contrast.
  • Figure 14 illustrates effects according to another embodiment.
  • Rise time is improved.
  • Rise time is improved from 130 ms to 110 ms by applying the overdrive technology to the transition from black color to white color.
  • FIGS 15-17 illustrate variations when implementing an electronic paper display (EPD) .
  • “Panel” represents a display panel which mainly corresponds to an array of pixels 11 in Figure 1.
  • DDIC represents a Display Drive Integrated Circuit which mainly corresponds to the data line drive unit 12 in Figure 1.
  • TCON represents a timing controller which mainly corresponds to the control unit 15 in Figure 1.
  • VCOM Control Switch represents a component to supply the common voltage VCOM to the pixels, which functions as a switch to selectively supply 0 or -5 [V] depending on a sub-frame.
  • Power is a power supply to supply a voltage of 0 or -5 [V] .
  • VCOM Control Switch VCS
  • Power power supply
  • the timing controller (TCON) , the VCOM Control Switch (VCS) and the power supply (Power) are implemented on a print circuit board (PCB) .
  • the Display Drive IC (DDIC) is implemented on a Flexible Printed Circuits (FPC) which is located between the Panel and the PCB.
  • VCOM Control Switch VCOM
  • DDIC Display Drive IC
  • a component which supplies the voltage of -5 [V] is also incorporated into the Display Drive IC (DDIC) . That is, with regard to components which allow to perform functions according to the embodiments, they are incorporated into the Display Drive IC (DDIC) .
  • the number of components implemented on the print circuit board (PCB) may be comparable to the conventional structure.
  • the Display Drive IC may be implemented by means of a general product. This is preferred in terms of a short development interval of EPD products.
  • FIG 18 illustrates an electronic device 100 in which an electronic paper display (EPD) according to an embodiment may be used.
  • the electronic device 101 may include a bus 110, a processor 120, a memory 130, an input/output interface 150, a display 160, and a communications interface 170.
  • the electronic device 101 may omit at least one of the foregoing elements or may further include another element.
  • the bus 110 may include circuitry, such as, that interconnects the components 110-170 and delivers communications (such as control messages and/or data) .
  • the processor 120 may include one or more central processing units (CPU) , an application processor (AP) , and/or a communication processor (CP) .
  • the processor 120 may perform an operation or data processing related to control and/or communication of at least another component of the electronic device 101.
  • Memory 130 may include volatile memory and/or non-volatile memory.
  • the memory 130 may store, for example, an instruction or data related to at least another component of the electronic device 101.
  • the memory 130 may store software and/or programs.
  • the program may include a kernel (Core) 141, a middleware 143, an application programming interface API 145, and/or an application program (or "application” ) 147.
  • OS operating system
  • the kernel 141 may control or manage, for example, system resources (such as the bus 110, the processor 120, and the memory 130) for performing operations or functions implemented in other programs (such as the middleware 143, the API 145, and the application program 147) .
  • the kernel 141 may provide an interface, and the middleware 143, API 145 or the application program 147 may access separate elements of the electronic device 101 by using the interface to control or manage system resources.
  • middleware 143 may be used as an intermediary to allow API 145 or application 147 to communicate with kernel 141 to exchange data.
  • the middleware 143 may process, based on priorities of the task requests, the one or more tasks requests received from the application program 147. For example, the middleware 143 may allocate, to at least one of the application programs 147, a priority of a system resource (such as the bus 110, the processor 120, and the memory 130) used for using the electronic device 101. For example, the middleware 143 may perform scheduling or load balancing for one or more tasks requests by processing the one or more tasks requests based on the priorities assigned to the task requests.
  • a system resource such as the bus 110, the processor 120, and the memory 130
  • the API 145 is an interface used by the application 147 to control functions provided by the kernel 141 or the middleware 143, and may include, for example, at least one interface or function (such as instructions) for file control, window control, image processing, or text control.
  • the input/output interface 150 may serve as, for example, an interface to transfer an instruction or data input from a user or another external device to another (other) element of the electronic device 101.
  • the input/output interface 150 may output an instruction or data received from another (other) element of the electronic device 101 to a user or another external device.
  • the display 160 may include, for example, a liquid crystal display (LCD or IXD) , a light emitting diode (LED) display, an organic light emitting diode (OLED) display, a micro-electro-mechanical system (MEMS) display, and an electronic paper display (EPD) .
  • a liquid crystal display LCD or IXD
  • LED light emitting diode
  • OLED organic light emitting diode
  • MEMS micro-electro-mechanical system
  • EPD electronic paper display
  • Display 160 may display various types of content (such as a text, an image, a video, an icon, or a symbol) to a user.
  • the display 160 may include a touchscreen and receive touch input, posture input, proximity input or hover input, such as using an electronic pen or a part of the body of a user.
  • the communications interface 170 may establish communication between the electronic device 101 and an external device (such as a first external electronic device 102, a second external electronic device 104, or a server 106) .
  • the communications interface 170 may be connected to the network 162 through wireless or wired communication, to communicate with the external device (such as the second external electronic device 104 or the server 106) .
  • the wireless communication may use, for example, at least one of the following as a cellular communication protocol: such as long term evolution (LTE) , high level LTE (LTE-A) , code division multiple access (CDMA) , wideband CDMA (WCDMA) , universal mobile telecommunications system (UMTS) , wireless broadband (WiBro) , and global mobile telecommunications system (GSM) .
  • LTE long term evolution
  • LTE-A high level LTE
  • CDMA code division multiple access
  • WCDMA wideband CDMA
  • UMTS universal mobile telecommunications system
  • WiBro wireless broadband
  • GSM global mobile telecommunications system
  • wireless communications may include, for example, short-range communications 164.
  • the short-range communication 164 may include at least one of the following: for example, Wi-Fi, near field communication (NFC) , and global navigation satellite system (GPS) .
  • the wired communication may include at least one of the following: for example, a universal serial bus (USB) , a high-definition multimedia interface (HDMI) , a recommendation standard 232 (RS-232) , and a plain old telephone service (POTS) .
  • the network 162 may include at least one of the following: a communications network (such as a computer network (such as a LAN or a WAN) ) , the Internet, and a telephony network.
  • the first external electronic device 102 and the second external electronic device 104 may be devices of a same type or different types as the electronic device 101.
  • the servers 106 may include a group having one or more servers. In various implementations, all or some of the operations performed in the electronic device 101 may be performed in another electronic device or a plurality of electronic devices (such as the electronic device 102 or 104 or server 106) .
  • the electronic device 101 may include a motion sensor 190.
  • the motion sensor is electrically connected to the processor 120, and obtains motion information of the electronic device 120.
  • the motion sensor 190 may include at least one of the following: a linear acceleration sensor, a gyro sensor, and a geomagnetic sensor, which may sense linear acceleration, rotational angular acceleration or orientation information of the electronic device.
  • the electronic device 101 may obtain motion information of the electronic device 101 based on an output value from a sensor. For example, the electronic device 101 may obtain the linear acceleration of the electronic device 101 based on an output value from the linear acceleration sensor.
  • the electronic device 101 may obtain the rotational angular acceleration of the electronic device 101 based on an output value from a gyro sensor.
  • the electronic device 101 may obtain the motion orientation information of the electronic device 101 based on an output value from each of the gyro sensor and the geomagnetic sensor.
  • the processor 120 may be electrically connected to a display 160.
  • the processor 120 may be electrically connected to a memory 130.
  • the memory 130 may store instructions to instruct the processor 120 to perform inertial force correction to remove an inertial force component from the obtained motion information, and display a screen corresponding to the inertial force corrected motion information.
  • the memory 130 may further store an instruction used to instruct, when the instruction is executed, the processor 120 to perform the following operations: obtaining an inertial component.
  • the communications module 170 may receive an inertial component from another electronic device physically separate from the electronic device, and sense the inertial component.
  • the memory 130 may further store an instruction used to instruct, when the instruction is executed, the processor 120 to perform the following operations: generating a correction vector by adding an inverse vector of the inertial acceleration corresponding to the inertial force and the acceleration corresponding to the motion information; and control display 160 to display the screen corresponding to the generated correction vector.
  • the memory 130 may further store an instruction that is used to instruct, when the instruction is executed, the processor 120 to perform the following operations: obtaining a biometric measurement signal from at least one body part of the user when the user moves the electronic device; and removing an inertial component corresponding to the motion information obtained when the biometric measurement signal is not obtained.
  • the electronic device 101 may further include a sensor. The sensor may obtain a biological measurement signal, and the processor 120 may obtain a biological measurement signal from the biological measurement signal sensor.
  • the method described in the embodiments of this application may be applied to a processor or may be implemented by a processor.
  • the processor 930 may be an integrated circuit chip and has a signal processing capability.
  • steps in the foregoing methods can be implemented by using a hardware integrated logical circuit in the processor, or by using instructions in a form of software.
  • the foregoing processor may be a general purpose processor, a digital signal processor (Digital Signal Processing, DSP) , an application-specific integrated circuit (Application Specific Integrated Circuit, ASIC) , a field-programmable gate array (Field-Programmable Gate Array, FPGA) or another programmable logic device, a discrete gate or a transistor logic device, or a discrete hardware component.
  • the processor may implement or perform the methods, the steps, and logical block diagrams that are described in the embodiments of this application.
  • the general purpose processor may be a microprocessor, or the processor may be any conventional processor or the like.
  • Steps of the methods described with reference to the embodiments of this application may be directly executed and accomplished by using a hardware decoding processor, or may be executed and accomplished by using a combination of hardware and software modules in the decoding processor.
  • a software module may be located in a mature storage medium in the art, such as random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, or a register.
  • the storage medium is located in the memory, and a processor reads information in the memory and completes the steps of the foregoing methods in combination with hardware of the processor. All or some of the foregoing embodiments may be implemented by using software, hardware, firmware, or any combination thereof.
  • the embodiments may be implemented completely or partially in the form of a computer program product.
  • the computer program product includes one or more computer instructions.
  • the computer may be a general-purpose computer, a dedicated computer, a computer network, or other programmable apparatuses.
  • the computer instructions may be stored in a computer readable storage medium or may be transmitted from a computer readable storage medium to another computer readable storage medium.
  • the computer instructions may be transmitted from a website, computer, server, or data center to another website, computer, server, or data center in a wired (for example, a coaxial cable, an optical fiber, or a digital subscriber line (DSL) ) or wireless (for example, infrared, radio, or microwave) manner.
  • a wired for example, a coaxial cable, an optical fiber, or a digital subscriber line (DSL)
  • wireless for example, infrared, radio, or microwave
  • the computer readable storage medium may be any usable medium accessible by a computer, or a data storage device, such as a server or a data center, integrating one or more usable media.
  • the usable medium may be a magnetic medium (for example, a floppy disk, a hard disk, or a magnetic tape) , an optical medium (for example, a DVD) , a semiconductor medium (for example, a solid state disk (Solid State Disk, SSD) ) , or the like.
  • the disclosed system, apparatus, and method may be implemented in other manners.
  • the described apparatus embodiment is merely an example.
  • the unit division is merely logical function division and may be other division in actual embodiment.
  • the indirect couplings or communication connections between the apparatuses or units may be implemented in electronic, mechanical, or another form.
  • the units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, and may be located in one position, or may be distributed on a plurality of network units. Some or all of the units may be selected based on actual requirements to achieve the objectives of the solutions of the embodiments.
  • function units in the embodiments of this application may be integrated into one processing unit, or each of the units may exist alone physically, or two or more units may be integrated into one unit.
  • the integrated unit may be implemented in a form of hardware, or may be implemented in a form of a software function unit.
  • the integrated unit When the integrated unit is implemented in the form of a software function unit and sold or used as an independent product, the integrated unit may be stored in a computer readable storage medium. Based on such an understanding, the technical solutions of this application essentially, or the part contributing to the prior art, or all or some of the technical solutions may be implemented in the form of a software product.
  • the computer software product is stored in a storage medium and includes several instructions for instructing a computer device (which may be a personal computer, a server, or a network device) to perform all or some of the steps of the methods described in the embodiments of this application.
  • the foregoing storage medium includes any medium that can store program code, such as a USB flash drive, a removable hard disk, a read-only memory (Read-Only Memory, ROM) , a random access memory (Random Access Memory, RAM) , a magnetic disk, or a compact disc.
  • program code such as a USB flash drive, a removable hard disk, a read-only memory (Read-Only Memory, ROM) , a random access memory (Random Access Memory, RAM) , a magnetic disk, or a compact disc.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

L'invention concerne un affichage de papier électronique (EPD) (10) et un procédé d'affichage mis en œuvre par un affichage de papier électronique (10). Un affichage de papier électronique (10) comprend une pluralité de pixels (11), une unité d'attaque de ligne de données (12), une unité d'attaque de ligne de balayage (13) et une unité d'alimentation électrique (14). Un pixel (11) comprend une unité de maintien de données (22) et un micro-élément (23), lorsqu'une ligne de balayage est activée. Le micro-élément (23) comprend une électrode de pixel (24), une électrode commune (25) et un élément d'électrophorèse (26) intervenant entre l'électrode de pixel (24) et l'électrode commune (25). En fonction d'une tension fournie au micro-élément (23), des particules chargées incluses dans l'élément d'électrophorèse (26) se déplacent vers l'électrode de pixel (24) ou l'électrode commune (25), pour ainsi modifier l'aspect d'un pixel (11). L'unité d'alimentation électrique (14) fournit une première tension constante à l'électrode commune (25) dans un nombre prédéterminé de sous-trames de la période de trame, tandis qu'elle fournit une seconde tension constante à l'électrode commune (25) dans les sous-trames restantes, la seconde tension constante est différente de la première tension constante.
PCT/CN2022/085292 2022-04-06 2022-04-06 Affichage de papier électronique et procédé d'affichage WO2023193136A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/CN2022/085292 WO2023193136A1 (fr) 2022-04-06 2022-04-06 Affichage de papier électronique et procédé d'affichage

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2022/085292 WO2023193136A1 (fr) 2022-04-06 2022-04-06 Affichage de papier électronique et procédé d'affichage

Publications (1)

Publication Number Publication Date
WO2023193136A1 true WO2023193136A1 (fr) 2023-10-12

Family

ID=88243723

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2022/085292 WO2023193136A1 (fr) 2022-04-06 2022-04-06 Affichage de papier électronique et procédé d'affichage

Country Status (1)

Country Link
WO (1) WO2023193136A1 (fr)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1864194A (zh) * 2003-10-03 2006-11-15 皇家飞利浦电子股份有限公司 电泳显示单元
CN101083067A (zh) * 2006-06-02 2007-12-05 株式会社半导体能源研究所 液晶显示装置及其驱动方法以及使用该装置的电子设备
CN101493627A (zh) * 2008-01-25 2009-07-29 精工爱普生株式会社 电泳显示装置、其驱动方法以及电子设备
CN101859545A (zh) * 2006-04-25 2010-10-13 精工爱普生株式会社 电泳显示装置、电泳显示装置的驱动方法及电子设备
JP2013050565A (ja) * 2011-08-31 2013-03-14 Meiden Software Corp 電子ペーパ装置および情報表示システム
CN103676395A (zh) * 2012-09-14 2014-03-26 Nlt科技股份有限公司 电泳显示器件及其驱动方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1864194A (zh) * 2003-10-03 2006-11-15 皇家飞利浦电子股份有限公司 电泳显示单元
CN101859545A (zh) * 2006-04-25 2010-10-13 精工爱普生株式会社 电泳显示装置、电泳显示装置的驱动方法及电子设备
CN101083067A (zh) * 2006-06-02 2007-12-05 株式会社半导体能源研究所 液晶显示装置及其驱动方法以及使用该装置的电子设备
CN101493627A (zh) * 2008-01-25 2009-07-29 精工爱普生株式会社 电泳显示装置、其驱动方法以及电子设备
JP2013050565A (ja) * 2011-08-31 2013-03-14 Meiden Software Corp 電子ペーパ装置および情報表示システム
CN103676395A (zh) * 2012-09-14 2014-03-26 Nlt科技股份有限公司 电泳显示器件及其驱动方法

Similar Documents

Publication Publication Date Title
JP6033901B2 (ja) 電気光学ディスプレイを駆動する方法
EP2228786B1 (fr) Dispositif d'affichage électrophorétique, dispositif électronique et procédé de commande de panneau d'affichage électrophorétique
JP5904931B2 (ja) 電気光学ディスプレイを駆動する方法
US7796115B2 (en) Scrolling function in an electrophoretic display device
US9947256B2 (en) Integrated circuit device, electronic apparatus, and control method for electrooptic panel
US8174494B2 (en) Electrophoretic display device, electronic device, and drive method for an electrophoretic display panel
TWI552035B (zh) 控制裝置、顯示裝置及顯示裝置及控制方法
US10115368B2 (en) Liquid crystal display driving method and drive device
JP2007506135A (ja) 必要メモリを低減された双安定ディスプレイ
US11398197B2 (en) Methods and circuitry for driving display devices
JP2008158243A (ja) 表示装置
WO2023193136A1 (fr) Affichage de papier électronique et procédé d'affichage
CN109637411B (zh) 显示设备
WO2024103216A1 (fr) Procédé d'affichage d'image sur un dispositif d'affichage papier électronique et dispositifs associés
US9159274B2 (en) Driver for page transitions in an electronic paper device
Lu et al. A controller design for high-quality images on microcapsule active-matrix electrophoretic displays
JP7322555B2 (ja) 電気光学装置、電子機器及び移動体
JP2011095479A (ja) 電気泳動表示パネルの駆動方法、電気泳動表示装置及び電子機器
US9966017B2 (en) Electrophoretic apparatus and electronic device having a pixel circuit with a plurality of driving transistors and a plurality of selection transistors
EP3872803A1 (fr) Dispositif d'affichage et procédé de commande de dispositif d'affichage
CN102455854A (zh) 双稳态光电显示器的驱动装置及其驱动方法
JP2018180462A (ja) 表示駆動装置、電気光学装置、及び、電子機器

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 22936085

Country of ref document: EP

Kind code of ref document: A1