WO2023177594A1 - Sidewall passivation using aldehyde or isocyanate chemistry for high aspect ratio etch - Google Patents

Sidewall passivation using aldehyde or isocyanate chemistry for high aspect ratio etch Download PDF

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Publication number
WO2023177594A1
WO2023177594A1 PCT/US2023/015028 US2023015028W WO2023177594A1 WO 2023177594 A1 WO2023177594 A1 WO 2023177594A1 US 2023015028 W US2023015028 W US 2023015028W WO 2023177594 A1 WO2023177594 A1 WO 2023177594A1
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feature
reactant
substrate
protective film
etching
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French (fr)
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Eric A. Hudson
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Lam Research Corp
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Lam Research Corp
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Priority to JP2024554750A priority Critical patent/JP2025509548A/ja
Priority to KR1020247034044A priority patent/KR20240164916A/ko
Priority to US18/845,733 priority patent/US20250188600A1/en
Publication of WO2023177594A1 publication Critical patent/WO2023177594A1/en
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    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/04Coating on selected surface areas, e.g. using masks
    • C23C16/045Coating cavities or hollow spaces, e.g. interior of tubes; Infiltration of porous substrates
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/02Pretreatment of the material to be coated
    • C23C16/0227Pretreatment of the material to be coated by cleaning or etching
    • C23C16/0236Pretreatment of the material to be coated by cleaning or etching by etching with a reactive gas
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    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/02Pretreatment of the material to be coated
    • C23C16/0227Pretreatment of the material to be coated by cleaning or etching
    • C23C16/0245Pretreatment of the material to be coated by cleaning or etching by etching with a plasma
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/4401Means for minimising impurities, e.g. dust, moisture or residual gas, in the reaction chamber
    • C23C16/4408Means for minimising impurities, e.g. dust, moisture or residual gas, in the reaction chamber by purging residual gases from the reaction chamber or gas lines
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45523Pulsed gas flow or change of composition over time
    • C23C16/45525Atomic layer deposition [ALD]
    • C23C16/45553Atomic layer deposition [ALD] characterized by the use of precursors specially adapted for ALD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
    • H01J37/32532Electrodes
    • H01J37/32568Relative arrangement or disposition of electrodes; moving means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
    • H01J37/32532Electrodes
    • H01J37/32577Electrical connecting means
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/20Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/26Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials
    • H10P50/264Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means
    • H10P50/266Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only
    • H10P50/267Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only using plasmas
    • H10P50/268Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only using plasmas of silicon-containing layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/20Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326Deposition processes
    • H10P14/6328Deposition from the gas or vapour phase
    • H10P14/6334Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H10P14/6336Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326Deposition processes
    • H10P14/6328Deposition from the gas or vapour phase
    • H10P14/6334Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H10P14/6339Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE or pulsed CVD
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/68Organic materials, e.g. photoresists
    • H10P14/683Organic materials, e.g. photoresists carbon-based polymeric organic materials, e.g. polyimides, poly cyclobutene or PVC

Definitions

  • Certain embodiments herein relate to methods and apparatus for forming an etched feature in a stack that includes dielectric material on a semiconductor substrate.
  • the disclosed embodiments may utilize certain techniques to deposit a passivating material on sidewalls of the etched feature, thereby allowing etch to occur at high aspect ratios.
  • particular reactants or classes of reactants may be used to deposit the passivating material.
  • one or more reactants may comprise an aldehyde functional group.
  • one or more reactants may comprise an isocyanate functional group.
  • a method of forming an etched feature in a stack including a dielectric material on a semiconductor substrate includes: (a) generating a first plasma including an etching reactant, exposing the substrate to the first plasma, and partially etching the feature in the dielectric material; (b) after (a), depositing a protective film on sidewalls of the feature by (i) exposing the substrate to a first reactant and allowing the first reactant to adsorb onto the substrate, where the first reactant includes an aldehyde functional group, (ii) exposing the substrate to a second reactant, where the first and second reactants react with one another to form the protective film, and (iii) repeating (i) and (ii) in a cyclic manner until the protective film reaches a target thickness, where the protective film is an organic polymeric film; and (c) repeating (a)-(b) until the feature is etched to a final depth, where the protective film
  • the first reactant includes a dialdehyde or trialdehyde.
  • the first reactant includes succindialdehyde (C 4 H 6 O 2 ), glutaraldehyde (C 5 H 8 O 2 ), adipaldehyde (C 6 H 10 O 2 ), terephth-aldehyde (C 8 H 6 O 2 ), 1,4-benzenedicarboxaldehyde (C 6 H 4 (CHO) 2 ), ortho-phthalaldehyde (C 8 H 6 O 2 ), 1,2 benzenedicarboxaldehyde (C 6 H 4 (CHO) 2 ), and 2-methylglutaraldehyde (C 6 H 10 O 2 ).
  • the second reactant comprises at least one of the following: diamine, a diol, a thiol, and a trifunctional compound. In some cases, the second reactant comprises diamine. In some cases, the second reactant includes at least one of the following: 1,2-ethanediamine, 1,3-propanediamine, 1,4-butanediamine, ethylenediamine, m- xylylenediamine, isophoronediamine, 1,3-cyclohexanebis(methylamine), 1,4- bis(aminomethyl)cyclohexane, 4,4'-methylenebis(2-methylcyclohexylamine), 4,4'- methylenebis(cyclohexylamine), m-phenylenediamine, p-phenylenediamine, 4- aminobenzylamine, 3-aminobenzylamine, 4-(2-aminoethyl)aniline, p-xylylenediamine, m- xylylenediamine,
  • depositing the protective film in (b) is accomplished without exposing the substrate to plasma energy.
  • the protective coating includes a polyazomethine or a polythioacetal.
  • etching the feature in the stack in (a) is performed in a reaction chamber, where depositing the protective film on the sidewalls of the feature in (b) is performed in the same reaction chamber.
  • the etching reactant includes one or more fluorocarbons or hydrofluorocarbons.
  • depositing the protective film in (b) occurs in a reaction chamber, where depositing the protective film in (b) further includes purging the reaction chamber at least once during each iteration of operation (b).
  • the stack includes alternating layers of (i) a silicon oxide material, and (ii) a silicon nitride material or polysilicon material.
  • the protective film is deposited along substantially an entire depth of the feature.
  • the feature has an aspect ratio of about 20 or greater at its final depth.
  • the method includes: (a) generating a first plasma including an etching reactant, exposing the substrate to the first plasma, and partially etching the feature in the dielectric material; (b) after (a), depositing a protective film on sidewalls of the feature by (i) exposing the substrate to a first reactant and allowing the first reactant to adsorb onto the substrate, where the first reactant includes an isocyanate functional group, (ii) exposing the substrate to a second reactant, where the first and second reactants react with one another to form the protective film, and (iii) repeating (i) and (ii) in a cyclic manner until the protective film reaches a target thickness, where the protective film is an organic polymeric film; and (c) repeating (a)-(b) until the feature is etched to a final depth, where the protective film deposited in (b) substantially prevents lateral etch of the feature during (a), and where the feature has an aspect ratio of about 5 or greater at its final depth.
  • the first reactant includes diisocyanate.
  • the diisocyanate includes at least one of the following: tolylene-2,4-diisocyanate, 1,3- bis(isocyanatomethyl)cyclohexane, hexamethylene diisocyanate, m-xylylene diisocyanate, 1,3- bis(1-isocyanato-1-methylethyl)benzene, isophorone diisocyanate, diphenylmethane 4,4'- diisocyanate, 4,4'-methylenebis(cyclohexyl isocyanate), tolylene-2,6-diisocyanate, 1,4-phenylene diisocyanate, 1,3-phenylene diisocyanate, and 3,3'-dimethyl-4,4'-biphenylene diisocyanate.
  • the second reactant comprises at least one of the following: diamine, a diol, a thiol, and a trifunctional compound.
  • the second reactant comprises diamine.
  • the second reactant includes at least one of the following: 1,2- ethanediamine, 1,3-propanediamine, 1,4-butanediamine, ethylenediamine, m-xylylenediamine, isophoronediamine, 1,3-cyclohexanebis(methylamine), 1,4-bis(aminomethyl)cyclohexane, 4,4'- methylenebis(2-methylcyclohexylamine), 4,4'-methylenebis(cyclohexylamine), m- phenylenediamine, p-phenylenediamine, 4-aminobenzylamine, 3-aminobenzylamine, 4-(2- aminoethyl)aniline, p-xylylenediamine, m-xylyl
  • depositing the protective film in (b) is accomplished without exposing the substrate to plasma energy.
  • the protective coating includes a polyurethane or a polyurea.
  • etching the feature in the stack in (a) is performed in a reaction chamber, where depositing the protective film on the sidewalls of the feature in (b) is performed in the same reaction chamber.
  • the etching reactant includes one or more fluorocarbons or hydrofluorocarbons.
  • depositing the protective film in (b) occurs in a reaction chamber, where depositing the protective film in (b) further includes purging the reaction chamber at least once during each iteration of operation (b).
  • the stack includes alternating layers of (i) a silicon oxide material, and (ii) a silicon nitride material or polysilicon material.
  • the protective film is deposited along substantially an entire depth of the feature.
  • the feature has an aspect ratio of about 20 or greater at its final depth.
  • FIG.2B presents a flowchart for a method of depositing a protective film on sidewalls of a partially etched feature according to certain embodiments.
  • FIGS. 2C and 2D illustrate particular deposition reactions for forming the protective film where the reactants used include glutaraldehyde and ethylenediamine.
  • FIGS.3A–3D depict etched cylinders in a semiconductor substrate as the cylinders are cyclically etched and coated with a protective sidewall coating according to various embodiments.
  • FIGS. 4A–4C illustrate a reaction chamber that may be used to perform the etching processes described herein according to certain embodiments.
  • FIG.5 depicts a reaction chamber that may be used to perform the deposition processes described herein according to certain embodiments.
  • FIG. 6 shows a multi-station apparatus that may be used to perform the deposition processes in certain implementations.
  • FIG. 7 presents a cluster tool that may be used to practice both deposition and etching according to certain embodiments.
  • DETAILED DESCRIPTION [0021] In this application, the terms “semiconductor wafer,” “wafer,” “substrate,” “wafer substrate,” and “partially fabricated integrated circuit” are used interchangeably.
  • partially fabricated integrated circuit can refer to a silicon wafer during any of many stages of integrated circuit fabrication thereon.
  • a wafer or substrate used in the semiconductor device industry typically has a diameter of 200 mm, or 300 mm, or 450 mm.
  • the following detailed description assumes the invention is implemented on a wafer. However, the invention is not so limited.
  • the work piece may be of various shapes, sizes, and materials.
  • other work pieces that may take advantage of this invention include various articles such as printed circuit boards, magnetic recording media, magnetic recording sensors, mirrors, optical elements, micro-mechanical devices and the like.
  • Fabrication of certain semiconductor devices involves etching features into a dielectric material or materials.
  • the dielectric material may be a single layer of material or a stack of materials. In some cases a stack includes alternating layers of dielectric material (e.g., silicon nitride and silicon oxide).
  • One example etched feature is a cylinder, which may have a high aspect ratio.
  • One problem that arises during etching of high aspect ratio features is a non-uniform etching profile. In other words, the features do not etch in a straight downward direction. Instead, the sidewalls of the features are often bowed such that a middle portion of the etched feature is wider (i.e., further etched) than a top and/or bottom portion of the feature. This over-etching near the middle portion of the features can result in compromised structural and/or electronic integrity of the remaining material.
  • the portion of the feature that bows outwards may occupy a relatively small portion of the total feature depth, or a relatively larger portion.
  • the portion of the feature that bows outward is where the critical dimension (CD) of the feature is at its maximum.
  • the critical dimension corresponds to the diameter of the feature at a given spot. It is generally desirable for the maximum CD of the feature to be about the same as the CD elsewhere in the feature, for example at or near the bottom of the feature.
  • Conventional etch chemistry utilizes fluorocarbon etchants to form the cylinders in the dielectric material.
  • the fluorocarbon etchants are excited by plasma exposure, which results in the formation of various fluorocarbon fragments including, for example, CF, CF 2 , and CF 3 .
  • Reactive fluorocarbon fragments etch away the dielectric material at the bottom of a feature (e.g., cylinder) with the assistance of ions.
  • Other fluorocarbon fragments are deposited on the sidewalls of the cylinder being etched, thereby forming a protective polymeric sidewall coating. This protective sidewall coating promotes preferential etching at the bottom of the feature as opposed to the sidewalls of the feature. Without this sidewall protection, the feature begins to assume a non-uniform profile, with a wider etch/cylinder width where the sidewall protection is inadequate.
  • FIG.1 presents a figure of a cylinder 102 being etched in a dielectric material 103 coated with a patterned mask layer 106. While the following discussion sometimes refers to cylinders, the concepts apply to other feature shapes such as rectangles and other polygons.
  • a protective polymeric sidewall coating 104 is concentrated near the top portion of the cylinder 102.
  • C x F y chemistry provides both the etch reactant(s) for etching the cylinder vertically, as well as the reactant(s) that form the protective polymeric sidewall coating 104.
  • the middle portion of the cylinder 102 becomes wider than the top portion of the cylinder 102.
  • the wider middle portion of the cylinder 102 is referred to as the bow 105.
  • the bow can be numerically described in terms of a comparison between the critical dimension of the feature at the bow region (the relatively wider region) and the critical dimension of the feature below the bow region.
  • the bow may be numerically reported in terms of distance (e.g., the critical dimension at the widest part of the feature minus the critical dimension at the narrowest part of the feature below the bow) or in terms of a ratio/percent (the critical dimension at the widest part of the feature divided by the critical dimension at the narrowest part of the feature below the bow).
  • This bow 105, and the related non- uniform etch profile is undesirable. Because of the high ion energies often used in this type of etching process, bows are often created when etching cylinders of high aspect ratios. In some applications, bows are created even at aspect ratios as low as about 5. As such, conventional fluorocarbon etch chemistry is typically limited to forming relatively low aspect ratio cylinders in dielectric materials.
  • features are etched in a substrate (typically a semiconductor wafer) having dielectric material on the surface.
  • the etching processes are generally plasma-based etching processes.
  • the overall feature formation process may occur in stages: one stage directed at etching the dielectric material and another stage directed at forming a protective sidewall coating without substantially etching the dielectric material.
  • the protective sidewall coating passivates the sidewalls and prevents the feature from being over-etched (i.e., the sidewall coating prevents lateral etch of the feature). These two stages can be repeated until the feature is etched to its final depth.
  • Features may refer to non-planar structures of a substrate, typically a surface being modified in a semiconductor device fabrication operation.
  • Examples of features which may also be referred to as “negative features” or “recessed features,” include trenches, holes, vias, gaps, recessed regions, and the like. These terms may be used interchangeably in the present disclosure.
  • One example of a feature is a recess in the surface of the substrate.
  • a feature typically has an aspect ratio (depth to lateral dimension).
  • a feature may be characterized by one or more of narrow and/or re-entrant openings, constrictions within the feature, and high aspect ratios.
  • Features can have many different shapes including, but not limited to, cylinders, rectangles, squares, other polygonal recesses, trenches, etc.
  • Aspect ratios are a comparison of the depth of a feature to the critical dimension of the feature (often its width/diameter). For example, a cylinder having a depth of 2 ⁇ m and a width of 50 nm has an aspect ratio of 40:1, often stated more simply as 40. Since the feature may have a non-uniform critical dimension over the depth of the feature, the aspect ratio can vary depending on where it is measured.
  • an etched cylinder may have a middle portion that is wider than the top and bottom portions. This wider middle section may be referred to as the bow, as noted above.
  • An aspect ratio measured based on the critical dimension at the top of the cylinder i.e., the neck
  • an aspect ratio measured based on the critical dimension at the wider middle/bow of the cylinder As used herein, aspect ratios are measured based on the critical dimension proximate the opening of the feature, unless otherwise stated.
  • a high aspect ratio feature is one having an aspect ratio of at least about 5, at least about 10, at least about 20, at least about 30, at least about 40, at least about 50, at least about 60, at least about 80, or at least about 100.
  • the critical dimension of the features formed through the disclosed methods may be about 200 nm or less, for example about 100 nm or less, about 50 nm or less, or about 20 nm or less.
  • the material into which the feature is etched may be a dielectric material in various cases.
  • Example materials include, but are not limited to, silicon oxides, silicon nitrides, silicon carbides, oxynitrides, oxycarbides, carbo-nitrides, doped versions of these materials (e.g., doped with boron, phosphorus, etc.), and laminates from any combinations of these materials.
  • Particular example materials include stoichiometric and non-stoichiometric formulations of SiO 2 , SiN, SiON, SiOC, SiCN, etc.
  • the material or materials being etched may also include other elements, for example hydrogen in various cases.
  • a nitride and/or oxide material being etched has a composition that includes hydrogen.
  • silicon oxide materials, silicon nitride materials, etc. include both stoichiometric and non-stoichiometric versions of such materials, and that such materials may have other elements included, as described above.
  • One application for the disclosed methods is in the context of forming a DRAM device.
  • the feature may be etched primarily in silicon oxide.
  • the substrate may also include one, two, or more layers of silicon nitride, for instance.
  • a substrate includes a silicon oxide layer sandwiched between two silicon nitride layers, with the silicon oxide layer being between about 800 nm and about 1200 nm thick and one or more of the silicon nitride layers being between about 300 nm and about 400 nm thick.
  • the etched feature may be a cylinder having a final depth between about 1 ⁇ m and about 3 ⁇ m, for example between about 1.5 ⁇ m and about 2 ⁇ m.
  • the cylinder may have a width between about 20 nm and about 50 nm, for example between about 25 nm and about 30 nm.
  • VNAND vertical NAND
  • the material into which the feature is etched may have a repeating layered structure.
  • the material may include alternating layers of oxide (e.g., SiO 2 ) and nitride (e.g., SiN), or alternating layers of oxide (e.g., SiO 2 ) and polysilicon.
  • the alternating layers form pairs of materials. In some cases, the number of pairs may be at least about 20, at least about 30, at least about 40, at least about 60, or at least about 70.
  • the oxide layers may have a thickness between about 20 nm and about 50 nm, for example between about 30 nm and about 40 nm.
  • the nitride or polysilicon layers may have a thickness between about 20 nm and about 50 nm, for example between about 30 nm and about 40 nm.
  • the feature etched into the alternating layer may have a depth between about 2 ⁇ m and about 6 ⁇ m, for example between about 3 ⁇ m and about 5 ⁇ m.
  • the feature may have a width between about 50 nm and about 150 nm, for example between about 50 nm and about 100 nm.
  • FIG.2A presents a flowchart for a method of forming an etched feature in a semiconductor substrate.
  • the operations shown in FIG.2A are described in relation to FIGS.3A– 3D, which show a partially fabricated semiconductor substrate as the feature is etched.
  • a feature 302 is etched to a first depth in a substrate having dielectric material 303 and a patterned mask layer 306. This first depth is only a fraction of the final desired depth of the feature.
  • the chemistry used to etch the feature may be a fluorocarbon-based chemistry ( C x F y ) or hydrofluorocarbon-based chemistry (H x F y C z ). Other etch chemistries may be used.
  • This etching operation 201 may result in formation of a first sidewall coating 304.
  • the first sidewall coating 304 may be a polymeric sidewall coating, as described with relation to FIG. 1.
  • the first sidewall coating 304 extends toward the first depth, though in many cases the first sidewall coating 304 does not actually reach the bottom of the feature 302.
  • the first sidewall coating 304 indirectly forms from the C x F y etching chemistry as certain fluorocarbon species/fragments deposit on the sidewalls of the feature (i.e., certain fluorocarbon species are precursors for the first sidewall coating 304).
  • One reason that the first sidewall coating 304 does not reach the bottom of the feature 302 may relate to the sticking coefficient of the precursors that form the coating.
  • the sticking coefficient of these first sidewall coating precursors is too high, which causes the substantial majority of the precursor molecules to attach to the sidewalls soon after entering the feature. As such, few sidewall coating precursor molecules are able to penetrate deep into the feature where sidewall protection is beneficial.
  • the first sidewall coating 304 therefore provides only partial protection against over-etching of the sidewalls of the feature 302. In some implementations, the etch conditions provide little, if any, sidewall protection. [0035]
  • the etching process is stopped. After the etching is stopped, a second sidewall coating 310 is deposited in operation 205. In some cases, the second sidewall coating 310 may be effectively the first sidewall coating.
  • This deposition may occur through various reaction mechanisms including, but not limited to, chemical vapor deposition (CVD) methods, atomic layer deposition (ALD) methods (either of which may or may not be plasma- assisted), and molecular layer deposition (MLD) methods.
  • MLD methods may deposit thin films of organic polymer using ALD-like cycles involving two half-reactions. In some cases MLD methods may be driven in a less adsorption-limited manner than conventional ALD methods. For example, certain MLD methods may utilize under- or over-saturation of reactants.
  • ALD and MLD methods are particularly well suited for forming conformal films that line the sidewalls of the features in certain embodiments.
  • FIG. 2B illustrates a flowchart for a method 250 of depositing an organic polymeric second protective sidewall coating 310 through an MLD process.
  • ALD and CVD methods may also be used, as described further below.
  • Method 250 begins with operation 251, where a first reactant is flowed into the reaction chamber and adsorbs onto the substrate surface.
  • the reactant may penetrate deep into a partially etched feature and adsorb onto the sidewalls of the feature.
  • the first reactant is a dialdehyde or trialdehyde.
  • the first reactant may be glutaraldehyde (C 5 H 8 O 2 ).
  • the first reactant forms an adsorbed layer, as shown by adsorbed precursor layer 312 in FIG.3B.
  • the reaction chamber may be optionally purged to remove excess first reactant from the reaction chamber.
  • the second reactant is delivered to the reaction chamber.
  • the second reactant may be a diamine, a diol, a thiol, or a trifunctional compound.
  • the second reactant may be ethylenediamine (C 2 H 8 N 2 ).
  • the second reactant reacts with the first reactant to form a protective film on the substrate.
  • the protective film formed may be the second sidewall coating 310 as shown in FIGS. 3C and 3D.
  • the protective film may form through a thermal reaction, without reliance on any plasma.
  • the reaction chamber may be optionally purged. The purges in operations 253 and 257 may occur by sweeping the reaction chamber with a non-reactive gas, by evacuating the reaction chamber, or some combination thereof.
  • the purpose of the purges is to remove any non-adsorbed reactants and byproducts from the reaction chamber. While the purge operations 253 and 257 are both optional, they may help prevent unwanted gas phase reactions, and may result in improved deposition results. [0039]
  • operation 251 may involve both adsorbing additional first reactant onto the substrate, and reaction of the first reactant with the second reactant, which may be present due to a previous iteration of operation 255.
  • both operations 251 and 255 may involve a reaction between the first and second reactants.
  • the substrate may be subject to another etching process as shown in operation 211 of FIG.2A.
  • the deposition method 250 may be used to form a layer of organic polymeric film in a number of cases.
  • FIG. 2C illustrates steps 251–257 of FIG.
  • the first reactant is glutaraldehyde and the second reactant is ethylenediamine.
  • a first reactant of glutaraldehyde is flowed in vapor phase into the reaction chamber and adsorbs onto the substrate 260.
  • the portion of the substrate 260 shown in FIG. 2C is a sidewall of a partially etched cylinder.
  • the reaction chamber is optionally purged, for example by flowing a non-reactive purge gas through the reaction chamber.
  • a second reactant of ethylenediamene is flowed in vapor phase into the reaction chamber.
  • FIG. 2D further illustrates the reaction that occurs in operation 255 where the first reactant is glutaraldehyde and the second reactant is ethylenediamine. Without being limited by any theory, the reactions shown in FIG. 2D may be result in two possible reaction products. One reaction product may be shown in the first row and is a partial reaction product.
  • Another reaction product may be shown in the second row and is a full reaction product resulting in an imine product.
  • These reactants may be particularly useful in applications where it is desired to form the protective film at a relatively low temperature. These reactants have been shown to effectively and efficiently react with one another even at temperatures much lower than are typically used in similar MLD and ALD reactions. Many thermal ALD reactions (which do not use plasma) are performed at much higher temperatures, for example at least about 200°C. Low temperature deposition is particularly useful in certain contexts. In some cases, the use of a low temperature non-plasma deposition may help enable the deposition to occur in the same reaction chamber as the etching reaction, such that transfer between two different reaction chambers is not needed. MLD processes are further discussed in U.S. Patent Application No.
  • the disclosed MLD method 250 of FIG.2B is well suited for forming a conformal film that coats the entire sidewalls of the feature.
  • MLD methods may be particularly useful is that they can achieve a very high degree of conformality because the reaction is driven by thermal energy rather than plasma energy.
  • the resulting reactants may be radical species with high surface reactivity.
  • This approach therefore may create reactants with a limited ability to penetrate into high aspect ratio features and therefore results in poorer conformality and/or higher dosage requirements compared to thermal methods.
  • plasmas used in semiconductor fabrication are not uniform within a reaction chamber, plasma non-uniformities can lead to non-uniform deposition results across the substrate.
  • it is easier to deliver uniform thermal energy to a substrate for example by providing a uniform heat source on a substrate support.
  • Plasma energy is often used to drive reactions at relatively low temperatures (e.g., less than about 200°C).
  • a semiconductor device has a particular thermal budget during fabrication, and care may be taken to process the substrate at lower temperatures to conserve the thermal budget and therefore avoid damaging the device.
  • the use of plasma can also have a deleterious effect on conformality and/or uniformity, as mentioned.
  • particular reactants are used to deposit a protective layer at a relatively low temperature, thereby capturing both the uniformity benefits related to thermal processing and the low temperature/thermal budget benefits often associated with plasma processing.
  • One example of a pair of reactants that may be used at a relatively low temperature to deposit a protective layer include glutaraldehyde and ethylenediamine, as discussed in relation to FIGS.2C and 2D.
  • the method then repeats the operations of partially etching a feature in the substrate (operation 211, analogous to operation 201), stopping the etch (operation 213, analogous to operation 203), depositing protective coating on sidewalls of the partially etched features (operation 215, analogous to operation 205), and stopping the deposition (operation 217, analogous to operation 207).
  • operation 211 it is determined whether the feature is fully etched. If the feature is not fully etched, the method repeats from operation 211 with additional etching and deposition of protective coatings.
  • the etching operation 211 may alter the second sidewall coating 310 to form a film that is even more etch resistant than the film deposited in operations 205 and 215.
  • the deposition operation 205 is performed through the method 250, to thereby form an organic polymer film layer that includes carbon, nitrogen, oxygen, and hydrogen. Once the feature is fully etched, the method is complete. [0045] In various embodiments, the etching operation 201 and the protective sidewall coating deposition operation 205 are cyclically repeated a number of times. For instance, these operations may each occur at least twice (as shown in FIG. 2A), for example at least about three times, or at least about 5 times. In some cases, the number of cycles (each cycle including etching operation 201 and protective sidewall coating deposition operation 205, with etching operation 211 and deposition operation 215 counting as a second cycle) is between about 2–10, for example between about 2–5.
  • the distance etched may be uniform between cycles, or it may be non-uniform. In certain embodiments, the distance etched in each cycle decreases as additional etches are performed (i.e., later performed etching operations may etch less extensively than earlier performed etching operations).
  • the thickness of the second sidewall coating 310 deposited in each deposition operation 205 may be uniform between cycles, or the thickness of such coatings may vary. Example thicknesses for the second sidewall coating 310 during each cycle may range between about 1 nm and about 10 nm, for example between about 3 nm and about 5 nm. Further, the type of coating that is formed may be uniform between the cycles, or it may vary.
  • the etching operation 201 and the deposition operation 205 may occur in the same reaction chamber or in different reaction chambers.
  • the etching operation 201 occurs in a first reaction chamber and the deposition operation 205 occurs in a second reaction chamber, with the first and second reaction chambers together forming a multi-chamber processing apparatus such as a cluster tool.
  • Load locks and other appropriate vacuum seals may be provided for transferring the substrate between the relevant chambers in certain cases.
  • the substrate may be transferred by a robot arm or other mechanical structure.
  • a reaction chamber used for etching (and in some cases deposition) may be a FlexTM reaction chamber, for example from the 2300 ® FlexTM product family available from Lam Research Corporation of Fremont, CA.
  • a reaction chamber used for deposition may be chamber from the Vector ® product family or the Altus ® product family, both available from Lam Research Corporation.
  • the use of a combined reactor for both etching and deposition may be beneficial in certain embodiments as the need to transfer the substrate is avoided.
  • the use of different reactors for etching and deposition may be beneficial in other embodiments where it is desired that the reactors are particularly optimized for each operation.
  • both the etching and the deposition operations occur in the same reaction chamber (e.g., a FlexTM reaction chamber), and the deposition reaction occurs through an MLD method such as the method 250 of FIG. 2B.
  • Low-temperature thermally-driven deposition reactions may be particularly well suited for performing in a reaction chamber that is otherwise designed to perform etching.
  • the deposition operation helps optimize the etching operation by forming a deeply penetrating protective layer that minimizes or prevents lateral etch of the feature during the etching operation. This promotes formation of etched features having very vertical sidewalls with little or no bowing.
  • a final etched feature having an aspect ratio of at least about 80 has a bow less than about 60% (measured as the widest critical dimension-narrowest critical dimension below that/narrowest critical dimension above that *100).
  • a final etched feature having an aspect ratio of at least about 40 has a bow less than about 20%.
  • Example dielectric materials include silicon oxides, silicon nitrides, silicon carbides, oxynitrides, oxycarbides, carbo-nitrides, doped versions of these materials (e.g., doped with boron, phosphorus, etc.), and laminates from any combinations of these materials.
  • Particular example materials include stoichiometric and non-stoichiometric formulations of SiO 2 , SiN, SiON, SiOC, SiCN, etc.
  • the dielectric material that is etched may include more than one type/layer of material. In particular cases, the dielectric material may be provided in alternating layers of SiN and SiO 2 or alternating layers of polysilicon and SiO 2 . Further details are provided above.
  • the substrate may have an overlying mask layer that defines where the features are to be etched.
  • the mask layer is Si, and it may have a thickness between about 500 nm and about 1500 nm.
  • the etching process is a reactive ion etch process that involves flowing a chemical etchant into a reaction chamber (often through a showerhead), generating a plasma from, inter alia, the etchant, and exposing a substrate to the plasma.
  • the plasma dissociates the etchant compound(s) into neutral species and ion species (e.g., charged or neutral materials such as CF, CF 2 and CF 3 ).
  • the plasma is a capacitively coupled plasma in many cases, though other types of plasma may be used as appropriate. Ions in the plasma are directed toward the wafer and cause the dielectric material to be etched away upon impact.
  • Example apparatus that may be used to perform the etching process include the 2300 ® FLEXTM product family of reactive ion etch reactors available from Lam Research Corporation of Fremont, CA. This type of etch reactor is further described in the following U.S. Patents, each of which is herein incorporated by reference in its entirety and for all purposes: U.S. Patent No. 8,552,334, and U.S. Patent No. 6,841,943.
  • Various reactant options are available to etch the features into the dielectric material.
  • the etching chemistry includes one or more fluorocarbons.
  • the etching chemistry may include other etchants such as NF 3 .
  • One or more co-reactants may also be provided.
  • oxygen (O 2 ) is provided as a co-reactant.
  • the oxygen may help moderate formation of a protective polymer sidewall coating (e.g., the first sidewall coating 304 of FIGS.3A–3D).
  • the etching chemistry includes a combination of fluorocarbons and oxygen. For instance, in one example the etching chemistry includes C 4 F 6 , C 4 F 8 , N 2 , CO, CF 4 , and O 2 .
  • the fluorocarbons may flow at a rate between about 0 sccm and about 500 sccm, for example between about 10 sccm and about 200 sccm.
  • C 4 F 6 and C 4 F 8 are used, the flow of C 4 F 6 may range between about 10 sccm and about 200 sccm and the flow of C 4 F 8 may range between about 10 sccm and about 200 sccm.
  • the flow of oxygen may range between about 0 sccm and about 500 sccm, for example between about 10 sccm and about 200 sccm.
  • the flow of nitrogen may range between about 0 sccm and about 500 sccm, for example between about 10 sccm and about 200 sccm.
  • the flow of tetrafluoromethane may range between about 0 sccm and about 500 sccm, for example between about 10 sccm and about 200 sccm.
  • the flow of carbon monoxide may range between about 0 sccm and about 500 sccm, for example between about 10 sccm and about 200 sccm. These rates are appropriate in a reactor volume of approximately 50 liters.
  • the substrate temperature during etching is between about 30°C and about 200oC.
  • the pressure during etching is between about 5 mTorr and about 80 mTorr.
  • the ion energy may be relatively high, for example between about 1 kV and about 10 kV.
  • the ion energy is determined by the applied RF power.
  • dual- frequency RF power is used to generate the plasma.
  • the RF power may include a first frequency component (e.g., about 2 MHz) and a second frequency component (e.g., about 60 MHz). Different powers may be provided at each frequency component.
  • the first frequency component (e.g., about 2 MHz) may be provided at a power between about 3 kW and about 24 kW, for example about 10 kW
  • the second frequency component (e.g., about 60 MHz) may be provided at a lower power, for example between about 0.5 kW and about 10 kW, for example about 2 kW.
  • three different frequencies of RF power are used to generate the plasma.
  • the combination could be 2 MHz, 27 MHz, and 60 MHz.
  • Power levels for the third frequency component (e.g. about 27 MHz) may be similar to those powers specified above for the second frequency component. These power levels assume that the RF power is delivered to a single 300 mm wafer.
  • the power levels can be scaled linearly based on substrate area for additional substrates and/or substrates of other sizes (thereby maintaining a uniform power density delivered to the substrate).
  • the applied RF power during etching may be modulated between a higher power and a lower power at a repetition rate between about 100 Hz and about 40,000 Hz.
  • Each cycle of the etching process etches the dielectric material to some degree.
  • the distance etched during each cycle may be between about 10 nm and about 500 nm, for example between about 50 nm and about 200 nm.
  • the total etch depth will depend on the particular application. For some cases (e.g., DRAM) the total etch depth may be between about 1.5 ⁇ m and about 2 ⁇ m.
  • the total etch depth may be at least about 3 ⁇ m, for example at least about 4 ⁇ m. In these or other cases, the total etch depth may be about 5 ⁇ m or less.
  • the etching process can produce a first sidewall coating (e.g., first sidewall coating 304, which may be polymeric).
  • first sidewall coating 304 which may be polymeric.
  • the depth of this sidewall coating may be limited to the area near the upper portion of the feature, and may not extend all the way down into the feature where the sidewall protection is also needed.
  • a separate deposition operation is performed, as described herein, to form a sidewall coating that covers more depth of the etched feature.
  • the deposition process is performed primarily to deposit a protective layer on the sidewalls within the etched features.
  • This protective layer should extend deep into the feature, even in high aspect ratio features. Formation of the protective layer deep within high aspect ratio features may be enabled by reactants that have relatively low sticking coefficients. Further, reaction mechanisms that rely on adsorption of reactants (e.g., ALD and MLD reactions) can promote formation of the protective layer deep within the etched features.
  • Deposition of the protective layer begins after the feature is partially etched. As noted in the discussion of FIG.2A, the deposition operation may be cycled with the etching operation to form additional sidewall protection as the feature is etched deeper into the dielectric material.
  • deposition of the protective layer begins at or after the feature is etched to at least about 1/3 of its final depth. In some embodiments, deposition of the protective layer begins once the feature reaches an aspect ratio of at least about 2, at least about 5, at least about 10, at least about 15, at least about 20, or at least about 30. In these or other cases, the deposition may begin before the feature reaches an aspect ratio of about 4, about 10, about 15, about 20, about 30, about 40, or about 50. In some embodiments, deposition begins after the feature is at least about 1 ⁇ m deep, or at least about 1.5 ⁇ m deep (e.g., in VNAND embodiments where the final feature depth is 3–4 ⁇ m).
  • deposition begins after the feature is at least about 600 nm deep, or at least about 800 nm deep (e.g., in DRAM embodiments where the final feature depth is 1.5–2 ⁇ m deep).
  • the optimal time for initiating deposition of the protective layer is immediately before the sidewalls would otherwise become overetched to form a bow. The exact timing of this occurrence depends on the shape of the feature being etched, the material being etched, the chemistry used to etch and to deposit the protective layer, and the process conditions used to etch and deposit the relevant materials.
  • the protective layer that forms during the deposition process may have various compositions. As explained, the protective layer should penetrate deep into an etched feature, and should be relatively resistant to the etching chemistry used to etch the feature.
  • the protective layer is a ceramic material or an organic polymer.
  • Example organic materials may include polyolefins, for example polyfluoroolefins in some cases.
  • polyfluoroolefins in some cases.
  • One particular example is a polytetrafluoroethylene.
  • a precursor fragment used for forming some polyfluoroolefins is CF 2 (which may come from hexafluoropropylene oxide (HFPO) in certain cases), which has a very low sticking coefficient and is therefore good at penetrating deep into an etched feature.
  • CF 2 which may come from hexafluoropropylene oxide (HFPO) in certain cases
  • HFPO hexafluoropropylene oxide
  • the protective layer that forms during the deposition process is an organic polymer.
  • the organic polymer is a polyazomethine.
  • a polyazomethine protective layer is formed from a combination of an amine (e.g., diamine) and an aldehyde (e.g., dialdehyde).
  • the organic polymer is a polythioacetal.
  • the polythioacetal protective layer is formed from a combination of an aldehyde (e.g., dialdehyde) and a thiol.
  • the organic polymer is a polyurea.
  • the polyurea protective layer is formed from a combination of an isocyanate (e.g., diisocyanate) and an amine (e.g., diamine).
  • the organic polymer is a polyurethane.
  • the polyurethane protective layer is formed from a combination of an isocyanate (e.g., diisocyanate) and an alcohol (e.g., diol).
  • an isocyanate e.g., diisocyanate
  • an alcohol e.g., diol
  • Such reactants may be used in an MLD process to form the protective layer in various embodiments, for example as shown in FIGS.2C and 2D.
  • the protective film includes nitrogen – e.g., a nitrogen-containing polymer – a nitrogen-containing reactant may be used.
  • a nitrogen-containing reactant contains at least one nitrogen, for example, nitrogen, ammonia, hydrazine, amines (e.g., amines bearing carbon) such as methylamine, dimethylamine, ethylamine, ethylenediamine, isopropylamine, t-butylamine, di- t-butylamine, cyclopropylamine, sec-butylamine, cyclobutylamine, isoamylamine, 2- methylbutan-2-amine, trimethylamine, diisopropylamine, diethylisopropylamine, di-t- butylhydrazine, as well as aromatic containing amines such as anilines, pyridines, and benzylamines.
  • amines e.g., amines bearing carbon
  • Amines may be primary, secondary, tertiary or quaternary (for example, tetraalkylammonium compounds).
  • a nitrogen-containing reactant can contain heteroatoms other than nitrogen, for example, hydroxylamine, t-butyloxycarbonyl amine and N-t-butyl hydroxylamine are nitrogen-containing reactants. Another example is nitrous oxide.
  • oxygen-containing reactants include, but are not limited to, oxygen, ozone, nitrous oxide, nitric oxide, nitrogen dioxide, carbon monoxide, carbon dioxide, sulfur oxide, sulfur dioxide, oxygen-containing hydrocarbons (C x H y O z ), water, acyl halides, acid anhydrides, mixtures thereof, etc.
  • the disclosed precursors are not intended to be limiting.
  • the first reactant may be an acyl halide (e.g., a diacyl halide), for example an acyl chloride (e.g., a diacyl chloride), (though other acyl halides may be used in some cases).
  • the first reactant of diacyl chloride can be ethanedioyl dichloride (also referred to as oxalyl dichloride, ClCOCOCl), malonyl dichloride (also referred to as malonyl chloride, CH 2 (COCl) 2 ), succinyl dichloride (also referred to as succinyl chloride, ClCOCH 2 CH 2 COCl), pentanedioyl dichloride (also referred to as glutaryl chloride, ClCO(CH 2 ) 3 COCl), or combinations thereof.
  • ethanedioyl dichloride also referred to as oxalyl dichloride, ClCOCOCl
  • malonyl dichloride also referred to as malonyl chloride, CH 2 (COCl) 2
  • succinyl dichloride also referred to as succinyl chloride, ClCOCH 2 CH 2 COCl
  • pentanedioyl dichloride also
  • the first reactant may be an acid anhydride such as an anhydride of a dicarboxylic acid giving rise to any of the above diacyl chlorides.
  • an acid anhydride that may be used is maleic anhydride.
  • the first reactant may be an organic metal-containing precursor, one example of which is trimethylaluminum (TMA).
  • TMA trimethylaluminum
  • the first reactant may alternatively be an aldehyde (e.g., dialdehyde or trialdehyde) or at least include an aldehyde functional group.
  • the first reactant can be succindialdehyde (C 4 H 6 O 2 ), glutaraldehyde (C 5 H 8 O 2 ), adipaldehyde (C 6 H 10 O 2 ), terephth-aldehyde (C 8 H 6 O 2 ), 1,4- benzenedicarboxaldehyde (C 6 H 4 (CHO) 2 ), ortho-phthalaldehyde (C 8 H 6 O 2 ), 1,2 benzenedicarboxaldehyde (C 6 H 4 (CHO) 2 ), 2-methylglutaraldehyde (C 6 H 10 O 2 ), or combinations thereof.
  • the first reactant may alternatively be an isocyanate (e.g., diisocyanate) or at least include an isocyanate functional group.
  • the diisocyanate in some cases may be: tolylene-2,4-diisocyanate, 1,3-bis(isocyanatomethyl)cyclohexane, hexamethylene diisocyanate, m-xylylene diisocyanate, 1,3-bis(1-isocyanato-1-methylethyl)benzene, isophorone diisocyanate, diphenylmethane 4,4'- diisocyanate, 4,4'-methylenebis(cyclohexyl isocyanate), tolylene-2,6-diisocyanate, 1,4-phenylene diisocyanate, 1,3-phenylene diisocyanate, 3,3'-dimethyl-4,4'-biphenylene diisocyanate
  • aldehydes or isocyanates may be used in the alternative to acyl halides.
  • Acyl halides may have a propensity for self-reaction, thereby resulting in a short shelf life even at low temperatures.
  • Dialdehydes are generally more stable than acyl halides such as di-acyl chlorides. Dialdehydes also tend to be more volatile than acyl halides such as di-acyl chlorides. Dialdehydes typically have higher vapor pressures so that they are easier to vaporize and deliver to the substrate. Higher dosing pressures reduce dose times and reduce deposition process times, thereby increasing throughput.
  • Dialdehydes may have a propensity to stick to etched surfaces. Without being limited by any theory, dialdehydes may tend to stick to surfaces that have been etched by fluorocarbon chemistries.
  • One of the challenges of depositing conformal liners by MLD is initiating deposition on etched surfaces. Dialdehydes may selectively adhere to surfaces etched by fluorocarbon or hydrofluorocarbon chemistries to improve initiation of the protective film on sidewalls within the etched features.
  • the second reactant may include an amine or alcohol functional group.
  • the second reactant may be a diamine.
  • the diamine in some cases may be 1,2-ethanediamine (also referred to as ethylenediamine, (NH 2 (CH 2 ) 2 NH 2 )), 1,3- propanediamine (NH 2 (CH 2 ) 3 NH 2 ), 1,4-butanediamine (NH 2 (CH 2 ) 4 NH 2 ), or combinations thereof.
  • the diamine in some other cases may be ethylenediamine, m-xylylenediamine, isophoronediamine, 1,3-cyclohexanebis(methylamine), 1,4-bis(aminomethyl)cyclohexane, 4,4'- methylenebis(2-methylcyclohexylamine), 4,4'-methylenebis(cyclohexylamine), m- phenylenediamine, p-phenylenediamine, 4-aminobenzylamine, 3-aminobenzylamine, 4-(2- aminoethyl)aniline, p-xylylenediamine, m-xylylenediamine, or combinations thereof.
  • the second reactant may be a diol in some cases.
  • Example diols include ethylene glycol, 1,3-propanediol, 1,4- butanediol, or combinations thereof.
  • the second reactant may be a thiol in some cases.
  • Example thiols include 1,2-ethanedithiol, 1,3-propanedithiol, 1,4-butanedithiol, or combinations thereof.
  • the second reactant may be a trifunctional compound such as ( ⁇ )-3-amino- 1,2-propanediol, glycerol, bis(hexamethylene)triamine, melamine, diethylenetriamine, ( ⁇ )-1,2,4- butanetriol, cyanuric chloride, or combinations thereof.
  • a dialdehyde such as glutaraldehyde may be used with ethylenediamine to form a polyamide protective coating.
  • the deposited organic polymer protective coating may have greater etch resistance than if the first reactant were an acyl halide.
  • the deposited organic polymer protective coating may be highly resistant to plasma etching, thereby providing an effective sidewall protective film against subsequent lateral etch of dielectric material during etching operations.
  • the organic polymer protective coating may be deposited as an in-situ process in an etch reactor.
  • Dialdehydes may react with diamines at relatively low temperatures (e.g., less than 100°C) and at relatively low doses (e.g., less than 10 Torr-sec). Accordingly, the organic polymer coating may be deposited in a reaction chamber between etch operations without introducing an air break. In some embodiments, deposition of the organic polymer coating may occur in the same reaction chamber as etch operations during formation of recessed features in the substrate.
  • a diisocyanate may be used with ethylenediamine to form a polyurea protective coating.
  • Example purge gases include, but are not limited to, He, Ar, Ne, H 2 , N 2 , and combinations thereof.
  • reactants may also be used as known by those of ordinary skill in the art.
  • a metal-containing reactant may be used
  • a carbon-containing reactant may be used.
  • reactant combinations will be provided, though these examples are not intended to be limiting.
  • a dialdehyde such as glutaraldehyde is adsorbed on to the surface of a substrate to form a precursor film.
  • the precursor film may be exposed to ethylenediamine to thereby form a protective organic polymer film as shown in FIGS. 2C and 2D.
  • the reaction may occur without exposure to plasma, relying instead on thermal energy to drive the reaction.
  • the precursor(s) used to form the protective layer may have relatively low sticking coefficients, thereby enabling the precursors to penetrate deep into the etched features.
  • the sticking coefficient of the precursors may be about 0.05 or less, for example about 0.001 or less.
  • the reaction mechanism may be cyclic (e.g., ALD or MLD) or continuous (e.g., CVD). Any method that results in the formation of the protective sidewall film at high aspect ratios may be used.
  • ALD and MLD reactions may be particularly well suited for this purpose due to their conformality and adsorption-based mechanisms.
  • plasma assisted ALD reactions involve cyclically performing the following operations: (a) delivery of a first reactant to form an adsorbed precursor layer, (b) an optional purge operation to remove the first reactant from the reaction chamber, (c) delivery of a second reactant (often provided in the form of a plasma), where plasma energy drives a reaction between the first and second reactants, (d) an optional purge to remove excess reactant and byproducts, and (e) repeating (a)–(d) until the film reaches a desired thickness.
  • MLD reactions may involve cyclically performing the operations of: (a) delivery of a first reactant to form an adsorbed precursor layer, (b) an optional purge operation to remove unadsorbed first reactant from the reaction chamber, (c) delivery of a second reactant, where thermal energy drives a reaction between the first and second reactants to form the protective film, (d) an optional purge operation to remove unadsorbed reactants and byproducts, and (e) repeating (a)–(d) until the protective film reaches a desired thickness.
  • the first and second reactants may be delivered in gas phase, and the reaction may occur without the use of plasma.
  • the film may be adsorption limited to some degree. This adsorption-based regime results in the formation of very conformal films that can line substantially the entire depth of the feature.
  • the protective coating may be deposited along a substantial fraction of the length/depth of a partially etched feature. In some cases, the protective film may be deposited along at least about 80%, at least about 90%, or at least about 95% of the length/depth of the feature. In particular embodiments the protective film deposits along the entire length/depth of the feature.
  • plasma assisted CVD reactions involve delivering reactant(s) to the substrate continuously while the substrate is exposed to plasma.
  • CVD reactions are gas phase reactions, which deposit reaction products on the substrate surface.
  • the following reaction conditions may be used in certain embodiments where the deposition reaction occurs through MLD methods. The conditions are described in relation to the method 250 shown in FIG.2B.
  • the first reactant may be flowed into the reaction chamber. In certain embodiments, the first reactant may flow at a rate between about 0.1 sccm and about 5000 sccm, for example between about 500 sccm and about 2000 sccm, for a duration between about 0.1 s and about 30 s, for example between about 0.2 s and about 5 s.
  • the reaction chamber may be optionally purged for a duration between about 0.05 s and about 10 s, for example between about 0.2 s and about 3 s.
  • the purge may occur by evacuating the reaction chamber and/or by flowing an inert gas through the reaction chamber. Where inert gas is used, it may flow at a rate between about 20 sccm and about 5000 sccm in some cases.
  • the second reactant may be flowed into the reaction chamber.
  • the second reactant may flow at a rate between about 10 sccm and about 5000 sccm, or between about 500 sccm and about 2000 sccm, for a duration between about 0.1 s and about 30 s, for example between about 0.2 s and about 5 s.
  • Thermal energy may be provided to drive a reaction between the first and second reactants. Thermal energy is available to an extent primarily controlled by the temperature of the substrate. In some cases, thermal energy may be regulated by controlling the substrate temperature via a substrate support/pedestal. In these or other cases, thermal energy may be provided by delivering the reactants at particular temperatures.
  • the temperature of the substrate may be maintained between about -10°C and about 350°C, for example between about 0°C and about 200°C, or between about 10°C and about 100°C, or between about 20°C and about 50°C. In certain embodiments, the substrate is maintained at a temperature below about 200°C, below about 100°C, below about 50°C, or below about 30°C. In these or other embodiments, the temperature of one or both of the reactant gases delivered to the reaction chamber (and/or inert gases used to purge) may correspond to the substrate temperatures recited in this paragraph.
  • the reaction chamber may be optionally purged using the conditions described above in relation to operation 253.
  • terminal ends of the molecules forming the organic polymeric film form a hydroxyl, an amine, or a thiol.
  • a diamine is used as the second reactant
  • -NH 2 may form the terminal ends of the molecules forming the organic polymeric film.
  • a diol is used as the second reactant
  • -OH may form the terminal ends of the molecules forming the organic polymeric film.
  • the first reactant and the second reactant used to form the organic polymeric film may be flowed into the vacuum chamber until they reach about 100% saturation on a plasma or process gas exposed surface of the vacuum chamber such that a layer of the organic polymeric film deposited on the plasma or process gas exposed surface of the vacuum chamber has a maximum thickness. Under- and over-saturation may also be practiced in some embodiments, for example to tailor the deposition rate as desired.
  • the reaction conditions herein are provided as guidance and are not intended to be limiting. V.
  • a suitable apparatus includes hardware for accomplishing the process operations and a system controller having instructions for controlling process operations in accordance with the present invention.
  • the hardware may include one or more process stations included in a process tool.
  • One process station may be an etching station and another process station may be a deposition station.
  • etching and deposition occur in a single station/chamber.
  • FIGS. 4A–4C illustrate an embodiment of an adjustable gap capacitively coupled confined RF plasma reactor 400 that may be used for performing the etching operations described herein.
  • a vacuum chamber 402 includes a chamber housing 404, surrounding an interior space housing a lower electrode 406.
  • an upper electrode 408 is vertically spaced apart from the lower electrode 406.
  • Planar surfaces of the upper and lower electrodes 408, 406 are substantially parallel and orthogonal to the vertical direction between the electrodes.
  • the upper and lower electrodes 408, 406 are circular and coaxial with respect to a vertical axis.
  • a lower surface of the upper electrode 408 faces an upper surface of the lower electrode 406.
  • the spaced apart facing electrode surfaces define an adjustable gap 410 therebetween.
  • the lower electrode 406 is supplied RF power by an RF power supply (match) 420.
  • RF power is supplied to the lower electrode 406 though an RF supply conduit 422, an RF strap 424 and an RF power member 426.
  • a grounding shield 436 may surround the RF power member 426 to provide a more uniform RF field to the lower electrode 406.
  • a wafer is inserted through wafer port 482 and supported in the gap 410 on the lower electrode 406 for processing, a process gas is supplied to the gap 410 and excited into plasma state by the RF power.
  • the upper electrode 408 can be powered or grounded.
  • the lower electrode 406 is supported on a lower electrode support plate 416.
  • An RF bias housing 430 supports the lower electrode 406 on an RF bias housing bowl 432.
  • the bowl 432 is connected through an opening in a chamber wall plate 418 to a conduit support plate 438 by an arm 434 of the RF bias housing 430.
  • the RF bias housing bowl 432 and RF bias housing arm 434 are integrally formed as one component, however, the arm 434 and bowl 432 can also be two separate components bolted or joined together.
  • the RF bias housing arm 434 includes one or more hollow passages for passing RF power and facilities, such as gas coolant, liquid coolant, RF energy, cables for lift pin control, electrical monitoring and actuating signals from outside the vacuum chamber 402 to inside the vacuum chamber 402 at a space on the backside of the lower electrode 406.
  • the RF supply conduit 422 is insulated from the RF bias housing arm 434, the RF bias housing arm 434 providing a return path for RF power to the RF power supply 420.
  • a facilities conduit 440 provides a passageway for facility components. Further details of the facility components are described in U.S. Patent Nos. 5,948,704 and 7,732,728 and are not shown here for simplicity of description.
  • the gap 410 is preferably surrounded by a confinement ring assembly or shroud (not shown), details of which can be found in commonly owned published U.S. Patent No. 7,740,736 herein incorporated by reference.
  • the interior of the vacuum chamber 402 is maintained at a low pressure by connection to a vacuum pump through vacuum portal 480.
  • the conduit support plate 438 is attached to an actuation mechanism 442. Details of an actuation mechanism are described in commonly-owned U.S. Patent No. 7,732,728 incorporated herein by above.
  • the actuation mechanism 442 such as a servo mechanical motor, stepper motor or the like is attached to a vertical linear bearing 444, for example, by a screw gear 446 such as a ball screw and motor for rotating the ball screw.
  • a screw gear 446 such as a ball screw and motor for rotating the ball screw.
  • the actuation mechanism 442 travels along the vertical linear bearing 444.
  • FIG. 4A illustrates the arrangement when the actuation mechanism 442 is at a high position on the linear bearing 444 resulting in a small gap 410 a.
  • FIG.4B illustrates the arrangement when the actuation mechanism 442 is at a mid position on the linear bearing 444.
  • FIG. 4C illustrates a large gap 410 c when the actuation mechanism 442 is at a low position on the linear bearing.
  • the upper and lower electrodes 408, 406 remain co-axial during the gap adjustment and the facing surfaces of the upper and lower electrodes across the gap remain parallel.
  • FIG. 4A illustrates laterally deflected bellows 450 sealed at a proximate end to the conduit support plate 438 and at a distal end to a stepped flange 428 of chamber wall plate 418.
  • the inner diameter of the stepped flange defines an opening 412 in the chamber wall plate 418 through which the RF bias housing arm 434 passes.
  • the distal end of the bellows 450 is clamped by a clamp ring 452.
  • the laterally deflected bellows 450 provides a vacuum seal while allowing vertical movement of the RF bias housing 430, conduit support plate 438 and actuation mechanism 442.
  • the RF bias housing 430, conduit support plate 438 and actuation mechanism 442 can be referred to as a cantilever assembly.
  • the RF power supply 420 moves with the cantilever assembly and can be attached to the conduit support plate 438.
  • FIG.4B shows the bellows 450 in a neutral position when the cantilever assembly is at a mid position.
  • FIG. 4C shows the bellows 450 laterally deflected when the cantilever assembly is at a low position.
  • a labyrinth seal 448 provides a particle barrier between the bellows 450 and the interior of the plasma processing chamber housing 404.
  • a fixed shield 456 is immovably attached to the inside inner wall of the chamber housing 404 at the chamber wall plate 418 so as to provide a labyrinth groove 460 (slot) in which a movable shield plate 458 moves vertically to accommodate vertical movement of the cantilever assembly.
  • the labyrinth seal 448 includes a fixed shield 456 attached to an inner surface of the chamber wall plate 418 at a periphery of the opening 412 in the chamber wall plate 418 defining a labyrinth groove 460.
  • the movable shield plate 458 is attached and extends radially from the RF bias housing arm 434 where the arm 434 passes through the opening 412 in the chamber wall plate 418.
  • the movable shield plate 458 extends into the labyrinth groove 460 while spaced apart from the fixed shield 456 by a first gap and spaced apart from the interior surface of the chamber wall plate 418 by a second gap allowing the cantilevered assembly to move vertically.
  • the labyrinth seal 448 blocks migration of particles spalled from the bellows 450 from entering the vacuum chamber interior 405 and blocks radicals from process gas plasma from migrating to the bellows 450 where the radicals can form deposits which are subsequently spalled.
  • FIG.4A shows the movable shield plate 458 at a higher position in the labyrinth groove 460 above the RF bias housing arm 434 when the cantilevered assembly is in a high position (small gap 410 a).
  • FIG.4C shows the movable shield plate 458 at a lower position in the labyrinth groove 460 above the RF bias housing arm 434 when the cantilevered assembly is in a low position (large gap 410 c).
  • FIG. 4B shows the movable shield plate 458 in a neutral or mid position within the labyrinth groove 460 when the cantilevered assembly is in a mid position (medium gap 410 b).
  • FIG. 5 provides a simple block diagram depicting various reactor components arranged for implementing deposition methods described herein.
  • a reactor 500 includes a process chamber 524 that encloses other components of the reactor and serves to contain a plasma generated by a capacitive-discharge type system including a showerhead 514 working in conjunction with a grounded heater block 520.
  • a high frequency (HF) radio frequency (RF) generator 504 and a low frequency (LF) RF generator 502 may be connected to a matching network 506 and to the showerhead 514.
  • HF high frequency
  • RF radio frequency
  • LF low frequency
  • the power and frequency supplied by matching network 506 may be sufficient to generate a plasma from process gases supplied to the process chamber 524.
  • the matching network 506 may provide 50W to 500W of HFRF power.
  • the matching network 506 may provide 100 W to 5000 W of HFRF power and 100 W to 5000 W of LFRF power total energy.
  • the HFRF component may generally be between 5 MHz to 60 MHz, e.g., 13.56 MHz.
  • the LF component may be from about 100 kHz to 2 MHz, e.g., 430 kHz.
  • a wafer pedestal 518 may support a substrate 516.
  • the wafer pedestal 518 may include a chuck, a fork, or lift pins (not shown) to hold and transfer the substrate during and between the deposition and/or plasma treatment reactions.
  • the chuck may be an electrostatic chuck, a mechanical chuck, or various other types of chuck as are available for use in the industry and/or for research.
  • Various process gases may be introduced via inlet 512. Multiple source gas lines 510 are connected to manifold 508. The gases may be premixed or not. Appropriate valving and mass flow control mechanisms may be employed to ensure that the correct process gases are delivered during the deposition and plasma treatment phases of the process. In the case where a chemical precursor(s) is delivered in liquid form, liquid flow control mechanisms may be employed.
  • Process gases may exit chamber 524 via an outlet 522.
  • a vacuum pump e.g., a one or two stage mechanical dry pump and/or turbomolecular pump 540, may be used to draw process gases out of the process chamber 524 and to maintain a suitably low pressure within the process chamber 524 by using a closed-loop-controlled flow restriction device, such as a throttle valve or a pendulum valve.
  • a closed-loop-controlled flow restriction device such as a throttle valve or a pendulum valve.
  • a 300 mm Lam Vector TM tool having a 4-station deposition scheme or a 200 mm Sequel TM tool having a 6-station deposition scheme may be used.
  • tools for processing 450 mm wafers may be used.
  • the wafers may be indexed after every deposition and/or post-deposition plasma treatment, or may be indexed after etching operations if the etching chambers or stations are also part of the same tool, or multiple depositions and treatments may be conducted at a single station before indexing the wafer.
  • an apparatus may be provided that is configured to perform the techniques described herein.
  • a suitable apparatus may include hardware for performing various process operations as well as a system controller 530 having instructions for controlling process operations in accordance with the disclosed embodiments.
  • the system controller 530 will typically include one or more memory devices and one or more processors communicatively connected with various process control equipment, e.g., valves, RF generators, wafer handling systems, etc., and configured to execute the instructions so that the apparatus will perform a technique in accordance with the disclosed embodiments.
  • Machine-readable media containing instructions for controlling process operations in accordance with the present disclosure may be coupled to the system controller 530.
  • the system controller 530 may be communicatively connected with various hardware devices, e.g., mass flow controllers, valves, RF generators, vacuum pumps, etc.
  • a system controller 530 may control all of the activities of the reactor 500.
  • the system controller 530 may execute system control software stored in a mass storage device, loaded into a memory device, and executed on a processor.
  • the system control software may include instructions for controlling the timing of gas flows, wafer movement, RF generator activation, etc., as well as instructions for controlling the mixture of gases, the chamber and/or station pressure, the chamber and/or station temperature, the wafer temperature, the target power levels, the RF power levels, the substrate pedestal, chuck, and/or susceptor position, and other parameters of a particular process performed by the reactor apparatus 500.
  • the system control software may be configured in any suitable way.
  • various process tool component subroutines or control objects may be written to control operation of the process tool components necessary to carry out various process tool processes.
  • the system control software may be coded in any suitable computer readable programming language.
  • the system controller 530 may typically include one or more memory devices and one or more processors configured to execute the instructions so that the apparatus will perform a technique in accordance with the present disclosure.
  • Machine-readable media containing instructions for controlling process operations in accordance with disclosed embodiments may be coupled to the system controller 530.
  • One or more process stations may be included in a multi-station processing tool.
  • FIG. 6 shows a schematic view of an embodiment of a multi-station processing tool 600 with an inbound load lock 602 and an outbound load lock 604, either or both of which may include a remote plasma source.
  • a robot 606 at atmospheric pressure, is configured to move wafers from a cassette loaded through a pod 608 into inbound load lock 602 via an atmospheric port 610.
  • a wafer is placed by the robot 606 on a pedestal 612 in the inbound load lock 602, the atmospheric port 610 is closed, and the load lock is pumped down.
  • the inbound load lock 602 includes a remote plasma source
  • the wafer may be exposed to a remote plasma treatment in the load lock prior to being introduced into a processing chamber 614.
  • the wafer also may be heated in the inbound load lock 602 as well, for example, to remove moisture and adsorbed gases.
  • a chamber transport port 616 to processing chamber 614 is opened, and another robot (not shown) places the wafer into the reactor on a pedestal of a first station shown in the reactor for processing. While the embodiment depicted includes load locks, it will be appreciated that, in some embodiments, direct entry of a wafer into a process station may be provided.
  • the depicted processing chamber 614 includes four process stations, numbered from 1 to 4 in the embodiment shown in Figure 6. Each station has a heated pedestal (shown at 618 for station 1), and gas line inlets. It will be appreciated that in some embodiments, each process station may have different or multiple purposes.
  • each of the process stations 1–4 may be a chamber for performing one or more of ALD, CVD, CFD, or etching (any of which may be plasma assisted).
  • at least one of the process stations is a deposition station having a reaction chamber as shown in FIG. 5, and at least one of the other process stations is an etching station having a reaction chamber as shown in FIGS. 4A–4C.
  • the depicted processing chamber 614 includes four stations, it will be understood that a processing chamber according to the present disclosure may have any suitable number of stations.
  • a processing chamber may have five or more stations, while in other embodiments a processing chamber may have three or fewer stations.
  • Figure 6 also depicts an embodiment of a wafer handling system 609 for transferring wafers within processing chamber 614.
  • wafer handling system 609 may transfer wafers between various process stations and/or between a process station and a load lock. It will be appreciated that any suitable wafer handling system may be employed. Non-limiting examples include wafer carousels and wafer handling robots.
  • Figure 6 also depicts an embodiment of a system controller 650 employed to control process conditions and hardware states of process tool 600.
  • System controller 650 may include one or more memory devices 656, one or more mass storage devices 654, and one or more processors 652.
  • Processor 652 may include a CPU or computer, analog and/or digital input/output connections, stepper motor controller boards, etc.
  • a controller is part of a system, which may be part of the above-described examples.
  • Such systems can comprise semiconductor processing equipment, including a processing tool or tools, chamber or chambers, a platform or platforms for processing, and/or specific processing components (a wafer pedestal, a gas flow system, etc.).
  • These systems may be integrated with electronics for controlling their operation before, during, and after processing of a semiconductor wafer or substrate.
  • the electronics may be referred to as the “controller,” which may control various components or subparts of the system or systems.
  • the controller may be programmed to control any of the processes disclosed herein, including the delivery of processing gases, temperature settings (e.g., heating and/or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, positional and operation settings, wafer transfers into and out of a tool and other transfer tools and/or load locks connected to or interfaced with a specific system.
  • the controller may be defined as electronics having various integrated circuits, logic, memory, and/or software that receive instructions, issue instructions, control operation, enable cleaning operations, enable endpoint measurements, and the like.
  • the integrated circuits may include chips in the form of firmware that store program instructions, digital signal processors (DSPs), chips defined as application specific integrated circuits (ASICs), and/or one or more microprocessors, or microcontrollers that execute program instructions (e.g., software).
  • Program instructions may be instructions communicated to the controller in the form of various individual settings (or program files), defining operational parameters for carrying out a particular process on or for a semiconductor wafer or to a system.
  • the operational parameters may, in some embodiments, be part of a recipe defined by process engineers to accomplish one or more processing operations during the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and/or dies of a wafer.
  • the controller in some implementations, may be a part of or coupled to a computer that is integrated with, coupled to the system, otherwise networked to the system, or a combination thereof.
  • the controller may be in the “cloud” or all or a part of a fab host computer system, which can allow for remote access of the wafer processing.
  • the computer may enable remote access to the system to monitor current progress of fabrication operations, examine a history of past fabrication operations, examine trends or performance metrics from a plurality of fabrication operations, to change parameters of current processing, to set processing operations to follow a current processing, or to start a new process.
  • a remote computer e.g.
  • a server can provide process recipes to a system over a network, which may include a local network or the Internet.
  • the remote computer may include a user interface that enables entry or programming of parameters and/or settings, which are then communicated to the system from the remote computer.
  • the controller receives instructions in the form of data, which specify parameters for each of the processing operations to be performed during one or more operations. It should be understood that the parameters may be specific to the type of process to be performed and the type of tool that the controller is configured to interface with or control.
  • the controller may be distributed, such as by comprising one or more discrete controllers that are networked together and working towards a common purpose, such as the processes and controls described herein.
  • example systems may include a plasma etch chamber or module, a deposition chamber or module, a spin-rinse chamber or module, a metal plating chamber or module, a clean chamber or module, a bevel edge etch chamber or module, a physical vapor deposition (PVD) chamber or module, a chemical vapor deposition (CVD) chamber or module, an atomic layer deposition (ALD) chamber or module, a molecular layer deposition (MLD) chamber or module, an atomic layer etch (ALE) chamber or module, an ion implantation chamber or module, a track chamber or module, and any other semiconductor processing systems that may be associated or used in the fabrication and/or manufacturing of semiconductor wafers.
  • PVD physical vapor deposition
  • CVD chemical vapor deposition
  • ALD atomic layer deposition
  • MLD molecular layer deposition
  • ALE atomic layer etch
  • the controller might communicate with one or more of other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, neighboring tools, tools located throughout a factory, a main computer, another controller, or tools used in material transport that bring containers of wafers to and from tool locations and/or load ports in a semiconductor manufacturing factory.
  • the controller has instructions to perform the operations shown and described in relation to FIG. 2A.
  • the controller may have instructions to cyclically (a) perform an etching operation to partially etch a feature on a substrate, and (b) deposit a protective sidewall coating in the etched feature without substantially etching the substrate.
  • Deposition of the protective sidewall coating may proceed by exposing the substrate to a first reactant and allowing the first reactant to adsorb onto the substrate, where the first reactant may include a dialdehyde or trialdehyde, exposing the substrate to a second reactant, where the first and second reactants react with one another to form the protective sidewall coating. Exposures to the first reactant and the second reactant may be repeated in a cyclic manner until the protective film reaches a target thickness.
  • the instructions may relate to performing these processes using the disclosed reaction conditions.
  • the instructions may also relate to transferring the substrate between etching and deposition chambers in some implementations. [0114]
  • system controller 650 controls all of the activities of process tool 600.
  • System controller 650 executes system control software 658 stored in mass storage device 654, loaded into memory device 656, and executed on processor 652.
  • the control logic may be hard coded in the system controller 650.
  • Applications Specific Integrated Circuits, Programmable Logic Devices e.g., field-programmable gate arrays, or FPGAs
  • FPGAs field-programmable gate arrays
  • System control software 658 may include instructions for controlling the timing, mixture of gases, chamber and/or station pressure, chamber and/or station temperature, wafer temperature, target power levels, RF power levels, RF exposure time, substrate pedestal, chuck and/or susceptor position, and other parameters of a particular process performed by process tool 600.
  • System control software 658 may be configured in any suitable way. For example, various process tool component subroutines or control objects may be written to control operation of the process tool components necessary to carry out various process tool processes.
  • System control software 658 may be coded in any suitable computer readable programming language. [0115] In some embodiments, system control software 658 may include input/output control (IOC) sequencing instructions for controlling the various parameters described above.
  • IOC input/output control
  • each phase of a CFD process may include one or more instructions for execution by system controller 650.
  • the instructions for setting process conditions for an ALD process phase may be included in a corresponding ALD recipe phase.
  • the ALD recipe phases may be sequentially arranged, so that all instructions for an ALD process phase are executed concurrently with that process phase.
  • Other computer software and/or programs stored on mass storage device 654 and/or memory device 656 associated with system controller 650 may be employed in some embodiments. Examples of programs or sections of programs for this purpose include a substrate positioning program, a process gas control program, a pressure control program, a heater control program, and a plasma control program.
  • a substrate positioning program may include program code for process tool components that are used to load the substrate onto pedestal 618 and to control the spacing between the substrate and other parts of process tool 600.
  • a process gas control program may include code for controlling gas composition and flow rates and optionally for flowing gas into one or more process stations prior to deposition in order to stabilize the pressure in the process station.
  • the controller includes instructions for depositing a nanolaminate protective layer on a core layer, and depositing a conformal layer over the protective layer.
  • a pressure control program may include code for controlling the pressure in the process station by regulating, for example, a throttle valve in the exhaust system of the process station, a gas flow into the process station, etc.
  • the controller includes instructions for depositing a nanolaminate protective layer on a core layer, and depositing a conformal layer over the protective layer.
  • a heater control program may include code for controlling the current to a heating unit that is used to heat the substrate. Alternatively, the heater control program may control delivery of a heat transfer gas (such as helium) to the substrate.
  • the controller includes instructions for depositing a nanolaminate protective layer at a first temperature, and a conformal layer over the protective layer at a second temperature, where the second temperature is higher than the first temperature.
  • a plasma control program may include code for setting RF power levels and exposure times in one or more process stations in accordance with the embodiments herein.
  • the controller includes instructions for depositing a nanolaminate protective layer at a first RF power level and RF duration, and depositing a conformal layer over the protective layer at a second RF power level and RF duration.
  • the second RF power level and/or the second RF duration may be higher/longer than the first RF power level/duration.
  • there may be a user interface associated with system controller 650.
  • the user interface may include a display screen, graphical software displays of the apparatus and/or process conditions, and user input devices such as pointing devices, keyboards, touch screens, microphones, etc.
  • parameters adjusted by system controller 650 may relate to process conditions.
  • Non-limiting examples include process gas composition and flow rates, temperature, pressure, plasma conditions (such as RF bias power levels and exposure times), etc. These parameters may be provided to the user in the form of a recipe, which may be entered utilizing the user interface.
  • Signals for monitoring the process may be provided by analog and/or digital input connections of system controller 650 from various process tool sensors. The signals for controlling the process may be output on the analog and digital output connections of process tool 600.
  • process tool sensors that may be monitored include mass flow controllers, pressure sensors (such as manometers), thermocouples, etc. Appropriately programmed feedback and control algorithms may be used with data from these sensors to maintain process conditions.
  • System controller 650 may provide program instructions for implementing the above- described deposition processes.
  • the program instructions may control a variety of process parameters, such as DC power level, RF bias power level, pressure, temperature, etc.
  • the instructions may control the parameters to operate in-situ deposition of film stacks according to various embodiments described herein.
  • the system controller will typically include one or more memory devices and one or more processors configured to execute the instructions so that the apparatus will perform a method in accordance with the disclosed embodiments.
  • Machine-readable, non-transitory media containing instructions for controlling process operations in accordance with the disclosed embodiments may be coupled to the system controller.
  • the various hardware and method embodiments described above may be used in conjunction with lithographic patterning tools or processes, for example, for the fabrication or manufacture of semiconductor devices, displays, LEDs, photovoltaic panels and the like.
  • FIG. 7 depicts a semiconductor process cluster architecture with various modules that interface with a vacuum transfer module 738 (VTM).
  • VTM vacuum transfer module
  • the arrangement of transfer modules to “transfer” substrates among multiple storage facilities and processing modules may be referred to as a “cluster tool architecture” system.
  • Airlock 730 also known as a loadlock or transfer module, is shown in VTM 738 with four processing modules 720a–720d, which may be individual optimized to perform various fabrication processes.
  • processing modules 720a–720d may be implemented to perform substrate etching, deposition, ion implantation, substrate cleaning, sputtering, and/or other semiconductor processes as well as laser metrology and other defect detection and defect identification methods.
  • One or more of the processing modules may be implemented as disclosed herein, i.e., for etching recessed features into substrates, depositing protective films on sidewalls of recessed features, and other suitable functions in accordance with the disclosed embodiments.
  • Airlock 730 and process modules 720a-720d may be referred to as “stations.” Each station has a facet 736 that interfaces the station to VTM 738.
  • Robot 722 transfers substrates between stations.
  • the robot may have one arm, and in another implementation, the robot may have two arms, where each arm has an end effector 724 to pick substrates for transport.
  • Front-end robot 732 in atmospheric transfer module (ATM) 740, may be used to transfer substrates from cassette or Front Opening Unified Pod (FOUP) 734 in Load Port Module (LPM) 742 to airlock 730.
  • Module center 728 inside process modules 720a–720d may be one location for placing the substrate.
  • Aligner 744 in ATM 740 may be used to align substrates.
  • a substrate is placed in one of the FOUPs 734 in the LPM 742.
  • Front-end robot 732 transfers the substrate from the FOUP 734 to the aligner 744, which allows the substrate 726 to be properly centered before it is etched, or deposited upon, or otherwise processed.
  • the substrate is moved by the front-end robot 732 into an airlock 730. Because airlock modules have the ability to match the environment between an ATM and a VTM, the substrate is able to move between the two pressure environments without being damaged. From the airlock module 730, the substrate is moved by robot 722 through VTM 738 and into one of the process modules 720a–720d, for example process module 720a.
  • the robot 722 uses end effectors 724 on each of its arms.
  • process module 720a the substrate undergoes etching as described herein to form a partially etched feature.
  • the robot 722 moves the substrate out of processing module 720a, into the VTM 738, and then into a different processing module 720b.
  • processing module 720b a protective film is deposited on sidewalls of the partially etched feature.
  • the robot 722 moves the substrate out of processing module 720b, into the VTM 738, and into processing module 720a, where the partially etched feature is further etched.
  • the etching/deposition can be repeated until the feature is fully etched.
  • Lithographic patterning of a film typically comprises some or all of the following operations, each operation enabled with a number of possible tools: (1) application of photoresist on a workpiece, e.g., a substrate having a silicon nitride film formed thereon, using a spin-on or spray-on tool; (2) curing of photoresist using a hot plate or furnace or other suitable curing tool; (3) exposing the photoresist to visible or UV or x-ray light with a tool such as a wafer stepper; (4) developing the resist so as to selectively remove resist and thereby pattern it using a tool such as a wet bench or a spray developer; (5) transferring the resist pattern into an underlying film or workpiece by using a dry or plasma-assisted etching tool; and
  • an ashable hard mask layer such as an amorphous carbon layer
  • another suitable hard mask such as an antireflective layer

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  • Organic Chemistry (AREA)
  • Plasma & Fusion (AREA)
  • Physics & Mathematics (AREA)
  • Analytical Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
  • Formation Of Insulating Films (AREA)
PCT/US2023/015028 2022-03-14 2023-03-10 Sidewall passivation using aldehyde or isocyanate chemistry for high aspect ratio etch Ceased WO2023177594A1 (en)

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JP2024554750A JP2025509548A (ja) 2022-03-14 2023-03-10 高アスペクト比エッチングのためにアルデヒドまたはイソシアネート化学物質を使用した側壁パッシベーション
KR1020247034044A KR20240164916A (ko) 2022-03-14 2023-03-10 고 종횡비 에칭을 위해 알데하이드 또는 이소시아네이트 화학 물질을 사용한 측벽 패시베이션
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WO2025128603A1 (en) * 2023-12-12 2025-06-19 Lam Research Corporation Bow control of high aspect ratio features during cryogenic etch
WO2026080239A1 (en) * 2024-10-11 2026-04-16 Lam Research Corporation Etch with conformal deposition liner

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US20250299962A1 (en) * 2024-03-20 2025-09-25 Tokyo Electron Limited Method for etching a layer through a patterned mask layer

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US20150091075A1 (en) * 2013-09-27 2015-04-02 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory device and method of manufacturing the same
US20180174858A1 (en) * 2014-12-04 2018-06-21 Lam Research Corporation Technique to deposit sidewall passivation for high aspect ratio cylinder etch
US20210082713A1 (en) * 2019-09-13 2021-03-18 Tokyo Electron Limited Etching method, plasma processing apparatus, and substrate processing system
US20210098263A1 (en) * 2019-10-01 2021-04-01 Tokyo Electron Limited Substrate processing method and plasma processing apparatus
WO2021076746A1 (en) * 2019-10-18 2021-04-22 Lam Research Corporation Selective attachment to enhance sio2:sinx etch selectivity

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Publication number Priority date Publication date Assignee Title
US20150091075A1 (en) * 2013-09-27 2015-04-02 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory device and method of manufacturing the same
US20180174858A1 (en) * 2014-12-04 2018-06-21 Lam Research Corporation Technique to deposit sidewall passivation for high aspect ratio cylinder etch
US20210082713A1 (en) * 2019-09-13 2021-03-18 Tokyo Electron Limited Etching method, plasma processing apparatus, and substrate processing system
US20210098263A1 (en) * 2019-10-01 2021-04-01 Tokyo Electron Limited Substrate processing method and plasma processing apparatus
WO2021076746A1 (en) * 2019-10-18 2021-04-22 Lam Research Corporation Selective attachment to enhance sio2:sinx etch selectivity

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2025128603A1 (en) * 2023-12-12 2025-06-19 Lam Research Corporation Bow control of high aspect ratio features during cryogenic etch
WO2026080239A1 (en) * 2024-10-11 2026-04-16 Lam Research Corporation Etch with conformal deposition liner

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