WO2023166664A1

WO2023166664A1 - Distortion compensation device

Info

Publication number: WO2023166664A1
Application number: PCT/JP2022/009143
Authority: WO
Inventors: 僚柏木; 武史安田
Original assignee: 三菱電機株式会社
Priority date: 2022-03-03
Filing date: 2022-03-03
Publication date: 2023-09-07
Also published as: JPWO2023166664A1

Abstract

In this distortion compensation device, a duplicated sequence removal unit (12) generates a unique sequence (17), which is a sequence obtained by removing a duplicated sequence from a transmission signal (16). A delay amount estimation unit (13) estimates, from the unique sequence (17) and a feedback signal corresponding to the transmission signal (16) that has passed through a power amplifier (5), an amount of delay of the feedback signal. A delay device (14) delays the transmission signal (16) on the basis of the amount of delay of the feedback signal that has been estimated, thereby synchronizing the transmission signal (16) and the feedback signal. A distortion compensation coefficient calculation unit (15) calculates, from the transmission signal (16) and the feedback signal that are synchronized with each other, a distortion compensation coefficient for compensating a distortion of the transmission signal (16).

Description

distortion compensator

The present disclosure relates to a distortion compensator in a power amplifier.

A power amplifier used in a wireless communication system amplifies an input waveform and outputs an output waveform by linearly increasing output power in accordance with an increase in input power. However, when the output power saturates as the input power increases, the nonlinear operation of the power amplifier distorts the output waveform. A distortion compensation technique called digital predistortion (DPD), which reduces the distortion of the output waveform by pre-applying distortion to the input waveform that is the opposite of the distortion generated by the power amplifier in order to compensate for the distortion caused by the non-linear operation of the power amplifier. There is

In DPD, a transmission signal that has passed through a power amplifier is used as a feedback signal, and a distortion compensation coefficient is calculated from the difference between the feedback signal after passing through the power amplifier and the transmission signal before passing through the power amplifier. Furthermore, the distortion is compensated by giving the transmission signal the opposite distortion to that of the power amplifier using the calculated distortion compensation coefficient. Here, in calculating the distortion compensation coefficient, it is necessary to synchronize the transmission signal before passing through the power amplifier and the feedback signal after passing through the power amplifier. Therefore, by delaying the transmission signal before passing through the power amplifier based on the delay amount of the feedback signal after passing through the power amplifier, the transmission signal before passing through the power amplifier and the feedback signal after passing through the power amplifier are synchronized.

For example, Patent Document 1 below discloses a distortion compensator that realizes DPD by estimating the delay amount of a feedback signal using a specific signal included in a transmission signal such as a pilot signal or a preamble signal.

JP 2011-19154 A

In the distortion compensator of Patent Document 1, the specific signal used for estimating the delay amount of the feedback signal changes depending on the radio communication system. When estimating the delay amount of the feedback signal based on an arbitrary signal, if the signal is not unique within the observed range, the signal may appear redundantly. There is a possibility of misestimating the amount of delay. Therefore, in order to apply DPD to a general-purpose wireless communication system, a specific signal in transmission signals must be known.

SUMMARY OF THE INVENTION The present disclosure has been made to solve the problems described above, and provides a distortion compensator capable of performing correct estimation even if the delay amount of a feedback signal is estimated based on an arbitrary signal. With the goal.

A distortion compensation apparatus according to the present disclosure includes a transmission signal generator that generates a transmission signal, a modulator that digitally modulates the transmission signal generated by the transmission signal generator, and the transmission digitally modulated by the modulator. a distortion compensation calculation unit that compensates for signal distortion based on a distortion compensation coefficient; a DA converter that converts the transmission signal whose distortion is compensated by the distortion compensation calculation unit into an analog signal; an attenuator for generating a feedback signal by attenuating the transmission signal amplified by the power amplifier; and converting the feedback signal generated by the attenuator into a digital signal. a demodulator for demodulating the feedback signal converted into a digital signal by the AD converter; and a delay for estimating a delay amount of the feedback signal from the unique sequence generated by the duplicate sequence removal unit and the feedback signal demodulated by the demodulator. and delaying the transmission signal digitally modulated by the modulator based on the delay amount of the feedback signal estimated by the delay amount estimating section. Distortion compensation for calculating the distortion compensation coefficient from a delay device for synchronizing the feedback signal converted into a digital signal, and the digitally modulated transmission signal synchronized with each other and the feedback signal converted into the digital signal. and a coefficient calculator.

According to the distortion compensation apparatus according to the present disclosure, the delay amount of the feedback signal is estimated based on the unique sequence, which is a sequence obtained by removing overlapping sequences from the transmission signal. Even if there is, the delay amount of the feedback signal can be correctly estimated.

The objects, features, aspects, and advantages of the present disclosure will become more apparent with the following detailed description and accompanying drawings.

1 is a block diagram of a distortion compensation device according to Embodiment 1; FIG. FIG. 4 is a diagram showing an example of a transmission signal; FIG. FIG. 10 is a diagram showing an example of a unique sequence of length 1; FIG. 13 illustrates an example of a unique sequence of length 2; FIG. 13 illustrates an example of a unique sequence of length 2; FIG. 13 illustrates an example of a unique sequence of length 2; FIG. 13 illustrates an example of a unique sequence of length 2; FIG. 13 illustrates an example of a unique sequence of length 2; 4 is a flow chart showing the operation of a duplicated series removal unit; 10 is a flowchart showing sequence counting processing; 9 is a flowchart showing unique sequence output processing; 2 is a block diagram of a distortion compensation device according to Embodiment 2; FIG. FIG. 4 is a diagram for explaining nonlinear characteristics of a power amplifier; FIG. 11 is a block diagram of a distortion compensator according to Embodiment 3; FIG. 10 is a block diagram of a distortion compensator according to Embodiment 4;

<Embodiment 1>
FIG. 1 is a block diagram showing the configuration of a distortion compensation device according to Embodiment 1. FIG. As shown in FIG. 1, the distortion compensation apparatus according to Embodiment 1 includes a transmission signal generator 1, a modulator 2, a distortion compensation calculation unit 3, a DA converter 4, a power amplifier 5, an output switching unit 6, a power line 7, A dummy load 8 , an attenuator 9 , an AD converter 10 , a demodulator 11 , a redundant series remover 12 , a delay amount estimator 13 , a delayer 14 and a distortion compensation coefficient calculator 15 are provided.

The input of modulator 2 is connected to the output of transmission signal generator 1 . The input of the distortion compensation calculator 3 is connected to the output of the modulator 2 and the output of the distortion compensation coefficient calculator 15 . The input of the DA converter 4 is connected to the output of the distortion compensation calculator 3 . The input of power amplifier 5 is connected to the output of DA converter 4 . The input of output switching unit 6 is connected to the output of power amplifier 5 . The input of the power line 7 is connected to the output of the output switching section 6 . The input of the dummy load 8 is connected to the output of the output switching section 6 . The input of attenuator 9 is connected to the output of power amplifier 5 . The input of AD converter 10 is connected to the output of attenuator 9 . The input of demodulator 11 is connected to the output of AD converter 10 . The input of the duplicate sequence removal section 12 is connected to the output of the transmission signal generator 1 . The input of the delay amount estimator 13 is connected to the output of the demodulator 11 and the output of the duplicate sequence remover 12 . The input of delay device 14 is connected to the output of modulator 2 and the output of delay amount estimator 13 . The input of the distortion compensation coefficient calculator 15 is connected to the output of the AD converter 10 and the output of the delay device 14 .

The transmission signal generator 1 generates a transmission signal 16 as illustrated in FIG. The transmission signal 16 consists of a series of digital data. FIG. 2 is an example of the transmission signal 16. FIG. The transmission signal 16 in FIG. 2 is a hexadecimal binary sequence, and transitions in the order of 0A→0B→0C→0A→0B→0C→0D→11→22→11→22→0A→0B→0C.

The modulator 2 digitally modulates the transmission signal 16 . Digital modulation schemes performed by the modulator 2 include BPSK, QPSK, DPSK, 8PSK, 16QAM, 32APSK, 64QAM, 128QAM, 256QAM, 1024QAM, ASK, and OFDM.

The distortion compensation calculator 3 uses the distortion compensation coefficient calculated by the distortion compensation coefficient calculator 15 to compensate the transmission signal 16 to cancel the distortion of the power amplifier 5 . Algorithms used by the distortion compensation calculator 3 to compensate the transmission signal 16 include LUTs (lookup tables), FIR filters, NNs (neural networks), and the like. The distortion compensation calculator 3 outputs the transmission signal 16 modulated by the modulator 2 to the DA converter 4 as it is only when the delay amount estimator 13 estimates the delay amount.

The DA converter 4 converts the transmission signal 16 compensated by the distortion compensation calculator 3 into an analog signal.

The power amplifier 5 amplifies the transmission signal 16 converted into an analog signal by the DA converter 4 .

The output switching unit 6 controls whether the transmission signal 16 amplified by the power amplifier 5 is output to the power line 7 or to the dummy load 8 . Specifically, the output switching unit 6 outputs the transmission signal 16 to the dummy load 8 when the delay amount estimation unit 13 estimates the delay amount, and outputs the transmission signal 16 to the dummy load 8 when the delay amount estimation unit 13 does not estimate the delay amount. 16 to the power line 7 .

The power line 7 aerially transmits the transmission signal 16 amplified by the power amplifier 5 .

The dummy load 8 terminates the transmission signal 16 amplified by the power amplifier 5 .

The attenuator 9 attenuates the transmission signal 16 amplified by the power amplifier 5 so that it can be input to the AD converter 10 as a feedback signal.

The AD converter 10 converts the feedback signal attenuated by the attenuator 9 from an analog signal to a digital signal.

The demodulator 11 demodulates the feedback signal converted into a digital signal by the AD converter 10 . The demodulation method performed by the demodulator 11 is the same as that used by the modulator 2 .

The duplicate sequence removal unit 12 removes duplicate sequences from the transmission signal 16 to generate a unique sequence 17 as exemplified in FIGS. The unique sequence 17 is composed of a constant-length sequence obtained by excluding duplicate sequences of a constant length from the transmission signal 16 and an offset time from the transmission start time. The length of the unique sequence 17 (that is, the “fixed length” described above) may be any length, and may be specified in advance.

FIG. 3 is a unique sequence 17 of length 1 generated from the transmission signal 16 of FIG. The transmission signal 16 in FIG. 2 includes 0A, 0B, 0C, 0D, 11, and 22 as a sequence of length 1. In FIG. Among them, 0A, 0B, 0C, 11, and 22 are excluded due to duplication, and only 0D remains as a unique sequence 17. FIG.

4 to 8 are unique sequences 17 of length 2 generated from the transmission signal 16 of FIG. In the transmission signal 16 of FIG. 2, as a sequence of length 2, "0A→0B", "0B→0C", "0C→0A", "0C→0D", "0D→11", "11→ 22”, “22→11”, and “22→0A”. Among them, "0A→0B", "0B→0C", and "11→22" are excluded because they overlap, and "0C→0A" (Fig. 4), "0C→0D" (Fig. 5), "0D →11” (FIG. 6), “22→11” (FIG. 7), and “22→0A” (FIG. 8) remain as the unique sequence 17 . As shown in FIGS. 4 to 8, a plurality of unique sequences 17 may be obtained from the transmission signal 16, one of which is used in the delay amount estimator 13. FIG.

Thus, the unique sequence 17 is an extracted sequence having a length of 1 or more with no overlap (that is, appearing only once) within the observed range of the transmitted signal 16 . The unique sequence 17 is thus uniquely determined without appearing multiple times in the observed range of the transmitted signal 16 and the corresponding feedback signal.

Here, the method for generating the unique sequence 17 by the duplicate sequence removing unit 12 will be described using the flowchart of FIG.

First, in the series counting process in step S1, the duplicate series removal unit 12 counts the number of series overlaps, and proceeds to step S2. Then, in the unique sequence output process of step S2, the duplicate sequence removal unit 12 extracts non-overlapping sequences from the sequences counted in step S1, and outputs the extracted sequences as unique sequences 17. FIG.

Next, the series counting process (step S1 in FIG. 9) will be described using the flowchart in FIG.

First, in step S11, the duplicate sequence removal unit 12 acquires the transmission signal 16 output from the transmission signal generator 1, stores the transmission signal 16 in a fixed-length memory area secured in advance, Proceed to step S12.

In step S12, the duplicate sequence removal unit 12 checks whether or not the transmission signal 16 exists in the memory area, and if it exists, the process proceeds to step S13.

In step S13, the duplicate sequence removal unit 12 acquires a sequence of a certain length from the head of the transmission signal 16 existing in the memory area, and proceeds to step S14. For example, assuming that the transmission signal 16 transitions in the order of 0A->0B->0C->0A->0B->0C->0D->11->22->11->22->0A->0B->0C as shown in FIG. A sequence of length 1 from the beginning is "0A", and a sequence of length 2 from the beginning is "0A→0B".

In step S14, the duplicate sequence removal unit 12 confirms whether the sequence acquired in step S13 is registered in the dictionary. If not, the process proceeds to step S16.

In step S15, the duplicate series removal unit 12 increases by one the number of repetitions of the series registered in the dictionary (the same series as obtained in step S13), and proceeds to step S18.

In step S16, the duplicate series removal unit 12 registers the series acquired in step S13 in the dictionary together with the time information of the series, and proceeds to step S17. If the length of the series acquired in step S13 is 2 or more, the time at the beginning of the series is set as the time of the series. For example, the length of the sequence acquired in step S13 is 2, and the transmission signal 16 is 0A→0B→0C→0A→0B→0C→0D→11→22→11→22→ When transitioning in the order of 0A→0B→0C, the time of the head sequence “0A→0B” of length 2 is 0, and the time of the sequence “0D→11” is 6.

In step S17, the duplicate sequence removal unit 12 sets the number of repetitions of the sequence registered in the dictionary in step S16 to an initial value of 1, and proceeds to step S18. In other words, when the number of repetitions of a sequence registered in the dictionary is 1, it means that the sequence appears once in the transmission signal 16 .

In step S18, the duplicate sequence removal unit 12 advances the transmission signal 16 by one symbol, and returns to step S12. Assuming that the transmission signal 16 transits in the order of 0A→0B→0C→0A→0B→0C→0D→11→22→11→22→0A→0B→0C as shown in FIG. When the transmission signal 16 is advanced by one symbol, the leading 0A is removed, and the transmission signal 16 is stored in the fixed-length memory area as 0B→0C→0A→0B→0C→0D→11→22→ 11→22→0A→0B→0C remains.

In the sequence counting process, the redundant sequence removing unit 12 repeats the above operations, and as a result of advancing the transmission signal 16 by one symbol in step S18, when there is no transmission signal 16 left in the fixed length memory area, in step S12 A determination of NO is made, and the series counting process ends.

Next, the above unique series output processing (step S2 in FIG. 9) will be described using the flowchart in FIG.

First, in step S21, the duplicate series removal unit 12 checks whether or not the series exists in the dictionary.If the series exists in the dictionary, the process proceeds to step S22.

In step S22, the duplicate series removal unit 12 extracts one of the series existing in the dictionary, and proceeds to step S23.

In step S23, the duplicate sequence removing unit 12 confirms whether the number of times of repetition of the sequence extracted from the dictionary in step S22 is 1. If it is only once, the process proceeds to step S24. If the number of repetitions of the sequence is other than 1, that is, if the number of appearances of the sequence in the transmission signal 16 is two or more, the registration of the sequence is deleted from the dictionary, and the process returns to step S21.

In step S24, the duplicate series removal unit 12 outputs the series extracted from the dictionary in step S22 and the time information of the series as a unique series 17.

It should be noted that if a series with a repetition count of 1 is not found and as a result of repeatedly executing steps S21 to S23, there is no series registered in the dictionary, NO is determined in step S21 and the unique series output process ends.

Returning to FIG. 1, the delay amount estimator 13 estimates the delay amount of the feedback signal from the unique sequence 17 generated by the duplicated sequence remover 12 and the feedback signal demodulated by the demodulator 11 . Specifically, the delay amount estimating unit 13 finds a sequence that matches the unique sequence 17 from the feedback signal, acquires the start time of the found sequence, and adds the time of the unique sequence 17 to the start time to obtain a delay. Estimate quantity. The unique sequence 17 used by the delay amount estimating unit 13 to estimate the delay amount of the feedback signal is a unique sequence that appears only once in the range where the transmission signal 16 is observed. can be estimated correctly. When the estimation of the delay amount is completed, the delay amount estimating section 13 determines the delay amount and stops the operation.

The delay unit 14 delays the transmission signal 16 demodulated by the demodulator 11 based on the delay amount estimated by the delay amount estimating unit 13, thereby converting the transmission signal into the feedback signal converted into a digital signal by the AD converter 10. 16 are synchronized.

A distortion compensation coefficient calculator 15 calculates a distortion compensation coefficient from the feedback signal converted into a digital signal by the AD converter 10 and the transmission signal 16 delayed by the delay device 14, which are synchronized with each other, and calculates the calculated distortion compensation. The coefficients are provided to the distortion compensation calculator 3 . Algorithms for calculating the distortion compensation coefficient by the distortion compensation coefficient calculator 15 include, for example, LMS (Least Mean Square), NLMS (Normalized Least Mean Square), and RLS (Recursive Least Square).

As described above, according to the distortion compensation apparatus according to Embodiment 1, the delay amount of the feedback signal is estimated based on the unique sequence 17 obtained by removing the duplicate sequence from the transmission signal 16. The amount of delay can be estimated without error. As a result, the distortion compensation coefficient is calculated correctly, and the compensation of the output waveform due to the nonlinear operation of the power amplifier 5 is accurately compensated.

<Embodiment 2>
In the second embodiment, by adjusting the gain of the power amplifier 5 in the linear region, the symbol error of the feedback signal during multi-level modulation is suppressed, thereby erroneously estimating the delay amount of the feedback signal. To prevent.

FIG. 12 is a block diagram showing the configuration of a distortion compensation device according to Embodiment 2. FIG. The configuration of the distortion compensator of FIG. 12 is obtained by adding a gain/attenuation adjustment section 18 to the configuration of FIG. Also, the input of the power amplifier 5 is connected to the output of the DA converter 4 and the output of the gain/attenuation adjustment section 18 . The input of attenuator 9 is connected to the output of power amplifier 5 and the output of gain/attenuation adjuster 18 . Other configurations are the same as those in FIG.

In this embodiment, the power amplifier 5 amplifies the transmission signal 16 converted into an analog signal by the DA converter 4 based on the gain output from the gain/attenuation adjustment section 18 .

If the power amplifier 5 is an ideal linear amplifier, the output power increases linearly as the input power increases. However, if the power amplifier 5 is not an ideal linear amplifier, the output power will saturate without linearly increasing as the input power increases. FIG. 13 shows an example of a gain curve in power amplifier 5. In FIG. FIG. 13 shows a gain curve 19 including a nonlinear region and a gain curve 20 with only a linear region. The horizontal axis of the graph in FIG. 13 indicates the input power, the vertical axis indicates the output power, and the slope of the gain curve corresponds to the gain. The gain curve 20 in the linear region only has a constant slope. The gain curve 19 including the nonlinear region has a constant slope in the linear region 21, but the slope is not constant in the nonlinear region 22, and the output power does not increase linearly in response to the increase in the input power. is distorted.

A gain/attenuation adjustment unit 18 adjusts the gain of the power amplifier 5 and the attenuation of the attenuator 9 . Specifically, the gain/attenuation adjustment unit 18 sets the gain of the power amplifier 5 to a predetermined value so that the power amplifier 5 operates linearly when the delay amount estimation unit 13 estimates the delay amount of the feedback signal. , and the attenuation amount of the attenuator 9 is predetermined so that the level of the transmission signal 16 output from the DA converter 4 matches the level of the feedback signal input to the AD converter 10. value. Further, after the delay amount estimation unit 13 completes the estimation of the delay amount of the feedback signal, the gain/attenuation amount adjustment unit 18 adjusts the gain of the power amplifier 5 to a predetermined value so that the power amplifier 5 operates nonlinearly. , and then the attenuation amount of the attenuator 9 is set to value.

As described above, according to the distortion compensation apparatus of the second embodiment, in addition to the effects obtained in the first embodiment, when the delay amount estimating section 13 estimates the delay amount of the feedback signal, the power amplifier 5 is set to the linear region. , and obtaining a feedback signal without distortion, it is possible to estimate the delay amount of the feedback signal during multi-level modulation without error.

<Embodiment 3>
In Embodiment 1, the transmission signal generator 1 is caused to output the transmission signal 16 at a timing when the system including the distortion compensator (hereinafter simply referred to as "system") does not transmit the transmission signal 16 from the power line 7, and the transmission signal The unique sequence 17 obtained from 16 is used to estimate the delay amount of the feedback signal. In the third embodiment, the unique sequence 17 generated from the transmission signal 16 output by the transmission signal generator 1 is temporarily stored, and the stored unique sequence 17 is reproduced at the timing when the system does not transmit the transmission signal 16 from the power line 7. Then, the reproduced unique sequence 17 is used to estimate the delay amount of the feedback signal.

FIG. 14 is a block diagram showing the configuration of a distortion compensation device according to Embodiment 3. FIG. The configuration of the distortion compensating device in FIG. 14 is obtained by adding a sequence accumulating section 23 and a sequence reproducing section 24 to the configuration in FIG. The input of modulator 2 is connected to the output of transmission signal generator 1 and the output of sequence regenerator 24 . The input of the delay amount estimator 13 is connected to the output of the demodulator 11 , the output of the redundant sequence remover 12 and the output of the sequence reproducer 24 . The input of sequence accumulation section 23 is connected to the output of duplicate sequence removal section 12 . The input of the sequence reproducing section 24 is connected to the output of the sequence storing section 23 . Other configurations are the same as those in FIG.

The series accumulation unit 23 accumulates the unique series 17 generated by the duplicate series removal unit 12 . The sequence reproducing unit 24 outputs the unique sequence 17 accumulated in the sequence accumulating unit 23 to the modulator 2 and the delay amount estimating unit 13 at the timing when the transmission signal generator 1 does not transmit the transmission signal 16 .

The modulator 2 digitally modulates the transmission signal 16 output from the transmission signal generator 1 or the unique sequence 17 output from the sequence regenerator 24 . Specifically, when the system transmits the transmission signal 16 from the power line 7, the modulator 2 digitally modulates the transmission signal 16 output from the transmission signal generator 1, and the system transmits the transmission signal 16 from the power line 7. If not, the unique sequence 17 output by the sequence reproduction unit 24 is digitally modulated.

The delay amount estimating section 13 estimates the delay amount of the feedback signal from the unique sequence 17 output from the duplicate sequence removing section 12 or the sequence reproducing section 24 and the feedback signal demodulated by the demodulator 11 . Specifically, when the system transmits a transmission signal 16, the delay amount estimating unit 13 estimates the delay amount of the feedback signal using the unique sequence 17 output from the duplicate sequence removing unit 12, and the system transmits When the signal 16 is not transmitted, the delay amount of the feedback signal is estimated using the unique sequence 17 output from the sequence regenerator 24 .

The output switching unit 6 controls whether the transmission signal 16 or the unique sequence 17 amplified by the power amplifier 5 is output to the power line 7 or to the dummy load 8 . Specifically, the output switching unit 6 outputs the transmission signal 16 amplified by the power amplifier 5 to the power line 7 when the system transmits the transmission signal 16, and outputs the transmission signal 16 to the power line 7 when the system does not transmit the transmission signal 16. 5 to output the unique sequence 17 amplified by 5 to the dummy load 8 .

According to the distortion compensator according to the third embodiment, the transmission signal generator 1 does not output the transmission signal 16 at the timing when the system does not transmit the transmission signal 16, and the feedback signal is generated at the timing when the system does not transmit the transmission signal 16. can be estimated.

<Embodiment 4>
In the third embodiment, the delay amount of the feedback signal is estimated at the timing when the system does not transmit the transmission signal 16. It is difficult to apply to systems with very short timings that do not Embodiment 4 shows a distortion compensator that can also be applied to a system in which the transmission signal 16 is intermittently transmitted.

FIG. 15 is a block diagram showing the configuration of a distortion compensation device according to Embodiment 4. FIG. 1, the distortion compensation device shown in FIG. are made redundant into two systems, one of the two systems of circuits is a first system 31 and the other is a second system 32 . Further, instead of the output switching section 6 and the dummy load 8, an input switching section 25 is provided. The input of the input switching section 25 is connected to the outputs of the power amplifiers 5 of the first system 31 and the second system 32 , and the input of the power line 7 is connected to the output of the input switching section 25 . Other configurations are the same as those in FIG.

The input switching unit 25 outputs the transmission signal 16 amplified by the power amplifier 5 of the first system 31 to the power line 7 or outputs the transmission signal 16 amplified by the power amplifier 5 of the second system 32 to the power line 7. synchronously with the transmission signal 16 transmitted from the power line 7 by the system. Specifically, the input switching unit 25 outputs the transmission signal 16 amplified by the power amplifier 5 of the first system 31 to the power line 7 every time the system completes continuous transmission of the transmission signal 16 from the power line 7. or to output the transmission signal 16 amplified by the power amplifier 5 of the second system 32 to the power line 7 .

In conjunction with switching by the input switching unit 25, the demodulator 11 converts the feedback signal converted into a digital signal by the AD converter 10 of the first system 31 and the digital signal by the AD converter 10 of the second system 32. demodulate one of the received feedback signals. Specifically, the demodulator 11 demodulates the feedback signal corresponding to the transmission signal 16 that is not output to the power line 7 by the input switching unit 25 .

The delay amount estimator 13 estimates the delay amount of the feedback signal from the unique sequence 17 generated by the duplicated sequence remover 12 and the feedback signal demodulated by the demodulator 11 . Further, the delay amount estimating section 13 updates the delay amount in one of the delay device 14 of the first system 31 and the delay device 14 of the second system 32 in conjunction with switching by the input switching section 25 . Specifically, the delay amount estimating unit 13 determines whether the transmission signal 16 in the delay device 14 of the first system 31 or the second system 32 is not output to the power line 7 by the input switching unit 25 . update the amount of delay.

According to the distortion compensation apparatus according to Embodiment 4, the first system 31 and the second system 32 alternately transmit the transmission signal 16 from the power line 7, and the transmission signal of the first system 31 and the second system 32 16 is not transmitted, the delay amount of the feedback signal can be estimated. Therefore, even when the system including the distortion compensator transmits the transmission signal 16 intermittently, the delay amount of the feedback signal can be estimated.

It should be noted that it is possible to freely combine each embodiment, and to modify or omit each embodiment as appropriate.

It is understood that the above description is an example in all aspects, and that countless variations not illustrated can be assumed.

1 transmission signal generator, 2 modulator, 3 distortion compensation calculation section, 4 DA converter, 5 power amplifier, 6 output switching section, 7 power line, 8 dummy load, 9 attenuator, 10 AD converter, 11 demodulator, 12 duplicate sequence removal unit, 13 delay amount estimation unit, 14 delay device, 15 distortion compensation coefficient calculation unit, 16 transmission signal, 17 unique sequence, 18 gain/attenuation amount adjustment unit, 19 gain curve including nonlinear region, 20 linear region 21 linear area, 22 non-linear area, 23 series storage unit, 24 series reproduction unit, 25 input switching unit, 31 first system, 32 second system.

Claims

a transmission signal generator for generating a transmission signal;
a modulator that digitally modulates the transmission signal generated by the transmission signal generator;
a distortion compensation calculation unit that compensates for distortion of the transmission signal digitally modulated by the modulator based on a distortion compensation coefficient;
a DA converter that converts the transmission signal whose distortion is compensated by the distortion compensation calculation unit into an analog signal;
a power amplifier that amplifies the transmission signal converted by the DA converter;
an attenuator that generates a feedback signal by attenuating the transmission signal amplified by the power amplifier;
an AD converter that converts the feedback signal generated by the attenuator into a digital signal;
a demodulator for demodulating the feedback signal converted into a digital signal by the AD converter;
a duplicate sequence removal unit that generates a unique sequence that is a sequence obtained by removing duplicate sequences from the transmission signal generated by the transmission signal generator;
a delay amount estimation unit that estimates the delay amount of the feedback signal from the unique sequence generated by the duplicate sequence removal unit and the feedback signal demodulated by the demodulator;
By delaying the transmission signal digitally modulated by the modulator based on the delay amount of the feedback signal estimated by the delay amount estimator, the digitally modulated transmission signal and the digital signal are converted. a delay for synchronizing the feedback signal with the
a distortion compensation coefficient calculation unit that calculates the distortion compensation coefficient from the digitally modulated transmission signal and the feedback signal converted into a digital signal that are synchronized with each other;
A distortion compensator comprising:
further comprising a gain/attenuation adjuster that adjusts the gain of the power amplifier and the attenuation of the attenuator;
The gain/attenuation adjustment unit
When the delay amount estimating unit estimates the delay amount of the feedback signal, the power amplifier operates linearly, and the level of the transmission signal output from the DA converter and the level of the transmission signal are input to the AD converter. Adjust the gain of the power amplifier and the attenuation of the attenuator so that the level of the feedback signal matches,
After the delay amount estimator completes the estimation of the delay amount of the feedback signal, the power amplifier operates nonlinearly, and the level of the transmission signal output from the DA converter and the level of the transmission signal input to the AD converter Adjust the gain of the power amplifier and the attenuation of the attenuator so that the level of the feedback signal to be applied matches.
A distortion compensator according to claim 1 .
further comprising an output switching unit that switches between outputting the transmission signal amplified by the power amplifier to a power line for transmitting the transmission signal over the air or outputting the transmission signal to a dummy load that terminates the transmission signal,
3. A distortion compensator according to claim 1 or 2.
a sequence accumulation unit for accumulating the unique sequence generated by the duplicate sequence removal unit;
a sequence recovery unit that outputs the unique sequence accumulated in the sequence accumulation unit to the modulator and the delay amount estimation unit at a timing at which the transmission signal amplified by the power amplifier is not transmitted from the power line;
further comprising
When the transmission signal amplified by the power amplifier is transmitted from the power line, the modulator digitally modulates the transmission signal output from the transmission signal generator, estimating the delay amount of the feedback signal using the unique sequence output by the removal unit;
When the transmission signal amplified by the power amplifier is not transmitted from the power line, the modulator digitally modulates the unique sequence output from the sequence regenerator, and the delay amount estimator causes the sequence regenerator to estimating the delay amount of the feedback signal using the unique sequence to be output;
4. A distortion compensator according to claim 3.
Two circuits comprising the distortion compensation calculation unit, the DA converter, the power amplifier, the attenuator, the AD converter, the delay device, and the distortion compensation coefficient calculation unit,
An input switching unit for switching which of the transmission signal amplified by the power amplifier of the first system and the transmission signal amplified by the power amplifier of the second system to be output to a power line for aerial transmission of the transmission signal. further comprising
The demodulator demodulates the feedback signal corresponding to the transmission signal that is not output to the power line by the input switching unit,
The delay amount estimating unit updates the delay amount of the transmission signal in the delay unit of the first system or the second system to which the transmission signal is not output to the power line by the input switching unit. do,
3. A distortion compensator according to claim 1 or 2.