WO2023153203A1 - Substrate processing method and substrate processing apparatus - Google Patents
Substrate processing method and substrate processing apparatus Download PDFInfo
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- WO2023153203A1 WO2023153203A1 PCT/JP2023/002185 JP2023002185W WO2023153203A1 WO 2023153203 A1 WO2023153203 A1 WO 2023153203A1 JP 2023002185 W JP2023002185 W JP 2023002185W WO 2023153203 A1 WO2023153203 A1 WO 2023153203A1
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- substrate
- etchant
- silicon oxide
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- film
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- 239000000758 substrate Substances 0.000 title claims abstract description 158
- 238000003672 processing method Methods 0.000 title claims abstract description 34
- 238000005530 etching Methods 0.000 claims abstract description 166
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 109
- 229910052814 silicon oxide Inorganic materials 0.000 claims abstract description 106
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 claims abstract description 60
- 239000007788 liquid Substances 0.000 claims abstract description 28
- 229910052751 metal Inorganic materials 0.000 claims description 55
- 239000002184 metal Substances 0.000 claims description 55
- 150000003839 salts Chemical class 0.000 claims description 47
- 239000004094 surface-active agent Substances 0.000 claims description 43
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 27
- 229920005591 polysilicon Polymers 0.000 claims description 27
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 25
- UMESNHVJZFCGBV-UHFFFAOYSA-N 2-methyl-4-[(2-methylphenyl)methylidene]-1,3-oxazol-5-one Chemical compound O=C1OC(C)=NC1=CC1=CC=CC=C1C UMESNHVJZFCGBV-UHFFFAOYSA-N 0.000 claims description 13
- GVGUFUZHNYFZLC-UHFFFAOYSA-N dodecyl benzenesulfonate;sodium Chemical group [Na].CCCCCCCCCCCCOS(=O)(=O)C1=CC=CC=C1 GVGUFUZHNYFZLC-UHFFFAOYSA-N 0.000 claims description 13
- PHFDTSRDEZEOHG-UHFFFAOYSA-N hydron;octan-1-amine;chloride Chemical group Cl.CCCCCCCCN PHFDTSRDEZEOHG-UHFFFAOYSA-N 0.000 claims description 13
- 229940080264 sodium dodecylbenzenesulfonate Drugs 0.000 claims description 13
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 8
- 229910052710 silicon Inorganic materials 0.000 claims description 8
- 239000010703 silicon Substances 0.000 claims description 8
- 229910001508 alkali metal halide Inorganic materials 0.000 claims description 7
- 150000008045 alkali metal halides Chemical group 0.000 claims description 7
- 229910001615 alkaline earth metal halide Inorganic materials 0.000 claims description 7
- 239000003945 anionic surfactant Substances 0.000 claims description 6
- 239000003093 cationic surfactant Substances 0.000 claims description 6
- 239000011734 sodium Substances 0.000 claims description 5
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 4
- 229910052788 barium Inorganic materials 0.000 claims description 3
- 229910052792 caesium Inorganic materials 0.000 claims description 3
- 229910052791 calcium Inorganic materials 0.000 claims description 3
- 229910052744 lithium Inorganic materials 0.000 claims description 3
- 229910052749 magnesium Inorganic materials 0.000 claims description 3
- 229910052700 potassium Inorganic materials 0.000 claims description 3
- 229910052701 rubidium Inorganic materials 0.000 claims description 3
- 229910052708 sodium Inorganic materials 0.000 claims description 3
- 229910052712 strontium Inorganic materials 0.000 claims description 3
- 235000012431 wafers Nutrition 0.000 description 64
- 239000000243 solution Substances 0.000 description 31
- 238000000034 method Methods 0.000 description 30
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- 238000001035 drying Methods 0.000 description 18
- 230000007246 mechanism Effects 0.000 description 17
- FAPWRFPIFSIZLT-UHFFFAOYSA-M Sodium chloride Chemical compound [Na+].[Cl-] FAPWRFPIFSIZLT-UHFFFAOYSA-M 0.000 description 16
- 238000010586 diagram Methods 0.000 description 15
- 239000001257 hydrogen Substances 0.000 description 13
- 229910052739 hydrogen Inorganic materials 0.000 description 13
- 150000002431 hydrogen Chemical class 0.000 description 11
- 150000002500 ions Chemical class 0.000 description 11
- 238000006243 chemical reaction Methods 0.000 description 10
- 238000004140 cleaning Methods 0.000 description 8
- 239000011780 sodium chloride Substances 0.000 description 8
- -1 hydrogen ions Chemical class 0.000 description 7
- 238000003860 storage Methods 0.000 description 7
- 230000032258 transport Effects 0.000 description 7
- 230000007723 transport mechanism Effects 0.000 description 7
- 239000007789 gas Substances 0.000 description 6
- 230000015572 biosynthetic process Effects 0.000 description 5
- 239000008367 deionised water Substances 0.000 description 5
- 229910021641 deionized water Inorganic materials 0.000 description 5
- IXCSERBJSXMMFS-UHFFFAOYSA-N hcl hcl Chemical class Cl.Cl IXCSERBJSXMMFS-UHFFFAOYSA-N 0.000 description 5
- QPJSUIGXIBEQAC-UHFFFAOYSA-N n-(2,4-dichloro-5-propan-2-yloxyphenyl)acetamide Chemical compound CC(C)OC1=CC(NC(C)=O)=C(Cl)C=C1Cl QPJSUIGXIBEQAC-UHFFFAOYSA-N 0.000 description 5
- 229910004298 SiO 2 Inorganic materials 0.000 description 3
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- 238000012986 modification Methods 0.000 description 3
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- 239000004065 semiconductor Substances 0.000 description 3
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical class [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 3
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 description 2
- 150000001450 anions Chemical class 0.000 description 2
- 239000000969 carrier Substances 0.000 description 2
- 229910052681 coesite Inorganic materials 0.000 description 2
- 229910052906 cristobalite Inorganic materials 0.000 description 2
- 238000007654 immersion Methods 0.000 description 2
- 238000003475 lamination Methods 0.000 description 2
- 229910021645 metal ion Inorganic materials 0.000 description 2
- 239000005416 organic matter Substances 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 229910052682 stishovite Inorganic materials 0.000 description 2
- 229910052905 tridymite Inorganic materials 0.000 description 2
- 229910003638 H2SiF6 Inorganic materials 0.000 description 1
- 230000002378 acidificating effect Effects 0.000 description 1
- 239000007864 aqueous solution Substances 0.000 description 1
- 239000002585 base Substances 0.000 description 1
- 230000003028 elevating effect Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- XLYOFNOQVPJJNP-ZSJDYOACSA-N heavy water Substances [2H]O[2H] XLYOFNOQVPJJNP-ZSJDYOACSA-N 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
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- ZEFWRWWINDLIIV-UHFFFAOYSA-N tetrafluorosilane;dihydrofluoride Chemical compound F.F.F[Si](F)(F)F ZEFWRWWINDLIIV-UHFFFAOYSA-N 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02008—Multistep processes
- H01L21/0201—Specific process step
- H01L21/02019—Chemical etching
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
- H01L21/67063—Apparatus for fluid treatment for etching
- H01L21/67075—Apparatus for fluid treatment for etching for wet etching
- H01L21/67086—Apparatus for fluid treatment for etching for wet etching with the semiconductor substrates being dipped in baths or vessels
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
- H01L21/67703—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations
- H01L21/67721—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations the substrates to be conveyed not being semiconductor wafers or large planar substrates, e.g. chips, lead frames
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
- H01L21/67703—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations
- H01L21/6773—Conveying cassettes, containers or carriers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/68742—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a lifting arrangement, e.g. lift pins
Definitions
- the present disclosure relates to a substrate processing method and a substrate processing apparatus.
- Patent Document 1 there is known a technique of etching a silicon oxide film formed on a substrate such as a semiconductor wafer with an etchant containing, for example, hydrofluoric acid (see Patent Document 1).
- the present disclosure provides a technique for etching a laminated film including a plurality of silicon oxide films with different film thicknesses, which can reduce variations in etching rate for each silicon oxide film.
- a substrate processing method includes a step of preparing a substrate and a step of etching the substrate.
- the step of preparing a substrate prepares a substrate having a laminated film including a plurality of silicon oxide films with different film thicknesses.
- the substrate is etched with an etchant to which hydrochloric acid is added.
- FIG. 1 is an explanatory diagram of substrate processing according to the embodiment.
- FIG. 2 is an explanatory diagram of substrate processing according to the embodiment.
- FIG. 3 is a graph showing variations in etching rate for each silicon oxide film when using an etchant to which hydrochloric acid and a metal salt are added.
- FIG. 4 is a graph showing variations in etching rate for each silicon oxide film when using an etchant to which hydrochloric acid and a metal salt are added.
- FIG. 5 is a diagram for explaining the formation of water clusters.
- FIG. 6 is a diagram for explaining the formation of spherical structures.
- FIG. 7 is a diagram for explaining how the surface potential of a portion of the polysilicon film shifts from negative to positive.
- FIG. 1 is an explanatory diagram of substrate processing according to the embodiment.
- FIG. 2 is an explanatory diagram of substrate processing according to the embodiment.
- FIG. 3 is a graph showing variations in etching rate for each silicon oxide film when using
- FIG. 8 is a graph showing variations in etching rate for each silicon oxide film when using an etchant containing a surfactant.
- FIG. 9 is a graph showing variations in etching rate for each silicon oxide film when using an etchant containing a surfactant.
- FIG. 10 is a diagram showing the configuration of the substrate processing apparatus according to the embodiment.
- FIG. 11 is a diagram showing the configuration of a processing bath according to the embodiment.
- FIG. 12 is a flow chart showing the procedure of processing executed by the substrate processing apparatus according to the embodiment.
- FIG. 13 is a diagram illustrating a configuration example of a processing unit according to a modification;
- FIGS. 1 and 2 are explanatory diagrams of substrate processing according to the embodiment.
- a semiconductor wafer (hereinafter referred to as wafer W) having the structure shown in FIG. 1 is prepared.
- the wafer W is constructed by forming a plurality of silicon oxide films 11 and a plurality of polysilicon films 12 on a silicon substrate 10 .
- a plurality of silicon oxide films 11 are formed on the silicon substrate 10 at intervals in the vertical direction.
- the plurality of silicon oxide films 11 have different film thicknesses.
- the film thickness of the plurality of silicon oxide films 11 is, for example, 1 nm or more and 30 nm or less.
- the polysilicon film 12 is formed adjacent to each of the plurality of silicon oxide films 11 in the vertical direction. Since the plurality of silicon oxide films 11 have different film thicknesses, the polysilicon films 12 in contact with each of the plurality of silicon oxide films 11 are formed with different intervals therebetween.
- the wafer W to be subjected to substrate processing has a laminated film in which the silicon oxide film 11 and the polysilicon film 12 are alternately laminated.
- the wafer W may be a laminated film including at least a plurality of silicon oxide films 11 having different film thicknesses, and the structure of the laminated film is not particularly limited to the example shown in FIG.
- a silicon film, a silicon nitride film, a metal-containing film, or the like can be used as other films formed adjacent to each of the plurality of silicon oxide films 11, in addition to the polysilicon film 12 described above. That is, the other film can be selected from at least one of a silicon film, a polysilicon film, a silicon nitride film and a metal-containing film.
- the wafer W is formed with grooves 15 through which the etchant penetrates to etch the laminated silicon oxide film 11 .
- the substrate processing according to the embodiment selectively etches the silicon oxide film 11 by an etching process using an etchant.
- the end face of the silicon oxide film 11 facing the trench 15 recedes from the end face of the polysilicon film 12 facing the trench 15 in the width direction of the trench 15 , and the polysilicon film 12 is flattened. The upper and lower surfaces of the ends are exposed.
- the variation in etching rate for each silicon oxide film 11 increases. Specifically, the silicon oxide film 11 having a smaller thickness is less likely to be etched than the silicon oxide film 11 having a larger thickness.
- each silicon oxide film 11 is reduced by etching the wafer W using an etching solution to which at least one of hydrochloric acid, a metal salt, and a surfactant is added. It was found that variation can be suppressed.
- 3 and 4 are graphs showing variations in etching rate for each silicon oxide film 11 when using an etchant containing hydrochloric acid (HCl) and metal salt (NaCl or CaCl 2 ).
- the vertical axis represents an etching rate ratio (ER ratio), which is an index value for determining variations in etching rate for each silicon oxide film 11 .
- the etching rate ratio is the ratio of the etching rate of the silicon oxide film 11 having the smallest thickness to the etching rate of the silicon oxide film 11 having the largest thickness among the plurality of laminated silicon oxide films.
- the etching rate ratio indicates that the closer the value is to 1, the smaller the variation in the etching rate for each silicon oxide film 11 is.
- w/o Additives indicates the etching rate ratio in the laminated film when using an etching solution to which hydrochloric acid and metal salt are not added.
- HCl indicates the etching rate ratio in the laminated film when using an etching solution to which hydrochloric acid (HCl) is added.
- NaCl indicates the etching rate ratio in the laminated film when using an etchant to which NaCl is added as a metal salt.
- CaCl 2 indicates the etching rate ratio in the laminated film when using an etchant to which CaCl 2 is added as a metal salt.
- FIG. 3 shows experimental results when the concentration of hydrochloric acid and metal salt in the etching solution is 0.05 wt %, and FIG. %.
- the etching rate ratio when using the etching solution to which NaCl is added as a metal salt is higher than the etching rate ratio when using the etching solution to which neither hydrochloric acid nor metal salt is added. big in comparison.
- the etching rate ratio when using an etching solution to which CaCl 2 is added as a metal salt is higher than the etching rate ratio when using an etching solution to which neither hydrochloric acid nor a metal salt is added. big in comparison.
- FIG. 4 shows that the etching rate ratio when using an etching solution to which CaCl 2 is added as a metal salt is added.
- the etching rate ratio in the case of using the etching solution to which hydrochloric acid (HCl) is added is compared to the etching rate ratio in the case of using the etching solution to which neither hydrochloric acid nor metal salt is added. big.
- HCl hydrochloric acid
- FIGS. 3 and 4 by etching the wafer W using the etchant to which NaCl is added as a metal salt, variations in the etching rate for each silicon oxide film 11 can be suppressed. It is understood that Further, from the experimental results shown in FIG.
- the etching mechanism of the silicon oxide film 11 proceeds as follows. First, as shown in chemical reaction formula (1), silicon oxide (SiO 2 ) reacts with hydrofluoric acid (HF) contained in the etchant and dissolves in the etchant. In other words, silicon oxide film 11 is etched.
- chemical reaction formula (1) silicon oxide (SiO 2 ) reacts with hydrofluoric acid (HF) contained in the etchant and dissolves in the etchant. In other words, silicon oxide film 11 is etched.
- hydrogen difluoride ions (HF 2 ⁇ ) are generated by the reactions represented by the chemical reaction formulas (2) and (3).
- the etching of the silicon oxide film 11 proceeds by promoting the reaction between silicon oxide (SiO 2 ) and hydrofluoric acid (HF) by the etchant hydrogen difluoride ions (HF 2 ⁇ ). . Therefore, in order for the etching of the silicon oxide film 11 to progress, it is important that the hydrogen difluoride ions (HF 2 ⁇ ) reach the silicon oxide film 11 .
- FIG. 5 is a diagram for explaining the formation of water clusters. Water clusters 16p are formed more densely as the distance between polysilicon films 12 in contact with silicon oxide film 11 is narrower, in other words, as the film thickness of silicon oxide film 11 is smaller.
- the water clusters 16p may prevent the hydrogen difluoride ions (HF 2 ⁇ ) from reaching the silicon oxide film 11 .
- the etching rate of the silicon oxide film 11 with a smaller thickness is lower than the etching rate of the silicon oxide film 11 with a larger thickness.
- the etching rate of each silicon oxide film 11 varies.
- metal ions eg, Na +
- anions eg, Cl ⁇
- Anions for example, Cl ⁇
- metal ions (eg, Na + ) generated from the metal salt in the etching solution combine with water molecules (that is, hydrate) on the surface of the polysilicon film 12, as shown in FIG.
- FIG. 6 is a diagram for explaining the formation of spherical structures.
- the spherical structures 16s are formed on the surface of the polysilicon film 12, even if the thickness of the silicon oxide film 11 is small, the space through which hydrogen difluoride ions (HF 2 ⁇ ) can pass increases. , the arrival of hydrogen difluoride ions (HF 2 ⁇ ) to the silicon oxide film 11 is not hindered. As a result, it is considered that the variation in the etching rate for each silicon oxide film 11 is reduced as compared with the case of using an etchant to which no metal salt is added.
- FIG. 7 is a diagram for explaining how the surface potential of a portion of the polysilicon film shifts from negative to positive.
- oxonium ions H 3 O +
- the space through which the hydrogen difluoride ions (HF 2 ⁇ ) can pass increases, and the hydrogen difluoride ions (HF 2 ⁇ ) pass through the silicon oxide film. Reaching 11 is not hindered. As a result, it is considered that the variation in the etching rate for each silicon oxide film 11 is reduced as in the case of using an etchant to which a metal salt is added.
- FIGS. 8 and 9 are graphs showing variations in etching rate for each silicon oxide film 11 when using an etchant to which a surfactant (OACl, OTMACl or SDBS) is added.
- a surfactant OACl, OTMACl or SDBS
- the processing conditions for the experimental results shown in FIGS. 8 and 9 are the same as the processing conditions for the experimental results shown in FIGS. 3 and 4, except for the following points.
- Surfactants added to the etchant n-octylamine hydrochloride (OACl), n-octyltrimethylammonium chloride (OTMACl) or sodium dodecylbenzenesulfonate (SDBS)
- the vertical axis represents an etching rate ratio (ER ratio), which is an index value for determining variations in etching rate for each silicon oxide film 11 .
- the etching rate ratio is the ratio of the etching rate of the silicon oxide film 11 having the smallest thickness to the etching rate of the silicon oxide film 11 having the largest thickness among the plurality of laminated silicon oxide films.
- the etching rate ratio indicates that the closer the value is to 1, the smaller the variation in the etching rate for each silicon oxide film 11 is.
- w/o Additives indicates the etching rate ratio in the laminated film when using an etchant to which no surfactant is added.
- OACl indicates the etching rate ratio in the laminated film when using an etchant to which OACl is added as a surfactant.
- OTMACl indicates the etching rate ratio in the laminated film when using an etchant to which OTMACl is added as a surfactant.
- SDBS indicates the etching rate ratio in the laminated film when using an etchant to which SDBS is added as a surfactant.
- FIG. 8 shows the experimental results when the surfactant concentration in the etching solution is 0.05 wt %
- FIG. 9 shows the experimental results when the surfactant concentration in the etching solution is 0.5 wt %. This is the result.
- the etching rate ratio in the case of using the etchant to which OTMACl is added as a surfactant is higher than the etching rate ratio in the case of using the etchant to which no surfactant is added. big in comparison.
- the etching rate ratio when using an etching solution to which OACl or SDBS is added as a surfactant is the etching rate ratio when using an etching solution to which no surfactant is added. large compared to As described above, from the experimental results shown in FIGS.
- This experimental result is considered, for example, as follows. That is, when an etchant to which a surfactant is added is used, the surfactant in the etchant forms a hydration structure (that is, between water molecules) in the water clusters 16p (see FIG. 5) on the surface of the polysilicon film 12. bond).
- the hydration structure in the water clusters 16p on the surface of the polysilicon film 12 is destroyed, even if the thickness of the silicon oxide film 11 is small, a space through which hydrogen difluoride ions (HF 2 ⁇ ) can pass. increases, and the arrival of hydrogen difluoride ions (HF 2 ⁇ ) to the silicon oxide film 11 is not hindered.
- the variation in the etching rate for each silicon oxide film 11 is reduced as compared with the case of using an etchant to which no surfactant is added.
- an etchant to which at least one of hydrochloric acid, a metal salt, and a surfactant is added is used to oxidize silicon. It was decided to perform an etching process for the film 11 .
- the etchant according to the embodiment is a chemical solution containing hydrofluoric acid.
- the concentration of hydrofluoric acid in the etchant is, for example, 0.1 wt % or more and 50 wt % or less.
- an alkali metal halide or an alkaline earth metal halide can be used as the metal salt added to the etchant.
- the alkali metal halide for example, NaCl mentioned above can be used.
- the alkali metal halide may contain at least one of Li, Na, K, Rb and Cs.
- the alkaline earth metal halide for example CaCl 2 as described above can be used.
- the alkaline earth metal halide may contain at least one of Mg, Ca, Sr and Ba.
- the concentration of each of hydrochloric acid and metal salt in the etching solution is preferably 0.5 wt % or more and 5 wt % or less. As is clear from the experimental results shown in FIGS. 3 and 4, this makes it possible to reduce variations in the etching rate for each silicon oxide film 11 regardless of the type of metal salt. Further, by setting the concentration of the metal salt in the etchant to 5 wt % or less, contamination of the wafer W with metal can be suppressed.
- the concentration of hydrochloric acid before being added to the etching solution is preferably 35 wt % or more and 37 wt % or less, for example.
- a cationic surfactant or an anionic surfactant can be used as the surfactant added to the etching solution.
- a cationic surfactant for example, n-octylamine hydrochloride (OACl) or n-octyltrimethylammonium chloride (OTMACl) described above can be used.
- an anionic surfactant for example, sodium dodecylbenzenesulfonate (SDBS) described above can be used.
- the concentration of the surfactant in the etching liquid is preferably 0.5 wt % or more and 5 wt % or less. As is clear from the experimental results shown in FIGS. 8 and 9, this makes it possible to reduce variations in the etching rate for each silicon oxide film 11 regardless of the type of surfactant. Further, by setting the concentration of the surfactant in the etching liquid to 5 wt % or less, it is possible to suppress the organic matter (dirt) removed by the surfactant from remaining on the surface of the wafer W.
- FIG. 10 is a diagram showing the configuration of the substrate processing apparatus according to the embodiment.
- the substrate processing apparatus 1 includes a carrier loading/unloading unit 2, a lot forming unit 3, a lot placement unit 4, a lot transport unit 5, a lot processing unit 6, a control a part 7;
- the carrier loading/unloading section 2 includes a carrier stage 20 , a carrier transport mechanism 21 , carrier stocks 22 and 23 , and a carrier table 24 .
- the carrier stage 20 carries a plurality of carriers 9 transported from the outside.
- the carrier 9 is a container that accommodates a plurality of (for example, 25) semiconductor wafers (hereinafter referred to as wafers W) arranged vertically in a horizontal posture.
- the carrier transport mechanism 21 transports the carrier 9 among the carrier stage 20 , carrier stocks 22 and 23 and carrier table 24 .
- a plurality of wafers W to be processed are unloaded to the lot processing section 6 by the substrate transport mechanism 30, which will be described later.
- a plurality of processed wafers W are carried from the lot processing section 6 to the carrier 9 mounted on the carrier mounting table 24 by the substrate transfer mechanism 30 .
- the lot formation unit 3 has a substrate transport mechanism 30 and forms lots.
- a lot consists of a plurality of (for example, 50) wafers W that are processed simultaneously by combining wafers W housed in one or more carriers 9 .
- a plurality of wafers W forming one lot are arranged at regular intervals with their plate surfaces facing each other.
- the substrate transfer mechanism 30 transfers a plurality of wafers W between the carrier 9 mounted on the carrier mounting table 24 and the lot mounting section 4 .
- the lot placing unit 4 has a lot transport table 40 and temporarily places (stands by) the lot transported between the lot forming unit 3 and the lot processing unit 6 by the lot transporting unit 5 .
- the lot conveyance table 40 includes a loading-side lot mounting table 41 for mounting a lot formed by the lot forming section 3 before being processed, and an unloading-side lot mounting table for mounting a lot processed by the lot processing section 6. 42.
- a plurality of wafers W for one lot are placed in a standing posture in front and behind on the load-in side lot table 41 and the carry-out side lot table 42 .
- the lot transport unit 5 has a lot transport mechanism 50 and transports lots between the lot placement unit 4 and the lot processing unit 6 and inside the lot processing unit 6 .
- the lot transport mechanism 50 has a rail 51 , a moving body 52 and a substrate holder 53 .
- the rails 51 are arranged along the X-axis direction across the lot placement section 4 and the lot processing section 6 .
- the moving body 52 is configured to be movable along the rails 51 while holding a plurality of wafers W. As shown in FIG.
- the substrate holder 53 is provided on the moving body 52 and holds a plurality of wafers W arranged in front and back in an upright posture.
- the lot processing unit 6 performs etching processing, cleaning processing, drying processing, etc. on a plurality of wafers W for one lot.
- a plurality (here, two) of etching processing devices 60 , substrate holder cleaning processing devices 80 , and drying processing devices 90 are arranged side by side along rails 51 .
- the etching processing apparatus 60 collectively performs etching processing on a plurality of wafers W for one lot.
- the substrate holder cleaning apparatus 80 performs cleaning processing of the substrate holder 53 .
- the drying processing apparatus 90 collectively performs drying processing on a plurality of wafers W for one lot.
- the number of etching processing devices 60, substrate holder cleaning processing devices 80, and drying processing devices 90 is not limited to the example in FIG.
- the etching processing apparatus 60 includes a processing bath 61 for etching processing, a processing bath 62 for rinsing processing, and substrate lifting mechanisms 63 and 64 .
- the processing bath 61 and the processing bath 62 can accommodate one lot of wafers W, and store an etchant. An etchant is stored in the processing bath 61 . Details of the processing tank 61 will be described later.
- a processing liquid (deionized water, etc.) for rinsing is stored in the processing tank 62 .
- the substrate elevating mechanisms 63 and 64 hold a plurality of wafers W forming a lot in a state of being arranged back and forth in an upright posture.
- the etching processing apparatus 60 holds the lot conveyed by the lot conveying unit 5 by the substrate lifting mechanism 63, immerses the lot in the etching solution in the processing bath 61, and performs etching processing.
- the etching apparatus 60 holds the lot transported to the processing bath 62 by the lot transport unit 5 by the substrate lifting mechanism 64 and immerses the lot in the rinsing liquid of the processing bath 62 for rinsing.
- the drying processing apparatus 90 has a processing bath 91 and a substrate lifting mechanism 92 .
- a processing gas for drying is supplied to the processing bath 91 .
- the substrate lifting mechanism 92 holds a plurality of wafers W for one lot side by side in the front-rear direction in an upright posture.
- the drying processing device 90 holds the lot transported by the lot transporting unit 5 with the substrate lifting mechanism 92 and performs drying processing using the processing gas for drying processing supplied into the processing bath 91 .
- the lot that has been dried in the processing tank 91 is transferred to the lot placement section 4 by the lot transfer section 5 .
- the substrate holder cleaning processing apparatus 80 supplies cleaning processing liquid to the substrate holder 53 of the lot transport mechanism 50 and further supplies dry gas to perform cleaning processing of the substrate holder 53 .
- the control unit 7 controls the operation of each unit of the substrate processing apparatus 1 (carrier loading/unloading unit 2, lot forming unit 3, lot placement unit 4, lot transport unit 5, lot processing unit 6, etc.).
- the control section 7 controls the operation of each section of the substrate processing apparatus 1 based on signals from switches, various sensors, and the like.
- the control unit 7 includes a microcomputer having a CPU (Central Processing Unit), ROM (Read Only Memory), RAM (Random Access Memory), input/output ports, and various circuits, and programs stored in a storage unit (not shown). is read and executed to control the operation of the substrate processing apparatus 1 .
- the control unit 7 has a computer-readable storage medium 8 .
- the storage medium 8 stores the above programs for controlling various processes executed in the substrate processing apparatus 1 .
- the program may have been stored in the computer-readable storage medium 8 and installed in the storage medium 8 of the control unit 7 from another storage medium.
- Examples of computer-readable storage media 8 include hard disks (HD), flexible disks (FD), compact disks (CD), magnet optical disks (MO), memory cards, and the like.
- FIG. 11 is a diagram showing the configuration of the processing tank 61 according to the embodiment.
- the processing tank 61 performs an etching process for etching the silicon oxide film 11 formed on the wafers W by immersing the wafers W for one lot in an etchant.
- the processing bath 61 includes an inner bath 100 and an outer bath 110 .
- the processing tank 61 also includes a circulation section 120 and an etchant supply section 130 .
- the inner tank 100 is open at the top and stores an etchant inside. A lot (a plurality of wafers W) is immersed in such an inner bath 100 .
- the outer tub 110 is open at the top and is arranged around the top of the inner tub 100 .
- the etchant overflowing from the inner bath 100 flows into the outer bath 110 .
- the circulation unit 120 circulates the etchant between the inner bath 100 and the outer bath 110 .
- the circulation section 120 includes a circulation path 121 , a nozzle 122 , a pump 123 , a filter 124 and a temperature adjustment section 125 .
- the circulation path 121 connects the outer tank 110 and the inner tank 100 .
- One end of the circulation path 121 is connected to the outer bath 110 and the other end of the circulation path 121 is connected to a nozzle 122 arranged inside the inner bath 100 .
- the pump 123 , the filter 124 and the temperature adjustment section 125 are provided in the circulation path 121 .
- a pump 123 sends out the etchant in the outer bath 110 to the circulation path 121 .
- Filter 124 removes impurities from the etchant flowing through circulation path 121 .
- the temperature adjustment unit 125 is, for example, a heater, and adjusts the temperature of the etchant flowing through the circulation path 121 to a temperature suitable for the etching process. Pump 123 and temperature adjuster 125 are controlled by controller 7 .
- the circulation unit 120 sends the etchant from the outer tank 110 to the inner tank 100 via the circulation path 121 .
- the etchant sent into the inner bath 100 overflows the inner bath 100 and flows out to the outer bath 110 again.
- the etchant circulates between the inner bath 100 and the outer bath 110 .
- the etchant supply unit 130 supplies the etchant to the processing bath 61 .
- the etchant supply unit 130 includes an etchant supply source 131 , a supply path 132 , a valve 133 and a switching unit 134 .
- the etchant supply source 131 supplies an etchant to which at least one of hydrochloric acid, metal salt, and surfactant has been added in advance.
- the supply path 132 is connected to the etchant supply source 131 and supplies the etchant supplied from the etchant supply source 131 to the inner bath 100 or the outer bath 110 .
- the valve 133 is provided in the supply path 132 and opens and closes the supply path 132 .
- the switching unit 134 is provided in the supply path 132 and switches the outflow destination of the etchant flowing through the supply path 132 between the inner tank 100 and the outer tank 110 .
- the valve 133 and the switching section 134 are electrically connected to the control section 7 and controlled by the control section 7 .
- the control unit 7 controls the valve 133 and the switching unit 134 to supply a new etchant from the etchant supply source 131 to the inner bath 100. supply.
- the control section 7 controls the valve 133 and the switching section 134 to supply new etching liquid from the etching liquid supply source 131 to the outer tank 110. supply.
- FIG. 12 is a flow chart showing the procedure of processing executed by the substrate processing apparatus 1 according to the embodiment.
- the processing procedure shown in FIG. 12 is executed under the control of the control unit 7 .
- the substrate processing apparatus 1 first performs a preparation process (step S101).
- a preparation process as shown in FIG. 1, a plurality of wafers W each having a laminated film including a plurality of silicon oxide films 11 with different film thicknesses are prepared.
- an etching process using an etchant is performed on a plurality of wafers W forming a lot (step S102).
- the plurality of wafers W are lowered using the substrate lifting mechanism 63 to immerse the plurality of wafers W in the etchant stored in the inner bath 100 of the processing bath 61 .
- This etching process is performed until the laminated film formed on the wafer W changes from the initial state shown in FIG. 1 to the laminated surface exposed state shown in FIG. That is, the etching process exposes the lamination surfaces (upper and lower surfaces) of the polysilicon film 12 by etching the silicon oxide film 11 in contact with the polysilicon film 12 .
- the inventors of the present application have found that the etching solution to which at least one of hydrochloric acid, a metal salt, and a surfactant are added is more effective than an etching solution to which hydrochloric acid, a metal salt, and a surfactant are not added. It has been confirmed experimentally that the variation in etching rate between each step is reduced. Therefore, in the substrate processing apparatus 1, an etching process is performed using an etchant to which at least one of hydrochloric acid, a metal salt, and a surfactant is added. Thereby, variations in the etching rate for each silicon oxide film 11 can be reduced.
- a rinse process is performed in the substrate processing apparatus 1 (step S103).
- a plurality of wafers W that have undergone the etching process are transported to the processing tank 62 for the rinsing process and immersed in a rinse liquid (deionized water or the like) stored in the processing tank 62 .
- a rinse liquid deionized water or the like
- a drying process is performed in the substrate processing apparatus 1 (step S104).
- a plurality of wafers W that have finished the rinsing process are transferred to the processing tank 91 for the drying process, and the rinsing liquid adhering to the surfaces of the plurality of wafers W is removed by the processing gas. Thereby, the plurality of wafers W are dried.
- the plurality of wafers W that have undergone the drying process are housed in the carrier 9 placed on the carrier stage 20 .
- substrate processing for one lot is completed.
- FIG. 13 is a diagram illustrating a configuration example of a processing unit according to a modification
- the processing unit 200 includes a chamber 220, a substrate holding mechanism 230, a nozzle 240, and a recovery cup 250.
- the chamber 220 accommodates the substrate holding mechanism 230 , the nozzle 240 and the collection cup 250 .
- An FFU (Fan Filter Unit) 221 is provided on the ceiling of the chamber 220 . FFU 221 creates a downflow within chamber 220 .
- the substrate holding mechanism 230 includes a holding portion 231 , a support portion 232 and a driving portion 233 .
- the holding part 231 holds the wafer W horizontally.
- the column portion 232 is a member extending in the vertical direction, the base end portion of which is rotatably supported by the drive portion 233, and the tip portion of which supports the holding portion 231 horizontally.
- the drive section 233 rotates the support section 232 around the vertical axis.
- the substrate holding mechanism 230 rotates the supporting part 231 supported by the supporting part 232 by rotating the supporting part 232 using the driving part 233, thereby rotating the wafer W held by the supporting part 231. .
- the nozzle 240 is arranged above the wafer W held by the holding part 231 and supplies various processing liquids to the wafer W.
- the collection cup 250 is arranged to surround the holding portion 231 and collects the processing liquid scattered from the wafer W due to the rotation of the holding portion 231 .
- a drain port 251 is formed at the bottom of the recovery cup 250 , and the processing liquid collected by the recovery cup 250 is discharged to the outside of the processing unit 200 through the drain port 251 .
- An exhaust port 252 is formed at the bottom of the collection cup 250 to discharge the gas supplied from the FFU 221 to the outside of the processing unit 200 .
- the processing unit 200 further includes an etchant supply section 260 and a rinse liquid supply section 270 .
- the etchant supply unit 260 includes an etchant supply source 261 and a valve 262 and supplies the etchant supplied from the etchant supply source 261 to the nozzle 240 .
- the rinse liquid supply unit 270 includes a rinse liquid supply source 271 and a valve 272 and supplies the rinse liquid (deionized water or the like) supplied from the rinse liquid supply source 271 to the nozzle 240 .
- etching processing is first performed.
- the valve 262 is opened for a predetermined time to supply the etchant to the wafer W held and rotated by the substrate holding mechanism 230 .
- the processing unit 200 performs a rinse process.
- the valve 272 is opened for a predetermined time to supply the rinsing liquid to the wafer W held and rotated by the substrate holding mechanism 230 .
- a drying process is performed.
- the wafer W is dried by increasing the rotation speed of the wafer W to shake off the rinse liquid from the wafer W.
- FIG. When the drying process is completed, the substrate processing for one wafer W is completed.
- the substrate processing according to the embodiment can also be applied to a single-wafer processing unit that processes wafers W one by one.
- the polysilicon film 12 and each of the plurality of silicon oxide films 11 are formed adjacent to each other in the vertical direction. structure is not limited to this.
- each of the plurality of silicon oxide films 11 and another film formed adjacent to each of the plurality of silicon oxide films 11 may be formed adjacent to each other in the horizontal direction.
- the surface of the wafer W is coated with SC2 (mixed solution of hydrochloric acid and hydrogen peroxide).
- a removal treatment may be performed to remove residual metal salts.
- other films formed adjacent to each of the plurality of silicon oxide films 11 are preferably not metal-containing films.
- the substrate processing method includes a step of preparing a substrate (for example, wafer W) and a step of etching the substrate.
- the step of preparing a substrate prepares a substrate having a laminated film including a plurality of silicon oxide films (for example, silicon oxide film 11) with different film thicknesses.
- the substrate is etched with an etchant to which at least one of hydrochloric acid, a metal salt and a surfactant is added. Therefore, according to the substrate processing method according to the embodiment, it is possible to reduce variations in the etching rate for each silicon oxide film in the technique of etching a laminated film including a plurality of silicon oxide films having different film thicknesses.
- the concentration of each of hydrochloric acid and metal salt in the etching solution may be 0.5 wt% or more and 5 wt% or less. This makes it possible to reduce variations in etching rate for each silicon oxide film regardless of the type of metal salt. Further, by setting the concentration of the metal salt in the etching liquid to 5 wt % or less, contamination of the substrate with metal can be suppressed.
- the concentration of the surfactant in the etchant may be 0.5 wt% or more and 5 wt% or less. This makes it possible to reduce variations in etching rate for each silicon oxide film regardless of the type of surfactant. Further, by setting the concentration of the surfactant in the etching liquid to 5 wt % or less, it is possible to suppress the organic matter (dirt) removed by the surfactant from remaining on the surface of the substrate.
- the substrate processing method according to the embodiment may further include a step of removing metal salts remaining on the surface of the substrate in SC2 after the step of etching the substrate. As a result, contamination of the substrate with metal can be suppressed.
- (Appendix 1) Preparing a substrate having a laminated film containing a plurality of silicon oxide films with different film thicknesses; and etching the substrate with an etchant to which hydrochloric acid is added.
- (Appendix 2) Preparing a substrate having a laminated film containing a plurality of silicon oxide films with different film thicknesses; and a step of etching the substrate with an etchant to which a metal salt is added.
- (Appendix 3) Preparing a substrate having a laminated film containing a plurality of silicon oxide films with different film thicknesses; and a step of etching the substrate with an etchant to which a surfactant is added.
- the laminated film is a laminated film further comprising another film formed adjacent to each of the plurality of silicon oxide films, 4.
- Appendix 5 The substrate processing method according to appendix 4, wherein in the laminated film, the other film and each of the plurality of silicon oxide films are formed adjacent to each other in a vertical direction or a horizontal direction. (Appendix 6) 6.
- Appendix 7 The substrate processing method according to any one of appendices 1 to 6, wherein the etchant contains hydrofluoric acid.
- Appendix 8) 8. The substrate processing method according to appendix 7, wherein the concentration of the hydrofluoric acid in the etching liquid is 0.1 wt % or more and 50 wt % or less.
- Appendix 9) The substrate processing method according to appendix 1, wherein the concentration of the hydrochloric acid before being added to the etching solution is 35 wt % or more and 37 wt % or less.
- (Appendix 10) The substrate processing method according to appendix 2, wherein the metal salt is an alkali metal halide or an alkaline earth metal halide.
- the alkali metal halide comprises at least one of Li, Na, K, Rb and Cs; 11.
- Appendix 12 The substrate processing method according to appendix 1, wherein the concentration of each of the hydrochloric acid and the metal salt in the etching solution is 0.5 wt % or more and 5 wt % or less.
- Appendix 16 The substrate processing method according to appendix 2, further comprising a step of removing the metal salt remaining on the surface of the substrate in SC2 after the step of etching the substrate.
- Appendix 17 a processing tank for storing an etchant to which hydrochloric acid has been added; and a control unit that controls each part, The control unit A substrate processing apparatus for etching a substrate by immersing a substrate having a laminated film including a plurality of silicon oxide films with different film thicknesses in the etchant stored in the processing bath.
- (Appendix 18) a processing tank for storing an etchant to which a metal salt has been added; and a control unit that controls each part,
- the control unit A substrate processing apparatus for etching a substrate by immersing a substrate having a laminated film including a plurality of silicon oxide films with different film thicknesses in the etchant stored in the processing bath.
- (Appendix 19) a processing tank for storing an etchant to which a surfactant is added; and a control unit that controls each part,
- the control unit A substrate processing apparatus for etching a substrate by immersing a substrate having a laminated film including a plurality of silicon oxide films with different film thicknesses in the etchant stored in the processing bath.
- control unit 10 silicon substrate 11 silicon oxide film 12 polysilicon film 15 groove 16p water cluster 16s spherical structure 60 etching processing unit 61 processing tank 100 inner tank 110 outer tank 120 circulation unit 130 etching liquid supply unit W wafer
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Abstract
Description
まず、実施形態に係る基板処理の内容について図1および図2を参照して説明する。図1および図2は、実施形態に係る基板処理の説明図である。 <About substrate processing>
First, details of substrate processing according to the embodiment will be described with reference to FIGS. 1 and 2. FIG. 1 and 2 are explanatory diagrams of substrate processing according to the embodiment.
積層膜中のシリコン酸化膜の積層数:3
シリコン酸化膜の膜厚:最下層から順に、15nm、30nm、7.5nm
処理工程:エッチング液への浸漬(エッチング処理)、その後、DIW(脱イオン水)への浸漬(リンス処理)、その後、乾燥気体を用いた乾燥処理
エッチング液:フッ酸(HF)水溶液
エッチング液に添加された添加物:塩酸(HCl)および金属塩(NaClまたはCaCl2) The processing conditions for the experimental results shown in FIGS. 3 and 4 are as follows.
Lamination number of silicon oxide films in laminated film: 3
Thickness of silicon oxide film: 15 nm, 30 nm, 7.5 nm from the bottom layer
Treatment process: immersion in etching solution (etching treatment), then immersion in DIW (deionized water) (rinsing treatment), then drying treatment using dry gas Etching solution: hydrofluoric acid (HF) aqueous solution To etching solution Additives added: Hydrochloric acid (HCl) and metal salts (NaCl or CaCl 2 )
HF+F-⇔HF2 - ・・・ (3) HF⇔H + +F - (2)
HF+F - ⇔ HF 2 - (3)
エッチング液に添加された界面活性剤:n-オクチルアミン塩酸塩(OACl)、n-オクチルトリメチルアンモニウムクロリド(OTMACl)またはドデシルベンゼンスルホン酸ナトリウム(SDBS) The processing conditions for the experimental results shown in FIGS. 8 and 9 are the same as the processing conditions for the experimental results shown in FIGS. 3 and 4, except for the following points.
Surfactants added to the etchant: n-octylamine hydrochloride (OACl), n-octyltrimethylammonium chloride (OTMACl) or sodium dodecylbenzenesulfonate (SDBS)
次に、上述した基板処理を行う基板処理装置の構成について図10を参照して説明する。図10は、実施形態に係る基板処理装置の構成を示す図である。 [Configuration of substrate processing apparatus]
Next, the configuration of the substrate processing apparatus that performs the substrate processing described above will be described with reference to FIG. FIG. 10 is a diagram showing the configuration of the substrate processing apparatus according to the embodiment.
次に、実施形態に係るエッチング処理に用いられる処理槽61の構成について図11を参照し説明する。図11は、実施形態に係る処理槽61の構成を示す図である。 [Structure of processing tank]
Next, the configuration of the
次に、実施形態に係る基板処理装置1の具体的動作について図12を参照して説明する。図12は、実施形態に係る基板処理装置1が実行する処理の手順を示すフローチャートである。図12に示す処理手順は、制御部7による制御に従って実行される。 [Specific Operation of Substrate Processing Apparatus]
Next, specific operations of the
実施形態に係る基板処理は、ウエハWを1枚ずつ処理する枚葉式の処理ユニットにも適用可能である。図13は、変形例に係る処理ユニットの構成例を示す図である。 [Variation]
The substrate processing according to the embodiment can also be applied to a single-wafer processing unit that processes wafers W one by one. FIG. 13 is a diagram illustrating a configuration example of a processing unit according to a modification;
上記の実施形態では、ウエハW上に形成された積層膜において、ポリシリコン膜12と複数のシリコン酸化膜11の各々とが鉛直方向に互いに隣接して形成される例を示したが、積層膜の構造はこれに限られない。例えば、積層膜において、複数のシリコン酸化膜11の各々と、複数のシリコン酸化膜11の各々と隣接して形成される他の膜とは、水平方向に互いに隣接して形成されてもよい。 [Other variations]
In the above-described embodiment, in the laminated film formed on the wafer W, the
(付記1)
膜厚が異なる複数のシリコン酸化膜を含む積層膜を有する基板を準備する工程と、
塩酸が添加されたエッチング液で前記基板のエッチング処理を行う工程と
を含む、基板処理方法。
(付記2)
膜厚が異なる複数のシリコン酸化膜を含む積層膜を有する基板を準備する工程と、
金属塩が添加されたエッチング液で前記基板のエッチング処理を行う工程と
を含む、基板処理方法。
(付記3)
膜厚が異なる複数のシリコン酸化膜を含む積層膜を有する基板を準備する工程と、
界面活性剤が添加されたエッチング液で前記基板のエッチング処理を行う工程と
を含む、基板処理方法。
(付記4)
前記積層膜は、さらに、前記複数のシリコン酸化膜の各々と隣接して形成される他の膜を含む積層膜であり、
前記他の膜は、シリコン膜、ポリシリコン膜、シリコン窒化膜および金属含有膜の少なくとも1つから選択される、付記1~3のいずれか一つに記載の基板処理方法。
(付記5)
前記積層膜において、前記他の膜と前記複数のシリコン酸化膜の各々とは、鉛直方向または水平方向に互いに隣接して形成される、付記4に記載の基板処理方法。
(付記6)
前記複数のシリコン酸化膜の膜厚は、1nm以上30nm以下である、付記1~5のいずれか一つに記載の基板処理方法。
(付記7)
前記エッチング液は、フッ酸を含む、付記1~6のいずれか一つに記載の基板処理方法。
(付記8)
前記エッチング液における前記フッ酸の濃度は、0.1wt%以上50wt%以下である、付記7に記載の基板処理方法。
(付記9)
前記エッチング液に添加される前の前記塩酸の濃度は、35wt%以上37wt%以下である、付記1に記載の基板処理方法。
(付記10)
前記金属塩は、ハロゲン化アルカリ金属またはハロゲン化アルカリ土類金属である、付記2に記載の基板処理方法。
(付記11)
前記ハロゲン化アルカリ金属は、Li、Na、K、RbおよびCsのうち少なくとも1つを含み、
前記ハロゲン化アルカリ土類金属は、Mg、Ca、SrおよびBaのうち少なくとも1つを含む、付記10に記載の基板処理方法。
(付記12)
前記エッチング液における前記塩酸および前記金属塩の各々の濃度は、0.5wt%以上5wt%以下である、付記1に記載の基板処理方法。
(付記13)
前記界面活性剤は、陽イオン性界面活性剤または陰イオン性界面活性剤である、付記3に記載の基板処理方法。
(付記14)
前記陽イオン性界面活性剤は、n-オクチルアミン塩酸塩(OACl)またはn-オクチルトリメチルアンモニウムクロリド(OTMACl)であり、
前記陰イオン性界面活性剤は、ドデシルベンゼンスルホン酸ナトリウム(SDBS)である、付記13に記載の基板処理方法。
(付記15)
前記エッチング液における前記界面活性剤の濃度は、0.5wt%以上5wt%以下である、付記3、13、14のいずれか一つに記載の基板処理方法。
(付記16)
前記基板のエッチング処理を行う工程の後に、SC2で前記基板の表面に残留する前記金属塩を除去する工程をさらに含む、付記2に記載の基板処理方法。
(付記17)
塩酸が添加されたエッチング液を貯留する処理槽と、
各部を制御する制御部と
を備え、
前記制御部は、
膜厚が異なる複数のシリコン酸化膜を含む積層膜を有する基板を前記処理槽に貯留される前記エッチング液に浸漬させることによって、前記基板のエッチング処理を行う
基板処理装置。
(付記18)
金属塩が添加されたエッチング液を貯留する処理槽と、
各部を制御する制御部と
を備え、
前記制御部は、
膜厚が異なる複数のシリコン酸化膜を含む積層膜を有する基板を前記処理槽に貯留される前記エッチング液に浸漬させることによって、前記基板のエッチング処理を行う
基板処理装置。
(付記19)
界面活性剤が添加されたエッチング液を貯留する処理槽と、
各部を制御する制御部と
を備え、
前記制御部は、
膜厚が異なる複数のシリコン酸化膜を含む積層膜を有する基板を前記処理槽に貯留される前記エッチング液に浸漬させることによって、前記基板のエッチング処理を行う
基板処理装置。 In addition, the following additional remarks are disclosed regarding the above embodiment.
(Appendix 1)
Preparing a substrate having a laminated film containing a plurality of silicon oxide films with different film thicknesses;
and etching the substrate with an etchant to which hydrochloric acid is added.
(Appendix 2)
Preparing a substrate having a laminated film containing a plurality of silicon oxide films with different film thicknesses;
and a step of etching the substrate with an etchant to which a metal salt is added.
(Appendix 3)
Preparing a substrate having a laminated film containing a plurality of silicon oxide films with different film thicknesses;
and a step of etching the substrate with an etchant to which a surfactant is added.
(Appendix 4)
The laminated film is a laminated film further comprising another film formed adjacent to each of the plurality of silicon oxide films,
4. The substrate processing method according to any one of
(Appendix 5)
5. The substrate processing method according to
(Appendix 6)
6. The substrate processing method according to any one of
(Appendix 7)
7. The substrate processing method according to any one of
(Appendix 8)
8. The substrate processing method according to
(Appendix 9)
The substrate processing method according to
(Appendix 10)
The substrate processing method according to
(Appendix 11)
the alkali metal halide comprises at least one of Li, Na, K, Rb and Cs;
11. The substrate processing method according to
(Appendix 12)
The substrate processing method according to
(Appendix 13)
The substrate processing method according to
(Appendix 14)
the cationic surfactant is n-octylamine hydrochloride (OACl) or n-octyltrimethylammonium chloride (OTMACl);
14. The substrate processing method according to Appendix 13, wherein the anionic surfactant is sodium dodecylbenzenesulfonate (SDBS).
(Appendix 15)
15. The substrate processing method according to any one of
(Appendix 16)
The substrate processing method according to
(Appendix 17)
a processing tank for storing an etchant to which hydrochloric acid has been added;
and a control unit that controls each part,
The control unit
A substrate processing apparatus for etching a substrate by immersing a substrate having a laminated film including a plurality of silicon oxide films with different film thicknesses in the etchant stored in the processing bath.
(Appendix 18)
a processing tank for storing an etchant to which a metal salt has been added;
and a control unit that controls each part,
The control unit
A substrate processing apparatus for etching a substrate by immersing a substrate having a laminated film including a plurality of silicon oxide films with different film thicknesses in the etchant stored in the processing bath.
(Appendix 19)
a processing tank for storing an etchant to which a surfactant is added;
and a control unit that controls each part,
The control unit
A substrate processing apparatus for etching a substrate by immersing a substrate having a laminated film including a plurality of silicon oxide films with different film thicknesses in the etchant stored in the processing bath.
7 制御部
10 シリコン基板
11 シリコン酸化膜
12 ポリシリコン膜
15 溝
16p 水クラスター
16s 球状構造体
60 エッチング処理装置
61 処理槽
100 内槽
110 外槽
120 循環部
130 エッチング液供給部
W ウエハ 1
Claims (19)
- 膜厚が異なる複数のシリコン酸化膜を含む積層膜を有する基板を準備する工程と、
塩酸が添加されたエッチング液で前記基板のエッチング処理を行う工程と
を含む、基板処理方法。 Preparing a substrate having a laminated film containing a plurality of silicon oxide films with different film thicknesses;
and etching the substrate with an etchant to which hydrochloric acid is added. - 膜厚が異なる複数のシリコン酸化膜を含む積層膜を有する基板を準備する工程と、
金属塩が添加されたエッチング液で前記基板のエッチング処理を行う工程と
を含む、基板処理方法。 Preparing a substrate having a laminated film containing a plurality of silicon oxide films with different film thicknesses;
and a step of etching the substrate with an etchant to which a metal salt is added. - 膜厚が異なる複数のシリコン酸化膜を含む積層膜を有する基板を準備する工程と、
界面活性剤が添加されたエッチング液で前記基板のエッチング処理を行う工程と
を含む、基板処理方法。 Preparing a substrate having a laminated film containing a plurality of silicon oxide films with different film thicknesses;
and a step of etching the substrate with an etchant to which a surfactant is added. - 前記積層膜は、さらに、前記複数のシリコン酸化膜の各々と隣接して形成される他の膜を含む積層膜であり、
前記他の膜は、シリコン膜、ポリシリコン膜、シリコン窒化膜および金属含有膜の少なくとも1つから選択される、請求項1~3のいずれか一つに記載の基板処理方法。 The laminated film is a laminated film further comprising another film formed adjacent to each of the plurality of silicon oxide films,
4. The substrate processing method according to claim 1, wherein said other film is selected from at least one of a silicon film, a polysilicon film, a silicon nitride film and a metal-containing film. - 前記積層膜において、前記他の膜と前記複数のシリコン酸化膜の各々とは、鉛直方向または水平方向に互いに隣接して形成される、請求項4に記載の基板処理方法。 5. The substrate processing method according to claim 4, wherein in said laminated film, said another film and each of said plurality of silicon oxide films are formed adjacent to each other in a vertical direction or a horizontal direction.
- 前記複数のシリコン酸化膜の膜厚は、1nm以上30nm以下である、請求項1~3のいずれか一つに記載の基板処理方法。 The substrate processing method according to any one of claims 1 to 3, wherein the film thickness of the plurality of silicon oxide films is 1 nm or more and 30 nm or less.
- 前記エッチング液は、フッ酸を含む、請求項1~3のいずれか一つに記載の基板処理方法。 The substrate processing method according to any one of claims 1 to 3, wherein the etchant contains hydrofluoric acid.
- 前記エッチング液における前記フッ酸の濃度は、0.1wt%以上50wt%以下である、請求項7に記載の基板処理方法。 The substrate processing method according to claim 7, wherein the concentration of said hydrofluoric acid in said etching liquid is 0.1 wt% or more and 50 wt% or less.
- 前記エッチング液に添加される前の前記塩酸の濃度は、35wt%以上37wt%以下である、請求項1に記載の基板処理方法。 The substrate processing method according to claim 1, wherein the concentration of said hydrochloric acid before being added to said etching liquid is 35 wt% or more and 37 wt% or less.
- 前記金属塩は、ハロゲン化アルカリ金属またはハロゲン化アルカリ土類金属である、請求項2に記載の基板処理方法。 The substrate processing method according to claim 2, wherein the metal salt is an alkali metal halide or an alkaline earth metal halide.
- 前記ハロゲン化アルカリ金属は、Li、Na、K、RbおよびCsのうち少なくとも1つを含み、
前記ハロゲン化アルカリ土類金属は、Mg、Ca、SrおよびBaのうち少なくとも1つを含む、請求項10に記載の基板処理方法。 the alkali metal halide comprises at least one of Li, Na, K, Rb and Cs;
11. The substrate processing method of claim 10, wherein the alkaline earth metal halide includes at least one of Mg, Ca, Sr and Ba. - 前記エッチング液における前記塩酸の濃度は、0.5wt%以上5wt%以下である、請求項1に記載の基板処理方法。 The substrate processing method according to claim 1, wherein the concentration of said hydrochloric acid in said etchant is 0.5 wt% or more and 5 wt% or less.
- 前記界面活性剤は、陽イオン性界面活性剤または陰イオン性界面活性剤である、請求項3に記載の基板処理方法。 The substrate processing method according to claim 3, wherein the surfactant is a cationic surfactant or an anionic surfactant.
- 前記陽イオン性界面活性剤は、n-オクチルアミン塩酸塩(OACl)またはn-オクチルトリメチルアンモニウムクロリド(OTMACl)であり、
前記陰イオン性界面活性剤は、ドデシルベンゼンスルホン酸ナトリウム(SDBS)である、請求項13に記載の基板処理方法。 the cationic surfactant is n-octylamine hydrochloride (OACl) or n-octyltrimethylammonium chloride (OTMACl);
14. The substrate processing method of claim 13, wherein the anionic surfactant is sodium dodecylbenzenesulfonate (SDBS). - 前記エッチング液における前記界面活性剤の濃度は、0.5wt%以上5wt%以下である、請求項3、13、14のいずれか一つに記載の基板処理方法。 The substrate processing method according to any one of claims 3, 13 and 14, wherein the concentration of said surfactant in said etching liquid is 0.5 wt% or more and 5 wt% or less.
- 前記基板のエッチング処理を行う工程の後に、SC2で前記基板の表面に残留する前記金属塩を除去する工程をさらに含む、請求項2に記載の基板処理方法。 The substrate processing method according to claim 2, further comprising a step of removing the metal salt remaining on the surface of the substrate in SC2 after the step of etching the substrate.
- 塩酸が添加されたエッチング液を貯留する処理槽と、
各部を制御する制御部と
を備え、
前記制御部は、
膜厚が異なる複数のシリコン酸化膜を含む積層膜を有する基板を前記処理槽に貯留される前記エッチング液に浸漬させることによって、前記基板のエッチング処理を行う
基板処理装置。 a processing tank for storing an etchant to which hydrochloric acid has been added;
and a control unit that controls each part,
The control unit
A substrate processing apparatus for etching a substrate by immersing a substrate having a laminated film including a plurality of silicon oxide films with different film thicknesses in the etchant stored in the processing tank. - 金属塩が添加されたエッチング液を貯留する処理槽と、
各部を制御する制御部と
を備え、
前記制御部は、
膜厚が異なる複数のシリコン酸化膜を含む積層膜を有する基板を前記処理槽に貯留される前記エッチング液に浸漬させることによって、前記基板のエッチング処理を行う
基板処理装置。 a processing tank for storing an etchant to which a metal salt has been added;
and a control unit that controls each part,
The control unit
A substrate processing apparatus for etching a substrate by immersing a substrate having a laminated film including a plurality of silicon oxide films with different film thicknesses in the etchant stored in the processing bath. - 界面活性剤が添加されたエッチング液を貯留する処理槽と、
各部を制御する制御部と
を備え、
前記制御部は、
膜厚が異なる複数のシリコン酸化膜を含む積層膜を有する基板を前記処理槽に貯留される前記エッチング液に浸漬させることによって、前記基板のエッチング処理を行う
基板処理装置。 a processing tank for storing an etchant to which a surfactant is added;
and a control unit that controls each part,
The control unit
A substrate processing apparatus for etching a substrate by immersing a substrate having a laminated film including a plurality of silicon oxide films with different film thicknesses in the etchant stored in the processing bath.
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JPH0831794A (en) | 1994-07-12 | 1996-02-02 | Nippon Steel Corp | Processing apparatus for semiconductor wafer |
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JPH08181094A (en) * | 1994-12-26 | 1996-07-12 | Nippondenso Co Ltd | Surface flattening method of semiconductor substrate |
JPH10177998A (en) * | 1996-12-18 | 1998-06-30 | Sutera Chemiphar Kk | Etchant |
JP2013541831A (en) * | 2010-09-06 | 2013-11-14 | ユ−ジーン テクノロジー カンパニー.リミテッド | Manufacturing method of semiconductor device |
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WO2019230833A1 (en) * | 2018-05-31 | 2019-12-05 | 学校法人 関西大学 | Method for etching silicon semiconductor substrate, method for manufacturing semiconductor device, and etching solution |
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