WO2023124354A1 - 一种车辆控制器、车辆和车辆控制方法 - Google Patents

一种车辆控制器、车辆和车辆控制方法 Download PDF

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Publication number
WO2023124354A1
WO2023124354A1 PCT/CN2022/123928 CN2022123928W WO2023124354A1 WO 2023124354 A1 WO2023124354 A1 WO 2023124354A1 CN 2022123928 W CN2022123928 W CN 2022123928W WO 2023124354 A1 WO2023124354 A1 WO 2023124354A1
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WO
WIPO (PCT)
Prior art keywords
board
vehicle
interface
substrate
vehicle controller
Prior art date
Application number
PCT/CN2022/123928
Other languages
English (en)
French (fr)
Inventor
陈飞
王骏
于英俊
潘坚伟
李博
Original Assignee
武汉路特斯汽车有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from CN202123382191.7U external-priority patent/CN217048605U/zh
Priority claimed from CN202111641021.8A external-priority patent/CN114179817A/zh
Application filed by 武汉路特斯汽车有限公司 filed Critical 武汉路特斯汽车有限公司
Publication of WO2023124354A1 publication Critical patent/WO2023124354A1/zh

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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B60—VEHICLES IN GENERAL
    • B60W—CONJOINT CONTROL OF VEHICLE SUB-UNITS OF DIFFERENT TYPE OR DIFFERENT FUNCTION; CONTROL SYSTEMS SPECIALLY ADAPTED FOR HYBRID VEHICLES; ROAD VEHICLE DRIVE CONTROL SYSTEMS FOR PURPOSES NOT RELATED TO THE CONTROL OF A PARTICULAR SUB-UNIT
    • B60W50/00—Details of control systems for road vehicle drive control not related to the control of a particular sub-unit, e.g. process diagnostic or vehicle driver interfaces
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B60—VEHICLES IN GENERAL
    • B60W—CONJOINT CONTROL OF VEHICLE SUB-UNITS OF DIFFERENT TYPE OR DIFFERENT FUNCTION; CONTROL SYSTEMS SPECIALLY ADAPTED FOR HYBRID VEHICLES; ROAD VEHICLE DRIVE CONTROL SYSTEMS FOR PURPOSES NOT RELATED TO THE CONTROL OF A PARTICULAR SUB-UNIT
    • B60W60/00—Drive control systems specially adapted for autonomous road vehicles
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R24/00—Two-part coupling devices, or either of their cooperating parts, characterised by their overall structure
    • H01R24/66—Two-part coupling devices, or either of their cooperating parts, characterised by their overall structure with pins, blades or analogous contacts and secured to apparatus or structure, e.g. to a wall
    • H01R24/68—Two-part coupling devices, or either of their cooperating parts, characterised by their overall structure with pins, blades or analogous contacts and secured to apparatus or structure, e.g. to a wall mounted on directly pluggable apparatus

Definitions

  • the present application relates to the technical field of automatic driving, and in particular to a vehicle controller, a vehicle and a vehicle control method.
  • the autonomous driving domain controller needs to have the capabilities of multi-sensor fusion, positioning, path planning, decision-making control, wireless communication, and high-speed communication.
  • the present application provides a vehicle controller, a vehicle, and a vehicle control method, which are used to realize the expansion of computing power, so that the same platform can be used to meet the requirements of different automatic driving scenarios.
  • the present application provides a vehicle controller, including:
  • the base board and each of the core computing processor boards include a communication interface, and the communication interface of the base board and the communication interface of the core computing processor board are connected through a board-to-board connector.
  • the communication interface includes one or more of a high-speed serial computer expansion bus interface, a camera serial interface, and a vehicle Ethernet interface.
  • the substrate further includes a plurality of sensor interfaces.
  • the sensor interface includes at least one of a camera interface, a millimeter-wave radar interface, an ultrasonic radar interface, and a laser radar interface.
  • the board-to-board connector is a floating board-to-board connector.
  • the present application also provides a vehicle controller, including:
  • the substrate includes a microprocessor
  • the core arithmetic processor board includes a core arithmetic processor
  • the substrate and each of the core computing processor boards include a plurality of communication interfaces, and the communication interfaces of the substrate and the core computing processor boards are connected through board-to-board connectors.
  • the communication interface includes one or more of a high-speed serial computer expansion bus interface, a camera serial interface, and a vehicle Ethernet interface.
  • the substrate further includes a plurality of sensor interfaces.
  • the sensor interface includes at least one of a camera interface, a millimeter-wave radar interface, an ultrasonic radar interface, and a laser radar interface.
  • the plurality of sensor interfaces at least include: twelve camera interfaces, four lidar interfaces, six millimeter-wave radar interfaces, and twelve ultrasonic radar interfaces.
  • the vehicle controller includes two core arithmetic processor boards.
  • the board-to-board connector is a floating board-to-board connector.
  • the present application provides a vehicle, including: the vehicle controller in any possible design of the first aspect and the first aspect.
  • the vehicle also includes:
  • a plurality of sensors connected to the vehicle controller.
  • the senor includes:
  • At least one of a camera, a millimeter-wave radar, an ultrasonic radar, and a laser radar At least one of a camera, a millimeter-wave radar, an ultrasonic radar, and a laser radar.
  • the present application provides a vehicle control method, the method is used for a microprocessor, and the microprocessor is located on the substrate of the vehicle controller described in the first aspect and any possible design of the first aspect above, the method includes:
  • the microprocessor acquires road surface information data around the vehicle
  • the microprocessor processes the road surface information data under the action of the computing power, and generates route information, and the route information is used to indicate the driving route of the vehicle.
  • the step of the microprocessor acquiring road surface information data around the vehicle specifically includes:
  • the microprocessor obtains the data collected by the camera through the gigabit multimedia serial link technology
  • the vehicle controller provided by this application includes: a substrate and at least one core computing processor board located on the substrate, the core computing processor board is used to provide corresponding computing power according to the scene of automatic driving, and the scene of automatic driving includes L3 level automatic At least one of driving, L4-level automatic driving and L5-level automatic driving, the substrate and each core computing processor board include a communication interface, and the communication interface of the substrate and the communication interface of the core computing processor board are connected through a board-to-board connector .
  • the vehicle controller is divided into two board-layer structures, and the two board-layer structures are connected through the standardized interface of the board-to-board connector, so that the board can be adapted to different core computing processor boards, thereby realizing flexible expansion of computing power , and can provide the computing power required for different scenarios of autonomous driving by controlling the number of core computing processor boards, so that the vehicle controller can meet the requirements of different autonomous driving scenarios.
  • FIG. 1 is a schematic structural diagram of a vehicle controller provided by an embodiment of the present application.
  • Fig. 2 is a schematic structural diagram of a vehicle provided by an embodiment of the present application.
  • Fig. 3 is a schematic structural diagram of a vehicle provided by an embodiment of the present application.
  • Fig. 4 is a schematic structural diagram of a vehicle provided by an embodiment of the present application.
  • Fig. 5 is a flowchart of a vehicle control method provided by an embodiment of the present application.
  • FIG. 6 is a schematic structural diagram of an electronic device provided by an embodiment of the present application.
  • Automated driving domain controller (Automated Driving Control Unit (ADCU) needs to have the capabilities of multi-sensor fusion, positioning, path planning, decision-making control, and high-speed communication.
  • the autonomous driving domain controller can be provided with various capabilities by connecting various types of sensors externally.
  • each specific autonomous driving domain controller has a specific core computing processor (System on Chip, SOC), and each core computing processor has a fixed As a result, the autonomous driving domain controller cannot adapt to different core computing processors, and cannot realize the expansion of computing power, so that the same platform cannot be used to meet the needs of different autonomous driving scenarios.
  • SOC System on Chip
  • the present application proposes a vehicle controller, including: a substrate and at least one core computing processor board located on the substrate, the core computing processor board is used to provide corresponding computing power according to the scene of automatic driving, automatic driving
  • the scenario includes at least one of L3 autonomous driving, L4 autonomous driving and L5 autonomous driving
  • the substrate and each core computing processor board include a communication interface, and the communication interface of the substrate and the communication interface of the core computing processor board pass through board-to-board connector connection.
  • the vehicle controller is divided into two board-layer structures, and the two board-layer structures are connected through the standardized interface of the board-to-board connector, so that the board can be adapted to different core computing processor boards to achieve flexible expansion of computing power.
  • the vehicle controller can provide the computing power required for different scenarios of autonomous driving by controlling the number of core computing processor boards, so that the vehicle controller can meet the requirements of different autonomous driving scenarios. Further, since the number of core computing processor boards is adjustable, the computing power of the vehicle controller is adjustable, thereby promoting the development of the vehicle controller.
  • Fig. 1 shows a schematic structural diagram of a vehicle controller provided by an embodiment of the present application.
  • the vehicle controller of this embodiment includes: a substrate 101 and at least one core computing processor board 102 located on the substrate.
  • the substrate 101 includes a microprocessor
  • the core computing processor board 102 includes a core computing processor
  • the core computing processor board 102 is used to provide corresponding computing power according to the scene of automatic driving, and the scene of automatic driving includes at least one of L3 automatic driving, L4 automatic driving and L5 automatic driving;
  • Both the substrate 101 and each core computing processor board 101 include a communication interface, and the communication interface of the substrate 101 and the communication interface of the core computing processor board 102 are connected through a board-to-board connector 103 .
  • the vehicle controller is, for example, an autonomous driving domain controller.
  • the vehicle controller is divided into a substrate 101 and a core operation processor board (SOC Board) 102.
  • the substrate 101 can provide board-level power, and a safety microprocessor (safety Microcontroller) is designed on the substrate 101. Unit), the realization of automatic driving needs to rely on environmental perception sensors to collect road environment information, and transmit the collected data to the safety microprocessor for processing to identify obstacles, feasible roads, etc., and based on the recognition results, plan route, formulate vehicle speed, automatically control vehicle driving, etc.
  • safety microprocessor safety Microcontroller
  • a plurality of sensor interfaces may be included on the substrate 101, and the sensor interfaces include at least one of a camera interface, a millimeter-wave radar interface, an ultrasonic radar interface, and a laser radar interface, so that the security microprocessor communicates data with the camera through the camera interface. Interaction, data interaction with millimeter wave radar through millimeter wave radar interface, data interaction with ultrasonic radar through ultrasonic radar interface, data interaction with laser radar through laser radar interface.
  • it includes at least twelve camera interfaces, four lidar interfaces, six millimeter-wave radar interfaces, and twelve ultrasonic radar interfaces, so that at least twelve cameras, four lidar interfaces, and six millimeter-wave interfaces can be connected.
  • Radar and twelve-way ultrasonic radar can also include two image interfaces to access two-way image display.
  • the security microprocessor on the substrate 101 is connected to the camera through a camera interface, for example, a low voltage differential signal (Low Voltage Differential Signaling, LVDS) video coaxial cable connection.
  • Low-voltage differential signaling is a low-swing differential signal technology that enables signals to be transmitted at a rate of several hundred Mbps on differential PCB lines or balanced cables, and its low-voltage amplitude and low-current drive output can achieve low noise and low power. consumption.
  • GMSL Gigabit Multimedia Serial Link
  • the gigabit multimedia serial link is a transmission link composed of a serializer and a deserializer, and can simultaneously support data transmission of four cameras by using a four-channel deserializer of the gigabit multimedia serial link.
  • the ultrasonic radar interface on the substrate 101 may be a serial peripheral interface (Serial Peripheral Interface, SPI), so that the security microprocessor performs data interaction and processing with the ultrasonic radar through the serial peripheral interface.
  • SPI Serial Peripheral Interface
  • the serial peripheral interface is a synchronous peripheral interface that enables the microcontroller to communicate with various peripheral devices in a serial manner to exchange information.
  • the millimeter-wave radar interface on the substrate 101 may be a Vehicle Ethernet (Vehicle Ethernet) interface, so that the safety microprocessor adopts a controller area network (Controller Area Network with Flexible Data rate, CAN- FD) interact and process data with the millimeter wave radar.
  • the controller LAN bus adopts two-wire serial communication protocol, based on non-destructive arbitration technology, distributed real-time control, reliable error handling and detection mechanism, so that the controller LAN bus has high security and a controller with flexible data rate
  • the LAN has a flexible data rate based on the controller LAN, providing greater bandwidth.
  • the laser radar interface on the substrate 101 may be a vehicle Ethernet interface, so that the safety microprocessor uses Gigabit Ethernet to interact and process data with the laser radar through the vehicle Ethernet interface.
  • Gigabit Ethernet has a transmission speed of 1000 megabits per second.
  • the autonomous driving domain controller needs to be matched with a processor with strong core computing power, which can provide support for different levels of computing power for autonomous driving, and the level of automatic driving is increased by one level, and the demand for computing power is increased by at least ten times.
  • L2 autonomous driving requires 2 TOPS of computing power
  • L3 autonomous driving requires 24 TOPS of computing power
  • L4 autonomous driving requires 320 TOPS of computing power
  • L5 autonomous driving requires more than 4,000 TOPS computing power.
  • Level 2 autonomous driving refers to the automation of some functions. The basic operation is completed by the vehicle, and the driver is responsible for monitoring the surroundings and taking over the vehicle at any time.
  • L3 autonomous driving refers to conditional automation.
  • the vehicle can realize automatic acceleration and deceleration, steering, peripheral monitoring, etc. in a specific environment without the driver's operation.
  • the driver needs to be ready to take over the vehicle at any time
  • the system will prompt the driver to take over the vehicle.
  • Level 4 autonomous driving refers to a high degree of automation.
  • the system can perform all driving operations autonomously, and can go on the road completely autonomously. Drivers can do what they want in the car.
  • Level 5 automatic driving refers to complete automation. Under all conditions, the automatic driving system can complete all driving tasks.
  • the current autonomous driving domain controller is limited by its own hardware design and structure, and usually integrates all functions on a single hardware board, which has low flexibility.
  • a safety microprocessor and a core computing processor are designed on the substrate.
  • the core computing processor provides the computing power required for L2-level autonomous driving. Data interaction and processing with the camera through the link technology, data interaction and processing with the ultrasonic radar through the ultrasonic radar interface, data interaction and processing with the millimeter wave radar through the millimeter wave radar interface using a controller area network with flexible data rates.
  • the existing autonomous driving domain controllers cannot adapt to different core computing processors, and cannot realize the expansion of computing power, so that the same platform cannot be used to meet the needs of different autonomous driving scenarios.
  • At least one core computing processor board 102 is designed on the substrate 101.
  • the core computing processor board 102 is used to carry the core computing processor.
  • the core computing processor can provide corresponding computing power according to the scene of autonomous driving.
  • the automatic driving scenario may include at least one of L3 automatic driving, L4 automatic driving and L5 automatic driving.
  • the security microprocessor on the substrate 101 interacts with the camera, millimeter wave radar, ultrasonic radar, laser radar, etc., and processes the received data with the support of the computing power provided by a core computing processor, In order to achieve L3 level automatic driving.
  • Wave radar, ultrasonic radar, laser radar, etc. perform data interaction, and process each received data with the support of computing power provided by the two core computing processors, so as to realize L4 level automatic driving.
  • three or more core computing processing boards 102 can be designed on the substrate 101 to provide the computing power required for L5-level automatic driving.
  • the safety microprocessor of the substrate 101 and the Cameras, millimeter-wave radars, ultrasonic radars, lidars, etc. perform data interaction, and process each received data with the support of computing power provided by multiple core computing processors, thereby realizing L5-level autonomous driving.
  • the substrate 101 and each core operation processor board 102 include multiple communication interfaces, and the communication interfaces may include a high-speed serial computer expansion bus (peripheral Component interconnect express (PCIE) interface, camera serial interface (Camera Serial Interface, CSI), vehicle Ethernet (Vehicle Ethernet) interface and other standardized interfaces to be compatible with different combinations and quantities of sensors for L3-L5 autonomous driving.
  • PCIE peripheral Component interconnect express
  • CSI Camera serial interface
  • Vehicle Ethernet vehicle Ethernet
  • the substrate 101 and the core computing processor board 102 perform data interaction through a communication interface, and the communication interface of the substrate 101 and the communication interface of the core computing processor board 102 are connected through a board-to-board connector 103 .
  • the board-to-board connector 103 can connect power and signals between boards to complete all connections.
  • the board-to-board connector 103 can be, for example, a floating board-to-board connector.
  • the board-to-board connector with the function of absorbing and correcting ⁇ X and ⁇ Y direction errors can eliminate the misalignment of substrate mounting and the positional deviation during mating, so that the boards can be aligned accurately and the shock resistance can be enhanced. sex.
  • the board-to-board connector 103 integrates a separate power pin, the maximum current of the single power pin can reach 3A, and supports a transmission rate of 8+Gbps.
  • the vehicle controller provided by this application includes: a substrate and at least one core computing processor board located on the substrate, the core computing processor board is used to provide corresponding computing power according to the scene of automatic driving, and the scene of automatic driving includes L3 level automatic At least one of driving, L4-level automatic driving and L5-level automatic driving, the substrate and each core computing processor board include a communication interface, and the communication interface of the substrate and the communication interface of the core computing processor board are connected through a board-to-board connector .
  • the vehicle controller is divided into two board-layer structures, and the two board-layer structures are connected through the standardized interface of the board-to-board connector, so that the board can be adapted to different core computing processor boards, thereby realizing flexible expansion of computing power , and can provide the computing power required for different scenarios of autonomous driving by controlling the number of core computing processor boards, so that the vehicle controller can meet the requirements of different autonomous driving scenarios.
  • An embodiment of the present application also provides a vehicle, including a vehicle controller.
  • the vehicle controller includes a substrate and at least one core computing processor board on the substrate.
  • the core computing processor board provides corresponding computing power according to the scenarios of autonomous driving.
  • the scenarios of autonomous driving include L3-level automatic driving, L4-level automatic driving and L5 level autonomous driving, etc.
  • Both the base board and each core computing processor board include a communication interface, and the communication interface of the base board and the communication interface of the core computing processor board are connected through a board-to-board connector.
  • the vehicle further includes a plurality of sensor interfaces connected to the vehicle controller, and the plurality of sensor interfaces are used to connect external cameras, millimeter-wave radar, ultrasonic radar, and laser radar, etc., so that the microcontroller in the vehicle controller
  • the processor can receive road environment information sent by sensors such as cameras, millimeter-wave radars, ultrasonic radars, and lidars, so that the vehicle controller has capabilities such as multi-sensor fusion, positioning, path planning, decision-making control, wireless communication, and high-speed communication.
  • the vehicle controller controls the automatic driving of the vehicle.
  • the vehicle provided by this application includes a vehicle controller, the vehicle controller includes a substrate and at least one core computing processor on the substrate, and provides the computing power required for different scenarios of automatic driving by controlling the number of core computing processor boards, so that the vehicle The controller meets the needs of different autonomous driving scenarios.
  • the embodiment of the present application also provides a vehicle control method, as shown in FIG. 5 , including:
  • the microprocessor acquires road surface information data around the vehicle.
  • the microprocessor acquires road surface information data around the vehicle through an external camera, millimeter wave radar, ultrasonic radar, laser radar, etc.
  • the microprocessor processes the road surface information data under the computing power provided by the core computing processor to generate path information.
  • the microprocessor After the microprocessor receives the road surface information data around the vehicle, it processes the road surface information data under the computing power provided by the core computing processor, identifies obstacles, feasible roads, etc., and generates path information based on the recognition results. The information is used to indicate the driving path of the vehicle, so that the vehicle automatically drives according to the driving path generated by the microprocessor.
  • the microprocessor obtains the data collected by the camera through the gigabit multimedia serial link technology, and/or obtains the data collected by the lidar through Gigabit Ethernet, and/or through the controller with flexible data rate
  • the local area network obtains the data collected by the millimeter wave radar.
  • the microprocessor In the vehicle control method provided by this application, the microprocessor generates path information under the action of the computing power provided by the core computing processor, and instructs the vehicle to drive automatically. Since the number of core computing processors is adjustable, the vehicle can meet different requirements. Scenario requirements for autonomous driving.
  • FIG. 6 shows a schematic diagram of a hardware structure of an electronic device provided by an embodiment of the present application.
  • the electronic device 20 is configured to implement operations corresponding to the electronic device in any of the above method embodiments.
  • the electronic device 20 in this embodiment may include: a memory 21 , a processor 22 and a communication interface 23 .
  • the memory 21 is used for storing computer instructions.
  • the memory 21 may include a high-speed random access memory (Random Access Memory, RAM), and may also include a non-volatile storage (Non-Volatile Memory, NVM), such as at least one disk storage, and may also be a U disk, a mobile hard disk , read-only memory, disk or CD-ROM, etc.
  • RAM Random Access Memory
  • NVM non-volatile storage
  • U disk a mobile hard disk
  • read-only memory disk or CD-ROM, etc.
  • the processor 22 is configured to execute the computer instructions stored in the memory, so as to realize the vehicle control method in the above-mentioned embodiments.
  • the processor 22 can be a central processing unit (Central Processing Unit, CPU), and can also be other general-purpose processors, digital signal processors (Digital Signal Processors) Processor, DSP), application-specific integrated circuit (Application Specific Integrated Circuit, ASIC), etc.
  • a general-purpose processor may be a microprocessor, or the processor may be any conventional processor, or the like.
  • the steps of the method disclosed in conjunction with the invention can be directly implemented by a hardware processor, or implemented by a combination of hardware and software modules in the processor.
  • the communication interface 23 can be connected to the processor 212 .
  • the processor 22 can control the communication interface 23 to realize the functions of receiving and sending signals.
  • the electronic device provided in this embodiment can be used to execute the above-mentioned vehicle control method, and its implementation method and technical effect are similar, and will not be repeated in this embodiment.
  • the present application also provides a computer-readable storage medium, wherein computer instructions are stored in the computer-readable storage medium, and when the computer instructions are executed by a processor, they are used to implement the methods provided by the above-mentioned various implementations.
  • the present application also provides a computer program product, the computer program product includes computer instructions, and the computer instructions are stored in a computer-readable storage medium.
  • At least one processor of the device may read the computer instructions from a computer-readable storage medium, and the at least one processor executes the computer instructions so that the device implements the methods provided in the foregoing various implementations.
  • the embodiment of the present application also provides a chip, the chip includes a memory and a processor, the memory is used to store computer instructions, and the processor is used to call and run the computer instructions from the memory, so that the The device of the chip executes the methods described in the above various possible implementation manners.

Abstract

本申请提供一种车辆控制器、车辆和车辆控制方法，包括：基板和位于基板上的至少一个核心运算处理器板，核心运算处理器板用于根据自动驾驶的场景提供对应的算力，自动驾驶的场景包括L3级自动驾驶、L4级自动驾驶和L5级自动驾驶中的至少一个，基板和每个核心运算处理器板均包括通信接口，基板的通信接口和核心运算处理器板的通信接口通过板到板连接器连接。这样，将车辆控制器分为两种板层结构，通过板到板连接器的标准化接口连接两种板层结构，使得基板可以适配不同的核心运算处理器板，实现算力的灵活扩展，并且可以通过控制核心运算处理器板的数量提供自动驾驶的不同场景所需的算力，使得车辆控制器满足不同自动驾驶场景的需求。

Description

一种车辆控制器、车辆和车辆控制方法
本申请要求于2021年12月29日提交的中国专利申请号为 202111641021.8、名称为“一种车辆控制器、车辆和车辆控制方法”，和中国专利申请号为202123382191.7、名称为“一种车辆控制器和车辆”的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及自动驾驶技术领域，尤其涉及一种车辆控制器、车辆和车辆控制方法。
 背景技术
随着自动驾驶的来临，其所涉及的感知、控制、决策系统的复杂度更高，与车身其他系统的信息交互、控制越来越多，因此专门定位于自动驾驶的域控制器系统应运而生。自动驾驶域控制器需要具备多传感器融合、定位、路径规划、决策控制、无线通讯、高速通讯的能力。
目前，主要使用特定的自动驾驶域控制器对应不同等级的自动驾驶功能，无法实现算力的扩展，进而无法利用同一平台满足不同自动驾驶场景的需求。
 技术解决方案
本申请提供一种车辆控制器、车辆和车辆控制方法，用以实现算力的扩展，从而利用同一平台满足不同自动驾驶场景的需求。
第一方面，本申请提供一种车辆控制器，包括：
基板和位于所述基板上的至少一个核心运算处理器板，所述核心运算处理器板用于根据自动驾驶的场景提供对应的算力，自动驾驶的场景包括L3级自动驾驶、L4级自动驾驶和L5级自动驾驶中的至少一个；
所述基板和每个所述核心运算处理器板均包括通信接口、所述基板的通信接口和所述核心运算处理器板的通信接口通过板到板连接器连接。
可选地，所述通信接口包括高速串行计算机扩展总线接口、摄像头串行接口以及车载以太网接口中的一个或多个。
可选地，所述基板还包括多个传感器接口。
可选地，所述传感器接口包括摄像头接口、毫米波雷达接口、超声波雷达接口以及激光雷达接口中的至少一个。
可选地，所述板到板连接器为浮动式板到板连接器。
第二方面，本申请还提供一种车辆控制器，包括：
基板和位于所述基板上的至少一个核心运算处理器板，所述基板包括微处理器，所述核心运算处理器板包括核心运算处理器；
所述基板和每个所述核心运算处理器板均包括多个通信接口，所述基板的通信接口和所述核心运算处理器板的通信接口通过板到板连接器连接。
可选地，所述通信接口包括高速串行计算机扩展总线接口、摄像头串行接口以及车载以太网接口中的一个或多个。
可选地，所述基板还包括多个传感器接口。
可选地，所述传感器接口包括摄像头接口、毫米波雷达接口、超声波雷达接口以及激光雷达接口中的至少一个。
可选地，所述多个传感器接口至少包括：十二个摄像头接口、四个激光雷达接口、六个毫米波雷达接口以及十二个超声波雷达接口。
可选地，所述车辆控制器包括两个核心运算处理器板。
可选地，所述板到板连接器为浮动式板到板连接器。
第三方面，本申请提供一种车辆，包括：第一方面及第一方面任一种可能的设计中的车辆控制器。
可选地，所述车辆还包括：
与所述车辆控制器连接的多个传感器。
可选地，所述传感器包括：
摄像头、毫米波雷达、超声波雷达以及激光雷达中的至少一个。
第四方面，本申请提供一种车辆控制方法，所述方法用于微处理器，所述微处理器位于第一方面及第一方面任一种可能的设计中所述的车辆控制器的基板上，所述方法包括：
所述微处理器获取车辆周围的路面信息数据；
所述微处理器在所述算力作用下对所述路面信息数据进行处理，并生成路径信息，所述路径信息用于指示所述车辆的行驶路径。
可选地，所述微处理器获取车辆周围的路面信息数据的步骤，具体包括：
所述微处理器通过吉比特多媒体串行链路技术，获取摄像头采集的数据；
和/或通过千兆以太网获取激光雷达采集的数据；
和/或通过具有灵活数据速率的控制器局域网络，获取毫米波雷达采集的数据。
本申请提供的车辆控制器，包括：基板和位于基板上的至少一个核心运算处理器板，核心运算处理器板用于根据自动驾驶的场景提供对应的算力，自动驾驶的场景包括L3级自动驾驶、L4级自动驾驶和L5级自动驾驶中的至少一个，基板和每个核心运算处理器板均包括通信接口，基板的通信接口和核心运算处理器板的通信接口通过板到板连接器连接。这样，将车辆控制器分为两种板层结构，通过板到板连接器的标准化接口连接两种板层结构，使得基板可以适配不同的核心运算处理器板，从而实现算力的灵活扩展，并且可以通过控制核心运算处理器板的数量，提供自动驾驶的不同场景所需的算力，使得车辆控制器满足不同自动驾驶场景的需求。
 附图说明
为了更清楚地说明本申请或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作一简单地介绍，显而易见地，下面描述中的附图是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本申请一实施例提供的一种车辆控制器的结构示意图。
图2为本申请一实施例提供的一种车辆的结构示意图。
图3为本申请一实施例提供的一种车辆的结构示意图。
图4为本申请一实施例提供的一种车辆的结构示意图。
图5为本申请一实施例提供的一种车辆控制方法的流程图。
图6为本申请一实施例提供得一种电子设备的结构示意图。
本申请的实施方式
为使本申请的目的、技术方案和优点更加清楚，下面将结合本申请中的附图，对本申请中的技术方案进行清楚、完整地描述，显然，所描述的实施例是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
自动驾驶域控制器（Automated Driving Control Unit，ADCU）需要具备多传感器融合、定位、路径规划、决策控制、高速通讯的能力。例如可以通过外接多种类型的传感器使得自动驾驶域控制器具备多种能力。
对于不同等级的自动驾驶功能来说，传感器的类型和数量是不同的。目前，通过特定的自动驾驶域控制器对应不同等级的自动驾驶功能，每个特定的自动驾驶域控制器具有特定的核心运算处理器（System on Chip，SOC），每个核心运算处理器具有固定的算力，从而使得自动驾驶域控制器无法适配不同的核心运算处理器，无法实现算力的扩展，从而无法利用同一平台满足不同自动驾驶场景的需求。
并且随着SOA（Service-Oriented Architecture，面向服务结构）和OTA（Over-the-Air Technology，空中下载技术）不断发展，用户软件功能的升级和扩展需求不断增加，使得自动驾驶域控制器的固定算力成为制约自动驾驶域控制器的因素。
针对上述问题，本申请提出了一种车辆控制器，包括：基板和位于基板上的至少一个核心运算处理器板，核心运算处理器板用于根据自动驾驶的场景提供对应的算力，自动驾驶的场景包括L3级自动驾驶、L4级自动驾驶和L5级自动驾驶中的至少一个，基板和每个核心运算处理器板均包括通信接口，基板的通信接口和核心运算处理器板的通信接口通过板到板连接器连接。这样，将车辆控制器分为两种板层结构，通过板到板连接器的标准化接口连接两种板层结构，使得基板可以适配不同的核心运算处理器板，实现算力的灵活扩展，并且可以通过控制核心运算处理器板的数量提供自动驾驶的不同场景所需的算力，使得车辆控制器满足不同自动驾驶场景的需求。进一步地，由于核心运算处理器板的数量是可调的，使得车辆控制器的算力是可调的，从而促进车辆控制器的发展。
下面以具体地实施例对本申请的技术方案进行详细说明。下面这几个具体的实施例可以相互结合，对于相同或相似的概念或过程可能在某些实施例不再赘述。
图1示出了本申请一实施例提供的一种车辆控制器的结构示意图。如图1所示，本实施例的车辆控制器包括：基板101和位于基板上的至少一个核心运算处理器板102。
在一实施方式中，基板101包括微处理器，核心运算处理器板102包括核心运算处理器。
在一实施方式中，核心运算处理器板102用于根据自动驾驶的场景提供对应的算力，自动驾驶的场景包括L3级自动驾驶、L4级自动驾驶和L5级自动驾驶中的至少一个；
基板101和每个核心运算处理器板101均包括通信接口，基板101的通信接口和核心运算处理器板102的通信接口通过板到板连接器103连接。车辆控制器例如为自动驾驶域控制器，车辆控制器分为基板101和核心运算处理器板（SOC Board）102，基板101能够提供板级电源，基板101上设计有安全微处理器（safety Microcontroller Unit），自动驾驶的实现需要依赖环境感知传感器对道路环境的信息进行采集，将采集到的数据传送到安全微处理器进行处理，用来识别障碍物、可行道路等，并依据识别结果，规划路线、制定车速，自动控制汽车行驶等。
因而，可以通过外接多个摄像头、毫米波雷达、超声波雷达、激光雷达等设备，以使得安全处理器能够完成图像识别、数据处理等功能。具体的，基板101上可以包括多个传感器接口，传感器接口包括摄像头接口、毫米波雷达接口、超声波雷达接口以及激光雷达接口中的至少一个，以使得安全微处理器通过摄像头接口与摄像头进行数据的交互，通过毫米波雷达接口与毫米波雷达进行数据的交互，通过超声波雷达接口与超声波雷达进行数据的交互，通过激光雷达接口与激光雷达进行数据的交互。例如至少包括十二个摄像头接口、四个激光雷达接口、六个毫米波雷达接口以及十二个超声波雷达接口，从而至少可以接入十二路摄像头（camera）、四路激光雷达、六路毫米波雷达以及十二路超声波雷达。还可以包括两个图像接口以接入两路图像显示。
作为一种实现方式，基板101上的安全微处理器通过摄像头接口与摄像头连接，例如可以通过低电压差分信号（Low Voltage Differential Signaling，LVDS）视频同轴线连接。低电压差分信号是一种低摆幅的差分信号技术，使得信号能够在差分PCB线或平衡电缆上以几百Mbps的速率传输，并且其低压幅和低电流驱动输出能够实现低噪声和低功耗。而后可以采用吉比特多媒体串行链路（Gigabit Multimedia Serial Link，GMSL）技术与摄像头进行数据的交互及处理。吉比特多媒体串行链路是串行器和解串器构成的传输链路，可以通过使用吉比特多媒体串行链路四通道解串器，同时支持四路摄像头数据传输。
基板101上的超声波雷达接口可以为串行外设接口（Serial Peripheral Interface，SPI），从而使得安全微处理器通过串行外设接口与超声波雷达进行数据的交互及处理。串行外设接口是一种同步外设接口，可以使单片机与各种外围设备以串行方式进行通信以交换信息。
基板101上的毫米波雷达接口可以为车载以太网（Vehicle Ethernet）接口，从而使得安全微处理器通过车载以太网接口采用具有灵活数据速率的控制器局域网（Controller Area Network with Flexible Data rate，CAN-FD）与毫米波雷达进行数据的交互及处理。控制器局域网总线采用双线串行通讯协议，基于非破坏性仲裁技术，分布式实时控制，可靠的错误处理和检测机制使控制器局域网总线有很高的安全性，具有灵活数据速率的控制器局域网在控制器局域网的基础上具有灵活的数据速率，提供更大的带宽。
基板101上的激光雷达接口可以为车载以太网接口，从而使得安全微处理器通过车载以太网接口采用千兆以太网与激光雷达进行数据的交互与处理。千兆以太网的传输速度为每秒1000兆位。
由于要完成大量计算，自动驾驶域控制器需要匹配核心运算力强的处理器，能够提供自动驾驶不同级别算力的支持，而且自动驾驶级别升高一级，对算力的需要至少增加十倍，例如L2级自动驾驶需要2个TOPS的算力，L3级的自动驾驶需要24个TOPS的算力，L4级的自动驾驶需要320个TOPS的算力，L5级的自动驾驶需要4000多个TOPS的算力。L2级自动驾驶是指部分功能自动化，其基本操作是由车辆完成，驾驶员负责周边监控和随时接管车辆，主要包括功能有ACC（Adaptive Cruise Control）自动巡航、自动跟车、自动泊车等。L3级自动驾驶是指有条件自动化，车辆在特定环境中可以实现自动加减速、转向、周边监控等，不需要驾驶者的操作，但是在车辆自动驾驶过程中，驾驶者需要随时做好接管车辆的准备，系统会对驾驶者做出接管车辆的提示。L4级自动驾驶是指高度自动化，系统能够自主的做出所有的驾驶操作，能够完全的自主上路，驾驶者可以在车上做自己想做的事情。L5级自动驾驶是指完全自动化，在所有条件下，自动驾驶系统能够完成所有的驾驶任务。
目前的自动驾驶域控制器受限于自身的硬件设计和结构，通常在一整块硬件单板上集成所有功能，灵活度低。例如L2级自动驾驶，在基板上设计一颗安全微处理器和一颗核心运算处理器，核心运算处理器提供L2级自动驾驶所需的算力，微处理器通过摄像头接口采用吉比特多媒体串行链路技术与摄像头进行数据交互与处理，通过超声波雷达接口与超声波雷达进行数据交互与处理，通过毫米波雷达接口采用具有灵活数据速率的控制器局域网络与毫米波雷达进行数据交互与处理。
但是，现有的自动驾驶域控制器无法适配不同的核心运算处理器，无法实现算力的扩展，从而无法利用同一平台满足不同自动驾驶场景的需求。
本申请实施例中，在基板101上设计至少一个核心运算处理器板102，核心运算处理器板102用于承载核心运算处理器，通过控制基板101上的核心运算处理器板102的数量，使得核心运算处理器能够根据自动驾驶的场景提供对应的算力。自动驾驶的场景可以包括L3级自动驾驶、L4级自动驾驶以及L5级自动驾驶中的至少一个。
对于L3级自动驾驶，参考图2所示，可以在基板101上设计一个核心运算处理器板102，一个核心运算处理器板102承载一个核心运算处理器，以提供L3级自动驾驶所需的算力，基板101上的安全微处理器与摄像头、毫米波雷达、超声波雷达、激光雷达等进行数据的交互，并在一个核心运算处理器提供的算力的支持下对接收的各个数据进行处理，从而实现L3级自动驾驶。
对于L4级自动驾驶，参考图3所示，可以在基板101上设计两个核心运算处理器板102，以提供L4级自动驾驶所需的算力，基板101上的安全微处理与摄像头、毫米波雷达、超声波雷达、激光雷达等进行数据的交互，并在两个核心运算处理器提供的算力的支持下对接收的各个数据进行处理，从而实现L4级自动驾驶。
对于L5级自动驾驶，参考图4所示，可以在基板101上设计三个或三个以上核心运算处理板102，以提供L5级自动驾驶所需的算力，基板101的安全微处理器与摄像头、毫米波雷达、超声波雷达、激光雷达等进行数据的交互，并在多个核心运算处理器提供的算力的支持下对接收的各个数据进行处理，从而实现L5级自动驾驶。
在一实施方式中，基板101和每个核心运算处理器板102均包括多个通信接口，通信接口可以包括高速串行计算机扩展总线（peripheral component interconnect express，PCIE）接口、摄像头串行接口（Camera Serial Interface，CSI）、车载以太网（Vehicle Ethernet）接口等标准化接口，以兼容L3-L5级自动驾驶的不同组合和数量的传感器。
在一实施方式中，基板101和核心运算处理器板102通过通信接口进行数据交互，基板101的通信接口和核心运算处理器板102的通信接口通过板到板连接器103连接。板到板连接器103可以在板与板之间连接电源和信号从而完成所有连接，板到板连接器103例如可以为浮动式板到板连接器，浮动式板到板连接器是具有在基板上实装时，吸收、矫正±X、±Y方向误差功能的板到板连接器，能够消除基板实装错位以及嵌合时的位置偏移，从而使得板与板之间准确对齐，增强抗震性。并且板到板连接器103集成单独的电源管脚，单独的电源管脚的最大通流可以达到3A，支持8+Gbps的传输速率。
本申请提供的车辆控制器，包括：基板和位于基板上的至少一个核心运算处理器板，核心运算处理器板用于根据自动驾驶的场景提供对应的算力，自动驾驶的场景包括L3级自动驾驶、L4级自动驾驶和L5级自动驾驶中的至少一个，基板和每个核心运算处理器板均包括通信接口，基板的通信接口和核心运算处理器板的通信接口通过板到板连接器连接。这样，将车辆控制器分为两种板层结构，通过板到板连接器的标准化接口连接两种板层结构，使得基板可以适配不同的核心运算处理器板，从而实现算力的灵活扩展，并且可以通过控制核心运算处理器板的数量，提供自动驾驶的不同场景所需的算力，使得车辆控制器满足不同自动驾驶场景的需求。
本申请实施例还提供一种车辆，包括车辆控制器。
车辆控制器包括基板和位于基板上的至少一个核心运算处理器板，核心运算处理器板根据自动驾驶的场景提供对应的算力，自动驾驶的场景包括L3级自动驾驶、L4级自动驾驶以及L5级自动驾驶等。基板和每个核心运算处理器板均包括通信接口，基板的通信接口和核心运算处理器板的通信接口通过板到板连接器连接。
在一实施方式中，车辆还包括与车辆控制器连接的多个传感器接口，多个传感器接口用于连接外部的摄像头、毫米波雷达、超声雷达以及激光雷达等，以使得车辆控制器中的微处理器能够接收摄像头、毫米波雷达、超声雷达以及激光雷达等传感器发送的路面环境信息等，以使得车辆控制器具备多传感器融合、定位、路径规划、决策控制、无线通讯、高速通讯等能力，从而使得车辆控制器控制车辆自动驾驶。
本申请提供的车辆包括车辆控制器，车辆控制器包括基板和位于基板上的至少一个核心运算处理器，通过控制核心运算处理器板的数量提供自动驾驶的不同场景所需的算力，使得车辆控制器满足不同自动驾驶场景的需求。
本申请实施例还提供一种车辆控制方法，参考图5所示，包括：
S101、微处理器获取车辆周围的路面信息数据。
微处理器通过外接的摄像头、毫米波雷达、超声波雷达、激光雷达等获取车辆周围的路面信息数据。
S102、微处理器在核心运算处理器提供的算力作用下对路面信息数据进行处理，生成路径信息。
微处理器在接收到车辆周围的路面信息数据后，在核心运算处理器提供的算力作用下对路面信息数据进行处理，识别障碍物、可行道路等，并根据识别的结果生成路径信息，路径信息用于指示车辆的行驶路径，从而使得车辆按照微处理器生成的行驶路径自动行驶。
作为一种实现方式，微处理器通过吉比特多媒体串行链路技术获取摄像头采集的数据，和/或通过千兆以太网获取激光雷达采集的数据，和/或通过具有灵活数据速率的控制器局域网络获取毫米波雷达采集的数据。
本申请提供的车辆控制方法，微处理器在核心运算处理器提供的算力作用下生成路径信息，指示车辆自动驾驶，由于核心运算处理器的数量是可调的，从而能够使得车辆满足不同的自动驾驶场景需求。
图6示出了本申请实施例提供的一种电子设备的硬件结构示意图。如图6所示，该电子设备20，用于实现上述任一方法实施例中对应于电子设备的操作，本实施例的电子设备20可以包括：存储器21，处理器22和通信接口23。
存储器21，用于存储计算机指令。该存储器21可能包含高速随机存取存储器（Random Access Memory，RAM），也可能还包括非易失性存储（Non-Volatile Memory，NVM），例如至少一个磁盘存储器，还可以为U盘、移动硬盘、只读存储器、磁盘或光盘等。
处理器22，用于执行存储器存储的计算机指令，以实现上述实施例中的车辆控制方法。具体可以参见前述方法实施例中的相关描述。该处理器22可以是中央处理单元（Central Processing Unit，CPU），还可以是其他通用处理器、数字信号处理器（Digital Signal Processor，DSP）、专用集成电路（Application Specific Integrated Circuit，ASIC）等。通用处理器可以是微处理器或者该处理器也可以是任何常规的处理器等。结合发明所公开的方法的步骤可以直接体现为硬件处理器执行完成，或者用处理器中的硬件及软件模块组合执行完成。
通信接口23，可以与处理器212连接。处理器22可以控制通信接口23来实现信号的接收和发送的功能。
本实施例提供的电子设备可用于执行上述的车辆控制方法，其实现方式和技术效果类似，本实施例此处不再赘述。
本申请还提供一种计算机可读存储介质，计算机可读存储介质中存储有计算机指令，计算机指令被处理器执行时用于实现上述的各种实施方式提供的方法。
本申请还提供一种计算机程序产品，该计算机程序产品包括计算机指令，该计算机指令存储在计算机可读存储介质中。设备的至少一个处理器可以从计算机可读存储介质中读取该计算机指令，至少一个处理器执行该计算机指令使得设备实施上述的各种实施方式提供的方法。
本申请实施例还提供一种芯片，该芯片包括存储器和处理器，所述存储器用于存储计算机指令，所述处理器用于从所述存储器中调用并运行所述计算机指令，使得安装有所述芯片的设备执行如上各种可能的实施方式中所述的方法。
本领域技术人员在考虑说明书及实践这里公开的发明后，将容易想到本申请的其它实施方案。本申请旨在涵盖本申请的任何变型、用途或者适应性变化，这些变型、用途或者适应性变化遵循本申请的一般性原理并包括本申请未公开的本技术领域中的公知常识或惯用技术手段。说明书和实施例仅被视为示例性的本申请的真正范围和精神由上述的权利要求书指出。
最后应说明的是：以上各实施例仅用以说明本申请的技术方案，而非对其限制。尽管参照前述各实施例对本申请进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分或者全部技术特征进行等同替换。而这些修改或者替换，并不使相应技术方案的本质脱离本申请各实施例技术方案的范围。

Claims (17)

  1. 一种车辆控制器，其特征在于，包括：
    基板和位于所述基板上的至少一个核心运算处理器板，所述核心运算处理器板用于根据自动驾驶的场景提供对应的算力，所述自动驾驶的场景包括L3级自动驾驶、L4级自动驾驶和L5级自动驾驶中的至少一个；
    所述基板和每个所述核心运算处理器板均包括通信接口，所述基板的通信接口和所述核心运算处理器板的通信接口通过板到板连接器连接。
  2. 根据权利要求1所述的车辆控制器，其特征在于，所述通信接口包括高速串行计算机扩展总线接口、摄像头串行接口以及车载以太网接口中的一个或多个。
  3. 根据权利要求1所述的车辆控制器，其特征在于，所述基板还包括多个传感器接口。
  4. 根据权利要求3所述的车辆控制器，其特征在于，所述传感器接口包括摄像头接口、毫米波雷达接口、超声波雷达接口以及激光雷达接口中的至少一个。
  5. 根据权利要求4所述的车辆控制器，其特征在于，所述板到板连接器为浮动式板到板连接器。
  6. 一种车辆控制器，其特征在于，包括：
    基板和位于所述基板上的至少一个核心运算处理器板，所述基板包括微处理器，所述核心运算处理器板包括核心运算处理器；
    所述基板和每个所述核心运算处理器板均包括多个通信接口，所述基板的通信接口和所述核心运算处理器板的通信接口通过板到板连接器连接。
  7. 根据权利要求1所述的车辆控制器，其特征在于，所述通信接口包括高速串行计算机扩展总线接口、摄像头串行接口以及车载以太网接口中的一个或多个。
  8. 根据权利要求1所述的车辆控制器，其特征在于，所述基板还包括多个传感器接口。
  9. 根据权利要求8所述的车辆控制器，其特征在于，所述传感器接口包括摄像头接口、毫米波雷达接口、超声波雷达接口以及激光雷达接口中的至少一个。
  10. 根据权利要求9所述的车辆控制器，其特征在于，所述多个传感器接口至少包括：十二个摄像头接口、四个激光雷达接口、六个毫米波雷达接口以及十二个超声波雷达接口。
  11. 根据权利要求6所述的车辆控制器，其特征在于，所述车辆控制器包括两个核心运算处理器板。
  12. 根据权利要求6所述的车辆控制器，其特征在于，所述板到板连接器为浮动式板到板连接器。
  13. 一种车辆，其特征在于，包括：权利要求1-12中任意一项所述的车辆控制器。
  14. 根据权利要求13所述的车辆，其特征在于，所述车辆还包括：
    与所述车辆控制器连接的多个传感器。
  15. 根据权利要求14所述的车辆，其特征在于，所述传感器包括：
    摄像头、毫米波雷达、超声波雷达以及激光雷达中的至少一个。
  16. 一种车辆控制方法，其特征在于，所述方法用于微处理器，所述微处理器位于权利要求1-12中任意一项所述的车辆控制器的基板上，所述方法包括：
    所述微处理器获取车辆周围的路面信息数据；
    所述微处理器在核心运算处理器提供的算力作用下对所述路面信息数据进行处理，并生成路径信息，所述路径信息用于指示所述车辆的行驶路径。
  17. 根据权利要求16所述的方法，其特征在于，所述微处理器获取车辆周围的路面信息数据的步骤，具体包括：
    所述微处理器通过吉比特多媒体串行链路技术，获取摄像头采集的数据；
    和/或通过千兆以太网获取激光雷达采集的数据；
    和/或通过具有灵活数据速率的控制器局域网络，获取毫米波雷达采集的数据。
PCT/CN2022/123928 2021-12-29 2022-10-08 一种车辆控制器、车辆和车辆控制方法 WO2023124354A1 (zh)

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