WO2023115936A1 - 显示面板及显示装置 - Google Patents

显示面板及显示装置 Download PDF

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Publication number
WO2023115936A1
WO2023115936A1 PCT/CN2022/107753 CN2022107753W WO2023115936A1 WO 2023115936 A1 WO2023115936 A1 WO 2023115936A1 CN 2022107753 W CN2022107753 W CN 2022107753W WO 2023115936 A1 WO2023115936 A1 WO 2023115936A1
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WIPO (PCT)
Prior art keywords
substrate
orthographic projection
display panel
electrode
light
Prior art date
Application number
PCT/CN2022/107753
Other languages
English (en)
French (fr)
Inventor
金玉
徐磊
顾维杰
周至奕
孟哲宇
Original Assignee
昆山国显光电有限公司
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Publication date
Application filed by 昆山国显光电有限公司 filed Critical 昆山国显光电有限公司
Priority to KR1020237034493A priority Critical patent/KR20230149849A/ko
Publication of WO2023115936A1 publication Critical patent/WO2023115936A1/zh
Priority to US18/475,543 priority patent/US20240023398A1/en

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H10K59/353—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels characterised by the geometrical arrangement of the RGB subpixels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/60—OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/60—OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
    • H10K59/65—OLEDs integrated with inorganic image sensors

Definitions

  • the present application relates to the display field, in particular to a display panel and a display device.
  • Embodiments of the present application provide a display panel and a display device, so that at least a partial area of the display panel can transmit light and display, which facilitates the under-screen integration of photosensitive components.
  • the embodiment of the first aspect of the present application provides a display panel, including: a substrate, an interconnection structure located on one side of the substrate, and the interconnection structure includes more than two connection blocks and connection lines connecting at least two connection blocks;
  • the orthographic projection of the first light-emitting structure on the substrate is located within the orthographic projection of the first electrode on the substrate, and the orthographic projection of the connecting block on the substrate is the same as the orthographic projection of the first electrode on the substrate.
  • the projection is at least partially misplaced.
  • the connecting block includes a body part and a hollow part surrounded by the body part, and the orthographic projection of the hollow part on the substrate at least partially intersects the orthographic projection of the first light-emitting structure on the substrate. overlay settings.
  • the orthographic projection of the first light emitting structure on the substrate is located within the orthographic projection of the hollow portion on the substrate.
  • the distance between the edge of the orthographic projection of the first light emitting structure on the substrate and the edge of the orthographic projection of the hollow part on the substrate is 0.5 ⁇ m ⁇ 1.5 ⁇ m.
  • the orthographic projection of the body portion on the substrate and the orthographic projection of the first electrode on the substrate are at least partially overlapped.
  • the orthographic projection of the hollow portion on the substrate is located within the orthographic projection of the first electrode on the substrate.
  • the distance between the edge of the orthographic projection of the hollow portion on the substrate and the edge of the orthographic projection of the first electrode on the substrate is 1.0 ⁇ m ⁇ 3.5 ⁇ m.
  • the orthographic projection of the first electrode on the substrate is located within an area surrounded by outer edges of the orthographic projection of the connecting block on the substrate.
  • the distance between the edge of the orthographic projection of the first electrode on the substrate and the outer edge of the orthographic projection of the connecting block on the substrate is 1.0 ⁇ m ⁇ 3.0 ⁇ m.
  • the material of at least one of the connection block and the connection wire includes a light-transmitting conductive material.
  • the connecting block and the connecting wire are arranged in the same layer and made of the same material, and the materials of the connecting block and the connecting wire both include light-transmitting materials.
  • the display panel has a first display area and a second display area, the light transmittance of the first display area is greater than the light transmittance of the second display area, the interconnection structure and the first sub-area The pixels are all located in the first display area, and the display panel further includes a first driving circuit located in the second display area, and the interconnection structure is connected to the first driving circuit through connecting wires.
  • connection wire is used to connect four connection blocks, and the first light-emitting structures corresponding to the four connection blocks have the same light-emitting color.
  • the embodiment of the second aspect of the present application provides a display device, which includes the display panel in any one of the above-mentioned embodiments.
  • the embodiment of the third aspect of the present application provides a method for manufacturing a display panel, including:
  • the interconnection structure includes more than two connection blocks and connection lines connecting at least two connection blocks;
  • the first electrode is electrically connected to the connection block;
  • the second electrode on the side of the first light-emitting structure away from the substrate, so that the first electrode, the first light-emitting structure and the second electrode form the first sub-pixel, and the orthographic projection of the connecting block on the substrate is the same as that of the first light-emitting structure on the substrate.
  • the orthographic projection on is at least partially misaligned.
  • the display panel includes a substrate, an interconnection structure and a first sub-pixel disposed on the substrate.
  • the connection blocks of the interconnection structure are used to connect the first electrodes of the first sub-pixels, and the connection lines of the interconnection structure are used to connect more than two connection blocks, so the first electrodes of more than two first sub-pixels can be interconnected
  • the structures are connected to each other.
  • the driving circuit can connect more than two first sub-pixels through an interconnection structure, thereby reducing the number of layouts of the driving circuit, improving the light transmittance of the display panel, and making the display panel At least part of the area is transparent and displayable, which facilitates the integration of photosensitive components under the screen.
  • the orthographic projection of the connection block and the first light-emitting structure is at least partly misaligned, which can improve the influence of the additional connection block on the display effect and improve the display effect of the display panel.
  • FIG. 1 is a schematic top view of a display panel provided according to an embodiment of the present application.
  • Figure 2 A partially enlarged view of the Q region in Figure 1 in an example
  • Fig. 3 is the sectional view of B-B place among Fig. 2;
  • FIG. 4 is a schematic structural diagram of an interconnection structure of a display panel provided by an embodiment of the present application.
  • Fig. 5 is a schematic diagram of the interconnection structure of a display panel and the relative position of the first electrode provided by the embodiment of the present application;
  • FIG. 6 is a schematic structural diagram of the relative positions of an interconnection structure, a first electrode, and a first light emitting structure of a display panel provided by an embodiment of the present application;
  • Fig. 7 is a partial enlarged structural schematic diagram of Fig. 6;
  • FIG. 8 is a schematic top view of a display device provided by an embodiment of the present application.
  • Fig. 9 is a cross-sectional view along D-D in Fig. 8 . ;
  • FIG. 10 is a schematic flowchart of a method for manufacturing a display panel provided in an embodiment of the present application.
  • Display panel 200.
  • Photosensitive module S1, first surface; S2, second surface;
  • connection structure 20. Interconnection structure; 210. Connection block; 211. Body part; 212. Hollow part; 220. Connection line;
  • the first sub-pixel 310.
  • the first electrode 320.
  • the second electrode 330.
  • the second sub-pixel 510.
  • the third electrode 520.
  • the fourth electrode 530.
  • Pixel definition layer K1, first pixel opening; K2, second pixel opening;
  • AA1 the first display area
  • AA2 the second display area
  • a light-transmitting display area may be provided on the above-mentioned electronic device, and a photosensitive component may be arranged on the back of the light-transmitting display area, so as to realize full-screen display of the electronic device while ensuring normal operation of the photosensitive component.
  • connection structure needs to be provided to connect the pixel electrodes of two or more sub-pixels, while no connection structure is provided in the normal display area, and the pixel electrodes in the normal display area can be directly deposited on the planarization layer.
  • the pixel electrodes in the light-transmitting area are deposited on the connection structure, and different film layers will significantly affect the film quality of the pixel electrodes.
  • connection structure when multiple layer structures of the pixel electrode are sequentially deposited on the connection structure, the connection structure will affect the silver ions in the bottom layer.
  • defects When multiple layer structures are deposited layer by layer to form the pixel electrode, defects will also accumulate, resulting in silver ions Defects increase.
  • the silver ions in the pixel electrodes will migrate to form holes that cannot reflect the scraping line, and the areas where the silver ions have not migrated can normally reflect the light emitted by the light-emitting structure, which will eventually lead to yellowing and other bad displays on the display panel. Effect.
  • embodiments of the present application provide a display panel, a display device, and a method for manufacturing the display panel. Embodiments of the display panel and the display device will be described below with reference to the accompanying drawings.
  • An embodiment of the present application provides a display panel, and the display panel may be an organic light emitting diode (Organic Light Emitting Diode, OLED) display panel.
  • OLED Organic Light Emitting Diode
  • FIG. 1 is a schematic top view of a display panel 100 according to an embodiment of the present application
  • FIG. 2 is a partial enlarged view of an example of the Q region in FIG. 1
  • Fig. 3 is a cross-sectional view at B-B in Fig. 2 .
  • the display panel 100 provided by the embodiment of the first aspect of the present application includes: a substrate 10 , an interconnection structure 20 and a first sub-pixel 30 disposed on the substrate 10 .
  • the interconnection structure 20 is located on one side of the substrate 10, and the interconnection structure 20 includes more than two connection blocks 210 and a connection line 220 connecting at least two connection blocks 210;
  • the first sub-pixel 30 is located on the side of the interconnection structure 20 away from the substrate 10
  • the first sub-pixel 30 includes a first electrode 310, a first light emitting structure 330, and a second electrode 320 that are sequentially stacked in a direction away from the interconnection structure 20; wherein at least part of the first electrode 310 is located at the connection block 210
  • the side away from the substrate 10 is electrically connected to the connection block 210 , and the orthographic projection of the connection block 210 on the substrate 10 is at least partially offset from the orthographic projection of the first electrode 310 on the substrate 10 .
  • the display panel 100 includes a substrate 10 , an interconnection structure 20 and a first sub-pixel 30 disposed on the substrate 10 .
  • the connection block 210 of the interconnection structure 20 is used to connect the first electrode 310 of the first sub-pixel 30, and the connection line 220 of the interconnection structure 20 is used to connect more than two connection blocks 210, so more than two first sub-pixels
  • the first electrodes 310 of 30 can be connected to each other through the interconnection structure 20 .
  • the driving circuit can connect more than two first sub-pixels 30 through the interconnection structure 20, thereby reducing the number of layouts of the driving circuit and improving the light transmittance of the display panel 100, so that At least a part of the display panel 100 can transmit light and display, which facilitates the under-screen integration of photosensitive components.
  • the orthographic projections of the connection block 210 and the first light-emitting structure 330 are at least partly misaligned, that is, at least part of the first electrode 310 corresponding to the first light-emitting structure 330 is misaligned with the connection block 210 and does not contact each other, which can improve the effect of adding a connection block 210.
  • the influence on the display effect of the display panel 100 improves the display effect of the display panel 100 .
  • the substrate 10 includes a substrate, and the substrate can be made of glass, polyimide (Polyimide, PI) and other light-transmitting materials.
  • the substrate 10 may further include a support layer located on a side of the substrate away from the active layer 20 , and the support layer may include a steel plate layer and/or a foam layer.
  • a layer structure such as a buffer layer may also be provided between the substrate and the active layer 20 .
  • all regions of the display panel 100 may be provided with the interconnection structure 20 to improve the light transmittance of the entire display panel 100 .
  • the display panel 100 has a first display area AA1, a second display area AA2, and a non-display area NA surrounding the first display area AA1 and the second display area AA2,
  • the light transmittance of the first display area AA1 is greater than the light transmittance of the second display area AA2.
  • the display panel 100 may not have the non-display area NA.
  • the light transmittance of the first display area AA1 is greater than or equal to 15%.
  • the light transmittance of each functional film layer of the display panel 100 in this embodiment is greater than 80%. Even the light transmittance of at least some of the functional film layers is greater than 90%.
  • the light transmittance of the first display area AA1 is greater than the light transmittance of the second display area AA2, so that the display panel 100 can integrate photosensitive components on the back of the first display area AA1 to realize, for example, a camera.
  • the photosensitive components are integrated under the screen, and at the same time, the first display area AA1 can display images, which increases the display area of the display panel 100 and realizes a full-screen design of the display device.
  • the above-mentioned first sub-pixel 30 and the interconnection structure 20 are located in the first display area AA1 to further increase the light transmittance of the first display area AA1, so that The photosensitive module is integrated under the AA1 inner screen.
  • the display panel 100 further includes a first driving circuit 40 located in the second display area AA2 , and the interconnection structure 20 is connected to the first driving circuit 40 through a connection line 220 .
  • the first driving circuit 40 for driving the display of the first sub-pixel 30 in the first display area AA1 is located in the second display area AA2, which can further reduce the distribution of metal materials in the first display area AA1 area and increase the light transmittance of the first display area AA1.
  • the first driving circuit 40 is connected to the first electrode 310 through the interconnection structure 20, so that the first driving circuit 40 can drive more than two first sub-pixels 30 to display, which can reduce the number of wiring in the first display area AA1, thereby reducing
  • the distribution area of the metal material in the first display area AA1 increases the light transmittance of the first display area AA1.
  • the position of one of the first driving circuits 40 is schematically shown, which is electrically connected to the corresponding first sub-pixel 30 .
  • There may be multiple first driving circuits 40 and they are respectively electrically connected to corresponding first sub-pixels 30 .
  • the circuit structure of the first driving circuit 40 is any one of 2T1C circuit, 7T1C circuit, 7T2C circuit, or 9T1C circuit.
  • “2T1C circuit” refers to the driving circuit including two thin film transistors (T) and one capacitor (C) in the driving circuit, and other "7T1C circuits", “7T2C circuits", “9T1C circuits” and so on.
  • the display panel 100 further includes a second sub-pixel 50 located in the second display area AA2 and a second driving circuit 60 for driving the second sub-pixel 50 to display.
  • the second sub-pixel 50 includes a third electrode 510, a fourth electrode 520, and a second light emitting structure 530 located between the third electrode 510 and the fourth electrode 520, and each third electrode 510 is directly connected to the second driving circuit through a signal line. 60.
  • the third electrode 510 of the second sub-pixel 50 is directly connected to the second driving circuit 60, and the first electrodes 310 of more than two first sub-pixels 30 are connected to the first driving circuit 40 through the interconnection structure 20, the first display
  • the layer structure of the interconnection structure 20 is added in the area AA1. Since the third electrode 510 can be directly deposited on the planarization layer, and at least part of the first electrode 310 is deposited on the connection block 210, it may cause inconsistency in the display effect between the first display area AA1 and the second display area AA2, and further lead to the first Display stripes exist between the display area AA1 and the second display area AA2.
  • the orthographic projection of the connection block 210 on the substrate 10 and the orthographic projection of the first light-emitting structure 330 on the substrate 10 are at least partially misaligned, which can reduce the connection block 210 and the first light-emitting structure.
  • the overlapping area of the structure 330 can further improve the influence of the connection block 210 on the display effect, improve the inconsistency of the display effect between the first display area AA1 and the second display area AA2, and further improve the gap between the first display area AA1 and the second display area AA2. There are display streaks.
  • the size of the first sub-pixel 30 is smaller than the size of the second sub-pixel 50 of the same color, so that the area of the non-luminous area in the first display area AA1 is larger, so as to further improve the brightness of the first display area AA1. Transmittance.
  • the size of the first sub-pixel 30 is not limited thereto, for example, it may also be the same size as the second sub-pixel 50 of the same color.
  • the orthographic projection of the first light-emitting structure 330 on the substrate 10 is located within the orthographic projection of the first electrode 310 on the substrate 10 , and the orthographic projection of the connecting block 210 on the substrate 10 and the first electrode The orthographic projection of 310 on the substrate 10 is at least partially offset.
  • the orthographic projection of the first light emitting structure 330 on the substrate 10 is located within the orthographic projection of the first electrode 310 on the substrate 10, which can ensure that the surface of the first light emitting structure 330 faces the first electrode 310 Both are in contact with the first electrode 310 , increasing the contact area between the first light emitting structure 330 and the first electrode 310 , thereby improving the light emitting effect of the first light emitting structure 330 .
  • connection block 210 on the substrate 10 and the orthographic projection of the first electrode 310 on the substrate 10 are at least partly misaligned, so that the connection block 210 can be misaligned with the first light emitting structure 330, thereby improving the display of the first display area AA1 As a result, the display stripes between the first display area AA1 and the second display area AA2 are improved.
  • connection block 210 can be arranged around the first light emitting structure 330 .
  • FIG. 4 is a schematic structural diagram of an interconnection structure 20 of a display panel 100 provided by an embodiment of the present application.
  • FIG. 5 is a schematic structural diagram of the relative positions of the interconnection structure 20 and the first electrode 310 of the display panel 100 provided by the embodiment of the present application. In order to better illustrate the structure of the display panel 100 , there are no filling patterns in the interconnection structure 20 in FIG. 5 .
  • FIG. 6 is a schematic structural diagram of the relative positions of the interconnection structure 20 , the first electrode 310 and the first light emitting structure 330 of a display panel 100 according to an embodiment of the present application. In order to better illustrate the structure of the display panel 100 , the filling pattern in the interconnection structure 20 and the first electrode 310 is not shown in FIG. 6 .
  • Orthographic projections of a light emitting structure 330 on the substrate 10 are at least partially overlapped. That is, the area enclosed by the inner edge of the orthographic projection of the body portion 211 on the substrate 10 is at least partially overlapped with the orthographic projection of the first light emitting structure 330 on the substrate 10 .
  • connection block 210 is ring-shaped and includes a body portion 211 and a hollow portion 212.
  • the material of the interconnection structure 20 is not provided in the area where the hollow portion 212 is located. Therefore, when the hollow portion 212 is on the substrate 10 When the projection at least partially overlaps with the orthographic projection of the first light emitting structure 330 on the substrate 10 , the influence of the interconnection structure 20 on the display effect can be improved.
  • the annular body portion 211 can also increase the contact area between the connection block 210 and the first electrode 310 , and improve the stability of the electrical connection between the body portion 211 and the first electrode 310 .
  • the orthographic projection of the first light emitting structure 330 on the substrate 10 is located within the orthographic projection of the hollow part 212 on the substrate 10, that is, the orthographic projection of the first light emitting structure 330 on the substrate 10 is located within the orthographic projection of the body part 211 on the substrate 10.
  • the first light emitting structure 330 and the main body part 211 are completely misaligned, which can improve the influence of the interconnection structure 20 on the display effect, and better improve the first display area AA1 and the second display area.
  • FIG. 7 is a partially enlarged structural schematic diagram of FIG. 6 .
  • the distance d1 between the edge of the orthographic projection of the first light-emitting structure 330 on the substrate 10 and the edge of the orthographic projection of the hollow part 212 on the substrate 10 is 0.5 ⁇ m to 1.5 ⁇ m, that is, the first The distance d 1 between the edge of the orthographic projection of the light emitting structure 330 on the substrate 10 and the inner edge of the orthographic projection of the body portion 211 on the substrate 10 is 0.5 ⁇ m ⁇ 1.5 ⁇ m.
  • the distance d 1 between the edge of the orthographic projection of the first light emitting structure 330 on the substrate 10 and the edge of the orthographic projection of the hollow part 212 on the substrate 10 is 1.0 ⁇ m. Manufacturing errors can be improved so that the first light emitting structure 330 overlaps the body portion 211 , and display stripes between the first display area AA1 and the second display area AA2 are better improved.
  • the orthographic projection of the body portion 211 on the substrate 10 is at least partially overlapped with the orthographic projection of the first electrode 310 on the substrate 10 . Ensure that the first electrode 310 and the body portion 211 can be electrically connected to each other, and ensure that the first electrode 310 can be connected to the first driving circuit 40 through the interconnection structure 20 .
  • the orthographic projection of the hollow part 212 on the substrate 10 is located within the orthographic projection of the first electrode 310 on the substrate 10, that is, the area enclosed by the inner edge of the orthographic projection of the body part 211 on the substrate 10 Within the orthographic projection of an electrode 310 on the substrate 10, ensure that the inner edge of the body portion 211 can be connected to the first electrode 310, increase the connection area between the first electrode 310 and the body portion 211, and ensure that the body portion 211 is connected to the first electrode. The stability of the electrical connection between 310.
  • the distance d2 between the edge of the orthographic projection of the hollow part 212 on the substrate 10 and the edge of the orthographic projection of the first electrode 310 on the substrate 10 is 1.0 ⁇ m to 3.5 ⁇ m, that is, the distance d2 of the body portion 211 on the substrate 10
  • the distance d 2 between the inner edge of the orthographic projection and the edge of the orthographic projection of the first electrode 310 on the substrate 10 is 1.0 ⁇ m ⁇ 3.5 ⁇ m.
  • the distance d 2 between the inner edge of the orthographic projection of the body portion 211 on the substrate 10 and the edge of the orthographic projection of the first electrode 310 on the substrate 10 is 2 ⁇ m.
  • the orthographic projection of the first electrode 310 on the substrate 10 is located between the inner edge and the outer edge of the orthographic projection of the body portion 211 on the substrate 10 . It can ensure a sufficient contact area between the first electrode 310 and the body part 211 , and ensure the stability of the electrical connection between the first electrode 310 and the body part 211 .
  • the orthographic projection of the first electrode 310 on the substrate 10 is located within the area enclosed by the outer edge of the orthographic projection of the connecting block 210 on the substrate 10. On the one hand, the first electrode 310 is prevented from being too large to affect the light transmittance of the first display area AA1;
  • the distance d 3 between the edge of the orthographic projection of the first electrode 310 on the substrate 10 and the outer edge of the orthographic projection of the connection block 210 on the substrate 10 is 1.0 ⁇ m ⁇ 3.0 ⁇ m.
  • the distance d 3 between the edge of the orthographic projection of the first electrode 310 on the substrate 10 and the outer edge of the orthographic projection of the connection block 210 on the substrate 10 is 2.0 ⁇ m.
  • connection block when the distance between the edge of the orthographic projection of the first electrode 310 on the substrate 10 and the outer edge of the orthographic projection of the connection block 210 on the substrate 10 is within the above range, the connection block can be avoided. If the connection block 210 is too large to affect the light transmittance of the region where the connection block 210 is located, it can also prevent the connection block 210 from being too small to affect the electrical connection between the connection block 210 and the first electrode 310 .
  • connection lines 220 may be connected to a first predetermined number of connection blocks 210, and the first predetermined number may be 2 to 8, for example, 4, that is, the first electrodes 310 of every 4 first sub-pixels 30 pass through
  • the interconnect structures 20 are electrically connected to each other.
  • the interconnection structure 20 and the first electrode 310 are disposed on the same layer.
  • the material of the interconnection structure 20 can be the same as that of the first electrode 310, or can be other conductive materials.
  • the material of at least one of the connection block 210 and the connection line 220 includes a light-transmitting conductive material, so as to increase the light transmittance of the first display area AA1.
  • the materials of the connection blocks 210 and the connection lines 220 both include light-transmitting materials, that is, the materials of the interconnection structure 20 include light-transmitting materials, which can further increase the light transmittance of the first display area AA1.
  • the material of the interconnection structure 20 includes Indium Tin Oxide (ITO) material.
  • the first light-emitting structures 330 corresponding to the plurality of connection blocks 210 connected by the connection wire 220 have the same light-emitting color.
  • the first light emitting structure 330 corresponding to the connecting block 210 is the first light emitting structure 330 located on the side of the first electrode 310 electrically connected to the connecting block 210 .
  • the display panel 100 includes a device layer and a pixel definition layer 70 .
  • the device layer is located on the substrate 10, and the first driving circuit 40 is located on the device layer.
  • a pixel definition layer 70 is located on the device layer.
  • the device layer may include driving circuits for driving the display of each sub-pixel.
  • the pixel definition layer 70 includes a first pixel opening K1 located in the first display area AA1 and a second pixel opening K2 located in the second display area AA2TA.
  • the first light emitting structure 330 is located in the first pixel opening K1
  • the first electrode 310 is located on a side of the first light emitting structure 330 facing the substrate 10
  • the second electrode 320 is located on a side of the first light emitting structure 330 facing away from the substrate 10 .
  • One of the first electrode 310 and the second electrode 320 is an anode, and the other is a cathode.
  • the second light emitting structure 530 is located in the second pixel opening K2
  • the third electrode 510 is located on the side of the second light emitting structure 530 facing the substrate 10
  • the fourth electrode 520 is located on the side of the second light emitting structure 530 facing away from the substrate. 10 on one side.
  • One of the third electrode 510 and the fourth electrode 520 is an anode, and the other is a cathode.
  • the first electrode 310 and the third electrode 510 are an anode
  • the second electrode 320 and the fourth electrode 520 are a cathode as an example for description.
  • the first light-emitting structure 330 and the second light-emitting structure 530 can respectively include an OLED light-emitting layer, and according to the design requirements of the first light-emitting structure 330 and the second light-emitting structure 530, each can also include a hole injection layer, a hole transport layer, an electron At least one of an injection layer or an electron transport layer.
  • the first electrode 310 is a light-transmitting electrode. In some embodiments, the first electrode 310 includes an ITO layer or an indium zinc oxide layer. In some embodiments, the first electrode 310 is a reflective electrode, including a first transparent conductive layer, a reflective layer on the first transparent conductive layer, and a second transparent conductive layer on the reflective layer. Wherein the first light-transmitting conductive layer and the second light-transmitting conductive layer may be ITO, indium zinc oxide, etc., and the reflective layer may be a metal layer, such as made of silver.
  • the third electrode 510 can be configured to use the same material as the first electrode 310 .
  • the second electrode 320 includes a magnesium-silver alloy layer.
  • the fourth electrode 520 can be configured to use the same material as the second electrode 320 .
  • the second electrode 320 and the fourth electrode 520 may be interconnected as a common electrode.
  • the orthographic projection of each first light-emitting structure 330 on the substrate 10 consists of one first graphic unit or more than two first graphic units spliced together.
  • the first graphic unit consists of a circle, an ellipse At least one selected from the group consisting of shape, dumbbell shape, gourd shape, and rectangle.
  • the orthographic projection of each first electrode 310 on the substrate 10 is composed of one second graphic unit or more than two second graphic units spliced together, and the second graphic unit includes circular, oval , dumbbell-shaped, gourd-shaped, and rectangular at least one selected from the group.
  • the display panel 100 may further include an encapsulation layer, a polarizer and a cover plate located above the encapsulation layer, or a cover plate may be provided directly above the encapsulation layer without a polarizer, or at least in the first display area AA1
  • a cover plate is directly arranged above the encapsulation layer without a polarizer, and the influence of the polarizer on the amount of light collected by the photosensitive element corresponding to the lower part of the first display area AA1 is improved.
  • a polarizer can also be arranged above the encapsulation layer of the first display area AA1.
  • the embodiment of the present application further provides a display device, and the display device may include the display panel 100 in any of the foregoing implementation manners.
  • the display device includes the display panel 100 of the above-mentioned embodiments.
  • FIG. 8 shows a schematic top view of a display device according to an embodiment of the present application
  • FIG. 9 shows a cross-sectional view along D-D in FIG. 8
  • the display panel 100 may be the display panel 100 of one of the above-mentioned embodiments.
  • the display panel 100 has a first display area AA1 and a second display area AA2, and the light transmittance of the first display area AA1 is greater than that of the second display area.
  • the display panel 100 includes a first surface S1 and a second surface S2 opposite to each other, wherein the first surface S1 is a display surface.
  • the display device further includes a photosensitive component 200 located on the second surface S2 side of the display panel 100 , and the photosensitive component 200 corresponds to the position of the first display area AA1 .
  • the photosensitive component 200 may be an image acquisition device for acquiring external image information.
  • the photosensitive component 200 is a complementary metal oxide semiconductor (Complementary Metal Oxide Semiconductor, CMOS) image acquisition device, and in some other embodiments, the photosensitive component 200 can also be a charge-coupled device (Charge-coupled Device, CCD) Image acquisition devices and other forms of image acquisition devices.
  • CMOS Complementary Metal Oxide Semiconductor
  • CCD Charge-coupled Device
  • the photosensitive component 200 may not be limited to an image acquisition device, for example, in some embodiments, the photosensitive component 200 may also be an infrared sensor, a proximity sensor, an infrared lens, a flood sensing element, an ambient light sensor, and a dot matrix projection light sensors such as
  • the display device can also integrate other components on the second surface S2 of the display panel 100 , such as an earpiece, a speaker, and the like.
  • the light transmittance of the first display area AA1 is greater than the light transmittance of the second display area AA2, so that the display panel 100 can integrate the photosensitive component 200 on the back of the first display area AA1 to realize, for example, an image
  • the photosensitive component 200 of the acquisition device is integrated under the screen, and at the same time, the first display area AA1 can display images, thereby increasing the display area of the display panel 100 and realizing a full-screen design of the display device.
  • FIG. 10 is a schematic flowchart of a method for manufacturing a display panel 100 provided in an embodiment of the present application.
  • the display panel 100 may be the display panel 100 provided in any one of the embodiments of the first aspect above.
  • the manufacturing method of the display panel 100 includes:
  • Step S01 coating a conductive material on the substrate 10 to form a conductive material layer.
  • Step S02 patterning the conductive material layer to form an interconnection structure 20 , the interconnection structure 20 includes more than two connection blocks 210 and connection lines 220 connecting at least two connection blocks 210 .
  • Step S03 preparing the first electrode 310 on the side of the interconnection structure 20 facing away from the substrate 10 , and the first electrode 310 is electrically connected to the connection block 210 .
  • Step S04 preparing the first light emitting structure 330 on the side of the first electrode 310 facing away from the substrate 10 .
  • Step S05 Prepare the second electrode 320 on the side of the first light emitting structure 330 facing away from the substrate 10, so that the first electrode 310, the first light emitting structure 330 and the second electrode 320 form the first sub-pixel 30, and the connecting block 210 is on the substrate
  • the orthographic projection on the substrate 10 and the orthographic projection of the first light emitting structure 330 on the substrate 10 are at least partially misaligned.
  • the display panel 100 is prepared according to the method provided in the embodiment of the present application, and the interconnection structure 20 is formed through step S01 and step S02 before preparing the first electrode 310 . More than two first electrodes 310 of the display panel 100 can be connected to each other through the interconnection structure 20 .
  • the driving circuit can connect more than two first sub-pixels 30 through the interconnection structure 20, thereby reducing the number of layouts of the driving circuit and improving the light transmittance of the display panel 100, At least a partial area of the display panel 100 is made transparent and displayable, which facilitates the under-screen integration of photosensitive components.
  • the orthographic projections of the connecting block 210 and the first light-emitting structure 330 are at least partially offset, which can improve the effect of the display effect caused by the addition of the connecting block 210 and improve the display effect of the display panel 100 .
  • the display panel 100 includes a first display area AA1 and a second display area AA2, and the first sub-pixel 30 is located in the first display area AA1, an interstructure may be formed in the first display area AA1 to improve the second display area AA1.

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Abstract

本申请公开了一种显示面板、显示装置及显示面板的制备方法，显示面板包括：基板，互连结构，位于基板的一侧，互连结构包括两个以上的连接块及连接至少两个连接块的连接线；第一子像素，位于互连结构背离基板的一侧，第一子像素包括在背离互连结构的方向上依次层叠设置的第一电极、第一发光结构和第二电极；其中，至少部分第一电极位于连接块背离基板的一侧并电连接于连接块，且连接块在基板上的正投影与第一电极在基板上的正投影至少部分错位设置。本申请中连接块与第一发光结构的正投影至少部分错位设置，能够改善由于增设连接块对显示效果的影响，提高显示面板的显示效果。

Description

显示面板及显示装置
相关申请的交叉引用
本申请要求享有于2021年12月21日提交的名称为“显示面板、显示装置及显示面板的制备方法”的中国专利申请第202111569379.4号的优先权，该申请的全部内容通过引用并入本文中。
技术领域
本申请涉及显示领域，具体涉及一种显示面板及显示装置。
背景技术
随着电子设备的快速发展，用户对屏占比的要求越来越高，使得电子设备的全面屏显示受到业界越来越多的关注。
传统的电子设备如手机、平板电脑等，由于需要集成诸如前置摄像头、听筒以及红外感应元件等。现有技术中，可通过在显示屏上开槽(Notch)或开孔，外界光线可通过屏幕上的开槽或开孔进入位于屏幕下方的感光元件。但是这些电子设备均不是真正意义上的全面屏，并不能在整个屏幕的各个区域均进行显示，例如其前置摄像头对应区域不能显示画面。
发明内容
本申请实施例提供一种显示面板及显示装置，实现显示面板的至少部分区域可透光且可显示，便于感光组件的屏下集成。
本申请第一方面的实施例提供一种显示面板，包括：基板，互连结构，位于基板的一侧，互连结构包括两个以上的连接块及连接至少两个连接块的连接线；第一子像素，位于互连结构背离基板的一侧，第一子像素包括在背离互连结构的方向上依次层叠设置的第一电极、第一发光结构和 第二电极；其中，至少部分第一电极位于连接块背离基板的一侧并电连接于连接块，且连接块在基板上的正投影与第一电极在基板上的正投影至少部分错位设置。
根据本申请第一方面的实施方式，第一发光结构在基板上的正投影位于第一电极在基板上的正投影之内，连接块在基板上的正投影与第一电极在基板上的正投影至少部分错位设置。
根据本申请第一方面前述任一实施方式，连接块包括本体部和由本体部围合形成的镂空部，镂空部在基板上的正投影与第一发光结构在基板上的正投影至少部分交叠设置。
根据本申请第一方面前述任一实施方式，第一发光结构在基板上的正投影位于镂空部在基板上的正投影之内。
根据本申请第一方面前述任一实施方式，第一发光结构在基板上的正投影边缘与镂空部在基板上的正投影边缘之间的距离为0.5μm～1.5μm。
根据本申请第一方面前述任一实施方式，本体部在基板上的正投影与第一电极在基板上的正投影至少部分交叠设置。
根据本申请第一方面前述任一实施方式，镂空部在基板上的正投影位于第一电极在基板上的正投影之内。
根据本申请第一方面前述任一实施方式，镂空部在基板上的正投影边缘与第一电极在基板上的正投影边缘之间的距离为1.0μm～3.5μm。
根据本申请第一方面前述任一实施方式，第一电极在基板上的正投影位于连接块在基板上的正投影外边缘围合形成的区域之内。
根据本申请第一方面前述任一实施方式，第一电极在基板上的正投影边缘与连接块在基板上的正投影外边缘之间的距离为1.0μm～3.0μm。
根据本申请第一方面前述任一实施方式，连接块和连接线中的至少一者的材料包括透光导电材料。
根据本申请第一方面前述任一实施方式，连接块和连接线同层同材料设置，且连接块和连接线的材料均包括透光材料。
根据本申请第一方面前述任一实施方式，显示面板具有第一显示区和第二显示区，第一显示区的透光率大于第二显示区的透光率，互连结构和 第一子像素均位于第一显示区，显示面板还包括位于第二显示区的第一驱动电路，互连结构通过连接线连接于第一驱动电路。
根据本申请第一方面前述任一实施方式，连接线用于连接4个连接块，且该四个连接块对应的第一发光结构具有相同的发光颜色。
本申请第二方面的实施例提供一种显示装置，其包括上述任一实施方式的显示面板。
本申请第三方面的实施例提供一种显示面板的制备方法，包括：
在基板上涂覆导电材料以形成导电材料层；
对导电材料层进行图案化处理形成互连结构，互连结构包括两个以上的连接块及连接至少两个连接块的连接线；
在互连结构背离基板的一侧制备第一电极，第一电极电连接于连接块；
在第一电极背离基板的一侧制备第一发光结构；
在第一发光结构背离基板的一侧制备第二电极，以使第一电极、第一发光结构和第二电极组成第一子像素，连接块在基板上的正投影与第一发光结构在基板上的正投影至少部分错位设置。
在本申请实施例提供的显示面板中，显示面板包括基板和设置于基板的互连结构和第一子像素。互连结构的连接块用于连接第一子像素的第一电极，互连结构的连接线用于连接两个以上的连接块，因此两个以上的第一子像素的第一电极能够通过互连结构相互连接。当使用驱动电路驱动第一子像素时，驱动电路可以通过互连结构连接两个以上的第一子像素，进而能够减小驱动电路的布置数量，提高显示面板的透光率，使得显示面板的至少部分区域可透光且可显示，便于感光组件的屏下集成。此外，连接块与第一发光结构的正投影至少部分错位设置，能够改善由于增设连接块对显示效果的影响，提高显示面板的显示效果。
附图说明
通过阅读以下参照附图对非限制性实施例所作的详细描述，本申请的其它特征、目的和优点将会变得更明显，其中，相同或相似的附图标记表 示相同或相似的特征，附图并未按照实际的比例绘制。
图1是根据本申请实施例提供的一种显示面板的俯视示意图；
图2图1中Q区域在一种示例中的局部放大图；
图3是图2中B-B处的剖视图；
图4是本申请实施例提供的一种显示面板的互连结构的结构示意图；
图5是本申请实施例提供的一种显示面板的互连结构和第一电极的相对位置结构示意图；
图6是本申请实施例提供的一种显示面板的互连结构、第一电极和第一发光结构的相对位置结构示意图；
图7是图6的局部放大结构示意图；
图8是本申请实施例提供的一种显示装置的俯视示意图；
图9是图8中D-D向的剖面图。；
图10是本申请实施例提供的一种显示面板的制备方法的流程示意图。
附图标记说明：
100、显示面板；200、感光模组；S1、第一表面；S2、第二表面；
10、基板；
20、互连结构；210、连接块；211、本体部；212、镂空部；220、连接线；
30、第一子像素；310、第一电极；320、第二电极；330、第一发光结构；
40、第一驱动电路；
50、第二子像素；510、第三电极；520、第四电极；530、第二发光结构；
60、第二驱动电路；
70、像素定义层；K1、第一像素开口；K2、第二像素开口；
AA1、第一显示区；AA2、第二显示区。
具体实施方式
下面将详细描述本申请的各个方面的特征和示例性实施例，为了使本 申请的目的、技术方案及优点更加清楚明白，以下结合附图及具体实施例，对本申请进行进一步详细描述。应理解，此处所描述的具体实施例仅被配置为解释本申请，并不被配置为限定本申请。对于本领域技术人员来说，本申请可以在不需要这些具体细节中的一些细节的情况下实施。下面对实施例的描述仅仅是为了通过示出本申请的示例来提供对本申请更好的理解。
在诸如手机和平板电脑等电子设备上，需要在设置显示面板的一侧集成诸如前置摄像头、红外光传感器、接近光传感器等感光组件。在一些实施例中，可以在上述电子设备上设置透光显示区，将感光组件设置在透光显示区背面，在保证感光组件正常工作的情况下，实现电子设备的全面屏显示。
为了提高透光区的透光率，透光区的两个以上子像素会连接于同一个驱动电路，进而能够减少驱动电路的布置数量和金属材料的分布面积。为此需要设置连接结构连接两个以上子像素的像素电极，而正常显示区未设置连接结构，正常显示区的像素电极能够直接沉积在平坦化层上。而透光区的像素电极沉积在连接结构上，不同膜层将显著影响像素电极的膜质。例如当像素电极的多个层结构依次沉积在连接结构上时，连接结构会对底层内的银离子产生影响，当多个层结构逐层沉积形成像素电极时，缺陷也会累计，导致银离子缺陷增多。在后续高温制程中，会导致像素电极中的银离子迁移而形成无法反射刮光线的孔洞，未发生银离子迁移的区域能够正常反射发光结构发出的光，最终导致显示面板出现发黄等不良显示效果。
为解决上述问题，本申请实施例提供了一种显示面板、显示装置及显示面板的制备方法，以下将结合附图对显示面板及显示装置的各实施例进行说明。
本申请实施例提供一种显示面板，该显示面板可以是有机发光二极管(Organic Light Emitting Diode，OLED)显示面板。
请参阅图1至图3，图1是根据本申请实施例提供的一种显示面板100的俯视示意图，图2图1中Q区域在一种示例中的局部放大图。图3 是图2中B-B处的剖视图。
如图1至图3所示，本申请第一方面的实施例提供的显示面板100包括：基板10和设置于基板10的互连结构20和第一子像素30。互连结构20位于基板10的一侧，互连结构20包括两个以上的连接块210及连接至少两个连接块210的连接线220；第一子像素30位于互连结构20背离基板10的一侧，第一子像素30包括在背离互连结构20的方向上依次层叠设置的第一电极310、第一发光结构330和第二电极320；其中，至少部分第一电极310位于连接块210背离基板10的一侧并电连接于连接块210，且连接块210在基板10上的正投影与第一电极310在基板10上的正投影至少部分错位设置。
在本申请实施例提供的显示面板100中，显示面板100包括基板10和设置于基板10的互连结构20和第一子像素30。互连结构20的连接块210用于连接第一子像素30的第一电极310，互连结构20的连接线220用于连接两个以上的连接块210，因此两个以上的第一子像素30的第一电极310能够通过互连结构20相互连接。当使用驱动电路驱动第一子像素30时，驱动电路可以通过互连结构20连接两个以上的第一子像素30，进而能够减少驱动电路的布置数量，提高显示面板100的透光率，使得显示面板100的至少部分区域可透光且可显示，便于感光组件的屏下集成。此外，连接块210与第一发光结构330的正投影至少部分错位设置，即至少部分第一发光结构330对应的第一电极310与连接块210错位且没有相互接触，能够改善由于增设连接块210对显示面板100显示效果的影响，提高显示面板100的显示效果。
基板10的设置方式有多种，可选的，基板10包括衬底，衬底可以选用玻璃、聚酰亚胺(Polyimide，PI)等透光材料制成。基板10还可以包括位于衬底背离有源层20一侧的支撑层，支撑层可以包括钢板层和/或泡棉层。衬底和有源层20之间还可以设置缓冲层等层结构。
可选的，显示面板100的所有区域均可以设置互连结构20，以提高整个显示面板100的透光率。
在另一些实施例中，请继续参阅图1和图2，显示面板100具有第一 显示区AA1、第二显示区AA2以及围绕第一显示区AA1、第二显示区AA2的非显示区NA，第一显示区AA1的透光率大于第二显示区AA2的透光率。在其他实施例中，显示面板100也可以不具有非显示区NA。
本文中，可选的，第一显示区AA1的透光率大于或等于15％。为确保第一显示区AA1的透光率大于15％，甚至大于40％，甚至具有更高的透光率，本实施例中显示面板100的各个功能膜层的透光率均大于80％，甚至至少部分功能膜层的透光率均大于90％。
根据本申请实施例的显示面板100，第一显示区AA1的透光率大于第二显示区AA2的透光率，使得显示面板100在第一显示区AA1的背面可以集成感光组件，实现例如摄像头的感光组件的屏下集成，同时第一显示区AA1能够显示画面，提高显示面板100的显示面积，实现显示装置的全面屏设计。
可选的，请继续参阅图2和图3，上述的第一子像素30和互连结构20位于第一显示区AA1以进一步提高第一显示区AA1的透光率，便于在第一显示区AA1内屏下集成感光模组。
可选的，请继续参阅图2和图3，显示面板100还包括位于第二显示区AA2的第一驱动电路40，互连结构20通过连接线220连接于第一驱动电路40。
在这些可选的实施例中，用于驱动第一显示区AA1内第一子像素30显示的第一驱动电路40位于第二显示区AA2，能够进一步降低第一显示区AA1内金属材料的分布面积并提高第一显示区AA1的透光率。第一驱动电路40通过互连结构20连接于第一电极310，使得第一驱动电路40能够驱动两个以上的第一子像素30显示，能够减少第一显示区AA1内的布线数量，进而降低第一显示区AA1内金属材料的分布面积并提高第一显示区AA1的透光率。
图2中，示例性绘示了其中一个第一驱动电路40的位置，其与对应的第一子像素30电连接。第一驱动电路40的数量可以是多个，并且分别对应电连接至对应的第一子像素30。在一些实施例中，第一驱动电路40的电路结构是2T1C电路、7T1C电路、7T2C电路、或9T1C电路中的任 一种。本文中，“2T1C电路”指驱动电路中包括2个薄膜晶体管(T)和1个电容(C)的驱动电路，其它“7T1C电路”、“7T2C电路”、“9T1C电路”等依次类推。
可选的，请继续参阅图2和图3，显示面板100还包括位于第二显示区AA2的第二子像素50和用于驱动第二子像素50显示的第二驱动电路60。第二子像素50包括第三电极510、第四电极520和位于第三电极510和第四电极520之间的第二发光结构530，各第三电极510通过信号线直接连接于第二驱动电路60。
第二子像素50的第三电极510与第二驱动电路60直接连接，而两个以上的第一子像素30的第一电极310通过互连结构20与第一驱动电路40连接，第一显示区AA1内增加了互连结构20的层结构。由于第三电极510可以直接沉积在平坦化层，而至少部分第一电极310沉积在连接块210，可能导致第一显示区AA1和第二显示区AA2之间的显示效果不一致，进而导致第一显示区AA1和第二显示区AA2之间存在显示条纹。
在本申请实施例提供的显示面板100中，连接块210在基板10上的正投影与第一发光结构330在基板10上的正投影至少部分错位设置，能够减小连接块210与第一发光结构330的交叠面积，进而改善连接块210对显示效果的影响，改善第一显示区AA1和第二显示区AA2显示效果的不一致，进而改善第一显示区AA1和第二显示区AA2之间存在显示条纹。
在一些实施例中，第一子像素30的尺寸小于同种颜色的第二子像素50的尺寸，使得第一显示区AA1中的非发光区域面积更大，便于进一步提高第一显示区AA1的透光率。在其它一些实施例中，第一子像素30的尺寸不限于此，例如，也可以是与同种颜色的第二子像素50的尺寸相同。
在一些可选的实施例中，第一发光结构330在基板10上的正投影位于第一电极310在基板10上的正投影之内，连接块210在基板10上的正投影与第一电极310在基板10上的正投影至少部分错位设置。
在这些可选的实施例中，第一发光结构330在基板10上的正投影位于第一电极310在基板10上的正投影之内，能够保证第一发光结构330朝 向第一电极310的表面均与第一电极310接触，提高第一发光结构330和第一电极310的接触面积，进而提高第一发光结构330的发光效果。连接块210在基板10上的正投影与第一电极310在基板10上的正投影至少部分错位设置，使得连接块210能够与第一发光结构330错位设置，进而改善第一显示区AA1的显示效果，改善第一显示区AA1和第二显示区AA2之间的显示条纹。
连接块210的形状设置方式有多种，例如连接块210可以环绕第一发光结构330设置。
请参阅图4至图6，图4是本申请实施例提供的一种显示面板100的互连结构20的结构示意图。图5是本申请实施例提供的一种显示面板100的互连结构20和第一电极310的相对位置结构示意图。为了更好的展示显示面板100的结构，图5中未在互连结构20内的填充图案。图6是本申请实施例提供的一种显示面板100的互连结构20、第一电极310和第一发光结构330的相对位置结构示意图。为了更好的展示显示面板100的结构，图6中未在互连结构20和第一电极310内的填充图案。
在一些可选的实施例中，如图4至图6所示，连接块210包括本体部211和由本体部211围合形成的镂空部212，镂空部212在基板10上的正投影与第一发光结构330在基板10上的正投影至少部分交叠设置。即本体部211在基板10上的正投影内边缘围合形成的区域与第一发光结构330在基板10上的正投影至少部分交叠设置。
在这些可选的实施例中，连接块210呈环状并包括本体部211和镂空部212，镂空部212所在区域未设置互连结构20的材料，因此当镂空部212在基板10上的正投影与第一发光结构330在基板10上的正投影至少部分交叠时，能够改善互连结构20对显示效果的影响。另外，环状的本体部211还能够增加连接块210与第一电极310之间的接触面积，提高本体部211和第一电极310之间电连接的稳定性。
可选的，第一发光结构330在基板10上的正投影位于镂空部212在基板10上的正投影之内，即第一发光结构330在基板10上的正投影位于本体部211在基板10上的正投影内边缘围合形成的区域之内，第一发光结 构330与本体部211完全错位设置，能够改善互连结构20对显示效果的影响，更好地改善第一显示区AA1和第二显示区AA2之间的显示条纹。
请参阅图7，图7是图6的局部放大结构示意图。
可选的，如图7所示，第一发光结构330在基板10上的正投影边缘与镂空部212在基板10上的正投影边缘之间的距离d 1为0.5μm～1.5μm，即第一发光结构330在基板10上的正投影边缘与本体部211在基板10上的正投影内边缘之间的距离d 1为0.5μm～1.5μm。例如，第一发光结构330在基板10上的正投影边缘与镂空部212在基板10上的正投影边缘之间的距离d 1为1.0μm。能够改善制造误差使得第一发光结构330与本体部211交叠，更好地改善第一显示区AA1和第二显示区AA2之间的显示条纹。
在一些可选的实施例中，本体部211在基板10上的正投影与第一电极310在基板10上的正投影至少部分交叠设置。保证第一电极310和本体部211能够相互电连接，保证第一电极310能够通过互连结构20连接第一驱动电路40。
可选的，镂空部212在基板10上的正投影位于第一电极310在基板10上的正投影之内，即本体部211在基板10上的正投影的内边缘围合形成的区域在第一电极310在基板10上的正投影之内，保证本体部211的内边缘能够与第一电极310相互连接，增加第一电极310和本体部211的连接面积，保证本体部211与第一电极310之间电连接的稳定性。
可选的，镂空部212在基板10上的正投影边缘与第一电极310在基板10上的正投影边缘之间的距离d 2为1.0μm～3.5μm，即本体部211在基板10上的正投影的内边缘与第一电极310在基板10上的正投影边缘之间的距离d 2为1.0μm～3.5μm。例如本体部211在基板10上的正投影的内边缘与第一电极310在基板10上的正投影边缘之间的距离d 2为2μm。即第一电极310在基板10上的正投影位于本体部211在基板10上的正投影的内边缘和外边缘之间。能够保证第一电极310和本体部211之间具有足够的接触面积，保证第一电极310和本体部211之间电连接的稳定性。
在一些可选的实施例中，第一电极310在基板10上的正投影位于连 接块210在基板10上的正投影外边缘围合形成的区域之内。一方面避免第一电极310过大而影响第一显示区AA1的透光率，另一方面能够保证连接块210较大，保证连接块210和第一电极310之间具有足够的接触面积。
可选的，第一电极310在基板10上的正投影边缘与连接块210在基板10上的正投影外边缘之间的距离d 3为1.0μm～3.0μm。例如，第一电极310在基板10上的正投影边缘与连接块210在基板10上的正投影外边缘之间的距离d 3为2.0μm。
在这些可选的实施例中，第一电极310在基板10上的正投影边缘与连接块210在基板10上的正投影外边缘之间的距离在上述范围之内时，既能够避免连接块210过大而影响连接块210所在区域的透光率，也能够避免连接块210过小影响连接块210和第一电极310之间的电连接。
在一些实施例中，连接线220可以连接于第一预定数量的连接块210，第一预定数量可以为2至8，例如是4，即每4个第一子像素30的第一电极310通过互连结构20相互电连接。在一些实施例中，互连结构20与第一电极310同层设置。互连结构20的材质可以和第一电极310相同，也可以是其它导电材料。
在一些可选的实施例中，连接块210和连接线220中的至少一者的材料包括透光导电材料，以提高第一显示区AA1的透光率。例如连接块210和连接线220的材料均包括透光材料，即互连结构20的材料包括透光材料，能够进一步提高第一显示区AA1的透光率。例如互连结构20的材料包括氧化铟锡(Indium Tin Oxide，ITO)材料。
可选的，连接线220连接的多个连接块210对应的第一发光结构330具有相同的发光颜色。连接块210对应的第一发光结构330，即位于连接块210电连接的第一电极310一侧的第一发光结构330。
在一些实施例中，请继续参阅图3，显示面板100包括器件层以及像素定义层70。器件层位于基板10上，第一驱动电路40位于器件层。像素定义层70位于器件层上。
器件层可以包括用于驱动各子像素显示的驱动电路。像素定义层70 包括位于第一显示区AA1的第一像素开口K1以及位于第二显示区AA2TA的第二像素开口K2。第一发光结构330位于第一像素开口K1内，第一电极310位于第一发光结构330的朝向基板10的一侧，第二电极320位于第一发光结构330的背离基板10的一侧。第一电极310、第二电极320中的一个为阳极、另一个为阴极。
在一些实施例中，第二发光结构530位于第二像素开口K2内，第三电极510位于第二发光结构530的朝向基板10的一侧，第四电极520位于第二发光结构530的背离基板10的一侧。第三电极510、第四电极520中的一个为阳极、另一个为阴极。
本实施例中，以第一电极310、第三电极510是阳极、第二电极320、第四电极520是阴极为例进行说明。
第一发光结构330、第二发光结构530分别可以包括OLED发光层，根据第一发光结构330、第二发光结构530的设计需要，各自还可以分别包括空穴注入层、空穴传输层、电子注入层或电子传输层中的至少一种。
在一些实施例中，第一电极310为透光电极。在一些实施例中，第一电极310包括ITO层或氧化铟锌层。在一些实施例中，第一电极310为反射电极，包括第一透光导电层、位于第一透光导电层上的反射层以及位于反射层上的第二透光导电层。其中第一透光导电层、第二透光导电层可以是ITO、氧化铟锌等，反射层可以是金属层，例如是银材质制成。第三电极510可以配置为与第一电极310采用相同的材质。
在一些实施例中，第二电极320包括镁银合金层。第四电极520可以配置为与第二电极320采用相同的材质。在一些实施例中，第二电极320、第四电极520可以互连为公共电极。
在一些实施例中，每个第一发光结构330在基板10上的正投影由一个第一图形单元组成或由两个以上第一图形单元拼接组成，第一图形单元包括从由圆形、椭圆形、哑铃形、葫芦形、矩形组成的群组中选择的至少一个。
在一些实施例中，每个第一电极310在基板10上的正投影由一个第二图形单元组成或由两个以上第二图形单元拼接组成，第二图形单元包括 从由圆形、椭圆形、哑铃形、葫芦形、矩形组成的群组中选择的至少一个。
示例性地，显示面板100还可以包括封装层和位于封装层上方的偏光片和盖板，也可以直接在封装层上方直接设置盖板，无需设置偏光片，或者至少在第一显示区AA1的封装层上方直接设置盖板，无需设置偏光片，改善偏光片影响对应第一显示区AA1下方设置的感光元件的光线采集量，当然，第一显示区AA1的封装层上方也可以设置偏光片。
本申请实施例还提供一种显示装置，该显示装置可以包括上述任一实施方式的显示面板100。以下将以一种实施例的显示装置为例进行说明，该实施例中，显示装置包括上述实施例的显示面板100。
图8示出根据本申请一种实施例的显示装置的俯视示意图，图9示出图8中D-D向的剖面图。本实施例的显示装置中，显示面板100可以是上述其中一个实施例的显示面板100，显示面板100具有第一显示区AA1以及第二显示区AA2，第一显示区AA1的透光率大于第二显示区AA2的透光率。
显示面板100包括相对的第一表面S1和第二表面S2，其中第一表面S1为显示面。显示装置还包括感光组件200，该感光组件200位于显示面板100的第二表面S2侧，感光组件200与第一显示区AA1位置对应。
感光组件200可以是图像采集装置，用于采集外部图像信息。本实施例中，感光组件200为互补金属氧化物半导体(Complementary Metal Oxide Semiconductor，CMOS)图像采集装置，在其它一些实施例中，感光组件200也可以是电荷耦合器件(Charge-coupled Device，CCD)图像采集装置等其它形式的图像采集装置。可以理解的是，感光组件200可以不限于是图像采集装置，例如在一些实施例中，感光组件200也可以是红外传感器、接近传感器、红外镜头、泛光感应元件、环境光传感器以及点阵投影器等光传感器。此外，显示装置在显示面板100的第二表面S2还可以集成其它部件，例如是听筒、扬声器等。
根据本申请实施例的显示装置，第一显示区AA1的透光率大于第二显示区AA2的透光率，使得显示面板100在第一显示区AA1的背面可以集 成感光组件200，实现例如图像采集装置的感光组件200的屏下集成，同时第一显示区AA1能够显示画面，提高显示面板100的显示面积，实现显示装置的全面屏设计。
请参阅图10，图10是本申请实施例提供的一种显示面板100的制备方法的流程示意图，该显示面板100可以为上述任一第一方面实施例提供的显示面板100。
如图10所示，并请一并参阅图1至图7，显示面板100的制备方法包括：
步骤S01：在基板10上涂覆导电材料以形成导电材料层。
步骤S02：对导电材料层进行图案化处理形成互连结构20，互连结构20包括两个以上的连接块210及连接至少两个连接块210的连接线220。
步骤S03：在互连结构20背离基板10的一侧制备第一电极310，第一电极310电连接于连接块210。
步骤S04：在第一电极310背离基板10的一侧制备第一发光结构330。
步骤S05：在第一发光结构330背离基板10的一侧制备第二电极320，以使第一电极310、第一发光结构330和第二电极320组成第一子像素30，连接块210在基板10上的正投影与第一发光结构330在基板10上的正投影至少部分错位设置。
根据本申请实施例提供的方法制备形成的显示面板100，在制备第一电极310之间先通过步骤S01和步骤S02形成互连结构20。使得显示面板100的两个以上的第一电极310能够通过互连结构20相互连接。当使用驱动电路驱动第一子像素30时，驱动电路可以通过互连结构20连接两个以上的第一子像素30，进而能够减小驱动电路的布置数量，提高显示面板100的透光率，使得显示面板100的至少部分区域可透光且可显示，便于感光组件的屏下集成。此外，连接块210与第一发光结构330的正投影至少部分错位设置，能够改善由于增设连接块210对显示效果的影响，提高显示面板100的显示效果。
可选的，当显示面板100包括第一显示区AA1和第二显示区AA2 时，且第一子像素30位于第一显示区AA1时，可以在第一显示区AA1形成互结构，以提高第一显示区AA1的透光率。
依照本申请如上文所述的实施例，这些实施例并没有详尽叙述所有的细节，也不限制该发明仅为所述的具体实施例。显然，根据以上描述，可作很多的修改和变化。本说明书选取并具体描述这些实施例，是为了更好地解释本申请的原理和实际应用，从而使所属技术领域技术人员能很好地利用本申请以及在本申请基础上的修改使用。本申请仅受权利要求书及其全部范围和等效物的限制。

Claims (16)

  1. 一种显示面板，包括：
    基板，
    互连结构，位于所述基板的一侧，所述互连结构包括两个以上的连接块及连接至少两个所述连接块的连接线；
    第一子像素，位于所述互连结构背离所述基板的一侧，所述第一子像素包括在背离所述互连结构的方向上依次层叠设置的第一电极、第一发光结构和第二电极；
    其中，至少部分所述第一电极位于所述连接块背离基板的一侧并电连接于所述连接块，且所述连接块在所述基板上的正投影与所述第一发光结构在所述基板上的正投影至少部分错位设置。
  2. 根据权利要求1所述的显示面板，其中，所述第一发光结构在所述基板上的正投影位于所述第一电极在所述基板上的正投影之内，所述连接块在所述基板上的正投影与所述第一电极在所述基板上的正投影至少部分错位设置。
  3. 根据权利要求1所述的显示面板，其中，所述连接块包括本体部和由所述本体部围合形成的镂空部，所述镂空部在所述基板上的正投影与所述第一发光结构在所述基板上的正投影至少部分交叠设置。
  4. 根据权利要求3所述的显示面板，其中，所述第一发光结构在所述基板上的正投影位于所述镂空部在所述基板上的正投影之内。
  5. 根据权利要求4所述的显示面板，其中，所述第一发光结构在所述基板上的正投影边缘与所述镂空部在所述基板上的正投影边缘之间的距离为0.5μm～1.5μm。
  6. 根据权利要求3所述的显示面板，其中，所述本体部在所述基板上的正投影与所述第一电极在所述基板上的正投影至少部分交叠设置。
  7. 根据权利要求3所述的显示面板，其中，所述镂空部在所述基板上的正投影位于所述第一电极在所述基板上的正投影之内。
  8. 根据权利要求7所述的显示面板，其中，所述镂空部在所述基板上 的正投影边缘与所述第一电极在所述基板上的正投影边缘之间的距离为1.0μm～3.5μm。
  9. 根据权利要求3所述的显示面板，其中，所述第一电极在所述基板上的正投影位于所述连接块在所述基板上的正投影外边缘围合形成的区域之内。
  10. 根据权利要求9所述的显示面板，其中，所述第一电极在所述基板上的正投影边缘与所述连接块在所述基板上的正投影外边缘之间的距离为1.0μm～3.0μm。
  11. 根据权利要求1所述的显示面板，其中，所述连接块和所述连接线中的至少一者的材料包括透光导电材料。
  12. 根据权利要求11所述的显示面板，其中，所述连接块和所述连接线同层同材料设置，且所述连接块和所述连接线的材料均包括透光材料。
  13. 根据权利要求1所述的显示面板，其中，所述显示面板具有第一显示区和第二显示区，所述第一显示区的透光率大于所述第二显示区的透光率，所述互连结构和所述第一子像素均位于所述第一显示区，所述显示面板还包括位于所述第二显示区的第一驱动电路，所述互连结构通过连接线连接于所述第一驱动电路。
  14. 根据权利要求1所述的显示面板，其中，所述显示面板位于所述第二显示区的第二子像素和用于驱动所述第二子像素显示的第二驱动电路，所述第二子像素包括第三电极、第四电极和位于第三电极和第四电极之间的第二发光结构，各所述第三电极通过信号线直接连接于所述第二驱动电路。
  15. 根据权利要求1所述的显示面板，其中，所述连接线用于连接4个所述连接块，且该四个所述连接块对应的所述第一发光结构具有相同的发光颜色。
  16. 一种显示装置，包括根据权利要求1至15任一项所述的显示面板。
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