WO2023103141A1 - Ldpc解码装置及其方法，低轨道卫星接收设备 - Google Patents

Ldpc解码装置及其方法，低轨道卫星接收设备 Download PDF

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WO2023103141A1
WO2023103141A1 PCT/CN2022/071083 CN2022071083W WO2023103141A1 WO 2023103141 A1 WO2023103141 A1 WO 2023103141A1 CN 2022071083 W CN2022071083 W CN 2022071083W WO 2023103141 A1 WO2023103141 A1 WO 2023103141A1
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soft information
ldpc
decoder
external soft
output
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PCT/CN2022/071083
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English (en)
French (fr)
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朱凯
汪永明
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上海垣信卫星科技有限公司
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1108—Hard decision decoding, e.g. bit flipping, modified or weighted bit flipping
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1128—Judging correct decoding and iterative stopping criteria other than syndrome check and upper limit for decoding iterations
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B7/00—Radio transmission systems, i.e. using radiation field
    • H04B7/14—Relay systems
    • H04B7/15—Active relay systems
    • H04B7/185—Space-based or airborne stations; Stations for satellite systems
    • H04B7/1851—Systems using a satellite or space-based relay
    • H04B7/18517—Transmission equipment in earth stations

Definitions

  • the present disclosure relates to the field of satellite communication, in particular to LDPC decoding technology.
  • Non-Geostationary Orbit (NGSO) satellites or Low Earth Orbit (LEO) satellites are currently a hot communication development direction.
  • the biggest difference between the satellite communication system and the most advanced terrestrial network (such as 5G NR) is that the satellite base station (SBS) is usually located in the earth's orbit, and its orbital altitude is 600-1500km relative to the users on the earth's surface.
  • SBS satellite base station
  • the NGSO satellite is orbiting at a speed of about 7.5km/s, and is connected to the satellite gateway (Satellite Gateway) by a feeder link, and connected to the user terminal on the ground by a feeder link.
  • Access/service link connection (Access/service link), which provides communication services for user terminals.
  • the user terminal can be any terminal with wired or wireless communication functions, including but not limited to, satellite terminal (Satellite terminal), mobile phone, computer, personal digital assistant, game console, wearable device, vehicle communication device, machine type communication (MTC ) devices, device-to-device (D2D) communication devices, and sensors.
  • a user terminal may also be called UE, mobile station, subscriber station, mobile terminal, terminal device or wireless device, among others.
  • FIG. 1b A simplified schematic diagram of the processing performed at a transmitting device 120 and a receiving device 130 of a wireless communication system is shown in Fig. 1b. Satellites, satellite gateways, or user terminals on the ground in FIG.
  • the sending device needs to perform channel coding (140) on the data to be sent to introduce redundancy, so as to resist the transmission channel (such as satellite and ground user terminal Distortion that may be introduced in the link between).
  • the channel-coded data may be further subjected to channel interleaving (150) before being transmitted to rearrange the coded bits before transmission such that successive bits in the data are dispersed.
  • the interleaved data may then be modulated (160).
  • the reverse process to the sending device is performed, ie the received signal is demodulated (170), deinterleaved (180) and decoded (190) to recover the transmitted data.
  • the propagation time of electromagnetic waves between the ground user terminal and the SBS is provided in Table 1. Obviously, the propagation delay of satellite communication system is much higher than that of terrestrial communication system. Longer propagation distances will introduce additional delays accompanied by deterioration of delay jitter, resulting in degraded user experience.
  • SATCOM systems rely more on forward error control techniques, because traditional backward error control, such as retransmission schemes with/without explicit ACK/NACK feedback, will generate intolerable extra delay. Therefore, modern satellite communication standards, such as DVB S2, provide quasi-error-free physical layer (PHY) technology.
  • PHY physical layer
  • the DVB standard specifies the technical characteristics of the physical layer at the transmitter, where advanced forward error control (combining BCH and LDPC codes) is used.
  • the principle is to use powerful LDPC to correct most random errors, and BCH to correct the remaining errors. Therefore, it is obvious that the physical layer performance is mainly determined by the decoding algorithm of LDPC.
  • the problem to be solved in the embodiments of the present disclosure can be summarized as how to improve LDPC decoding to enhance the error correction performance of the physical layer.
  • the purpose of the present disclosure is to provide an LDPC decoding device and method thereof, and low-orbit satellite receiving equipment, which improves LDPC decoding to achieve enhanced physical layer error correction performance.
  • the present disclosure discloses an LDPC decoding device, including: a convolutional decoder and an LDPC decoder coupled to each other, wherein,
  • the convolutional decoder is configured to perform convolutional decoding according to the received channel soft information or the second external soft information from the LDPC decoder, to obtain first external soft information, and output it to the LDPC decoder;
  • the LDPC decoder is configured to perform LDPC decoding according to the first external soft information output by the convolutional decoder to obtain the second external soft information, and when the preset iteration end condition is not satisfied, the The second external soft information is output to the convolutional decoder for iterative decoding, and the second external soft information is output as third external soft information when an iteration end condition is met.
  • the device is used to decode LDPC signals conforming to the digital video broadcasting S2 or S2X standard.
  • the LDPC decoder is configured to output the third external soft information to a hard decision unit for the hard decision unit to output decoded bits.
  • the channel soft information comes from a soft demodulator.
  • the iteration end condition includes that the number of iterations reaches a preset threshold and/or the decoding index reaches a preset threshold.
  • an interleaver and deinterleaver are also included, configured between the convolutional decoder and the LDPC decoder;
  • the interleaving and deinterleaver is configured to deinterleave the first external soft information from the convolutional decoder and output it to the LDPC decoder, and to output the second external soft information from the LDPC decoder The information is interleaved and then output to the convolutional decoder.
  • the channel soft information includes log likelihood ratio or probability
  • the external soft information includes log likelihood ratio or probability
  • the present disclosure also discloses an LDPC decoding method, including:
  • the convolutional decoder receives channel soft information
  • the convolutional decoder performs convolutional decoding according to the channel soft information, and outputs the obtained first external soft information to the LDPC decoder;
  • the LDPC decoder performs LDPC decoding according to the first external soft information output by the convolutional decoder to obtain second external soft information;
  • the LDPC decoder determines that the preset iteration end condition is not satisfied, then output the second external soft information to the convolutional decoder for iterative decoding;
  • the LDPC decoder determines that a preset iteration end condition is met, output the second external soft information as third external soft information.
  • the method is used to decode an LDPC signal conforming to the Digital Video Broadcasting S2 or S2X standard.
  • the hard decision unit performs a hard decision according to the third external soft information output by the LDPC decoder to obtain decoded bits.
  • said outputting the obtained first external soft information to the LDPC decoder further includes:
  • the interleaving and deinterleaver deinterleaves the first external soft information from the convolutional decoder, and outputs the deinterleaved first external soft information to the LDPC decoder;
  • the outputting the second external soft information to the convolutional decoder for iterative decoding further includes:
  • the interleaving and deinterleaver performs interleaving on the second external soft information from the LDPC decoder, and outputs the interleaved second external soft information to the convolutional decoder.
  • the external soft information includes external log-likelihood ratios or probabilities identified in the linear domain
  • the external soft information includes from a soft demodulator.
  • the present disclosure also discloses a low-orbit satellite receiving device, including:
  • the soft demodulator is configured to soft demodulate the signal from the sending end to obtain channel soft information
  • the LDPC decoding device as described above is configured to receive the channel soft information output by the soft demodulator, and output third external soft information;
  • the hard decision unit is configured to perform a hard decision on the third external soft information to obtain decoded bits.
  • the present disclosure also discloses a non-transitory machine-readable medium having computer instructions that, when executed by a hardware processor, cause the hardware processor to perform the operations in the method as described above.
  • the LDPC decoding of the DVB S2/S2X standard has better error correction capability, and the obtained decoding result has a lower error rate, which is especially suitable for low-orbit satellite communication.
  • Figure 1a shows a schematic diagram of NGSO satellite communication
  • Figure 1b shows a simplified schematic diagram of the processing performed at a transmitting device and a receiving device of a wireless communication system
  • FIG. 2 shows a schematic structural diagram of an LDPC decoding device according to an embodiment of the present disclosure
  • FIG. 3 shows a schematic structural diagram of an LDPC decoding device according to an embodiment of the present disclosure
  • FIG. 4 shows a schematic flow diagram of an LDPC decoding method according to an embodiment of the present disclosure
  • FIG. 5 shows a schematic structural diagram of a low-orbit satellite receiving device according to an embodiment of the present disclosure
  • Figure 6 shows a block diagram of a communication device suitable for implementing some embodiments of the present disclosure.
  • DVB Digital Video Broadcasting, Digital Video Broadcasting.
  • BCH Bose-Chaudhuri-Hocquenghem, Bose–Chaudhuri–Hocquenghem.
  • NGSO Non-geostationary orbit, Non-GeoStationary Orbit.
  • GSO Geostationary Orbit, GeoStationary Orbit.
  • LDPC Low Density Parity Check Code, Low Density Parity Check Code.
  • LEO Low Earth Orbit, Low Earth Orbit.
  • LNA Low Noise Amplifier, Low-Noise Amplifier.
  • LLR Log likelihood ratio, Log-Likelihood Ratio.
  • New wireless air interface refers to 5G wireless air interface technology.
  • RAN Radio Access Network, Radio Access Network.
  • FEC Forward Error Control, Forward Error Control.
  • PDU Protocol Data Unit, Protocol Data Unit.
  • PHY physical layer, Physical Layer.
  • LDPC decoder As common knowledge in the art, the decoding of LDPC is of course directly using an LDPC decoder.
  • the inventors of the present disclosure found that for DVB S2/S2X compliant LDPC encoders, it can be equivalently decomposed into a combination of irregular LDPC encoders and convolutional encoders, and according to this inventive finding, DVB compliant
  • the LDPC decoder of the S2/S2X standard is equivalently implemented by a combination of a convolutional decoder and an LDPC decoder.
  • This innovative implementation has better error correction capabilities than the conventional implementation of directly using an LDPC encoder.
  • the resulting decoding result has a lower error rate and is especially suitable for low-orbit satellite communications.
  • the first embodiment of the present disclosure relates to an LDPC decoding device, the structure of which is shown in FIG. 2 , the device includes: a convolutional decoder and an LDPC decoder coupled to each other, wherein,
  • the convolutional decoder is configured to perform convolutional decoding according to the received channel soft information or the second external soft information from the LDPC decoder to obtain the first external soft information and output it to the LDPC decoder.
  • Convolutional decoding can use soft decoding methods such as Viterbi and max-a-posteriori.
  • the LDPC decoder is configured to perform LDPC decoding according to the first external soft information output by the convolutional decoder to obtain the second external soft information, and output the second external soft information to the convolutional decoder when the preset iteration end condition is not satisfied.
  • the decoder performs iterative decoding, and outputs the second external soft information as the third external soft information when the iteration end condition is satisfied.
  • the first extrinsic soft information is forwarded as a prior to the LDPC decoder, which initializes the variable nodes of LDPC and uses various existing iterative LDPC decoding algorithms, such as sum-product, min-sum etc. Compute the second outer LLR/probability.
  • the first level is a plurality of internal iterations inside the LDPC decoder to perform LDPC decoding according to the first external soft information to obtain the second external soft information
  • the second Layer is multiple external iterations between the LDPC encoder and the convolutional decoder to continuously optimize the obtained second external soft information.
  • the final second external soft information is output to the hardware as the third external soft information.
  • Arbiter In one embodiment, the number of internal iterations inside the LDPC coder may be different for each external iteration between the LDPC coder and the convolutional decoder.
  • the LDPC decoder may satisfy the iteration end condition after calculating the second external soft information for the first time. At this time, it may not be necessary to perform external iteration between the LDPC encoder and the convolutional decoder, and directly The second external soft information is output as third external soft information.
  • the device is used to decode LDPC signals conforming to the DVB S2 or S2X standard.
  • the device can also be used to decode LDPC signals similar to DVB S2 or S2X standards.
  • the LDPC decoder outputs the third external soft information to the hard decision unit, so that the hard decision unit outputs decoded bits.
  • the channel soft information comes from a soft demodulator.
  • the soft demodulator receives a complex baseband signal as input, and the corresponding output of demodulation is channel soft information.
  • LNA low noise amplifier
  • the iteration end condition includes that the number of iterations reaches a preset threshold and/or the decoding index reaches a preset threshold.
  • the device further includes an interleaving and deinterleaving unit configured between the convolutional decoder and the LDPC decoder.
  • the interleaving and deinterleaver is configured to deinterleave the first external soft information from the convolutional decoder and output it to the LDPC decoder, and output the second external soft information from the LDPC decoder to the convolutional decoder after interleaving decoder.
  • the interleavers and deinterleavers include interleavers and deinterleavers corresponding to each other.
  • the channel soft information may be a log-likelihood ratio LLR or a probability
  • the external soft information may be a log-likelihood ratio LLR or a probability
  • the LDPC decoding algorithm used by the LDPC decoder can be enhanced.
  • LLR log-likelihood ratio
  • sign(X) indicates the sign or polarity of X
  • min(X,Y) indicates the minimum value between X and Y
  • indicates the magnitude of X
  • exp is an exponential function with the natural constant e as the base
  • ln is the natural logarithmic function
  • the g term can be expressed as
  • Formula 1 since the term g is difficult to use circuits to calculate, Formula 1 usually ignores the operation content of the term g to make a certain simplification, and this simplification will inevitably lead to performance loss. Therefore, by compensating the error between the approximation and the true value of Equation 1, i.e. the g term in Equation 2, is a common way to recover some of the performance loss.
  • Variant 1 The magnitude of f in Equation 1 is calculated using Equation 3, and the polarity of f is determined by the product of all incoming LLR symbols.
  • Variant 2 Formula 1 is approximated as Formula 4, where the additional correction coefficient C is greater than or equal to zero. This method is equivalent to introducing a fixed offset to the approximate calculation result of Equation 1.
  • the optimal value of C can be set empirically.
  • Variant 3 Formula 1 is approximated as Formula 5, where the correction coefficient C is a constant greater than 1. This method is equivalent to reducing the approximate calculation result of Formula 1 proportionally.
  • the optimal value of C can be set empirically.
  • the second enhancement focuses on the scheduling of LDPC decoding, specifically the scheduling of the soft information exchange order when performing variable node updates and check node updates. This approach forms a class of LDPC decoding schemes using “layered decoding”.
  • the second embodiment of the present disclosure relates to an LDPC decoding method, the flow of which is shown in FIG. 4 , the method includes:
  • a convolutional decoder receives channel soft information.
  • the convolutional decoder performs convolutional decoding according to the channel soft information, and outputs the obtained first external soft information to the LDPC decoder.
  • the LDPC decoder performs LDPC decoding according to the first external soft information output by the convolutional decoder to obtain the second external soft information.
  • step 304 the LDPC decoder judges whether the preset iteration end condition is satisfied, if so, enter step 305, output the second external soft information to the convolutional decoder for iterative decoding, return to step 302, otherwise enter Step 305.
  • step 305 the LDPC decoder determines that a preset iteration end condition is satisfied, and outputs the second external soft information as the third external soft information.
  • the method is used to decode an LDPC signal conforming to the digital video broadcasting S2 or S2X standard.
  • the method further includes: a hard decision unit performs a hard decision according to the third external soft information output by the LDPC decoder, to obtain decoded bits.
  • step 301 outputting the obtained first external soft information to the LDPC decoder further includes:
  • the interleaving and deinterleaver performs deinterleaving on the first external soft information from the convolutional decoder, and outputs the deinterleaved first external soft information to the LDPC decoder.
  • step 305 outputting the second external soft information to the convolutional decoder for iterative decoding further includes:
  • the interleaving and deinterleaving unit interleaves the second external soft information from the LDPC decoder, and outputs the interleaved second external soft information to the convolutional decoder.
  • the external soft information includes external log-likelihood ratios or probabilities identified in the linear domain.
  • External soft information includes from the soft demodulator.
  • This embodiment is a method embodiment corresponding to the first embodiment.
  • the technical details in the first embodiment can be applied to this embodiment, and the technical details in this embodiment can also be applied to the first embodiment.
  • the third embodiment of the present disclosure relates to a low-orbit satellite receiving device, which includes:
  • the soft demodulator is configured to soft demodulate the signal from the sending end to obtain channel soft information.
  • the LDPC decoding device is configured to receive the channel soft information output by the soft demodulator, and output the third external soft information.
  • the hard decision unit is configured to make a hard decision on the third external soft information to obtain decoded bits.
  • FIG. 6 shows a block diagram of a communication device 1700 suitable for implementing embodiments of the present disclosure.
  • the device 1700 may be used to implement the sending device or the receiving device in the embodiments of the present disclosure, for example, the low-orbit satellite receiving device shown in FIG. 6 .
  • device 1700 includes a processor 1710 .
  • the processor 1710 controls the operation and functions of the device 1700 .
  • processor 1710 may perform various operations by means of instructions 1730 stored in memory 1720 coupled thereto.
  • Memory 1720 may be of any suitable type suitable for the local technical environment and may be implemented using any suitable data storage technology, including but not limited to semiconductor-based storage devices, magnetic storage devices and systems, optical storage devices and systems. Although only one memory unit is shown in FIG. 6 , there may be multiple physically distinct memory units in device 1700 .
  • Processor 1710 may be of any suitable type suitable for the local technical environment, and may include, but is not limited to, general purpose computers, special purpose computers, microcontrollers, digital signal controllers (DSP), and controller-based multi-core controller architectures. one or more cores.
  • Device 1700 may also include multiple processors 1710 .
  • Processor 1710 may also be coupled to transceiver 1740, which may enable reception and transmission of information by means of one or more antennas 1750 and/or other components.
  • the processor 1710 and the memory 1720 may cooperate to implement the methods described above. It will be understood that all the features described above are applicable to the device 1700 and will not be repeated here.
  • the functions of the modules shown in the implementation of the above-mentioned LDPC decoding device can be realized by a program (executable instruction) running on the processor, or by specific logic circuit is realized.
  • the above-mentioned LDPC decoding device if the above-mentioned LDPC decoding device is realized in the form of a software function module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. Based on this understanding, the essence of the technical solutions of the embodiments of the present disclosure or the part that contributes to the prior art can be embodied in the form of a software product.
  • the computer software product is stored in a storage medium, including several instructions for So that a computer device (which may be a personal computer, a server, or a network device, etc.) executes all or part of the methods described in the various embodiments of the present disclosure.
  • the aforementioned storage medium includes: various media that can store program codes such as U disk, mobile hard disk, read-only memory (ROM, Read Only Memory), magnetic disk or optical disk. As such, embodiments of the present disclosure are not limited to any specific combination of hardware and software.
  • the embodiments of the present disclosure further provide a computer-readable storage medium, in which computer-executable instructions are stored, and when the computer-executable instructions are executed by a processor, various method embodiments of the present disclosure are implemented.
  • Computer-readable storage media includes both volatile and non-permanent, removable and non-removable media by any method or technology for storage of information.
  • Information may be computer readable instructions, data structures, modules of a program, or other data.
  • Examples of storage media for computers include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read only memory (ROM), Electrically Erasable Programmable Read-Only Memory (EEPROM), Flash memory or other memory technology, Compact Disc Read-Only Memory (CD-ROM), Digital Versatile Disc (DVD) or other optical storage, A magnetic tape cartridge, disk storage or other magnetic storage device or any other non-transmission medium that can be used to store information that can be accessed by a computing device.
  • computer-readable storage media does not include transitory computer-readable media, such as modulated data signals and carrier waves.
  • the embodiments of the present disclosure also provide an LDPC decoding device, which includes a memory for storing computer-executable instructions, and a processor; Steps in a method embodiment.
  • the processor can be a central processing unit (Central Processing Unit, referred to as "CPU"), and can also be other general-purpose processors, digital signal processors (Digital Signal Processor, referred to as "DSP"), application specific integrated circuits (Application Specific Integrated Circuit, referred to as "ASIC”) and so on.
  • the foregoing memory may be read-only memory (read-only memory, referred to as "ROM”), random access memory (random access memory, referred to as "RAM”), flash memory (Flash), hard disk or solid-state disk, and the like.
  • the steps of the methods disclosed in the various embodiments of the present invention can be directly implemented by a hardware processor, or implemented by a combination of hardware and software modules in the processor.
  • embodiments of the present disclosure may also be described in the context of machine-executable instructions, such as program modules included in a device executed on a real or virtual processor of a target.
  • program modules include routines, programs, libraries, objects, classes, components, data structures, etc. that perform particular tasks or implement particular abstract data structures.
  • the functionality of the program modules may be combined or divided between the described program modules.
  • Machine-executable instructions for program modules may be executed locally or in distributed devices. In a distributed device, program modules may be located in both local and remote storage media.
  • Computer program codes for implementing the methods of the present disclosure may be written in one or more programming languages. These computer program codes can be provided to processors of general-purpose computers, special-purpose computers, or other programmable data processing devices, so that when the program codes are executed by the computer or other programmable data processing devices, The functions/operations specified in are implemented.
  • the program code may execute entirely on the computer, partly on the computer, as a stand-alone software package, partly on the computer and partly on a remote computer or entirely on the remote computer or server.
  • an action refers to at least performing the action based on the element, which includes two situations: performing the action only based on the element, and performing the action based on the element and other elements the behavior.
  • Expressions such as multiple, multiple, and multiple include 2, 2 times, 2 types, and 2 or more, 2 or more times, or 2 or more types.
  • sequence numbers used when describing the steps of the method do not in themselves constitute any limitation on the order of these steps.
  • a step with a large sequence number does not necessarily have to be executed after a step with a small sequence number, it may also be executed first and then a step with a small sequence number, or may be executed in parallel, as long as this execution sequence is easy for those skilled in the art Just say it's reasonable.
  • a plurality of steps with consecutive serial numbers does not limit other steps that can be executed therebetween, for example, there may be other steps between step 301 and step 302.

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Abstract

本公开涉及卫星通信领域，公开了一种LDPC解码装置及其方法，低轨道卫星接收设备，改进了LDPC解码以实现增强的物理层纠错性能。该解码装置包括：相互耦合的卷积解码器和LDPC解码器，其中，卷积解码器被配置为根据收到的信道软信息或来自LDPC解码器的第二外部软信息进行卷积解码，得到第一外部软信息，输出给LDPC解码器；LDPC解码器被配置为根据卷积解码器输出的第一外部软信息进行LDPC解码，得到第二外部软信息，当不满足预先设定的迭代结束条件时将第二外部软信息输出给卷积解码器进行迭代解码，当满足迭代结束条件时将第二外部软信息作为第三外部软信息输出。

Description

LDPC解码装置及其方法，低轨道卫星接收设备 技术领域
本公开涉及卫星通信领域，特别涉及LDPC解码技术。
背景技术
本部分旨在为权利要求书中陈述的本公开的实施方式提供背景或上下文。此处的描述不因为包括在本部分中就承认是已被公开的现有技术。
非地球静止轨道(NGSO)卫星或低地球轨道(LEO)卫星是当前的一个热点通信发展方向。卫星通信系统与最先进的地面网络(如5G NR)的最大区别在于，卫星基站(SBS)通常位于地球轨道上，相对于地球表面的用户，其轨道高度为600-1500km。
如图1a所示，NGSO卫星以大约7.5km/s的速度在轨道上运行，与卫星信关站(Satellite Gateway)之间以馈电链路(Feeder link)连接，与地面上的用户终端以接入/服务链路连接(Access/service link)，为用户终端提供通信服务。用户终端可以是具有有线或者无线通信功能的任何终端，包括但不限于，卫星终端(Satellite terminal)、手机、计算机、个人数字助理、游戏机、可穿戴设备、车载通信设备、机器类型通信(MTC)设备、设备到设备(D2D)通信设备、以及传感器等。用户终端也可以被称为UE、移动站、订户站、移动终端、终端设备或无线设备等。
在图1b中示出在无线通信系统的发送设备120和接收设备130处执行的处理的简化示意图。图1a中的卫星、卫星信关站、或地面上的用户终端可充当发送设备120和/或接收设备130。
如图1b所示，为了保证数据(包括控制信令)的可靠传送，发送设备要将待发送的数据进行信道编码(140)以引入冗余，以对抗在传输信道(例如卫星和地面用户终端之间的链路)中可能引入的失真。此外，经信道编码的数据在被发送前可以进一步地进行信道交织(150)，以在传输之前将编码比特进行重新排列，使得数据中的相继比特被分散。经交织的数据然后可以被调制(160)。在接收设备处，执行与发送设备相反的过程，即，接收的信号经过解调(170)、解交织(180)和解码(190)以恢复出被发送的数据。
表1中提供了电磁波在地面用户终端和SBS之间的传播时间。显然，卫星通信系统的传播时延比地面通信系统要高得多。更远的传播距离会引入额外的延迟并伴随时延抖动的恶化，从而导致用户体验下降。
表1 平台高度和单向传播延迟
平台 典型高度 传播延迟
LEO卫星 600km ～12.9ms
GSO卫星 35 786km ～270ms
在这种情况下，卫星通信系统更依赖前向差错控制技术，因为传统的后向差错控制，例如具有/不具有显式ACK/NACK反馈的重传方案，将产生不可容忍的额外延迟。因此，现代卫星通信标准，例如DVB S2，提供了准无差错物理层(PHY)的技术。
近年来，地面网络运营商预见到了用LEO卫星网络取代光纤和电缆以实现中继和回程传输的巨大机会。如何提供类似光纤的服务质量已成为低轨卫星系统设计中需要解决的重要技术问题。
DVB标准规定了发射机端的物理层技术特性，其中使用了先进的前向差错控制(结合了BCH和LDPC码)。其原理是使用强大的LDPC纠正大多数随机错误，并由BCH来纠正剩余错误。因此，很明显，物理层性能主要 由LDPC的解码算法决定。
因此，本公开的实施例需要解决的问题可以概括为如何改进LDPC解码以增强物理层纠错性能。
发明内容
本公开的目的在于提供一种LDPC解码装置及其方法，低轨道卫星接收设备，改进了LDPC解码以实现增强的物理层纠错性能。
本公开公开了一种，LDPC解码装置，包括：相互耦合的卷积解码器和LDPC解码器，其中，
所述卷积解码器被配置为根据收到的信道软信息或来自所述LDPC解码器的第二外部软信息进行卷积解码，得到第一外部软信息，输出给所述LDPC解码器；
所述LDPC解码器被配置为根据所述卷积解码器输出的所述第一外部软信息进行LDPC解码，得到所述第二外部软信息，当不满足预先设定的迭代结束条件时将所述第二外部软信息输出给所述卷积解码器进行迭代解码，当满足迭代结束条件时将所述第二外部软信息作为第三外部软信息输出。
在一个优选例中，该装置用于对符合数字视频广播S2或S2X标准的LDPC信号进行解码。
在一个优选例中，所述LDPC解码器被配置为将所述第三外部软信息输出到硬判决器，供该硬判决器输出解码后的比特。
在一个优选例中，所述信道软信息来自软解调器。
在一个优选例中，所述迭代结束条件包括迭代次数达到预设的阈值和 /或解码指标达到预设的阈值。
在一个优选例中，还包括交织和反交织器，配置在所述卷积解码器和所述LDPC解码器之间；
所述交织和反交织器被配置为对来自所述卷积解码器的第一外部软信息进行反交织后输出给所述LDPC解码器，以及，对来自所述LDPC解码器的第二外部软信息进行交织后输出给所述卷积解码器。
在一个优选例中，所述信道软信息包括对数似然比或概率，所述外部软信息包括对数似然比或概率。
本公开还公开了一种LDPC解码方法，包括：
卷积解码器接收信道软信息；
所述卷积解码器根据所述信道软信息进行卷积解码，将得到的第一外部软信息输出给LDPC解码器；
所述LDPC解码器根据所述卷积解码器输出的所述第一外部软信息进行LDPC解码，得到第二外部软信息；
如果所述LDPC解码器确定未满足预先设定的迭代结束条件，则将所述第二外部软信息输出给所述卷积解码器进行迭代解码；
如果所述LDPC解码器确定满足预先设定的迭代结束条件，则将所述第二外部软信息作为第三外部软信息输出。
在一个优选例中，所述方法用于对符合数字视频广播S2或S2X标准的LDPC信号进行解码。
在一个优选例中，还包括，硬判决器根据所述LDPC解码器输出的第三外部软信息进行硬判决，得到解码后的比特。
在一个优选例中，所述将得到的第一外部软信息输出给LDPC解码器 进一步包括：
交织和反交织器对来自所述卷积解码器的第一外部软信息进行反交织，将反交织后的第一外部软信息输出给所述LDPC解码器；
所述将所述第二外部软信息输出给所述卷积解码器进行迭代解码进一步包括：
所述交织和反交织器对来自所述LDPC解码器的第二外部软信息进行交织，将交织后的第二外部软信息输出给所述卷积解码器。
在一个优选例中，所述外部软信息包括线性域中标识的外部对数似然比或概率；
所述外部软信息包括来自软解调器。
本公开还公开了一种低轨道卫星接收设备，包括：
软解调器，被配置为对来自发送端的信号进行软解调，得到信道软信息；
如前文描述的LDPC解码装置，被配置为接收所述软解调器输出的信道软信息，并输出第三外部软信息；
硬判决器，被配置为对所述第三外部软信息进行硬判决，得到解码后的比特。
本公开还公开了一种具有计算机指令的非暂时性机器可读介质，当所述计算机指令由硬件处理器执行时，使所述硬件处理器执行如前文描述的方法中的操作。
本公开的实施方式中，对于DVB S2/S2X标准的LDPC解码有更好的纠错能力，所得到的解码结果错误率更低，尤为适合应用于低轨道卫星通信。
上述发明内容中公开的各个技术特征、在下文各个实施方式和例子中 公开的各技术特征、以及附图中公开的各个技术特征，都可以自由地互相组合，从而构成各种新的技术方案(这些技术方案均应该视为在本说明书中已经记载)，除非这种技术特征的组合在技术上是不可行的。例如，在一个例子中公开了特征A+B+C，在另一个例子中公开了特征A+B+D+E，而特征C和D是起到相同作用的等同技术手段，技术上只要择一使用即可，不可能同时采用，特征E技术上可以与特征C相组合，则，A+B+C+D的方案因技术不可行而应当不被视为已经记载，而A+B+C+E的方案应当视为已经被记载。
附图说明
从下文的公开内容和权利要求中，本发明的目的、优点和其他特征将变得更加明显。这里仅出于示例的目的，参考附图来给出优选实施例的非限制性描述，在附图中：
图1a示出了NGSO卫星通信的示意图；
图1b示出了无线通信系统的发送设备和接收设备处执行的处理的简化示意图；
图2示出了根据本公开一个实施例的LDPC解码装置的结构示意图；
图3示出了根据本公开一个实施例的LDPC解码装置的结构示意图；
图4示出了根据本公开一个实施例的LDPC解码方法的流程示意图；
图5示出了根据本公开一个实施例的低轨道卫星接收设备的结构示意图；
图6示出了适合实现本公开的一些实施例的通信设备的框图。
具体实施方式
在以下的叙述中，为了使读者更好地理解本公开而提出了许多技术细节。但是，本领域的普通技术人员可以理解，即使没有这些技术细节和基于以下各实施方式的种种变化和修改，也可以实现本公开所要求保护的技术方案。
部分缩略语的说明：
DVB：数字视频广播，Digital Video Broadcasting。
BCH：博斯-乔赫里-霍克文黑姆码，Bose–Chaudhuri–Hocquenghem。
NGSO：非地球静止轨道，Non-GeoStationary Orbit。
GSO：地球静止轨道，GeoStationary Orbit。
LDPC：低密度奇偶校验码，Low Density Parity Check Code。
LEO：近地轨道，Low Earth Orbit。
LNA：低噪声放大器，Low-Noise Amplifier。
LLR：对数似然比，Log-Likelihood Ratio。
NR：新无线空口，New Radio，指5G的无线空口技术。
RAN：无线接入网，Radio Access Network。
FEC：前向差错控制，Forward Error Control。
PDU：协议数据单元，Protocol Data Unit。
PHY：物理层，Physical Layer。
下面概要说明本公开的实施方式的部分创新点：
作为本领域的公知常识，LDPC的解码当然是直接使用LDPC解码器。 然而，本公开的发明人发现，对于符合DVB S2/S2X标准的LDPC编码器，可以等效地分解成非规则LDPC编码器和卷积编码器的组合，根据这个创造性的发现，可以将符合DVB S2/S2X标准的LDPC解码器通过卷积解码器和LDPC解码器的组合来等效地实现，这种创新的实现方式相对于直接使用LDPC编码器的常规实现方式有更好的纠错能力，所得到的解码结果错误率更低，尤为适合应用于低轨道卫星通信。
为使本公开的目的、技术方案和优点更加清楚，下面将结合附图对本公开的实施方式作进一步地详细描述。
本公开的第一实施方式涉及一种LDPC解码装置，其结构如图2所示，该装置包括：相互耦合的卷积解码器和LDPC解码器，其中，
卷积解码器被配置为根据收到的信道软信息或来自LDPC解码器的第二外部软信息进行卷积解码，得到第一外部软信息，输出给LDPC解码器。卷积解码可以使用Viterbi、max-a-posteriori等软解码方法。
LDPC解码器被配置为根据卷积解码器输出的第一外部软信息进行LDPC解码，得到第二外部软信息，当不满足预先设定的迭代结束条件时将第二外部软信息输出给卷积解码器进行迭代解码，当满足迭代结束条件时将第二外部软信息作为第三外部软信息输出。在一个实施例中，第一外部软信息作为先验转发给LDPC解码器，该解码器初始化LDPC的可变节点，并使用各种现有的迭代LDPC解码算法，例如sum-product、min-sum等，计算第二外部LLR/概率。
在一个实施例中，该解码装置中存在两个层次的迭代：第一层是LDPC解码器内部的多次内部迭代，以根据第一外部软信息进行LDPC解码得到第二外部软信息；第二层是LDPC加码器和卷积解码器之间的多次外部迭代，以不断优化所得到的第二外部软信息，迭代结束时最后的第二外部软信息就作为第三外部软信息输出给硬判决器。在一个实施例中，LDPC加 码器和卷积解码器之间的每一次外部迭代中，LDPC加码器内部的内部迭代次数可以是不同的。
在一些特殊情况下，可能LDPC解码器在第一次解算出第二外部软信息后就满足了迭代结束条件，此时可能不需要进行LDPC加码器和卷积解码器之间的外部迭代，直接将第二外部软信息作为第三外部软信息输出。
可选的，在一个实施例中，该装置被用于对符合DVB S2或S2X标准的LDPC信号进行解码。可选的，在另一些实施例中，该装置也可以用于对类似DVB S2或S2X标准的LDPC信号进行解码。
可选的，在一个实施例中，LDPC解码器将第三外部软信息输出到硬判决器，供该硬判决器输出解码后的比特。
可选的，在一个实施例中，信道软信息来自软解调器。软解调器接收复数基带信号作为输入，解调的相应输出是信道软信息。在解调之前可以存在时间和频率同步操作，复数基带信号可以在进入解调器之前通过低噪声放大器(LNA)进行滤波和放大。同步操作、滤波和放大等是现有技术，这里不进行详细说明了。
可选的，在一个实施例中，迭代结束条件包括迭代次数达到预设的阈值和/或解码指标达到预设的阈值。
可选的，在一个实施例中，该装置还包括交织和反交织器，配置在卷积解码器和LDPC解码器之间。交织和反交织器被配置为对来自卷积解码器的第一外部软信息进行反交织后输出给LDPC解码器，以及，对来自LDPC解码器的第二外部软信息进行交织后输出给卷积解码器。如图3所示，交织和反交织器包括相互对应的交织器和反交织器。
可选的，在一个实施例中，信道软信息可以是对数似然比LLR或概率，外部软信息可以是对数似然比LLR或概率。
可选的，在一个实施例中，LDPC解码器所使用的LDPC解码算法可以进行增强。
一种增强是众所周知的“最小和”(‘min-sum’)算法中使用的对数似然比(LLR)的各种附加后处理，这可以导致多种变体。
具体地说，假设A＝ln(a),B＝ln(b)是LLR，上述‘min-sum’算法在对数域中执行了以下近似：
Figure PCTCN2022071083-appb-000001
其中，sign(X)表示取X的符号或极性，min(X,Y)表示X和Y之间的最小值，|X|表示X的幅度,exp是以自然常数e为底的指数函数，ln是自然对数函数，g项可以表示为
g＝ln(1+exp(-|A+B|))-ln(1+exp(-|A-B|))     (2)
在实现中，由于g项难以使用电路进行计算，因此公式1通常忽略g项的运算内容从而进行一定的简化，这种简化必然招致性能损失。因此，通过补偿近似值与公式1的真值之间的误差，即公式2中的g项，是一种常见的恢复部分性能损失的方法。
变体1：公式1中f的幅度用公式3计算，f的极性则根据所有传入的LLR符号的乘积决定。
Figure PCTCN2022071083-appb-000002
变体2：公式1被近似为公式4，其中的附加修正系数C大于等于0。这种方法等效于对公式1的近似计算结果引入一个固定的偏移量。C的最佳值可以根据经验设定。
f≈sign(A)sign(B)max(min(|A|,|B|)-C,0)     (4)
变体3：公式1被近似为公式5，其中的修正系数C为大于1的常数，这种方法等效于对公式1的近似计算结果按比例进行了缩小。C的最佳值可以根据经验设定。
f≈sign(A)sign(B)min(|A|,|B|)/C       (5)
第二种增强侧重于LDPC解码的调度，确切地说是执行可变节点更新和检查节点更新时软信息交换顺序的调度，这种方法形成了一类使用“分层解码”的LDPC解码方案。
本公开的第二实施方式涉及一种LDPC解码方法，其流程如图4所示，该方法包括：
在步骤301中，卷积解码器接收信道软信息。
此后进入步骤302，卷积解码器根据信道软信息进行卷积解码，将得到的第一外部软信息输出给LDPC解码器。
此后进入步骤303，LDPC解码器根据卷积解码器输出的第一外部软信息进行LDPC解码，得到第二外部软信息。
此后进入步骤304，LDPC解码器判断预先设定的迭代结束条件是否被满足，如果是则进入步骤305，将第二外部软信息输出给卷积解码器进行迭代解码，回到步骤302，否则进入步骤305。
在步骤305中，LDPC解码器确定满足预先设定的迭代结束条件，将第二外部软信息作为第三外部软信息输出。
可选的，在一个实施例中，该方法用于对符合数字视频广播S2或S2X标准的LDPC信号进行解码。
可选的，在一个实施例中，在步骤306之后还包括：硬判决器根据LDPC解码器输出的第三外部软信息进行硬判决，得到解码后的比特。
可选的，在一个实施例中，步骤301中，将得到的第一外部软信息输出给LDPC解码器进一步包括：
交织和反交织器对来自卷积解码器的第一外部软信息进行反交织，将反交织后的第一外部软信息输出给LDPC解码器。
步骤305中，将第二外部软信息输出给卷积解码器进行迭代解码进一步包括：
交织和反交织器对来自LDPC解码器的第二外部软信息进行交织，将交织后的第二外部软信息输出给卷积解码器。
可选的，在一个实施例中，外部软信息包括线性域中标识的外部对数似然比或概率。外部软信息包括来自软解调器。
本实施方式是与第一实施方式相对应的方法实施方式，第一实施方式中的技术细节可以应用于本实施方式，本实施方式中的技术细节也可以应用于第一实施方式。
本公开的第三实施方式涉及一种低轨道卫星接收设备，其包括：
软解调器，被配置为对来自发送端的信号进行软解调，得到信道软信息。
如第一实施方式所述的LDPC解码装置，被配置为接收软解调器输出的信道软信息，并输出第三外部软信息。
硬判决器，被配置为对第三外部软信息进行硬判决，得到解码后的比特。
图6示出了适合实现本公开的实施例的通信设备1700的框图。设备 1700可以用来实现本公开的实施例中的发送设备或者接收设备，例如图6所示的低轨道卫星接收设备。
如图6中的示例所示，设备1700包括处理器1710。处理器1710控制设备1700的操作和功能。例如，在某些实施例中，处理器1710可以借助于与其耦合的存储器1720中所存储的指令1730来执行各种操作。存储器1720可以是适用于本地技术环境的任何合适的类型，并且可以利用任何合适的数据存储技术来实现，包括但不限于基于半导体的存储器件、磁存储器件和系统、光存储器件和系统。尽管图6中仅仅示出了一个存储器单元，但是在设备1700中可以有多个物理不同的存储器单元。
处理器1710可以是适用于本地技术环境的任何合适的类型，并且可以包括但不限于通用计算机、专用计算机、微控制器、数字信号控制器(DSP)以及基于控制器的多核控制器架构中的一个或多个核。设备1700也可以包括多个处理器1710。处理器1710还可以与收发器1740耦合，收发器1740可以借助于一个或多个天线1750和/或其他部件来实现信息的接收和发送。
根据本公开的实施例，处理器1710和存储器1720可以配合操作，以实现上文描述的方法。将会理解，上文描述的所有特征均适用于设备1700，在此不再赘述。
需要说明的是，本领域技术人员应当理解，上述LDPC解码装置的实施方式中所示的各模块的功能可通过运行于处理器上的程序(可执行指令)而实现，也可通过具体的逻辑电路而实现。本公开的实施例中，上述LDPC解码装置如果以软件功能模块的形式实现并作为独立的产品销售或使用时，也可以存储在一个计算机可读取存储介质中。基于这样的理解，本公开的实施例的技术方案本质上或者说对现有技术做出贡献的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包 括若干指令用以使得一台计算机设备(可以是个人计算机、服务器、或者网络设备等)执行本公开的各个实施例所述方法的全部或部分。而前述的存储介质包括：U盘、移动硬盘、只读存储器(ROM，Read Only Memory)、磁碟或者光盘等各种可以存储程序代码的介质。这样，本公开的实施例不限制于任何特定的硬件和软件结合。
相应地，本公开的实施方式还提供一种计算机可读存储介质，其中存储有计算机可执行指令，该计算机可执行指令被处理器执行时实现本公开的各方法实施方式。计算机可读存储介质包括永久性和非永久性、可移动和非可移动媒体可以由任何方法或技术来实现信息存储。信息可以是计算机可读指令、数据结构、程序的模块或其他数据。计算机的存储介质的例子包括但不限于，相变内存(PRAM)、静态随机存取存储器(SRAM)、动态随机存取存储器(DRAM)、其他类型的随机存取存储器(RAM)、只读存储器(ROM)、电可擦除可编程只读存储器(EEPROM)、快闪记忆体或其他内存技术、只读光盘只读存储器(CD-ROM)、数字多功能光盘(DVD)或其他光学存储、磁盒式磁带，磁盘存储或其他磁性存储设备或任何其他非传输介质，可用于存储可以被计算设备访问的信息。按照本文中的界定，计算机可读存储介质不包括暂存电脑可读媒体(transitory media)，如调制的数据信号和载波。
此外，本公开的实施方式还提供一种LDPC解码装置，其中包括用于存储计算机可执行指令的存储器，以及，处理器；该处理器用于在执行该存储器中的计算机可执行指令时实现上述各方法实施方式中的步骤。其中，该处理器可以是中央处理单元(Central Processing Unit，简称“CPU”)，还可以是其他通用处理器、数字信号处理器(Digital Signal Processor，简称“DSP”)、专用集成电路(Application Specific Integrated Circuit，简称“ASIC”)等。前述的存储器可以是只读存储器(read-only memory，简称“ROM”)、随机存取存储器(random access memory，简称“RAM”)、 快闪存储器(Flash)、硬盘或者固态硬盘等。本发明各实施方式所公开的方法的步骤可以直接体现为硬件处理器执行完成，或者用处理器中的硬件及软件模块组合执行完成。
作为示例，本公开的实施例也可以在机器可执行指令的上下文中被描述，机器可执行指令诸如包括在目标的真实或者虚拟处理器上的器件中执行的程序模块中。一般而言，程序模块包括例程、程序、库、对象、类、组件、数据结构等，其执行特定的任务或者实现特定的抽象数据结构。在各实施例中，程序模块的功能可以在所描述的程序模块之间合并或者分割。用于程序模块的机器可执行指令可以在本地或者分布式设备内执行。在分布式设备中，程序模块可以位于本地和远程存储介质二者中。
用于实现本公开的方法的计算机程序代码可以用一种或多种编程语言编写。这些计算机程序代码可以提供给通用计算机、专用计算机或其他可编程的数据处理装置的处理器，使得程序代码在被计算机或其他可编程的数据处理装置执行的时候，引起在流程图和/或框图中规定的功能/操作被实施。程序代码可以完全在计算机上、部分在计算机上、作为独立的软件包、部分在计算机上且部分在远程计算机上或完全在远程计算机或服务器上执行。
需要说明的是，在本公开中，诸如第一和第二等之类的关系术语仅仅用来将一个实体或者操作与另一个实体或操作区分开来，而不一定要求或者暗示这些实体或操作之间存在任何这种实际的关系或者顺序。而且，术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含，从而使得包括一系列要素的过程、方法、物品或者设备不仅包括那些要素，而且还包括没有明确列出的其他要素，或者是还包括为这种过程、方法、物品或者设备所固有的要素。在没有更多限制的情况下，由语句“包括一个”限定的要素，并不排除在包括所述要素的过程、方法、物品或者设备中还存在另外的相同要素。本公开中，如果提到根据某要素执行某行为， 则是指至少根据该要素执行该行为的意思，其中包括了两种情况：仅根据该要素执行该行为、和根据该要素和其它要素执行该行为。多个、多次、多种等表达包括2个、2次、2种以及2个以上、2次以上、2种以上。
在描述方法的步骤时使用的序号本身并不对这些步骤的顺序构成任何的限定。例如，序号大的步骤并非一定要在序号小的步骤之后执行，也可以是先执行序号大的步骤再执行序号小的步骤，还可以是并行执行，只要这种执行顺序对于本领域技术人员来说是合理的即可。又如，拥有连续编号序号的多个步骤(例如步骤301，步骤302，步骤303等)并不限制其他步骤可以在其间执行，例如步骤301和步骤302之间可以有其他的步骤。
本说明书包括本文所描述的各种实施例的组合。对实施例的单独提及(例如“一个实施例”或“一些实施例”或“优选实施例”)；然而，除非指示为是互斥的或者本领域技术人员很清楚是互斥的，否则这些实施例并不互斥。应当注意的是，除非上下文另外明确指示或者要求，否则在本说明书中以非排他性的意义使用“或者”一词。
在本说明书提及的所有文献都被认为是整体性地包括在本公开的公开内容中，以便在必要时可以作为修改的依据。此外应理解，以上所述仅为本说明书的较佳实施例而已，并非用于限定本说明书的保护范围。凡在本说明书一个或多个实施例的精神和原则之内，所作的任何修改、等同替换、改进等，均应包含在本说明书一个或多个实施例的保护范围之内。
在一些情况下，在权利要求书中记载的动作或步骤可以按照不同于实施例中的顺序来执行并且仍然可以实现期望的结果。另外，在附图中描绘的过程不一定要求示出的特定顺序或者连续顺序才能实现期望的结果。在某些实施方式中，多任务处理和并行处理也是可以的或者可能是有利的。

Claims (14)

  1. 一种LDPC解码装置，其特征在于，包括：相互耦合的卷积解码器和LDPC解码器，其中，
    所述卷积解码器被配置为根据收到的信道软信息或来自所述LDPC解码器的第二外部软信息进行卷积解码，得到第一外部软信息，输出给所述LDPC解码器；
    所述LDPC解码器被配置为根据所述卷积解码器输出的所述第一外部软信息进行LDPC解码，得到所述第二外部软信息，当不满足预先设定的迭代结束条件时将所述第二外部软信息输出给所述卷积解码器进行迭代解码，当满足迭代结束条件时将所述第二外部软信息作为第三外部软信息输出。
  2. 如权利要求1所述的LDPC解码装置，其特征在于，该装置用于对符合数字视频广播S2或S2X标准的LDPC信号进行解码。
  3. 如权利要求1所述的LDPC解码装置，其特征在于，所述LDPC解码器被配置为将所述第三外部软信息输出到硬判决器，供该硬判决器输出解码后的比特。
  4. 如权利要求1所述的LDPC解码装置，其特征在于，所述信道软信息来自软解调器。
  5. 如权利要求1所述的LDPC解码装置，其特征在于，所述迭代结束条件包括迭代次数达到预设的阈值和/或解码指标达到预设的阈值。
  6. 如权利要求1所述的LDPC解码装置，其特征在于，还包括交织和反交织器，配置在所述卷积解码器和所述LDPC解码器之间；
    所述交织和反交织器被配置为对来自所述卷积解码器的第一外部软信息进行反交织后输出给所述LDPC解码器，以及，对来自所述LDPC解码 器的第二外部软信息进行交织后输出给所述卷积解码器。
  7. 如权利要求1-6中任意一项所述的LDPC解码装置，其特征在于，所述信道软信息包括对数似然比或概率，所述外部软信息包括对数似然比或概率。
  8. 一种LDPC解码方法，其特征在于，包括：
    卷积解码器接收信道软信息；
    所述卷积解码器根据所述信道软信息进行卷积解码，将得到的第一外部软信息输出给LDPC解码器；
    所述LDPC解码器根据所述卷积解码器输出的所述第一外部软信息进行LDPC解码，得到第二外部软信息；
    如果所述LDPC解码器确定未满足预先设定的迭代结束条件，则将所述第二外部软信息输出给所述卷积解码器进行迭代解码；
    如果所述LDPC解码器确定满足预先设定的迭代结束条件，则将所述第二外部软信息作为第三外部软信息输出。
  9. 如权利要求8所述的LDPC解码方法，其特征在于，所述方法用于对符合数字视频广播S2或S2X标准的LDPC信号进行解码。
  10. 如权利要求8所述的LDPC解码方法，其特征在于，还包括，硬判决器根据所述LDPC解码器输出的第三外部软信息进行硬判决，得到解码后的比特。
  11. 如权利要求8所述的LDPC解码方法，其特征在于，所述将得到的第一外部软信息输出给LDPC解码器进一步包括：
    交织和反交织器对来自所述卷积解码器的第一外部软信息进行反交织，将反交织后的第一外部软信息输出给所述LDPC解码器；
    所述将所述第二外部软信息输出给所述卷积解码器进行迭代解码进一步包括：
    所述交织和反交织器对来自所述LDPC解码器的第二外部软信息进行交织，将交织后的第二外部软信息输出给所述卷积解码器。
  12. 如权利要求8所述的LDPC解码方法，其特征在于，所述外部软信息包括线性域中标识的外部对数似然比或概率；
    所述外部软信息包括来自软解调器。
  13. 一种低轨道卫星接收设备，其特征在于，包括：
    软解调器，被配置为对来自发送端的信号进行软解调，得到信道软信息；
    如权利要求1-7中任意一项所述的LDPC解码装置，被配置为接收所述软解调器输出的信道软信息，并输出第三外部软信息；
    硬判决器，被配置为对所述第三外部软信息进行硬判决，得到解码后的比特。
  14. 一种具有计算机指令的非暂时性机器可读介质，其特征在于，当所述计算机指令由硬件处理器执行时，使所述硬件处理器执行如权利要求8至12中任意一项所述的方法中的操作。
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