WO2023102606A1

WO2023102606A1 - Method of fabricating membranes

Info

Publication number: WO2023102606A1
Application number: PCT/AU2022/051466
Authority: WO
Inventors: Shankar DUTT; Christian NOTTHOFF; Patrick Kluth
Original assignee: Australian National University
Priority date: 2021-12-07
Filing date: 2022-12-07
Publication date: 2023-06-15

Abstract

A method of producing a supported membrane of a material, the method including the steps: (a) providing a supported membrane preform including: i. a substrate having a front side and a back side; ii. a layer of membrane material on the front side of the substrate; and iii. a mask layer on the back side of the substrate; (b) using lithography to transfer an etch pattern on the mask layer of the preform to expose a selected central portion, and protect a selected peripheral portion, of the back side of the substrate; (c) etching the exposed selected central portion of the back side of the substrate until a lower boundary surface of the layer of membrane material is reached, so that the layer of membrane material forms a membrane that is supported by the unetched peripheral portions of the substrate.

Description

METHOD OF FABRICATING MEMBRANES

TECHNICAL FIELD

This disclosure relates to a method of fabricating membranes. This disclosure particularly relates to a method of fabricating supported membranes. The disclosure also relates to a membrane fabricated with a method disclosed herein.

BACKGROUND

A membrane is a selective barrier that allows some things, such as molecules or ions, to pass through but prevents others from passing through.

One common application for a membrane is as a filter. However, membranes are not only used for filtration. The applications of membrane technology are manifold. Membranes can find application in a variety of biomedical and material science applications. Membranes can be, for example, used in X-ray microscopy, TEM windows, opto-mechanical studies, Synchrotron-based imaging and scattering experiments, X-ray transmission windows, nanopore fabrication, electron tomography, cell culture studies using XRF technique, and many more applications.

Some applications, such as for example nanopore fabrication, require the use of supported, or free-standing, membranes. An example of membranes used for the fabrication of nanopores can be found in applicant’s co-pending provisional patent application entitled “A Method of Fabricating Nanopores”.

Additionally, the membrane’s composition, size and shape requirements depend on the intended function and application of the membrane.

There is accordingly a need for a method that enables the fabrication of supported membranes having a variety of material compositions. There is also a need for a method of fabricating supported membranes that has acceptable scalability and repeatability.

It is to be understood that, if any prior art is referred to herein, such reference does not constitute an admission that the prior art forms a part of the common general knowledge in the art, in Australia or any other country.

SUMMARY

In a first aspect there is disclosed a method of producing a supported membrane of a material, the method including the steps:

(a) providing a supported membrane preform including: i. a substrate having a front side and a back side; ii. a layer of membrane material on the front side of the substrate; and iii. a mask layer on the back side of the substrate;

(b) using lithography to transfer an etch pattern on the mask layer of the preform to expose a selected central portion, and protect a selected peripheral portion, of the back side of the substrate;

(c) etching the exposed selected central portion of the back side of the substrate until a lower boundary surface of the layer of membrane material is reached, so that the layer of membrane material forms a membrane that is supported by the unetched peripheral portion of the substrate.

In a second aspect there is disclosed a method of producing a supported membrane of a material, the method including the following steps:

(a) forming a supported membrane preform by: i. providing a substrate having a front side and a back side; ii. forming a layer of membrane material on the front side of the substrate; iii. forming a mask layer on the back side of the substrate; (b) using lithography to transfer an etch pattern on the mask layer to expose a selected central portion, and protect selected peripheral portions, of the back side of the substrate;

(c) etching the exposed selected central portion of the back side of the substrate until an inner boundary surface of the layer of membrane material is reached, so that the layer of material forms a membrane that is supported by unetched peripheral portions of the substrate.

The combination of lithography and etching provides a low cost and versatile method of fabricating membranes having a variety of shapes and sizes that can be tailored according to the application requirement.

In step (b), lithography is used to transfer an etch pattern on the mask layer to expose a selected central portion, and protect selected peripheral portions, of the back side of the substrate. The selected central portion of the mask layer may be exposed by dry etching (such as by using reactive ion etching) until a lower boundary surface of the substrate is reached.

In some embodiments, the etching step (c), of selectively removing the exposed selected central portion of the back side of the substrate, comprises wet etching. In some embodiments, the wet etching is performed with an alkaline etchant. In one embodiment the alkaline etchant is KOH. In another embodiment the alkaline etchant is TMAH. In some embodiment, the wet etching is performed with ethylene diamine pyrocatechol. In other embodiments, the wet etching is performed with an aqueous solution of ethylene diamine pyrocatechol (EDP). However, any other suitable etchant can be used.

In some embodiments, the etching step (c) is multi-stage. The multi-stage etching step (c) may comprise sequential etching by two or more different etching solutions. For example, the etching step (c) may comprise a first etching stage performed with an alkaline etchant followed by a second etching stage performed with an acidic etchant. In this embodiment, the alkaline etchant may comprise a hydroxide, such as TMAH. The acidic etchant may comprise hydrofluoric acid (HF). The second etching stage may comprise sequential etching using progressively more dilute etchants in order to control the rate of etching.

In some embodiments, the etching comprises treating (such as by dipping) the preform with an etching solution for the time required to remove the exposed selected central portion of the back side of the substrate until an inner boundary surface of the layer of membrane material is reached. The etching time depends on the type of material and thickness of the substrate and the type of etchant used.

In an embodiment, the thickness of the substrate may be a minimum of 0.1 mm. In another embodiment, the thickness of the substrate may be a minimum of 0.3 mm. In yet another embodiment, the thickness of the substrate may be a minimum of 0.5 mm. In one embodiment, the thickness of the substrate may be a maximum of 0.8 mm. In another embodiment, the thickness of the substrate may be a maximum of 1 mm.

In an embodiment, the etching time may be a minimum of one hour. In another embodiment the etching time may be a minimum of 3 hours. In yet another embodiment, the etching time may be a minimum of 10 hour. In yet another embodiment, the etching time may be a minimum of 20 hour. In yet another embodiment, the etching time may be a minimum of 40 hour. In one embodiment, the etching time may be a maximum of 72 hour. In another embodiment, the etching time may be a maximum of 100 hours

The concentration of the etchant may be a minimum of 1% (weight per volume). In an embodiment, the concentration may be a minimum of 5% (weight per volume). In an embodiment, the concentration may be a minimum of 10% (weight per volume). In an embodiment, the concentration may be a minimum of 20 % (weight per volume). In an embodiment, the concentration may be a maximum of 45% (weight per volume). In an embodiment, the concentration may be a maximum of 40% (weight per volume). In an embodiment, the concentration may be a maximum of 35% (weight per volume). In an embodiment, the concentration may be a maximum of 30% (weight per volume).

The etchant may be an aqueous solution. The aqueous solution may include a small amount of an alcohol to reduce roughness of the etched material. In an embodiment, the concentration of alcohol may be the saturation state of the alcohol in the aqueous solution, which in turn depends on the concentration of etchant itself. In another embodiment, the concentration of alcohol in the aqueous solution may be a minimum of 1% (volume per volume). In yet another embodiment, the concentration of alcohol in the aqueous solution may be a minimum of 3% (volume per volume). In yet another embodiment, the concentration of alcohol in the aqueous solution may be a minimum of 5% (volume per volume).

In one embodiment, the alcohol may comprise iso-propanol. In another embodiment, the alcohol may comprise ethanol.

The etching step may be conducted at an elevated temperature (i.e., a temperature above ambient temperature). In an embodiment, the temperature of etching may be at least 30°C. In an embodiment, the temperature of etching may be at least 40°C. In an embodiment, the temperature of etching may be at least 50°C. In an embodiment, the temperature of etching may be at least 60°C. In an embodiment, the temperature of etching may be at least 70°C. In an embodiment, the temperature of etching may be at least 80°C. In an embodiment, the temperature of etching may be the boiling point of solution. In an embodiment, the temperature of etching may be a maximum of 100 °C. In an embodiment, the temperature of etching may be a maximum of 90 °C.

The temperature of etching can be adjusted in accordance with the etchant concentration and/or the composition of the substrate.

The etching step (c) may further comprise dry etching.

In some embodiments, the preform includes a protective layer between the substrate and the layer of membrane material.

In some embodiments, the protective layer comprises a material that has a slower etch rate than the substrate. In one embodiment, the substrate has an etch rate at least 12,500 times the etch rate of the protective layer. In another embodiment, the material of the substrate has an etch rate at least 25,000 times the etch rate of the protective layer. Therefore, the protective layer acts as a shield for the layer of membrane material during the etching step, thereby safeguarding the integrity thereof.

In one embodiment the protective layer comprises silicon nitride. In another embodiment the protective layer comprises silicon oxide. In yet another embodiment, the protective layer comprises silicon oxynitride. In yet another embodiment, the protective layer comprises a combination of any one or more of silicon nitride, silicon oxide and silicon oxynitride. In yet another embodiment, the protective layer comprises highly p-doped Si. In yet another embodiment, the protective layer comprises GeSi.

In some embodiments, the protective layer is formed by thermal oxidation of the surface of the substrate. Where the substrate comprises silicon, the thermal oxidation of its surface forms silicon oxide. In some embodiments, the protective layer may instead be deposited using plasma enhanced chemical vapor deposition (PECVD) and/or low-pressure chemical vapor deposition (LPCVD). For the case of PECVD, one side of the substrate may be coated at a time. In the case of LPCVD, the deposition may happen on both sides of the substrate.

In some other embodiments, the protective layer may instead be deposited using Atomic Layer Deposition (ALD), Metal-Organic Chemical Vapor Deposition (MOCVD), Sputtering, Flame Spray Pyrolysis and/or molecular beam epitaxy (MBE).

In some embodiments, the method further comprises forming an additional protective layer on top of the layer of membrane material.

The additional protective layer comprises a material that has slower etch rate than the substrate. In one embodiment, the substrate has an etch rate higher than 12,500 times the etch rate of the additional protective layer. In another embodiment, the substrate has an etch rate higher than 25,000 times the etch rate of the additional protective layer. Therefore, the additional protective layer acts as a further shield for the layer of membrane material during the etching step, thereby further safeguarding the integrity thereof.

In one embodiment the additional protective layer comprises silicon nitride. In another embodiment the additional protective layer comprises silicon oxide. In yet another embodiment, the additional protective layer comprises silicon oxynitride. In yet another embodiment, the additional protective layer comprises a combination of any one or more of silicon nitride, silicon oxide and silicon oxynitride. In yet another embodiment, the additional protective layer comprises highly p-doped Si. In yet another embodiment, the additional protective layer comprises GeSi. Forming an additional protective layer on top of the layer of membrane material may comprise depositing the additional protective layer using PECVD and/or LPCVD. For the case of PECVD, one side of the wafer is coated at a time, while for LPCVD, the deposition happens on both side of the wafer.

In some other embodiments, the additional protective layer may instead be deposited using Atomic Layer Deposition (ALD), Metal-Organic Chemical Vapor Deposition (MOCVD), Sputtering, Flame Spray Pyrolysis and/or molecular beam epitaxy (MBE).

In some embodiments, etching the exposed selected central portion of the back side of the substrate (c) includes two sub-steps: (i) a first etching sub-step in which the exposed selected central portion of the back side of the substrate is etched until the lower boundary surface of the protective layer is reached, and (ii) a second etching sub-step in which the exposed protective layer is etched until the lower boundary surface of the layer of membrane material is reached.

In one embodiment, the sub-step (i) comprises wet-etching. Wet etching in substep (i) may advantageously allow a relatively rapid rate of removal of the substrate as compared with dry etching.

In one embodiment, the sub-step (ii) comprises wet-etching. Wet etching may be used in sub- step (ii) if the etchant used would not adversely affect the membrane material. Alternatively, wet etching may be used in sub- step (ii) if it is desired to reduce the overall thickness of the membrane.

The wet etchants used in sub-steps (i) and (ii) may have different compositions and/or different concentrations.

In one embodiment, the sub-step (ii) comprises dry-etching. Dry etching may be used in sub- step (ii) where wet etching would be likely to adversely affect the membrane material. The method steps may be conducted sequentially, with each step being performed in order. However, in some embodiments, the method steps may be performed non- sequentially. In one embodiment, the step of forming a layer of the membrane material on the front side of the substrate (step (a) (ii)) may be performed between the etching sub-steps (c) (i) and (c) (ii). In this embodiment, the protective layer is formed on the front side of the substrate and the mask layer is formed on the back side of the substrate. Lithography is used to transfer an etch pattern on the mask layer to expose a selected central portion, and protect selected peripheral portions, of the back side of the substrate. Wet etching of the substrate is conducted until the inner (or lower) boundary surface of the protective layer is reached. A layer of the membrane material is then formed on the outer boundary surface of the protective layer. The dry etching step may then be performed on the exposed inner boundary surface of the protective layer until the lower boundary surface of the layer of membrane material is reached and exposed.

In the embodiments where sub-step (i) comprises wet-etching, the wet etching sub-step may be performed as described above. In particular, in some embodiments, the etching comprises treating (such as by dipping) the preform with an etching solution for the time required to remove the exposed selected central portion of the back side of the substrate until an inner boundary surface of the layer of membrane material is reached. The etching time depends on the type of material and thickness of the substrate and the type of etchant used. In some embodiments, typically when the substrate is a silicon wafer of 0.3 mm, the etching time is approximately 3 hours. In other embodiments, typically when the substrate is a silicon wafer of 0.5 mm the etching time is approximately 72 hours.

The etchant may be an aqueous solution. The aqueous solution may include a small amount of an alcohol to reduce roughness of the etched material. In an embodiment, the concentration of alcohol may be the saturation state of the alcohol in the aqueous solution, which in turns depend on the concentration of etchant itself. In another embodiment, the concentration of alcohol in the aqueous solution may be a minimum of 1% (volume per volume). In yet another embodiment, the concentration of alcohol in the aqueous solution may be a minimum of 3% (volume per volume). In yet another embodiment, the concentration of alcohol in the aqueous solution may be a minimum of 5% (volume per volume).

The concentration of the etchant may be a minimum of 0.5 % (weight per volume). In an embodiment, the concentration may be a minimum of 1% (weight per volume). In an embodiment, the concentration may be a minimum of 5% (weight per volume). In an embodiment, the concentration may be a minimum of 10% (weight per volume). In an embodiment, the concentration may be a minimum of 20 % (weight per volume).

In an embodiment, the concentration of etchant may be a maximum of 45% (weight per volume). In an embodiment, the concentration may be a maximum of 40% (weight per volume). In an embodiment, the concentration may be a maximum of 35% (weight per volume). In an embodiment, the concentration may be a maximum of 30% (weight per volume).

The wet-etching step may include sequential use of more than one concentration of an etchant. For example, where the etching step (c) comprises two or more substeps, one or more etching sub-step (ii) may comprise sequential treatment of the protective layer and/or membrane layer with acidic solutions of progressively lower concentration, in order to control the rate of etching.

The etching step may be conducted at an elevated temperature (ie, a temperature above ambient temperature). In an embodiment, the temperature of etching may be at least 30°C. In an embodiment, the temperature of etching may be at least 40°C. In an embodiment, the temperature of etching may be at least 50°C. In an embodiment, the temperature of etching may be at least 60°C. In an embodiment, the temperature of etching may be at least 70°C. In an embodiment, the temperature of etching may be at least 80°C. In an embodiment, the temperature of etching may be at least 85°C.

In an embodiment, the temperature of etching may be the boiling point of solution. In an embodiment, the temperature of etching may be a maximum of 100 °C. In an embodiment, the temperature of etching may be a maximum of 90 °C.

In some embodiments, dry etching comprises reactive ion etching. In one embodiment, reactive ion etching may be conducted using fluoroform (CHF3) gas. In another embodiment, reactive ion etching may be conducted using CH4/CHF3 gas. In yet another embodiment, reactive ion etching may be conducted using CF4/H2 gas. However, any other suitable gas can be used.

Using a combination of wet etching and dry etching, enables good overall control over the rate of etching while allowing finer scale etching closer to the layer of membrane material. The combined etching process thereby allows for the fabrication of membranes with a variety of material compositions, including those that would otherwise have low resistance to wet etchants.

The material composition of the layer of membrane material is discussed in more detailed below.

The exposed selected central portion of the back side of the substrate is typically selectively removed by wet etching. The substrate material has a higher etch rate than the protective layer and is, hence, less resistant to the wet etchant than the protective layer. Accordingly, treatment of the substrate material with the wet etchant results in a relatively high rate of etching of the substrate. The protective layer, on the other end, has a lower sensitivity to wet etching. Accordingly, when the etchant solution reaches the protective layer, the etching rate slows or stops, thereby safeguarding the layer of material that will form the membrane.

As a consequence, the method disclosed herein allows for the fabrication of membranes comprising a range of material compositions, including materials sensitive to wet etching.

Dry etching, such as reactive ion etching, can be used to remove the protective layer without damaging the underlying layer of material. Reactive ion etching is a highly controllable process that can process a wide variety of materials, including semiconductors, dielectrics and some metals. Reactive ion etching enables high resolution removal of the protective layer, thereby assuring that the integrity of the layer of membrane material is maintained.

In some embodiments, the protective layer may be instead removed by wet etching in sub-step (ii). Wet etching in sub-step (ii) may be used, for example, where it is desired to reduce the thickness of the membrane either by itself or together with the protective layer. In an embodiment, the wet etchant may be applied to the exposed protective layer only. In another embodiment, the wet etchant may be applied to the exposed protective layer together with the upper (or outer) surface of the membrane material.

In some embodiments, forming a layer of the membrane material on the front side of the substrate comprises depositing the material using PECVD and/or LPCVD. In some other embodiments, the layer of the membrane material may instead be deposited using Atomic Layer Deposition (ALD), Metal-Organic Chemical Vapor Deposition (MOCVD), Sputtering, Flame Spray Pyrolysis and/or molecular beam epitaxy (MBE). In some embodiments, forming a mask layer on the back side of the substrate comprises depositing the mask layer using PECVD and/or LPCVD.|In some other embodiments, the mask layer may instead be deposited using Atomic Layer Deposition (ALD), Metal-Organic Chemical Vapor Deposition (MOCVD), Sputtering, Flame Spray Pyrolysis and/or molecular beam epitaxy (MBE).

In some embodiments, the mask layer on the back side of the substrate has the same composition as the layer of material.

In some embodiments, the mask layer on the back side of the substrate has the same composition as the protective layer.

In some embodiments, the mask layer on the back side of the substrate has the same composition as the additional protective layer.

In one embodiment, the substrate is a silicon wafer. In other embodiments the substrate is formed by any one or more of Gallium Nitride, Silicon Carbide, sapphire and quartz.

In some embodiments, the layer of membrane material is formed by thermal oxidation of the surface of the silicon wafer.

The composition of the layer of membrane material may comprise one or more amorphous inorganic materials. Amorphous solids/materials are non-crystalline solids, i.e. the atoms/molecules in the solid are not organised in any repeatable pattern.

The composition of the layer of membrane material may be silicon based. The composition of the layer of membrane material may comprise amorphous silicon.

The composition of the layer of membrane material may comprise one or more inorganic oxide materials.

The composition of the layer of membrane material may comprise one or more of the following:

• silicon oxide,

• silicon nitride,

• silicon oxynitride,

• hafnium oxide,

• hafnium silicon oxide,

• aluminium oxide,

• titanium oxide,

• zirconium oxide, and

• tin oxide.

The layer of membrane material may comprise diamond. The diamond may be present as a film. The film may be fabricated by forming a free-standing membrane (support layer) of a material (such as silicon nitride) according to the present method, then spin coating the membrane with nano-diamonds which are then grown into a diamond layer. The silicon nitride support layer is subsequently removed by acid etching.

In some embodiments, the layer of membrane material comprises metal-organic frameworks. Metal-organic frameworks are hybrid porous materials with porosity in the angstrom-scale region. The resulting metal-organic framework membranes can be used for gas separation as well as ion-separation applications. The present disclosure focusses on the formation of silicon-based membranes. Of particular interest are silicon oxides, silicon nitrides and silicon oxynitrides. Silicon dioxide, silicon nitride and silicon oxynitride are important inorganic materials known for their outstanding mechanical properties and use in Si microelectronics. Owing to their properties such as excellent mechanical and chemical resistance, high-temperature endurance, high density, negligible leakage currents, etc., the silicon dioxide and silicon oxynitride membranes are exceptional candidates to be used as chemical and/or biological sensors. Silicon oxynitrides have a wide use for optical sensors as well.

Where the membrane comprises a silicon nitride, it may comprise a near- stoichiometric SixNy (x~3 and y~4).

Silicon oxynitride is an amorphous material whose composition varies between silicon dioxide and silicon nitride. It is an exciting material for many optical sensing applications as a large number of its properties can be varied by varying the oxygen and/or nitrogen content. By changing the ratio of oxygen to nitrogen content, the refractive index of the films can be easily tuned from 1.45 to 2.1. This property is highly usable for bio-optical sensors.

In some embodiments, where the substrate is a silicon wafer, the layer of membrane material may comprise thermal oxides (ie, silicon oxide produced by thermal oxidation). Alternatively, thermal oxides formed on the surface of the silicon wafer may be used as a substrate for deposition of a range of materials.

In some embodiments, the layer of membrane material is a single layer formed by a single material composition.

In some other embodiments, the layer of membrane material is multilayered. The layer of membrane material may comprise two or more sublayers having different compositions. The layers may comprise silicon, silicon oxide and/or silicon oxynitride.

In some embodiments, the layer of membrane material is a composite material. A composite material is a material formed by combining two or more materials with different physical and/or chemical properties. The resulting composite material exhibits physical and/or chemical characteristics different from those of the individual material components.

In some embodiments, the layer of membrane material is a combination of one or more amorphous inorganic materials and nanoparticles. The resulting membranes have many applications in optical and opto-electronic devices and can be used to manipulate light- matter interactions.

In some embodiments, the layer of membrane material is a combination of one or more silicon based inorganic materials and nanoparticles.

In some embodiments, the layer of membrane material is a combination of one or more inorganic oxide materials and nanoparticles.

The nanoparticles may be inorganic nanoparticles.

The nanoparticles may be metal nanoparticles. In one embodiment, the nanoparticles are gold nanoparticles. In another embodiment, the nanoparticles are silver nanoparticles. In yet another embodiment, the nanoparticles are copper nanoparticles.

The nanoparticles may have a spherical shape and/or an elongated shape. In some embodiments, the layer of membrane material comprises one type of metal nanoparticles. In other embodiments the layer of membrane material comprises two or more types of metal nanoparticles.

In some embodiments, the nanoparticles are dispersed in the layer of membrane material. In other embodiments, the nanoparticles are provided (such as by being embedded) between two layers of any one of the above-mentioned materials.

In some embodiments, the layer of membrane material comprises an inorganic oxide and gold nanoparticles. In another embodiment, the layer of membrane material comprises silicon oxide and gold nanoparticles. In another embodiment, the layer of membrane material comprises silicon nitride and gold nanoparticles.

In another embodiment, the layer of membrane material comprises silicon oxynitride and gold nanoparticles.

In an embodiment, the layer of membrane material comprises a doped layer between layers of one or more inorganic oxides. The layer of membrane material may comprise a layer of doped silicon as a sandwich layer between layers of one or more inorganic oxides. The inorganic oxides may comprise silicon oxide and/or silicon oxynitride. In some embodiments a layer of doped silicon is deposited between layers of silicon oxide and/or silicon oxynitride using sputtering deposition. In other embodiments, a layer of undoped silicon or any other semiconductor is deposited between layers of silicon oxide and/or silicon oxynitride using sputtering deposition and then doped to the required levels using ion-implanters or other methods. The resulting membranes can be used for the fabrication of gated nanopore membranes as disclosed in applicant’s co-pending provisional patent application entitled “A Method of Fabricating Nanopores”.

The composition of the material may also be varied. For example, the stoichiometry and density of PECVD grown silicon dioxide membranes may be varied. Further, where the membrane comprises silicon oxynitride, by changing the ratio of oxygen to nitrogen content, the refractive index of the films can be tuned from 1.45 to 2.1.

The thickness of the layer of membrane material will depend on the intended function and application of the membrane. For instance, when the membrane is used for nanopore membrane fabrication, a thinner membrane (< 100 nm) is more suitable for DNA and protein sensing applications while a thicker membrane is more suitable for filtration purposes, where the membrane is required to withstand the fluid pressure. In an embodiment, the membrane thickness is less than 50 nm, such as less than 30 nm. The membrane thickness may be as low as 1 nm, such as 1.5 nm or higher. Relatively thin membranes provide a greater signal-to-noise ratio (SNR), and larger capture radius compared to thicker membranes and are often perceived as a prerequisite for more captivating sequencing efforts. With nanopore technology being driven more towards sequencing — may it be genomic or proteomic — fabricating thin membranes has become more desirable for high- resolution measurements.

The layer of material may have a thickness of up to 10 pm. The layer of material may have a thickness of at least 5 nm.

As mentioned above, the thickness of the layer of membrane material may be reduced during the etching step of the production method. Accordingly, the original thickness of the layer of membrane material formed on or applied to the substrate and/or protective layer may be higher than the ultimate thickness of the supported membrane produced by the process.

In an embodiment, the layer of material has a surface area of up to 25 mm². The minimum surface area may be at least 0.0001 mm². In another aspect there is disclosed a method of producing a supported membrane of a material, the method including the steps:

(a) providing a supported membrane preform including: i. a substrate having a front side and a back side; ii. a protective layer on the front side of the substrate, the protective layer having inner and outer boundary surfaces; and iii. a mask layer on the back side of the substrate;

(c) etching the exposed selected central portion of the back side of the substrate until the inner boundary surface of the protective layer is reached;

(d) applying a layer of the membrane material to the outer boundary surface of the protective layer, the layer of membrane material including an inner surface;

(e) further etching the protective layer to expose the inner surface of the layer of membrane material to form a membrane that is supported by the unetched peripheral portion of the substrate.

In yet another aspect there is disclosed a method of producing a supported membrane of a material, the method including the steps:

(a) providing a supported membrane preform including: i. a substrate having a front side and a back side; ii. a protective layer on the front side of the substrate, the protective layer having inner and outer boundary surfaces; iii. a mask layer on the back side of the substrate;

(b) applying a layer of the membrane material to the outer boundary surface of the protective layer, the layer of membrane material including an inner surface and an outer surface; (c) providing an additional protective layer to the outer surface of the layer of membrane material;

(d) using lithography to transfer an etch pattern on the mask layer of the preform to expose a selected central portion, and protect a selected peripheral portion, of the back side of the substrate;

(e) etching the exposed selected central portion of the back side of the substrate until a lower boundary surface of the protective layer is reached;

(f) etching the additional protective layer and the protective layer to expose the outer surface and the inner surface, respectively, of the layer of membrane material to form a membrane that is supported by the unetched peripheral portion of the substrate.

In yet another aspect there is disclosed a method of producing a supported membrane of a material, the method including the following steps:

(a) forming a supported membrane preform by: i. providing a substrate having a front side and a back side; ii. providing a protective layer on the front side of the substrate, the protective layer having inner and outer boundary surfaces iii. applying a layer of the membrane material to the outer boundary surface of the protective layer, the layer of membrane material including an inner surface; iv. providing an additional protective layer to the outer surface of the layer of membrane material; and v. forming a mask layer on the back side of the substrate;

(b) using lithography to transfer an etch pattern on the mask layer to expose a selected central portion, and protect selected peripheral portions, of the back side of the substrate;

(c) etching the exposed selected central portion of the back side of the substrate until a lower boundary surface of the protective layer is reached; (d) etching the additional protective layer and the protective layer to expose the outer surface and the inner surface, respectively, of the layer of membrane material to form a membrane that is supported by the unetched peripheral portion of the substrate.

The method of any of the aspects set out above may further include reducing the overall thickness of the membrane material by etching. In an embodiment, the overall thickness of the membrane material is reduced by etching with an acidic solution, such as HF. In an embodiment, the overall thickness of the membrane material is reduced by etching with consecutively more dilute solutions of an acid, such as HF. Where the layer of membrane material is CVD diamond the overall thickness of the membrane material may instead be reduced using inductively coupled reactive ion etching.

According to another aspect, there is provided a membrane fabricated using the method of any one of the embodiments described above.

According to a further aspect, there is provided a supported membrane that is supported peripherally by one or more supports.

BRIEF DESCRIPTION OF THE DRAWINGS

Embodiments will now be described by way of example only, with reference to the accompanying drawings in which:

Figures 1 (a)-(e) are a schematic diagram showing embodiments of the fabrication process disclosed herein.

Figures 2 (a) -(d) are Optical Microscopy Images of embodiments of the membrane disclosed herein. Figure 3 is photograph of a grid of SiC>2 membranes on a Si wafer fabricated according to an embodiment of the fabrication process disclosed herein (right side). Enlarged front and back views of one of the membranes are shown on the left side of the figure.

DETAILED DESCRIPTION

In the following detailed description, reference is made to accompanying drawings which form a part of the detailed description. The illustrative embodiments described in the detailed description, depicted in the drawings and defined in the claims, are not intended to be limiting. Other embodiments may be utilised and other changes may be made without departing from the spirit or scope of the subject matter presented. It will be readily understood that the aspects of the present disclosure, as generally described herein and illustrated in the drawings can be arranged, substituted, combined, separated and designed in a wide variety of different configurations, all of which are contemplated in this disclosure.

Referring firstly to Figure 1(a) to (e), a schematic diagram shows five embodiments of the fabrication process of a supported (free-standing) membrane according to the method disclosed herein.

Referring to Figure 1(a), a supported membrane preform is produced by the following steps:

(1) A layer of SiNx is deposited on the front side (protective layer) and on the back side (mask layer) of a double sided polished Si wafer using PECVD and/or LPCVD.

(2) The layer of material that will form the membrane is then deposited on the front side of the Si wafer above the deposited SiNx using PECVD and/or LPCVD. (3) An additional layer of SiNx (additional protective layer) is deposited on the front side of the Si wafer above the layer of material using PECVD and/or LPCVD.

The resulting supported membrane preform is then treated as follows:

Using lithography, an etch pattern is transferred on the mask layer to expose a selected central portion and to protect selected peripheral portions of the back side of the silicon wafer.

The selected central portion of the mask layer is dry etched using reactive ion etching until a lower boundary surface of the silicon wafer is reached.

The resulting exposed selected central portion of the back side of the substrate is etched using KOH until a lower boundary surface of the protective layer is reached. The protective layer and the additional protective layer protect the layer of membrane material during the etching process.

The resulting exposed central portion of the protective layer and the additional layer are dry etched, using reactive ion etching, until the lower boundary surface of the layer of membrane material is reached, so that the layer of membrane material forms a membrane that is supported by unetched peripheral portions of the substrate.

This method is particularly advantageous for the fabrication of membranes that are highly sensitive to etching solutions.

Referring to Figure 1(b), a supported membrane preform is produced by depositing a layer of SiNx on the front side and on the back side of a double sided polished Si wafer using PECVD and/or LPCVD. The layer of SiNx on the back side is a mask layer. The layer of SiNx on the front side may form a membrane layer or a protective layer, depending on the particular application.

The resulting supported membrane preform is then treated as follows:

Using lithography an etch pattern is transferred on the mask layer to expose a selected central portion and protect selected peripheral portions of the back side of the silicon wafer.

The resulting exposed selected central portion of the back side of the substrate is wet etched using KOH until a lower boundary surface of the SiNx layer is reached.

If the desired membrane material is SiNx, the process may be stopped here.

However, if an alternative membrane material is desired, particularly one that has low resistance to wet etchants, the SiNx layer has the function of being a protective layer and the method continues with the following additional steps.

The layer of material that will eventually form the membrane is then deposited on the outer surface of the protective layer using PECVD and/or LPCVD.

The exposed lower (or inner) boundary surface of the protective layer is dry etched, using reactive ion etching, until the lower boundary surface of the layer of material is reached, so that the layer of material forms a membrane that is supported by unetched peripheral portions of the substrate. Referring to Figure 1(c), a layer of thermal oxide is formed on the front side and on the back side (mask layer) of a double sided polished Si wafer using thermal annealing.

The resulting exposed selected central portion of the back side of the substrate is etched using TMAH until a lower boundary surface of thermal oxide is reached, thereby forming a free-standing SiCh membrane.

If a membrane of a different material or composition is desired, the thermal oxide can act as a supporting and/or protective layer for the deposition of any other material that can be deposited using any chemical or physical deposition method.

After the deposition of the desired layer of membrane material, the exposed central portion of the lower (inner) boundary surface of the thermal oxide is dry etched, using reactive ion etching, until the lower boundary surface of the layer of membrane material is reached, so that the layer of material forms a membrane that is supported by unetched peripheral portions of the substrate.

Referring to Figure 1(d), a process flow is shown illustrating the steps for the fabrication of a CVD diamond membrane. The process flow is similar to the process flow of Figure 1(b). Both sides of a <l-0-0> double-sided polished Si wafer were coated using LPCVD deposition of silicon nitride. Then, using optical lithography, RIE and anisotropic etching using KOH/TMAH, a free-standing membrane of silicon nitride was fabricated. The free-standing membrane fabricated this way was used as a base for the fabrication of a CVD diamond thin film. For the deposition of the diamond thin film, a high-concentration seed diamond (nano-diamond) solution was used, and the membrane was spin-coated with these nano-diamonds. Then utilising a micro wave plasma chemical vapour deposition process, the nano-diamonds were grown into a closed layer of approximately 1.5 pm thickness. The growth was done in a hydrogen gas atmosphere with 1% methane gas at 45 Torr under 900W power. This resulted in a membrane comprising a diamond thin film deposited on a silicon nitride supporting underlayer.

To reduce the thickness of the membrane, the membrane was etched using inductively coupled reactive ion etching in the presence of oxygen and SFe. Once the thickness of the membrane was reduced to the required dimensions, the silicon nitride underlayer was etched using 2.5 % hydrofluoric acid. This lead to the fabrication of a free-standing diamond membranes. In the process, diamond membranes can be grown using different CVD processes as well.

Referring to Figure 1(e), a process flow is shown illustrating the steps for the fabrication of an ultrathin silicon nitride membrane with a thermal SiO underlayer. Similar to the process flow of Figure 1(c), a layer of thermal SiOi is formed on the front side and on the back side of a double sided polished <l-0-0> Si wafer using thermal annealing. A layer of Si_xN_y is then deposited on each layer of thermal oxide using LPCVD. The thermal oxide can act as supporting and/or protective layers for the deposition of the layers of SiNx. The layer of SiNx on the back side is a mask layer. The layer of SiNx on the front side forms a membrane layer. A photoresist coating is applied to the mask layer and, using lithography, an etch pattern is transferred on the mask layer to expose a selected central portion and to protect selected peripheral portions of the mask layer. The selected central portion of the mask layer is dry etched using reactive ion etching until a lower boundary surface of the silicon wafer is reached. The resulting exposed selected central portion of the back side of the substrate is then etched using TMAH until a lower boundary surface of thermal oxide layer is reached thereby forming a freestanding SiCh. and SiNx layered membrane. The membrane is then treated with hydrofluoric acid solutions to etch the SiCh layer and reduce the thickness of the membrane in a controlled manner through consecutive etching with HF of different concentrations.

Figure 2 (a) -(d) are optical microscopy images of four membranes of different sizes fabricated according to the method disclosed herein: (a) 20 pm x 20 pm, (b) 100 pm x 100 pm, (c) 200 pm x 200 pm, (d) 350 pm x 350 pm. These images show that the method according to the present disclosure is versatile and scalable.

The surface area and the thickness of the membrane can be tailored according to the membrane intended application.

Figure 3 is photograph of a grid of SiCh membranes on a Si wafer fabricated according to the method disclosed herein (right side), with enlarged front and back views of one of the membranes shown on the left side of the figure.

The membranes are each supported on a silicon frame (shown as the dark perimeter on the back view), are uniformly distributed on the Si wafer and are fabricated with high precision and repeatability.

Examples

Non-limiting Examples of the method of producing a supported membrane of a material will now be described. In the following Examples, the seem (standard cubic centimeters per minute) values are defined at a temperature of 273.15 K and a pressure of 1013.25 hPa (according to National Institute of Standards and Technology (NIST) and Physikalisch-Technische Bundesanstalt (PTB)).

Example 1: Manufacture of SiOx membrane using PECVD A layer of SiO_x was deposited on the front side and on the back side (mask layer) of a double sided polished Si wafer using PECVD. The deposition was carried out at 650°C. The flow rate of silane (SiH4) gas, nitrogen (N2) gas and nitrous oxide (N2O) gas was maintained at 14 seem, 270 seem and 710 seem respectively during deposition. Radio Frequency (RF) power was maintained at 20W during the deposition. A chamber pressure of 650 mTorr was kept during deposition.

Using lithography an etch pattern was transferred on the mask layer to expose a selected central portion and protect selected peripheral portions of the back side of the silicon wafer.

The selected central portion of the mask layer was dry etched using reactive ion etching until a lower boundary surface of the silicon wafer was reached.

The resulting exposed selected central portion of the back side of the Si wafer was etched using TMAH until a lower boundary surface of the SiO_x was reached, thereby forming a free-standing SiCF membrane.

Example 2: Manufacture of SiNx membrane using PECVD

A layer of SiN_x was deposited on the front side and on the back side (mask layer) of a double sided polished Si wafer using PECVD. The deposition was carried out at 650°C. The flow rate of silane (SiFU) gas, nitrogen (N2) gas and ammonia (NH3) gas was maintained at 14 seem, 980 seem and 14 seem respectively during deposition. RF power was maintained at 30W during the deposition. Chamber pressure of 650 mTorr was kept during deposition.

Using lithography an etch pattern was transferred on the mask layer to expose a selected central portion and protect selected peripheral portions of the back side of the silicon wafer. The selected central portion of the mask layer was dry etched using reactive ion etching until a lower boundary surface of the silicon wafer was reached.

The resulting exposed selected central portion of the back side of the Si wafer was etched using KOH until a lower boundary surface of the SiN_x was reached, thereby forming a free-standing SiN_x membrane.

Example 3: Manufacture of SiNx membrane using LPCVD

A layer of SiN_x was deposited on the front side and on the back side (mask layer) of a double sided polished Si wafer using LPCVD. The deposition was carried out at 775°C. The flow rate of 30 seem of dichloro silane (H2SiCh) gas and 120 seem of ammonia (NH3) was maintained during deposition. Chamber pressure of 300 mTorr was kept during deposition.

Example 4: Manufacture of membrane using PECVD/LPCVD and a SiN_x protective layer

A layer of SiN_x was deposited on the front side (protective layer) and on the back side (mask layer) of a double sided polished Si wafer using PECVD and/or LPCVD. The deposition was carried out as outlined in Examples 1 and 2. A layer of SiO_x/SiO_xN_y was then deposited on the front side of the Si wafer above the deposited SiN_x using PECVD and/or LPCVD.

An additional layer of SiN_x (additional protective layer) was then deposited on the front side of the Si wafer above the layer of SiO_x/SiO_xN_y using PECVD and/or LPCVD.

The resulting exposed selected central portion of the back side of the Si wafer was etched using KOH until a lower boundary surface of the SiN_x protective layer was reached. The SiN_x protective layer has a slower etch rate than the Si wafer, thereby allowing for selective removal of the substrate and protection of the layer of membrane material.

The etch rates of the SiN_x protective layers under different conditions were measured and exemplary results are provided in Table I below:

Table I

By comparison, the etch rate of the Si wafer in 15% KOH at 80 °C was approximately 45-50 pm/hour (45000-50000 nm/hour) and the etch rate of Si wafer in 5% TMAH was at 80 °C approximately 19-23 pm/hour (19000-23000 nm/hour).

The measured etch rates in Table I show a good etchant selectivity for the Si wafer having an etch rate at least 12,500 times higher than that for the SiN_x.

The resulting exposed central portion of the protective layer and the additional layer were then dry etched, using reactive ion etching, until the lower boundary surface of the SiOx/SiOxNy is reached, so that the layer of SiOx/SiOxNy forms a membrane that is supported by unetched peripheral portions of the Si wafer.

Example 5: Manufacture of doped silicon layered membranes (A)

A multilayered membrane was formed that comprised a highly doped silicon as a sandwich layer in between silicon oxide and/or silicon oxynitride layers.

A layer of SiN_x was deposited on the front side (protective layer) and on the back side (mask layer) of a double sided polished Si wafer using PECVD and/or LPCVD.

A layer of SiO_x/SiOxNy was then deposited on the deposited SiN_x protective layer using PECVD and/or LPCVD.

A layer of doped silicon was then deposited on the layer of SiO_x/SiO_xN_y using sputter deposition. Alternatively, an undoped layer of silicon or any other semiconductor was deposited on the layer of SiO_x/SiO_xN_y and then doped to the required levels using ion-implanters or other methods. Another layer of SiO_x/SiO_xN_y was then deposited on the deposited layer of doped silicon using PECVD and/or LPCVD.

An additional layer of SiN_x (additional protective layer) was deposited on the layer of SiO_x/SiO_xN_y using PECVD and/or LPCVD.

The resulting exposed selected central portion of the back side of the substrate was etched using KOH until a lower boundary surface of the protective layer was reached. The concentration of KOH used varied from 1% (weight per volume) to 45% in water. Iso-propanol was added to reduce the roughness during etching. The etching process was performed at a temperature between 60°C and 100°C.

The resulting exposed central portion of the protective layer and the additional layer were dry etched, using reactive ion etching, until the lower boundary surface of the layer of SiOx/SiOxNy was reached, so that the layer of material forms a membrane that is supported by unetched peripheral portions of the Si wafer.

For the reactive ion etching 10 seem of Fluoroform (CHF3) gas was used to etch the protective layer. ICP RF and Bias RF of 70 W was applied during etching.

The thickness of the layers of silicon oxide and/or silicon oxynitride on both sides of the doped silicon layer were adjusted as required. Example 6: Manufacture of doped silicon layered membranes (B)

Another example of a multilayered membrane comprising a highly doped silicon as a sandwich layer in between silicon oxide and/or silicon oxynitride layers is provided below.

A layer of SiNx was deposited on the front side (protective layer) and on the back side (mask layer) of a double sided polished Si wafer using PECVD and/or LPCVD.

The resulting exposed selected central portion of the back side of the Si wafer was etched using KOH until a lower boundary surface of the protective layer was reached.

A first layer of SiOx/SiOxNy was then deposited on the layer of SiNx using PECVD and/or LPCVD.

A layer of doped silicon was deposited on the first layer of SiOx/SiOxNy using sputter deposition. Alternatively, an undoped layer of silicon or any other semiconductor may be deposited on the first layer of SiOx/SiOxNy and then doped to the required levels using ion-implanters or other methods.

A second layer of SiOx/SiOxNy was then deposited on the layer of doped silicon using PECVD and/or LPCVD. The exposed central portion of the protective layer was dry etched, using reactive ion etching, until the lower boundary surface of the first layer of SiOx/SiOxNy was reached. The combined layers of material comprising first and second layers of SiOx/SiO_xNy and intermediate layer of doped silicon therefore form a membrane that was supported by the unetched peripheral portions of the Si wafer.

Example 7: Manufacture of doped silicon layered membranes (C)

A layer of SiCh was formed on the front side and on the back side (mask layer) of a double sided polished Si wafer using thermal annealing.

The selected central portion of the mask layer was etched using dry etching (reactive ion etching) until a lower boundary surface of the silicon wafer was reached.

The resulting exposed selected central portion of the back side of the Si wafer was etched using TMAH until a lower boundary surface of thermal oxide was reached, thereby forming a free-standing SiO membrane.

A first layer of SiO_x/SiO_xN_y was then deposited on the front side of the Si wafer above the deposited S 1O2 using PECVD and/or LPCVD. A layer of doped silicon was deposited on the first layer of SiO_x/SiO_xN_y using sputter deposition. Alternatively, an undoped layer of silicon or any other semiconductor could be deposited on the first layer of SiO_x/SiO_xN_y and then doped to the required levels using ion-implanters or other methods.

A second layer of SiO_x/SiO_xN_y was then deposited on the deposited layer of doped silicon using PECVD and/or LPCVD.

The exposed central portion of the protective layer of SiO was dry etched, using reactive ion etching, until the lower boundary surface of the first layer of SiO_x/SiO_xN_y was reached. The combined layers of material comprising first and second layers of SiO_x/SiO_xN_y and intermediate layer of doped silicon therefore form a membrane that was supported by the unetched peripheral portions of the Si wafer.

For the reactive ion etching 10 seem of Fluoroform (CHF3) gas was used to etch the protective layer. ICP RF and Bias RF of 100 W was applied during etching.

Example 8: Manufacture of composite membranes (Al)

A composite membrane was formed that comprised gold nanoparticles embedded in between two silicon oxide, silicon nitride or silicon oxynitride layers.

A layer of SiN_x was deposited on the front side (first protective layer) and on the back side (mask layer) of a double sided polished Si wafer using PECVD and/or LPCVD.

A first layer of SiO_x/SiO_xN_y was then deposited on the front side of the on the deposited layer of SiN_x using PECVD and/or LPCVD. A thin layer of gold was deposited on the layer of SiO_x/SiO_xN_y using Physical Vapor Deposition techniques such as e-beam deposition or sputter deposition.

A second layer of SiO_x/SiO_xN_y was then deposited on the deposited thin layer of gold using PECVD and/or LPCVD.

The deposited layers were subjected to rapid thermal annealing to convert the thin layer of gold into gold spherical nanoparticles. The thermal annealing was performed (i) at this stage, i.e. after the deposition of the second layer, (ii) after the etching of the mask (described below), (iii) after the etching of the substrate (described below), or (ii) after the supported membrane is formed, after the etching of the protective layers (described below).

Depending on the membrane application requirement, the Au nanoparticles were elongated by the application of high-energy ion irradiation.

An additional layer of SiNx (additional protective layer) was deposited on the second layer of SiO_x/SiO_xN_y using PECVD and/or LPCVD.

The resulting exposed selected central portion of the back side of the substrate was etched using KOH until a lower boundary surface of the first protective layer was reached. The resulting exposed central portion of the first protective layer was dry etched, using reactive ion etching, until the lower boundary surface of the first layer of SiO_x/SiO_xNy was reached. The additional protective layer was also dry etched to expose the outer suface of the second layer of SiO_x/SiO_xN_y. The combined layers of material comprising first and second layers of SiO_x/SiO_xN_y and intermediate layer of gold nanoparticles form a membrane that is supported by the unetched peripheral portions of the Si wafer.

For the reactive ion etching 10 seem of Fluoroform (CHF3) gas was used to etch the protective layers. ICP RF and Bias RF of 70 W was applied during etching.

Example 9: Manufacture of composite membranes (A2)

Another example of a composite membrane comprising gold nanoparticles embedded in between two silicon oxide, silicon nitride or silicon oxynitride layers is provided below.

A first layer of SiO_x/SiO_xN_y was then deposited on the front side of the on the deposited layer of SiN_x using PECVD and/or LPCVD.

A thin layer of gold nanoparticles was deposited on the layer of SiO_x/SiO_xN_y by dip coating, spin coating or other coating techniques.

Depending on the membrane application requirement, the Au nanoparticles were elongated by the application of high-energy ion irradiation. An additional layer of SiNx (additional protective layer) was deposited on the second layer of SiO_x/SiO_xN_y using PECVD and/or LPCVD.

The resulting exposed selected central portion of the back side of the substrate was etched using KOH until a lower boundary surface of the first protective layer was reached.

The resulting exposed central portion of the first protective layer was dry etched, using reactive ion etching, until the lower boundary surface of the first layer of SiO_x/SiO_xN_y was reached. The additional protective layer was also dry etched to expose the outer suface of the second layer of SiO_x/SiO_xN_y. The combined layers of material comprising first and second layers of SiO_x/SiO_xN_y and intermediate layer of gold nanoparticles form a membrane that is supported by the unetched peripheral portions of the Si wafer.

Example 10: Manufacture of composite membranes (Bl)

Another example of a composite membrane comprising gold nanoparticles embedded in between two silicon oxide, silicon nitride or silicon oxynitride layers is provided below. A layer of SiN_x was deposited on the front side (protective layer) and on the back side (mask layer) of a double sided polished Si wafer using PECVD and/or LPCVD.

A first layer of SiO_x/SiO_xN_y was then deposited on the front side of the Si wafer on the deposited SiN_x using PECVD and/or LPCVD.

A thin layer of gold was deposited on the layer of SiO_x/SiO_xN_y using Physical Vapor Deposition techniques such as e-beam deposition or sputter deposition.

The deposited layers were subjected to rapid thermal annealing to convert the thin layer of gold into gold spherical nanoparticles. The thermal annealing was performed (i) at this stage, i.e. after the deposition of the second layer or (ii) after the etching of the protective layer (described below).

Depending on the membrane application requirement, the Au nanoparticles were elongated by the application of high-energy ion irradiation. The exposed central portion of the protective layer was dry etched, using reactive ion etching, until the lower boundary surface of the first layer of SiO_x/SiO_xN_y was reached. The combined layers of material comprising first and second layers of SiO_x/SiO_xNy and intermediate layer of gold nanoparticles form a membrane that was supported by the unetched peripheral portions of the Si wafer.

Example 10: Manufacture of composite membranes (B2)

The resulting exposed selected central portion of the back side of the Si wafer was etched using KOH until a lower boundary surface of the protective layer was reached. A first layer of SiO_x/SiO_xN_y was then deposited on the front side of the Si wafer on the deposited SiN_x using PECVD and/or LPCVD.

A thin layer of gold nanoparticle was deposited on the layer of SiO_x/SiO_xN_y by dip coating, spin coating or other coating techniques.

The exposed central portion of the protective layer was dry etched, using reactive ion etching, until the lower boundary surface of the first layer of SiO_x/SiO_xN_y was reached. The combined layers of material comprising first and second layers of SiO_x/SiO_xN_y and intermediate layer of gold nanoparticles form a membrane that was supported by the unetched peripheral portions of the Si wafer.

Example 11: Manufacture of composite membranes (Cl)

A layer of SiO was formed on the front side and on the back side (mask layer) of a double sided polished Si wafer using thermal annealing. Using lithography an etch pattern was transferred on the mask layer to expose a selected central portion and protect selected peripheral portions of the back side of the silicon wafer.

A first layer of SiO_x/SiO_xN_y was then deposited on the front side of the Si wafer above the deposited SiCh using PECVD and/or LPCVD.

A thin layer of gold was deposited on the first layer of SiO_x/SiO_xN_y using Physical Vapor Deposition techniques such as e-beam deposition or sputter deposition.

The deposited layers were subjected to rapid thermal annealing to convert the thin layer of gold into gold spherical nanoparticles. The thermal annealing was performed (i) at this stage, i.e. after the deposition of the second layer, or (ii) after the supported membrane is formed, after the etching of the protective layer (described below).

Depending on the membrane application requirement, the Au nanoparticles were elongated by the application of high-energy ion irradiation. The exposed central portion of the protective layer of SiO was dry etched, using reactive ion etching, until the lower boundary surface of the first layer of SiO_x/SiO_xNy was reached. The combined layers of material comprising first and second layers of SiO_x/SiO_xN_y and intermediate layer of gold nanoparticles formed a membrane that was supported by the unetched peripheral portions of the Si wafer.

Example 12: Manufacture of composite membranes (C2)

A layer of SiC was formed on the front side and on the back side (mask layer) of a double sided polished Si wafer using thermal annealing.

The resulting exposed selected central portion of the back side of the Si wafer was etched using TMAH until a lower boundary surface of thermal oxide was reached, thereby forming a free-standing SiO membrane. A first layer of SiO_x/SiO_xN_y was then deposited on the front side of the Si wafer above the deposited S1O2 using PECVD and/or LPCVD.

The exposed central portion of the protective layer of SiCh was dry etched, using reactive ion etching, until the lower boundary surface of the first layer of SiO_x/SiO_xN_y was reached. The combined layers of material comprising first and second layers of SiO_x/SiO_xN_y and intermediate layer of gold nanoparticles formed a membrane that was supported by the unetched peripheral portions of the Si wafer.

Example 13: Controlled reduction of thickness of membranes

Membranes of Si_xN_y with and without a thermal S i O2 underlayer were treated to reduce the membrane thickness in a controlled manner.

A representative workflow for the fabrication of a reduced thickness membrane is shown in Figure 1(e). Figure 1(e) shows the fabrication of a Si_xN_y membrane with a thermal SiC underlayer. As shown in Figure 1(e), wet thermal SiC was grown on the <l-0-0> Si wafer and then Si_xN_y layers were deposited employing low- pressure chemical vapor deposition (LPCVD). However, for the ease of fabrication of Si_xN_y membranes with S1O2 underlayer, double-sided polished, 300 pm thick wafers with -100 nm of thermal SiCh and -100 nm of low-stress Si_xN_y on both sides were purchased from WaferPro, LLC, US. The next steps involve spinning a negative photoresist on the backside of the wafer and patterning a custom window (size of window varying from 430 pm x 430 pm to 550 pm x 550 pm) using UV lithography. Afterwards, the silicon wafer was exposed from the backside of the preform in the window area by removing the Si_xN_y layer using reactive ion etching. The photoresist was then removed, and the exposed silicon was anisotropically etched by wet etching in 5% tetramethylammonium hydroxide (Sigma- Aldrich, 331635) solution at 85 °C (vi).

A similar fabrication process can be employed to create membranes devoid of an underlayer, with few minor variations (in the deposition step as well as the thinning down of membranes). A representative process flow for fabricating such membranes is shown in Figure 1(b). In the case of fabricating “bare” Si_xN_y membranes (ie, without an underlayer), a -150 nm thick Si_xN_y layer was deposited on both sides of a double-sided polished, 300 pm thick, 4-inch Si wafer. The deposition was performed at 775 °C and a gas flow of 30 seem of dichlorosilane and 120 seem of ammonia was maintained throughout the process to deposit near- stoichiometric Si_xN_y (x~3 and y~4). The thickness of the nitride layer was measured by ellipsometry. Almost uniform deposition thickness was achieved with a variation of -3 nm (standard deviation of 0.95 nm) across the 4- inch wafer.

This process lead to the parallel fabrication of membranes of -200 nm thickness and -150 nm thickness on a 4-inch Si wafer respectively for the case of fabrication of membranes with and without SiCh underlayer. While potassium hydroxide has typically been employed as an etchant for anisotropically etching silicon, it also etches silicon oxide at rates up to 10 nm/min, which can result in the fabrication of uneven membranes with unknown final thickness. Because of this, TMAH wet etching was instead employed, which offers significantly greater selectivity against the etching of SiCh providing better control over the fabrication process.

The material properties of the Si_xN_y layers such as density and stoichiometry were determined by Rutherford backscattering spectrometry (RBS) using a 2.0 MeV He ion beam. For the case of bare Si_xN_y layer there was a nearly stoichiometric composition of Si3N3.94±o.o2 and a density of 2.97 ± 0.02 g cm'³. For the case of silicon-rich membranes with SiCh underlayer, the composition and density were found to be Si3N3.72iO.o3 and 2.94 + 0.02 g cm^-3.

After the fabrication of thick membranes, they were thinned down in a controlled manner through consecutive etching with HF of different concentrations. HF etching to reduce the thickness of the nitride window with and without the silica underlayer was done using different concentrations (10%, 5%, and 1%) of HF prepared by dilution of 48% HF (Sigma- Aldrich, 695068). The etching was performed in a custom-made etching cradle. Both membrane types were thinned down from a starting thickness of -200 nm (Si_xN_y membrane with a thermal SiO? underlayer) and -150 nm (bare Si_xN_y layer) membrane to -5 nm thickness. The membranes were etched using 10% HF to a thickness of -40 nm. The total thickness of the membranes with silica underlayer fell quickly from -200 nm to -90 nm within the first 100 seconds of etching owing to the high etch rate of the thermal SiCh layer. Then, the membranes were etched with 5% HF to reach a thickness of -15 nm and finally etched in 1% HF to reach a final thickness of -5 nm. To stop the etching, the membranes were rinsed thrice in DI water and airdried. The stoichiometric silicon nitride layer exhibits -25% lower etch rates than the silicon-rich silicon nitride layer, demonstrating the impact of nitrogen concentration and density of the layer on HF etching.

Although thinning of silicon nitride is also possible by the reactive ion etching method, due to the intrusive nature of plasma (caused by the bombardment of ions on the surface) as well as due to the creation of defects, membranes thinner than ~25 nm did not survive. On the other hand, using different concentrations of HF (allowing control at nm scale), and well-characterized etch rate, it was possible to create membranes as thin as -3 nm, and even as thin as ~1.5 nm

The fabricated thinned membranes demonstrated excellent stability for nanopore fabrication and biosensing. Nanopores were fabricated using the controlled breakdown (CBD) method with estimated pore diameters down to -1.5 nm yielding events as high as >500,000 and >1,800,000 from dsDNA and bovine serum albumin protein respectively — a testimony to the high-performance and extended life-time of the pores fabricated in the membranes.

Whilst a number of specific method and membrane embodiments have been described, it should be appreciated that the method and membrane may be embodied in many other forms.

In the claims which follow, and in the preceding description, except where the context requires otherwise due to express language or necessary implication, the word “comprise” and variations such as “comprises” or “comprising” are used in an inclusive sense, i.e. to specify the presence of the stated features but not to preclude the presence or addition of further features in various embodiments of the apparatus and method as disclosed herein.

Further patent applications may be filed in Australia or overseas on the basis of, or claiming priority from, the present application. It is to be understood that the following claims are provided by use of example only and are not intended to limit the scope of what may be claimed in any such future applications. Features may be added to or omitted from the claims at a later date so is to further define or re-define the invention or inventions.

Claims

- 48 -

CLAIMS . A method of producing a supported membrane of a material, the method including the steps:

(c) etching the exposed selected central portion of the back side of the substrate until a lower boundary surface of the layer of membrane material is reached, so that the layer of membrane material forms a membrane that is supported by the unetched peripheral portions of the substrate. . A method of producing a supported membrane of a material, the method including the following steps:

(a) forming a supported membrane preform by i. providing a substrate having a front side and a back side; ii. forming a layer of membrane material on the front side of the substrate; and iii. forming a mask layer on the back side of the substrate;

(c) etching the exposed selected central portion of the back side of the substrate until a lower boundary surface of the layer of membrane material is reached, so that the layer of material forms a membrane that is supported by the unetched peripheral portions of the substrate.

RECTIFIED SHEET (RULE 91) - 49 -

3. The method of claim 1 or 2, wherein step (c) comprises wet etching.

4. The method of claim 2, wherein the method further includes the step of providing a protective layer between the front side of the substrate and the layer of membrane material.

5. The method of claim 4, wherein step (c) comprises two sub-steps: (i) a first etching sub-step, in which the exposed selected central portion of the back side of the substrate is etched until a lower boundary surface of the protective layer is exposed, followed by (ii) a second etching sub-step, in which the exposed lower boundary surface of the protective layer is etched until the lower boundary surface of the layer of membrane material is reached.

6. The method of claim 5, wherein the sub-step (i) comprises wet-etching.

7. The method of claim 5, wherein the sub-step (ii) comprises dry-etching.

8. The method of any one of claims 2 to 7, wherein step (a)(ii) is performed before step (c).

9. The method of claim 5, wherein step (a)(ii) is performed between steps (c)(i) and (c)(ii).

10. The method of claim 3 or 6, wherein the wet etching comprises etching with an alkaline etchant.

11. The method of claim 10, wherein the alkaline etchant is selected from KOH, TMAH and EDP.

RECTIFIED SHEET (RULE 91) - 50 -

12. The method of claim 4, wherein the protective layer comprises a material that has a slower etch rate than the substrate.

13. The method of claim 4 or claim 12, wherein the protective layer comprises silicon nitride or silicon oxide.

14. The method of any one of claims 4, 12 or 13, wherein the protective layer is deposited using plasma enhanced chemical vapor deposition (PECVD) and/or low- pressure chemical vapor deposition (LPCVD).

15. The method of any one of claims 4 or 12 to 14, further comprising forming an additional protective layer on top of the layer of membrane material.

16. The method of claim 15, wherein the additional protective layer comprises a material that has a slower etch rate than the substrate.

17. The method of claim 15 or claim 16, wherein the additional protective layer comprises silicon nitride or silicon oxide

18. The method of any one of claims 15 to 17, wherein forming an additional protective layer on top of the layer of membrane material comprises depositing the additional protective layer using plasma enhanced chemical vapor deposition (PECVD) and/or low-pressure chemical vapor deposition (LPCVD).

19. The method of claim 7, wherein dry etching comprises reactive ion etching, 0. The method of any one of claims 1 to 19, wherein the layer of the membrane material is formed on the front side of the substrate by depositing the material using

RECTIFIED SHEET (RULE 91) - 51 - plasma enhanced chemical vapor deposition (PECVD) and/or low-pressure chemical vapor deposition (LPCVD).

21. The method of any one of claims 1 to 20, wherein the mask layer is formed on the back side of the substrate by depositing the mask layer using plasma enhanced chemical vapor deposition (PECVD) and/or low-pressure chemical vapor deposition (LPCVD).

22. The method of any one of claims 1 to 21, wherein the mask layer on the back side of the substrate has the same composition as the layer of membrane material.

23. The method of claim 4, and any one of claims 5 to 22 when depending from claim 4, wherein the mask layer on the back side of the substrate has the same composition as the protective layer.

24. The method of claim 4, and any one of claims 5 to 23, when depending from claim 4, wherein the mask layer on the back side of the substrate has the same composition as the additional protective layer.

25. The method of any one of claims 1 to 24, wherein the substrate is a silicon wafer.

26. The method of any one of claims 1 to 25, wherein the layer of membrane material is formed by forming two or more sublayers.

27. The method of claim 26, wherein the layer of membrane material includes a sublayer of a semiconductor, such as a doped silicon.

RECTIFIED SHEET (RULE 91) 28. The method of claim 27, wherein the layer of membrane material comprises a semiconductor, such as a doped silicon, as a sandwich layer in between silicon oxide and/or silicon oxynitride layers.

29. The method of any one of claims 1 to 26, wherein the layer of membrane material includes nanoparticles, such as gold nanoparticles.

30. The method of claim 29, wherein the layer of membrane material comprises gold nanoparticles embedded in between two silicon oxide, silicon nitride or silicon oxynitride sublayers.

31. A method of producing a supported membrane of a material, the method including the steps:

RECTIFIED SHEET (RULE 91) A method of producing a supported membrane of a material, the method including the steps:

(b) applying a layer of the membrane material to the outer boundary surface of the protective layer, the layer of membrane material including an inner surface and an outer surface;

(c) providing an additional protective layer to the outer surface of the layer of membrane material;

(f) etching the additional protective layer and the protective layer to expose the outer surface and the inner surface, respectively, of the layer of membrane material to form a membrane that is supported by the unetched peripheral portion of the substrate. A method of producing a supported membrane of a material, the method including the following steps:

(a) forming a supported membrane preform by: i. providing a substrate having a front side and a back side; ii. providing a protective layer on the front side of the substrate, the protective layer having inner and outer boundary surfaces

RECTIFIED SHEET (RULE 91) - 54 - iii. applying a layer of the membrane material to the outer boundary surface of the protective layer, the layer of membrane material including an inner surface; iv. providing an additional protective layer to the outer surface of the layer of membrane material; and v. forming a mask layer on the back side of the substrate;

(c) etching the exposed selected central portion of the back side of the substrate until a lower boundary surface of the protective layer is reached;

(d) etching the additional protective layer and the protective layer to expose the outer surface and the inner surface, respectively, of the layer of membrane material to form a membrane that is supported by the unetched peripheral portion of the substrate. A membrane fabricated using the method of any one of the preceding claims. A supported membrane comprising: a membrane supported peripherally by one or more supports, the membrane having a thickness of at least 5 nm and a surface area of at least 0.0001 mm². A method of any one of claims 1 to 33, further including reducing the overall thickness of the membrane material by etching. A method of claim 36, wherein the overall thickness of the membrane material is reduced by etching with an acidic solution, such as HF.

RECTIFIED SHEET (RULE 91) - 55 - A method of claim 36, wherein the overall thickness of the membrane material is reduced by etching with consecutively more dilute solutions of HF. The method of any one of claims 1 to 25, wherein the layer of membrane material is CVD diamond. The method of any one of claims 1 to 39 wherein further including reducing the overall thickness of the membrane material using inductively coupled reactive ion etching.

RECTIFIED SHEET (RULE 91)