WO2023087941A1

WO2023087941A1 - Method and apparatus for accessing debugging space of solid state disk

Info

Publication number: WO2023087941A1
Application number: PCT/CN2022/122336
Authority: WO
Inventors: 王萌萌
Original assignee: 苏州浪潮智能科技有限公司
Priority date: 2021-11-18
Filing date: 2022-09-28
Publication date: 2023-05-25
Also published as: CN114168073A; CN114168073B

Abstract

The embodiments of the present application relate to a method and apparatus for accessing a debugging space of a solid state disk. The method comprises: sending a debugging space access instruction to a solid state disk, wherein the access instruction carries a target debugging space address to be accessed; receiving a detection result, which is fed back by the solid state disk, of detecting the legitimacy of the target debugging space address; if the detection result is that the target debugging space address is legitimate, acquiring all data that is stored in the target debugging space and is fed back by the solid state disk by means of a DMI interface, and storing all the data in a preset local storage space; and accessing all data in the local storage space. By means of the method, a large amount of data is processed by means of a DMI interface, without depending on serial port hardware, thereby improving the data read-write rate.

Description

Method and device for accessing debugging space of solid-state hard disk

Cross References to Related Applications

This application claims the priority of the Chinese patent application with the application number 202111372765.4 and the application title "Access Method and Device for Debugging Space of Solid State Disk" filed with the China Patent Office on November 18, 2021, the entire contents of which are incorporated herein by reference Applying.

technical field

The embodiments of the present application relate to the field of development of solid-state hard disks, and in particular to a method and device for accessing debugging space of solid-state hard disks.

Background technique

Abnormalities in the development process of solid-state drives often rely on methods such as serial port printing and analysis log logs, dialog manager printing context, etc. to troubleshoot abnormal points. The write rate is low, relying on the serial port hardware, and cannot cope with the data reading and writing of large data magnitude. Therefore, how to realize the reading and writing of a large amount of data and improve the reading and writing speed has become an urgent problem to be solved in the development field of solid-state hard drives.

Contents of the invention

This application provides a method for accessing the debugging space of a solid-state hard disk, including:

Send the debug space access command to the solid state disk, wherein the access command carries the address of the target debug space to be accessed;

Receive the detection result of the legitimacy of the detection target debugging space address fed back by the solid state disk;

In response to the detection result being that the address of the target debugging space is legal, obtain all the data stored in the target debugging space fed back by the solid state disk through the DMI interface, and store all the data in the preset local storage space; and

Access all data in local storage space.

In one or more implementations, before sending the debug space access command to the solid state disk, a method for accessing the debug space of the solid state disk further includes:

pre-allocating local storage space, where the local storage space is used to store debug data; and

Map the address of the local storage space to the DMI interface.

In one or more implementations, receiving the detection result of the validity of the address of the target debugging space fed back by the solid state disk includes:

In response to the presence of a target debug space address in the debug space of the solid state disk, the detection result is that the target debug space address is legal; and

In response to the fact that the address of the target debugging space does not exist in the debugging space of the solid state disk, the detection result is that the address of the target debugging space is illegal.

In one or more implementations, a method for accessing the debugging space of a solid state disk further includes:

In response to the legality of the address of the target debugging space, sending the address of the target debugging space to a register corresponding to the DMI interface; and

In response to the illegal address of the target debugging space, query whether there is an address of the target debugging space in the non-debugging space.

In one or more implementations, querying whether the target debug space address exists in the non-debug space includes:

Use PBL illegal commands to connect to non-debugging space; and

Use the PBL illegal command to query whether the target debug space address carried in the debug space access instruction exists in the non-debug space.

In response to the presence of the target debug space address in the non-debug space, dividing the non-debug space corresponding to the target debug space address in the non-debug space into the debug space; and

Send the address of the non-debugging space divided into the debugging space to the register corresponding to the DMI interface.

In response to the fact that the target debug space address carried in the debug space access instruction is not found in the non-debug space, the warning information that the debug space access instruction is illegal is directly fed back.

In one or more implementations, all data stored in the target debugging space fed back by the solid state disk through the DMI interface is obtained, and all data is stored in a preset local storage space, including:

All the data stored in the target debugging space fed back by the receiving register through the DMI interface is stored in the local storage space.

In one or more implementations, the local storage space includes BAR2 space and BAR3 space, and the address of the local storage space is mapped to the DMI interface, including:

Map the addresses of BAR2 space and BAR3 space to the DMI interface respectively.

setting a first storage threshold for the BAR2 space; and

Set a second storage threshold for the BAR3 space.

In one or more implementations, the first storage threshold is 4M.

In one or more implementations, the second storage threshold is 4M.

In response to the fact that the local storage space is not sufficient to store all the data, an expansion operation is performed on the local storage space until the local storage space is sufficient to store all the data.

In one or more implementations, after accessing all the data in the local storage space, a method for accessing the debugging space of the solid state disk further includes:

Debug the SSD based on all the data.

Connect the solid-state hard disk through the PCIE channel;

Send debug space access commands to SSD, including:

Send the debug space access command to the SSD through the PCIE channel.

In one or more implementations, the solid state disk sends the address of the target debugging space to the DMI module, and the DMI module acquires all data in the target debugging space and feeds back all the data through the DMI interface.

In one or more implementations, the debug space access instructions are PBL commands.

The present application also provides a device for accessing the debugging space of a solid-state hard disk, including:

The sending module is used to send the debugging space access command to the solid state disk, wherein the access command carries the address of the target debugging space to be accessed;

The receiving module is used to receive the detection result of the legality of the detection target debugging space address fed back by the solid state disk;

Obtaining a storage module, used to obtain all data stored in the target debugging space fed back by the solid-state hard drive through the DMI interface if the detection result is that the address of the target debugging space is legal, and store all the data in the preset local storage space; and

The access module is used to access all data in the local storage space.

The present application also provides a computer device, including a memory and one or more processors, where computer-readable instructions are stored in the memory, and when the computer-readable instructions are executed by the one or more processors, the one or more processors execute Steps in any of the above methods.

The present application also provides one or more non-volatile computer-readable storage media storing computer-readable instructions. When the computer-readable instructions are executed by one or more processors, one or more processors can perform any of the above-mentioned operations. The steps of a method.

Description of drawings

Fig. 1 is an access interaction diagram of a solid-state hard disk debugging space provided by one or more embodiments of the present application;

FIG. 2 is a schematic flowchart of a method for accessing a debugging space of a solid-state hard disk provided by one or more embodiments of the present application;

FIG. 3 is a schematic flow diagram of another method for accessing debugging space of a solid-state hard disk provided by one or more embodiments of the present application;

FIG. 4 is a schematic structural diagram of an access device for a solid-state hard disk debugging space provided by one or more embodiments of the present application;

Fig. 5 is a schematic structural diagram of a computer device provided by one or more embodiments of the present application.

Detailed ways

In order to make the purposes, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments It is a part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the scope of protection of this application.

In order to facilitate the understanding of the embodiments of the present application, the following will further explain and illustrate with specific embodiments in conjunction with the accompanying drawings, and the embodiments do not constitute a limitation to the embodiments of the present application.

Fig. 2 is a schematic flow diagram of a method for accessing a solid-state hard disk debugging space provided in an embodiment of the present application. As shown in Fig. 2, the method specifically includes:

S21. Send the debug space access instruction to the solid state disk.

This application is preferentially applicable to the development and debugging work scene of solid-state hard disk. In the embodiment of this application, combined with the access interaction diagram of the solid-state hard disk debugging space shown in Figure 1, the host and solid-state hard disk are connected through the PCIE channel, and the solid-state hard disk is read and written through the PCIE channel. large amount of data in .

The host computer sends a debug space access command to the solid state disk, wherein the access command carries an address of a target debug space to be accessed.

S22. Receive a detection result of validity of the detection target debugging space address fed back by the solid state disk.

After receiving the debug space access command sent by the host, the solid-state drive detects the address of the target debug space carried in the access command, checks the validity of the address of the target debug space, and feeds back the detection result to the host, and the host receives the feedback from the solid-state drive for detection The detection result of the legality of the target debug space address.

S23. If the detection result is that the address of the target debugging space is legal, then obtain all the data stored in the target debugging space fed back by the solid-state hard drive through the DMI interface, and store all the data in the preset local storage space.

If the detection result shows that the address of the target debugging space is legal, the SSD will send the address of the target debugging space to the DMI module, and the DMI module will obtain all the data in the target debugging space and send it to the host through the DMI interface. In the preset local storage space, the preset local storage space is a pre-divided partial storage space, such as the BAR2 and BAR3 spaces shown in FIG. 1 .

S24. Access all data in the local storage space.

After all the data storage is completed, the host can access all the data stored in the BAR2 and BAR3 spaces, and then debug the solid-state drive based on all the data.

The method for accessing the debugging space of the solid-state hard disk provided in the embodiment of the present application is to send the debugging space access command to the solid-state hard disk, wherein the access command carries the address of the target debugging space to be accessed; If the detection result is that the address of the target debugging space is legal, then obtain all the data stored in the target debugging space fed back by the solid state drive through the DMI interface, and store all the data in the preset local storage space; for the local storage space Compared with the prior art that relies on serial port printing to analyze log logs, dialogue manager printing context and other methods to troubleshoot abnormal points, it is only suitable for reading and writing a small amount of data and relies on serial port hardware. By this method, you can pass The DMI interface handles a large amount of data, does not depend on the serial port hardware, and improves the data read and write rate.

Fig. 3 is a schematic flow diagram of another method for accessing the debugging space of a solid-state hard disk provided in the embodiment of the present application. As shown in Fig. 3, the method specifically includes:

S31. Pre-allocate a local storage space, where the local storage space is used to store the debugging data.

In the embodiment of the present application, the local storage space is pre-allocated on the host computer, such as the BAR2 and BAR3 spaces in Figure 1. A threshold (for example, 4M) can be set for the size of the BAR2 and BAR3 spaces. The local storage space is used to store solid-state Hard disk debugging data.

S32. Map the address of the local storage space to the DMI interface.

Furthermore, after the local storage space is allocated, the address of the local storage space is mapped to the DMI interface, and the BAR2 and BAR3 spaces are linked with the DMI. When the host accesses its own BAR2 and BAR3 spaces, it is equivalent to accessing the memory space of the solid state drive , which also realizes the reading and writing of data in the memory space of the SSD.

S33. If the target debugging space address exists in the debugging space of the solid state disk, the detection result is that the target debugging space address is legal.

The host sends a debug space access command to the solid state disk, wherein the access command carries the address of the target debug space to be accessed, and the command can be sent as a PBL command.

After receiving the debug space access command sent by the host, the solid state disk detects the address of the target debug space carried in the access command to check the validity of the address of the target debug space. If there is a target debug space address in the debug space of the solid state drive, then The detection result shows that the address of the target debugging space is legal.

S34. If the address of the target debugging space is valid, send the address of the target debugging space to a register corresponding to the DMI interface.

If the address of the target debugging space is legal, the PBL command feeds back the result that the address of the target debugging space is legal to the host, and the solid state disk sends the address of the target debugging space to the corresponding register of the DMI interface.

S35. If the target debugging space address does not exist in the debugging space of the solid state disk, the detection result is that the target debugging space address is illegal.

S36. If the address of the target debugging space is invalid, query whether the address of the target debugging space exists in the non-debugging space.

If the target debugging space address does not exist in the debugging space of the solid state disk, the detection result is that the target debugging space address is illegal.

Further, the PBL illegal command connects to the non-debugging space, and queries whether the target debugging space address carried in the debugging space access instruction exists in the non-debugging space.

S37. If the target debug space address exists in the non-debug space, divide the non-debug space corresponding to the target debug space address in the non-debug space into the debug space.

S38. Send the address of the non-debugging space divided into the debugging space to a register corresponding to the DMI interface.

If the target debug space address carried in the debug space access instruction in the non-debug space is found, the non-debug space corresponding to the target debug space address in the non-debug space is divided into the debug space, and the address of the non-debug space is Send to the register corresponding to the DMI interface.

Optionally, if the target debug space address carried in the debug space access instruction is not queried in the non-debug space, the warning information that the debug space access instruction is illegal may be directly fed back.

S39. Receive all the data stored in the target debugging space fed back by the register through the DMI interface, and store all the data in the local storage space.

The register accesses the space of the solid-state hard disk through the received target debugging space address, obtains all data from the target debugging space, and sends all the data to the host through the DMI interface. After receiving all the data, the host stores all the data in the local storage space.

S310. If the local storage space is not sufficient to store all the data, perform a capacity expansion operation on the local storage space until the local storage space is sufficient to store all the data.

If the size of the local storage space cannot meet the storage of all data, the local storage space can be expanded, that is, the local storage space can be re-divided so that the re-divided local storage space is enough to store all the data.

S311 , debug the solid state disk based on all the data.

After all the data storage is completed, the host can access all the data in the local storage space, and realize the debugging of the solid-state hard disk according to all the data.

FIG. 4 is a schematic structural diagram of an access device for a solid-state hard disk debugging space provided in an embodiment of the present application, specifically including:

The sending module 401 is configured to send a debug space access command to the solid state disk, wherein the access command carries the address of the target debug space to be accessed;

The receiving module 402 is used to receive the detection result of the legality of the detection target debugging space address fed back by the solid state disk;

Obtaining a storage module 403, used to obtain all data stored in the target debugging space fed back by the solid-state hard disk through the DMI interface if the detection result is that the address of the target debugging space is legal, and store all the data in the preset local storage space;

An access module 404, configured to access all data in the local storage space.

In a possible implementation, the sending module 401 is specifically configured to send the address of the target debugging space to the register corresponding to the DMI interface if the address of the target debugging space is legal; if the address of the target debugging space is illegal, query the non-debugging space Whether the target debug space address exists in .

In a possible implementation, the sending module 401 is further configured to divide the non-debugging space corresponding to the target debugging space address in the non-debugging space into the debugging space if there is a target debugging space address in the non-debugging space; The address of the non-debugging space in the debugging space is sent to the register corresponding to the DMI interface.

In a possible implementation, the sending module 401 is further configured to pre-allocate a local storage space, where the local storage space is used to store debugging data; and map the address of the local storage space to the DMI interface.

In a possible implementation manner, the receiving module 402 is specifically configured to: if there is a target debugging space address in the debugging space of the solid-state hard disk, the detection result is that the address of the target debugging space is legal; if there is no target debugging space in the debugging space of the solid-state hard disk address, the detection result is that the address of the target debugging space is illegal.

In a possible implementation manner, the acquiring storage module 403 is specifically configured to receive all the data stored in the target debugging space fed back by the register through the DMI interface, and store all the data in the local storage space.

In a possible implementation manner, the acquiring storage module 403 is further configured to expand the local storage space until the local storage space is sufficient to store all the data if the local storage space is insufficient to store all the data.

In a possible implementation manner, the access module 404 is specifically configured to debug the solid state disk based on all data.

The device for accessing the debugging space of the solid-state hard disk provided in this embodiment may be the device for accessing the debugging space of the solid-state hard disk as shown in FIG. For the technical effect of the access method of the debugging space of the solid-state hard disk shown in Figure 2-3, please refer to the relevant description in Figure 2-3 for details, which is not described here for brevity.

FIG. 5 is a schematic structural diagram of a computer device provided by an embodiment of the present application. The computer device 500 shown in FIG. 5 includes: at least one processor 501 , memory 502 , at least one network interface 504 and other user interfaces 503 . Various components in computer device 500 are coupled together by bus system 505 . It can be understood that the bus system 505 is used to realize connection and communication between these components. In addition to the data bus, the bus system 505 also includes a power bus, a control bus and a status signal bus. However, for clarity of illustration, the various buses are labeled as bus system 505 in FIG. 5 .

Wherein, the user interface 503 may include a display, a keyboard, or a pointing device (for example, a mouse, a trackball (trackball), a touch panel, or a touch screen, and the like.

It can be understood that the memory 502 in the embodiment of the present application may be a volatile memory or a nonvolatile memory, or may include both volatile and nonvolatile memories. Among them, the non-volatile memory can be read-only memory (Read-Only Memory, ROM), programmable read-only memory (Programmable ROM, PROM), erasable programmable read-only memory (Erasable PROM, EPROM), electronically programmable Erase Programmable Read-Only Memory (Electrically EPROM, EEPROM) or Flash. The volatile memory can be Random Access Memory (RAM), which acts as external cache memory. By way of illustration and not limitation, many forms of RAM are available, such as Static Random Access Memory (Static RAM, SRAM), Dynamic Random Access Memory (Dynamic RAM, DRAM), Synchronous Dynamic Random Access Memory (Synchronous DRAM, SDRAM), double data rate synchronous dynamic random access memory (Double Data Rate SDRAM, DDRSDRAM), enhanced synchronous dynamic random access memory (Enhanced SDRAM, ESDRAM), synchronous connection dynamic random access memory (Synch link DRAM, SLDRAM ) and Direct Memory Bus Random Access Memory (Direct Rambus RAM, DRRAM). The memory 502 described herein is intended to include, but is not limited to, these and any other suitable types of memory.

In some implementations, the memory 502 stores the following elements, executable units or data structures, or their subsets, or their extended sets: an operating system 5021 and an application program 5022.

Among them, the operating system 5021 includes various system programs, such as framework layer, core library layer, driver layer, etc., for realizing various basic services and processing tasks based on hardware. The application program 5022 includes various application programs, such as a media player (Media Player), a browser (Browser), etc., and is used to realize various application services. The program for implementing the method of the embodiment of the present application may be included in the application program 5022 .

In this embodiment of the application, by calling the program or computer-readable instruction stored in the memory 502, specifically, the program or computer-readable instruction stored in the application program 5022, the processor 501 is used to execute the method provided by each method embodiment. The method steps include, for example:

Send the debugging space access command to the solid-state hard disk, wherein the access command carries the address of the target debugging space to be accessed; receive the detection result of the validity of the target debugging space address fed back by the solid-state hard disk; if the detection result is that the target debugging space address is legal, Then obtain all the data stored in the target debugging space fed back by the solid state disk through the DMI interface, store all the data in the preset local storage space; and access all the data in the local storage space.

In a possible implementation manner, a local storage space is allocated in advance, where the local storage space is used to store debugging data; and an address of the local storage space is mapped to a DMI interface.

In a possible implementation, if the target debugging space address exists in the debugging space of the solid-state hard disk, the detection result is that the target debugging space address is legal; if there is no target debugging space address in the solid-state hard disk debugging space, the detection result is the target debugging space address. The debug space address is invalid.

In a possible implementation, if the address of the target debugging space is legal, the address of the target debugging space is sent to the register corresponding to the DMI interface; if the address of the target debugging space is illegal, then query whether there is an address of the target debugging space in the non-debugging space .

In a possible implementation, if there is a target debug space address in the non-debug space, then the non-debug space corresponding to the target debug space address in the non-debug space is divided into the debug space; The address is sent to the register corresponding to the DMI interface.

In a possible implementation manner, all the data stored in the target debugging space fed back by the receiving register through the DMI interface is stored in the local storage space.

In a possible implementation, if the local storage space is not sufficient to store all the data, the local storage space is expanded until the local storage space is sufficient to store all the data.

In a possible implementation manner, the solid state disk is debugged based on all data.

The methods disclosed in the foregoing embodiments of the present application may be applied to the processor 501 or implemented by the processor 501 . The processor 501 may be an integrated circuit chip and has signal processing capability. In the implementation process, each step of the above method can be completed by an integrated logic circuit of hardware in the processor 501 or an instruction in the form of software. The above-mentioned processor 501 may be a general-purpose processor, a digital signal processor (Digital Signal Processor, DSP), an application specific integrated circuit (Application Specific Integrated Circuit, ASIC), a ready-made programmable gate array (Field Programmable Gate Array, FPGA) or other Programmable logic devices, discrete gate or transistor logic devices, discrete hardware components. Various methods, steps, and logic block diagrams disclosed in the embodiments of the present application may be implemented or executed. A general-purpose processor may be a microprocessor, or the processor may be any conventional processor, or the like. The steps of the method disclosed in connection with the embodiments of the present application may be directly implemented by a hardware decoding processor, or implemented by a combination of hardware and software units in the decoding processor. The software unit may be located in a mature storage medium in the field such as random access memory, flash memory, read-only memory, programmable read-only memory or electrically erasable programmable memory, register. The storage medium is located in the memory 502, and the processor 501 reads the information in the memory 502, and completes the steps of the above method in combination with its hardware.

It should be understood that the embodiments described herein may be implemented by hardware, software, firmware, middleware, microcode or a combination thereof. For hardware implementation, the processing unit can be implemented in one or more application specific integrated circuits (Application Specific Integrated Circuits, ASIC), digital signal processor (Digital Signal Processing, DSP), digital signal processing device (DSPDevice, DSPD), programmable logic Equipment (Programmable Logic Device, PLD), Field-Programmable Gate Array (Field-Programmable Gate Array, FPGA), general-purpose processor, controller, microcontroller, microprocessor, other electronic units for performing the functions of this application or in its combination.

For a software implementation, the techniques herein may be implemented by units that perform the functions herein. Software codes can be stored in memory and executed by a processor. Memory can be implemented within the processor or external to the processor.

The computer device provided by this embodiment may be the computer device as shown in Figure 5, which can execute all the steps of the access method of the solid-state hard disk debugging space in Figure 2-3, and then realize the solid-state hard disk debugging space shown in Figure 2-3 For the technical effect of the access method, please refer to the related descriptions in FIG.

The embodiment of the present application also provides one or more non-volatile computer-readable storage media storing computer-readable instructions. Here, the storage medium stores one or more computer-readable instructions. Wherein, the storage medium may include a volatile memory, such as a random access memory; the memory may also include a non-volatile memory, such as a read-only memory, a flash memory, a hard disk or a solid-state disk; the memory may also include the above-mentioned types of memory combination.

When one or more computer-readable instructions in the storage medium can be executed by one or more processors, the method for accessing the debugging space of the solid-state hard disk executed on the computer device side is realized.

The processor is used to execute the access program of the debugging space of the solid-state hard disk stored in the memory, so as to realize the following steps of the method for accessing the debugging space of the solid-state hard disk executed on the computer device side:

Professionals should further realize that the units and algorithm steps described in conjunction with the embodiments disclosed herein can be implemented by electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the relationship between hardware and software Interchangeability. In the above description, the composition and steps of each example have been generally described according to their functions. Whether these functions are executed by hardware or software depends on the specific application and design constraints of the technical solution. Skilled artisans may use different methods to implement the described functions for each specific application, but such implementation should not be regarded as exceeding the scope of the present application.

The steps of the methods or algorithms described in connection with the embodiments disclosed herein may be implemented by hardware, software modules executed by a processor, or a combination of both. Software modules can be placed in random access memory (RAM), internal memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or any other Any other known storage medium.

The specific implementation above has further described the purpose, technical solutions and beneficial effects of the application in detail. It should be understood that the above is only a specific implementation of the application and is not used to limit the scope of protection of the application. Within the spirit and principles of this application, any modifications, equivalent replacements, improvements, etc., shall be included within the protection scope of this application.

Claims

A method for accessing a debugging space of a solid-state hard disk, characterized in that, comprising:

Send a debug space access command to the solid state disk, wherein the access command carries the address of the target debug space to be accessed;

Receiving the detection result of detecting the legality of the target debugging space address fed back by the solid-state hard disk;

In response to the detection result being that the address of the target debugging space is legal, obtaining all the data stored in the target debugging space fed back by the solid-state hard disk through the DMI interface, and storing the all data in a preset local storage space; and

All data in the local storage space is accessed.
The method according to claim 1, wherein before sending the debugging space access instruction to the solid state disk, the method further comprises:

pre-allocating a local storage space, wherein the local storage space is used to store debugging data; and

and mapping the address of the local storage space to the DMI interface.
The method according to claim 2, wherein the detection result of receiving the feedback of the solid-state hard disk to detect the validity of the address of the target debugging space comprises:

In response to the presence of the target debugging space address in the debugging space of the solid state disk, the detection result is that the target debugging space address is legal; and

In response to the fact that the target debugging space address does not exist in the debugging space of the solid state disk, the detection result is that the target debugging space address is invalid.
The method according to claim 3, characterized in that the method further comprises:

In response to the legality of the target debugging space address, sending the target debugging space address to a register corresponding to the DMI interface; and

In response to the illegal address of the target debugging space, query whether the address of the target debugging space exists in the non-debugging space.
The method according to claim 4, wherein the querying whether the address of the target debugging space exists in the non-debugging space comprises:

Use PBL illegal commands to connect to non-debugging space; and

Query whether the target debug space address carried in the debug space access instruction exists in the non-debug space through the illegal PBL command.
The method according to claim 4, characterized in that the method further comprises:

In response to the presence of the target debug space address in the non-debug space, divide the non-debug space corresponding to the target debug space address in the non-debug space into a debug space; and

Send the address of the non-debugging space divided into the debugging space to the register corresponding to the DMI interface.
The method according to claim 6, further comprising:

In response to the fact that the target debug space address carried in the debug space access instruction is not found in the non-debug space, the warning information that the debug space access instruction is illegal is directly fed back.
The method according to any one of claims 4 or 6, characterized in that the acquisition of all data stored in the target debugging space fed back by the solid-state hard drive through the DMI interface, and storing all the data in a preset local storage space, including:

receiving all the data stored in the target debugging space fed back by the register through the DMI interface, and storing the all data in the local storage space.
The method according to claim 2, wherein the local storage space includes BAR2 space and BAR3 space, and mapping the address of the local storage space to the DMI interface includes:

The addresses of the BAR2 space and the BAR3 space are respectively mapped to the DMI interface.
The method according to claim 9, characterized in that the method further comprises:

setting a first storage threshold for the BAR2 space; and

Set a second storage threshold for the BAR3 space.
The method according to claim 10, wherein the first storage threshold is 4M.
The method according to claim 10, wherein the second storage threshold is 4M.
The method according to claim 1, further comprising:

In response to the fact that the local storage space is not sufficient to store all the data, an expansion operation is performed on the local storage space until the local storage space is sufficient to store all the data.
The method according to claim 1, wherein after accessing all the data in the local storage space, the method further comprises:

The solid-state hard disk is debugged based on the whole data.
The method according to claim 1, wherein before sending the debugging space access instruction to the solid state disk, the method further comprises:

Connect the solid-state hard disk through the PCIE channel;

The sending debugging space access command to the solid-state hard disk includes:

Send the debug space access instruction to the solid state disk through the PCIE channel.
The method according to claim 1, wherein the solid-state disk sends the address of the target debugging space to a DMI module, and the DMI module obtains all data in the target debugging space and transmits the address of the target debugging space through a DMI interface. All data are returned.
The method according to claim 1, wherein the debug space access command is a PBL command.
A device for accessing a debugging space of a solid-state hard disk, characterized in that it comprises:

A sending module, configured to send a debug space access command to a solid state disk, wherein the access command carries an address of a target debug space to be accessed;

A receiving module, configured to receive a detection result fed back by the solid-state hard disk to detect the validity of the address of the target debugging space;

Obtaining a storage module, used to obtain all data stored in the target debugging space fed back by the solid state disk through the DMI interface if the detection result is that the address of the target debugging space is legal, and store all the data in the preset in local storage; and

An access module, configured to access all data in the local storage space.
A computer device comprising a memory and one or more processors, the memory storing computer-readable instructions that, when executed by the one or more processors, cause the one or more A processor executes the steps of the method according to claims 1-17.
One or more non-transitory computer-readable storage media storing computer-readable instructions that, when executed by one or more processors, cause the one or more processors to perform the The steps of the methods described in 1-17.