CN108628760B - Method and device for atomic write command - Google Patents

Method and device for atomic write command Download PDF

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Publication number
CN108628760B
CN108628760B CN201710158505.4A CN201710158505A CN108628760B CN 108628760 B CN108628760 B CN 108628760B CN 201710158505 A CN201710158505 A CN 201710158505A CN 108628760 B CN108628760 B CN 108628760B
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command
sub
atomic
ftl
write command
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CN108628760A (en
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袁戎
谭云顺
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Beijing Memblaze Technology Co Ltd
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Beijing Memblaze Technology Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/06Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0646Configuration or reconfiguration

Abstract

The application provides an atomic write command execution method and device. The provided atomic write command includes a plurality of subcommands, the method including: sequencing the plurality of subcommands according to the logical address to be accessed by each subcommand; acquiring a first sub-command which is sequenced at the top in a plurality of unprocessed sub-commands in the plurality of sub-commands, and locking an FTL table entry corresponding to a first logic address to be accessed according to the first logic address to be accessed by the first sub-command; and if the locking of the FTL table entry corresponding to the first logic address is successful, acquiring a next sub-command according to the sequence of the sub-commands, and locking the FTL table entry corresponding to the second logic address according to a second logic address to be accessed by the next sub-command until the locking of the FTL table entries corresponding to the logic addresses to be accessed by each sub-command of all sub-commands belonging to the atomic write command is successful.

Description

Method and device for atomic write command
Technical Field
The present application relates to the field of storage technologies, and in particular, to a method and an apparatus for atomic write command.
Background
FIG. 1 illustrates a block diagram of a storage device. The storage device 102 is coupled to a host for providing storage capabilities to the host. The host and the storage device 102 may be coupled by various methods, including but not limited to, connecting the host and the solid state storage device 102 by, for example, SATA (Serial Advanced Technology Attachment), SCSI (Small Computer System Interface), SAS (Serial Attached SCSI), IDE (Integrated Drive Electronics), USB (Universal Serial Bus), PCIE (Peripheral Component Interconnect Express, PCIE, high speed Peripheral Component Interconnect), NVMe (NVM Express, high speed nonvolatile storage), ethernet, fibre channel, wireless communication network, etc. The host may be an information processing device, such as a personal computer, tablet, server, portable computer, network switch, router, cellular telephone, personal digital assistant, etc., capable of communicating with the storage device in the manner described above. The Memory device 102 includes an interface 103, a control section 104, one or more NVM chips 105, and a DRAM (Dynamic Random Access Memory) 110.
Among them, NAND flash Memory, phase change Memory, FeRAM (Ferroelectric RAM), MRAM (magnetoresistive Memory), RRAM (Resistive Random Access Memory), etc. are common NVM (Non-Volatile Memory).
The control unit 104 is used to control data transfer between the interface 103, the NVM chip 105, and the DRAM110, and also used for memory management, host logical address to flash physical address mapping, erase leveling, bad block management, and the like. The control component 104 can be implemented in various manners of software, hardware, firmware, or a combination thereof, for example, the control component 104 can be in the form of an FPGA (Field-programmable gate array), an ASIC (Application-Specific Integrated Circuit), or a combination thereof. The control component 104 may also include a processor or controller in which software is executed to manipulate the hardware of the control component 104 to process IO (Input/Output) commands. The control component 104 may also be coupled to the DRAM110 and may access data of the DRAM 110. FTL tables and/or cached IO command data may be stored in the DRAM.
Control section 104 includes a flash interface controller (or referred to as a media interface controller, a flash channel controller) that is coupled to NVM chip 105 and issues commands to NVM chip 105 in a manner that conforms to an interface protocol of NVM chip 105 to operate NVM chip 105 and receive command execution results output from NVM chip 105. Known NVM chip interface protocols include "Toggle", "ONFI", etc.
The software and/or firmware (hereinafter collectively referred to as "firmware") running in the control component 104 may be stored in the NVM chip 105 or another firmware memory. Upon power up of the solid state storage device 102, firmware is loaded from the firmware memory into the DRAM110 and/or memory internal to the control component 104. Optionally, the firmware is received and loaded through interface 103 or a debug interface.
In NVMe Specification (http://nvmexpress.org/wp-content/uploads/NVM_Express_1_2_ 1_Gold_20160603.pdf) The Atomic Operation (Atomic Operation) is defined in (1). Atomic operationThe action includes an atomic write command. To execute the atomic write command, the solid-state storage device ensures that the data indicated in the atomic write command is either all written to the solid-state storage device or none written to the solid-state storage device, with no other self-consequences. When two or more atomic write commands for writing data to the same or partially the same address exist at the same time, the atomic write commands are executed as if they were executed serially.
For example, referring to Table 1, an atomic write command A writes data to logical Address (LBA) LBA0-3 and an atomic write command B writes data to logical Address LBA1-4 (data written by atomic write command A is indicated by "A" and data written by atomic write command B is indicated by "B" in Table 1). Lines 2 and 3 of the table below show the results of the correct execution of command a and command B. Referring to Table 1, one possible result (as shown in row 2 of the Table below) is that LBA0-3 is the data written by write command A, and LBA 4 is the data written by write command B, in other words, write command B takes effect first, atomically updating LBA1-4, then write command A takes effect, and atomically updating LBA 0-3. Another possible result (as shown in row 3 of the Table below) is that LBA0 is the data written by write command A, and LBA 2-4 is the data written by write command B, in other words, write command A takes effect first, atomically updates LBA0-3, then write command B takes effect, and atomically updates LBA 1-4. Except for the two results mentioned above, none of the other results meet the NVMe specification requirements for atomic write commands.
TABLE 1
LBA 0 LBA 1 LBA 2 LBA 3 LBA 4 LBA 5 LBA 6
Effective result A A A A B
Effective result A B B B B
Invalid result A A B B B
Disclosure of Invention
In view of the above, the present application provides a method and apparatus for executing an atomic write command.
According to a first aspect of the present invention, there is provided a first atomic write command execution method according to the first aspect of the present invention, including: receiving an atomic write command from a host; acquiring a logic address to be accessed by an atomic write command; locking a logic address to be accessed by an atomic write command to an FTL table entry corresponding to the logic address; and if the locking is successful, processing the atomic write command.
According to the first atomic write command execution method of the first aspect of the present invention, there is provided the second atomic write command execution method of the first aspect of the present invention, further comprising: if the locking fails, the processing of the atomic write command is suspended until the locking is successful.
According to the first or second atomic write command execution method of the first aspect of the present invention, there is provided the third atomic write command execution method of the first aspect of the present invention, wherein the processing of the atomic write command includes: allocating a physical address for an atomic write command; writing data corresponding to the atomic write command into the allocated physical address; and recording the logical address to be accessed by the atomic write command and the allocated physical address in the locked FTL entry.
According to the first, second or third atomic write command execution method of the first aspect of the present invention, there is provided a fourth atomic write command execution method according to the first aspect of the present invention, further comprising: the atomic write command is split into a plurality of sub-commands, wherein each sub-command accesses a logical address range that does not exceed the logical address range indicated by one FTL entry.
According to a second aspect of the present invention, there is provided a first atomic write command execution method according to the second aspect of the present invention, wherein the atomic write command includes a plurality of sub-commands, the method comprising: sequencing the plurality of subcommands according to the logical address to be accessed by each subcommand; acquiring a first sub-command which is sequenced at the top in a plurality of unprocessed sub-commands in the plurality of sub-commands, and locking an FTL table entry corresponding to a first logic address to be accessed according to the first logic address to be accessed by the first sub-command; and if the locking of the FTL table entry corresponding to the first logic address is successful, acquiring a next sub-command according to the sequence of the sub-commands, and locking the FTL table entry corresponding to the second logic address according to a second logic address to be accessed by the next sub-command until the locking of the FTL table entries corresponding to the logic addresses to be accessed by each sub-command of all sub-commands belonging to the atomic write command is successful.
According to the first atomic write command execution method of the second aspect of the present invention, there is provided the second atomic write command execution method of the second aspect of the present invention, further comprising: and if the locking of the FTL table entry corresponding to the first logic address fails, stopping the execution of the atomic write command until the locking of the FTL table entry corresponding to the first logic address succeeds.
According to the second atomic write command execution method of the second aspect of the present invention, there is provided the third atomic write command execution method of the second aspect of the present invention, until the FTL entry corresponding to the first logical address is successfully locked, the next sub-command is obtained according to the ordering of the sub-commands.
According to the second or third atomic write command execution method of the second aspect of the present invention, there is provided the fourth atomic write command execution method of the second aspect of the present invention, wherein if the FTL entry has been locked, the subsequent locking of the FTL entry will fail.
According to the first to fourth atomic write command execution methods of the second aspect of the present invention, there is provided the fifth atomic write command execution method of the second aspect of the present invention, wherein if the FTL entry is not locked, the subsequent locking of the FTL entry will be successful.
According to one of the first to fifth atomic write command execution methods of the second aspect of the present invention, there is provided a sixth atomic write command execution method according to the second aspect of the present invention, further comprising: in response to the locking of the FTL entry corresponding to the logical address of the sub-command being successful, the sub-command is processed.
According to one of the first to fifth atomic write command execution methods of the second aspect of the present invention, there is provided a seventh atomic write command execution method according to the second aspect of the present invention, further comprising: in response to the FTL entries corresponding to the logical addresses of all the subcommands of the atomic write command being successfully locked, the subcommands corresponding to the atomic write command are processed.
According to one of the first to seventh atomic write command execution methods of the second aspect of the present invention, there is provided the eighth atomic write command execution method of the second aspect of the present invention, further comprising: receiving a second atomic write command from the host; splitting the second atomic write command into a second plurality of subcommands; ordering the second plurality of subcommands according to the logical address to be accessed by each subcommand; acquiring a third sub-command which is sequenced at the top in a plurality of unprocessed sub-commands in the second plurality of sub-commands, and locking an FTL table entry corresponding to a third logical address to be accessed according to the third logical address to be accessed by the third sub-command; and if the locking of the FTL table entry corresponding to the third logical address is successful, acquiring a next sub-command according to the sequence of the sub-commands, and locking the FTL table entry corresponding to the fourth logical address according to a fourth logical address to be accessed by the next sub-command until the locking of the FTL table entries corresponding to the logical addresses to be accessed by all the sub-commands belonging to the second atomic write command is successful.
According to the first to eighth atomic write command execution methods of the second aspect of the present invention, there is provided the ninth atomic write command execution method of the second aspect of the present invention, wherein the plurality of sub-commands belonging to the atomic write command are sorted in an ascending order of logical address values or sorted in a descending order of logical address values.
According to one of the first to ninth atomic write command execution methods of the second aspect of the present invention, there is provided the tenth atomic write command execution method according to the second aspect of the present invention, further comprising: releasing locks of FTL entries corresponding to all sub-commands of the atomic write command in response to all sub-commands belonging to the atomic write command having been processed.
According to a sixth to tenth atomic write command execution method of the second aspect of the present invention, there is provided the eleventh atomic write command execution method of the second aspect of the present invention, wherein the processing the sub-command includes: allocating a physical address for the sub-command; writing data corresponding to the sub-command into the allocated physical address; and recording the logical address to be accessed by the sub-command and the allocated physical address in the locked FTL entry.
According to a third aspect of the present invention, there is provided a first atomic command execution method according to the third aspect of the present invention, including: receiving an atomic read command from a host; acquiring a logic address to be accessed by an atomic read command; locking an FTL table entry corresponding to a logical address to be accessed according to an atomic read command; and if the locking is successful, processing the atomic read command.
According to the first atomic command execution method of the third aspect of the present invention, there is provided the second atomic command execution method of the third aspect of the present invention, further comprising: if the locking fails, the processing of the atomic read command is suspended until the locking is successful.
According to the first or second atomic command execution method of the third aspect of the present invention, there is provided the third atomic command execution method of the third aspect of the present invention, wherein the processing of the atomic read command includes: acquiring a physical address from an FTL table entry; and reading out data from the acquired physical address.
According to the first, second or third atomic command execution method of the third aspect of the present invention, there is provided a fourth atomic command execution method according to the third aspect of the present invention, further comprising: the atomic read command is split into a plurality of sub-commands, wherein each sub-command accesses a logical address range not exceeding the logical address range indicated by one FTL entry.
According to a fourth aspect of the present invention, there is provided a first atomic read command execution method according to the fourth aspect of the present invention, comprising: sequencing the plurality of subcommands according to the logical address to be accessed by each subcommand; acquiring a first sub-command which is sequenced at the top in a plurality of unprocessed sub-commands in the plurality of sub-commands, and locking an FTL table entry corresponding to a first logic address to be accessed according to the first logic address to be accessed by the first sub-command; and if the locking of the FTL table entry corresponding to the first logic address is successful, acquiring a next sub-command according to the sequence of the sub-commands, and locking the FTL table entry corresponding to the second logic address according to a second logic address to be accessed by the next sub-command until the locking of the FTL table entries corresponding to the logic addresses to be accessed by each sub-command of all sub-commands belonging to the atomic read command is successful.
According to the first atomic read command execution method of the fourth aspect of the present invention, there is provided the second atomic read command execution method of the fourth aspect of the present invention, further comprising: and if the locking of the FTL table entry corresponding to the first logic address fails, stopping the execution of the atomic read command until the locking of the FTL table entry corresponding to the first logic address succeeds.
According to the second atomic read command execution method of the fourth aspect of the present invention, there is provided the third atomic read command execution method of the fourth aspect of the present invention, until the FTL entry corresponding to the first logical address is successfully locked, the next sub-command is not obtained according to the ordering of the sub-commands.
According to the second or third atomic read command execution method of the fourth aspect of the present invention, there is provided the fourth atomic read command execution method of the fourth aspect of the present invention, wherein if an FTL entry is already locked, the subsequent locking of the FTL entry will fail.
According to a fifth atomic read command execution method of the fourth aspect of the present invention, there is provided an atomic read command execution method of the fourth aspect of the present invention, wherein if an FTL entry is not locked, then the subsequent locking of the FTL entry will be successful.
According to one of the first to fifth atomic read command execution methods of the fourth aspect of the present invention, there is provided a sixth atomic read command execution method according to the fourth aspect of the present invention, further comprising: in response to the locking of the FTL entry corresponding to the logical address of the sub-command being successful, the sub-command is processed.
According to one of the first to fifth atomic read command execution methods of the fourth aspect of the present invention, there is provided a seventh atomic read command execution method according to the fourth aspect of the present invention, further comprising: in response to the FTL entries corresponding to the logical addresses of all the subcommands of the atomic read command being successfully locked, the subcommands corresponding to the atomic read command are processed.
According to a fourth aspect of the present invention, there is provided an eighth atomic read command execution method, further comprising: receiving a second atomic read command from the host; splitting the second atomic read command into a second plurality of subcommands; ordering the second plurality of subcommands according to the logical address to be accessed by each subcommand; acquiring a third sub-command which is sequenced at the top in a plurality of unprocessed sub-commands in the second plurality of sub-commands, and locking an FTL table entry corresponding to a third logical address to be accessed according to the third logical address to be accessed by the third sub-command; and if the locking of the FTL table entry corresponding to the third logical address is successful, acquiring a next sub-command according to the sequence of the sub-commands, and locking the FTL table entry corresponding to the fourth logical address according to a fourth logical address to be accessed by the next sub-command until the locking of the FTL table entries corresponding to the logical addresses to be accessed by each sub-command of all sub-commands belonging to the second atomic read command is successful.
According to the first to eighth atomic read command execution methods of the fourth aspect of the present invention, there is provided the ninth atomic read command execution method of the fourth aspect of the present invention, wherein the plurality of sub-commands belonging to the atomic read command are sorted in an ascending order of logical address values or sorted in a descending order of logical address values.
According to one of the first to ninth atomic read command execution methods of the fourth aspect of the present invention, there is provided the tenth atomic read command execution method of the fourth aspect of the present invention, further comprising: releasing the locks of the FTL entries corresponding to all the sub-commands of the atomic read command in response to all the sub-commands belonging to the atomic read command being processed completely.
According to a sixth to tenth atomic read command execution method of the fourth aspect of the present invention, there is provided the eleventh atomic read command execution method of the fourth aspect of the present invention, wherein the processing the sub-command includes: acquiring a physical address from an FTL table entry corresponding to the logical address of the sub-command; and reading out data from the acquired physical address.
According to a fifth aspect of the present invention, there is provided a first atomic command execution method according to the fifth aspect of the present invention, including: receiving a first sub-command from a host, acquiring a first logical address to be accessed by the first sub-command, and acquiring the ordering of the first sub-command among a plurality of unprocessed sub-commands in an atomic command to which the first sub-command belongs; and if the first sub-command is sequenced at the top in the unprocessed sub-commands in the atomic command to which the first sub-command belongs, locking the FTL table entry corresponding to the first logical address according to the first logical address to be accessed by the first sub-command.
According to a first atomic command execution method of a fifth aspect of the present invention, there is provided the second atomic command execution method of the fifth aspect of the present invention, wherein the types of atomic commands include an atomic write command and an atomic read command.
According to the first or second atomic command execution method of the fifth aspect of the present invention, there is provided the third atomic command execution method according to the fifth aspect of the present invention, further comprising: if the first sub-command is not the first in the ordering among the plurality of unprocessed sub-commands in the atomic command to which it belongs, the processing of the first sub-command is suspended.
According to the first or second atomic command execution method of the fifth aspect of the present invention, there is provided the fourth atomic command execution method according to the fifth aspect of the present invention, further comprising: and if the locking of the FTL table entry corresponding to the first logic address to be accessed by the first sub-command is successful, processing the first sub-command.
According to one of the first to fourth atomic command execution methods of the fifth aspect of the present invention, there is provided the fifth atomic command execution method according to the fifth aspect of the present invention, further comprising: for all the sub-commands in the atomic command to which the first sub-command belongs, the locks of the FTL entries corresponding to all the sub-commands are not released until the locks of the FTL entries corresponding to the logical addresses to be accessed by each of all the sub-commands are successful.
According to a sixth aspect of the present invention, there is provided a first atomic command execution method according to the sixth aspect of the present invention, wherein the atomic command includes a plurality of subcommands, the method including: determining the type of an atomic command, and if the type of the atomic command is an atomic read command and the atomic read command needs to meet general atomicity, sequencing a plurality of subcommands according to the logical address to be accessed by each subcommand; acquiring a first sub-command which is sequenced at the top in a plurality of unprocessed sub-commands in the plurality of sub-commands, and locking an FTL table entry corresponding to a first logic address to be accessed according to the first logic address to be accessed by the first sub-command; and if the locking of the FTL table entry corresponding to the first logic address is successful, acquiring a next sub-command according to the sequence of the sub-commands, and locking the FTL table entry corresponding to the second logic address according to a second logic address to be accessed by the next sub-command until the locking of the FTL table entries corresponding to the logic addresses to be accessed by each sub-command of all sub-commands belonging to the atomic read command is successful.
According to the first atomic command execution method of the sixth aspect of the present invention, there is provided the second atomic command execution method of the sixth aspect of the present invention, further comprising: and if the locking of the FTL table entry corresponding to the first logic address fails, stopping the execution of the atomic read command until the locking of the FTL table entry corresponding to the first logic address succeeds.
According to the second atomic command execution method of the sixth aspect of the present invention, the third atomic command execution method of the sixth aspect of the present invention is proposed, and the next sub command is not obtained according to the ordering of the sub commands until the FTL entry corresponding to the first logical address is successfully locked.
According to the first, second or third atomic command execution method of the sixth aspect of the present invention, there is provided a fourth atomic command execution method of the sixth aspect of the present invention, further comprising: in response to the locking of the FTL entry corresponding to the logical address of the sub-command being successful, the sub-command is processed.
According to the first to fourth atomic command execution methods of the sixth aspect of the present invention, there is provided a fifth atomic command execution method of the sixth aspect of the present invention, further comprising: releasing the locks of the FTL entries corresponding to all the sub-commands of the atomic read command in response to all the sub-commands belonging to the atomic read command being processed completely.
According to the first to fifth atomic command execution methods of the sixth aspect of the present invention, there is provided the sixth atomic command execution method of the sixth aspect of the present invention, further comprising: if the atomic read command does not need to satisfy the general atomicity, each sub-command is processed without relying on the locking results and/or processing results for other sub-commands.
According to the fourth to sixth atomic command execution methods of the sixth aspect of the present invention, there is provided a seventh atomic command execution method of the sixth aspect of the present invention, wherein the processing of the subcommands comprises: acquiring a physical address from an FTL table entry corresponding to the logical address of the sub-command; and reading out data from the acquired physical address.
According to the first to seventh atomic command execution methods of the sixth aspect of the present invention, there is provided an eighth atomic command execution method of the sixth aspect of the present invention, further comprising: if the type of the atomic command is an atomic write command and the atomic write command needs to meet general atomicity or power-down atomicity, sequencing a plurality of subcommands according to the logic address to be accessed by each subcommand; acquiring a first sub-command which is sequenced at the top in a plurality of unprocessed sub-commands in the plurality of sub-commands, and locking an FTL table entry corresponding to a first logic address to be accessed according to the first logic address to be accessed by the first sub-command; and if the locking of the FTL table entry corresponding to the first logic address is successful, acquiring a next sub-command according to the sequence of the sub-commands, and locking the FTL table entry corresponding to the second logic address according to a second logic address to be accessed by the next sub-command until the locking of the FTL table entries corresponding to the logic addresses to be accessed by each sub-command of all sub-commands belonging to the atomic write command is successful.
According to an eighth atomic command execution method of the sixth aspect of the present invention, there is provided the ninth atomic command execution method of the sixth aspect of the present invention, further comprising: and if the locking of the FTL table entry corresponding to the first logic address fails, stopping the execution of the atomic write command until the locking of the FTL table entry corresponding to the first logic address succeeds.
According to a ninth atomic command execution method of the sixth aspect of the present invention, there is provided the tenth atomic command execution method of the sixth aspect of the present invention, until the FTL entry corresponding to the first logical address is successfully locked, the next sub-command is obtained according to the ordering of the sub-commands.
According to the eighth to tenth atomic command execution methods of the sixth aspect of the present invention, there is provided the eleventh atomic command execution method of the sixth aspect of the present invention, further comprising: in response to the locking of the FTL entry corresponding to the logical address of the sub-command being successful, the sub-command is processed.
According to the eighth to eleventh atomic command execution methods of the sixth aspect of the present invention, there is provided the twelfth atomic command execution method of the sixth aspect of the present invention, further comprising: releasing locks of FTL entries corresponding to all sub-commands of the atomic write command in response to all sub-commands belonging to the atomic write command having been processed.
According to the eighth to twelfth atomic command execution methods of the sixth aspect of the present invention, there is provided the thirteenth atomic command execution method of the sixth aspect of the present invention, further comprising: if the atomic write command does not need to satisfy normal atomicity or power-down atomicity, each sub-command is processed without relying on locking results and/or processing results for other sub-commands.
According to a seventh aspect of the present invention, there is provided a first atomic write command execution apparatus according to the seventh aspect of the present invention, comprising: a command receiving module for receiving an atomic write command from a host; the logic address acquisition module is used for acquiring a logic address to be accessed by the atomic write command; the locking module is used for locking the FTL table entry corresponding to the logical address according to the logical address to be accessed by the atomic write command; and the command processing module is used for processing the atomic write command if the locking is successful.
According to an eighth aspect of the present invention, there is provided a first atomic write command execution apparatus according to the eighth aspect of the present invention, wherein the atomic write command includes a plurality of sub-commands, the apparatus comprising: the subcommand sequencing module is used for sequencing the subcommands according to the logic address to be accessed by each subcommand; the subcommand acquisition module is used for acquiring a first subcommand which is sequenced at the top in a plurality of unprocessed subcommands in the subcommands; the locking module is used for locking the FTL table entry corresponding to the first logic address according to the first logic address to be accessed by the first sub-command; the sub-command obtaining module is further configured to obtain a next sub-command according to the ordering of the sub-commands if the FTL entry corresponding to the first logical address is successfully locked; and the locking module is further used for locking the FTL table entry corresponding to the second logical address according to the second logical address to be accessed by the next sub-command until the FTL table entries corresponding to the logical addresses to be accessed by each sub-command of all sub-commands belonging to the atomic write command are successfully locked.
According to a ninth aspect of the present invention, there is provided the first atomic command execution apparatus according to the ninth aspect of the present invention, comprising: a command receiving module for receiving an atomic read command from a host; the logic address acquisition module is used for acquiring a logic address to be accessed by the atomic read command; the locking module is used for locking the FTL table entry corresponding to the logical address according to the logical address to be accessed by the atomic read command; and the command processing module is used for processing the atomic read command.
According to a tenth aspect of the present invention, there is provided a first atomic read command executing apparatus according to the tenth aspect of the present invention, wherein the atomic read command includes a plurality of sub-commands, comprising: the subcommand sequencing module is used for sequencing the subcommands according to the logic address to be accessed by each subcommand; the subcommand acquisition module is used for acquiring a first subcommand which is sequenced at the top in a plurality of unprocessed subcommands in the subcommands; the locking module is further used for locking the FTL table entry corresponding to the first logic address according to the first logic address to be accessed by the first sub-command; if the FTL table entry corresponding to the first logical address is successfully locked, the sub-command obtaining module is further configured to obtain a next sub-command according to the ordering of the sub-commands; and the locking module is further configured to lock the FTL table entry corresponding to the second logical address according to the second logical address to be accessed by the next sub-command until all sub-commands belonging to the atomic read command complete the locking of the FTL table entry corresponding to the logical address to be accessed by each sub-command.
According to an eleventh aspect of the present invention, there is provided the first atomic command execution apparatus according to the eleventh aspect of the present invention, including: the command receiving module is used for receiving a first sub-command from the host; the logic address acquisition module is used for acquiring a first logic address to be accessed by the first sub-command; the sub-command ordering acquisition module is used for acquiring the ordering of the first sub-command in a plurality of unprocessed sub-commands in the atomic command to which the first sub-command belongs; and if the first sub-command is sequenced at the top in the unprocessed sub-commands in the atomic command to which the first sub-command belongs, the locking module is used for locking the FTL table entry corresponding to the first logical address according to the first logical address to be accessed by the first sub-command.
According to a twelfth aspect of the present invention, there is provided the first atomic command execution apparatus according to the twelfth aspect of the present invention, wherein the atomic command includes a plurality of sub-commands, characterized by comprising: the atomic command type determining module is used for determining the type of the atomic command; the logic address ordering module is used for ordering the plurality of subcommands according to the logic address to be accessed by each subcommand if the type of the atomic command is an atomic read command and the atomic read command needs to meet the common atomicity; the subcommand acquisition module is used for acquiring a first subcommand which is sequenced at the top in a plurality of unprocessed subcommands in the subcommands; the locking module is used for locking the FTL table entry corresponding to the first logic address according to the first logic address to be accessed by the first sub-command; the sub-command obtaining module is further configured to obtain a next sub-command according to the ordering of the sub-commands if the FTL entry corresponding to the first logical address is successfully locked; and the locking module is used for locking the FTL table entry corresponding to the second logic address according to the second logic address to be accessed by the next sub-command until the FTL table entry corresponding to the logic address to be accessed by each sub-command of all sub-commands belonging to the atomic read command is successfully locked.
According to a thirteenth aspect of the present invention, there is provided a first solid-state storage device according to the thirteenth aspect of the present invention, comprising a control unit and a memory external to the control unit, the control unit comprising a flash interface and at least one CPU, the CPU accessing the NVM chip in the solid-state storage device through the flash interface, storing an FTL table in the memory external to the control unit, the FTL table comprising a plurality of entries, the CPU being configured to execute the method according to the first or second aspect of the present invention.
According to a fourteenth aspect of the present invention, there is provided a first solid-state storage device according to the fourteenth aspect of the present invention, including a control unit and a memory external to the control unit, the control unit including a flash interface and at least one CPU, the CPU accessing an NVM chip in the solid-state storage device through the flash interface, storing an FTL table in the memory external to the control unit, the FTL table including a plurality of entries, the CPU being configured to receive an atomic read command from a host; acquiring a logic address to be accessed by an atomic read command; locking an FTL table entry corresponding to a logical address to be accessed according to an atomic read command; and if the locking is successful, processing the atomic read command.
According to a fifteenth aspect of the present invention, there is provided a first solid-state storage device according to the fifteenth aspect of the present invention, comprising a control unit and a memory external to the control unit, the control unit comprising a flash interface and at least one CPU, the CPU accessing the NVM chip in the solid-state storage device through the flash interface, an FTL table being stored in the memory external to the control unit, the FTL table comprising a plurality of entries, characterized in that the CPU is configured to perform the method according to the third, fourth, fifth or sixth aspect of the present invention.
According to a sixteenth aspect of the present invention, there is provided a program comprising program code which, when loaded into and executed on a solid state storage device, causes the solid state storage device to perform the atomic write command execution method according to the first aspect of the present invention.
According to a seventeenth aspect of the present invention, there is provided a program comprising program code which, when loaded into and executed on a solid-state storage device, causes the solid-state storage device to perform the atomic write command execution method according to the second aspect of the present invention.
According to an eighteenth aspect of the present invention, there is provided a program comprising program code which, when loaded into and executed on a solid-state storage device, causes the solid-state storage device to perform the atomic command execution method according to the third aspect of the present invention.
According to a nineteenth aspect of the present invention, there is provided a program comprising program code which, when loaded into and executed on a solid-state storage device, causes the solid-state storage device to perform the atomic read command execution method according to the fourth aspect of the present invention.
According to a twentieth aspect of the present invention, there is provided a program comprising program code which, when loaded into and executed on a solid-state storage device, causes the solid-state storage device to perform the method of executing an atomic command according to the fourth aspect of the present invention.
According to a twenty-first aspect of the present invention, there is provided a program comprising program code which, when loaded into and executed on a solid-state storage device, causes the solid-state storage device to perform the atomic command execution method according to the fourth aspect of the present invention.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained based on these drawings without creative efforts.
FIG. 1 is a block diagram of a prior art storage device;
FIG. 2 is a schematic diagram of a prior art control component accessing an FTL table;
FIG. 3 is a diagram illustrating an IO command and an IO subcommand according to an embodiment of the invention;
FIG. 4 is a flow diagram of processing an atomic write command according to an embodiment of the invention;
FIG. 5 is a diagram illustrating an atomic command according to an embodiment of the invention;
FIG. 6 is a diagram illustrating an FTL table in the process of processing the atomic command of FIG. 5, in accordance with an embodiment of the present invention;
FIG. 7 is a schematic diagram of yet another FTL table in the process of processing the atomic command of FIG. 5, in accordance with an embodiment of the present invention;
FIG. 8 is a diagram illustrating an atomic command according to yet another embodiment of the invention;
FIG. 9 is a diagram illustrating an FTL table in the process of processing the atomic command of FIG. 8, in accordance with an embodiment of the present invention;
FIG. 10 is a schematic diagram of yet another FTL table in the process of processing the atomic command of FIG. 8, in accordance with an embodiment of the present invention;
FIG. 11 is a schematic diagram of yet another FTL table in the process of processing the atomic command of FIG. 8, in accordance with an embodiment of the present invention;
FIG. 12 is a flow diagram of processing an atomic read command according to an embodiment of the invention.
FIG. 13 is a flow diagram of processing an atomic command according to an embodiment of the invention;
FIG. 14 is a diagram illustrating an atomic command according to yet another embodiment of the invention;
FIG. 15 is a diagram illustrating an FTL table in the process of processing the atomic command of FIG. 14, in accordance with an embodiment of the present invention;
FIG. 16 is a schematic diagram of yet another FTL table in the process of processing the atomic command of FIG. 14, in accordance with an embodiment of the present invention;
FIG. 17 is a schematic diagram of yet another FTL table in the process of processing the atomic command of FIG. 14, in accordance with an embodiment of the present invention;
FIG. 18 is a diagram illustrating an atomic command according to yet another embodiment of the invention;
FIG. 19 is a diagram illustrating an FTL table in the process of processing the atomic command of FIG. 18, in accordance with an embodiment of the present invention;
FIG. 20 is a schematic diagram of yet another FTL table in the process of processing the atomic command of FIG. 18, in accordance with an embodiment of the present invention;
FIG. 21 is a schematic diagram of yet another FTL table in the process of processing the atomic command of FIG. 18, in accordance with an embodiment of the present invention;
FIG. 22 is a diagram illustrating an atomic command according to yet another embodiment of the invention;
FIG. 23 is a diagram illustrating an FTL table in the process of processing the atomic command of FIG. 22, in accordance with an embodiment of the present invention;
FIG. 24 is a schematic diagram of yet another FTL table in the process of processing the atomic command of FIG. 22, in accordance with an embodiment of the present invention;
FIG. 25 is a schematic diagram of yet another FTL table in the process of processing the atomic command of FIG. 22, in accordance with an embodiment of the present invention;
fig. 26 is a diagram illustrating another FTL table in processing the atomic command of fig. 22 according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
A table structure storing mapping information from logical addresses to physical addresses is called an FTL table. FTL tables are important metadata in solid state storage devices. The FTL table records the address mapping relationship in the storage device in units of data pages. The FTL table includes a plurality of entries (or entries) of FTL table.
In one example, the table entry of each FTL table records a correspondence relationship between a logical page address and a physical page. As another example, each entry of the FTL table records a correspondence relationship between a logical address and a physical address, and data corresponding to each entry is called a data frame, and the size of the data frame may be 512 bytes or 4 kbytes.
In another example, the table entries of each FTL table record the correspondence between consecutive logical page addresses and consecutive physical pages. In another embodiment, the table entry of each FTL table records the corresponding relationship between the logical block address and the physical block address. In still another example, the FTL table records the mapping relationship between logical block addresses and physical block addresses, and/or the mapping relationship between logical page addresses and physical page addresses.
Table 2 shows an exemplary FTL table. The physical page addresses corresponding to the logical addresses LBA0-LBA7 are shown in Table 2, with the physical addresses being in the form of "a-b", with the preceding symbol a indicating the physical block address and the succeeding symbol b indicating the physical page address. Taking Physical block 1 as an example, a Physical page having a Physical Black Address (PBA) of "PBA 1-4" stores data having a logical Address of "LBA 0".
TABLE 2
LBA0 PBA 1-4
LBA1 PBA 3-6
LBA2 PBA 1-9
LBA3 PBA 1-10
LBA4 PBA 3-15
LBA5 PBA 3-13
LBA6 PBA 3-3
LBA7 PBA 1-15
Fig. 2 is a schematic diagram of a prior art control component accessing an FTL table. The control section 204 includes a plurality of CPUs (CPU 210, CPU 212, and CPU 214) and a flash interface through which the CPU of the control section accesses the NVM chip in the solid-state storage device. The FTL table is stored in a memory external to control component 204 and includes a plurality of entries (entry 220, entry 222, and entry 224). Each of the plurality of CPUs can independently access the FTL table. Since FTL entries may be accessed by multiple CPUs simultaneously, to achieve data consistency, a lock is provided for each FTL entry.
Referring to fig. 2, to update the FTL entry 224, the CPU 210 checks the lock 234 of the FTL entry 224, and in case the lock 234 indicates that the FTL entry 224 is not locked, the CPU 210 obtains the lock 234 (e.g., sets the lock 234 to the locked state) and acquires the FTL entry 224 (time t 1). Next, the CPU 210 operates on the retrieved FTL entry 224 and updates the FTL entry 224 at time t4 and releases the lock 234 (e.g., sets the lock 234 to an unlocked state). During times t1-t4, the other CPUs (CPU 212 and CPU 214) retrieve the presence of lock 234 and temporarily relinquish access to the FTL entry 224. In FIG. 2, at time t2, the CPU 212 attempts to access the FTL entry 224, but finds that the lock 234 cannot be obtained, and then relinquishes access to the FTL entry 224. Similarly, the CPU214 may also relinquish access to the FTL entry 224 at time t3 because the lock 234 is not available. After time t4, however, CPU 210 releases lock 234 and the CPU 212 and the CPU214 that preempted lock 234 will access FTL entry 234. In another example, during the time period t1-t4, one task of the CPU 210 acquires the lock 234, while another task in the CPU 210 temporarily relinquishes access to the FTL entry 224 because the lock 234 was not acquired.
The lock of the FTL entry may be stored in the same location of the corresponding FTL entry, or the locks of a plurality of FTL entries may be collectively stored in another storage space.
The logical address ranges to which the FTL entries correspond are all aligned at a specified position (e.g., aligned at 4KB with a start address at an integer multiple of 4KB, e.g., 0, 4KB, 8 KB). For example, the first address of the logical address range corresponding to the FTL entry is used as the address of the FTL entry.
It will be appreciated that locks may be utilized to ensure data coherency when processing multiple IO commands, and/or multiple subcommands of an IO command, in parallel, even though control component 204 includes only a single CPU.
According to an embodiment of the present invention, a solid state storage device receives an IO command from a host. The IO command may indicate that it is an atomic operation.
In some cases, the logical address range accessed by the IO command is less than the range indicated by the FTL entry. For example, the FTL entry indicates a range of 4KB logical addresses, and the IO command writes data to 2KB of the 4KB range. Accessing an FTL entry may respond to the IO command. In still other cases, the logical address range accessed by the IO command (e.g., 128KB) is greater than the logical address range of the FTL entry (e.g., 4KB), in which case the IO command is split into multiple sub-commands, each sub-command accessing a logical address range that does not exceed the logical address range of one FTL entry. To process each sub-command, the corresponding FTL entry is accessed according to the logical address of the sub-command.
FIG. 3 is a diagram illustrating an IO command and an IO subcommand according to an embodiment of the invention. By way of example, IO commands 310 access a logical address space of 1KB to 10KB, while each FTL entry corresponds to a 4KB address space. To process the IO command 310, the IO command 310 is split into a sub-command 312, a sub-command 314, and a sub-command 316. Sub-command 312 accesses a 3KB logical address range of 1KB-3KB, sub-command 314 accesses a 4KB logical address range of 4KB, and sub-command 316 accesses an 8KB-10KB 3KB address range. The range of logical addresses accessed by each sub-command does not exceed the logical address range of one FTL entry.
Optionally, the logical address spaces corresponding to the IO commands do not need to be continuous, and the logical address spaces of the subcommands do not need to be continuous.
Example one
Fig. 4 is a flowchart of processing an atomic write command according to a first embodiment of the invention. To process an atomic write command that includes multiple subcommands, the subcommands belonging to the same atomic write command are ordered (401) by the value of the logical address accessed by the subcommand. And processing the first sub-command at each time, and processing the next sub-command according to the sequence of the logical addresses of the plurality of unprocessed sub-commands after the processing is finished.
When a sub-command is processed, according to the logical address accessed by the sub-command, locking (402) is requested to the FTL table entry corresponding to the logical address. To perform locking, the locking operation fails when the lock of the FTL entry indicates that the entry has been locked. If the lock of the FTL entry indicates that the entry is not locked, the locking operation will be successful, and the lock of the FTL entry is set to the locked state. If the locking operation is unsuccessful, the attempt to lock the FTL entry may be repeated or repeatedly until the locking operation is successful. Until the locking operation is successful, the sub-command is not processed, nor are other sub-commands of the atomic write command ordered after the sub-command processed.
In response to the locking success, the sub-command is processed, for example, a physical address is allocated for the sub-command, data corresponding to the sub-command is written to the allocated physical address, and the logical address and the allocated physical address of the sub-command are recorded in the locked FTL entry (403). Optionally, the solid state storage device ensures that processing of the subcommand will be performed after the locking is successful. Even if abnormal events such as power failure occur in the sub-command processing process, the solid-state storage device still ensures that the sub-command processing is executed and completed by using the standby power supply.
Next, it is determined whether all FTL entries corresponding to all subcommands of the atomic write command have been locked (404). If not all are locked, the next sub-command is processed (402) in the order of the logical addresses of the plurality of sub-commands that are not processed. If the FTL entries corresponding to all sub-commands of the atomic write command have been locked, the processing of these multiple sub-commands can be continued to be completed (405). Until all sub-commands of the atomic write command are processed, the locks of the FTL entries corresponding to all sub-commands are released, so that the locks of the FTL entries corresponding to all sub-commands indicate that the entry is not locked (406).
Alternatively, the order of step 403 and step 404 may be interchanged. In step 402, after the lock of the corresponding FTL entry is obtained for the sub-command ordered before, it can be directly determined whether there are other sub-commands to be processed through step 404. And returning to step 402 to request a lock for the FTL entry corresponding to the logical address of the next subcommand in the ordered plurality of subcommands. And the one or more subcommands to obtain the lock are processed 403 by performing 403 on the subcommand. Step 406 needs to occur after determining that all FTL entries corresponding to all subcommands of the atomic write command have been locked in step 404.
Optionally, execution is complete at step 405 and step 406 is executed. Or after it is determined in step 404 that all FTL entries corresponding to all sub-commands of the atomic write command have been locked, releasing the lock of the FTL entry corresponding to the logical address of the processed sub-command according to the logical address sequence of the sub-commands of the atomic write command.
In the first embodiment according to the present application, when each atomic write command is processed, two conditions are satisfied:
(1) locking an FTL table entry corresponding to each sub-command according to the sequence of the values of the logical addresses of a plurality of sub-commands of the atomic write command, and processing the next sub-command ordered according to the value of the logical address only after the locking is successful;
(2) after the corresponding FTL entries are updated according to all the sub-commands of the atomic write command, the locks of the FTL entries corresponding to all the sub-commands of the atomic write command are released.
Alternatively, if there is an atomic read command or its subcommand to be processed during processing of an atomic write command, there is no need to check whether the associated FTL entry is locked or not and to lock the associated FTL entry for processing the atomic read command or its subcommand when processing the atomic read command. It will be appreciated that when processing an atomic read command, the atomic read command may also be processed with the lock acquired.
Optionally, the plurality of subcommands of the atomic write command are sorted according to the logical address order, may be sorted according to the ascending order of the logical address values, and may also be sorted according to the descending order of the logical address values. Whichever approach is taken as a basis for ordering, the same ordering approach is used for multiple atomic write commands processed.
In the embodiment according to the present application, in the case where the above-described two conditions are satisfied, a plurality of subcommands of a plurality of atomic write commands can be processed in parallel.
Example two
FIG. 5 is a diagram illustrating an atomic command according to a second embodiment of the present invention. Fig. 6 and 7 are schematic diagrams of FTL tables in processing the atomic command of fig. 5. Fig. 5 illustrates an atomic write command a and an atomic write command B received by the solid-state storage device from the host. The atomic write command a includes 3 sub-commands (X (t1), X +1(t5) and X +2(t3)), and the atomic write command B includes 3 sub-commands (X (t4), X +1(t2) and X +2(t 6)). In FIG. 5, the subcommands are indicated by each box, e.g., one of the subcommands is represented by X (t1), X indicates the logical address accessed by the subcommand, t1 indicates the time of receipt of the subcommand, and the size of the number indicates the chronological order.
At time t1, the data of sub-command X (t1) of atomic write command A is received. The multiple subcommands of the atomic write command a are processed in logical address order. Since sub-command X (t1) is the first logical address ordered sub-command of the plurality of sub-commands of atomic write command A, sub-command X (t1) may be processed (see also FIG. 4, step 402). Lock is applied for FTL table entry 610 (see fig. 6) corresponding to the logical address X, and the application is successful; in FIG. 6, lock A (t1) corresponding to FTL entry 610 indicates that the lock of the entry belongs to atomic write command A. It will be appreciated that a lock recorded in memory may only indicate the presence of the lock, and not the object to which the lock belongs.
At time t2, the data of sub-command X +1(t2) of atomic write command B is received. Since it is necessary to process the sub-commands of the atomic write command B in the order of logical addresses, and of the sub-commands of the atomic write command B, the data of the sub-command X (t4) whose logical address is ordered before is not yet received, it is impossible to start processing the sub-command X +1(t 2).
At time t3, the data of sub-command X +2(t3) of atomic write command A is received. Since it is necessary to process the sub-commands of the write atomic command a in the order of logical addresses, and of the sub-commands of the atomic write command a, data of the sub-command X +1(t5) whose logical address is ordered before is not yet received, it is impossible to start processing the sub-command X +2(t 3).
At time t4, the data of sub-command X (t4) of atomic write command B is received. The plurality of sub-commands of the atomic write command B are processed in order of logical addresses, and sub-command X (t4) is the first sub-command in logical address order among the plurality of sub-commands of the atomic write command B that have not been processed, and thus sub-command X can be processed (t 4). To process X (t4), a lock is requested for FTL entry 610 for logical address X, at which point lock A (t1) belongs to atomic write command A, and thus requesting a lock for FTL entry 610 for logical address X for atomic write command B fails, at which point processing of sub-command X cannot begin (t 4).
At time t5, data of the sub-command X +1(t5) of the atomic write command a is received, and the plurality of sub-commands of the atomic write command a are processed in the order of the logical addresses, where the sub-command X +1(t5) is the first-ranked sub-command of the plurality of sub-commands for which the atomic write command a has not obtained a lock, so that the FTL entry 612 (see fig. 6) corresponding to the logical address X +1 of the sub-command X +1(t5) applies for the lock and the application is successful; the lock A (t5) corresponding to FTL entry 612 indicates that the lock of the entry belongs to atomic write command A.
Since the 2 nd sub-command X +1(t5) ordered by logical address of the atomic write command a applies for the lock, the 3 rd sub-command X +2(t3) of the atomic write command a may be processed next, and the lock is applied for the FTL entry 614 (see fig. 6) corresponding to the logical address X +2, and the application is successful; lock A (t3) corresponding to FTL entry 614 indicates that the lock of the entry belongs to atomic write command A. And releasing the locks of all sub-commands belonging to the atomic write command A (see also FIG. 4, step 406) after the processing of all sub-commands of the atomic write command A is completed (see also FIG. 4, step 404).
Next, it is checked whether the processing opportunities of other subcommands waiting to be executed are satisfied. The sub-command X (t4) of the atomic write command B, which is the first-ordered logical address sub-command of the plurality of sub-commands of the atomic write command B, applies for sub-command X (t4) a lock B (t4) that gets FTL entry 710 (see FIG. 7) for the logical address X of sub-command X (t 4). Since the 1 st sub-command X (t4) for the atomic write command B applies for a lock, the 2 nd sub-command X +1 for the atomic write command B may be processed next (t2) and successfully applied for a lock B (t2) for the FTL entry 712 (see FIG. 7) for logical address X + 1. Next, at time t6, the 3 rd sub-command X +2 of the atomic write command B is received (t6), and the factor command X +2(t6), which is the first-ordered sub-command of the unprocessed sub-commands of the atomic write command B, may be processed and successfully applied for lock B (t6) of the FTL entry 714 (see FIG. 7) for logical address X + 2. And releasing the locks of all sub-commands belonging to the atomic write command B (see also FIG. 4, step 406) after all sub-command processing of the atomic write command B is complete (see also FIG. 4, step 404).
Referring to table 3, the second row shows the effective result after the atomic write command a completes execution according to the second embodiment of the present invention: among the logical addresses LBA (X), (X +1), (X +2) are data X (t1), X +1(t5), and X +2(t3), respectively, written by the atomic write command a. The third row of Table 3 shows the valid results after completion of execution of atomic write command B: among LBA (X), LBA (X +1), and LBA (X +2) are data X (t4), X +1(t2), and X +2(t6), respectively, written by the atomic write command B. Thus, it is ensured that in the range of the logical addresses X to X +2, a case where part of the logical addresses are data written by the atomic write command a and part of the logical addresses are data written by the atomic write command B does not occur, and atomicity of atomic write command processing is achieved.
TABLE 3
Figure BDA0001246801710000111
EXAMPLE III
FIG. 8 is a diagram of an atomic command according to a third embodiment of the invention. Fig. 9 to 11 are schematic diagrams of FTL tables in processing the atomic command of fig. 8. Fig. 8 illustrates an atomic write command C, an atomic write command D, and an atomic write command E that the solid-state storage device receives from a host. The atomic write command C includes subcommands (X (t1), X +1(t5), and X +2(t 6)); the atomic write command D includes subcommands (X (t7), X +1(t8), and X +2(t 9)); the atomic write command D includes subcommands (X +1(t2), X +2(t3), and X +3(t 4)). In FIG. 8, the subcommands are indicated by each box, e.g., one of the subcommands is represented by X (t1), X indicates the logical address accessed by the subcommand, t1 indicates the time of receipt of the subcommand, and the size of the number indicates the chronological order.
At time t1, the data of sub-command X (t1) of atomic write command C is received. The multiple subcommands of the atomic write command C are processed in logical address order. Since sub-command X (t1) is the first logical address ordered sub-command of the plurality of sub-commands of atomic write command C, sub-command X (t1) may be processed (see also FIG. 4, step 402). A lock is applied for FTL entry 910 (see fig. 9) corresponding to logical address X, and the application is successful. In FIG. 9, lock C (t1) corresponding to FTL entry 910 indicates that the lock of the entry belongs to atomic write command C. It will be appreciated that a lock recorded in memory may only indicate the presence of the lock, and not the object to which the lock belongs.
At time t2, the data of sub-command X +1(t2) of atomic write command E is received. The sub-commands of the atomic write command E are processed in logical address order. Since sub-command X +1(t2) is the first logical address ordered sub-command of the plurality of sub-commands of atomic write command E, sub-command X +1(t2) may be processed (see also FIG. 4, step 402). Applying for a lock and successfully applying for an FTL entry 912 (see fig. 9) corresponding to the logical address X +1 of the sub-command X +1(t 2); the lock E (t2) corresponding to the FTL entry 912 indicates that the lock of the entry belongs to the atomic write command E.
At time t3, the data of sub-command X +2(t3) of atomic write command E is received. The sub-commands of the atomic write command E are processed in the order of logical addresses. The sub command X +2(t3) is the sub command with the logical address ordering first among the plurality of sub commands of the atomic write command E that have not been processed, and thus the sub command X +2(t3) can be processed. A lock is applied for the FTL entry 914 (see FIG. 9) corresponding to the logical address X +2 of the sub-command X +2(t3), and the application is successful, Lock E (t3) corresponding to the FTL entry 914 indicates that the lock of the entry belongs to the atomic write command E.
At time t4, the data of sub-command X +3(t4) of atomic write command E is received. The plurality of sub-commands of the write command E are processed in the order of logical addresses. The sub command X +3(t4) is the sub command with the logical address ordering first among the plurality of sub commands of the atomic write command E that have not been processed, and thus the sub command X +3(t4) can be processed. The lock is applied for the FTL entry 916 (see fig. 9) corresponding to the logical address X +3 of the sub-command X +3(t4), and the application is successful. The lock E (t4) corresponding to the FTL entry 916 indicates that the lock of the entry belongs to the atomic write command E. And releasing the locks of all sub-commands belonging to the atomic write command E (see also fig. 4, step 406) after the processing of all sub-commands of the atomic write command E is completed (see also fig. 4, step 404).
At time t5, the data of sub-command X +1(t5) of atomic write command C is received. The multiple subcommands of the atomic write command C are processed in logical address order. Since the sub-command X +1(t5) is the sub-command with the highest logical address order among the plurality of sub-commands of the atomic write command C that have not been processed, the sub-command X +1(t5) can be processed. Applying for a lock for the FTL entry 912 (see fig. 10) corresponding to the logical address X +1 of the sub-command X +1(t5), and the application is successful; lock C (t5) corresponding to FTL entry 912 indicates that the lock of the entry belongs to atomic write command C.
At time t6, the data of sub-command X +2(t6) of atomic write command C is received. Since the sub-command X +2(t) is the sub-command with the highest logical address order among the plurality of sub-commands of the atomic write command C that have not been processed, the sub-command X +2(t6) can be processed. The lock is applied for FTL entry 914 (see fig. 10) corresponding to logical address X +2 of sub-command X +2(t6), and the application is successful. Lock C (t6) corresponding to FTL entry 914 indicates that the lock of the entry belongs to atomic write command C. And releasing the locks of all sub-commands belonging to the atomic write command C (see also fig. 4, step 406) after all sub-command processing of the atomic write command C is completed (see also fig. 4, step 404).
And in comparison to fig. 9, in fig. 10, the lock of FTL entry 916 has been released.
At time t7, the data of sub-command X (t7) of atomic write command D is received. Since the sub-command X (t7) is the logical address order-first sub-command among the plurality of sub-commands of the atomic write command D that have not been processed, the sub-command X (t7) can be processed. The lock is applied for FTL entry 910 (see fig. 11) corresponding to logical address X of sub-command X (t7), and the application is successful. Lock D (t7) corresponding to FTL entry 910 indicates that the lock of the entry belongs to atomic write command D.
At time t8, the data of sub-command X +1(t8) of atomic write command D is received. Since the sub-command X +1(t8) is the sub-command with the highest logical address order among the plurality of sub-commands of the atomic write command D that have not been processed, the sub-command X +1(t8) can be processed. The lock is applied for FTL entry 912 (see fig. 11) corresponding to logical address X +1 of sub-command X +1(t8), and the application is successful. The lock D (t8) corresponding to FTL entry 912 indicates that the lock of this entry belongs to atomic write command D.
At time t9, data for sub-command X +2(t9) of atomic write command D is received. Since the sub-command X +2(t9) is the sub-command with the highest logical address order among the plurality of sub-commands of the atomic write command D that have not been processed, the sub-command X +2(t9) can be processed. The lock is applied for FTL entry 914 (see fig. 11) corresponding to logical address X +2 of sub-command X +2(t9), and the application is successful. The lock D (t9) corresponding to FTL entry 914 indicates that the lock of the entry belongs to atomic write command D. And releasing the locks of all sub-commands belonging to the atomic write command D (see also FIG. 4, step 406) after all sub-command processing of the atomic write command D is completed (see also FIG. 4, step 404).
Referring to table 4, the second row shows the effective result after the atomic write command E is executed according to the third embodiment of the present invention: the logical addresses LBA (X +1), LBA (X +2), and LBA (X +3) are data X +1(t2), X +2(t3), and X +3(t4) written by the atomic write command E, respectively, and the logical address LBA (X) is data X (t1) written by the atomic write command C. The third row of Table 4 shows the results valid after completion of execution of atomic write command C: among the logical addresses LBAX, LBA (X +1), and LBA (X +2) are data X (t1), X +1(t5), and X +2(t6) written by the atomic write command C, respectively, and at LBA (X +3), data X +3(t4) written by the atomic write command E is reserved. The fourth row of Table 4 shows valid results after completion of execution of atomic write command D: at the logical addresses LBA (X), (LBA (X + 1)), and LBA (X +2), the data X (t7), X +1(t8), and X +2(t9) written by the atomic write command D are stored, and at the logical address LBA (X +3), the data X +3(t4) written by the atomic write command E is reserved.
TABLE 4
Figure BDA0001246801710000131
According to the second or third embodiments of the present application, optionally, if there is a read command or a sub-command thereof to be processed during processing of the atomic write command, it is not necessary to check whether the relevant FTL entry is locked or not and to lock the relevant FTL entry for processing the read command or the sub-command thereof when processing the read command. It will be appreciated that while processing read commands, the read commands may also be processed with the lock acquired.
By processing the Atomic Write command in the above-disclosed manner, the requirement of an NVMe protocol on Power-down Atomicity (AWUPF) can be met, and the processing behavior of the solid-state storage device on the Write operation when the Write operation is interrupted by Power-down or other error conditions is guaranteed. The solid state storage device ensures that if command processing fails due to a power loss or other error condition, then subsequent read commands to the logical address associated with the failed command will result in: (1) all old data (original data at logical addresses accessed by the interrupted write command); or (2) all new data (all data written by the interrupted write command).
Example four
General atomicity (AWUN, Atomic Write Unit Normal) is also defined in the NVMe specification. The general atomicity defines the atomicity of command execution relative to other commands, ensuring that a write command is atomic relative to other read or write commands. In addition to requiring that the data written to the NVM chip does not contain part of the data of the new command and part of the data of other commands besides the new command at the same time, it is also necessary to ensure that the data read by the read command issued by the host does not contain part of the data of the new command and part of the data of other commands besides the new command at the same time.
In an embodiment according to the present application, a solid-state storage device implements general Atomicity (AWUN) compliant with NVMe specification requirements by implementing atomic processing of read commands and atomic processing of write commands simultaneously.
FIG. 12 is a flowchart of processing an atomic read command according to a fourth embodiment of the invention. An atomic read command may be split into multiple subcommands, each having an accessed logical address. To process an atomic read command that includes multiple subcommands, the subcommands belonging to the same atomic read command are ordered (121) by the value of the logical address accessed by the subcommand. And processing the first sub-command at each time, and processing the next sub-command according to the sequence of the logical addresses of the plurality of unprocessed sub-commands after the processing is finished.
When a sub-command is processed, according to the logical address accessed by the sub-command, locking (122) is requested to the FTL table entry corresponding to the logical address. To perform locking, the locking operation fails when the lock of the FTL entry indicates that the entry has been locked. If the lock of the FTL entry indicates that the entry is not locked, the locking operation will be successful, and the lock of the FTL entry is set to be locked state. If the locking operation is unsuccessful, the attempt to lock the FTL entry may be repeated or repeatedly until the locking operation is successful. The subcommand is not processed until the locking operation is successful. The other subcommands that follow the subcommand in the ordering of the atomic write command are not processed.
In response to the locking being successful, the sub-command is processed (123), e.g., the corresponding physical address is retrieved based on the logical address of the sub-command, and data is read from the retrieved physical address.
Next, it is determined whether all FTL entries corresponding to all subcommands of the atomic write command have been locked (124). If not all are locked, the next sub-command is processed (122) in the order of the logical addresses of the plurality of sub-commands that were not processed. If the FTL entries corresponding to all sub-commands of the atomic write command have been locked, the processing of these multiple sub-commands can be continued (125). Until all sub-commands of the atomic read command are processed, the locks (126) of the FTL entries corresponding to all sub-commands are released, so that the locks of the FTL entries corresponding to all sub-commands indicate that the corresponding entries are not locked.
Alternatively, the order of step 123 and step 124 may be interchanged. After obtaining the lock for the corresponding FTL entry for the sub-command ordered before in step 122, it can be directly determined whether there are other sub-commands to be processed in step 124. And returns to step 122 to request a lock for the FTL entry corresponding to the logical address of the next subcommand in the ordered plurality of subcommands. And processing (123) the sub-command by performing step 123 on the one or more sub-commands to obtain the lock. Step 126 needs to occur after determining that all FTL entries corresponding to all subcommands of the atomic read command have been locked in step 124.
Optionally, execution is complete at step 125 and step 126 is performed. Or after it is determined in step 124 that all FTL entries corresponding to all sub-commands of the atomic read command have been locked, the lock of the FTL entry corresponding to the logical address of the processed sub-command is released according to the logical address sequence of the sub-commands of the atomic read command.
Optionally, after the FTL entries corresponding to the sub-command of the atomic read command are successfully locked, the sub-command may be processed, and data is read from the physical address according to the physical address obtained from the FTL entry, as the data required by the sub-command, without waiting for all FTL entries corresponding to all sub-commands of the read command to be successfully locked.
In the fourth embodiment according to the present application, when each atomic read command is processed, two conditions are satisfied:
(1) locking an FTL table entry corresponding to each sub-command according to the sequence of the values of the logical addresses of a plurality of sub-commands of the atomic read command, and processing the next sub-command ordered according to the value of the logical address only after the locking is successful;
(2) after all the sub-commands of the atomic read command acquire the corresponding locks of the FTL entries and the physical addresses recorded in the FTL entries, the locks of the FTL entries corresponding to all the sub-commands of the atomic read command are released.
Optionally, the sub-commands of the atomic read command are sorted according to the logical address order, may be sorted according to the ascending order of the logical address values, and may also be sorted according to the descending order of the logical address values. Whichever approach is taken as a basis for ordering, the same ordering is used for multiple atomic read commands and/or atomic write commands processed.
In the embodiment according to the present application, in the case where the above-described two conditions are satisfied, a plurality of subcommands of a plurality of atomic read commands can be processed in parallel.
EXAMPLE five
FIG. 13 is a flowchart of processing an atomic command according to an embodiment of the invention. In an embodiment five according to the present invention, the solid state storage device receives an atomic command from the host, where the type of the atomic command is indicated in the atomic command (e.g., an atomic read command or an atomic write command), and if the type of the atomic command is an atomic read command (130), determines whether the atomic read command needs to satisfy the general atomicity (1310).
In one example, if the atomic read command needs to satisfy the general atomicity and the atomic read command is split into a plurality of subcommands, the atomic read command is processed according to the flow shown in fig. 12 (see also the description of the fourth embodiment) (see fig. 12).
If the atomic read command does not need to satisfy the normal atomicity, then each sub-command belonging to the atomic read command is processed directly without checking whether the associated FTL entry is locked or not and without locking the associated FTL entry for processing the atomic read command or its sub-commands (1330).
If the type of atomic command is an atomic write command, a determination is made as to whether the atomic write command requires general atomicity or power-down atomicity (1340). If the atomic write command needs to satisfy general atomicity or power-down atomicity and the atomic write command includes a plurality of subcommands, the atomic write command is processed according to the flow shown in fig. 4 (see also the description of the first embodiment).
Thus, in the fifth embodiment, if the solid-state storage device needs to satisfy the power-down atomicity, the atomic write command is processed according to the flow shown in fig. 4, and the atomic read command is processed without constraint (it is not necessary to request locks for the sub-commands in the order of logical addresses). If the solid-state storage device needs to satisfy the general atomicity, the atomic write command is processed according to the flow shown in fig. 4, and the atomic read command is processed according to the flow shown in fig. 12.
EXAMPLE six
FIG. 14 is a diagram of an atomic command according to an embodiment six of the invention. Fig. 15 to 17 are schematic diagrams of FTL tables in processing the atomic command of fig. 14. Fig. 14 shows an atomic write command F, an atomic read command G, and an atomic write command H that the solid-state storage device receives from the host. The atomic write command F includes subcommands (X (t1), X +1(t2), and X +2(t 3)); the atomic read command G includes subcommands (X (t4), X +1(t8) and X +2(t 9)); the atomic write command H includes subcommands (X (t5), X +1(t6), and X +2(t 7)). In FIG. 14, the subcommands are indicated by each box, e.g., one of the subcommands is represented by X (t1), X indicates the logical address accessed by the subcommand, t1 indicates the time of receipt of the subcommand, and the size of the number indicates the chronological order. In the sixth embodiment, the atomic command shown in fig. 14 is processed according to the flowchart shown in fig. 13.
At time t1, the data of sub-command X (t1) of atomic write command F is received. The multiple subcommands of the atomic write command F are processed in logical address order. Since the subcommand X (t1) is the most logically ordered subcommand of the plurality of subcommands of the atomic write command F, the subcommand X (t1) may be processed (see also FIG. 4, step 402, FIG. 13, step 1344). A lock is applied for FTL entry 1510 corresponding to logical address X of sub-command X (t1) (see fig. 15), and the application is successful. In fig. 15, lock F (t1) corresponding to FTL entry 1510 indicates that the lock of the entry belongs to atomic write command F.
At time t2, the data of sub-command X +1(t2) of atomic write command F is received. The multiple subcommands of the atomic write command F are processed in logical address order. The sub command X +1(t2) is the sub command with the logical address ordering first among the plurality of sub commands of the atomic write command F that have not been processed, and thus the sub command X +1(t2) can be processed. The lock is applied for FTL entry 1512 corresponding to logical address X +1 of the sub-command X +1(t2) (see fig. 15), and the application is successful. The lock F (t2) corresponding to the FTL entry 1512 indicates that the lock of the entry belongs to the atomic write command F.
At time t3, the data of sub-command X +2(t3) of atomic write command F is received. The multiple subcommands of the atomic write command F are processed in logical address order. The sub command X +2(t3) is the sub command with the logical address ordering first among the plurality of sub commands of the atomic write command F that have not been processed, and thus the sub command X +2(t3) can be processed. Apply for a lock, and successfully for FTL entry 1514 (see fig. 15) corresponding to logical address X +2 of subcommand X +2(t 3); the lock F (t3) corresponding to FTL entry 1514 indicates that the lock of this entry belongs to atomic write command F. Next, after all sub-command processing for atomic write command F is complete (see also FIG. 4, step 405, FIG. 13, step 1350), the lock on FTL entry 1510, FTL entry 1512, and FTL entry 1514 corresponding to all sub-commands belonging to atomic write command F is released (see also FIG. 4, step 406, FIG. 13, step 1352).
At time t4, sub-command X of atomic read command G is received (t 4). The plurality of sub-commands of the atomic read command G are processed in logical address order. The sub command X (t4) is the sub command with the logical address ordering first among the plurality of sub commands of the atomic read command G that have not been processed, and thus the sub command X (t4) can be processed. A lock is applied for FTL entry 1510 corresponding to logical address X of the sub-command X (t4) (see fig. 16), and the application is successful; the lock G (t4) corresponding to FTL entry 1510 indicates that the lock of the entry belongs to atomic read command G.
At time t5, the data of sub-command X (t5) of atomic write command H is received. The multiple subcommands of the atomic write command H are processed in the order of logical addresses. The sub command X (t5) is the sub command with the logical address ordering first among the plurality of sub commands of the atomic write command H that have not been processed, and thus the sub command X (t5) can be processed. To process sub-command X (t5), a lock is requested for FTL entry 1510 for logical address X, at which point the lock G (t4) belongs to atomic read command G, and thus requesting a lock for FTL entry 1510 for logical address X for atomic write command H fails, at which point processing of sub-command X cannot begin (t 5).
At time t6, the data of sub-command X +1(t6) of atomic write command H is received. The multiple subcommands of the atomic write command H are processed in the order of logical addresses. Since the sub-command X (t5) of the atomic write command H, which is ordered before by logical address, has not yet applied to the lock, the sub-command X +1(t6), which is ordered after and belongs to the atomic write command H, is temporarily not processed as the sub-command X (t 5).
At time t7, the data of sub-command X +2(t7) of atomic write command H is received. The multiple subcommands of the atomic write command H are processed in the order of logical addresses. Since neither the sub-commands X (t5) and X +1(t6) of the atomic write command H, which are ordered first by logical address, have yet to be applied to the lock, the ordered sub-command X +2(t7) belonging to the atomic write command H, which is the same as the sub-commands X (t5) and X +1(t6), is also not processed for the time being.
At time t8, sub-command X +1 of atomic read command G is received (t 8). The multiple subcommands of the atomic read command G are processed in the order of logical addresses. Since the 1 st sub-command X (t4) of the atomic read command G, ordered by logical address, has applied to the lock, the 2 nd sub-command X +1 of the atomic read command G may be processed next (t 8). A lock is applied for FTL entry 1512 (see fig. 16) corresponding to logical address X +1 of X +1(t8), and the lock G (t8) corresponding to FTL entry 1512 indicates that the lock of the entry belongs to atomic read command G.
At time t9, sub-command X +2 of atomic read command G is received (t9), and the sub-commands of atomic read command G are processed in the order of logical addresses. The sub command X +2(t9) is the sub command with the logical address ordering first among the plurality of sub commands of the atomic read command G that have not been processed, and thus the sub command X +2(t9) can be processed. Apply for a lock (see FIG. 16) for FTL entry 1514 corresponding to logical address X +2 of X +2(t9), and the application is successful; the lock G (t9) corresponding to FTL entry 1514 indicates that the lock of the entry belongs to atomic read command G. And after all sub-command processing of the atomic read command G is completed (see also FIG. 12, step 125; and FIG. 13, step 1320), releasing the lock of the FTL entry 1510, the FTL entry 1512 and the FTL entry 1514 corresponding to all sub-commands belonging to the atomic read command G (see also FIG. 12, step 126, and FIG. 13, step 1322).
Next, it is checked whether the processing opportunities of other subcommands waiting to be executed are satisfied. The sub-command X (t5) of the atomic write command H is the logical address ordered first among the plurality of sub-commands of the atomic write command H. Since the first sub-command X (t5), ordered by logical address, that has been previously an atomic write command H, requests a lock, when the lock of FTL entry 1510 is released, sub-command X (t5) is applied for lock H (t5) of FTL entry 1510 (see FIG. 17) for logical address X. Since the 1 st subcommand X (t5) that is the atomic write command H applies for the lock, the next ordered subcommands X +1(t6) and X +2(t7) of the atomic write command H may be processed next. FTL entry 1512 and FTL entry 1514 (see fig. 17) of logical addresses X +1 and X +2 of sub-command X +1(t6) and sub-command X +2(t7), respectively, apply for lock, and apply for successfully; lock H (t6) corresponding to FTL entry 1512 and lock H (t7) corresponding to FTL entry 1514 both indicate that they belong to atomic write command H. And after all sub-command processing of the atomic write command H is completed (see also fig. 4, step 405, fig. 13, step 1350), releasing the lock of the FTL entry 1510, FTL entry 1512, and FTL entry 1514 corresponding to all sub-commands belonging to the atomic write command H (see also fig. 4, step 406, and fig. 13, step 1352).
Referring to table 5, the second row shows the valid result after the atomic write command F completes execution according to the sixth embodiment of the present invention: among the logical addresses LBA (X +1), LBA (X +2), and LBA (X +3) are the data X (t1) written by the atomic write command F (here, the data written by the sub command is indicated by sub command X (t 1)), X +1(t2), and X +2(t3), respectively. Of the three atomic commands of fig. 14, the atomic read command G is performed prior to the atomic write command H. The third row of table 5 shows the result read by the atomic read command G: the atomic read command G reads data X (t1) (here, data written by the sub command X (t1) is indicated by X (t 1)), X +1(t2), and X +2(t3) from the logical addresses LBA (X), LBA (X +1), and LBA (X +2), respectively. The fourth row of Table 5 shows the valid results after completion of execution of atomic write command H: among the logical addresses LBA (X), (X +1), (X +2), and LBA (X +1) are data X (t5), X +1(t6), and X +2(t7), respectively, written by the atomic write command H.
TABLE 5
Figure BDA0001246801710000161
EXAMPLE seven
FIG. 18 is a diagram of an atomic command according to an embodiment of the invention. Fig. 19 to 21 are schematic diagrams of FTL tables in processing the atomic command of fig. 18. Fig. 18 shows an atomic write command I, an atomic read command J, and an atomic write command K that the solid-state storage device receives from a host. The atomic write command I includes subcommands (X (t1), X +1(t2) and X +2(t 3)); the atomic read command J includes subcommands (X (t9), X +1(t4), and X +2(t 7)); the atomic write command K includes subcommands (X (t5), X +1(t6), and X +2(t 8)). In the seventh embodiment, the atomic command shown in fig. 18 is processed according to the flowchart shown in fig. 13.
At time t1, the data of sub-command X (t1) of atomic write command I is received. The multiple subcommands of the atomic write command I are processed in logical address order. Since the subcommand X (t1) is the most logically ordered subcommand of the plurality of subcommands of the atomic write command I, the subcommand X (t1) may be processed (see also FIG. 4, step 402, FIGS. 13, 1344). A lock is applied for the FTL entry 1910 corresponding to the logical address X of the sub-command X (t1) (see FIG. 19) and the application is successful. In FIG. 19, lock I (t1) corresponding to FTL entry 1910 indicates that the lock of the entry belongs to atomic write command I.
At time t2, the data of sub-command X +1(t2) of atomic write command I is received. The multiple subcommands of the atomic write command I are processed in logical address order. The sub command X +1(t2) is the sub command with the logical address ordering first among the plurality of sub commands of the atomic write command I that have not been processed, and thus the sub command X +1(t2) can be processed. A lock is applied for FTL entry 1912 corresponding to logical address X +1 of sub-command X +1(t2) (see fig. 19), and the application is successful. The lock I (t2) corresponding to FTL entry 1912 indicates that the lock of the entry belongs to atomic write command I.
At time t3, the data of sub-command X +2(t3) of atomic write command I is received. The multiple subcommands of the atomic write command I are processed in logical address order. The sub command X +2(t3) is the sub command with the logical address ordering first among the plurality of sub commands of the atomic write command I that have not been processed, and thus the sub command X +2(t3) can be processed. Apply for a lock, and successfully apply for an FTL entry 1914 (see fig. 19) corresponding to the logical address X +2 of the sub-command X +2(t 3); the lock I (t3) corresponding to FTL entry 1914 indicates that the lock of the entry belongs to atomic write command I. Next, after all sub-command processing of the atomic write command I is completed (see also FIG. 4, step 405, FIG. 13, step 1350), the locks of the FTL entry 1910, FTL entry 1912 and FTL entry 1914 corresponding to all sub-commands belonging to the atomic write command I are released (see also FIG. 4, step 406, FIG. 13, step 1352).
At time t4, sub-command X +1 of atomic read command J is received (t 4). Since a plurality of sub-commands of the atomic read command J, in which the sub-command X (t9) with the logical address ordered before is not yet received, need to be processed in the logical address order, processing of the sub-command X +1 cannot be started (t 4).
At time t5, the data of sub-command X (t5) of atomic write command K is received. The multiple subcommands of the atomic write command K are processed in logical address order. Since the subcommand X (t5) is the most logically ordered subcommand of the plurality of subcommands of the atomic write command K, the subcommand X (t5) may be processed (see also FIG. 4, step 402, FIG. 13, step 1344). A lock is applied for the FTL entry 1910 corresponding to the logical address X of the sub-command X (t5) (see FIG. 20) and the application is successful. In FIG. 20, the lock K (t5) corresponding to the FTL entry 1910 indicates that the lock of the entry belongs to the atomic write command K.
At time t6, the data of sub-command X +1(t6) of the atomic write command K is received. The multiple subcommands of the atomic write command K are processed in logical address order. Since the subcommand X +1(t6) is the subcommand with the highest logical address ordering among the plurality of unprocessed subcommands of the atomic write command K, the subcommand X +1(t6) can be processed (see also FIG. 4, step 402, FIG. 13, step 1344). A lock is applied for FTL entry 1910 corresponding to logical address X +1 of sub-command X +1(t6) (see fig. 20) and the application is successful. In FIG. 20, the lock K (t6) corresponding to the FTL entry 1910 indicates that the lock of the entry belongs to the atomic write command K.
At time t7, sub-command X +2 of atomic read command J is received (t 7). Since a plurality of subcommands of the atomic read command J need to be processed in the logical address order, and among the plurality of subcommands of the atomic read command J, since a lock has not been applied for the subcommand X (t9) having the logical address of the read command J, it is impossible to start processing the subcommand X +2(t 7).
At time t8, data of sub-command X +2(t8) of the atomic write command K is received. The multiple subcommands of the atomic write command K are processed in logical address order. Since the subcommand X +2(t8) is the subcommand with the highest logical address ordering among the plurality of unprocessed subcommands of the atomic write command K, the subcommand X +2(t8) may be processed (see also FIG. 4, step 402, FIG. 13, step 1344). A lock is applied for FTL entry 1914 corresponding to logical address X +2 of sub-command X +2(t8) (see fig. 20), and the application is successful. In FIG. 20, lock K (t8) corresponding to FTL entry 1914 indicates that the lock of the entry belongs to atomic write command K. And after all sub-command processing of the atomic write command K is completed (see also fig. 4, step 405, fig. 13, step 1350), releasing the lock of the FTL entry 1910, FTL entry 1912 and FTL entry 1914 corresponding to all sub-commands belonging to the atomic write command K (see also fig. 4, step 406, fig. 13, step 1352).
At time T9, sub-command X of atomic read command J is received (T9). The multiple subcommands of the atomic write command J are processed in logical address order. Since sub-command X (t9) is the first logical address ordered sub-command of the plurality of sub-commands of atomic write command J, sub-command X (t9) may be processed (see also FIG. 4, step 402, FIG. 13, step 1314). A lock is applied for the FTL entry 1910 corresponding to the logical address X of the sub-command X (t9) (see FIG. 21) and the application is successful. In FIG. 21, the lock J (t9) corresponding to the FTL entry 1910 indicates that the lock of the entry belongs to the atomic write command J.
Next, it is checked whether the processing opportunities of other subcommands waiting to be executed are satisfied. Since the first sub-command X (t9), ordered by logical address, that is already an atomic read command J requests the lock to succeed, the later sub-commands X +1(t4) and X +2(t7) of the atomic read command can be processed. FTL entry 1912 and FTL entry 1914 (see fig. 21) of logical addresses X +1 and X +2 of sub-command X +1(t4) and sub-command X +2(t7), respectively, apply for lock, and the application is successful; lock J (t4) corresponding to FTL entry 1912 and lock J (t7) corresponding to FTL entry 1914 both indicate that they belong to atomic read command J. And after all sub-command processing of the atomic read command J is completed (see also fig. 12, step 125, fig. 13, step 1320), releasing the lock of the FTL entry 1910, FTL entry 1912 and FTL entry 1914 corresponding to all sub-commands belonging to the atomic read command J (see also fig. 12, step 126, fig. 13, step 1322).
Referring to table 6, the second row shows the effective result after the atomic write command I completes execution according to the seventh embodiment of the present invention: among the logical addresses LBA (X +1), LBA (X +2), and LBA (X +3) are data X (t1), X +1(t2), and X +2(t3), respectively, which the atomic write command I writes. The atomic write command K is completed before the atomic read command J. The third row of Table 6 shows valid results after completion of execution of the atomic write command K: among LBA (X), LBA (X +1), and LBA (X +2) are X (t5), X +1(t6), and X +2(t8), respectively, to which the atomic write command K is written. The fourth row of table 6 shows the result read by atomic read command J: read out from LBA (X), LBA (X +1), and LBA (X +2) are data X (t5), X +1(t6), and X +2(t8), respectively, which are written by the atomic write command K.
TABLE 6
Figure BDA0001246801710000181
Example eight
FIG. 22 is a diagram of an atomic command according to an embodiment of the invention. Fig. 22 to 26 are schematic diagrams of FTL tables in processing the atomic command of fig. 22. Fig. 22 illustrates an atomic write command L, an atomic read command M, an atomic write command N, and an atomic write command O that the solid-state storage device receives from a host. The atomic write command L includes subcommands (X (t1), X +1(t6), and X +2(t 7)); the atomic read command M includes subcommands (X (t8), X +1(t9) and X +2(t 10)); the atomic write command N includes subcommands (X +1(t2), X +2(t4), and X +3(t 5)); atomic read command O includes subcommands (X-1(t3), X (t11), X +1(t12), X +2(t13), and X +3(t 14)).
At time t1, the data of sub-command X (t1) of the atomic write command L is received. The multiple subcommands of the atomic write command L are processed in logical address order. Since the subcommand X (t1) is the most logically ordered subcommand of the plurality of subcommands of the atomic write command L, the subcommand X (t1) may be processed (see also FIG. 4, step 402, FIGS. 13, 1344). The lock is applied for the FTL entry 2310 corresponding to the logical address X of the sub-command X (t1) (see fig. 23), and the application is successful. In FIG. 23, the lock L (t1) corresponding to the FTL entry 2310 indicates that the lock of the entry belongs to the atomic write command L.
At time t2, the data of sub-command X +1(t2) of atomic write command N is received. The multiple subcommands of the atomic write command N are processed in logical address order. Since the subcommand X +1(t2) is the most logically ordered subcommand in the plurality of subcommands of the atomic write command N, the subcommand X +1(t2) may be processed (see also FIG. 4, step 402, FIG. 13, 1344). The lock is applied for FTL entry 2312 corresponding to logical address X +1 of the sub-command X +1(t2) (see fig. 23), and the application is successful. In FIG. 23, lock N (t2) corresponding to FTL entry 2312 indicates that the lock of the entry belongs to atomic write command N.
At time t3, the data for sub-command X-1(t3) of atomic read command O is received. The plurality of sub-commands of the atomic read command O are processed in logical address order. Since sub-command X-1(t3) is the first logically-ordered sub-command of the plurality of sub-commands of atomic read command O, sub-command X-1(t3) may be processed (see also FIG. 12, step 122, FIG. 1344). A lock is applied for the FTL entry 2318 corresponding to the logical address X-1 of the subcommand X-1(t3) (see FIG. 23) and the application is successful. In FIG. 23, the lock O (t3) corresponding to the FTL entry 2318 indicates that the lock of the entry belongs to the atomic read command O.
At time t4, data for sub-command X +2(t4) of atomic write command N is received. The multiple subcommands of the atomic write command N are processed in logical address order. Since the subcommand X +2(t4) is the subcommand with the highest logical address ordering among the plurality of unprocessed subcommands of the atomic write command N, the subcommand X +2(t4) may be processed (see also FIG. 4, step 402, FIG. 13, step 1344). The lock is applied for FTL entry 2314 corresponding to the logical address X +2 of the sub-command X +2(t4) (see fig. 23), and the application is successful. In FIG. 23, lock N (t4) corresponding to FTL entry 2314 indicates that the lock of the entry belongs to atomic write command N.
At time t5, the data for sub-command X +3(t5) of atomic write command N is received. The multiple subcommands of the atomic write command N are processed in logical address order. Since the subcommand X +3(t5) is the subcommand with the highest logical address ordering among the plurality of unprocessed subcommands of the atomic write command N, the subcommand X +3(t5) may be processed (see also FIG. 4, step 402, FIG. 13, step 1344). The lock is applied for FTL entry 2316 corresponding to logical address X +3 of the sub-command X +3(t5) (see fig. 23), and the application is successful. In FIG. 23, lock N (t5) corresponding to FTL entry 2316 indicates that the lock of the entry belongs to atomic write command N. After T5, a lock is applied for the FTL entries corresponding to all the subcommands of the atomic write command N. And releasing the locks of the FTL entry 2312, FTL entry 2314 and FTL entry 2316 corresponding to all the subcommands belonging to the atomic write command N (see also fig. 4, step 406, fig. 13, step 1352) after the plurality of subcommands of the atomic write command N are processed (see also fig. 4, step 405, fig. 13, step 1350).
At time t6, the data of sub-command X +1(t6) of the atomic write command L is received. The multiple subcommands of the atomic write command L are processed in logical address order. Since the sub-command X (t1) with the highest logical address ordering already being the atomic write command L applies for the lock, and the sub-command X +1(t6) is the sub-command with the highest logical address ordering among the plurality of unprocessed sub-commands of the atomic write command L, the sub-command X +1(t6) can be processed. The lock is applied for FTL entry 2312 corresponding to the logical address X +1 of the sub-command X +1(t6) (see fig. 24), and the application is successful. In FIG. 24, the lock L (t6) corresponding to the FTL entry 2312 indicates that the lock of the entry belongs to the atomic write command L.
At time t7, the data of sub-command X +2(t7) of the atomic write command L is received. The multiple subcommands of the atomic write command L are processed in logical address order. Since the sub-command X +2(t7) is the first logical address ordered sub-command of the plurality of unprocessed sub-commands of the atomic write command L, the sub-command X +2(t7) may be processed (see also FIG. 4, step 402, FIG. 13, 1344). The lock is applied for FTL entry 2314 corresponding to the logical address X +2 of the sub-command X +2(t7) (see fig. 24), and the application is successful. In FIG. 24, the lock L (t7) corresponding to FTL entry 2314 indicates that the lock of the entry belongs to the atomic write command L. And releasing the locks of the FTL entry 2310, FTL entry 2312 and FTL entry 2314 corresponding to all the subcommands belonging to the atomic write command L (see also fig. 4, step 406, fig. 13, step 1352) after the plurality of subcommands of the atomic write command L are processed (see also fig. 4, step 405, fig. 13, step 1350).
And in comparison to FIG. 24, in FIG. 23, the lock of FTL entry 2316 has been released.
At time t8, sub-command X of atomic read command M is received (t 8). The plurality of sub-commands of the atomic read command M are processed in logical address order. Since the sub-command X (t8) is the first-ordered logical address of the plurality of sub-commands of the atomic read command M, the sub-command X (t8) may be processed (see also FIG. 12, step 122, and FIGS. 13, step 1314. A lock is applied for the FTL entry 2310 corresponding to the logical address X of the sub-command X (t8) (see FIG. 25) and is applied successfully. in FIG. 25, the lock M (t8) corresponding to the FTL entry 2310 indicates that the lock of the entry belongs to the atomic read command M.
At time t9, sub-command X +1 of atomic read command M is received (t 9). The plurality of sub-commands of the atomic read command M are processed in logical address order. Since the subcommand X +1(t9) is the subcommand with the highest logical address order among the plurality of unprocessed subcommands of the atomic read command M, the subcommand X +1(t9) can be processed (see also FIG. 12, step 122, FIG. 13, step 1314). The lock is applied for FTL entry 2312 corresponding to logical address X +1 of the sub-command X +1(t9) (see fig. 25), and the application is successful. In FIG. 25, the lock M (t9) corresponding to the FTL entry 2312 indicates that the lock of the entry belongs to the atomic read command M.
At time t10, sub-command X +2 of atomic read command M is received (t 10). The plurality of sub-commands of the atomic read command M are processed in logical address order. Since the sub-command X +2(t10) is the first-ordered logical address sub-command of the plurality of unprocessed sub-commands of the atomic read command M, the sub-command X +2(t10) may be processed (see also FIG. 12, step 122, FIG. 13, step 1314). The lock is applied for FTL entry 2314 corresponding to the logical address X +2 of the sub-command X +2(t10) (see fig. 25), and the application is successful. In FIG. 25, the lock M (t10) corresponding to the FTL entry 2314 indicates that the lock of the entry belongs to the atomic read command M. And releasing the locks of FTL entry 2310, FTL entry 2312 and FTL entry 2314 corresponding to all the subcommands belonging to the atomic read command M (see also fig. 12, step 126, fig. 13, step 1322) after the plurality of subcommands of the atomic read command M are processed (see also fig. 12, step 125, fig. 13, step 1320).
At time t11, the data of sub-command X (t11) of atomic read command O is received. The plurality of sub-commands of the atomic read command O are processed in logical address order. Since the sub-command X-1(t3) with the highest logical address ordering for the atomic read command O applies to the lock, and the sub-command X (t11) is the sub-command with the highest logical address ordering among the plurality of unprocessed sub-commands for the atomic read command O, the sub-command X (t11) can be processed. A lock is applied for the FTL entry 2310 corresponding to the logical address X of the sub-command X (t11) (see FIG. 26) and the application is successful. In FIG. 26, the lock O (t11) corresponding to the FTL entry 2310 indicates that the lock of the entry belongs to the atomic read command O.
Next, at time t12, data for sub-command X +1(t12) of atomic read command O is received. The plurality of sub-commands of the atomic read command O are processed in logical address order. Since the sub-command X +1(t12) is the first-ordered logical address sub-command of the plurality of unprocessed sub-commands of the atomic read command O, the sub-command X +1(t12) can be processed. The lock is applied for FTL entry 2312 corresponding to logical address X +1 of the sub-command X +1(t12) (see fig. 26), and the application is successful. In FIG. 26, the lock O (t12) corresponding to the FTL entry 2312 indicates that the lock of the entry belongs to the atomic read command O.
Next, at time t13, data for sub-command X +2(t13) of atomic read command O is received. The plurality of sub-commands of the atomic read command O are processed in logical address order. Since the sub-command X +2(t13) is the first-ordered logical address sub-command of the plurality of unprocessed sub-commands of the atomic read command O, the sub-command X +2(t13) can be processed. The lock is applied for FTL entry 2314 corresponding to the logical address X +2 of the sub-command X +2(t13) (see fig. 26), and the application is successful. In FIG. 26, lock O (t13) corresponding to FTL entry 2314 indicates that the lock of the entry belongs to atomic read command O.
Next, at time t14, data for sub-command X +3(t14) of atomic read command O is received. The plurality of sub-commands of the atomic read command O are processed in logical address order. Since the sub-command X +3(t14) is the first-ordered logical address sub-command of the plurality of unprocessed sub-commands of the atomic read command O, the sub-command X +3(t14) can be processed. The lock is applied for FTL entry 2316 corresponding to logical address X +3 of the sub-command X +3(t14) (see fig. 26), and the application is successful. In FIG. 26, lock O (t14) corresponding to FTL entry 2316 indicates that the lock of the entry belongs to atomic read command O.
After time t14, the locks of the FTL entries corresponding to all the subcommands of the atomic read command O are applied successfully. And after the plurality of sub-command processing of the atomic read command O is completed (see also fig. 12, step 125, fig. 13, step 1320), releasing the FTL entry 2310, FTL entry 2312, FTL entry 2314, FTL entry 2316 corresponding to all sub-commands belonging to the atomic read command O from locking with the FTL entry 2318 (see also fig. 12, step 126, fig. 13, step 1322).
The four atomic commands in fig. 22 are processed in the order of atomic write command N, atomic write command L, atomic read command M, and atomic read command O. Referring to table 7, the second row shows the effective result after the atomic write command N completes execution according to the eighth embodiment of the present invention: among LBA (X +1), LBA (X +2), and LBA (X +3) are the data X +1(t2), X +2(t4), and X +3(t5), respectively, written by the atomic write command N. The third row of Table 7 shows valid results after completion of execution of the atomic write command L: among LBA (X), LBA (X +1), LBA (X +2), and LBA (X +3) are data X (t1), X +1(t6), and X +2(t7), respectively, written by the atomic write command L, and data X +3(t5), written by the atomic write command N. The fourth row of Table 7 shows the results read after completion of the execution of atomic read command M: read out from LBA (X), LBA (X +1), and LBA (X +2) are data X (t1), X +1(t6), and X +2(t7), respectively, which are written by the atomic write command L. The fifth line of Table 7 shows the result of the atomic read command O read after its execution is complete: read from LBA (X-1), LBA (X +1), LBA (X +2), and LBA (X +3) are data X-1(t3) written at the logical address LBA (X-1) before the execution of the atomic write command (it is understood that data read by the sub-command X-1(t3) is indicated by X-1(t3) herein), data X (t1), X +1(t6), and X +2(t7) written by the atomic write command L, and data X +3(t5) written by the atomic write command N, respectively.
TABLE 7
Figure BDA0001246801710000201
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims (8)

1. A method for executing an atomic write command, wherein the atomic write command includes a plurality of subcommands, comprising:
sequencing the plurality of subcommands according to the logical address to be accessed by each subcommand;
acquiring a first sub-command which is sequenced at the top in a plurality of unprocessed sub-commands in the plurality of sub-commands, and locking an FTL table entry corresponding to a first logic address to be accessed according to the first logic address to be accessed by the first sub-command;
and if the locking of the FTL table entry corresponding to the first logic address is successful, acquiring a next sub-command according to the sequence of the sub-commands, and locking the FTL table entry corresponding to the second logic address according to a second logic address to be accessed by the next sub-command until the locking of the FTL table entries corresponding to the logic addresses to be accessed by each sub-command of all sub-commands belonging to the atomic write command is successful.
2. The method of claim 1, wherein the next sub-command is not fetched in the order of sub-commands until the FTL entry corresponding to the first logical address is successfully locked.
3. The method of claim 1 or 2, further comprising: in response to the FTL entries corresponding to the logical addresses of all the subcommands of the atomic write command being successfully locked, the subcommands corresponding to the atomic write command are processed.
4. The method of claim 1 or 2, further comprising:
receiving a second atomic write command from the host;
splitting the second atomic write command into a second plurality of subcommands;
ordering the second plurality of subcommands according to the logical address to be accessed by each subcommand; and
acquiring a third subcommand which is sequenced at the top in the unprocessed subcommands in the second plurality of subcommands, and locking an FTL table entry corresponding to a third logical address to be accessed according to the third logical address;
and if the locking of the FTL table entry corresponding to the third logical address is successful, acquiring a next sub-command according to the sequence of the sub-commands, and locking the FTL table entry corresponding to the fourth logical address according to a fourth logical address to be accessed by the next sub-command until the locking of the FTL table entries corresponding to the logical addresses to be accessed by all the sub-commands belonging to the second atomic write command is successful.
5. The method of claim 1 or 2, further comprising: releasing locks of FTL entries corresponding to all sub-commands of the atomic write command in response to all sub-commands belonging to the atomic write command having been processed.
6. An atomic write command execution apparatus, wherein the atomic write command includes a plurality of subcommands, comprising:
the subcommand sequencing module is used for sequencing the subcommands according to the logic address to be accessed by each subcommand;
the subcommand acquisition module is used for acquiring a first subcommand which is sequenced at the top in a plurality of unprocessed subcommands in the subcommands;
the locking module is used for locking the FTL table entry corresponding to the first logic address according to the first logic address to be accessed by the first sub-command;
the sub-command obtaining module is further configured to obtain a next sub-command according to the ordering of the sub-commands if the FTL entry corresponding to the first logical address is successfully locked; and
and the locking module is further configured to lock the FTL table entry corresponding to the second logical address according to the second logical address to be accessed by the next sub-command until the FTL table entries corresponding to the logical addresses to be accessed by each sub-command of all sub-commands belonging to the atomic write command are successfully locked.
7. The atomic write command execution device of claim 6, further comprising:
a command receiving module to receive a second atomic write command from the host; a subcommand splitting module for splitting the second atomic write command into a second plurality of subcommands;
the logic address ordering module is also used for ordering the second plurality of subcommands according to the logic address to be accessed by each subcommand; the subcommand acquisition module is further used for acquiring a third subcommand which is sequenced at the top in the unprocessed subcommands in the second plurality of subcommands; the locking module is further used for locking the FTL table entry corresponding to the third logical address according to the third logical address to be accessed by the third sub-command;
if the FTL entry corresponding to the third logical address is successfully locked, the command obtaining module is further configured to obtain a next sub-command according to the ordering of the sub-commands, and the locking module is further configured to lock the FTL entry corresponding to the fourth logical address according to a fourth logical address to be accessed by the next sub-command until the FTL entries corresponding to the logical addresses to be accessed by each sub-command of all sub-commands belonging to the second atomic write command are successfully locked.
8. A solid-state storage device comprising a control unit and a memory external to the control unit, the control unit comprising a flash interface and at least one CPU, the CPU accessing the NVM chip in the solid-state storage device through the flash interface, an FTL table being stored in the memory external to the control unit, the FTL table comprising a plurality of entries, characterized in that the CPU is adapted to perform the method of executing an atomic write command according to one of claims 1 to 5.
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