WO2023083134A1 - 数据传输方法和装置 - Google Patents

数据传输方法和装置 Download PDF

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Publication number
WO2023083134A1
WO2023083134A1 PCT/CN2022/130278 CN2022130278W WO2023083134A1 WO 2023083134 A1 WO2023083134 A1 WO 2023083134A1 CN 2022130278 W CN2022130278 W CN 2022130278W WO 2023083134 A1 WO2023083134 A1 WO 2023083134A1
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Prior art keywords
data
matrix
physical layer
mapping relationship
sequence
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PCT/CN2022/130278
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English (en)
French (fr)
Inventor
刘辰辰
杨讯
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华为技术有限公司
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Publication of WO2023083134A1 publication Critical patent/WO2023083134A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
    • H04L1/0033—Systems modifying transmission characteristics according to link quality, e.g. power backoff arrangements specific to the transmitter
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
    • H04L1/0036—Systems modifying transmission characteristics according to link quality, e.g. power backoff arrangements specific to the receiver
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/06—Notations for structuring of protocol data, e.g. abstract syntax notation one [ASN.1]

Definitions

  • the present application relates to the field of wireless communication, and more specifically, to a data transmission method and device.
  • Ultra wideband (UWB) technology is a wireless carrier communication technology, which has been widely used in the field of short-distance, high-speed wireless communication due to its strong multipath resolution capability, low power consumption, and strong confidentiality.
  • UWB technology transmits data by sending and receiving extremely narrow pulses with nanoseconds or less, and modulates different information by pulse position and pulse polarity.
  • PRF pulse repetition frequency
  • the present application provides a data transmission method and device, which can increase the data transmission rate and enhance the system transmission performance.
  • a data transmission method is provided, and the method may be executed by a sending device (for example, a sending end), or may also be executed by a chip or a circuit used for the sending device, which is not limited in this application.
  • a sending device for example, a sending end
  • a chip or a circuit used for the sending device which is not limited in this application.
  • the execution by the sender is taken as an example below for description.
  • the method includes: generating a physical layer protocol data unit (PHY protocol data unit, PPDU), the PPDU includes a physical layer payload field (physical layer payload filed), the physical layer payload field is used to carry the first data bit, the second A data bit is determined according to the first mapping relationship and the data bit to be transmitted; and the PPDU is sent.
  • PHY protocol data unit PHY protocol data unit
  • the sending end obtains the first data bit through the first mapping relationship of the data bits to be transmitted, and encodes different data bits to be transmitted through the first mapping relationship to realize information modulation, thereby improving The rate of data transmission, and the transmission performance of the communication system.
  • a data transmission method is provided, and the method may be executed by a receiving device (for example, a receiving end), or may also be executed by a chip or a circuit used for the receiving device, which is not limited in this application.
  • a receiving device for example, a receiving end
  • the method may be executed by a chip or a circuit used for the receiving device, which is not limited in this application.
  • the implementation by the receiving end is taken as an example below for description.
  • the method includes: receiving a physical layer protocol data unit PPDU, the PPDU includes a physical layer payload field, the physical layer payload field is used to carry a first data bit, and the first data bit is based on the first mapping relationship and the data to be transmitted The bit is determined; according to the first data bit and the first mapping relationship, the data bit to be transmitted is obtained by analyzing.
  • the receiving end analyzes the first data bits through the first mapping relationship to obtain the data bits to be transmitted, and decodes different first data bits through the first mapping relationship to realize information modulation, thereby improving data The rate of transmission, and the transmission performance of the communication system.
  • the first mapping relationship is determined according to a certain row of the Hadamard matrix, and the Hadamard matrix is a matrix with n rows and n columns.
  • the data bits to be transmitted are mapped to a certain row of the Hadamard matrix to obtain n coded bits, and then the elements in the row are mapped to the pulse sequence and transmitted in the form of pulses, finally realizing modulation of information.
  • the Hadamard matrix includes a first sub-matrix, the first sub-matrix is a circulant matrix with n-1 rows and n-1 columns, and the first sub-matrix Each element in the i+1th column is obtained by shifting each element in the i-th column to the right by one position, and i is an integer greater than or equal to 1 and less than or equal to n-2.
  • the row vector of each row of the first sub-matrix is determined by the first sequence or the equivalent sequence of the first sequence, and the equivalent sequence is at least one operation of cyclic shift, negation, and reverse order of the first sequence owned.
  • the first mapping relationship is a certain linear block code.
  • the linear block code includes a Hamming code (hamming code) and/or a single error correction double error detection (single error correction, double error detection, SECDED) code.
  • hamming code hamming code
  • SECDED single error correction double error detection
  • the data bits to be transmitted are encoded by using a linear block code, and then the encoded first data bits are mapped to a pulse sequence and transmitted in the form of pulses, finally realizing information modulation.
  • using Hamming codes and/or single error correction double error detection SECDED codes can also improve the error correction capability of the system and enhance the robustness of the system.
  • one scrambling code bit corresponds to one first data bit
  • the scrambling of the first data bit is implemented by using fewer scrambling code bits to ensure the security of data transmission.
  • one scrambling bit may also correspond to a certain bit in the first data bit.
  • the scrambling code bit is 1, a certain bit in the first data bit is inverted.
  • a data transmission device including: a processing unit, configured to generate a physical layer protocol data unit PPDU, the PPDU includes a physical layer payload field, and the physical layer payload field is used to carry the first data bit, The first data bit is determined according to the first mapping relationship and the data bit to be transmitted; the transceiver unit is configured to send the PPDU.
  • a data transmission method device including: a transceiver unit, configured to receive a physical layer protocol data unit PPDU, the PPDU includes a physical layer payload field, and the physical layer payload field is used to carry the first data bit, The first data bit is determined according to the first mapping relationship and the data bit to be transmitted; the processing unit is configured to analyze the data bit to be transmitted according to the first data bit and the first mapping relationship.
  • the first mapping relationship is determined according to a certain row of the Hadamard matrix, and the Hadamard matrix is a matrix with n rows and n columns.
  • the data bits to be transmitted are mapped to a certain row of the Hadamard matrix to obtain n coded bits, and then the elements in the row are mapped to the pulse sequence and transmitted in the form of pulses, finally realizing modulation of information.
  • the Hadamard matrix includes a first sub-matrix, the first sub-matrix is a circulant matrix with n-1 rows and n-1 columns, and the first sub-matrix Each element in the i+1th column is obtained by shifting each element in the i-th column to the right by one position, and i is an integer greater than or equal to 1 and less than or equal to n-2.
  • the row vector of each row of the first sub-matrix is determined by the first sequence or the equivalent sequence of the first sequence, and the equivalent sequence is at least one operation of cyclic shift, negation, and reverse order of the first sequence owned.
  • the first mapping relationship is a certain linear block code.
  • the linear block code includes a Hamming code (hamming code) and/or a single error correction double error detection (single error correction, double error detection, SECDED) code.
  • hamming code hamming code
  • SECDED single error correction double error detection
  • the data bits to be transmitted are encoded by using a linear block code, and then the encoded first data bits are mapped to a pulse sequence and transmitted in the form of pulses, finally realizing information modulation.
  • using Hamming codes and/or single error correction double error detection SECDED codes can also improve the error correction capability of the system and enhance the robustness of the system.
  • the processing unit is further configured to invert all bits in the first data bit when the scrambling code bit is 1.
  • one scrambling code bit corresponds to one first data bit
  • the scrambling of the first data bit is implemented by using fewer scrambling code bits to ensure the security of data transmission.
  • one scrambling bit may also correspond to a certain bit in the first data bit.
  • a communication device including a processor, and optionally, a memory
  • the processor is used to control the transceiver to send and receive signals
  • the memory is used to store a computer program
  • the processor is used to read from the memory Calling and running the computer program, so that the sending device executes the method in the first aspect or any possible implementation manner of the first aspect.
  • processors there are one or more processors, and one or more memories.
  • the memory can be integrated with the processor, or the memory can be set separately from the processor.
  • the sending device further includes a transceiver, and the transceiver may specifically be a transmitter (transmitter) and a receiver (receiver).
  • a communication device including a processor, and optionally, a memory
  • the processor is used to control the transceiver to send and receive signals
  • the memory is used to store a computer program
  • the processor is used to call from the memory And run the computer program, so that the receiving device executes the method in the above second aspect or any possible implementation manner of the second aspect.
  • processors there are one or more processors, and one or more memories.
  • the memory can be integrated with the processor, or the memory can be set separately from the processor.
  • the receiving device further includes a transceiver, and the transceiver may specifically be a transmitter (transmitter) and a receiver (receiver).
  • a communication system including: a sending device, configured to execute the method in the above first aspect or any possible implementation manner of the first aspect; and a receiving device, configured to execute the above second aspect or the method in the first aspect The method in any one of the possible implementations of the two aspects.
  • a computer-readable storage medium stores computer programs or codes, and when the computer programs or codes run on a computer, the computer executes the above-mentioned first aspect or the first aspect The method in any possible implementation manner, or the second aspect or the method in any possible implementation manner of the second aspect.
  • a chip including at least one processor, the at least one processor is coupled to a memory, the memory is used to store a computer program, and the processor is used to call and run the computer program from the memory, so that the installed
  • the sending device of the system-on-a-chip executes the method in the above-mentioned first aspect or any possible implementation manner of the first aspect, and causes the receiving device installed with the system-on-a-chip to execute the second aspect or any possible implementation manner of the second aspect Methods.
  • the chip may include an input circuit or interface for sending information or data, and an output circuit or interface for receiving information or data.
  • a computer program product includes: computer program code, when the computer program code is executed by the sending device, execute the above-mentioned first aspect or any one of the possible implementation manners of the first aspect method; and, when the computer program code is executed by the receiving device, executing the second aspect or the method in any possible implementation manner of the second aspect.
  • FIG. 1 is a schematic diagram of an example of a communication system to which this application is applied.
  • Fig. 2 is a schematic diagram of an example of an ultra-wideband PPDU structure applicable to the present application.
  • FIG. 3 is a schematic diagram of an example of a data bit transmission section to which the present application is applied.
  • Fig. 4 is a schematic diagram of an example of a structure of a convolutional code encoder in a UWB system applicable to the present application.
  • FIG. 5 is a schematic diagram showing an example of a structure of a scrambler to which this application is applied.
  • FIG. 6 is a schematic diagram of an example of a data transmission method to which this application is applied.
  • FIG. 7 is a schematic diagram of an example of a data bit transmission interval obtained through Hadamard matrix mapping applicable to the present application.
  • FIG. 8 is a schematic diagram of an example of a data transmission device to which this application is applied.
  • FIG. 9 is a schematic diagram of another example of a data transmission device applicable to the present application.
  • FIG. 10 is a schematic diagram of yet another example of a data transmission device to which this application is applied.
  • the embodiment of the present application can be applied to a wireless personal area network (wireless personal area network, WPAN).
  • WPAN wireless personal area network
  • the standards adopted by the WPAN are Institute of Electrical and Electronics Engineers (Institute of Electrical and Electronics Engineer, IEEE) 802.15 series.
  • WPAN can be used for communication between digital auxiliary equipment in a small range such as telephones, computers, and auxiliary equipment, and its working range is generally within 10m.
  • Technologies supporting wireless personal area networks include Bluetooth (Bluetooth), ZigBee (ZigBee), ultra wideband (UWB), IrDA infrared connection technology (infrared), HomeRF, etc.
  • WPAN is located at the bottom of the entire network architecture and is used for wireless connections between devices in a small range, that is, point-to-point short-distance connections, which can be regarded as short-distance wireless communication networks.
  • WPAN is divided into high rate (high rate, HR)-WPAN and low rate (low rate)-WPAN, among them, HR-WPAN can be used to support various high-rate multimedia applications, including high-quality voice Like shipping, multi-megabyte music and image file transfers, etc.
  • LR-WPAN can be used for general business in daily life.
  • WPAN In WPAN, according to the communication capability of the device, it can be divided into a full-function device (full-function device, FFD) and a reduced-function device (reduced-function device, RFD). Both FFD devices and between FFD devices and RFD devices can communicate. RFD devices cannot communicate directly with each other, but can only communicate with FFD devices, or forward data through an FFD device.
  • the FFD device associated with the RFD is called the coordinator of the RFD.
  • RFD equipment is mainly used for simple control applications, such as light switches, passive infrared sensors, etc. The amount of data transmitted is small, and the transmission resources and communication resources are not occupied. The cost of RFD equipment is low.
  • the coordinator may also be called a personal area network (personal area network, PAN) coordinator or a central control node.
  • PAN personal area network
  • the PAN coordinator is the master control node of the entire network, and there can only be one PAN coordinator in each ad hoc network, which has the functions of membership management, link information management, and packet forwarding.
  • the device in this embodiment of the present application may be a device supporting multiple WPAN standards such as 802.15.4a and 802.15.4z, and the currently under discussion or subsequent versions.
  • the above-mentioned devices may be communication servers, routers, switches, network bridges, computers or mobile phones, smart home devices, vehicle-mounted communication devices, and the like.
  • the above-mentioned device includes a hardware layer, an operating system layer running on the hardware layer, and an application layer running on the operating system layer.
  • the hardware layer includes hardware such as a central processing unit (CPU), a memory management unit (MMU), and memory (also called main memory).
  • the operating system may be any one or more computer operating systems that implement business processing through processes, for example, Linux operating system, Unix operating system, Android operating system, iOS operating system, or windows operating system.
  • the application layer includes applications such as browsers, address books, word processing software, and instant messaging software.
  • the embodiment of the present application does not specifically limit the specific structure of the execution subject of the method provided by the embodiment of the present application, as long as the program that records the code of the method provided by the embodiment of the present application can be run to provide the method according to the embodiment of the present application.
  • the execution body of the method provided by the embodiment of the present application may be FFD or RFD, or a functional module in FFD or RFD that can call a program and execute the program.
  • various aspects or features of the present application may be implemented as a method, apparatus, or article of manufacture using standard programming and/or engineering techniques.
  • article of manufacture covers a computer program accessible from any computer readable device, carrier or media.
  • computer-readable media may include, but are not limited to: magnetic storage devices (e.g., hard disk, floppy disk, or tape, etc.), optical disks (e.g., compact disc (compact disc, CD), digital versatile disc (digital versatile disc, DVD) etc.), smart cards and flash memory devices (for example, erasable programmable read-only memory (EPROM), card, stick or key drive, etc.).
  • magnetic storage devices e.g., hard disk, floppy disk, or tape, etc.
  • optical disks e.g., compact disc (compact disc, CD), digital versatile disc (digital versatile disc, DVD) etc.
  • smart cards and flash memory devices for example, erasable programmable read-only memory (EPROM), card, stick or key drive, etc.
  • various storage media described herein can represent one or more devices and/or other machine-readable media for storing information.
  • the term "machine-readable medium” may include, but is not limited to, wireless channels and various other media capable of storing, containing and/or carrying instructions and/or data.
  • the embodiments of the present application may also be applicable to wireless local area network systems such as Internet of Things (Internet of Things, IoT) networks or Internet of Vehicles (Vehicle to X, V2X).
  • IoT Internet of Things
  • Vehicle to X V2X
  • the embodiment of the present application can also be applicable to other possible communication systems, for example, long term evolution (long term evolution, LTE) system, LTE frequency division duplex (frequency division duplex, FDD) system, LTE time division duplex (time division) duplex, TDD), universal mobile telecommunication system (universal mobile telecommunication system, UMTS), global interconnection microwave access (worldwide interoperability for microwave access, WiMAX) communication system, fifth generation (5th generation, 5G) communication system, and future The sixth generation (6th generation, 6G) communication system, etc.
  • LTE long term evolution
  • FDD frequency division duplex
  • TDD time division duplex
  • TDD time division duplex
  • TDD time division duplex
  • UMTS
  • the system architecture shown in Figure 1 can be a star topology or a point-to-point topology, in a star topology (for example, (a) in Figure 1), including: a plurality of full-function devices (full-function device, FFD ) and multiple reduced-function devices (RFD).
  • FFD full-function device
  • RFD reduced-function devices
  • one FFD acts as a personal area network (personal area network, PAN) coordinator, and can perform data transmission with one or more other FFDs, and can also perform data transmission with one or more other RFDs.
  • a central control node can communicate with one or more other devices, and multiple devices can establish a one-to-many or many-to-one data transmission architecture.
  • a point-to-point topology (for example, (b) in FIG. 1 ), it includes: multiple full-function devices FFD and one reduced-function device RFD.
  • FFD acts as a PAN coordinator, and can perform data transmission with one or more other FFDs, and can also perform data transmission with other RFDs.
  • each RFD can perform data transmission with each other. That is, different devices can communicate with each other, and a many-to-many data transmission architecture can be established between multiple different devices.
  • core devices and products include but are not limited to communication servers, routers, switches, bridges, computers, mobile phones and other central control points, PAN and PAN coordinator.
  • the PAN includes a transceiver for sending/receiving the packet structure; a memory for storing signaling information and preset values agreed in advance; a processor for analyzing signaling information and processing related data.
  • FIG. 1 is only a simplified schematic diagram for easy understanding, and does not constitute a limitation to the application scenario of the present application.
  • the system may also include other FFDs and/or RFDs, etc.
  • ultra-wideband wireless communication has become one of the popular physical layer technologies for short-distance, high-speed wireless networks.
  • Many world-renowned large companies, research institutions, and standardization organizations are actively involved in the research, development, and standardization of ultra-wideband wireless communication technology.
  • the Institute of Electrical and Electronics Engineers (IEEE) has established UWB technology Incorporated into its IEEE 802 series wireless standards, the high-speed wireless personal network (wireless personal network, WPAN) standard IEEE 802.15.4a based on UWB technology has been released, and its evolution version IEEE 802.15.4z, the current next-generation UWB WPAN standard 802.15.4ab
  • the formulation of has also been put on the agenda.
  • FIG. 2 is a schematic diagram of an example of a PPDU structure in a UWB communication system applicable to the present application.
  • the PPDU includes two parts: preamble and data.
  • the leading part includes a synchronization header (synchronization header, SHR), and the SHR includes a synchronization (synchronization, SYNC) field and a start-of-frame delimiter field (start-of-frame delimiter, SFD) field.
  • the data part includes the physical layer frame header (PHY Header, PHR) and the PHY payload field (payload filed).
  • the SHR is used for the receiving end to perform PPDU detection and synchronization, and the receiving end can detect whether the sending end has sent the PPDU and the starting position of the PPDU according to the SHR.
  • SYNC consists of repeated synchronization symbols, and the number of repetitions can be 16, 64, 1024, or 4096 times.
  • Each synchronization symbol is obtained by spreading a sequence with a length of 31, 91 or 127, and there are relatively few sequences with good cross-correlation supported on the same channel.
  • the SFD part is a known sequence (the current protocol supports two sequences). When the receiving end detects the SFD sequence, it can know that the preamble part is about to end and the data part is coming.
  • the PHR of the data part is generally used to indicate information such as the length of the data field and the data rate.
  • the PHR carries some indication information of the physical layer, such as modulation and coding information, PPDU length, and the receiving end of the PPDU, etc., to assist the receiving end to correctly demodulate data.
  • the PHY payload field carries the transmitted data, which uses a slightly different modulation depending on the mean pulse frequency (mean PRF) of the device. The larger the average PRF, the more pulses the sender can transmit in the same time, thus having a higher transmission rate.
  • mean PRF mean pulse frequency
  • ultra-wideband technology UWB as a wireless carrier communication technology, does not need to use the carrier in the traditional communication system, but transmits data by sending and receiving extremely narrow pulses with nanoseconds or less, through the pulse position and pulse polarity to modulate different information.
  • FIG. 3 is a schematic diagram of an example of a data bit transmission section to which the present application is applied.
  • the transmission interval includes two groups of outbreak intervals and protection intervals.
  • the burst interval is used to transmit pulses to carry encoded bits, and the guard interval does not transmit any pulses.
  • the two-way arrow in the figure indicates the position of the pulse.
  • PRF 249.6MHz
  • the data bit uses 8 pulses to carry two channel-coded bits, each bit occupies 4 pulses, and each group There are protection intervals of 4 pulse time lengths behind the 4 pulses.
  • FIG. 4 is a schematic diagram of an example of the structure of a convolutional code encoder with a limit length of 7 in the UWB system applicable to the present application.
  • Fig. 5 is a schematic diagram showing an example of the structure of a scrambler.
  • the coded bits can be scrambled through the scrambler.
  • the initial state of the scrambler is the first 15 bits of the binary sequence obtained by setting -1 to 0 after removing 0 from the ternary sequence in the SHR.
  • the final scrambling code is completed through an XOR operation, and the scrambled bits are transmitted in the form of pulses.
  • the current information modulation rate is low and cannot carry more bit information, so it cannot meet the demand for a higher rate.
  • the present application provides a data transmission method and device, which maps the data bits to be transmitted to the first data bits through the first mapping relationship, so as to realize the modulation of information, and then improve the data transmission rate and the transmission performance of the communication system .
  • “at least one” means one or more, and “multiple” means two or more.
  • “And/or” describes the association relationship of associated objects, indicating that there may be three types of relationships, for example, A and/or B, which can mean: A exists alone, A and B exist at the same time, and B exists alone, where A, B can be singular or plural.
  • the character "/” generally indicates that the contextual objects are an “or” relationship.
  • “At least one of the following” or similar expressions refer to any combination of these items, including any combination of single or plural items.
  • At least one (one) of a, b and c can represent: a, or, b, or, c, or, a and b, or, a and c, or, b and c, or, a , b and c.
  • a, b and c can be single or multiple.
  • the protocol definition can be realized by pre-saving corresponding codes, tables or other methods that can be used to indicate related information in the device (for example, the initiating device and the responding device).
  • the specific implementation method of this application is No limit.
  • the "protocols" involved in the embodiments of the present application may refer to standard protocols in the communication field, for example, may include LTE protocols, NR protocols, WLAN protocols, and related protocols applied in future communication systems, which are not limited in this application.
  • "for indication” may include direct indication and indirect indication.
  • indication information may include that the indication information directly indicates A or indirectly indicates A, but it does not mean that A must be carried in the indication information.
  • the indication manner involved in the embodiment of the present application should be understood as covering various methods that can enable the party to be indicated to know the information to be indicated.
  • the information to be indicated can be sent together as a whole, or can be divided into multiple sub-information to be sent separately, and the sending period and/or sending timing of these sub-information can be the same or different, and this application does not limit the specific sending method.
  • wireless communication may be simply referred to as “communication”.
  • Communication can also be described as “data transmission”, “information transmission”, “data processing”, etc.
  • Transmitting includes “sending” and “receiving”. This application does not specifically limit it.
  • FIG. 6 is a schematic flowchart of a data transmission method 600 provided by an embodiment of the present application. The specific implementation steps include:
  • the sender generates a PPDU.
  • the PPDU includes a physical layer payload field (physical layer payload filed), and the physical layer payload field is used to carry a first data bit, and the first data bit is determined according to the first mapping relationship and the data bit to be transmitted .
  • the PPDU includes two parts, a preamble and data, as shown in FIG. 2 .
  • the preamble part includes a synchronization header SHR
  • the data part includes a physical layer frame header PHR and a PHY payload field. Therefore, before generating the PPDU, the sending end needs to add a preamble before the data part (that is, the first data bit).
  • the first mapping relationship may be predefined, which is not specifically limited in the present application.
  • the sending end groups k bits into a group, and there are 2 k different bit combinations.
  • the sending end divides every 3 bits into a group, which may correspond to 8 different bit combinations. For example, 000, 001, 010, 011, 100, 101, 110, 111, namely the data bits to be transmitted.
  • the corresponding first data bits can be obtained after the data bits to be transmitted are mapped through the first mapping relationship.
  • the sending end can carry the first data bit through the polarity (sign) of the pulse , (for example, 1 corresponds to a positive pulse, 0 corresponds to a negative pulse) to realize the demodulation of the data bits to be transmitted.
  • the first data bit obtained by the first mapping relation of the data bit 000 to be transmitted is 10111010, then the corresponding pulse polarity is positive, negative, positive, positive, positive, negative, positive, negative;
  • the data bit 001 obtained through the first mapping relationship is 10011101, and the corresponding pulse polarity is positive, negative, negative, positive, positive, positive, negative, positive; and so on.
  • the first mapping relationship is determined according to a certain row of the Hadamard matrix, where the Hadamard matrix is a matrix with n rows and n columns.
  • Hadamard matrix (hadamard matrix) may also be called Hadamard matrix, and this application does not specifically limit its name.
  • the data bits to be transmitted are mapped to a row of the Hadamard matrix to obtain n coded bits, and then the elements in the row are mapped to a set of pulse sequences and transmitted in the form of pulses. Finally, the modulation of information is realized.
  • the sending end transmits the pulse sequence to carry the first data bit, wherein 1 in the first data bit indicates that the pulse polarity is positive, and 0 indicates that the pulse polarity is negative.
  • the receiving end parses the data bits to be transmitted according to the first data bits and the first mapping relationship.
  • each data bit to be transmitted corresponds to a certain row of the Hadamard matrix, and any two elements in the row of the Hadamard matrix to which the data to be transmitted are mapped are different.
  • the Hadamard matrix includes a first sub-matrix, which is a circular matrix with n-1 rows and n-1 columns, and each element in the i+1th column of the first sub-matrix is the Each element in column i is obtained by cyclically shifting one position to the right in turn, and i is an integer greater than or equal to 1 and less than or equal to n-2.
  • the row vector of each row of the first sub-matrix is determined by the first sequence or the equivalent sequence of the first sequence, and the equivalent sequence is at least one operation of cyclic shift, negation, and reverse order of the first sequence owned.
  • the first sub-matrix can be:
  • the rows of the circulant matrix may be composed of the sequences shown in Table 1 to Table 7 below or their equivalent sequences.
  • the lengths corresponding to the sequences shown in Table 1 to Table 7 are 3, 7, 11, 15, 19, 23, and 31, respectively, specifically expressed as:
  • the rows of the circulant matrix may consist of sequences of length 3 or their equivalent (see Table 1). That is, the sequence for 1 -1 1.
  • the Hadamard matrix formed by a sequence of length 3 can be:
  • the equivalent sequence obtained by performing at least one operation of cyclic shifting, inversion, and inversion of the circulant matrix can be: 1 -1 -1; or -1 1 -1; or -1 -1 1 etc.
  • the rows of the circulant matrix may be composed of sequences with a length of 7 or equivalent sequences (see Table 2). That is, the sequence is -1 -1 1 -1 1 1.
  • the Hadamard matrix formed by a sequence of length 7 can be:
  • the equivalent sequence obtained by performing at least one operation of cyclic shift, inversion, and reverse order on the cyclic matrix can be: 1 1 1 1 1 -1 1 -1 -1; or 1 1 -1 1 - 1 -1 1 1; or 1 -1 -1 1 1 1 1 1 -1 1 and so on.
  • the data bits 000, 001, 010, 011, 100, 101, 110, and 111 to be transmitted are respectively mapped to each row of the Hadamard matrix H 2 .
  • 000 maps to the first row -1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
  • 010 maps to the third row 1 -1 -1 1 1 1 - 11
  • 011 maps to the fourth row 1 1 -1 -1 1 1 1 -1
  • 100 maps to the fifth row 1 1 1 1 1 -1 1 -1
  • 101 maps to the sixth row 1 1 -1 1 -1 -1 1 1 1 1 1 1 1 1
  • 110 maps to the seventh row 1 1 1 1 -1 1 -1 1 -1 1
  • 111 maps to the eighth row 1 1 1 1 -1 1 -1 -1 -1.
  • the pulse train consists of positive and negative pulses.
  • the data bit to be transmitted is 101, and the corresponding first data bit can be determined to be 11010011 through the first mapping relationship.
  • the sending end can carry the first data bit by transmitting a group of pulse sequences whose pulse polarity is positive, positive, negative, positive, negative, negative, positive, and positive in order, thereby realizing the modulation of the data bit 101 to be transmitted , to increase the transmission rate of the system.
  • mapping relationship between the data bits to be transmitted and a certain row of the Hadamard matrix is only an illustration, and should not constitute any limitation on the technical solution of this application, as long as the various data bits to be transmitted and The elements of each row of the Hadamard matrix are in one-to-one correspondence.
  • a sub-matrix containing the circulant matrix and having a size of n rows and n-1 columns can be used as a mapping matrix, which can further reduce the number of pulse transmissions, Thereby increasing the transfer rate.
  • the first mapping relationship may also be determined according to the matrix after the Hadamard matrix is rotated right or left by an integer multiple of 90 degrees (ie, k ⁇ , k is an integer). Therefore, the rotated matrix may also include the first sub-matrix, which is not specifically limited in the present application.
  • FIG. 7 is a schematic diagram of an example of a data bit transmission interval obtained by using Hadamard matrix mapping applicable to the present application. As shown in (a) of FIG. 7 , the transmission interval corresponding to one data bit includes a group of burst intervals and guard intervals. Wherein, the outbreak interval and the protection interval have the same period.
  • the in-row elements of the Hadamard matrix corresponding to a certain data bit to be transmitted are 1 -1 -1 1 -1 1 1, which are mapped to a group of burst intervals with 8 pulses, and the pulse polarity is positive in turn , Negative, Negative, Positive, Negative, Positive, Positive, Positive, that is, the corresponding direction of the pulse arrow is up, down, down, up, down, up, up.
  • each pulse within a burst interval occupies 1/4 of the signal transmission bandwidth.
  • the difference from (a) of FIG. 7 is that each pulse in a burst interval occupies 1/2 of the signal transmission bandwidth.
  • the difference from (a) and (b) of FIG. 7 is that the transmission interval corresponding to the data bit includes two groups of burst intervals and guard intervals.
  • the data bits to be transmitted are mapped to the first data bits through the Hadamard matrix, so as to realize information modulation, thereby improving the data transmission rate and the transmission performance of the communication system. Moreover, through encoding or orthogonal codeword design, the interference between bits of different data to be transmitted can be further reduced, and the demodulation performance of the system can be enhanced.
  • the first mapping relationship is a certain linear block code.
  • the linear block code includes a Hamming code (hamming code) and/or a single error correction double error detection (single error correction, double error detection, SECDED) code.
  • hamming code hamming code
  • SECDED single error correction double error detection
  • the Hamming code can correct any one bit error.
  • Hamming codes cannot accurately distinguish between two-bit errors and one-bit errors. If there are two erroneous bits, the decoder still corrects according to the situation of only one bit error, and the decoding result is incorrect, so a new parity bit is introduced on the basis of the Hamming code, so that the code distance is 4. It is used to correct any one-bit error and detect two-bit errors. This code is called SECDED code.
  • the selected linear block code may be (7,4) Hamming code, or (8,4) SECDED code, and its corresponding generator matrix G may be:
  • the encoded data bits i.e., the first data bit
  • coded data bits can pass the vector (that is, the data bits to be transmitted) and the product of the generator matrix G (that is, the first mapping relationship) are obtained.
  • a j ⁇ 0,1 ⁇ , j is a positive integer greater than or equal to 1 and less than or equal to n.
  • modulo 2 addition is used to encode data bits.
  • the final coded data bits include 0 and 1.
  • the sending end sends the first data bit in the form of pulses.
  • the encoded data bits It is mapped to a set of pulse sequences in a binary phase shift keying (binary phase shift keying, BPSK) manner, and the pulse sequences include positive pulses and negative pulses.
  • BPSK method can be understood as mapping codeword 0 after encoding to a positive pulse, and mapping 1 to a negative pulse.
  • the sender divides every 4 bits into a group, then it can be determined that the data bits to be transmitted are (For example, 0000, 0001, 0010, 0011, 0100, 0101, 0110, 0111, 1000, 1001, 1010, 1011, 1100, 1101, 1110, 1111).
  • the above-mentioned data bits to be transmitted are respectively mapped through the generator matrix G2 to obtain encoded data bits
  • the data bits to be transmitted are 1001, and the encoded data bits obtained after mapping through the generator matrix G2 are The encoded data bits are then passed through BPSK Mapped to a set of pulse sequences, where 1 corresponds to a positive pulse and 0 corresponds to a negative pulse.
  • the polarity of the pulses in this pulse sequence is negative, positive, positive, negative, negative, positive, positive, and negative.
  • the sending end can transmit the pulse sequence to carry the coded data bits (ie, the first data bits) 10011001, so as to realize the modulation of the data bits 1001 to be transmitted and improve the transmission rate of the system.
  • the receiving end obtains the first data bit by receiving the pulse sequence, and analyzes out that the data bit to be transmitted is 1001 in combination with the first mapping relationship G2 .
  • Hybriding code SECDED code
  • SECDED code SECDED code
  • the data bits to be transmitted are mapped to the first data bits through the linear block code, so as to realize the modulation of information, thereby improving the data transmission rate and the transmission performance of the communication system.
  • the use of linear block codes to encode the bits to be transmitted can further improve the error correction capability and robustness of the system.
  • a scrambling code sequence (or, scrambling code bits) may be used to scramble the first data bit.
  • the scrambling code sequence (or, scrambling code bits) may be predefined, which is not specifically limited in the present application.
  • one scrambling code bit corresponds to one first data bit. That is, when the scrambling code bit is 1, all the bits in the first data bit are reversed.
  • a certain scrambling code sequence includes 8 scrambling code bits, which are 0 1 1 0 1 0 0 0.
  • the first data bits of the data bits 000, 001, 010, 011, 100, 101, 110, and 111 to be transmitted obtained through the first mapping relationship are respectively 10111010, 10011101, 11001110, 10100111, 11010011, 11101001, 11110100, and 01111111.
  • the 2nd, 3rd, and 5th scrambling code bits in the scrambling code sequence are 1, then all the bits in the corresponding 2nd, 3rd, and 5th first data bits are inverted. That is, the second first data bit is changed from 10011101 to 01100010; the third first data bit is changed from 11001110 to 00110001; the fifth first data bit is changed from 11010011 to 00101100.
  • one scrambling code bit may correspond to one code word in the first data bit. That is, when the scrambling bit is 1, a corresponding bit in the first data bit is inverted.
  • a certain scrambling code sequence includes 8 scrambling code bits, which are 0 1 1 0 1 0 0 0.
  • the first data bit is 10111010, where the 2nd, 3rd, and 5th scrambling code bits in the scrambling code sequence are 1, and the 2nd, 3rd, and 5th bits in the first data bit are reversed. That is, the first data bit changes from 10111010 to 11010010.
  • the sending end sends the PPDU to the receiving end.
  • the receiving end receives the PPDU from the sending end.
  • the sending end can indicate the encoded data bits by transmitting a set of pulse sequences with pulse polarities of positive, negative, negative, positive, positive, positive, negative, positive, That is, the first data bit.
  • the receiving end can obtain the corresponding first data bit according to the pulse sequence, and then analyze the data bit to be transmitted as 010 according to the first mapping relationship, thereby realizing the modulation and sending and receiving of the data bit to be transmitted.
  • the sending end can indicate the encoded data bits by transmitting a set of pulse sequences with pulse polarities of positive, positive, negative, positive, negative, negative, positive, and negative, namely first data bit.
  • the receiving end can obtain the corresponding first data bit according to the pulse sequence, and then analyze the data bit to be transmitted as 1101 according to the first mapping relationship, so as to realize the modulation and sending and receiving of the data bit to be transmitted.
  • a PPDU includes two parts, a preamble and data. Therefore, before generating the PPDU, the sender needs to add a preamble (for example, a synchronization header SHR) before the data part (that is, the first data bit).
  • a preamble for example, a synchronization header SHR
  • the receiving end parses the data bits to be transmitted according to the first data bits and the first mapping relationship.
  • the receiving end receives and detects the PPDU to obtain the first data bit. Then analyze and obtain the data bits to be transmitted according to the first mapping relationship. For example, when the first mapping relationship is determined according to a row of the Hadamard matrix, the receiving end can further determine the data bits to be transmitted according to the received first data bits 1 0 0 1 1 1 0 1 and the first mapping relationship as 010. For another example, when the first mapping relationship is a certain linear block code (eg, the generator matrix G 2 determined according to the SECDED code), the receiving end receives the first data bit 1 1 0 1 0 0 1 0, and the second A mapping relationship can further determine that the data bits to be transmitted are 1101.
  • the first mapping relationship is a certain linear block code (eg, the generator matrix G 2 determined according to the SECDED code)
  • the receiving end receives the first data bit 1 1 0 1 0 0 1 0, and the second A mapping relationship can further determine that the data bits to be transmitted are 1101.
  • the sending end obtains the first data bit through the first mapping relationship of the data bits to be transmitted, and encodes different data bits to be transmitted through the first mapping relationship to realize information modulation, thereby improving The rate of data transmission, and the transmission performance of the communication system.
  • FFD for uplink transmission, FFD can be used as the sending end, and RFD can be used as the receiving end; for downlink transmission, FFD can be used as the sending end, and RFD can be used as the receiving end; for other transmission scenarios, for example, the data between FFD and FFD Transmission, where one FFD can act as a sender, another FFD can act as a receiver, etc.
  • Fig. 8 is a schematic block diagram of a data transmission device provided by an embodiment of the present application.
  • the apparatus 1000 may include a transceiver unit 1010 and a processing unit 1020 .
  • the transceiver unit 1010 can communicate with the outside, and the processing unit 1020 is used for data processing.
  • the transceiver unit 1010 may also be called a communication interface or a transceiver unit.
  • the apparatus 1000 can implement the steps or processes corresponding to the execution of the sending end in the above method embodiments, wherein the processing unit 1020 is configured to perform processing-related operations on the sending end in the above method embodiments
  • the transceiving unit 1010 is configured to perform operations related to transceiving at the sending end in the method embodiments above.
  • the processing unit 1020 is configured to generate a physical layer protocol data unit PPDU, where the PPDU includes a physical layer payload field, where the physical layer payload field is used to carry a first data bit, and the first data bit is based on the first The mapping relationship and the data bits to be transmitted are determined.
  • the transceiver unit 1010 is configured to send the PPDU.
  • the first mapping relationship is determined according to a certain row of the Hadamard matrix, where the Hadamard matrix is a matrix with n rows and n columns.
  • the Hadamard matrix includes a first sub-matrix, which is a circular matrix with n-1 rows and n-1 columns, and each element in the i+1th column of the first sub-matrix is the i-th
  • Each element of the column is obtained by cyclically shifting one position to the right in turn
  • i is an integer greater than or equal to 1 and less than or equal to n-2
  • the row vector of each row of the first sub-matrix is obtained by the first sequence or the first
  • the equivalent sequence of the first sequence is determined by performing at least one operation of cyclic shift, inversion, and reverse sequence on the first sequence.
  • the first mapping relationship is a certain linear block code.
  • the linear block codes include Hamming codes and/or single error correction double error detection SECDED codes.
  • processing unit 1020 is further configured to invert all bits in the first data bit when the scrambling code bit is 1.
  • the device 1000 can implement the steps or procedures corresponding to the execution of the receiving end in the above method embodiments, wherein the transceiver unit 1010 is used to perform the sending and receiving related functions of the receiving end in the above method embodiments Operation, the processing unit 1020 is configured to perform operations related to the processing of the receiving end in the above method embodiments.
  • the transceiver unit 1010 is configured to receive a physical layer protocol data unit PPDU, where the PPDU includes a physical layer payload field, and the physical layer payload field is used to carry a first data bit, and the first data bit is based on the first The mapping relationship and the data bits to be transmitted are determined.
  • the processing unit 1020 is configured to analyze the data bits to be transmitted according to the first data bits and the first mapping relationship.
  • the first mapping relationship is determined according to a certain row of the Hadamard matrix, where the Hadamard matrix is a matrix with n rows and n columns.
  • the Hadamard matrix includes a first sub-matrix, which is a circular matrix with n-1 rows and n-1 columns, and each element in the i+1th column of the first sub-matrix is the i-th
  • Each element of the column is obtained by cyclically shifting one position to the right in turn
  • i is an integer greater than or equal to 1 and less than or equal to n-2
  • the row vector of each row of the first sub-matrix is obtained by the first sequence or the first
  • the equivalent sequence of the first sequence is determined by performing at least one operation of cyclic shift, inversion, and reverse sequence on the first sequence.
  • the first mapping relationship is a certain linear block code.
  • the linear block codes include Hamming codes and/or single error correction double error detection SECDED codes.
  • processing unit 1020 is further configured to invert all bits in the first data bit when the scrambling code bit is 1.
  • unit here may refer to an application specific integrated circuit (ASIC), an electronic circuit, a processor for executing one or more software or firmware programs (such as a shared processor, a dedicated processor, or a group processor, etc.) and memory, incorporated logic, and/or other suitable components to support the described functionality.
  • ASIC application specific integrated circuit
  • processor for executing one or more software or firmware programs (such as a shared processor, a dedicated processor, or a group processor, etc.) and memory, incorporated logic, and/or other suitable components to support the described functionality.
  • the device 1000 may specifically be the sending end in the above-mentioned embodiments, and may be used to execute various processes and/or steps corresponding to the sending end in the above-mentioned method embodiments, or,
  • the apparatus 1000 may specifically be the receiving end in the foregoing embodiments, and may be used to execute various processes and/or steps corresponding to the receiving end in the foregoing method embodiments. To avoid repetition, details are not repeated here.
  • the device 1000 in each of the above solutions has the function of implementing the corresponding steps performed by the sending end in the above method, or the device 1000 in each of the above solutions has the function of implementing the corresponding steps performed by the receiving end in the above method.
  • the functions described above may be implemented by hardware, or may be implemented by executing corresponding software on the hardware.
  • the hardware or software includes one or more modules corresponding to the above functions; for example, the transceiver unit can be replaced by a transceiver (for example, the sending unit in the transceiver unit can be replaced by a transmitter, and the receiving unit in the transceiver unit can be replaced by a receiver computer), and other units, such as a processing unit, may be replaced by a processor to respectively perform the sending and receiving operations and related processing operations in each method embodiment.
  • a transceiver for example, the sending unit in the transceiver unit can be replaced by a transmitter, and the receiving unit in the transceiver unit can be replaced by a receiver computer
  • other units such as a processing unit, may be replaced by a processor to respectively perform the sending and receiving operations and related processing operations in each method embodiment.
  • the above-mentioned transceiver unit may also be a transceiver circuit (for example, may include a receiving circuit and a sending circuit), and the processing unit may be a processing circuit.
  • the device in FIG. 8 may be the receiving end or the sending end in the foregoing embodiments, or may be a chip or a chip system, for example, a system on chip (SoC).
  • the transceiver unit may be an input-output circuit or a communication interface.
  • the processing unit is a processor or a microprocessor or an integrated circuit integrated on the chip. It is not limited here.
  • FIG. 9 shows a data transmission device 2000 provided by an embodiment of the present application.
  • the device 2000 includes a processor 2010 and a memory 2020 .
  • the memory 2020 is used to store instructions, and the processor 2010 can invoke the instructions stored in the memory 2020 to execute various processes and steps corresponding to the sending end in the above method embodiments.
  • the memory 2020 is used to store instructions, and the processor 2010 may call the instructions stored in the memory 2020 to execute various processes and steps corresponding to the receiving end in the above method embodiments.
  • the apparatus 2000 may specifically be the sending end or the receiving end in the foregoing embodiments, or may be a chip or a chip system. Specifically, the apparatus 2000 may be used to execute various steps and/or processes corresponding to the sending end or the receiving end in the above method embodiments.
  • the memory 2020 may include read-only memory and random-access memory, and provide instructions and data to the processor.
  • a portion of the memory may also include non-volatile random access memory.
  • the memory may also store device type information.
  • the processor 2010 may be used to execute the instructions stored in the memory, and when the processor 2010 executes the instructions stored in the memory, the processor 2010 is used to execute the steps of the above-mentioned method embodiments corresponding to the sending end or the receiving end and/or process.
  • each step of the above method can be completed by an integrated logic circuit of hardware in a processor or an instruction in the form of software.
  • the steps of the methods disclosed in connection with the embodiments of the present application may be directly implemented by a hardware processor, or implemented by a combination of hardware and software modules in the processor.
  • the software module can be located in a mature storage medium in the field such as random access memory, flash memory, read-only memory, programmable read-only memory or electrically erasable programmable memory, register.
  • the storage medium is located in the memory, and the processor reads the information in the memory, and completes the steps of the above method in combination with its hardware. To avoid repetition, no detailed description is given here.
  • the processor in the embodiment of the present application may be an integrated circuit chip, which has a signal processing capability.
  • each step of the above-mentioned method embodiments may be completed by an integrated logic circuit of hardware in a processor or instructions in the form of software.
  • the above-mentioned processor may be a general-purpose processor, a digital signal processor, an application-specific integrated circuit, a field programmable gate array or other programmable logic devices, a discrete gate or transistor logic device, or a discrete hardware component.
  • the processor in the embodiment of the present application may realize or execute the various methods, steps and logic block diagrams disclosed in the embodiment of the present application.
  • a general-purpose processor may be a microprocessor, or the processor may be any conventional processor, or the like.
  • the steps of the method disclosed in connection with the embodiments of the present application may be directly implemented by a hardware decoding processor, or implemented by a combination of hardware and software modules in the decoding processor.
  • the software module can be located in a mature storage medium in the field such as random access memory, flash memory, read-only memory, programmable read-only memory or electrically erasable programmable memory, register.
  • the storage medium is located in the memory, and the processor reads the information in the memory, and completes the steps of the above method in combination with its hardware.
  • the memory in the embodiments of the present application may be a volatile memory or a nonvolatile memory, or may include both volatile and nonvolatile memories.
  • the non-volatile memory can be read-only memory (read-only memory, ROM), programmable read-only memory (programmable ROM, PROM), erasable programmable read-only memory (erasable PROM, EPROM), electrically programmable Erases programmable read-only memory (electrically EPROM, EEPROM) or flash memory.
  • Volatile memory can be random access memory (RAM), which acts as external cache memory.
  • RAM random access memory
  • SRAM static random access memory
  • DRAM dynamic random access memory
  • DRAM synchronous dynamic random access memory
  • SDRAM double data rate synchronous dynamic random access memory
  • ESDRAM enhanced synchronous dynamic random access memory
  • SLDRAM direct memory bus random access memory
  • direct rambus RAM direct rambus RAM
  • FIG. 10 shows a data transmission device 3000 provided by an embodiment of the present application.
  • the device 3000 includes a processing circuit 3010 and a transceiver circuit 3020 .
  • the processing circuit 3010 and the transceiver circuit 3020 communicate with each other through an internal connection path, and the processing circuit 3010 is used to execute instructions to control the transceiver circuit 3020 to send signals and/or receive signals.
  • the apparatus 3000 may further include a storage medium 3030, and the storage medium 3030 communicates with the processing circuit 3010 and the transceiver circuit 3020 through an internal connection path.
  • the storage medium 3030 is used for storing instructions, and the processing circuit 3010 can execute the instructions stored in the storage medium 3030 .
  • the apparatus 3000 is configured to implement various processes and steps corresponding to the sending end in the foregoing method embodiments.
  • the apparatus 3000 is configured to implement various processes and steps corresponding to the receiving end in the foregoing method embodiments.
  • the present application also provides a computer program product, the computer program product including: computer program code, when the computer program code is run on the computer, the computer is made to execute the embodiment shown in FIG. 6 method in .
  • the present application also provides a computer-readable medium, the computer-readable medium stores program code, and when the program code is run on the computer, the computer executes the embodiment shown in FIG. 6 method in .
  • the present application further provides a system, which includes the foregoing one or more stations and one or more access points.
  • the disclosed systems, devices and methods can be implemented in other ways.
  • the device embodiments described above are only illustrative.
  • the division of the units is only a logical function division. In actual implementation, there may be other division methods.
  • multiple units or components can be combined or May be integrated into another system, or some features may be ignored, or not implemented.
  • the mutual coupling or direct coupling or communication connection shown or discussed may be through some interfaces, and the indirect coupling or communication connection of devices or units may be in electrical, mechanical or other forms.
  • the units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place, or may be distributed to multiple network units. Part or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.
  • each functional unit in each embodiment of the present application may be integrated into one processing unit, each unit may exist separately physically, or two or more units may be integrated into one unit.
  • the functions described above are realized in the form of software function units and sold or used as independent products, they can be stored in a computer-readable storage medium.
  • the technical solution of the present application is essentially or the part that contributes to the prior art or the part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including Several instructions are used to make a computer device (which may be a personal computer, a server, or a network device, etc.) execute all or part of the steps of the methods described in the various embodiments of the present application.
  • the aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (read-only memory, ROM), random access memory (random access memory, RAM), magnetic disk or optical disc and other media that can store program codes. .

Abstract

本申请实施例提供了一种数据传输方法和装置，包括：生成物理层协议数据单元PPDU，该PPDU包括物理层有效载荷字段，该物理层有效载荷字段用于承载第一数据比特，该第一数据比特是根据第一映射关系和待传输的数据比特确定的；发送该PPDU。该数据传输方法能够提高数据传输速率，增强系统传输性能。

Description

数据传输方法和装置
本申请要求于2021年11月10日提交中国专利局、申请号为202111329453.5、申请名称为“数据传输方法和装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及无线通信领域，并且更具体地，涉及一种数据传输方法和装置。
背景技术
随着移动互联网的发展和智能终端的普及，以及数据流量快速增长，用户对通信服务质量的需求越来越高。超宽带(ultra wide band，UWB)技术是一种无线载波通信技术，凭借其多径分辨能力强、功耗低、保密性强等特性，在短距离、高速率的无线通信领域得到广泛应用。
当前，UWB技术通过收发具有纳秒或纳秒以下的极窄脉冲来传输数据，通过脉冲位置以及脉冲极性来调制不同的信息。然而，在最高的平均脉冲重复频率(pulse repetition frequency，PRF)下的实际传输速率仍然较低，无法适应很多高速率的应用场景。
因此，如何提高数据传输速率，增强系统传输性能是亟待解决的问题。
发明内容
本申请提供一种数据传输方法和装置，能够提高数据传输速率，增强系统传输性能。
第一方面，提供了一种数据传输方法，该方法可以由发送设备(例如，发送端)执行，或者，也可以由用于发送设备的芯片或电路执行，本申请对此不作限定。为了便于描述，下面以由发送端执行为例进行说明。
该方法包括：生成物理层协议数据单元(PHY protocol data unit，PPDU)，该PPDU包括物理层有效载荷字段(physical layer payload filed)，该物理层有效载荷字段用于承载第一数据比特，该第一数据比特是根据第一映射关系和待传输的数据比特确定的；发送该PPDU。
根据本申请提供的方案，发送端将待传输的数据比特通过第一映射关系得到第一数据比特，通过第一映射关系对不同的待传输的数据比特进行编码，以实现信息的调制，进而提高数据传输的速率，以及通信系统的传输性能。
第二方面，提供了一种数据传输方法，该方法可以由接收设备(例如，接收端)执行，或者，也可以由用于接收设备的芯片或电路执行，本申请对此不作限定。为了便于描述，下面以由接收端执行为例进行说明。
该方法包括：接收物理层协议数据单元PPDU，该PPDU包括物理层有效载荷字段，物理层有效载荷字段用于承载第一数据比特，该第一数据比特是根据第一映射关系和待传 输的数据比特确定的；根据第一数据比特和第一映射关系，解析得到该待传输的数据比特。
根据本申请提供的方案，接收端将第一数据比特通过第一映射关系解析得到待传输的数据比特，通过第一映射关系对不同的第一数据比特解码，以实现信息的调制，进而提高数据传输的速率，以及通信系统的传输性能。
结合第一方面或第二方面，在某些实现方式中，第一映射关系是根据阿达马矩阵的某一行确定的，阿达马矩阵是一个n行n列的矩阵。
在该实现方式中，将待传输的数据比特映射到阿达马矩阵的某一行，得到n个编码后的比特，再将该行内的元素映射到脉冲序列上，以脉冲的形式发射出去，最终实现信息的调制。
结合第一方面或第二方面，在某些实现方式中，阿达马矩阵包括第一子矩阵，该第一子矩阵是一个n-1行n-1列的循环矩阵，该第一子矩阵的第i+1列的每个元素是将第i列的每个元素依次循环右移一个位置得到的，i为大于或等于1且小于或等于的n-2的整数。该第一子矩阵的每一行的行向量是由第一序列或第一序列的等效序列确定的，该等效序列是对第一序列进行循环移位、取反、逆序中至少一项操作得到的。
结合第一方面或第二方面，在某些实现方式中，第一映射关系是某一种线型分组码。
结合第一方面或第二方面，在某些实现方式中，该线型分组码包括汉明码(hamming code)和/或单错校正双错检测(single error correction，double error detection，SECDED)码。
在该实现方式中，利用线型分组码对待传输的数据比特进行编码，然后将编码后的第一数据比特映射到脉冲序列上，以脉冲的形式发射出去，最终实现信息的调制。另外，利用汉明码和/或单错校正双错检测SECDED码也可以提升系统的纠错能力，增强系统的鲁棒性。
结合第一方面或第二方面，在某些实现方式中，当扰码比特为1时，将第一数据比特中内的所有比特取反。
在该实现方式中，一个扰码比特对应一个第一数据比特，通过使用较少的扰码比特实现对第一数据比特的加扰，保证数据传输的安全性。
可选地，一个扰码比特还可以对应第一数据比特内的某一个比特。例如，当扰码比特为1时，将第一数据比特内的某一个比特取反。
第三方面，提供了一种数据传输装置，包括：处理单元，用于生成物理层协议数据单元PPDU，该PPDU包括物理层有效载荷字段，该物理层有效载荷字段用于承载第一数据比特，该第一数据比特是根据第一映射关系和待传输的数据比特确定的；收发单元，用于发送该PPDU。
第四方面，提供了一种数据传输方法装置，包括：收发单元，用于接收物理层协议数据单元PPDU，该PPDU包括物理层有效载荷字段，物理层有效载荷字段用于承载第一数据比特，该第一数据比特是根据第一映射关系和待传输的数据比特确定的；处理单元，用于根据第一数据比特和第一映射关系解析该待传输的数据比特。
结合第三方面或第四方面，在某些实现方式中，第一映射关系是根据阿达马矩阵的某一行确定的，阿达马矩阵是一个n行n列的矩阵。
在该实现方式中，将待传输的数据比特映射到阿达马矩阵的某一行，得到n个编码后 的比特，再将该行内的元素映射到脉冲序列上，以脉冲的形式发射出去，最终实现信息的调制。
结合第三方面或第四方面，在某些实现方式中，阿达马矩阵包括第一子矩阵，该第一子矩阵是一个n-1行n-1列的循环矩阵，该第一子矩阵的第i+1列的每个元素是将第i列的每个元素依次循环右移一个位置得到的，i为大于或等于1且小于或等于的n-2的整数。该第一子矩阵的每一行的行向量是由第一序列或第一序列的等效序列确定的，该等效序列是对第一序列进行循环移位、取反、逆序中至少一项操作得到的。
结合第三方面或第四方面，在某些实现方式中，第一映射关系是某一种线型分组码。
结合第三方面或第四方面，在某些实现方式中，该线型分组码包括汉明码(hamming code)和/或单错校正双错检测(single error correction，double error detection，SECDED)码。
在该实现方式中，利用线型分组码对待传输的数据比特进行编码，然后将编码后的第一数据比特映射到脉冲序列上，以脉冲的形式发射出去，最终实现信息的调制。另外，利用汉明码和/或单错校正双错检测SECDED码也可以提升系统的纠错能力，增强系统的鲁棒性。
结合第三方面或第四方面，在某些实现方式中，处理单元，还用于当扰码比特为1时，将第一数据比特中内的所有比特取反。
在该实现方式中，一个扰码比特对应一个第一数据比特，通过使用较少的扰码比特实现对第一数据比特的加扰，保证数据传输的安全性。
可选地，一个扰码比特还可以对应第一数据比特内的某一个比特。
第五方面，提供了一种通信装置设备，包括，处理器，可选地，还包括存储器，该处理器用于控制收发器收发信号，该存储器用于存储计算机程序，该处理器用于从存储器中调用并运行该计算机程序，使得该发送设备执行上述第一方面或第一方面中任一种可能实现方式中的方法。
可选地，该处理器为一个或多个，该存储器为一个或多个。
可选地，该存储器可以与该处理器集成在一起，或者该存储器与处理器分离设置。
可选地，该发送设备还包括收发器，收发器具体可以为发射机(发射器)和接收机(接收器)。
第六方面，提供了一种通信装置，包括，处理器，可选地，还包括存储器，该处理器用于控制收发器收发信号，该存储器用于存储计算机程序，该处理器用于从存储器中调用并运行该计算机程序，使得该接收设备执行上述第二方面或第二方面中任一种可能实现方式中的方法。
可选地，该处理器为一个或多个，该存储器为一个或多个。
可选地，该存储器可以与该处理器集成在一起，或者该存储器与处理器分离设置。
可选地，该接收设备还包括收发器，收发器具体可以为发射机(发射器)和接收机(接收器)。
第七方面，提供了一种通信系统，包括：发送设备，用于执行上述第一方面或第一方面任一种可能实现方式中的方法；以及接收设备，用于执行上述第二方面或第二方面任一种可能实现方式中的方法。
第八方面，提供了一种计算机可读存储介质，该计算机可读存储介质存储有计算机程序或代码，该计算机程序或代码在计算机上运行时，使得该计算机执行上述第一方面或第一方面任一种可能实现方式中的方法，或者第二方面或第二方面任一种可能实现方式中的方法。
第九方面，提供了一种芯片，包括至少一个处理器，该至少一个处理器与存储器耦合，该存储器用于存储计算机程序，该处理器用于从存储器中调用并运行该计算机程序，使得安装有该芯片系统的发送设备执行上述第一方面或第一方面任一种可能实现方式中的方法，以及使得安装有该芯片系统的接收设备执行第二方面或第二方面任一种可能实现方式中的方法。
其中，该芯片可以包括用于发送信息或数据的输入电路或者接口，以及用于接收信息或数据的输出电路或者接口。
第十方面，提供了一种计算机程序产品，该计算机程序产品包括：计算机程序代码，当该计算机程序代码被发送设备运行时，执行上述第一方面或第一方面任一种可能实现方式中的方法；以及，当该计算机程序代码被接收设备运行时，执行第二方面或第二方面任一种可能实现方式中的方法。
附图说明
图1是适用本申请的通信系统的一例示意图。
图2是适用本申请的超宽带PPDU结构的一例示意图。
图3是适用本申请的数据比特的传输区间的一例示意图。
图4是适用本申请的UWB系统中卷积码编码器结构的一例示意图。
图5是适用本申请的扰码器结构的一例示意图。
图6是适用本申请的数据传输方法的一例示意图。
图7是适用本申请的通过Hadamard矩阵映射得到数据比特的传输区间的一例示意图。
图8是适用本申请的数据传输装置的一例示意图。
图9是适用本申请的数据传输装置的另一例示意图。
图10是适用本申请的数据传输装置的又一例示意图。
具体实施方式
下面将结合附图，对本申请中的技术方案进行描述。
本申请实施例可以应用于无线个人局域网(wireless personal area network，WPAN)，目前WPAN采用的标准为电气和电子工程协会(institute of electrical and electronics engineer，IEEE)802.15系列。WPAN可以用于电话、计算机、附属设备等小范围内的数字辅助设备之间的通信，其工作范围一般是在l0m以内。支持无线个人局域网的技术包括蓝牙(Bluetooth)、紫蜂(ZigBee)、超宽带(ultra wideband，UWB)、IrDA红外连接技术(红外)、HomeRF等。从网络构成上来看，WPAN位于整个网络架构的底层，用于小范围内的设备之间的无线连接，即点到点的短距离连接，可以视为短距离无线通信网络。根据不同的应用场景，WPAN又分为高速率(high rate，HR)-WPAN和低速率(low rate)-WPAN，其中，HR-WPAN可用于支持各种高速率的多媒体应用，包括高质量声像配送、 多兆字节音乐和图像文档传送等。LR-WPAN可用于日常生活的一般业务。
在WPAN中，根据设备所具有的通信能力，可以分为全功能设备(full-function device，FFD)和精简功能设备(reduced-function device，RFD)。FFD设备之间以及FFD设备与RFD设备之间都可以通信。RFD设备之间不能直接通信，只能与FFD设备通信，或者通过一个FFD设备向外转发数据。这个与RFD相关联的FFD设备称为该RFD的协调器(coordinator)。RFD设备主要用于简单的控制应用，例如灯的开关、被动式红外线传感器等，传输的数据量较少，对传输资源和通信资源占用不多，RFD设备的成本较低。其中，协调器也可以称为个人局域网(personal area network，PAN)协调器或中心控制节点等。PAN协调器为整个网络的主控节点，并且每个自组网中只能有一个PAN协调器，具有成员身份管理、链路信息管理、分组转发功能。可选地，本申请实施例中的设备可以为支持802.15.4a和802.15.4z、以及现在正在讨论中的或后续版本等多种WPAN制式的设备。
本申请实施例中，上述设备可以是通信服务器、路由器、交换机、网桥、计算机或者手机，家居智能设备，车载通信设备等。
在本申请实施例中，上述设备包括硬件层、运行在硬件层之上的操作系统层，以及运行在操作系统层上的应用层。该硬件层包括中央处理器(central processing unit，CPU)、内存管理单元(memory management unit，MMU)和内存(也称为主存)等硬件。该操作系统可以是任意一种或多种通过进程(process)实现业务处理的计算机操作系统，例如，Linux操作系统、Unix操作系统、Android操作系统、iOS操作系统或windows操作系统等。该应用层包含浏览器、通讯录、文字处理软件、即时通信软件等应用。并且，本申请实施例并未对本申请实施例提供的方法的执行主体的具体结构特别限定，只要能够通过运行记录有本申请实施例的提供的方法的代码的程序，以根据本申请实施例提供的方法进行通信即可，例如，本申请实施例提供的方法的执行主体可以是FFD或RFD，或者，是FFD或RFD中能够调用程序并执行程序的功能模块。
另外，本申请的各个方面或特征可以实现成方法、装置或使用标准编程和/或工程技术的制品。本申请中使用的术语“制品”涵盖可从任何计算机可读器件、载体或介质访问的计算机程序。例如，计算机可读介质可以包括，但不限于：磁存储器件(例如，硬盘、软盘或磁带等)，光盘(例如，压缩盘(compact disc，CD)、数字通用盘(digital versatile disc，DVD)等)，智能卡和闪存器件(例如，可擦写可编程只读存储器(erasable programmable read-only memory，EPROM)、卡、棒或钥匙驱动器等)。另外，本文描述的各种存储介质可代表用于存储信息的一个或多个设备和/或其它机器可读介质。术语“机器可读介质”可包括但不限于，无线信道和能够存储、包含和/或承载指令和/或数据的各种其它介质。
本申请实施例还可以适用于物联网(internet of things，IoT)网络或车联网(Vehicle to X，V2X)等无线局域网系统中。当然，本申请实施例还可以适用于其他可能的通信系统，例如，长期演进(long term evolution，LTE)系统、LTE频分双工(frequency division duplex，FDD)系统、LTE时分双工(time division duplex，TDD)、通用移动通信系统(universal mobile telecommunication system，UMTS)、全球互联微波接入(worldwide interoperability for microwave access，WiMAX)通信系统、第五代(5th generation，5G)通信系统，以及未来的第六代(6th generation，6G)通信系统等。
上述适用本申请的通信系统仅是举例说明，适用本申请的通信系统不限于此，在此统 一说明，以下不再赘述。
为便于理解本申请实施例，首先以图1中示出的通信系统为例，详细说明适用于本申请实施例的通信系统。如图1所示的系统架构可以是星型拓扑结构或点对点拓扑结构，在星型拓扑中(例如，图1中的(a))，包括：多个全功能设备(full-function device，FFD)和多个简约功能设备(reduced-function device，RFD)。其中，一个FFD作为个人局域网(personal area network，PAN)协调器，可以和其他一个或多个FFD进行数据传输，也可以和其他一个或多个RFD进行数据传输。即一个中心控制节点可以和一个或多个其他设备进行数据通信，多个设备可以建立一对多或多对一的数据传输架构。在点对点拓扑结构中(例如，图1中的(b))，包括：多个全功能设备FFD和一个简约功能设备RFD。其中，一个FFD作为PAN协调器，可以和其他一个或多个FFD进行数据传输，也可以和其他RFD进行数据传输。其中，每个RFD之间均可以相互进行数据传输。即不同设备之间可以进行通信，多个不同设备之间可以建立多对多的数据传输架构。
在本申请实施例中，核心装置和产品包括但不限于通信服务器、路由器、交换机、网桥、计算机、手机等中心控制点，PAN和PAN协调者。其中，PAN包括收发器，用于分组结构的发送/接收；存储器，用于存储的信令信息，以及提前约定的预设值等；处理器，用于解析信令信息，处理相关数据等。
应理解，图1仅为便于理解而示例的简化示意图，并不构成对本申请的应用场景的限定。例如，该系统还可以包括其他FFD和/或RFD等。
随着UWB技术进入民用领域，超宽带无线通信成为短距离、高速无线网络热门的物理层技术之一。许多世界著名的大公司、研究机构、标准化组织都积极投入到超宽带无线通信技术的研究、开发和标准化工作之中，电气和电子工程师协会(institute of electrical and electronics engineers，IEEE)已经将UWB技术纳入其IEEE 802系列无线标准，已经发布了基于UWB技术的高速无线个人网络(wireless personal network，WPAN)标准IEEE 802.15.4a，以及其演进版本IEEE 802.15.4z，目前下一代UWB WPAN标准802.15.4ab的制定也已经提上日程。
图2是适用本申请的UWB通信系统中PPDU结构的一例示意图。如图2所示，PPDU包括前导(preamble)和数据(data)两部分。其中，前导部分包含同步头(synchronization header，SHR)，SHR包括同步(synchronization，SYNC)字段和帧开始分隔符字段(start-of-frame delimiter，SFD)字段。数据部分包含物理层帧头(PHY Header，PHR)和PHY有效载荷字段(payload filed)。
其中，SHR用于接收端进行PPDU检测和同步，接收端可以根据SHR检测到发送端是否发送了PPDU以及PPDU的起始位置。SYNC由重复的同步符号组成，重复次数可以为16、64、1024、4096次。每个同步符号由长度为31、91或者127的序列经过扩频得到，且同一信道上支持的互相关性较好的序列比较少。SFD部分是已知的序列(目前协议支持两种序列)，当接收端检测到SFD的序列时，就可以知道前导部分即将结束，数据部分即将到来。
其中，数据部分的PHR一般用于指示数据字段的长度以及数据速率等信息。PHR携带一些物理层的指示信息，例如，调制编码信息、PPDU长度以及该PPDU的接收端等，用于协助接收端正确解调数据。PHY有效载荷字段携带传输数据，其采用的调制方式由 于设备的平均脉冲频率(mean PRF)的不同而略有不同。平均PRF越大，发送端在相同时间内就可以发射更多的脉冲，从而具有更大的传输速率。
当前，超宽带技术UWB作为一种无线载波通信技术，不需要使用传统通信体制中的载波，而是通过收发具有纳秒或纳秒以下的极窄脉冲来传输数据，通过脉冲位置以及脉冲极性来调制不同的信息。
图3是适用本申请的数据比特的传输区间的一例示意图。如图3所示，该传输区间包括两组爆发区间和保护区间。其中，爆发区间用于发射脉冲以携带编码后的比特，保护区间不发射任何脉冲。图中的双向箭头表示脉冲所在位置，以目前最高的平均PRF＝249.6MHz为例，该数据比特使用8个脉冲来携带两个信道编码后的比特，每个比特占用4个脉冲，每一组的4个脉冲后边都有4个脉冲时间长度的保护区间。
图4是适用本申请的UWB系统中限制长度为7的卷积码编码器结构的一例示意图。如图4所示，以平均PRF＝249.6MHz为例，按照表1所示输出比特与脉冲之间的映射关系，将卷积码编码器的输出比特g 0 (n)和g 1 (n)分别映射到图3所示的两组脉冲上。其中，0对应正脉冲，1对应负脉冲。
表1
g 0 (n) g 1 (n) 第一组脉冲 第二组脉冲
0 0 0000 0000
1 0 1111 0000
0 1 0000 1111
1 1 1111 1111
图5是扰码器的结构的一例示意图。如图5所示，可以通过该扰码器对编码后的比特进行加扰操作。其中，扰码器初始状态是将SHR中三元序列剔除0后，把-1置位0得到的二进制序列的前15位。通过异或操作完成最终的扰码，并将扰码后的比特以脉冲的形式发射出去。
在UWB系统中，当前的信息调制方式速率较低，无法携带更多的比特信息，也就无法满足更高速率的需求。
因此，本申请提供了一种数据传输方法和装置，通过第一映射关系将待传输的数据比特映射为第一数据比特，以实现信息的调制，进而提高数据传输的速率和通信系统的传输性能。
为了便于理解本申请实施例，作出以下几点说明：
在本申请的各个实施例中，如果没有特殊说明以及逻辑冲突，不同的实施例之间的术语和/或描述具有一致性、且可以相互引用，不同的实施例中的技术特征根据其内在的逻辑关系可以组合形成新的实施例。
在本申请实施例中，“至少一个”是指一个或者多个，“多个”是指两个或两个以上。“和/或”，描述关联对象的关联关系，表示可以存在三种关系，例如，A和/或B，可以表示：单独存在A，同时存在A和B，单独存在B的情况，其中A，B可以是单数或者复数。在本申请的文字描述中，字符“/”一般表示前后关联对象是一种“或”的关系。“以下至少一项(个)”或其类似表达，是指的这些项中的任意组合，包括单项(个)或复数项(个)的任意组合。例如，a、b和c中的至少一项(个)，可以表示：a，或，b，或，c， 或，a和b，或，a和c，或，b和c，或，a、b和c。其中a、b和c分别可以是单个，也可以是多个。
在本申请实施例中，“第一”、“第二”以及各种数字编号指示为了描述方便进行的区分，并不用来限制本申请实施例的范围。例如，区分不同的指示信息等。
在本申请实施例中，协议定义可以通过在设备(例如，发起设备和响应设备)中预先保存相应的代码、表格或其他可用于指示相关信息的方式来实现，本申请对于其具体的实现方式不做限定。
本申请实施例中涉及的“协议”可以是指通信领域的标准协议，例如可以包括LTE协议、NR协议、WLAN协议以及应用于未来的通信系统中的相关协议，本申请对此不做限定。
在本申请实施例中，“当……时”、“在……的情况下”以及“如果”等描述均指在某种客观情况下设备会做出相应的处理，并非是限定时间，且也不要求设备在实现时一定要有判断的动作，也不意味着存在其它限定。
在本申请实施例中，“用于指示”可以包括用于直接指示和用于间接指示。当描述某一指示信息用于指示A时，可以包括该指示信息直接指示A或间接指示A，而并不代表该指示信息中一定携带有A。
本申请实施例涉及的指示方式应理解为涵盖可以使得待指示方获知待指示信息的各种方法。待指示信息可以作为整体一起发送，也可以分成多个子信息分开发送，而且这些子信息的发送周期和/或发送时机可以相同，也可以不同，本申请对具体的发送方法不作限定。
在本申请实施例中，“无线通信”可以简称为“通信”。“通信”还可以描述为“数据传输”、“信息传输”、“数据处理”等。“传输”包括“发送”和“接收”。本申请对此不作具体限定。
下面将结合附图详细说明本申请提供的技术方案。
图6是本申请实施例提供的数据传输方法600的示意性流程图。具体实现步骤包括：
S610，发送端生成PPDU。
其中，该PPDU包括物理层有效载荷字段(physical layer payload filed)，该物理层有效载荷字段用于承载第一数据比特，该第一数据比特是根据第一映射关系和待传输的数据比特确定的。
需要说明的是，PPDU包括前导和数据两部分，具体如图2所示。其中，前导部分包含同步头SHR，数据部分包含物理层帧头PHR和PHY有效载荷字段。因此，在生成PPDU之前，发送端需要在数据部分(即，第一数据比特)之前加上前导部分。
在本申请实施例中，第一映射关系可以是预定义的，本申请对此不作具体限定。
在本申请实施例中，发送端将每k个比特为一组，则有2 k种不同的比特组合。示例性的，发送端将每3个比特分为一组，则可以对应有8种不同的比特组合。例如，000、001、010、011、100、101、110、111，即待传输的数据比特。将待传输的数据比特通过第一映射关系映射后可以得到对应的第一数据比特。
由于UWB技术是通过收发具有纳秒或纳秒以下的极窄脉冲来传输数据的，因此在本申请实施例中，发送端可以通过脉冲的极性(正负号)来携带该第一数据比特，(例如， 1对应正脉冲，0对应负脉冲)以实现对待传输的数据比特的的解调。
例如，待传输的数据比特000通过第一映射关系得到的第一数据比特为10111010，则对应的脉冲极性为正、负、正、正、正、负、正、负；再例如，待传输的数据比特001通过第一映射关系得到的第一数据比特为10011101，则对应的脉冲极性为正、负、负、正、正、正、负、正；等等。
需要说明的是，上述仅是示例性说明，不应构成对本申请技术方案的任何限定。
在一种可能的实现方式中，第一映射关系是根据阿达马矩阵的某一行确定的，阿达马矩阵是一个n行n列的矩阵。
其中，n≥2 k，n为正整数。阿达马矩阵(hadamard matrix)也可以称为哈达玛矩阵，本申请对其名称不作具体限定。
应理解，阿达马矩阵是一个n行n列的方形矩阵H，其元素只有1和-1，且矩阵H的所有行之间相互正交。即H*H T＝nI，I为单位矩阵。
在该实现方式中，将待传输的数据比特映射到阿达马矩阵的某一行，得到n个编码后的比特，再将该行内的元素映射到一组脉冲序列上，以脉冲的形式发射出去，最终实现信息的调制。
示例性的，n＝8，即阿达马矩阵是一个8行8列的方形矩阵H。将待传输的数据比特(例如，000、001、010、011、100、101、110、111)分别映射到阿达马矩阵的每一行，再将阿达马矩阵的每一行的行内元素(1和-1)分别映射到具有8个正负脉冲的一组脉冲序列上。其中，1对应正脉冲，-1对应负脉冲。发送端通过发射该脉冲序列以携带第一数据比特，其中，该第一数据比特中1表示脉冲极性为正，0表示脉冲极性为负。对应的，接收端则根据第一数据比特和第一映射关系进而解析待传输的数据比特。
应理解，每个待传输的数据比特对应阿达马矩阵的某一行，且任意两个待传输的数据映射的Hadamard矩阵的行内元素是不相同的。
可选地，阿达马矩阵包括第一子矩阵，该第一子矩阵是一个n-1行n-1列的循环矩阵，该第一子矩阵的第i+1列的每个元素是将第i列的每个元素依次循环右移一个位置得到的，i为大于或等于1且小于或等于的n-2的整数。该第一子矩阵的每一行的行向量是由第一序列或第一序列的等效序列确定的，该等效序列是对第一序列进行循环移位、取反、逆序中至少一项操作得到的。
其中，该第一子矩阵可以为：
Figure PCTCN2022130278-appb-000001
在本申请实施例中，该循环矩阵的行可以由以下表1至表7所示的序列或其等效序列构成。其中，表1至表7所示的序列对应的长度分别为3、7、11、15、19、23、31，具体表示为：
表1
Figure PCTCN2022130278-appb-000002
Figure PCTCN2022130278-appb-000003
表2
Figure PCTCN2022130278-appb-000004
表3
Figure PCTCN2022130278-appb-000005
表4
Figure PCTCN2022130278-appb-000006
表5
Figure PCTCN2022130278-appb-000007
表6
Figure PCTCN2022130278-appb-000008
表7
Figure PCTCN2022130278-appb-000009
需要说明的是，上述表1至表7所示的序列长度仅是示例性说明，不应构成对本申请技术方案的任何限定。也就是说，上述各个表中的序列，每一个序列都可以使用其等效变形序列替换，为了简洁，本申请技术方案中给出上述每个序列长度中一个或多个示例。
例如，该循环矩阵的行可以由长度为3的序列或其等效序列构成(参见表1)。即，序列
Figure PCTCN2022130278-appb-000010
为1 -1 1。对应的，长度为3的序列构成的阿达马矩阵可以为：
Figure PCTCN2022130278-appb-000011
示例性的，通过将该循环矩阵进行循环移位、取反、逆序中至少一项操作得到的等效序列可以为：1 -1 -1；或者-1 1 -1；或者-1 -1 1等等。
又例如，该循环矩阵的行可以由长度为7的序列或其等效序列构成(参见表2)。即，序列
Figure PCTCN2022130278-appb-000012
为-1 -1 1 -1 1 1 1。对应的，长度为7的序列构成的阿达马矩阵可以为：
Figure PCTCN2022130278-appb-000013
示例性的，通过将该循环矩阵进行循环移位、取反、逆序中至少一项操作得到的等效序列可以为：1 1 1 1 -1 1 -1 -1；或者1 1 -1 1 -1 -1 1 1；或者1 -1 -1 1 1 1 1 -1 1等等。
需要说明的是，以上等效序列仅是示例性说明，不应构成对本申请技术方案的任何限定。
一种可能的实现方式，将待传输的数据比特000、001、010、011、100、101、110、111分别映射到阿达马矩阵H 2的每一行。即000映射到第一行-1 1 1 1 1 1 1 1，001映射到第二行1 -1 1 1 1 -1 1 -1，010映射到第三行1 -1 -1 1 1 1 -11，011映射到第四行1 1 -1 -1 1 1 1 -1，100映射到第五行1 1 1 1 -1 1 -1 -1，101映射到第六行1 1 -1 1 -1 -1 1 1，110映射到第七行1 1 1 -1 1 -1 -1 1，111映射到第八行1 1 1 1 -1 1 -1 -1。再将阿达马矩阵的每一行的行内元素(1和-1)分别映射到具有8个脉冲的一组脉冲序列上，其中，1对应脉冲的极性为正，-1对应脉冲的极性为负，则该脉冲序列包括正脉冲和负脉冲。例如，待传输的数据比特为101，通过第一映射关系可以确定其对应的第一数据比特为11010011。那么，发送端可以通过发射脉冲极性依次为正、正、负、正、负、负、正、正的一组脉冲序列来携带该第一数据比特，从而实现对待传输的数据比特101的调制，提高系统的传输速率。
需要说明的是，以上待传输的数据比特与阿达马矩阵的某一行之间的映射关系仅是示例性说明，不应构成对本申请技术方案的任何限定，只要保证多种待传输的数据比特与阿达马矩阵的各行元素一一对应即可。
应理解，当n行n列的Hadamard矩阵具有循环矩阵结构时，可以将包含该循环矩阵且大小为n行n-1列的子矩阵作为映射矩阵，该方式能够进一步减少脉冲发射的个数，从而增大传输速率。
可选地，在本申请实施例中，第一映射关系也可以是根据阿达马矩阵向右或向左旋转90度的整数倍(即kπ，k为整数)之后的矩阵确定的。因此，旋转后的矩阵也可以包括该第一子矩阵，本申请对此不作具体限定。
图7是适用本申请的利用Hadamard矩阵映射得到的数据比特的传输区间的一例示意图。如图7的(a)所示，一个数据比特对应的传输区间包括一组爆发区间和保护区间。其中，爆发区间和保护区间具有相同的周期。例如，某一种待传输的数据比特对应的Hadamard矩阵的行内元素为1 -1 -1 1 -1 1 1 1，映射到一组有8个脉冲的爆发区间内，其脉冲极性依次为正、负、负、正、负、正、正、正，即对应的脉冲箭头指向依次为上、下、下、上、下、上、上、上。在该实现方式中，一个爆发区间内的每个脉冲占据信号传输带宽的1/4。如图7的(b)所示，与图7的(a)不同之处在于，一个爆发区间内的每个脉冲占据信号传输带宽的1/2。如图7的(c)所示，与图7的(a)和(b)不同之处在于， 该数据比特对应的传输区间包括两组爆发区间和保护区间。
应理解，图7所示的数据符号的结构仅是示例性说明，不应构成对本申请技术方案的任何限定。
总之，通过阿达马矩阵将待传输的数据比特映射为第一数据比特，以实现信息的调制，进而提高数据传输的速率和通信系统的传输性能。并且，通过编码或正交的码字设计，可以进一步减少不同待传输数据的比特之间的干扰，增强系统解调性能。
在另一种可能的实现方式中，第一映射关系是某一种线型分组码。
示例性的，该线型分组码包括汉明码(hamming code)和/或单错校正双错检测(single error correction，double error detection，SECDED)码。
其中，汉明码是一种线性分组纠错码。对于所有整数r大于或等于2，存在一个码长n＝2 r-1，信息比特长度k＝2 r-r-1编码。其中，任意两个合法的码字之间至少有三个不相同的比特，即最小码间距。应理解，汉明码是相同码间距和长度下，码率最高的一种编码。另外，汉明码也可以被打孔，打孔后码长和信息比特的长度减少相同值，但是码间距不变，形成新的汉明码(2 r-1-m,2 r-r-1-m)。
由于码间距为3，故汉明码可以纠正任何的一个比特的错误。但是，汉明码不能准确区分两个比特发生错误还是一个比特发生错误的情况。如果有两个错误比特时，解码器仍然按照只有一个比特错误的情况去纠正时，解码结果是不正确的，所以后来又在汉明码基础上引入了一个新的校验比特，使得码间距为4，用于纠正任何一比特的错误，以及检测有两个比特发生错误的情况，这种编码叫作SECDED码。
示例性的，在本申请实施例中，选用的线型分组码可以是(7，4)汉明码，或者(8，4)SECDED码，其对应的生成矩阵G可以为：
Figure PCTCN2022130278-appb-000014
或者，
Figure PCTCN2022130278-appb-000015
那么，编码后的数据比特
Figure PCTCN2022130278-appb-000016
(即，第一数据比特)满足：
Figure PCTCN2022130278-appb-000017
即编码后的数据比特
Figure PCTCN2022130278-appb-000018
可以通过向量
Figure PCTCN2022130278-appb-000019
(即，待传输的数据比特)和生成矩阵G(即，第一映射关系)的乘积获得。其中，a j∈{0,1}，j为大于或等于1且小于或等于n的正整数。在该实现方式中，采用模2加法实现数据比特的编码。那么，最终编码后的数据比特包括0和1。
可选地，发送端将第一数据比特通过脉冲的形式发射出去。具体地，将编码后的数据比特
Figure PCTCN2022130278-appb-000020
以二进制相移键控(binary phase shift keying，BPSK)方式映射到一组脉冲序列上，该脉冲序列包括正脉冲和负脉冲。其中，BPSK方式可以理解为将编码后的码字0映射为正脉冲，1映射为负脉冲。
一种可能的实现方式，发送端将每4个比特分为一组，则可以确定待传输的数据比特为
Figure PCTCN2022130278-appb-000021
(例如，0000、0001、0010、0011、0100、0101、0110、0111、1000、1001、1010、1011、1100、1101、1110、1111)。以SECDED码为例，将上述待传输的数据比特分别通过生成矩阵G 2映射后得到编码后的数据比特
Figure PCTCN2022130278-appb-000022
例如，待传输的数据比 特为1001，通过生成矩阵G 2映射后得到编码后的数据比特为
Figure PCTCN2022130278-appb-000023
再通过BPSK的方式将该编码后的数据比特
Figure PCTCN2022130278-appb-000024
映射到一组脉冲序列上，其中，1对应正脉冲，0对应负脉冲，该脉冲序列中脉冲的极性依次为负、正、正、负、负、正、正、负。那么，发送端可以通过发射该脉冲序列来携带编码后的数据比特(即第一数据比特)10011001，从而实现对待传输的数据比特1001的调制，提高系统的传输速率。对应的，接收端通过接收该脉冲序列得到第一数据比特，并结合第一映射关系G 2解析出待传输的数据比特为1001。
应理解，上述
Figure PCTCN2022130278-appb-000025
仅是一种待传输的数据比特的示例性说明，为了简洁，此处不再赘述其他可能的实现方式。
需要说明的是，上述给出的两种编码器(汉明码、SECDED码)仅是示例性说明，还可以包括其他长度的编码器或打孔后编码器，本申请对此不作具体限定。
总之，通过线型分组码将待传输的数据比特映射为第一数据比特，以实现信息的调制，进而提高数据传输的速率和通信系统的传输性能。另外，采用线型分组码对待传输比特进行编码，可以进一步提高系统的纠错能力和鲁棒性。
可选地，在本申请实施例中，可以利用扰码序列(或者，扰码比特)对第一数据比特进行加扰。其中，扰码序列(或者，扰码比特)可以是预定义，本申请对此不作具体限定。
示例性的，一个扰码比特对应一个第一数据比特。即，当扰码比特为1时，将第一数据比特中内的所有比特取反。
例如，某一扰码序列中包括8个扰码比特，分别为0 1 1 0 1 0 0 0。待传输的数据比特000、001、010、011、100、101、110、111通过第一映射关系得到的第一数据比特分别为10111010、10011101、11001110、10100111、11010011、11101001、11110100、01111111。其中，该扰码序列中的第2、3、5个扰码比特为1，则对应的第2、3、5个第一数据比特内的所有比特取反。即第2个第一数据比特由10011101变为01100010；第3个第一数据比特由11001110变为00110001；第5个第一数据比特由11010011变为00101100。
在该实现方式中，可以通过使用较少的扰码比特实现对更多数据比特的加扰，保证数据传输的安全性。
可选地，一个扰码比特可以对应第一数据比特中的一个码字。即，当扰码比特为1时，将第一数据比特内对应的某一个比特取反。
例如，某一扰码序列中包括8个扰码比特，分别为0 1 1 0 1 0 0 0。第一数据比特为10111010，其中，该扰码序列中的第2、3、5个扰码比特为1，则第一数据比特中的第2、3、5个比特取反。即该第一数据比特由10111010变为11010010。
需要说明的是，以上仅是示例性说明，不应构成对本申请技术方案的任何限定。
S620，发送端向接收端发送该PPDU。
对应的，接收端接收来自发送端的该PPDU。
示例性的，当待传输的数据比特为010时，通过步骤S610的第一映射关系(例如，根据阿达马矩阵的某一行确定)可以确定第一数据比特为1 0 0 1 1 1 0 1，其中，1对应正脉冲，0对应负脉冲，则发送端可以通过发射脉冲极性为正、负、负、正、正、正、负、正的一组脉冲序列来指示编码后的数据比特，即第一数据比特。接收端则根据该脉冲序列可以得到对应的第一数据比特，进而再根据第一映射关系解析出待传输的数据比特为010， 从而实现对待传输数据比特的调制和收发。
示例性的，当待传输的数据比特为1101时，通过步骤S610的第一映射关系(例如，(8，4)SECDED码)可以确定第一数据比特为1 1 0 1 0 0 1 0，其中，1对应正脉冲，0对应负脉冲，则发送端可以通过发射脉冲极性为正、正、负、正、负、负、正、负的一组脉冲序列来指示编码后的数据比特，即第一数据比特。接收端则根据该脉冲序列可以得到对应的第一数据比特，进而再根据第一映射关系解析出待传输的数据比特为1101，从而实现对待传输数据比特的调制和收发。
需要说明的是，上述仅是示例性说明，不应构成对本申请技术方案的任何限定。
应理解，PPDU包括前导和数据两部分。因此，在生成PPDU之前，发送端需要在数据部分(即，第一数据比特)之前加上前导部分(例如，同步头SHR)。
S630，接收端根据第一数据比特和第一映射关系解析待传输的数据比特。
其中，具体的解析方式可参考现有描述，本申请对此不作具体限定。
示例性的，接收端接收并检测PPDU，以获取第一数据比特。再根据第一映射关系解析得到待传输的数据比特。例如，当第一映射关系是根据阿达马矩阵的某一行确定的，接收端根据接收的第一数据比特1 0 0 1 1 1 0 1，以及第一映射关系可以进一步确定待传输的数据比特为010。再例如，当第一映射关系是某一种线型分组码(如，根据SECDED码确定的生成矩阵G 2)，接收端根据接收的第一数据比特1 1 0 1 0 0 1 0，以及第一映射关系可以进一步确定待传输的数据比特为1101。
需要说明的是，上述仅是示例性说明，不应构成对本申请技术方案的任何限定。
根据本申请提供的方案，发送端将待传输的数据比特通过第一映射关系得到第一数据比特，通过第一映射关系对不同的待传输的数据比特进行编码，以实现信息的调制，进而提高数据传输的速率，以及通信系统的传输性能。
需要说明的是，本申请实施例可以应用于多个不同的场景下，包括图1所示的场景，但并不限于该场景。示例性地，对于上行传输，FFD可以作为发送端，RFD可以作为接收端；对于下行传输，FFD可以作为发送端，RFD可以作为接收端；对于其他传输场景，例如，FFD和FFD之间的数据传输，其中一个FFD可以作为发送端，另一个FFD可以作为接收端等。
上文结合图1至图7，详细描述了本申请的数据传输方法侧实施例，下面将结合图8至图10，详细描述本申请的数据传输装置侧实施例。应理解，装置实施例的描述与方法实施例的描述相互对应，因此，未详细描述的部分可以参见前面方法实施例。
图8是本申请实施例提供的数据传输装置的示意性框图。如图8所示，该装置1000可以包括收发单元1010和处理单元1020。收发单元1010可以与外部进行通信，处理单元1020用于进行数据处理。收发单元1010还可以称为通信接口或收发单元。
在一种可能的设计中，该装置1000可实现对应于上文方法实施例中的发送端执行的步骤或者流程，其中，处理单元1020用于执行上文方法实施例中发送端的处理相关的操作，收发单元1010用于执行上文方法实施例中发送端的收发相关的操作。
示例性地，处理单元1020，用于生成物理层协议数据单元PPDU，该PPDU包括物理层有效载荷字段，该物理层有效载荷字段用于承载第一数据比特，该第一数据比特是根据第一映射关系和待传输的数据比特确定的。
收发单元1010，用于发送该PPDU。
可选地，第一映射关系是根据阿达马矩阵的某一行确定的，该阿达马矩阵是一个n行n列的矩阵。
进一步地，阿达马矩阵包括第一子矩阵，该第一子矩阵是一个n-1行n-1列的循环矩阵，该第一子矩阵的第i+1列的每个元素是将第i列的每个元素依次循环右移一个位置得到的，i为大于或等于1且小于或等于的n-2的整数，该第一子矩阵的每一行的行向量是由第一序列或第一序列的等效序列确定的，该等效序列是对该第一序列进行循环移位、取反、逆序中至少一项操作得到的。
可选地，第一映射关系是某一种线型分组码。
示例性的，线型分组码包括汉明码和/或单错校正双错检测SECDED码。
可选地，处理单元1020，还用于当扰码比特为1时，将第一数据比特内的所有比特取反。
在又一种可能的设计中，该装置1000可实现对应于上文方法实施例中的接收端执行的步骤或者流程，其中，收发单元1010用于执行上文方法实施例中接收端的收发相关的操作，处理单元1020用于执行上文方法实施例中接收端的处理相关的操作。
示例性地，收发单元1010，用于接收物理层协议数据单元PPDU，该PPDU包括物理层有效载荷字段，该物理层有效载荷字段用于承载第一数据比特，该第一数据比特是根据第一映射关系和待传输的数据比特确定的。
处理单元1020，用于根据第一数据比特和第一映射关系解析待传输的数据比特。
可选地，第一映射关系是根据阿达马矩阵的某一行确定的，该阿达马矩阵是一个n行n列的矩阵。
进一步地，阿达马矩阵包括第一子矩阵，该第一子矩阵是一个n-1行n-1列的循环矩阵，该第一子矩阵的第i+1列的每个元素是将第i列的每个元素依次循环右移一个位置得到的，i为大于或等于1且小于或等于的n-2的整数，该第一子矩阵的每一行的行向量是由第一序列或第一序列的等效序列确定的，该等效序列是对该第一序列进行循环移位、取反、逆序中至少一项操作得到的。
可选地，第一映射关系是某一种线型分组码。
示例性的，线型分组码包括汉明码和/或单错校正双错检测SECDED码。
可选地，处理单元1020，还用于当扰码比特为1时，将第一数据比特内的所有比特取反。
应理解，这里的装置1000以功能单元的形式体现。这里的术语“单元”可以指应用特有集成电路(application specific integrated circuit，ASIC)、电子电路、用于执行一个或多个软件或固件程序的处理器(例如共享处理器、专有处理器或组处理器等)和存储器、合并逻辑电路和/或其它支持所描述的功能的合适组件。在一个可选例子中，本领域技术人员可以理解，装置1000可以具体为上述实施例中的发送端，可以用于执行上述方法实施例中与发送端对应的各个流程和/或步骤，或者，装置1000可以具体为上述实施例中的接收端，可以用于执行上述方法实施例中与接收端对应的各个流程和/或步骤，为避免重复，在此不再赘述。
上述各个方案的装置1000具有实现上述方法中发送端所执行的相应步骤的功能，或 者，上述各个方案的装置1000具有实现上述方法中接收端所执行的相应步骤的功能。所述功能可以通过硬件实现，也可以通过硬件执行相应的软件实现。所述硬件或软件包括一个或多个与上述功能相对应的模块；例如收发单元可以由收发机替代(例如，收发单元中的发送单元可以由发送机替代，收发单元中的接收单元可以由接收机替代)，其它单元，如处理单元等可以由处理器替代，分别执行各个方法实施例中的收发操作以及相关的处理操作。
此外，上述收发单元还可以是收发电路(例如可以包括接收电路和发送电路)，处理单元可以是处理电路。在本申请的实施例，图8中的装置可以是前述实施例中的接收端或发送端，也可以是芯片或者芯片系统，例如：片上系统(system on chip，SoC)。其中，收发单元可以是输入输出电路、通信接口。处理单元为该芯片上集成的处理器或者微处理器或者集成电路。在此不做限定。
图9示出了本申请实施例提供的数据传输装置2000。该装置2000包括处理器2010和存储器2020。存储器2020用于存储指令，该处理器2010可以调用该存储器2020中存储的指令，以执行上述方法实施例中的发送端对应的各个流程和步骤。
在另一种可能的实现方式中，存储器2020用于存储指令，该处理器2010可以调用该存储器2020中存储的指令，以执行上述方法实施例中的接收端对应的各个流程和步骤。
应理解，装置2000可以具体为上述实施例中的发送端或接收端，也可以是芯片或者芯片系统。具体地，该装置2000可以用于执行上述方法实施例中与发送端或接收端对应的各个步骤和/或流程。
可选地，该存储器2020可以包括只读存储器和随机存取存储器，并向处理器提供指令和数据。存储器的一部分还可以包括非易失性随机存取存储器。例如，存储器还可以存储设备类型的信息。该处理器2010可以用于执行存储器中存储的指令，并且当该处理器2010执行存储器中存储的指令时，该处理器2010用于执行上述与发送端或接收端对应的方法实施例的各个步骤和/或流程。
在实现过程中，上述方法的各步骤可以通过处理器中的硬件的集成逻辑电路或者软件形式的指令完成。结合本申请实施例所公开的方法的步骤可以直接体现为硬件处理器执行完成，或者用处理器中的硬件及软件模块组合执行完成。软件模块可以位于随机存储器，闪存、只读存储器，可编程只读存储器或者电可擦写可编程存储器、寄存器等本领域成熟的存储介质中。该存储介质位于存储器，处理器读取存储器中的信息，结合其硬件完成上述方法的步骤。为避免重复，这里不再详细描述。
应注意，本申请实施例中的处理器可以是一种集成电路芯片，具有信号的处理能力。在实现过程中，上述方法实施例的各步骤可以通过处理器中的硬件的集成逻辑电路或者软件形式的指令完成。上述的处理器可以是通用处理器、数字信号处理器、专用集成电路、现场可编程门阵列或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件。本申请实施例中的处理器可以实现或者执行本申请实施例中的公开的各方法、步骤及逻辑框图。通用处理器可以是微处理器或者该处理器也可以是任何常规的处理器等。结合本申请实施例所公开的方法的步骤可以直接体现为硬件译码处理器执行完成，或者用译码处理器中的硬件及软件模块组合执行完成。软件模块可以位于随机存储器，闪存、只读存储器，可编程只读存储器或者电可擦写可编程存储器、寄存器等本领域成熟的存储介质中。该存 储介质位于存储器，处理器读取存储器中的信息，结合其硬件完成上述方法的步骤。
可以理解，本申请实施例中的存储器可以是易失性存储器或非易失性存储器，或可包括易失性和非易失性存储器两者。其中，非易失性存储器可以是只读存储器(read-only memory，ROM)、可编程只读存储器(programmable ROM，PROM)、可擦除可编程只读存储器(erasable PROM，EPROM)、电可擦除可编程只读存储器(electrically EPROM，EEPROM)或闪存。易失性存储器可以是随机存取存储器(random access memory，RAM)，其用作外部高速缓存。通过示例性但不是限制性说明，许多形式的RAM可用，例如静态随机存取存储器(static RAM，SRAM)、动态随机存取存储器(dynamic RAM，DRAM)、同步动态随机存取存储器(synchronous DRAM，SDRAM)、双倍数据速率同步动态随机存取存储器(double data rate SDRAM，DDR SDRAM)、增强型同步动态随机存取存储器(enhanced SDRAM，ESDRAM)、同步连接动态随机存取存储器(synchlink DRAM，SLDRAM)和直接内存总线随机存取存储器(direct rambus RAM，DR RAM)。应注意，本文描述的系统和方法的存储器旨在包括但不限于这些和任意其它适合类型的存储器。
图10示出了本申请实施例提供的数据传输装置3000。该装置3000包括处理电路3010和收发电路3020。其中，处理电路3010和收发电路3020通过内部连接通路互相通信，该处理电路3010用于执行指令，以控制该收发电路3020发送信号和/或接收信号。
可选地，该装置3000还可以包括存储介质3030，该存储介质3030与处理电路3010、收发电路3020通过内部连接通路互相通信。该存储介质3030用于存储指令，该处理电路3010可以执行该存储介质3030中存储的指令。
在一种可能的实现方式中，装置3000用于实现上述方法实施例中的发送端对应的各个流程和步骤。
在另一种可能的实现方式中，装置3000用于实现上述方法实施例中的接收端对应的各个流程和步骤。
根据本申请实施例提供的方法，本申请还提供一种计算机程序产品，该计算机程序产品包括：计算机程序代码，当该计算机程序代码在计算机上运行时，使得该计算机执行图6所示实施例中的方法。
根据本申请实施例提供的方法，本申请还提供一种计算机可读介质，该计算机可读介质存储有程序代码，当该程序代码在计算机上运行时，使得该计算机执行图6所示实施例中的方法。
根据本申请实施例提供的方法，本申请还提供一种系统，其包括前述的一个或多个站点以及一个或多个接入点。
本领域普通技术人员可以意识到，结合本文中所公开的实施例描述的各示例的单元及算法步骤，能够以电子硬件、或者计算机软件和电子硬件的结合来实现。这些功能究竟以硬件还是软件方式来执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能，但是这种实现不应认为超出本申请的范围。
所属领域的技术人员可以清楚地了解到，为描述的方便和简洁，上述描述的系统、装置和单元的具体工作过程，可以参考前述方法实施例中的对应过程，在此不再赘述。
在本申请所提供的几个实施例中，应该理解到，所揭露的系统、装置和方法，可以通 过其它的方式实现。例如，以上所描述的装置实施例仅仅是示意性的，例如，所述单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个系统，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或单元的间接耦合或通信连接，可以是电性，机械或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外，在本申请各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。
所述功能如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。基于这样的理解，本申请的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)执行本申请各个实施例所述方法的全部或部分步骤。而前述的存储介质包括：U盘、移动硬盘、只读存储器(read-only memory，ROM)、随机存取存储器(random access memory，RAM)、磁碟或者光盘等各种可以存储程序代码的介质。
以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以所述权利要求的保护范围为准。

Claims (16)

  1. 一种数据传输方法，其特征在于，包括：
    生成物理层协议数据单元PPDU，所述PPDU包括物理层有效载荷字段，所述物理层有效载荷字段用于承载第一数据比特，所述第一数据比特是根据第一映射关系和待传输的数据比特确定的；
    发送所述PPDU。
  2. 一种数据传输方法，其特征在于，包括：
    接收物理层协议数据单元PPDU，所述PPDU包括物理层有效载荷字段，所述物理层有效载荷字段用于承载第一数据比特，所述第一数据比特是根据第一映射关系和待传输的数据比特确定的；
    根据所述第一数据比特和所述第一映射关系，解析得到所述待传输的数据比特。
  3. 根据权利要求1或2所述的方法，其特征在于，
    所述第一映射关系是根据阿达马矩阵的某一行确定的，所述阿达马矩阵是一个n行n列的矩阵。
  4. 根据权利要求3所述的方法，其特征在于，
    所述阿达马矩阵包括第一子矩阵，所述第一子矩阵是一个n-1行n-1列的循环矩阵，所述第一子矩阵的第i+1列的每个元素是将第i列的每个元素依次循环右移一个位置得到的，i为大于或等于1且小于或等于的n-2的整数，
    所述第一子矩阵的每一行的行向量是由第一序列或第一序列的等效序列确定的，所述等效序列是对所述第一序列进行循环移位、取反、逆序中至少一项操作得到的。
  5. 根据权利要求1或2所述的方法，其特征在于，所述第一映射关系是某一种线型分组码。
  6. 根据权利要求5所述的方法，其特征在于，所述线型分组码包括汉明码和/或单错校正双错检测SECDED码。
  7. 一种数据传输装置，其特征在于，包括：
    处理单元，用于生成物理层协议数据单元PPDU，所述PPDU包括物理层有效载荷字段，所述物理层有效载荷字段用于承载第一数据比特，所述第一数据比特是根据第一映射关系和待传输的数据比特确定的；
    收发单元，用于发送所述PPDU。
  8. 一种数据传输装置，其特征在于，包括：
    收发单元，用于接收物理层协议数据单元PPDU，所述PPDU包括物理层有效载荷字段，所述物理层有效载荷字段用于承载第一数据比特，所述第一数据比特是根据第一映射关系和待传输的数据比特确定的；
    处理单元，用于根据所述第一数据比特和所述第一映射关系，解析得到所述待传输的数据比特。
  9. 根据权利要求7或8所述的装置，其特征在于，
    所述第一映射关系是根据阿达马矩阵的某一行确定的，所述阿达马矩阵是一个n行n 列的矩阵。
  10. 根据权利要求9所述的装置，其特征在于，
    所述阿达马矩阵包括第一子矩阵，所述第一子矩阵是一个n-1行n-1列的循环矩阵，所述第一子矩阵的第i+1列的每个元素是将第i列的每个元素依次循环右移一个位置得到的，i为大于或等于1且小于或等于的n-2的整数，
    所述第一子矩阵的每一行的行向量是由第一序列或第一序列的等效序列确定的，所述等效序列是对所述第一序列进行循环移位、取反、逆序中至少一项操作得到的。
  11. 根据权利要求7或8所述的装置，其特征在于，所述第一映射关系是某一种线型分组码。
  12. 根据权利要求11所述的装置，其特征在于，所述线型分组码包括汉明码和/或单错校正双错检测SECDED码。
  13. 一种通信装置，其特征在于，包括：
    处理器，所述处理器与存储器耦合；
    所述处理器，用于执行所述存储器中存储的计算机程序或指令，以使得所述装置执行如权利要求1至6中任一项所述的方法。
  14. 一种芯片，其特征在于，包括：处理电路，用于从存储介质中调用并运行计算机程序或指令，执行如权利要求1至6中任一项所述的方法。
  15. 一种计算机存储介质，其特征在于，所述计算机存储介质中存储有计算机指令，所述指令在计算机上执行时，使得所述计算机执行如权利要求1至6中任一项所述的方法。
  16. 一种计算机程序产品，其特征在于，所述计算机程序产品包括计算机程序或指令，所述计算机程序程序或指令在计算机上执行时，使得所述计算机执行如权利要求1至6中任一项所述的方法。
PCT/CN2022/130278 2021-11-10 2022-11-07 数据传输方法和装置 WO2023083134A1 (zh)

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CN108353092A (zh) * 2015-11-02 2018-07-31 英特尔Ip公司 在物理层汇聚协议（plcp）协议数据单元（ppdu）中进行控制信息通信的装置、系统和方法
US20200053706A1 (en) * 2018-10-15 2020-02-13 Bahareh Sadeghi Channelization of vehicle-to-everything (v2x) networks
US20210007006A1 (en) * 2019-07-02 2021-01-07 Qualcomm Incorporated Medium access control (mac) protocol data unit (mpdu) and codeword alignment and validation
CN113273084A (zh) * 2019-01-11 2021-08-17 华为技术有限公司 无线网络中的数据重传
WO2021173389A1 (en) * 2020-02-25 2021-09-02 Qualcomm Incorporated Scrambling sequences and signaling indications thereof
US20210321410A1 (en) * 2020-04-08 2021-10-14 Qualcomm Incorporated Early critical update indications for multi-link devices

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108353092A (zh) * 2015-11-02 2018-07-31 英特尔Ip公司 在物理层汇聚协议（plcp）协议数据单元（ppdu）中进行控制信息通信的装置、系统和方法
US20200053706A1 (en) * 2018-10-15 2020-02-13 Bahareh Sadeghi Channelization of vehicle-to-everything (v2x) networks
CN113273084A (zh) * 2019-01-11 2021-08-17 华为技术有限公司 无线网络中的数据重传
US20210007006A1 (en) * 2019-07-02 2021-01-07 Qualcomm Incorporated Medium access control (mac) protocol data unit (mpdu) and codeword alignment and validation
WO2021173389A1 (en) * 2020-02-25 2021-09-02 Qualcomm Incorporated Scrambling sequences and signaling indications thereof
US20210321410A1 (en) * 2020-04-08 2021-10-14 Qualcomm Incorporated Early critical update indications for multi-link devices

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