WO2023082206A1 - 一种指令调度方法及装置 - Google Patents

一种指令调度方法及装置 Download PDF

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Publication number
WO2023082206A1
WO2023082206A1 PCT/CN2021/130464 CN2021130464W WO2023082206A1 WO 2023082206 A1 WO2023082206 A1 WO 2023082206A1 CN 2021130464 W CN2021130464 W CN 2021130464W WO 2023082206 A1 WO2023082206 A1 WO 2023082206A1
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read
instruction
request queue
read request
command
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PCT/CN2021/130464
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English (en)
French (fr)
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包嵘
王金伟
贾学超
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华为技术有限公司
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Priority to CN202180101374.0A priority Critical patent/CN117751344A/zh
Priority to PCT/CN2021/130464 priority patent/WO2023082206A1/zh
Publication of WO2023082206A1 publication Critical patent/WO2023082206A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation

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  • the embodiments of the present application relate to the field of storage, and in particular, to an instruction scheduling method and device.
  • solid state disks are used by more and more users because of their advantages such as fast startup speed, fast reading speed, and strong anti-drop performance.
  • the computer When the computer reads the solid-state hard drive, it first sends a read command to the main control chip in the solid-state hard drive, and then the main control chip in the solid-state hard drive sends a read command to the flash memory in the solid-state hard drive.
  • the read command can be divided into single-plane read (single plane read) The plane read, SP) instruction and the multi-plane read (MP) instruction, the SP instruction is used to read the data of one plane, and the MP instruction is used to read the data of multiple planes.
  • Embodiments of the present application provide an instruction scheduling method and device, which can increase the probability that read instructions are combined into MP instructions, and effectively reduce energy consumption for reading memory.
  • an instruction scheduling method including: first, when the number of plane planes included in the first read instruction in the first read request queue is less than the preset number of planes, the first The read command is combined with the second read command in the second read request queue to form a multi-plane read MP command.
  • the first read request queue and the second read request queue are two different read request queues. Then, issue the MP command to the flash memory.
  • the number of planes included in the first read command is less than the preset number of planes.
  • the first read command may include one plane or multiple planes. When the first read command includes one plane, the first read command is an SP command; when the first read command includes multiple planes, the multiple planes included in the first read command are different planes, and the first read command is an MP command . In this embodiment of the present application, the first read command specifically includes the number of planes, and the specific type of the first read command is not limited.
  • the second read instruction may be an SP instruction in the second read request queue, or an MP instruction in the second read request queue.
  • the multiple planes included in the second read command are different planes, and the number of planes included in the second read command is less than the preset number of planes.
  • what type of instruction is the second read instruction, the number of planes specifically included in the second read instruction, and the position of the second read instruction in the second read request queue are not limited.
  • the first read command and the second read command are combined into an MP command, and the number of planes included in the MP command is less than or equal to the preset number of planes.
  • the sum of the number of planes included in the first read command and the number of planes included in the second read command is greater than the preset number of planes, all the planes corresponding to the first read command and part of the planes corresponding to the second read command form an MP command, which The number of planes included in the MP command is equal to the preset number of planes.
  • the embodiment of the present application does not limit the specific number of planes included in the MP instruction combined with the first read instruction and the second read instruction.
  • the instruction scheduling method provided in the present application can be applied to any memory (for example, a solid-state disk) that uses a flash memory (FLASH chip) as a storage medium.
  • the first read command when the number of plane planes included in the first read command in the first read request queue is less than the preset number of planes, the first read command can be combined with the second read command in the second read request queue is an MP instruction, and then sends the MP instruction to the flash memory in the memory. That is to say, with this solution, the read instructions in two different read request queues can be combined into MP instructions, so compared with the prior art, only SP instructions in one read request queue can be combined with other SP instructions in the read request queue. Instructions are combined into MP instructions, and this solution can increase the probability of combining read instructions into MP instructions. Since the energy consumption of the MP instruction is smaller than that of the SP instruction when reading the same data, this solution can effectively reduce the energy consumption of reading the memory.
  • the method further includes: the maximum number of concurrent planes supported by the flash memory is N, and the above preset number of planes is less than or equal to the N.
  • the maximum number of concurrent planes supported by the flash memory in the memory is determined by the structure or type of the flash memory, and the maximum number of concurrent planes supported by the flash memory is at least two, that is, N is an integer greater than or equal to two.
  • the above preset number of planes is less than or equal to the maximum number of concurrent planes supported by the flash memory, and the number of preset planes is at least two, that is, the number of preset planes is an integer greater than or equal to two and less than or equal to N.
  • the first read command when the number of plane planes included in the first read command is less than the preset number of planes, when the first read command is an SP command, the first read command is combined with the second read command in the second read request queue Combining MP commands and sending them to the flash memory in the memory can effectively reduce the energy consumption of memory reads.
  • the first read command is an MP command
  • combine the first read command with the second read command in the second read request queue Sending the MP instruction to the flash memory in the memory can also effectively reduce the energy consumption of reading the memory.
  • the method further includes: the first read request queue is an input/output IO read request queue, and the second read request queue is a garbage collection GC read request queue.
  • the above method further includes: suspending sending instructions in the second read request queue to the flash memory within the first duration.
  • the second read request queue can suspend issuing instructions within the first duration, so as to reduce the instruction issuance speed in the second read request queue, so that the queue of the second read request queue As the depth continues to deepen, the read instructions in the second read request queue continue to accumulate, so the probability of combining the first read instruction in the first read request queue with the second read instruction in the second read request queue to form an MP instruction can be increased, reducing the Memory read energy consumption.
  • the above method further includes: the first duration is related to the GC credit value and the number of read IOPS of the memory per second, and the GC credit value is used to indicate the second The number of issued instructions in the read request queue.
  • the GC read command will not be issued for a long time, which will reduce the number of empty blocks and affect the writing of memory data. If the first time period is too short, it will cause the first read in the IO read request queue.
  • the command has not been combined with the second read command in the GC read request queue to form an MP command, and the second read command in the GC read request queue has already been issued. Therefore, this scheme combines the first duration with the GC credit value and the The number of reads per second of the flash memory is correlated to ensure that the first duration is neither too short nor too long, so as to reduce the energy consumption of reading the memory without affecting the performance of the memory.
  • the method further includes: when the GC credit value is less than or equal to the number of reads per second of the flash memory, the first duration is the quotient of the flow control period and the GC credit value.
  • the first duration is the quotient of the flow control period and the read times per second of the flash memory.
  • the first time length is determined by the flow control period, GC credit value, and the number of reads per second of the flash memory, so that the first time length will not be too short or too long, and can be used without affecting memory performance.
  • Reduce memory read energy consumption can also continuously correct the first duration according to the real-time data of the memory, which can more accurately delay the issuance of the GC read request queue, reduce the energy consumption of the memory, and will not reduce the number of empty blocks in the memory, and will not affect the memory performance.
  • the method further includes: according to the detection information of the flash memory, combining the first read instruction and the second read instruction in the second read request queue into the MP instruction ;
  • the input information includes at least one of load pressure, read-write ratio, or number of empty blocks.
  • the load pressure refers to the sum of the number of reads per second and the number of writes per second of the solid-state hard drive.
  • You can use read IOPS (input/output operations per second, IOPS) + write IOPS Indicates the load pressure of the SSD.
  • the read/write ratio of a solid-state drive refers to the ratio of read IOPS to write IOPS, which can be represented by read IOPS/write IOPS.
  • the number of empty blocks refers to the number of storage units that do not store data in the SSD.
  • this solution determines to combine the first read instruction in the IO read request queue and the second read instruction in the GC read request queue into an MP instruction according to the load pressure, load type, and number of empty blocks of the flash memory in the memory. In the case of affecting memory performance, reduce memory read energy consumption.
  • the method further includes: when the load pressure is less than or equal to the light load threshold, and the read/write ratio is greater than or equal to the read ratio threshold, and the number of empty blocks is greater than or equal to the empty block threshold, Combining the first read command with the second read command in the second read request queue into an MP command.
  • the present application provides an instruction scheduling device, including: a processor and an interface circuit.
  • the processor is configured to combine the first read instruction with the second read instruction in the second read request queue into Multi-plane read MP instruction.
  • the first read request queue and the second read request queue are two different read request queues.
  • the processor is also used to issue an MP instruction to the flash memory through the interface circuit.
  • the maximum number of concurrent planes supported by the flash memory is N, and the above preset number of planes is less than or equal to the N.
  • the first read request queue is an input/output IO read request queue
  • the second read request queue is a garbage collection GC read request queue.
  • the processor is further configured to suspend sending instructions in the second read request queue to the flash memory within the first duration
  • the above first duration is related to the GC credit value and the read IOPS of the flash memory per second, and the GC credit value is used to indicate the second read request within a flow control cycle The number of instructions issued in the queue.
  • the first duration is the quotient of the flow control period and the GC credit value.
  • the first duration is the quotient of the flow control cycle and the number of reads per second of the flash memory.
  • the processor is specifically configured to combine the first read instruction and the second read instruction in the second read request queue into the MP instruction.
  • the detection information includes at least one of load pressure, read-write ratio, or number of empty blocks.
  • the processor is specifically configured to: when the load pressure is less than or equal to the light load threshold, and the read/write ratio is greater than or equal to the read ratio threshold, and the number of empty blocks is greater than or when it is equal to the empty block threshold, combine the first read command and the second read command in the second read request queue into an MP command.
  • the present application provides a storage device, including the instruction scheduling apparatus described in any one of the above-mentioned second aspects, and the flash memory.
  • the storage device includes a solid state drive.
  • the present application provides a computer-readable storage medium including instructions.
  • the instructions When the instructions are run on the computer, the computer is made to execute the method provided in the first aspect above.
  • the present application provides a computer program product, which, when running on a computer, causes the computer to execute the method provided in the first aspect above.
  • FIG. 1 is an application schematic diagram of an instruction scheduling method provided by an embodiment of the present application
  • FIG. 2 is a schematic flowchart of an instruction scheduling method provided in an embodiment of the present application
  • FIG. 3A is an application schematic diagram of an instruction scheduling method provided by an embodiment of the present application.
  • FIG. 3B is an application schematic diagram of another instruction scheduling method provided by the embodiment of the present application.
  • FIG. 3C is an application schematic diagram of another instruction scheduling method provided by the embodiment of the present application.
  • FIG. 3D is an application schematic diagram of another instruction scheduling method provided by the embodiment of the present application.
  • FIG. 4 is a schematic flowchart of another instruction scheduling method provided by the embodiment of the present application.
  • FIG. 5 is an application schematic diagram of another instruction scheduling method provided by the embodiment of the present application.
  • FIG. 6 is a schematic flowchart of another instruction scheduling method provided in the embodiment of the present application.
  • FIG. 7 is a schematic flowchart of another instruction scheduling method provided by the embodiment of the present application.
  • FIG. 8 is a schematic structural diagram of an instruction scheduling device provided by an embodiment of the present application.
  • At least one item (piece) of a, b or c can represent: a, b, c, a and b, a and c, b and c, or, a and b and c, wherein a, b and c can be single or multiple.
  • words such as “first” and “second” are used to distinguish the same or similar items with basically the same function and effect, Those skilled in the art can understand that words such as “first” and “second” do not limit the quantity and execution order.
  • first in the first read command and “second” in the second read command in the embodiment of the present application are only used to distinguish different read commands.
  • the first, second, etc. descriptions that appear in the embodiments of this application are only for illustration and to distinguish the description objects, and there is no order, nor does it represent a special limitation on the number of devices in the embodiments of this application, and cannot constitute a limitation on the number of devices in this application. Any limitations of the examples.
  • the proportion of SP instructions in IO read instructions is different at different queue depths (queue depth, QD).
  • queue depth 1QD to 16QD
  • almost 100% of the IO read instructions are SP instructions.
  • the proportion of SP instructions in the IO read instructions gradually decreases. That is, in the case of low load, the proportion of SP instructions in IO read instructions is very high.
  • the energy consumption generated by reading through the SP instruction and reading through the MP instruction is different.
  • the total energy consumption required to read each 4K plane by using the SP instruction is the energy consumption of reading data by the SP instruction and the SP instruction The sum of output data energy consumption.
  • the total energy consumption required to read the first 4K plane using the MP instruction is the sum of the energy consumption of reading data by the MP instruction and the energy consumption of the output data of the MP instruction, while the total energy consumption of reading the second 4K plane by using the MP instruction is only Output data energy consumption for the MP instruction.
  • the average energy consumption of reading a 4K plane using the MP instruction is the sum of (MP instruction reading data energy consumption)/2 and the output data energy consumption.
  • MP Read tR to represent the energy consumption of MP instruction reading data when reading a 4K plane data
  • Data out to represent the energy consumption of MP instruction output data when outputting a 4K plane data
  • MP instruction to read two 4K plane data The total energy consumption of Plane data is MP Read tR+Data out*2, so the average energy consumption of reading a 4K Plane data using MP instructions is MP Read tR/2+Data out.
  • the energy consumption of MP instruction is 20% less than that of SP instruction.
  • the proportion of SP instructions in the IO read instructions is very high.
  • the energy consumed by the MP instruction is smaller than that consumed by the SP instruction. Therefore, in order to reduce the energy consumption of the solid state disk, the SP instructions in the read request queue can be combined into MP instructions.
  • Figure 1 is an instruction scheduling method.
  • a solid-state hard disk includes a main control chip and a flash memory.
  • a computer When a computer reads a solid-state hard disk, it first sends a read command to the main Send a read command.
  • the read instructions sent to the SSD can be divided into IO read instructions and GC read instructions according to the type.
  • the IO read instruction is used to read the data stored in the SSD, and the GC read instruction is used to release storage space.
  • the IO read command includes multiple planes.
  • the IO read scheduler is used to combine the planes that can form MP commands in the IO read command into MP commands and add them to the IO read request queue.
  • the IO read scheduler is also used to combine the planes that cannot form MP commands in the IO read commands.
  • the plane of the instruction is added to the IO read request queue with the SP instruction.
  • the GC read instruction includes multiple planes.
  • the GC read scheduler is used to combine the planes that can form MP instructions in the GC read instructions into MP instructions and add them to the GC read request queue.
  • the GC read scheduler is also used to combine the planes that cannot form MP instructions in the GC read instructions.
  • the plane of the instruction is added to the GC read request queue with the SP instruction.
  • the main control chip in the solid-state disk also includes a dequeue scheduler, which can allocate IO read request queues and GC read requests through round-robin (RR) or weighted round-robin (WRR) scheduling. Request the bandwidth for command delivery in the queue, so the SSD can read data and release storage space at the same time, and the released storage space can store the data to be stored.
  • a dequeue scheduler issues the IO read commands in the IO read request queue to the flash memory, the IO read commands in the IO read request queue are issued sequentially according to the principle of first-in-first-out, and the IO read request queue can be combined into MP commands.
  • the planes are combined into MP commands and issued, and the planes that cannot be combined into MP commands are issued with SP commands.
  • the dequeuing scheduler issues GC read instructions in the GC read request queue to the flash memory
  • the instructions in the GC read request queue are issued sequentially according to the first-in first-out principle, and the GC read request queue can be combined into a plane combination of MP instructions It is issued as MP command, and it is issued as SP command if it cannot be combined into MP command.
  • the instruction scheduling method provided in the embodiment of the present application can be applied to any memory that uses a flash memory (FLASH chip) as a storage medium.
  • the instruction scheduling method provided by the embodiments of the present application is described by taking the memory as a solid state disk as an example.
  • FIG. 2 is an instruction scheduling method provided by an embodiment of the present application.
  • the method can be executed by an instruction scheduling device. As shown in FIG. 2 , the method includes the following steps S201-S202.
  • the above solutions are mainly executed by the main control chip or the software running on the main control chip, which is not limited in this embodiment.
  • the instruction scheduling device may be the main control chip or the software running on the main control chip or at least part thereof.
  • the first read command may include one plane or multiple planes.
  • the first read command is an SP command; when the first read command includes multiple planes, the multiple planes are different planes, and the first read command is an MP command.
  • the first read command specifically includes the number of planes, and the specific type of the first read command is not limited.
  • the first read instruction is an SP instruction
  • the first read command is an MP command
  • multiple commands in the first read request queue have been combined into an MP command before step S201, and the MP command is the first read command.
  • the first instruction in the first read request queue is combined with other instructions in the first read request queue to form an MP instruction (that is, the first read instruction), and the number of planes included in the MP instruction is less than Default number of planes.
  • the maximum number of concurrent planes supported by the memory is determined by the structure or type of the flash memory in the memory.
  • the maximum number of concurrent planes supported by the memory is at least two, that is, N is an integer greater than or equal to two.
  • the above preset number of planes is less than or equal to the maximum number of concurrent planes supported by the memory, and the preset number of planes is at least two. That is, the preset number of planes is an integer greater than or equal to two and less than or equal to N.
  • the preset number of planes can be two.
  • the preset number of planes may be two or three.
  • the preset number of planes may be two, three, or four.
  • the preset number of planes may be two, three, four, five, or six.
  • the preset number of planes may be two, three, four, five, six, seven, or eight.
  • the embodiment of the present application does not limit the specific number of maximum concurrent planes supported by the memory and the specific number of preset planes, as long as the number of preset planes is less than or equal to the maximum number of concurrent planes supported by the memory.
  • the following embodiments are illustrated by taking the maximum number of concurrent planes supported by the memory as four and the preset number of planes as four as an example.
  • the second read instruction may be an SP instruction in the second read request queue, or an MP instruction in the second read request queue.
  • the multiple planes included in the second read command are different planes, and the number of the multiple planes included in the second read command is less than the preset number of planes.
  • what type of instruction is the second read instruction, the number of planes specifically included in the second read instruction, and the position of the second read instruction in the second read request queue are not limited.
  • the first read command and the second read command are combined into an MP command, and the number of planes included in the MP command is less than or equal to the preset number of planes.
  • the sum of the number of planes included in the first read command and the number of planes included in the second read command is greater than the preset number of planes, all the planes corresponding to the first read command and part of the planes corresponding to the second read command form an MP command, which The number of planes included in the MP command is equal to the preset number of planes.
  • the embodiment of the present application does not limit the specific number of planes included in the MP instruction combined with the first read instruction and the second read instruction.
  • the MP command when combining the first read command and the second read command into an MP command, the MP command includes The number of planes is two, and the number of planes included in the MP command is four less than the preset number of planes.
  • the first read command is an MP command including two planes
  • the second read command is an SP command as an example
  • the number of planes included in the MP instruction is three
  • the number of planes included in the MP instruction is less than the preset number of four planes.
  • the first read command is an MP command including two planes
  • the second read command is an MP command with two planes as an example, the first read command and the second read command
  • the number of planes included in the MP command is four
  • the number of planes included in the MP command is equal to the preset number of four planes.
  • the first read command is an MP command including two planes
  • the second read command is an MP command with three planes. Select two planes from the three planes corresponding to the command, and combine the two planes with the first read command to form an MP command.
  • the number of planes included in the MP command is four, and the number of planes included in the MP command is equal to the preset plane. The number is four.
  • the number of planes specifically included in the MP command is not limited.
  • the first read request queue and the second read request queue are two different read request queues.
  • the first read request queue may be an IO read request queue
  • the second read request queue may be another IO read request queue.
  • the first read request queue may be an IO read request queue
  • the second read request queue may be a GC read request queue.
  • the embodiment of the present application does not limit the specific types of the first read request queue and the second read request queue.
  • the first read request queue is the IO read request queue
  • the second read request queue is the GC read request queue. Example to illustrate.
  • the embodiment of the present application does not limit the specific conditions that need to be met when the first read instruction and the second read instruction are combined into an MP instruction.
  • the plane corresponding to the first read instruction and the second read instruction includes the same page address, And when the planes corresponding to the first read command and the second read command are different planes, these two read commands may be combined into an MP command as an example for illustration.
  • the command scheduling device queries the first read command in the GC read request queue from the queue head to the queue tail.
  • the plane corresponding to the read command includes a second read command with the same page address, and the second read command and the first read command are combined into an MP command.
  • the plane corresponding to SP1 includes addresses of block X and page A.
  • the command dispatching device queries the SP command in the GC read request queue from the head of the team to the tail of the team, and finds out that SP2 contains block Z and page A addresses, that is, the SP2 and SP1 have the same page A address, so SP2 is the second read command.
  • the instruction scheduling device takes SP1 out of the IO read request queue, takes SP2 out of the GC read request queue, and combines the two SP instructions SP1 and SP 2 into an MP instruction, and the number of planes included in the MP instruction is two.
  • the instruction scheduling device queries the read instructions in the GC read request queue from the head of the queue to the tail of the queue, and finds that the plane corresponding to MP1 contains block Y and page B addresses, that is, MP1 and SP3 have the same page B address, so MP1 is the second read command.
  • the instruction scheduler device takes SP3 out of the IO read request queue, takes MP1 out of the GC read request queue, and combines the two read instructions SP3 and MP1 into an MP instruction, and the number of planes included in the MP instruction is four.
  • the command scheduling device Query from the head of the queue to the tail of the queue, and the plane corresponding to the first read instruction in the GC read request queue includes the second read instruction with the same page address, and combine the second read instruction and the first read instruction into an MP instruction.
  • MP2 when the first read command in the IO read request queue is MP2, MP2 includes three planes, and the number of planes of MP2 is less than the preset number of four planes, MP2 corresponds to When the plane includes block M and page C addresses.
  • the instruction scheduling device queries the read instructions in the GC read request queue from the head to the tail of the queue, and finds that the plane corresponding to SP4 contains block F and page C addresses, that is, the SP4 and MP2 have the same page C address, so SP4 is the second read command.
  • the instruction scheduling device takes MP2 out of the IO read request queue, takes SP4 out of the GC read request queue, and combines the two read instructions MP2 and SP4 into an MP instruction, and the number of planes included in the MP instruction is four.
  • the plane corresponding to MP3 when the first read command in the IO read request queue is MP3, and the number of planes included in MP3 is two less than the preset number of planes four, the plane corresponding to MP3 When including block Q and page D addresses.
  • the instruction scheduling device queries the read instructions in the GC read request queue from the head to the tail of the queue, and finds that the plane corresponding to MP4 contains block E and page D addresses, that is, the MP4 and MP3 have the same page D address, so MP4 is the second read command.
  • the instruction scheduling device takes MP3 out of the IO read request queue, takes MP4 out of the GC read request queue, and combines the two read instructions MP3 and MP4 into an MP instruction, and the number of planes included in the MP instruction is four.
  • the instruction scheduling device determines whether there are other instructions in the first read request queue that can be combined with the first instruction in the first read request queue to form an MP instruction.
  • the other instructions and the first instruction are combined to form an MP instruction. If the number of planes included in the MP command is equal to the preset number of planes, the MP command is sent to the flash memory in the memory. If the number of planes included in the MP command is less than the preset number of planes, the above step S201 is executed using the MP command as the first read command.
  • the above step S201 is performed by using the first instruction as a first read instruction (the first read instruction is an SP instruction).
  • the instruction scheduling device directly issues the first read instruction.
  • the instruction scheduling device may take out the first read instruction from the IO read request queue, take out the second read instruction from the GC read request queue, combine the first read instruction and the second read instruction into an MP instruction, and send The flash memory in the memory issues the MP instruction.
  • the instruction scheduling device takes SP1 (the first read instruction) out of the IO read request queue, takes SP2 (the second read instruction) out of the GC read request queue, and combines SP1 and SP2 into an MP instruction Afterwards, issue the MP instruction to the flash memory in the memory.
  • the embodiment of the present application also provides another instruction scheduling method, as shown in FIG. 4 , the method may further include step S203 in addition to the above steps S201-S202.
  • the first duration is related to the GC credit value and the read times per second of the flash memory in the memory, and the GC credit value is used to indicate the number of issued instructions in the second read request queue within one flow control cycle.
  • the flow control cycle is the length of a scheduling cycle for the IO read request queue and the GC read request queue.
  • the flow control period may be preset, and the duration of the flow control period is the sum of the duration of issuing IO read commands in the preset IO read request queue and the duration of issuing GC read commands in the preset GC read request queue.
  • the first duration may be determined according to the GC credit value and the number of reads per second of the memory.
  • the first duration is the quotient of the flow control period and the GC credit value.
  • the first duration is the quotient of the flow control period and the read times of the memory per second.
  • T the first duration
  • K the number of memory reads per second
  • T the number of memory reads per second
  • the above-mentioned first duration can be realized by the timing function of a timer, or can be realized according to the number of instructions issued by the first read request queue. For example, when the IO read request queue issues L instructions continuously, then issue the instructions in the GC read request queue.
  • the embodiment of the present application does not limit the specific implementation manner of the first duration.
  • Step S203 may be performed before step S201, may also be performed after step S201, or may be performed simultaneously with step S201.
  • FIG. 4 shows an example by taking step S203 executed after step S201 as an example.
  • the embodiment of the present application also provides another instruction scheduling method, as shown in FIG. 6 , which may further include step S204 before the above step S201.
  • the detection information of the flash memory in the memory in step S204 may be the detection information of the flash memory detected in the flow control cycle.
  • the detection information of the flash memory includes at least one of load pressure, read-write ratio, or number of empty blocks.
  • the load pressure refers to the sum of the number of reads per second and the number of writes per second of the storage.
  • the load pressure of the storage can be expressed by read IOPS+write IOPS.
  • the read/write ratio refers to the ratio of read IOPS to write IOPS, which can be represented by read IOPS/write IOPS.
  • the number of empty blocks refers to the number of storage units that do not store data in the SSD.
  • the embodiment of the present application does not limit the specific type of input information.
  • the following embodiment uses the detection information of the flash memory in the memory including load pressure, load type and number of empty blocks as an example for illustration.
  • the first read command in the first read request queue and the second read command in the second read request queue are combined into an MP command.
  • first execute step S204 after determining that the load pressure of the solid state disk is less than or equal to the light load threshold, and the read/write ratio of the solid state disk is greater than or equal to the read ratio threshold, and the number of empty blocks of the solid state disk is greater than or equal to When it is equal to the empty block threshold, continue to execute step S201.
  • first execute step S204 after determining that the load pressure of the solid state disk is greater than the light load threshold, or the read/write ratio of the solid state disk is less than the read ratio threshold, or the number of empty blocks of the solid state disk is less than the empty block threshold Time limit, do not execute step S201.
  • the load pressure of the SSD is greater than the light load threshold
  • the first read command in the IO read request queue and the second read command in the GC read request queue are combined into an MP command
  • the read speed of the SSD will be reduced. Affect the read efficiency of SSD.
  • the read/write ratio of the SSD is less than the read ratio threshold
  • the number of empty blocks in the SSD may be insufficient .
  • the number of empty blocks in the solid state disk is less than the empty block threshold, if you reduce the sending speed of commands in the GC read request queue, the number of empty blocks will be further reduced, resulting in the inability to continue writing data to the solid state disk.
  • the SP instruction in the IO read request queue and the SP instruction in the GC read request queue are combined into an MP instruction, compared with only combining the SP instructions in the IO read request queue into an MP instruction in the prior art Compared with instructions, when the queue depth is 8QD-32QD, the average energy consumption of the solid state disk can be reduced by 5% to 7%.
  • the embodiment of the present application combines the first read instruction in the IO read request queue with the second read instruction in the GC read request queue to form an MP instruction.
  • the command is issued to reduce the energy consumption of the solid state drive.
  • the issuance of the GC read request queue can be delayed, the speed of issuing instructions in the GC read request queue can be reduced, and the GC read requests can be increased.
  • the queue depth of the queue further increases the probability that the first read command in the IO read request queue and the second read command in the GC read request queue are combined into an MP command.
  • the energy consumption of the solid state disk can be reduced without Affects the performance of solid-state drives.
  • an embodiment of the present application provides an instruction scheduling device 800 .
  • the instruction scheduling apparatus 800 may include a processor 801 and an interface circuit 802 .
  • the instruction scheduling apparatus 800 may further include a memory 803, and the memory 803 may store computer program codes for implementing the instruction scheduling method shown in FIG. 2 , FIG. 4 , FIG. 6 or FIG. 7 .
  • the processor 801 is configured to combine the first read instruction with the second read instruction in the second read request queue into multiple Planar read MP instruction; the first read request queue and the second read request queue are two different read request queues.
  • the processor 801 is also configured to issue an MP instruction to the flash memory through the interface circuit 802 .
  • the maximum number of concurrent planes supported by the flash memory is N, and the preset number of planes is less than or equal to N.
  • the first read request queue is an input/output IO read request queue
  • the second read request queue is a garbage collection GC read request queue.
  • the processor 801 is further configured to suspend issuing instructions in the second read request queue to the flash memory within the first duration.
  • the first duration is related to the GC credit value and the Read IOPS of the flash memory per second, and the GC credit value is used to indicate the number of instructions issued in the second read request queue within one flow control cycle.
  • the first duration is the quotient of the flow control cycle and the GC credit value; when the GC credit value is greater than the number of reads per second of the flash memory, the first duration is The duration is the quotient of the flow control period and the number of reads per second of the flash memory.
  • the processor 801 is specifically configured to combine the first read instruction and the second read instruction in the second read request queue into an MP instruction according to the detection information of the flash memory.
  • the input information includes at least one of load pressure, read-write ratio, or number of empty blocks.
  • the processor 801 is specifically configured to combine the first read instruction with the second read request when the load pressure is less than or equal to the light load threshold, and the read/write ratio is greater than or equal to the read ratio threshold, and the number of empty blocks is greater than or equal to the empty block threshold.
  • the second read command in the queue is combined into an MP command.
  • the embodiment of the present application also provides a computer-readable storage medium, where computer program code is stored in the computer-readable storage medium.
  • the electronic device executes the program shown in FIG. 2 , FIG. 4 , or FIG. 6 .
  • the instruction scheduling method shown in FIG. 7 shown in FIG. 7 .
  • the embodiment of the present application also provides a computer program product, which, when running on a computer, causes the computer to execute the instruction scheduling method shown in FIG. 2 , FIG. 4 , FIG. 6 or FIG. 7 .
  • the steps of the methods or algorithms described in connection with the disclosure of this application can be implemented in the form of hardware, or can be implemented in the form of a processor executing software instructions.
  • Software instructions can be composed of corresponding software modules, and software modules can be stored in random access memory (Random Access Memory, RAM), flash memory, erasable programmable read-only memory (Erasable Programmable ROM, EPROM), electrically erasable Programmable read-only memory (Electrically EPROM, EEPROM), registers, hard disk, removable hard disk, CD-ROM, or any other form of storage medium known in the art.
  • An exemplary storage medium is coupled to the processor such the processor can read information from, and write information to, the storage medium.
  • the storage medium may also be a component of the processor.
  • the processor and storage medium can be located in the ASIC.
  • the ASIC may be located in the core network interface device.
  • the processor and the storage medium may also exist in the core network interface device as discrete components.
  • the functions described in the present invention may be implemented by hardware, software, firmware or any combination thereof.
  • the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium.
  • Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another.
  • a storage media may be any available media that can be accessed by a general purpose or special purpose computer.

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Abstract

本申请实施例公开了一种指令调度方法及装置，涉及存储领域，解决了在存储器负载较低的情况下，存储器读指令组合成MP指令概率较低，不能有效降低存储器能耗的问题。具体方案为：首先，在第一读请求队列中的第一读指令包括的平面plane数量小于预设plane数量的情况下，将第一读指令与第二读请求队列中的第二读指令组合为多平面读MP指令；其中，第一读请求队列和第二读请求队列为两个不同的读请求队列；然后，向闪存下发该MP指令。

Description

一种指令调度方法及装置 技术领域
本申请实施例涉及存储领域，尤其涉及一种指令调度方法及装置。
背景技术
目前，固态硬盘(solid state disk，SSD)因具有启动速度快、读取速度快，抗摔性能强等优点，使用的用户越来越多。计算机读取固态硬盘时，先向固态硬盘中的主控芯片发送读指令，然后固态硬盘中的主控芯片向固态硬盘中的闪存下发读指令，该读指令可以分为单平面读(single plane read，SP)指令和多平面读(multi plane read，MP)指令，SP指令用于读取一个plane的数据，MP指令用于读取多个plane的数据。
在SSD的负载较低的情况下，大部分输入输出(input output，IO)读指令为SP指令，由于在读取相同大小的数据时，SP指令所需的能耗较MP指令所需的能耗大，因此，为了降低SSD的能耗，可以将多个IO读指令组合成MP指令。
但是，在SSD的负载较低的情况下，将多个IO读指令组合成MP指令的概率较低，因此不能有效的降低SSD的能耗。
发明内容
本申请实施例提供一种指令调度方法及装置，能够提高读指令组合成MP指令的概率，有效降低存储器的读取能耗。
本申请实施例采用如下技术方案：
本申请实施例的第一方面，提供一种指令调度方法，包括：首先，在第一读请求队列中的第一读指令包括的平面plane数量小于预设plane数量的情况下，将该第一读指令与第二读请求队列中的第二读指令组合为多平面读MP指令。其中，第一读请求队列和第二读请求队列为两个不同的读请求队列。然后，再向闪存下发该MP指令。
第一读指令包括的plane数量小于预设plane数量。第一读指令可以包括一个plane，也可以包括多个plane。当第一读指令包括一个plane时，第一读指令为SP指令，当第一读指令包括多个plane时，第一读指令包括的多个plane为不同的plane，第一读指令为MP指令。本申请实施例对于第一读指令具体包括plane的数量，第一读指令具体的类型并不限定。
第二读指令可以为第二读请求队列中的SP指令，也可以为第二读请求队列中的MP指令。而且，当第二读指令为MP指令时，第二读指令包括的多个plane为不同的plane，第二读指令包括的plane数量小于预设plane数量。本申请实施例对于第二读指令具体为什么类型的指令，第二读指令具体包括plane的数量，第二读指令在第二读请求队列中的位置并不限定。
可选的，第一读指令与第二读指令组合为MP指令，该MP指令包括的plane数量小于或等于预设plane数量。当第一读指令包括的plane数量与第二读指令包括的plane数量之和大于预设plane数量时，将第一读指令对应的全部plane与第二读指令对应的 部分plane组成MP指令，该MP指令包括的plane数量等于预设plane数量。本申请实施例对于第一读指令与第二读指令组合的MP指令包括的plane具体数量并不限定。可选的，本申请提供的指令调度方法可以应用于采用闪存(FLASH芯片)作为存储介质的任何存储器中(例如，固态硬盘)。
基于本方案，在第一读请求队列中的第一读指令包括的平面plane数量小于预设plane数量的情况下，可以将该第一读指令与第二读请求队列中的第二读指令组合为MP指令，然后向存储器中的闪存下发MP指令。即采用本方案，可以将两个不同读请求队列中的读指令组合成MP指令，因此相较于现有技术中仅能将一个读请求队列中的SP指令与该读请求队列中的其他SP指令组合成MP指令，本方案能够提高读指令组合成MP指令的概率。由于读取相同数据时，采用MP指令所消耗的能耗比采用SP指令所消耗的能耗小，因此本方案能够有效的降低存储器的读取能耗。
结合第一方面，在一种实现方式中，该方法还包括：闪存支持的最大并发plane数量为N，上述预设plane数量小于或等于所述N。
存储器中的闪存支持的最大并发plane数量由闪存的结构或类型决定，闪存支持的最大并发plane数量至少为两个，即N为大于或等于二的整数。上述预设plane数量小于或等于闪存支持的最大并发plane数量，而且预设plane数量至少为两个，即预设plane数量为大于或等于二，且，小于或等于N的整数。
基于本方案，通过在第一读指令包括的平面plane数量小于预设plane数量的情况下，当第一读指令为SP指令，将第一读指令与第二读请求队列中的第二读指令组合为MP指令向存储器中的闪存下发，可以有效的降低存储器的读取能耗，当第一读指令为MP指令，将第一读指令与第二读请求队列中的第二读指令组合为MP指令向存储器中的闪存下发，同样可以有效的降低存储器的读取能耗。
结合第一方面，在一种实现方式中，该方法还包括：第一读请求队列为输入输出IO读请求队列，第二读请求队列为垃圾回收GC读请求队列。
基于本方案，通过将IO读请求队列中的第一读指令与GC读请求队列中的第二读指令组合成MP指令，可以提高IO读指令组合成MP指令的概率，能够降低存储器的读取能耗。
结合第一方面，在一种实现方式中，上述方法还包括：在第一时长内暂停向闪存下发第二读请求队列中的指令。
基于本方案，可以通过设定第一时长，使得第二读请求队列在第一时长内暂停下发指令，以降低第二读请求队列中的指令下发速度，使得第二读请求队列的队列深度不断加深，第二读请求队列中的读指令不断堆积，因此能够提高第一读请求队列中的第一读指令与第二读请求队列中的第二读指令组合成MP指令的概率，降低存储器的读取能耗。
结合第一方面，在一种实现方式中，上述方法还包括：第一时长与GC信用值和存储器每秒的读取次数Read IOPS有关，GC信用值用于指示在一个流控周期内第二读请求队列中指令下发的数量。
基于本方案，如果第一时长过长，GC读指令长时间不下发，将导致空块数量减少影响存储器数据的写入，如果第一时长过短，将导致IO读请求队列中的第一读指令还 没有与GC读请求队列中的第二读指令组合成MP指令，GC读请求队列中的第二读指令就已经下发，因此本方案通过将第一时长与GC信用值和存储器中的闪存每秒的读取次数相关联，能够确保第一时长不会太短也不会太长，以在不影响存储器性能的情况下，降低存储器的读取能耗。
结合第一方面，在一种实现方式中，该方法还包括：在GC信用值小于或等于闪存每秒的读取次数时，第一时长为流控周期与GC信用值的商。在GC信用值大于闪存每秒的读取次数时，第一时长为流控周期与闪存每秒的读取次数的商。
基于本方案，通过流控周期、GC信用值、闪存每秒的读取次数来确定第一时长，使得第一时长不会太短也不会太长，能够在不影响存储器性能的情况下，降低存储器的读取能耗。可选的，本申请还可以根据存储器的实时数据不断修正第一时长，能够更准确延迟GC读请求队列下发，降低存储器的能耗，并且不会减少存储器的空块数量，不会影响存储器的性能。
结合第一方面，在一种实现方式中，该方还包括：根据所述闪存的检测信息，将所述第一读指令与第二读请求队列中的第二读指令组合为所述MP指令；所述输入信息包括负载压力、读写比例或空块数量中的至少一种。
可选的，以存储器为固态硬盘为例，负载压力指固态硬盘每秒的读取次数与每秒的写入次数之和，可以用读IOPS(input/output operations per second，IOPS)+写IOPS表示固态硬盘的负载压力。固态硬盘的读写比例是指读IOPS与写IOPS的比值，可以用读IOPS/写IOPS表示。空块数量是指固态硬盘中未存储数据的存储单元的数量。
基于本方案，由于存储器中闪存的检测信息在一些情况下(例如，负载较高时)，如果将IO读请求队列中的第一读指令与GC读请求队列中的第二读指令组合成MP指令，可能会影响存储器的性能。因此本方案通过根据存储器中闪存的负载压力、负载类型和空块数量，确定将IO读请求队列中的第一读指令与GC读请求队列中的第二读指令组合为MP指令，能够在不影响存储器性能的情况下，降低存储器的读取能耗。
结合第一方面，在一种实现方式中，该方法还包括：在负载压力小于或等于轻负载门限，且读写比例大于或等于读比例门限，且空块数量大于或等于空块门限时，将第一读指令与第二读请求队列中的第二读指令组合为MP指令。
基于本方案，在负载压力小且读写比例高且空块数量多的情况下，通过将IO读请求队列中的第一读指令与GC读请求队列中的第二读指令组合为MP指令，可以有效降低存储器的读取能耗，并且不会影响存储器的性能。
第二方面，本申请提供一种指令调度装置，包括：处理器和接口电路。处理器，用于在第一读请求队列中的第一读指令包括的平面plane数量小于预设plane数量的情况下，将第一读指令与第二读请求队列中的第二读指令组合为多平面读MP指令。第一读请求队列和第二读请求队列为两个不同的读请求队列。处理器，还用于通过接口电路向闪存下发MP指令。
结合第二方面，在一种可能的实现方式中，闪存支持的最大并发plane数量为N，上述预设plane数量小于或等于所述N。
结合第二方面，在一种可能的实现方式中，第一读请求队列为输入输出IO读请求队列，第二读请求队列为垃圾回收GC读请求队列。
结合第二方面，在一种可能的实现方式中，处理器，还用于在第一时长内暂停向闪存下发第二读请求队列中的指令
结合第二方面，在一种可能的实现方式中，上述第一时长与GC信用值和闪存每秒的读取次数Read IOPS有关，GC信用值用于指示在一个流控周期内第二读请求队列中指令下发的数量。
结合第二方面，在一种可能的实现方式中，在GC信用值小于或等于闪存每秒的读取次数时，上述第一时长为流控周期与GC信用值的商。在GC信用值大于闪存每秒的读取次数时，上述第一时长为流控周期与闪存每秒的读取次数的商。
结合第二方面，在一种可能的实现方式中，处理器，具体用于根据闪存的检测信息，将所述第一读指令与第二读请求队列中的第二读指令组合为所述MP指令。该检测信息包括负载压力、读写比例或空块数量中的至少一种。
结合第二方面，在一种可能的实现方式中，处理器，具体用于在所述负载压力小于或等于轻负载门限，且所述读写比例大于或等于读比例门限，且空块数量大于或等于空块门限时，将所述第一读指令与所述第二读请求队列中的第二读指令组合为MP指令。
第三方面，本申请提供一种存储设备，包括上述第二方面任一项所述的指令调度装置，以及所述闪存。该存储设备包括固态硬盘。
第四方面，本申请提供一种计算机可读存储介质，包括指令。当指令在计算机上运行时，使得计算机执行如上述第一方面提供的方法。
第五方面，本申请提供一种计算机程序产品，当计算机程序产品在计算机上运行时，使得计算机执行如上述第一方面提供的方法。
本申请中第二方面、第三方面、第四方面和第五方面的描述，可以参考第一方面的详细描述；并且，第二方面、第三方面、第四方面和第五方面描述的有益效果，可以参考第一方面的有益效果分析，此处不再赘述。
附图说明
图1为本申请实施例提供的一种指令调度方法的应用示意图；
图2为本申请实施例提供的一种指令调度方法的流程示意图；
图3A为本申请实施例提供的一种指令调度方法的应用示意图；
图3B为本申请实施例提供的又一种指令调度方法的应用示意图；
图3C为本申请实施例提供的另一种指令调度方法的应用示意图；
图3D为本申请实施例提供的再一种指令调度方法的应用示意图；
图4为本申请实施例提供的另一种指令调度方法的流程示意图；
图5为本申请实施例提供的再一种指令调度方法的应用示意图；
图6为本申请实施例提供的又一种指令调度方法的流程示意图；
图7为本申请实施例提供的再一种指令调度方法的流程示意图；
图8为本申请实施例提供的一种指令调度装置的结构示意图。
具体实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行描述。在本申请中，“至少一个”是指一个或者多个，“多个”是指两个或两个以上。“和/或”，描 述关联对象的关联关系，表示可以存在三种关系，例如，A和/或B，可以表示：单独存在A，同时存在A和B，单独存在B的情况，其中A，B可以是单数或者复数。字符“/”一般表示前后关联对象是一种“或”的关系。“以下至少一项(个)”或其类似表达，是指的这些项中的任意组合，包括单项(个)或复数项(个)的任意组合。例如，a，b或c中的至少一项(个)，可以表示：a，b，c，a和b，a和c，b和c，或，a和b和c，其中a、b和c可以是单个，也可以是多个。另外，为了便于清楚描述本申请实施例的技术方案，在本申请的实施例中，采用了“第一”、“第二”等字样对功能和作用基本相同的相同项或相似项进行区分，本领域技术人员可以理解“第一”、“第二”等字样并不对数量和执行次序进行限定。比如，本申请实施例中的第一读指令的“第一”和第二读指令中的“第二”仅用于区分不同的读指令。本申请实施例中出现的第一、第二等描述，仅作示意与区分描述对象之用，没有次序之分，也不表示本申请实施例中对设备个数的特别限定，不能构成对本申请实施例的任何限制。
一般情况下，固态硬盘在低负载时，大部分IO读指令为SP指令，每个SP指令用于读取一个plane的数据。
在不同队列深度(queue depth，QD)时IO读指令中SP指令的占比不同。当队列深度为1QD至16QD时，几乎100％的IO读指令都为SP指令，随着队列深度的增加，IO读指令中SP指令的占比逐渐减小。即在低负载的情况下，IO读指令中SP指令的占比很高。
然而，读取相同数据时，通过SP指令读取与通过MP指令读取所产生的能耗是不同的。例如，同时读取两个Plane的数据时，以每个Plane的数据量为4K为例，采用SP指令读取每个4K plane所需要的总能耗为SP指令读取数据能耗与SP指令输出数据能耗之和。采用MP指令读取第一个4K plane所需要的总能耗为MP指令读取数据能耗与MP指令输出数据能耗之和，而采用MP指令读取第二个4K plane的总能耗仅为MP指令输出数据能耗，因此，采用MP指令读取一个4K plane的平均能耗为(MP指令读取数据能耗)/2与输出数据能耗之和。比如，用MP Read tR表示读取一个4K plane数据时的MP指令读取数据能耗，用Data out表示输出一个4K plane数据时的MP指令输出数据能耗，那么采用MP指令读取两个4K Plane的数据的总能耗为MP Read tR+Data out*2，故采用MP指令读取一个4K Plane的数据的平均能耗为MP Read tR/2+Data out。读取一个4K plane的数据时，采用MP指令所消耗的能耗比采用SP指令所消耗的能耗少20％。
在固态硬盘低负载时，IO读指令中SP指令的占比很高。读取相同数据时，采用MP指令所消耗的能耗比采用SP指令所消耗的能耗小。因此，为了降低固态硬盘的能耗，可以将读请求队列中的SP指令组合成MP指令。
图1为一种指令调度方法。如图1所示，固态硬盘包括主控芯片和闪存，计算机读取固态硬盘时，先向固态硬盘中的主控芯片发送读指令，然后固态硬盘中的主控芯片向固态硬盘中的闪存下发读指令。计算机读取固态硬盘时，向固态硬盘发送的读指令按照类型可以分为IO读指令和GC读指令，IO读指令用于读取固态硬盘中存储的数据，GC读指令用于释放存储空间。现有分层设计下主控芯片内存在IO读和垃圾回收(garbage collection，GC)读两个独立的调度器。IO读指令包括多个plane，IO读 调度器用于将IO读指令中能够组成MP指令的plane组合成MP指令加入IO读请求队列，IO读调度器还用于将IO读指令中不能够组成MP指令的plane以SP指令加入IO读请求队列。GC读指令包括多个plane，GC读调度器用于将GC读指令中能够组成MP指令的plane组合成MP指令加入GC读请求队列，GC读调度器还用于将GC读指令中不能够组成MP指令的plane以SP指令加入GC读请求队列。固态硬盘中的主控芯片还包括出队调度器，出队调度器可以通过轮询调度(round-robin，RR)或加权循环调度(weighted round robin，WRR)来分配IO读请求队列和GC读请求队列中指令下发的带宽，因此固态硬盘可以一边读取数据和一边释放存储空间，释放的存储空间可以存储待存储的数据。当出队调度器向闪存下发IO读请求队列中的IO读指令时，IO读请求队列中的IO读指令按照先进先出的原则依次下发，IO读请求队列中可以组合成MP指令的plane组合成MP指令下发，不能组合成MP指令的plane以SP指令下发。当出队调度器向闪存下发GC读请求队列中的GC读指令时，GC读请求队列中的指令按照先进先出的原则依次下发，GC读请求队列中可以组合成MP指令的plane组合成MP指令下发，不能组合成MP指令的以SP指令下发。
采用图1所示的方案时，在将SP指令组合成MP指令时，只能将IO读请求队列中的SP指令组合成MP指令，或者，只能将GC读请求队列中的SP指令组合成MP指令。但是，由于固态硬盘在低负载情况下，队列深度较浅，IO读请求队列中IO读指令数量较少，导致IO读请求队列中的SP指令组合成MP指令的概率较低，因此不能有效的降低固态硬盘的能耗。
为了缓解固态硬盘在负载较低时，IO读请求组合成MP指令的概率较低，不能有效的降低固态硬盘能耗的问题，本申请实施例提供一种指令调度方法，能够在存储器的负载较低时，提高组合MP指令的概率，有效降低存储器的读取能耗。
本申请实施例提供的指令调度方法可以应用于采用闪存(FLASH芯片)作为存储介质的任何存储器中。下述实施例以该存储器为固态硬盘为例对本申请实施例提供的指令调度方法进行说明。
图2为本申请实施例提供的一种指令调度方法，该方法可以由指令调度装置执行，如图2所示，该方法包括以下步骤S201～S202。以上方案主要由主控芯片或主控芯片上运行的软件执行，本实施例对此不限定。指令调度装置可以是主控芯片或主控芯片上运行的软件或其中至少部分。
S201、在第一读请求队列中的第一读指令包括的平面plane数量小于预设plane数量的情况下，将第一读指令与第二读请求队列中的第二读指令组合为MP指令。
第一读指令可以包括一个plane，也可以包括多个plane。当第一读指令包括一个plane时，第一读指令为SP指令，当第一读指令包括多个plane时，该多个plane为不同的plane，第一读指令为MP指令。本申请实施例对于第一读指令具体包括plane的数量，第一读指令具体的类型并不限定。
当第一读指令为SP指令时，可以认为第一读请求队列中不存在其他指令可以和第一读指令组合成MP指令。当第一读指令为MP指令时，可以认为在步骤S201之前，已将第一读请求队列中的多个指令组合成MP指令，该MP指令即为第一读指令。例如，在步骤S201之前，将第一读请求队列中的首个指令与第一读请求队列中的其他指 令组合成MP指令(即为第一读指令)，而且该MP指令包括的plane数量小于预设plane数量。存储器支持的最大并发plane数量由存储器中闪存的结构或类型决定，存储器支持的最大并发plane数量至少为两个，即N为大于或等于二的整数。上述预设plane数量小于或等于存储器支持的最大并发plane数量，而且该预设plane数量至少为两个。即预设plane数量为大于或等于二，且，小于或等于N的整数。
例如，存储器支持最大并发plane数量为两个时，预设plane数量可以为两个。再例如，存储器支持最大并发plane数量为三个时，预设plane数量可以为两个，也可以为三个。又例如，存储器支持最大并发plane数量为四个时，预设plane数量可以为两个或三个或四个。又例如，存储器支持最大并发plane数量为六个时，预设plane数量可以为两个或三个或四个或五个或六个。又例如，存储器支持最大并发plane数量为八个时，预设plane数量可以为两个或三个或四个或五个或六个或七个或八个。本申请实施例对于存储器支持最大并发plane的具体数量，以及预设plane的具体数量并不限定，只要预设plane的数量小于或等于存储器支持最大并发plane的数量即可。下述实施例以存储器支持最大并发plane数量为四个，预设plane数量为四个为例进行示例性说明。
第二读指令可以为第二读请求队列中的SP指令，也可以为第二读请求队列中的MP指令。而且，当第二读指令为MP指令时，第二读指令包括的多个plane为不同的plane，且第二读指令包括的多个plane的数量小于预设plane数量。本申请实施例对于第二读指令具体为什么类型的指令，第二读指令具体包括plane的数量，第二读指令在第二读请求队列中的位置并不限定。
可选的，第一读指令与第二读指令组合为MP指令，该MP指令包括的plane数量小于或等于预设plane数量。当第一读指令包括的plane数量与第二读指令包括的plane数量之和大于预设plane数量时，将第一读指令对应的全部plane与第二读指令对应的部分plane组成MP指令，该MP指令包括的plane数量等于预设plane数量。本申请实施例对于第一读指令与第二读指令组合的MP指令包括的plane具体数量并不限定。
例如，以预设plane数量为四个，第一读指令为SP指令，第二读指令也为SP指令为例，将第一读指令与第二读指令组合为MP指令时，该MP指令包括的plane数量为两个，该MP指令包括的plane数量小于预设plane数量四个。
再例如，以预设plane数量为四个，第一读指令为包括两个plane的MP指令，第二读指令为SP指令为例，将第一读指令与第二读指令组合为MP指令时，该MP指令包括的plane数量为三个，该MP指令包括的plane数量小于预设plane数量四个。
再例如，以预设plane数量为四个，第一读指令为包括两个plane的MP指令，第二读指令也为两个plane的MP指令为例，将第一读指令与第二读指令组合为MP指令时，该MP指令包括的plane数量为四个，该MP指令包括的plane数量等于预设plane数量四个。
再例如，以预设plane数量为四个，第一读指令为包括两个plane的MP指令，第二读指令为三个plane的MP指令为例，按照先进先出的原则，从第二读指令对应的三个plane中选出两个plane，将该两个plane与第一读指令组合为MP指令，该MP指令包括的plane数量为四个，该MP指令包括的plane数量等于预设plane数量四个。 本申请实施例对于第一读指令与第二读指令组合为MP指令时，该MP指令具体包括plane的数量并不限定。
第一读请求队列和第二读请求队列为两个不同的读请求队列。例如，第一读请求队列可以为一个IO读请求队列，第二读请求队列可以为另一个IO读请求队列。再例如，第一读请求队列可以为IO读请求队列，第二读请求队列可以为GC读请求队列。本申请实施例对第一读请求队列和第二读请求队列的具体类型并不限定，下述实施例以第一读请求队列为IO读请求队列，第二读请求队列为GC读请求队列为例进行说明。
本申请实施例对于第一读指令与第二读指令组合成MP指令时需要满足的具体条件并不限定，下述实施例以第一读指令和第二读指令对应的plane包括相同page地址，且第一读指令和第二读指令对应的plane均为不同的plane时，这两个读指令可以组合成MP指令为例进行示例性说明。
示例性的，以预设plane数量为四个plane为例，当IO读请求队列中的第一读指令为SP指令时，指令调度装置从队头向队尾查询GC读请求队列中与第一读指令对应的plane包括相同page地址的第二读指令，并将第二读指令与第一读指令组合为MP指令。
例如，结合图3A，以预设plane数量为四个plane为例，当IO读请求队列的第一读指令为SP1，SP1对应的plane包括block X、page A地址时。指令调度装置从队头向队尾查询GC读请求队列中的SP指令，查寻到SP2包含block Z、page A地址，即该SP2与SP1有相同的page A地址，因此SP2为第二读指令。指令调度装置将SP1从IO读请求队列取出，将SP2从GC读请求队列取出，并将SP1和SP 2这两个SP指令组合为MP指令，该MP指令包括的plane数量为二。
再例如，结合图3B，以预设plane数量为四个plane为例，当IO读请求队列的第一读指令为SP3，SP3对应的plane包括block K、page B地址时。指令调度装置从队头向队尾查询GC读请求队列中的读指令，查寻到MP1对应的plane包含block Y、page B地址，即该MP1与SP3有相同的page B地址，因此MP1为第二读指令。指令调度器装置将SP3从IO读请求队列取出，将MP1从GC读请求队列取出，并将SP3和MP1这两个读指令组合为MP指令，该MP指令包括的plane数量为四。
示例性的，以预设plane数量为四个plane为例，当IO读请求队列中的第一读指令为MP指令，且第一读指令包括的plane数量小于预设plane数量时，指令调度装置从队头向队尾查询GC读请求队列中与第一读指令对应的plane包括相同page地址的第二读指令，并将第二读指令与第一读指令组合为MP指令。
例如，结合图3C，以预设plane数量为四个plane为例，当IO读请求队列的第一读指令为MP2，MP2包括3个plane，MP2的plane数量小于预设plane数量四，MP2对应的plane包括block M、page C地址时。指令调度装置从队头向队尾查询GC读请求队列中的读指令，查寻到SP4对应的plane包含block F、page C地址，即该SP4与MP2有相同的page C地址，因此SP4为第二读指令。指令调度装置将MP2从IO读请求队列取出，将SP4从GC读请求队列取出，并将MP2和SP4这两个读指令组合为MP指令，该MP指令包括的plane数量为四。
再例如，结合图3D，以预设plane数量为四个plane为例，当IO读请求队列的第 一读指令为MP3，MP3包括的plane数量为二小于预设plane数量四，MP3对应的plane包括block Q、page D地址时。指令调度装置从队头向队尾查询GC读请求队列中的读指令，查寻到MP4对应的plane包含block E、page D地址，即该MP4与MP3有相同的page D地址，因此MP4为第二读指令。指令调度装置将MP3从IO读请求队列取出，将MP4从GC读请求队列取出，并将MP3和MP4这两个读指令组合为MP指令，该MP指令包括的plane数量为四。
可选的，在上述步骤S201之前还可以包括：指令调度装置确定第一读请求队列中是否存在其他指令可以和第一读请求队列中的首个指令拼成MP指令。当存在其他指令能够与首个指令拼成MP指令时，将其他指令与首个指令拼成MP指令。若该MP指令包括的plane数量等于预设plane数量，将该MP指令向存储器中的闪存下发。若该MP指令包括的plane数量小于预设plane数量，将该MP指令作为第一读指令执行上述步骤S201。当第一读请求队列中不存在能够与首个指令拼成MP指令的指令时，将首个指令作为第一读指令(该第一读指令为SP指令)执行上述步骤S201。
在一些示例中，如果第二读请求队列中不存在能够与第一读指令组合成MP指令的第二读指令，那么指令调度装置直接将第一读指令下发。
S202、向闪存下发MP指令。
示例性的，指令调度装置可以将第一读指令从IO读请求队列取出，将第二读指令从GC读请求队列取出，并将第一读指令和第二读指令组合成MP指令后，向存储器中的闪存下发该MP指令。
例如，如图3A所示，指令调度装置将SP1(第一读指令)从IO读请求队列取出，将SP2(第二读指令)从GC读请求队列取出，并将SP1与SP2组合成MP指令后，向存储器中的闪存下发该MP指令。
本申请实施例还提供另一种指令调度方法，如图4所示，该方法除包括上述步骤S201～S202以外，还可以包括步骤S203。
S203、在第一时长内暂停向闪存下发第二读请求队列中的指令。
第一时长与GC信用值和存储器中闪存每秒的读取次数有关，该GC信用值用于指示在一个流控周期内第二读请求队列中指令下发的数量。流控周期为IO读请求队列与GC读请求队列一个调度周期的时长。流控周期可以是预先设定的，流控周期的时长为预设IO读请求队列中的IO读指令下发的时长与预设GC读请求队列中的GC读指令下发的时长之和。
示例性的，根据GC信用值和存储器每秒的读取次数可以确定第一时长。在GC信用值小于或等于存储器每秒的读取次数时，第一时长为流控周期与GC信用值的商。在GC信用值大于存储器每秒的读取次数时，第一时长为流控周期与存储器每秒的读取次数的商。本申请实施例对于第一时长的具体确定方法并不限定，在此仅是示例性说明。
例如，以第一时长为T，流控周期为K，存储器每秒的读取次数为读IOPS为例，当GC信用值低于读IOPS时，T＝K/GC信用值，当GC信用值高于读IOPS，T＝K/读IOPS。
示例性的，上述第一时长可以借助定时器的定时功能实现，也可以根据第一读请 求队列下发指令的数量实现。例如，IO读请求队列连续下发L个指令时，再下发GC读请求队列中的指令。本申请实施例对于第一时长的具体实现方式并不限定。
例如，如图5所示，通过在T时长内暂停向闪存下发GC读请求队列中的指令，可以降低GC读请求队列中指令的下发速度，使得GC读请求队列的队列深度不断加深，从而可以提高IO读请求队列中的第一读指令与GC读请求队列中的第二读指令组合成MP指令的概率。
本申请实施例对于上述步骤S203与步骤S201的先后执行顺序并不限定。步骤S203可以在步骤S201之前执行，也可以在步骤S201之后执行，还可以与步骤S201同时执行。图4以步骤S203在步骤S201之后执行为例进行示例性示意。
本申请实施例还提供又一种指令调度方法，如图6所示，在上述步骤S201之前还可以包括步骤S204。
S204、根据闪存的检测信息，将第一读指令与第二读请求队列中的第二读指令组合为MP指令。
步骤S204中存储器中闪存的检测信息可以为流控周期内检测的闪存的检测信息。该闪存的检测信息包括负载压力、读写比例或空块数量中的至少一种。负载压力指存储器每秒的读取次数与每秒的写入次数之和，可以用读IOPS+写IOPS表示存储器的负载压力。读写比例是指读IOPS与写IOPS的比值，可以用读IOPS/写IOPS表示。空块数量是指固态硬盘中未存储数据的存储单元的数量。本申请实施例对于输入信息的具体类型并不限定，下述实施例以存储器中闪存的检测信息包括负载压力、负载类型和空块数量为例进行示例性说明。
如图7所示，在固态硬盘的负载压力小于或等于轻负载门限，且固态硬盘的读写比例大于或等于读比例门限，且固态硬盘的空块数量大于或等于空块门限时，将第一读请求队列中的第一读指令与第二读请求队列中的第二读指令组合为MP指令。
例如，在执行步骤S201之前，先执行步骤S204，在确定固态硬盘的负载压力小于或等于轻负载门限，且固态硬盘的读写比例大于或等于读比例门限，且固态硬盘的空块数量大于或等于空块门限时，继续执行步骤S201。
如图7所示，在固态硬盘的负载压力大于轻负载门限，或者，固态硬盘的读写比例小于读比例门限，或者，固态硬盘的空块数量小于空块门限的情况下，确定不将第一读请求队列中的第一读指令与第二读请求队列中的第二读指令组合为MP指令。
例如，在执行步骤S201之前，先执行步骤S204，在确定固态硬盘的负载压力大于轻负载门限，或者，固态硬盘的读写比例小于读比例门限，或者，固态硬盘的空块数量小于空块门限时，不执行步骤S201。
由于当固态硬盘的负载压力大于轻负载门限时，如果将IO读请求队列中的第一读指令与GC读请求队列中的第二读指令组合为MP指令，会降低固态硬盘的读取速度，影响固态硬盘的读取效率。当固态硬盘的读写比例小于读比例门限时，如果将IO读请求队列中的第一读指令与GC读请求队列中的第二读指令组合为MP指令，可能导致固态硬盘的空块数量不足。当固态硬盘的空块数量小于空块门限时，如果降低GC读请求队列中指令的下发速度，会进一步减小空块数量，导致固态硬盘无法继续写入数据。因此，在固态硬盘的负载压力大于轻负载门限，或者，固态硬盘的读写比例小于 读比例门限，或者，固态硬盘的空块数量小于空块门限的情况下，确定不将第一读请求队列中的第一读指令与第二读请求队列中的第二读指令组合为MP指令。
采用本申请实施例的方案将IO读请求队列中的SP指令与GC读请求队列中的SP指令组合成MP指令，相较于现有技术中仅将IO读请求队列中的SP指令组合成MP指令相比，在队列深度为8QD～32QD时，能够将固态硬盘的平均能耗降低5％至7％。
可以理解的，由于读取相同数据时，MP指令较SP指令的能耗低，因此本申请实施例通过将IO读请求队列中第一读指令与GC读请求队列中第二读指令组合成MP指令下发，可以降低固态硬盘的能耗。而且通过在第一时长内，暂停向存储器中的闪存下发GC读请求队列中的指令，可以延迟GC读请求队列的下发，降低GC读请求队列中指令的下发速度，增加GC读请求队列的队列深度，进一步增加IO读请求队列中第一读指令与GC读请求队列中第二读指令组合成MP指令的概率。另外通过根据存储器中闪存的检测信息，确定是否将IO读请求队列中的第一读指令与GC读请求队列中的第二读指令组合为MP指令，能够降低固态硬盘的能耗，而不会影响固态硬盘的性能。
如图8所示，本申请实施例提供一种指令调度装置800。该指令调度装置800可以包括处理器801和接口电路802。可选的，指令调度装置800还可以包括存储器803，该存储器803可以存储用于实现图2、图4、图6或图7所示的指令调度方法的计算机程序代码。
处理器801，用于在第一读请求队列中第一读指令包括的plane数量小于预设plane数量的情况下，将第一读指令与第二读请求队列中的第二读指令组合为多平面读MP指令；第一读请求队列和第二读请求队列为两个不同的读请求队列。
处理器801，还用于通过接口电路802向闪存下发MP指令。
可选的，闪存支持的最大并发plane数量为N，预设plane数量小于或等于N。
可选的，第一读请求队列为输入输出IO读请求队列，第二读请求队列为垃圾回收GC读请求队列。
处理器801，还用于在第一时长内暂停向闪存下发第二读请求队列中的指令。
可选的，第一时长与GC信用值和闪存每秒的读取次数Read IOPS有关，GC信用值用于指示在一个流控周期内第二读请求队列中指令下发的数量。
可选的，在GC信用值小于或等于闪存每秒的读取次数时，第一时长为流控周期与GC信用值的商；在GC信用值大于闪存每秒的读取次数时，第一时长为流控周期与闪存每秒的读取次数的商。
处理器801，具体用于根据闪存的检测信息，将第一读指令与第二读请求队列中的第二读指令组合为MP指令。输入信息包括负载压力、读写比例或空块数量中的至少一种。
处理器801，具体用于在负载压力小于或等于轻负载门限，且读写比例大于或等于读比例门限，且空块数量大于或等于空块门限时，将第一读指令与第二读请求队列中的第二读指令组合为MP指令。
本申请实施例还提供一种计算机可读存储介质，该计算机可读存储介质中存储有计算机程序代码，当上述处理器执行该计算机程序代码时，电子设备执行图2、图4、 图6或图7所示的指令调度方法。
本申请实施例还提供了一种计算机程序产品，当该计算机程序产品在计算机上运行时，使得计算机执行图2、图4、图6或图7所示的指令调度方法。
结合本申请公开内容所描述的方法或者算法的步骤可以硬件的方式来实现，也可以是由处理器执行软件指令的方式来实现。软件指令可以由相应的软件模块组成，软件模块可以被存放于随机存取存储器(Random Access Memory，RAM)、闪存、可擦除可编程只读存储器(Erasable Programmable ROM，EPROM)、电可擦可编程只读存储器(Electrically EPROM，EEPROM)、寄存器、硬盘、移动硬盘、只读光盘(CD-ROM)或者本领域熟知的任何其它形式的存储介质中。一种示例性的存储介质耦合至处理器，从而使处理器能够从该存储介质读取信息，且可向该存储介质写入信息。当然，存储介质也可以是处理器的组成部分。处理器和存储介质可以位于ASIC中。另外，该ASIC可以位于核心网接口设备中。当然，处理器和存储介质也可以作为分立组件存在于核心网接口设备中。
本领域技术人员应该可以意识到，在上述一个或多个示例中，本发明所描述的功能可以用硬件、软件、固件或它们的任意组合来实现。当使用软件实现时，可以将这些功能存储在计算机可读介质中或者作为计算机可读介质上的一个或多个指令或代码进行传输。计算机可读介质包括计算机存储介质和通信介质，其中通信介质包括便于从一个地方向另一个地方传送计算机程序的任何介质。存储介质可以是通用或专用计算机能够存取的任何可用介质。
以上所述的具体实施方式，对本发明的目的、技术方案和有益效果进行了进一步详细说明，所应理解的是，以上所述仅为本发明的具体实施方式而已，并不用于限定本发明的保护范围，凡在本发明的技术方案的基础之上，所做的任何修改、等同替换、改进等，均应包括在本发明的保护范围之内。

Claims (19)

  1. 一种指令调度方法，其特征在于，所述方法包括：
    在第一读请求队列中的第一读指令包括的平面plane数量小于预设plane数量的情况下，将所述第一读指令与第二读请求队列中的第二读指令组合为多平面读MP指令；所述第一读请求队列和所述第二读请求队列为两个不同的读请求队列；
    向闪存下发所述MP指令。
  2. 根据权利要求1所述的方法，其特征在于，所述闪存支持的最大并发plane数量为N，所述预设plane数量小于或等于所述N。
  3. 根据权利要求1或2所述的方法，其特征在于，所述第一读请求队列为输入输出IO读请求队列，所述第二读请求队列为垃圾回收GC读请求队列。
  4. 根据权利要求1-3中任一项所述的方法，其特征在于，所述方法还包括：
    在第一时长内暂停向所述闪存下发所述第二读请求队列中的指令。
  5. 根据权利要求4所述的方法，其特征在于，所述第一时长与GC信用值和所述闪存每秒的读取次数Read IOPS有关，所述GC信用值用于指示在一个流控周期内所述第二读请求队列中指令下发的数量。
  6. 根据权利要求5所述的方法，其特征在于，在所述GC信用值小于或等于所述闪存每秒的读取次数时，所述第一时长为所述流控周期与所述GC信用值的商；在所述GC信用值大于所述闪存每秒的读取次数时，所述第一时长为所述流控周期与所述闪存每秒的读取次数的商。
  7. 根据权利要求1-6中任一项所述的方法，其特征在于，所述将所述第一读指令与第二读请求队列中的第二读指令组合为多平面读MP指令包括：
    根据所述闪存的检测信息，将所述第一读指令与第二读请求队列中的第二读指令组合为所述MP指令；所述检测信息包括负载压力、读写比例或空块数量中的至少一种。
  8. 根据权利要求7所述的方法，其特征在于，所述根据所述闪存的检测信息，将所述第一读指令与第二读请求队列中的第二读指令组合为所述MP读指令，包括：
    在所述负载压力小于或等于轻负载门限，且所述读写比例大于或等于读比例门限，且空块数量大于或等于空块门限时，将所述第一读指令与所述第二读请求队列中的第二读指令组合为MP指令。
  9. 一种指令调度装置，其特征在于，所述装置包括：处理器和接口电路；
    所述处理器，用于在第一读请求队列中的第一读指令包括的平面plane数量小于预设plane数量的情况下，将所述第一读指令与第二读请求队列中的第二读指令组合为多平面读MP指令；所述第一读请求队列和所述第二读请求队列为两个不同的读请求队列；
    所述处理器，还用于通过所述接口电路向闪存下发所述MP指令。
  10. 根据权利要求9所述的指令调度装置，其特征在于，所述闪存支持的最大并发plane数量为N，所述预设plane数量小于或等于所述N。
  11. 根据权利要求9或10所述的指令调度装置，其特征在于，所述第一读请求队列为输入输出IO读请求队列，所述第二读请求队列为垃圾回收GC读请求队列。
  12. 根据权利要求9-11中任一项所述的指令调度装置，其特征在于，所述处理器，还用于在第一时长内暂停向所述闪存下发所述第二读请求队列中的指令。
  13. 根据权利要求12所述的指令调度装置，其特征在于，所述第一时长与GC信用值和所述闪存每秒的读取次数Read IOPS有关，所述GC信用值用于指示在一个流控周期内所述第二读请求队列中指令下发的数量。
  14. 根据权利要求13所述的指令调度装置，其特征在于，在所述GC信用值小于或等于所述闪存每秒的读取次数时，所述第一时长为所述流控周期与所述GC信用值的商；在所述GC信用值大于所述闪存每秒的读取次数时，所述第一时长为所述流控周期与所述闪存每秒的读取次数的商。
  15. 根据权利要求9-14中任一项所述的指令调度装置，其特征在于，所述处理器，具体用于根据所述闪存的检测信息，将所述第一读指令与第二读请求队列中的第二读指令组合为所述MP指令；所述检测信息包括负载压力、读写比例或空块数量中的至少一种。
  16. 根据权利要求15所述的指令调度装置，其特征在于，所述处理器，具体用于在所述负载压力小于或等于轻负载门限，且所述读写比例大于或等于读比例门限，且空块数量大于或等于空块门限时，将所述第一读指令与所述第二读请求队列中的第二读指令组合为MP指令。
  17. 一种存储设备，其特征在于，所述存储设备包括如权利要求9-16中任一项所述的指令调度装置，以及所述闪存。
  18. 根据权利要求17所述的存储设备，其特征在于，所述存储设备包括固态硬盘。
  19. 一种计算机可读存储介质，其特征在于，所述计算机可读存储介质存储有计算机程序，当所述计算机程序在存储设备设备上运行时，使得所述存储设备执行如权利要求1-8中任意一项所述的指令调度方法。
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