WO2023068766A1

WO2023068766A1 - Consumption power improvement-type amplifier circuit for detecting output signal and actively adjusting smps bias voltage

Info

Publication number: WO2023068766A1
Application number: PCT/KR2022/015874
Authority: WO
Inventors: 이상혁
Original assignee: 주식회사 데스코
Priority date: 2021-10-19
Filing date: 2022-10-18
Publication date: 2023-04-27
Also published as: KR102371669B1

Abstract

The present invention is to provide a consumption power improvement-type amplifier circuit for detecting an output signal and actively adjusting an SMPS bias voltage in order to optimally reduce consumption power, the circuit comprising: an amplifier unit (100) which outputs a signal amplified by a power amplification unit (110) to a speaker (SP), and further includes a peak voltage detection unit (120) for detecting a peak voltage output from an output terminal; and an SMPS unit (200) which charges and maintains a peak voltage value detected by the peak voltage detection unit (120) at a maximum peak value, and outputs an output value after adjusting the output value in such a manner of increasing a bias value when an amplifier output determined through comparison with a reference voltage is higher than the reference voltage, and decreasing the bias value when the amplifier output is lower than the reference voltage.

Description

Power consumption improvement amplifier circuit that detects the output signal and actively adjusts the SMPS bias voltage

The present invention relates to a power consumption improved amplifier circuit, and more particularly, to a power consumption improved amplifier circuit that actively adjusts an SMPS bias voltage by sensing an output signal.

In general, an audio amplifier usually consists of a pre-amplifier and a power amplifier, and the signal adjusted by the pre-amplifier is sent to the power amplifier, and the power amplifier transmits this signal to the speaker as a load. It is amplified to the power that can be driven sufficiently.

Such a power amplifier, also called a main amplifier, must respond instantaneously to a rapidly changing music waveform and send power required for the waveform to the speaker.

On the other hand, in some amplifiers, in order to reduce the reactive power generated by the power amplifier, as shown in FIG. 1, a voltage amplifier 1 for performing voltage amplification on the input fine acoustic signal; an output terminal power amplifier (2) for amplifying the power of the sound signal output through the voltage amplifier and outputting it to a speaker (SP); a power voltage supply unit (3) for supplying a basic voltage and a high voltage required in response to the level of the input signal in the power amplifier (2), including the power supply voltage required to drive each part of the amplifier; The voltage of the sound signal output from the output stage power amplifier 2 is compared with the reference voltage using a comparator, etc., and outputs an on/off signal corresponding to the result to the high/low supply voltage control unit 5. a voltage detector 4; High/low supply that turns on/off in response to the output signal of the output voltage detection unit 4 and outputs either the basic voltage or the high voltage output from the power supply voltage supply unit 3 to the power amplifier 2 In some cases, a reactive power reduction circuit composed of the voltage controller 5 is employed.

In the reactive power reduction circuit of the power amplifier having such a configuration, the voltage of the sound signal output from the power amplifier 2 to the speaker SP is compared with the reference voltage in the output voltage detection unit 4, if it is less than the reference voltage. Of the voltage output from the power supply voltage supply unit 3 through a method of generating a “low” signal to the high/low supply voltage control unit 5 to “off” the switching transistor in the high/low supply voltage control unit 5 Low" voltage (for example, a DC voltage of 60V when the current output is less than 600W in an amplifier with a maximum output of 1200W) is supplied to the power amplifier 2, and if it is higher than the reference voltage, the high / low supply voltage control unit 5 The "high" voltage among the voltages output from the power supply voltage supply unit 3 (for example, the maximum output of 1200W When the current output of the amplifier is a low power of 600W or more, a DC voltage of 120V) is supplied to the power amplifier 2.

However, in the reactive power reduction circuit of the power amplifier having such a configuration, when the voltage of the acoustic signal actually output from the power amplifier exceeds 50% of the maximum output, but is relatively lower than 100% (for example, 900W) Regardless of the height of the voltage level (actually, when it is desirable to supply a voltage of about 90V) even in the case of a medium output), the highest voltage (for example, 120V) among the voltages output from the power supply voltage supply unit is supplied to the power amplifier. will be supplied to

In this way, even though the voltage of the sound signal output from the power amplifier is higher than the reference voltage, but the level of some sound signal is relatively lower than the maximum output level (for example, medium power), the highest voltage is supplied unconditionally, so that some reactive power is generated. As a result, power is consumed unnecessarily, and the power amplification device, which is a semiconductor device in the power amplifier, overheats in the process of consuming reactive power, resulting in thermal burnout and shortening its lifespan during long-term use.

In addition, when heat is generated as described above, the power amplification elements operate unstable, greatly reducing the efficiency of the output itself, and the size of the heat sink itself installed to smoothly cool the heat generated as described above is large. In addition, as a result, the size of the power amplifier itself increases, which increases the production cost of the product.

In order to solve the above problem, Korean Patent No. 10-1086064 (Low Power Consumption and High Efficiency Output Audio Amplifier) has been proposed as a first prior art. Here is a block diagram showing the amplifier.

As shown in FIG. 2, the low power consumption and high efficiency output type audio amplifier according to the first prior art is a known audio amplifier having a voltage amplifier 1, a power amplifier 2, and a power supply voltage supply unit 3. , a zener diode (ZD2) for detecting the output voltage of the power amplifier, a transistor (TR1) for variable bypass voltage, a transistor (TR2) for load control, a transistor (TR3) for variable gate voltage control, and a FET (FET ₁ -FETn) for controlling power supply When the voltage in the sound signal output from the power amplifier 2 is higher than the zener voltage of the zener diode (ZD1) by additionally installing a high voltage output from the power voltage supply unit 3 in response to the actual voltage size of the sound signal in real time It is characterized in that it can be supplied by dropping the voltage.

That is, the low-power consumption and high-efficiency output type audio amplifier of the first prior art includes a voltage amplifier (1) for amplifying a voltage of an input minute sound signal; an output terminal power amplifier 2 for amplifying the power of the sound signal output through the voltage amplifier 1 and outputting the power to a speaker SP; A protection resistor ( R1) is connected between the output terminal of the power amplifier 2 and the high voltage output terminal (HB+) of the power supply voltage supply unit 3, and the voltage within the sound signal output from the power amplifier 2 is the zener voltage within itself. a zener diode (ZD1) for detecting an output voltage of the power amplifier, which transmits the abnormal voltage as a base bias voltage of the transistor (TR1) for variable bypass voltage in the case of an abnormality; In response to the base bias voltage supplied through the zener diode (ZD1), the amount of turn “on” is changed in real time, and bypasses from the high voltage output terminal (HB+) of the power voltage supply unit (3) to the low voltage output terminal (LB+) side. a bypass voltage variable transistor TR1 which varies the base bias voltage of the load control transistor TR2 through a method of varying the amount of voltage drop to be applied; The turn “on” amount is changed in real time in response to the base bias voltage that is changed corresponding to the collector voltage of the variable bypass voltage transistor TR1, and between the collector and the low voltage output terminal LB+ of the power supply voltage supply unit 3. a load adjusting transistor TR2 which adjusts the load amount of the gate voltage variable control transistor TR3 by changing the load resistance R2 and its own load amount in real time; Between the high voltage output terminal (HB+) and the low voltage output terminal (LB+) of the power voltage supply unit (3), it is installed in a form connected in series with the load adjustment transistor (TR2) to respond to the load that changes in real time. FET for power supply control a gate voltage variable control transistor TR3 for varying the bias voltage applied to the gates of (FET ₁ -FETn); It is connected in parallel between the high voltage output terminal (HB+) and the low voltage output terminal (LB+) of the power voltage supply unit 3 and responds to the gate bias voltage supplied through the gate voltage variable control transistor TR3. The amount of turn "on" is controlled, and the voltage output from the high voltage output terminal (HB+) of the power supply voltage supply unit (3) and supplied to the power amplifier (2) is voltage dropped in response to the voltage height of the sound signal that is changed in real time. It is characterized in that an additional installation of a FET (FET ₁ -FETn) for power supply control to be supplied from.

In addition, the maximum bias voltage applied to the gate of the power supply control FET (FET ₁ -FETn) is limited between the high voltage output terminal (HB+) of the power voltage supply unit (3) and the base of the transistor (TR3) for variable gate voltage control. It is characterized by further installing a zener diode (ZD1) for gate protection to

In addition, reverse voltage blocking diodes D1 and D2 are further interposed between the base of the bypass voltage variable transistor TR1 and the load control transistor TR2 and the power amplifier output voltage detecting zener diode ZD2, respectively. characterized by its installation.

In addition, between the low voltage output terminal LB+ of the power voltage supply unit 3 and the emitter of the variable bypass voltage transistor TR1, the output from the high voltage output terminal HB+ of the power voltage supply unit 3 is When voltage is supplied to the power amplifier 2, it is characterized by further installing a high voltage driving state displaying light emitting diode (LED) that displays it with light.

Here, symbols D3 and D4, which are not explained, are diodes for blocking reverse voltage, and R3-R5 are resistors for load and protection.

The effect of the low power consumption and high efficiency output type audio amplifier of the first prior art configured as described above will be described as follows.

First, the low power consumption and high efficiency output type audio amplifier to which the first prior art is applied is a known audio amplifier having a voltage amplifier 1, a power amplifier 2, and a power supply voltage supply unit 3, and outputs the power amplifier. Voltage detection zener diode (ZD1), bypass voltage variable transistor (TR1), load control transistor (TR2), gate voltage variable control transistor (TR3) and power supply control FET (FET ₁ -FETn) are additionally installed to provide power When the voltage in the sound signal output from the amplifier 2 is higher than the zener voltage of the zener diode (ZD1), the voltage output from the high voltage output terminal (HB+) of the power voltage supply unit (3) corresponds to the actual voltage size of the sound signal It is a major technical component that can be supplied by voltage drop in real time.

At this time, the zener diode (ZD1) for detecting the output voltage of the power amplifier is connected in series together with the protection resistor (R1) between the output terminal of the power amplifier (2) and the high voltage output terminal (HB+) of the power supply voltage supply unit (3). state, detects whether the voltage in the sound signal output from the power amplifier 2 is higher than the zener voltage (for example, 60V) when the amplifier is driven, and for variable bypass voltage when the output is lower than the zener voltage The base bias voltage of the transistor TR1 is blocked, and when the zener voltage is higher than the zener voltage (for example, 60V or higher), a voltage higher than the zener voltage is transferred to the base of the variable bypass voltage transistor TR1 as a bias voltage.

Since the output voltage of the sound signal of the power amplifier 2 detected through the zener diode (ZD1) is less than the zener voltage (for example, a low power of less than 600 W in an amplifier having a maximum sound signal output of 1200 W), the zener diode (ZD1) When the bias voltage supplied to the base of the variable bypass voltage transistor TR1 is cut off, the transistor TR2 for load control including the transistor TR1 for variable bypass voltage and the gate voltage The driving of the variable control transistor (TR3) is also blocked, and the power supply control FET (FET ₁ -FETn) is also kept in an "off" state, so the voltage output through the high voltage output terminal (HB+) of the power voltage supply unit (3) (eg 120V) is blocked by the power supply control FET (FET ₁ -FETn), and the voltage (eg 60V) output through the low voltage output terminal (LB+) of the power voltage supply unit 3 is the conventional amplifier As in, it has a form supplied to the power amplifier 2.

In addition, the bypass voltage variable transistor TR1 is an NPN type transistor, and since the voltage in the acoustic signal output from the power amplifier 2 is higher than the zener voltage of the zener diode ZD1, the zener diode ZD1 The amount of turn “on” is changed in real time in response to the height of the base bias voltage supplied through, and the amount of voltage drop bypassed from the high voltage output terminal (HB+) to the low voltage output terminal (LB+) side of the power voltage supply unit 3 It serves to vary in response to the sound output signal, thereby varying the base bias voltage of the load adjusting transistor TR2 to be described later in accordance with the magnitude of the sound output signal.

In addition, the load adjusting transistor TR2 is a PNP type transistor and corresponds to the collector voltage of the bypass voltage variable transistor TR1 which is variable in response to a change in the voltage in the sound signal output from the power amplifier 2. In response to the changing base bias voltage, the amount of turn “on” is changed in real time, and the amount of turn “on” and the load resistance (R2) installed between its collector and the low voltage output terminal (LB+) of the power voltage supply unit 3 In response to the output signal, it changes its load amount in real time, and performs a function of automatically adjusting the emitter load amount of the gate voltage variable control transistor TR3 to be described later in response to the size of the sound output signal.

Meanwhile, the gate voltage variable control transistor TR3 is an NPN type transistor connected in series with the load control transistor TR2 between the high voltage output terminal HB+ and the low voltage output terminal LB+ of the power voltage supply unit 3. Bias voltage applied to the gate of the power supply control FET (FET ₁ -FETn) in response to the load amount changing in real time through the load amount adjusting transistor TR2 in response to the change in the output voltage of the power amplifier 2 It performs a function of changing the size of (half-wave pulse voltage in analog form corresponding to the size of the sound signal being output with medium or large output).

In addition, the above power supply control FETs (FET ₁ -FETn) have their source and drain connected in parallel between the high voltage output terminal (HB +) and the low voltage output terminal (LB +) of the power voltage supply unit 3, respectively, and the gate is the gate It has a form connected to the emitter of the voltage variable control transistor TR3.

Such a power supply control FET (FET ₁ -FETn) corresponds to the change in the output voltage of the sound signal of the power amplifier 2 through the transistor for controlling the gate voltage variable (TR3). The turn-on amount is controlled in response to the waveform gate bias voltage, and the voltage output from the high voltage output terminal (HB+) of the power supply voltage supply unit 3 and supplied to the power amplifier 2 corresponds to the voltage height of the sound output signal. In response, the voltage drops in real time to supply only the predetermined voltage (for example, if the maximum output of the amplifier is 1200W, but the voltage of the sound signal output from the current power amplifier (2) is 900W, which is a medium output, only 90V of the maximum voltage of 120V passes) will fulfill the role of

As described above, according to the first prior art, when the voltage of the sound signal output from the power amplifier 2 is higher than a certain voltage, a part of the maximum output voltage output from the power supply voltage supply unit 3 is voltage dropped in response to the height. It can be supplied to the power amplifier (2) in the state of power amplifier (2), so it is possible to reduce the reactive power that is unnecessary in the power amplifier (2) as much as possible, thereby reducing unnecessary power consumption (for example, 900W sound in an amplifier with a maximum sound signal output of 1200W) 300W when a signal is output) can be prevented, and since the power amplification element in the power amplifier 2 can be prevented from overheating and burnout due to reactive power, the lifespan itself can be greatly extended.

However, in the first prior art, in a state in which the voltage output of the power supply voltage supply unit 3 such as SMPS is fixed, the voltage in the sound signal output to the speaker SP is compared through a zener diode, and at a low output below the reference voltage A method of supplying a low basic voltage and varying the gate bias voltage through a transistor for variable bypass voltage, a transistor for load control, and a transistor for variable gate voltage control in the case of medium or high output above the reference voltage, and a power supply voltage corresponding to SMPS. The outputs (HB+, HB-) of the supply unit 3 are always fixed, and the gate voltage supplied to the amplifier (power amplifier) is varied and supplied through a separate voltage variable circuit through the voltage variable circuit of the amplifier (power amplifier). In this way, since more than necessary voltage is continuously supplied from the power supply voltage supply unit 3 to the voltage variable circuit, energy waste still occurs and, as a result, there is a limit to improving power consumption.

On the other hand, recognizing the problems of the first prior art, Korean Patent No. 1431924 (Bias Adjustment Apparatus and Method for Amplifiers) has been disclosed as a second prior art.

Figures 3 and 4 show exemplary designs of bias adjustment using a switched mode power supply to isolate the supply voltage according to the second prior art.

That is, in the second prior art, as shown in FIGS. 3 and 4 , the power amplifier 710 includes an NMOS transistor 712, an inductor 714, and a resistor 716 coupled to each other. Inductor 714 is coupled to the Vsmps supply voltage provided by SMPS 720.

Within SMPS 720, a P-channel metal oxide semiconductor (PMOS) transistor 722 has a source coupled to battery supply Vbat, a drain coupled to node X, and a gate coupled to SMPS control unit 726. have NMOS transistor 724 has its source coupled to circuit ground, its drain coupled to node X, and its gate coupled to SMPS control unit 726. SMPS control unit 726 receives the output from processor 760 as well as the voltage at node Y (not shown in FIG. 3 for brevity) and receives a first control voltage for PMOS transistor 722 and NMOS A second control voltage for transistor 724 is generated. An inductor 732 is coupled between node X and node Y. Capacitor 734 is coupled between node Y and circuit ground. An inductor 714 of power amplifier 710 is coupled to node Y providing a voltage of Vsmps.

Bias adjustment circuit 740 generates a Vbias voltage across NMOS transistor 712 of power amplifier 710 such that a target Ibias current is provided to power amplifier 710 . Within circuit 740, NMOS transistor 752 has its drain coupled to Vdd, its gate coupled to control circuit 762, and its source coupled to one end of resistor 754.

The other end of resistor 754 is coupled to node X. Op-amp 756 has two inputs coupled to the two ends of resistor 754 and an output coupled to ADC 758. Processor 760 receives the digital output from ADC 758, directs control circuit 762 to produce a desired Ibias current, and bias circuit 770 to produce a desired Vbias voltage across NMOS transistor 712. ) to control.

In normal mode of operation, NMOS transistor 752 is turned off and SMPS 720 is turned on to generate a Vsmps voltage for power amplifier 710 based on the Vbat voltage. The SMPS control unit 726 may operate as a pulse width modulator (PWM) generator and may alternately turn the PMOS transistor 722 on and off. During the on state, PMOS transistor 722 is turned on and NMOS transistor 724 is turned off. The Vbat voltage is coupled through PMOS transistor 722 to inductor 732, which stores energy from the Vbat voltage.

The Vbat voltage provides current to capacitor 734 and current amplifier 710 during the on state. During the off state, PMOS transistor 722 is turned off and NMOS transistor 724 is turned on. The Vbat voltage is disconnected from inductor 732 by PMOS transistor 722. Inductor 732 is coupled to circuit ground by NMOS transistor 724 and provides its stored energy to capacitor 734 and power amplifier 710 .

Capacitor 734 holds the Vsmps voltage approximately constant and also provides its charge to power amplifier 710 during the off state. Inductor 732 and capacitor 734 also form a low pass filter that suppresses ripple in the Vsmps voltage due to switching of MOS transistors 722 and 724.

In bias adjustment mode, SMPS 720 is turned off by turning off both MOS transistors 722 and 724. NMOS transistor 752 is turned on and passes the Ibias current through resistor 754 to power amplifier 710. Op-amp 756 senses/measures the voltage Vres across resistor 754. ADC 758 quantizes the measured Vres voltage and provides the digitized Vres voltage to processor 760. Processor 760 calculates the Ibias current across resistor 754 based on the digitized Vres voltage from ADC 758, the known resistance Rres of resistor 754, or Ibias = Vres/Rres. The processor 760 compares the calculated/measured Ibias current to the target Ibias current and controls the bias circuit 770 to generate a Vbias voltage such that the measured Ibias current matches the target Ibias current. . For example, if the measured Ibias current is less than the target Ibias current, processor 760 may control bias circuit 770 to increase the Vbias voltage, which then causes the Ibias current to increase. . If the measured Ibias current is greater than the target Ibias current, the reverse applies.

Processor 760 may direct control circuit 762 to turn off NMOS transistor 752 in a normal operating mode or to turn on NMOS transistor 752 in a bias adjustment mode. Processor 760 may also direct control circuit 762 to generate a control voltage for NMOS transistor 752 such that the Vsmps voltage in bias adjustment mode is similar to the Vsmps voltage in normal operating mode.

SMPS 720 is typically used to regulate the battery voltage or external voltage to a lower supply voltage for power amplifier 710 [0058], which then reduces power consumption and improves power-added efficiency (PAE). can also be improved. The exemplary design shown in FIG. 3 utilizes SMPS 720 to isolate the Vbat voltage from node X, which is accomplished by turning off both MOS transistors 722 and 724. With node X disconnected from the Vbat voltage, an external current may be applied to power amplifier 710 through NMOS transistor 752 and resistor 754. This external current may be measured and generate an appropriate Vbias voltage across NMOS transistor 712 to obtain a target Ibias current for power amplifier 710. During the normal mode of operation, NMOS transistor 752 is turned off and does not affect the operation of power amplifier 710.

4 shows a schematic diagram of another exemplary design of bias adjustment using SMPS 720. Power amplifier 710 and SMPS 720 are coupled as described above with respect to FIG. 3 . Bias adjustment circuit 742 generates a Vbias voltage across NMOS transistor 712 of power amplifier 710 such that a target Ibias current is provided to the power amplifier. Within circuit 742, NMOS transistor 752, control circuit 762, and processor 760 are coupled as described above with respect to FIG. Resistor 754 in FIG. 3 is replaced by a current source 764 capable of providing a known current of Ibias to power amplifier 710. NMOS transistor 752 and current source 764 may also be replaced with a PMOS current source transistor controlled by control circuit 762 (or an ideal tunable current source). Switch 772 has one terminal coupled to the gate of NMOS transistor 712 and the other terminal coupled to the drain of NMOS transistor 712 . Switch 774 has one terminal coupled to the gate of NMOS transistor 712 and the other terminal coupled to the gate of NMOS transistor 782 .

Switches

772 and 774 receive the Vctrl control signal. Switch 776 is coupled between the output of bias circuit 770 and resistor 716 and receives the control signal. NMOS transistor 782 has its source coupled to circuit ground and its drain coupled to one input of op-amp 786. PMOS transistor 784 has its drain and gate coupled to the drain of NMOS transistor 782 and its source coupled to Vdd. PMOS transistor 784 may also be replaced with a resistor having a known value. Op-amp 786 has another input coupled to Vdd and an output coupled to ADC 758. Processor 760 receives the digital output from ADC 758, directs control circuit 762 to provide the desired Ibias current, and bias circuit 770 to produce the desired Vbias voltage across NMOS transistor 712. to control

In the normal mode of operation, NMOS transistor 752 is turned off, switches 772 and 774 are open, switch 776 is closed, and SMPS 720 is turned on to power amplifier 710. Generate Vsmps voltage.

In bias adjustment mode, SMPS 720 is turned off by turning off both MOS transistors 722 and 724. NMOS transistor 752 is turned on and passes the known current of Ibias to power amplifier 710.

Switches

772 and 774 are closed, and

NMOS transistors

712 and 782 act as current mirrors. Since the same DC voltage is applied to the gates of

NMOS transistors

712 and 782, the Icm current through NMOS transistor 782 is related to the Ibias current through NMOS transistor 712, or Icm = Ibias/K, where K is the ratio of the size of NMOS transistor 712 to the size of NMOS transistor 782. The target Ibias current may be converted to a corresponding target Icm current. The op-amp 786 senses/measures the Vgs voltage of the PMOS transistor 784 in a state where the

switches

772 and 774 are closed, the switch 776 is open, and the Vbias voltage is not connected. ADC 758 quantizes the measured Vgs voltage and provides the digitized Vgs voltage to processor 760. Processor 760 calculates Icm current across NMOS transistor 782 based on the known drain-source resistance Rds of PMOS transistor 784 and the digitized Vgs voltage from ADC 758, or Icm = Vgs/ is Rds. Rds may be determined by characterizing the PMOS transistor 784. Processor 760 compares the calculated/measured Icm current to the target Icm current and determines the Vbias voltage such that the measured Icm current matches the target Icm current. For example, if the measured Icm current is less than the target Icm current, processor 760 may increase the Vbias voltage, which then causes both the Ibias current and the Icm current to be increased. If the measured Icm current is greater than the target Icm current, the reverse applies. Bias circuit 770 generates the Vbias voltage as indicated by processor 760 and applies the Vbias voltage through switch 776 with

switches

772 and 774 open. The application of the Vbias voltage and the measurement of the Icm current may be performed sequentially or repeatedly. For example, the Icm current may be measured with the Vbias voltage disconnected by opening switch 776, and then the Vbias voltage may be applied with

switches

772 and 774 closed. Switch 776 disconnects bias circuit 770 when

switches

772 and 774 are closed and the Icm current is being measured.

Switches

772 and 774 are open while the Vbias voltage is connected.

After all, according to the second prior art, the bias current of the power amplifier 710 can be measured, and the bias change due to aging, deformation in the IC process, power supply voltage, temperature, and/or other phenomena is compensated. The bias current can be adjusted to

The second prior art, although it relates to an amplifier circuit used in a transmitter stage, compensates in response to a bias change of the power amplifier 710, and among them, the technology of changing the voltage of the SMPS itself is partially It is implied.

However, the specific configuration of the circuit is insufficient to react to the peak waveform of the audio power amplifier that changes dramatically and appropriately send the power required for the peak waveform to the speaker, and in addition to the SMPS controller 726, the ADC 758 ) or a complicated IC chip such as the processor 760, there is a problem that the circuit becomes too heavy. That is, in the

bias correction circuits

740 and 742 of the second prior art, since more power than the reduced power of the bias voltage of the power amplifier will be used in the processor or other control circuits, eventually to achieve the purpose of reducing power consumption. It's not a circuit, I'd say it's more for the purpose of bias matching.

Moreover, both of the first and second prior arts do not mention the configuration of bias voltage adjustment to respond to the instantaneous peak voltage of the power amplifier.

The present invention, as a countermeasure against the problems of the first to second prior art, reacts instantaneously to the peak waveform of the audio power amplifier and appropriately sends the bias voltage required for the peak waveform from the SMPS to the speaker. An object of the present invention is to provide a power consumption improving amplifier circuit that detects an output signal to optimally reduce power consumption and actively adjusts an SMPS bias voltage.

Furthermore, by setting different reference voltages for PA and SR, measuring the peak voltage in the sound signal output to the speaker, supplying a low basic voltage at an output below the set reference voltage, and detecting an output above the set reference voltage, It is to provide a power consumption improved amplifier circuit capable of realizing a lower power consumption and higher efficiency output type amplifier than the existing method by allowing the +VCC and -VCC voltage outputs to be varied and supplied to the amplifier in the SMPS itself.

According to one aspect of the present invention for achieving the above object, a power consumption improving amplifier circuit that detects an output signal and actively adjusts an SMPS bias voltage, transmits the amplified signal from the power amplifier 110 to a speaker (SP) The amplifier unit 100 further includes a peak voltage detection unit 120 outputting to but detecting a peak voltage output from an output terminal; And the peak voltage value detected by the peak voltage detection unit 120 is charged and maintained at the maximum peak value, compared with the reference voltage, the bias value is increased when the amplifier output is high, and the output value is adjusted in such a way that it is lowered when the amplifier output is low. SMPS unit 200 for outputting; The SMPS unit 200 includes an input rectifier 260 for full-wave rectification of normal AC commercial power, an inverting unit 270 for inverting the power rectified by the input rectifier 260, A transformer 280 composed of a transformer that transforms the AC inverted by the inverting unit 270 into a voltage suitable for speaker power, and an output stage rectifier that rectifies and outputs the AC transformed by the transformer 280 again ( 290), a peak voltage charging unit 210 that senses, charges, and maintains the output of the amplifier unit, and a comparison unit 240 that compares the output voltage as it is or the amplified output voltage of the peak voltage charging unit 210 with a reference voltage. ) and a control signal generating unit 250 for controlling the inverting of the inverting unit 270 according to the output of the comparator 240.

Preferably, in the amplifier unit 100, the peak voltage detection unit 120 is connected to the output terminal (OUT_DETECT1) of the power amplification unit 110, and the peak voltage detection unit 120 has a divided voltage for voltage detection. The connection terminal of the resistors R17 and R18 is connected to the output terminal LEVEL_DET12 of the amplifier unit through the diode D8 for half-wave rectification, so that the peak voltage of the amplifier output terminal sensed by the voltage-sensing voltage divider resistors R17 and R18 is a half-wave rectifier. It is characterized in that it is rectified and input to the SMPS unit (200).

More preferably, in the peak voltage charging unit 210, the half-wave rectified peak voltage having an input terminal connected to the output terminal LEVEL_DET12 of the amplifier unit passes through a second resistor R2 for connection to the first amplifier U1-B. ), and the output terminal of the first amplifier (U1-B) is feedback-connected to the inverting input terminal through the second diode (D2) and the fourth resistor (R4), and at the same time, the first capacitor (C1) After being connected to, the first amplifier (U1-B) feeds back the half-wave rectified DC voltage of the peak voltage detected at the output terminal of the amplifier unit (100), and the maximum peak value is charged in the first capacitor (C1). characterized in that it is maintained.

Also preferably, an amplification unit 220 for amplifying the output voltage of the peak voltage charging unit 210 is further included, and the comparator 240 compares the voltage amplified by the amplification unit 220 with a reference voltage. It is characterized by doing.

Also preferably, the limiting unit 230 is connected to the input side of the comparator 240, and the output of the amplifying unit 200 is limited by the limiting element of the limiting unit, so that an unnecessary constant voltage or a constant for amplifier protection is limited. It is characterized in that it is limited so that the output is not higher than the voltage.

Preferably, the SMPS unit 200 further includes a bias setting switching unit 300 for generating a plurality of reference voltages by generating a reference voltage of the comparator 240.

According to another aspect of the present invention for achieving the above object, a power consumption improvement amplifier circuit for actively adjusting the SMPS bias voltage by sensing the output signal; and a speaker (SP) for audio output of a signal amplified by the SMPS bias voltage corresponding to the output signal by the amplifier circuit. A speaker system including a is provided.

According to the power consumption improvement type amplifier circuit of the present invention, it is possible to optimally reduce power consumption by reacting instantaneously to a severely changing peak waveform of an audio power amplifier and appropriately sending a bias voltage required for such a peak waveform from the SMPS to a speaker. It is possible to optimally improve power consumption by actively adjusting the SMPS bias voltage by sensing the output signal for

Furthermore, by setting different reference voltages for PA and SR, measuring the peak voltage in the sound signal output to the speaker, supplying a low basic voltage at an output below the set reference voltage, and detecting an output above the set reference voltage, By allowing the +VCC and -VCC voltage outputs to be varied and supplied to the amplifier in the SMPS itself, it is possible to implement a low-power consumption and high-efficiency output type amplifier compared to the conventional method.

In addition to the above objects and effects, other objects and advantages of the present invention will become apparent through detailed description of the embodiments with reference to the accompanying drawings.

1 is a block diagram of an amplifier circuit for reducing reactive power generated in a power amplifier in a conventional amplifier.

2 is a block diagram of an amplifier circuit for reducing reactive power generated from a power amplifier in an amplifier according to a first prior art;

5 is a circuit diagram of an amplifier unit in a power consumption improving amplifier circuit that actively adjusts an SMPS bias voltage by sensing an output signal according to the present invention.

6 is a circuit diagram of an SMPS unit in a power consumption improving amplifier circuit that actively adjusts an SMPS bias voltage by sensing an output signal according to a first embodiment of the present invention.

7 is a circuit diagram of an SMPS unit in a power consumption improving amplifier circuit that actively adjusts an SMPS bias voltage by sensing an output signal according to a second embodiment of the present invention.

Hereinafter, preferred embodiments according to the present invention will be described in detail with reference to the accompanying drawings.

5 is a circuit diagram of an amplifier unit in a power consumption improving amplifier circuit that actively adjusts an SMPS bias voltage by sensing an output signal according to the present invention, and FIG. 6 is a circuit diagram of an output signal according to a first embodiment of the present invention 7 is a circuit diagram of the SMPS unit in the power consumption improvement type amplifier circuit that actively adjusts the SMPS bias voltage, and FIG. This is the circuit diagram of the SMPS part in the amplifier circuit.

(First embodiment)

First, a power consumption improving amplifier circuit that detects an output signal and actively adjusts an SMPS bias voltage according to the first embodiment of the present invention will be described with reference to FIGS. 5 and 6 .

As shown in FIGS. 5 and 6, the power consumption improving amplifier circuit that detects the output signal and actively adjusts the SMPS bias voltage according to the first embodiment of the present invention transmits the signal amplified by the power amplifier 110 to the speaker. an amplifier unit 100 that outputs to (SP) and further includes a peak voltage detection unit 120 that detects a peak voltage output from an output terminal; And the peak voltage value detected by the peak voltage detection unit 120 is charged to the maximum peak value and amplified to a required voltage value, compared with the reference voltage, the bias value is increased when the amplifier output is high, and the bias value is lowered when the amplifier output is low. SMPS unit 200 that adjusts and outputs VCC and VEE values in a manner of; is composed of

In this way, when the power supply bias voltage is actively adjusted, only the minimum voltage necessary for operation is supplied according to the output of the amplifier, maximizing the efficiency of the power used by the amplifier, which reduces the electrical energy required when using the amplifier. There are additional advantages to maximizing savings.

Now, the amplifier unit 100 of the power consumption improved amplifier circuit according to the first embodiment of the present invention will be described in more detail with reference to FIG. 5, a conventional amplifier for amplifying and outputting a voice signal to a speaker SP, and The peak voltage detection unit 120 is connected to the output terminal (OUT_DETECT1) of the power amplification unit 110 composed of an RC circuit. It is connected to the output terminal (LEVEL_DET12) of the amplifier through the half-wave rectification diode (D8). Thus, the peak voltage of the amplifier output stage sensed by the voltage-sensing voltage divider resistors R17 and R18 is input to the SMPS unit 200 of FIG. 6 . Non-explanatory code 'RL' is a relay.

Subsequently, referring to FIG. 6, the SMPS unit 200 of the power consumption improvement type amplifier circuit of the first embodiment of the present invention will be described in more detail. A transformer 280 composed of an inverting unit 270 that inverts the power rectified by the input rectifier 260 and a transformer that transforms the AC inverted by the inverting unit 270 into a voltage suitable for speaker power. ) and an output stage rectifier 290 that rectifies the alternating current transformed in the transformer 280 again, in the conventional SMPS unit 200, the peak voltage charging unit 210, the amplifying unit 220, the limiting unit ( 230), a comparison unit 240 and a control signal generator 250 are characterized in that it further comprises.

In more detail about the features of the present invention, in the peak voltage charging unit 210 having an input terminal connected to the output terminal (LEVEL_DET12) of the amplifier unit, the half-wave rectified peak voltage passes through the second resistor R2 for connection to the first amplifier. It is connected to the non-inverting input terminal of (U1-B), and the output terminal of the first amplifier (U1-B) is feedback-connected to the inverting input terminal through the second diode (D2) and the fourth resistor (R4), and at the same time, 1 is connected to the capacitor (C1). For reference, a first resistor (R1) is connected to a 12V power supply in parallel with the second resistor (R2) at the non-inverting input terminal of the first amplifier (U1-B), for example, so that the minimum power is maintained. It is for In addition, a second capacitor C2, a third resistor R3, and a fifth resistor R5 are added as elements added to the first amplifier U1-B.

Meanwhile, the inverting input terminal of the first amplifier (U1-B) (ie, the first capacitor (C1)) is connected to the second amplifier (U1-A) of the amplification unit (200) through a sixth resistor (R6). It is connected to the non-inverting input terminal, where voltage amplification is performed to the required voltage value. Also, the output terminal of the second amplifier (U1-A) is connected to the inverting input terminal through the fifth capacitor (C5) for feedback and the seventh resistor (R7), and the third capacitor (C3) and the eighth capacitor (C3) as other auxiliary elements. Resistor R8 is added.

Now, the output terminal of the second amplifier U1-A of the amplification unit 200 is connected to the ratio of the comparator U3-A of the comparison unit 240 through the tenth resistor R10 and the eleventh resistor R11. It is connected to the inverting input terminal, and thus outputs an output value compared with the reference voltage generated by the reference voltage generating units (R12, R13, R14), and finally in response to the output of the comparator 240 described above, the SMPS It controls the power output. (That is, the half-wave rectified DC voltage of the peak voltage detected at the output terminal of the amplifier unit is fed back in the first amplifier (U1-B) so that the maximum peak value is maintained after being charged in the first capacitor (C1), and the second After amplifying the voltage through the amplifier (U1-A) and changing it to the required voltage value (At this time, the maximum voltage of the DC voltage is limited by the Zener diode (U2) to increase the voltage of +VCC and -VEE above a certain level ), and is compared with the reference value of the comparator (U3-A).)

For reference, it is preferable that the limit unit 230 is connected to the eleventh resistor R11 of the comparator 240, and the output of the amplification unit 200 is a limit element of the limit unit (for example, a zener diode U2). ), so that it is not output beyond a certain voltage for unnecessary or amplifier protection.

Continuing to explain the control signal generator 250 in more detail, the lower power terminal of the light emitting unit of the photocoupler PC1 of the control signal generator 250 (for example, pin 2 of PC1 in FIG. 6) is connected. It is connected to the output terminal of the comparator U3-A of the comparator 240 through the resistor R15 and the anti-reverse diode D7, so that the resistance values of the reference voltage generators R12, R13, and R14 When the output value of the amplifier is a voltage higher than the set range than the comparison reference value, which is the voltage set by changing, the output value of the output terminal (No. 1 pin) of the comparator (U3-A) is changed to a LOW value, and the control signal generator 250 The photocoupler (PC1) is conducted, and eventually, through this, it is applied to the control signal input terminal (MAIN_F / B) of the PWM controller 171 of the inverting unit 270 of the SMPS unit, thereby adjusting the PWM duty to invert By turning on/off the switching devices 272 and 273 (for example, MOS FET) at a high power factor duty ratio, the output voltage of the SMPS is eventually adjusted to be higher and output.

For reference, even with the amplifier circuit of FIG. 6, when the output voltage of the SMPS is fixed in the amplifier, the voltage when used as a PA amplifier for high impedance (HIGH IMPEDANCE) is high, so the amplifier when used as an SR amplifier for low impedance (LOW IMPEDANCE) It is possible to solve the problem of increased switching loss and low power efficiency, and to improve power waste by increasing the power efficiency of the overall product, and furthermore, it is possible to respond to both PA and SR amplifiers.

Conversely, when the output value of the amplifier is a voltage lower than the set range than the comparison reference value set by the resistance value of the reference voltage generator (R12, R13, R14), the output terminal (pin 1) of the comparator (U3-A) The output value is changed to a HIGH value, so that the photocoupler (PC1) of the control signal generator 250 is not conducted, and eventually through this, the control signal input terminal (MAIN_F) of the PWM controller 171 of the inverting unit 270 of the SMPS unit /B) so that the control signal is not applied, so that the PWM DUTY is adjusted to turn on/off the inverting switching elements 272 and 273 (for example, MOS FET) at a duty ratio of a low power factor, eventually, the SMPS The output voltage is adjusted to a lower level, and in particular, according to the power consumption improving amplifier circuit of the present invention, it is possible to actively adjust the SMPS bias voltage by detecting the peak output signal with an extremely simple circuit.

(Second embodiment)

Hereinafter, a power consumption improving amplifier circuit that detects an output signal and actively adjusts an SMPS bias voltage according to a second embodiment of the present invention will be described with reference to FIGS. 5 and 7 .

In the power consumption improving amplifier circuit of the second embodiment, the amplifier unit 100 is the same as that of the first embodiment of FIG. 5, except that there is a difference only in the SMPS unit 200'. The SMPS unit (200' in FIG. 7) is also different from the SMPS unit (200 in FIG. 6) of the first embodiment only in the presence or absence of the bias setting switching unit 300, so other descriptions are omitted. , Only the bias setting switching unit 300 will be described hereinafter.

That is, as shown in FIG. 7, the SMPS unit 200' of the second embodiment has a plurality of reference voltage generating circuits for generating the reference voltage of the comparator 240', for example, the reference voltage for PA. It has generating circuits (R12, R13, R14) and reference voltage generating circuits for SR (R12, R13, R19), and a bias setting switching unit 300 for switching between them is added.

That is, when the bias setting switching unit 300 is switched for PA (refer to the solid line in FIG. 7), the reference voltage generator circuits R12, R13, and R14 for PA are relative to the inverting input terminal of the comparator U3-A. On the other hand, when the bias setting switching unit 300 is switched for SR (refer to the dotted line in FIG. 7), the SR reference voltage generator circuits R12, R13, and R19 generate the comparator U3. A relatively high reference voltage is applied to the inverting input terminal of -A).

As a result, according to the power consumption improving amplifier circuit of the second embodiment, the reference voltage value is set differently so that it can more reliably respond to both PA and SR fields with different operating voltages, thereby reducing consumption in most environments where the amplifier is used. It has the advantage of saving power as much as possible.

In addition, if the customer sets the switch mounted on the outside of the amplifier to the R14 side when using it for PA and the R19 side when using it for SR, it is possible to change the setting of the bias voltage more reliably.

In the above, the present invention has been described according to the best embodiment of the present invention, but changes and modifications made by those skilled in the art within the scope of not departing from the technical idea of the present invention also belong to the present invention. Of course.

Claims

The amplifier unit 100 further includes a peak voltage detection unit 120 outputting the signal amplified by the power amplifier 110 to a speaker SP and detecting a peak voltage output from an output terminal; and

The peak voltage value detected by the peak voltage detection unit 120 is charged and maintained at the maximum peak value, compared with the reference voltage, the bias value is increased when the amplifier output is high, and the output value is adjusted in such a way that it is lowered when the amplifier output is low. SMPS unit 200 outputting;

Including,

The SMPS unit 200,

An input rectifier 260 for full-wave rectifying a normal AC commercial power supply;

An inverting unit 270 for inverting the power rectified by the input rectifying unit 260;

A transformer 280 comprising a transformer for transforming the AC inverted by the inverting unit 270 into a speaker power supply voltage;

An output stage rectifier 290 that rectifies and outputs the AC transformed in the transformer 280 again;

A peak voltage charging unit 210 for sensing, charging, and maintaining the output of the amplifier unit;

A comparator 240 that compares an output voltage or amplified output voltage of the peak voltage charging unit 210 with a reference voltage;

A control signal generator 250 controlling inverting of the inverting unit 270 according to the output of the comparator 240

Power consumption improving amplifier circuit for actively adjusting the SMPS bias voltage by sensing the output signal, characterized in that comprising a.
According to claim 1,

In the amplifier unit 100, the peak voltage detection unit 120 is connected to the output terminal (OUT_DETECT1) of the power amplification unit 110, and the peak voltage detection unit 120 has a voltage-sensing dividing resistor (R17, R18) is connected to the output terminal (LEVEL_DET12) of the amplifier through the half-wave rectification diode (D8), and the peak voltage of the amplifier output terminal sensed by the voltage-sensing voltage divider resistors (R17, R18) is half-wave rectified and the SMPS A power consumption improving amplifier circuit that detects an output signal, characterized in that it is input to the unit 200, and actively adjusts the SMPS bias voltage.
According to claim 2,

In the peak voltage charger 210, the half-wave rectified peak voltage having an input terminal connected to the output terminal LEVEL_DET12 of the amplifier unit passes through a second resistor R2 for connection to the non-inverting input terminal of the first amplifier U1-B. , and the output terminal of the first amplifier (U1-B) is feedback-connected to the inverting input terminal through the second diode (D2) and the fourth resistor (R4) and connected to the first capacitor (C1), The half-wave rectified DC voltage of the peak voltage detected at the output terminal of the amplifier unit 100 is fed back to the first amplifier (U1-B) so that the maximum peak value is maintained after being charged in the first capacitor (C1). A power consumption improvement type amplifier circuit that actively adjusts the SMPS bias voltage by detecting the output signal to be
According to claim 1,

Further comprising an amplifier 220 that amplifies the output voltage of the peak voltage charging unit 210, the comparator 240 compares the voltage amplified by the amplifier 220 with a reference voltage,

A limiting unit 230 is connected to the input side of the comparator 240, and the output of the amplifying unit 220 is limited by the limiting element of the limiting unit, so that an unnecessary constant voltage or a constant voltage for amplifier protection is output. A power consumption improving amplifier circuit that detects an output signal and actively adjusts the SMPS bias voltage, characterized in that it is limited so as not to be.
According to claim 1,

The SMPS unit 200 actively detects an output signal, characterized in that it further includes a bias setting switching unit 300 for generating a plurality of reference voltages by generating a reference voltage of the comparator 240. A power consumption improvement type amplifier circuit that adjusts the SMPS bias voltage with