WO2023065843A1 - 基于变压器匹配的三路功率合成的射频功率放大器 - Google Patents

基于变压器匹配的三路功率合成的射频功率放大器 Download PDF

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WO2023065843A1
WO2023065843A1 PCT/CN2022/116461 CN2022116461W WO2023065843A1 WO 2023065843 A1 WO2023065843 A1 WO 2023065843A1 CN 2022116461 W CN2022116461 W CN 2022116461W WO 2023065843 A1 WO2023065843 A1 WO 2023065843A1
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transformer
stage
input
matching network
output
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PCT/CN2022/116461
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English (en)
French (fr)
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谢志远
赵宇霆
郭嘉帅
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深圳飞骧科技股份有限公司
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Publication of WO2023065843A1 publication Critical patent/WO2023065843A1/zh

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/56—Modifications of input or output impedances, not otherwise provided for
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
    • H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks

Definitions

  • the utility model relates to the technical field of power amplifiers, in particular to a radio frequency power amplifier based on transformer-matched three-way power synthesis.
  • the key module of the 5G wireless communication system is the RF power amplifier (RF Power Amplifier) located at the final stage of the transmitter.
  • the function of the RF power amplifier is to amplify the signal, and then the amplified signal is sent out by the antenna.
  • the RF power amplifier directly affects and determines various performance indicators such as output power, efficiency, gain, linearity, operating bandwidth, and reflection coefficient of the transmitter system, thereby affecting and determining various performance indicators of the entire 5G wireless communication system.
  • Impedance matching networks are usually used in RF power amplifiers.
  • the existing matching networks are generally a series-parallel combination of one to several capacitors and inductors.
  • the function of the impedance matching network of capacitors and inductors is to make the input and output ports of the RF power amplifier and When the 50 ohm port is connected, the impedance can be changed, and the effect of maximum gain transmission or maximum power transmission can be achieved according to the needs of different amplifiers.
  • the embodiment of the utility model provides a radio frequency power amplifier based on transformer matching and three-way power combining, which can reduce the difficulty of impedance matching, and can effectively optimize the input return loss and gain, which is beneficial to improve the output power.
  • the embodiment of the utility model provides a radio frequency power amplifier based on three-way power combination of transformer matching, including an input matching network, a first-stage two-way amplifier circuit, a first-stage matching network, a second Secondary single-channel amplifier circuit, second-stage transformer matching network, third-stage dual-channel amplifier circuit and output transformer matching network;
  • the second-stage transformer matching network includes a first transformer T1, and the output transformer matching network includes a second transformer T2 and a third transformer T3;
  • the radio frequency input signal RFin is transmitted to the two input terminals of the first-stage dual-channel amplifying circuit through the input matching network, and the two output terminals of the first-stage dual-channel amplifying circuit are respectively connected to the first-stage matching network.
  • the input end of the said third transformer T3 is connected to an input end; the output end of said first-stage matching network is connected to the input end of said second-stage single-channel amplifier circuit, and the two of said first transformer T1
  • the input terminals are respectively connected to the output terminals of the second-stage single-channel amplifier circuit and the supply voltage Vcc2, and the two output terminals of the first transformer T1 are respectively connected to the two input terminals of the third-stage dual-channel amplifier circuit.
  • the two output terminals of the third-stage dual amplifier circuit are respectively connected to the two input terminals of the second transformer T2, and the two output terminals of the second transformer T2 are respectively connected to the ground terminal and the third The other input terminal of the transformer T3 is connected, one output terminal of the third transformer T3 is used to output the radio frequency output signal RFout, and the other output terminal of the third transformer T3 is grounded.
  • the input matching network includes a fourth transformer T4, a first capacitor C1, a second capacitor C2, a first inductor L1, and two third capacitors C3;
  • One input end of the fourth transformer T4 is used to input the radio frequency input signal RFin, the other input end of the fourth transformer T4 is grounded through the first inductor L1, the first capacitor C1 and the second capacitor One end of C2 is respectively connected to the two input ends of the fourth transformer T4, the other ends of the first capacitor C1 and the second capacitor C2 are both grounded, and the two output ends of the fourth transformer T4 are respectively connected through the The two third capacitors C3 are connected to the two input terminals of the first stage dual amplifier circuit.
  • the input matching network includes two mirrored ⁇ -type circuits, each of which includes a high-pass ⁇ -type LC unit, a fourth capacitor C4 and a base resistor R0;
  • the input terminal of the high-pass ⁇ -type LC unit is used to input the radio frequency input signal RFin, and the output terminal of the high-pass ⁇ -type LC unit is sequentially connected with the first-stage dual-way amplification by the fourth capacitor C4 and the base resistor R0 One input of the circuit is connected.
  • the first-level matching network includes a high-pass T-type LC unit and a second inductor L2;
  • the input end of the high-pass T-type LC unit is connected to one end of the second inductor L2, and the connection node is connected to an output end of the first-stage dual amplifier circuit as the input end of the first-stage matching network , the other end of the second inductor L2 is connected to the power supply voltage Vcc1, and the output end of the high-pass T-type LC unit is connected to the input end of the second-stage single-channel amplifier circuit as the output end of the first-stage matching network .
  • the second-stage transformer matching network further includes a fifth capacitor C5, a sixth capacitor C6, a third inductor L3, two fourth inductors L4, and two seventh capacitors C7;
  • One end of the fifth capacitor C5 and the sixth capacitor C6 are respectively connected to the two input ends of the first transformer T1, and the other ends of the fifth capacitor C5 and the sixth capacitor C6 are grounded, so
  • the input end of the first transformer T1 used to connect to the power supply voltage Vcc2 is connected to the power supply voltage Vcc2 through the third inductance L3, and one end of the two fourth inductance L4 is respectively connected to two ends of the first transformer T1.
  • the other ends of the two fourth inductors L4 are connected to the ground, and the two seventh capacitors C7 are respectively connected in series with the two output terminals of the first transformer T1 and the third stage dual amplifier. between the two input terminals of the circuit.
  • the output transformer matching network further includes two eighth capacitors C8, ninth capacitor C9, tenth capacitor C10, fifth inductor L5 and sixth inductor L6;
  • One ends of the two eighth capacitors C8 are respectively connected to the two input ends of the second transformer T2, the other ends of the two eighth capacitors C8 are grounded, and the grounded output of the second transformer T2 terminal through the fifth inductance L5, and one end of the ninth capacitor C9 is connected to the grounded output end of the second transformer T2, the other end of the ninth capacitor C9 is grounded, and the third transformer T3
  • the grounded output end of the transformer T3 is grounded through the sixth inductor L6, one end of the tenth capacitor C10 is connected to the grounded output end of the third transformer T3, and the other end of the tenth capacitor C10 is grounded.
  • it also includes a first amplifying unit and an interstage matching network one; the output end connected to the input end of the third transformer T3 in the first stage dual amplifying circuit passes through the interstage matching network in turn One and the first amplifying unit is connected to the input end of the third transformer T3.
  • the first amplifying unit is connected to the input end of the third transformer T3 through the interstage matching network two and the second amplifying unit in sequence .
  • the first-stage dual amplifier circuit includes two first transistors Q1, the second-stage single amplifier circuit includes a second transistor Q2, and the third-stage dual amplifier circuit includes two first transistors Q2.
  • the bases of the two first transistors Q1 correspond to the two input terminals of the first-stage dual amplifier circuit, and the collectors of the two first transistors Q1 correspond to the first-stage dual amplifier circuit respectively.
  • the two output terminals of the circuit, the emitters of the two first transistors Q1 are grounded;
  • the base and collector of the second transistor Q2 correspond to the input and output of the second-stage single-channel amplifier circuit respectively terminal, the emitter of the second transistor Q2 is grounded;
  • the bases of the two third transistors Q3 are respectively corresponding to the two input terminals of the third-stage dual amplifier circuit, and the two third transistors Q3
  • the collectors of Q3 are respectively corresponding to the two output terminals of the third-stage dual amplifier circuit, and the emitters of the two third transistors Q3 are both grounded.
  • the utility model includes an input matching network, a first-stage two-way amplifying circuit, a first-stage matching network, a second-stage single-way amplifying circuit, a second stage transformer matching network, a third-stage dual-channel amplifier circuit, and an output transformer matching network;
  • the second-stage transformer matching network includes a first transformer T1
  • the output transformer matching network includes a second transformer T2 and a third transformer T3, and the radio frequency
  • the input signal RFin is transmitted to the two input ends of the first-stage two-way amplifying circuit through the input matching network, and after being amplified by the first-stage two-way amplifying circuit, one amplified signal passes through the first-stage matching network in turn After being combined with the second-stage single-channel amplifying circuit, it is transmitted to the first transformer T1, and transformed into two-way differential signals by the first transformer T1.
  • the two differential signals After the two-way differential signals pass through the third-stage two-way amplifying circuit, transmitted to the second transformer T2, the two differential signals are synthesized into one signal through the second transformer T2, and the signal is transmitted to an input terminal of the third transformer T3, and passed through the first stage dual
  • the other amplified signal amplified by the No. 1 amplifier circuit is transmitted to the other input end of the third transformer T3, so that the signal is synthesized into a radio frequency output signal RFout through the third transformer T3, thereby realizing three-way power synthesis.
  • Fig. 1 is a schematic structural diagram of a radio frequency power amplifier provided by the embodiment of the present invention.
  • Fig. 2 is another schematic structural diagram of the radio frequency power amplifier provided by the embodiment of the present invention.
  • Fig. 3 is another schematic structural diagram of the radio frequency power amplifier provided by the embodiment of the present invention.
  • Fig. 4 is another structural schematic diagram of the radio frequency power amplifier provided by the embodiment of the present invention.
  • this radio frequency power amplifier 100 comprises input matching network 11, first-stage two-way amplifier circuit 12, first-stage matching Network 13 , second-stage single-channel amplifier circuit 14 , second-stage transformer matching network 15 , third-stage dual-channel amplifier circuit 16 and output transformer matching network 17 .
  • the second-stage transformer matching network 15 includes a first transformer T1
  • the output transformer matching network includes a second transformer T2 and a third transformer T3.
  • both the first-stage dual-channel amplifier circuit 12 and the third-stage dual-channel amplifier circuit 16 are circuits with two-channel amplifier circuits, both of which have two input terminals and two output terminals
  • the second-stage single-channel amplifier circuit Circuit 14 is an amplifying circuit.
  • the radio frequency input signal RFin is transmitted to the two input terminals of the first-stage dual amplifying circuit 12 through the input matching network 11, and the two output terminals of the first-stage dual amplifying circuit 12 are connected to the first-stage dual amplifying circuit 12 respectively.
  • the input end of the stage matching network 13 is connected with an input end of the third transformer T3; the output end of the first stage matching network 13 is connected with the input end of the second stage single-channel amplifying circuit 14, and the first stage
  • the two input terminals of a transformer T1 are respectively connected to the output terminal of the second-stage single-channel amplifier circuit 14 and the supply voltage Vcc2, and the two output terminals of the first transformer T1 are respectively connected to the third-stage dual-channel amplifier circuit.
  • the two input terminals of the circuit 16 are connected, and the two output terminals of the third stage dual amplifier circuit 16 are respectively connected with the two input terminals of the second transformer T2, and the two output terminals of the second transformer T2 They are respectively connected to the ground terminal and the other input terminal of the third transformer T3, one output terminal of the third transformer T3 is used to output the radio frequency output signal RFout, and the other output terminal of the third transformer T3 is grounded.
  • one amplified signal passes through the first-stage matching network 13 and the second-stage single amplifying circuit 14 in turn, and then is transmitted to the first stage A transformer T1 is transformed into two differential signals through the action of the first transformer T1.
  • the two differential signals and the other amplifying circuit amplified by the first-stage dual amplifying circuit 12 form a three-channel signal.
  • the two-way differential signals are transmitted to the second transformer T2 after passing through the third-stage dual-way amplifying circuit, and the two-way differential signals are synthesized into one signal through the action of the second transformer T2, and the One signal is transmitted to one input end of the third transformer T3, and the other amplified signal amplified by the first-stage dual amplifier circuit 12 is transmitted to the other input end of the third transformer T3, thereby passing through the third transformer T3 performs signal synthesis into one radio frequency output signal RFout, thereby realizing three-way power synthesis.
  • using the transformer for impedance matching can reduce the difficulty of impedance matching, and can effectively optimize the input return loss and gain, and is also conducive to improving the output power.
  • the input matching network 11 includes a fourth transformer T4, a first capacitor C1, a second capacitor C2, a first inductor L1 and two third capacitors C3.
  • the radio frequency input signal RFin is a single-ended signal.
  • One input end of the fourth transformer T4 is used to input the radio frequency input signal RFin, the other input end of the fourth transformer T4 is grounded through the first inductor L1, the first capacitor C1 and the second capacitor One end of C2 is respectively connected to the two input ends of the fourth transformer T4, the other ends of the first capacitor C1 and the second capacitor C2 are both grounded, and the two output ends of the fourth transformer T4 are respectively connected through the The two third capacitors C3 are connected to the two input ends of the first stage dual amplifier circuit 12 .
  • the single-ended radio frequency input signal RFin can be converted into two-way signals, and the two-way signals are input to the first-stage two-way amplifying circuit 12 for amplification.
  • the first-stage matching network 13 includes a high-pass T-type LC unit and a second inductor L2.
  • the high-pass T-type LC unit includes a capacitor Ca, a capacitor Cb, and an inductor La.
  • One end of the capacitor Ca is connected to one end of the second inductor L2 as the input end of the high-pass T-type LC unit, and the connection node is used as the first
  • the input end of the first-stage matching network 13 is connected to one output end of the first-stage dual amplifier circuit 12, and the other end of the second inductor L2 is connected to the power supply voltage Vcc1.
  • the other end of the capacitor Ca is connected to one end of the capacitor Cb and one end of the inductor La, and the other end of the capacitor Cb is the output end of the high-pass T-type LC unit, which is also the output end of the first-stage matching network 13.
  • the input end of the second-stage single-channel amplifier circuit 14 is connected.
  • the other end of the inductor La is grounded.
  • the second stage transformer matching network 15 further includes a fifth capacitor C5, a sixth capacitor C6, a third inductor L3, two fourth inductors L4 and two seventh capacitors C7.
  • One end of the fifth capacitor C5 and the sixth capacitor C6 are respectively connected to the two input ends of the first transformer T1, and the other ends of the fifth capacitor C5 and the sixth capacitor C6 are grounded, so
  • the input end of the first transformer T1 used to connect to the power supply voltage Vcc2 is connected to the power supply voltage Vcc2 through the third inductance L3, and one end of the two fourth inductance L4 is respectively connected to two ends of the first transformer T1.
  • the other ends of the two fourth inductors L4 are connected to the ground, and the two seventh capacitors C7 are respectively connected in series with the two output terminals of the first transformer T1 and the third stage dual amplifier. between the two inputs of circuit 16.
  • the output transformer matching network 17 further includes two eighth capacitors C8 , ninth capacitor C9 , tenth capacitor C10 , fifth inductor L5 and sixth inductor L6 .
  • One ends of the two eighth capacitors C8 are respectively connected to the two input ends of the second transformer T2, the other ends of the two eighth capacitors C8 are grounded, and the grounded output of the second transformer T2 terminal is grounded through the fifth inductance L5, and one end of the ninth capacitor C9 is connected to the grounded output end of the second transformer T2, the other end of the ninth capacitor C9 is grounded, and the third transformer
  • the grounded output end of T3 is grounded through the sixth inductor L6, one end of the tenth capacitor C10 is connected to the grounded output end of the third transformer T3, and the other end of the tenth capacitor C10 is grounded.
  • the output transformer matching network 17 also includes an eleventh capacitor C11, a twelfth capacitor C12, a seventh inductor L7, and an eighth inductor L8, wherein one output terminal of the first-stage dual amplifier circuit 12 It is connected to the input terminal of the third transformer T3 through the eleventh capacitor C11 and the seventh inductor L7 in sequence.
  • One end of the twelfth capacitor C12 is connected between the eleventh capacitor C11 and the seventh inductor L7, and the other end is grounded.
  • One end of the eighth inductor L8 is connected between the output end of the first-stage dual amplifier circuit 12 and the eleventh capacitor C11 , and the other end is connected to the power supply voltage Vcc1 .
  • the first stage dual amplifier circuit 12 includes two first transistors Q1, the second stage single amplifier circuit 14 includes a second transistor Q2, and the third stage dual amplifier circuit 14 includes a second transistor Q2.
  • the amplifier circuit 16 includes two third transistors Q3.
  • the bases of the two first transistors Q1 correspond to the two input terminals of the first-stage dual-channel amplifying circuit 12, and the collectors of the two first transistors Q1 correspond to the first-stage dual-channel amplifier circuit 12 respectively.
  • the two output terminals of the amplifying circuit 12, the emitters of the two first transistors Q1 are grounded; the base and collector of the second transistor Q2 are respectively corresponding to the input of the second-stage single-channel amplifying circuit 14 terminals and output terminals, the emitter of the second transistor Q2 is grounded; the bases of the two third transistors Q3 are respectively corresponding to the two input terminals of the third-stage dual amplifier circuit 16, and the two The collectors of the third transistor Q3 respectively correspond to the two output terminals of the third-stage dual amplifier circuit 16 , and the emitters of the two third transistors Q3 are both grounded.
  • the first-stage dual-channel amplifying circuit 12 adopts two first transistors Q1 to respectively realize two-channel amplifying circuits, and in other real-time modes, each channel of the first-stage dual-channel amplifying circuit 12
  • the amplifying circuit can be realized by using a plurality of first transistors Q1 connected in parallel, the bases of the first transistors Q1 connected in parallel in each channel are connected in parallel, the collectors are connected in parallel, and the emitters are grounded.
  • each amplifying circuit in the amplifying circuits of other stages can be realized by using multiple transistors connected in parallel.
  • the bases of the first transistor Q1, the second transistor Q2 and the third transistor Q3 can all be connected to a bias circuit for providing a bias voltage, such as the base of the first transistor Q1 can be connected to a bias circuit bias1, the second The base of the transistor Q2 can be connected to the bias circuit bias2, and the base of the third transistor Q3 can be connected to the bias circuit bias3.
  • the radio frequency power amplifier 100 can be used as a power amplifier in the N77 frequency band (3.3-4.2GHz) in 5G communication.
  • N77 frequency band 3.3-4.2GHz
  • the gain and output power of the power amplifier can be significantly improved, and the problem of amplification The problem of matching between circuit stages is difficult.
  • the RF power amplifier 100 is composed of a three-stage amplifier circuit to obtain high gain.
  • the base current of the transistors on the amplifier circuits at each stage is about 100 ⁇ A, which are all class AB static operating points, so as to increase the power of the overall RF power amplifier. Additional efficiency.
  • the input matching network 11 is a transformer matching, which can convert a single-ended input signal into a differential signal, wherein capacitors C1, C2, C3 and inductor L1 form a transformer matching network with the fourth transformer T4, and two capacitors C3 can adjust the first The gain trend of the two-stage dual amplifier circuit 12, wherein the two first transistors Q1 can be set as the same or different transistors as required, if the two first transistors Q1 are the same, the two capacitors C3 are also the same, otherwise the two capacitors C3 Are not the same.
  • the first-stage matching network 13 is a two-stage LC matching
  • the second-stage transformer matching network 15 converts the single-ended output signal of the second-stage single-channel amplifier circuit 14 into a differential output signal
  • two capacitors C7 can adjust the third-stage dual output signal.
  • the output transformer matching network 17 is composed of two transformers, wherein the second transformer T2 converts the differential signal output by the third-stage dual-channel amplifying circuit 16 into a single-ended signal, and the signal is then combined with the output signal of the first-stage dual-channel amplifying circuit 12 of another road.
  • the output signals are synthesized into one channel through the third transformer T3, so as to obtain high output power.
  • the purpose of adjusting the overall output power can be achieved by adjusting the output power of one channel of the first-stage dual-channel amplifier circuit 12 .
  • the difference with the radio frequency power amplifier shown in Fig. 1 is that the structure of the input matching network 11 is different, and in the embodiment of Fig. 1, the input matching network
  • the single radio frequency input signal RFin input by 11 is then transformed into two differential signals by the fourth transformer T4.
  • the input signal is directly the radio frequency input signal RFin of two differential structures, one is the radio frequency input signal RFin+, and the other is Input signal RFin- for radio frequency.
  • the input matching network 11 has two mirrored ⁇ -type circuits 111, and each of the ⁇ -type circuits 111 includes a high-pass ⁇ -type LC unit 1111, a fourth capacitor C4, and a base resistor R0;
  • the input terminal of the high-pass ⁇ -type LC unit 1111 is used to input the radio frequency input signal RFin, and the output terminal of the high-pass ⁇ -type LC unit 1111 is connected with the first-stage dual circuit through the fourth capacitor C4 and the base resistor R0 in sequence.
  • One input terminal of the amplifier circuit 12 is connected.
  • the Qualcomm ⁇ -type LC unit 1111 includes a capacitor and two inductors, one end of the two inductors is respectively connected to both ends of the capacitor, and the two ends of the capacitor are respectively the input end and the output end of the Qualcomm ⁇ -type LC unit, and the two inductors The other end of the ground.
  • the radio frequency power amplifier 100 may further include a first amplifying unit 18 and an interstage matching network one 19 .
  • the output terminal connected to the input terminal of the third transformer T3 in the first-stage dual amplifying circuit 12 passes through the inter-stage matching network one 19 and the first amplifying unit 18 and the eleventh transformer T3 in sequence.
  • the capacitor C11 is connected to the connection node of the eighth inductor L8.
  • the specific structure of the first amplifying unit 18 can be the same as the structure of the second-stage single-channel amplifying circuit 14, that is, the first amplifying unit 18 can also be realized by a second transistor Q2, and the inter-stage matching network is a
  • the structure of 19 is basically the same as that of the first-stage matching network 13, and also includes a high-pass T-type LC unit and an inductance element. The difference is that there is a base resistor R1 in the inter-stage matching network-19, and the base resistor R1 is connected in series. Between the high-pass T-type LC unit and the base of the second transistor Q2.
  • the one-way amplifying circuit with the first-stage two-way amplifying circuit 12 constitutes a two-stage amplifying circuit, thereby providing greater gain and output power, and the input return loss S11 can also be optimized through the inter-stage matching network 19 .
  • the input matching network shown in FIG. 3 may also adopt the structure of the input matching network shown in FIG. 2 .
  • another embodiment of the radio frequency power amplifier 100 of the present invention further includes a second amplifying unit 20 and an interstage matching network 2 21 .
  • the first amplifying unit 18 is sequentially connected to the connection node of the eleventh capacitor C11 and the eighth inductor L8 through the second interstage matching network 21 and the second amplifying unit 20 .
  • the structure of the inter-stage matching network 2 21 is the same as that of the inter-stage matching network 19 , which will not be repeated here.
  • the second amplifying unit 20 can be realized by a third transistor Q3 .
  • the input matching network shown in FIG. 4 may also adopt the structure of the input matching network shown in FIG. 2 .
  • the second amplifying unit 20 and the interstage matching network two 21 on the basis shown in FIG.
  • the lower half of the first transistor Q1) and the first amplifying unit 18 jointly constitute a three-stage amplifying circuit, so that greater gain and output power can be provided, and the input return loss S11 can be optimized at the same time.

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Abstract

一种基于变压器匹配的三路功率合成的射频功率放大器，射频输入信号RFin依次通过输入匹配网络、第一级双路放大电路后，经过第一级双路放大电路放大后的一路放大信号依次通过第一级匹配网络、第二级单路放大电路、第一变压器T1后变换为两路差分信号，该两路差分信号经过第三级双路放大电路，然后通过第二变压器T2合成为一路信号，该路合成的信号和经第一级双路放大电路的放大后的另一路放大信号一同传输至第三变压器T3，通过第三变压器T3进行信号合成为一路射频输出信号RFout，降低阻抗匹配难度，有效优化输入回波损耗和增益，提高输出功率。

Description

基于变压器匹配的三路功率合成的射频功率放大器 技术领域
本实用新型涉及功率放大器技术领域，尤其涉及一种基于变压器匹配的三路功率合成的射频功率放大器。
背景技术
5G无线通信系统的关键模块是位于发射机末级的射频功率放大器(RF Power Amplifier)，射频功率放大器的作用为将信号进行放大，然后由天线将放大的信号发出。射频功率放大器直接影响和决定发射机系统的输出功率、效率、增益、线性度、工作带宽、反射系数等各项性能指标，从而影响和决定整个5G无线通信系统的各项性能指标。射频功率放大器中通常会用到阻抗匹配网络，现有的匹配网络一般为一个到几个电容电感之间的串并联组合，电容电感的阻抗匹配网络的作用是使得射频功率放大器的输入输出端口与50欧姆端口连接时实现阻抗变化，根据不同放大器的需求达到最大增益传输或最大功率传输等效果。
现有阻抗匹配网络多为“Π型”、“T型”、“L型”，然而，5G无线通信系统中的射频功率放大器的输出功率更大，因此设计和实现高功率需要更多的晶体管，增加了匹配的难度；并且在高频下的电容、电感、电阻将产生较大的寄生效应，导致器件的实际值与理想值有一定差距，由此可知高频下的阻抗匹配将更加困难；并且，若仅使用电容、电感的传统匹配结构，难以将输入回波损耗、增益匹配至一个较好的状态。
实用新型内容
本实用新型实施例提供一种基于变压器匹配的三路功率合成的射频功率放大器，能够降低阻抗匹配难度，且可以有效优化输入回波损耗和增益，有利于提高输出功率。
为了解决上述技术问题，一方面，本实用新型实施例提供一种基于变压器匹配的三路功率合成的射频功率放大器，包括输入匹配网络、第一级双路放大电路、第一级匹配网络、第二级单路放大电路、第二级变压器匹配网络、第三 级双路放大电路以及输出变压器匹配网络；
所述第二级变压器匹配网络包括第一变压器T1，所述输出变压器匹配网络包括第二变压器T2和第三变压器T3；
射频输入信号RFin通过所述输入匹配网络传输至所述第一级双路放大电路的两个输入端，所述第一级双路放大电路的两个输出端分别与所述第一级匹配网络的输入端和所述第三变压器T3的一个输入端连接；所述第一级匹配网络的输出端与所述第二级单路放大电路的输入端连接，所述第一变压器T1的两个输入端分别与所述第二级单路放大电路的输出端和供电电压Vcc2连接，所述第一变压器T1的两个输出端分别与所述第三级双路放大电路的两个输入端连接，所述第三级双路放大电路的两个输出端分别与所述第二变压器T2的两个输入端连接，所述第二变压器T2的两个输出端分别与地端和所述第三变压器T3的另一个输入端连接，所述第三变压器T3的一个输出端用于输出射频输出信号RFout，所述第三变压器T3的另一个输出端接地。
更进一步地，所述输入匹配网络包括第四变压器T4、第一电容C1、第二电容C2、第一电感L1以及两个第三电容C3；
所述第四变压器T4的一个输入端用于输入所述射频输入信号RFin，所述第四变压器T4的另一个输入端通过所述第一电感L1接地，所述第一电容C1和第二电容C2的一端分别与所述第四变压器T4的两个输入端连接，所述第一电容C1和第二电容C2的另一端均接地，所述第四变压器T4的两个输出端分别通过所述两个第三电容C3与所述第一级双路放大电路的两个输入端连接。
更进一步地，所述输入匹配网络包括两路呈镜像的π型电路，每路所述π型电路包括高通π型LC单元、第四电容C4和基极电阻R0；
所述高通π型LC单元的输入端用于输入射频输入信号RFin，所述高通π型LC单元的输出端依次通过所述第四电容C4和基极电阻R0与所述第一级双路放大电路的一个输入端连接。
更进一步地，所述第一级匹配网络包括高通T型LC单元和第二电感L2；
所述高通T型LC单元的输入端与所述第二电感L2的一端连接，且连接节点作为所述第一级匹配网络的输入端与所述第一级双路放大电路的一个输出端连接，所述第二电感L2的另一端连接供电电压Vcc1，所述高通T型LC单元 的输出端作为所述第一级匹配网络的输出端与所述第二级单路放大电路的输入端连接。
更进一步地，所述第二级变压器匹配网络还包括第五电容C5、第六电容C6、第三电感L3、两个第四电感L4以及两个第七电容C7；
所述第五电容C5和所述第六电容C6的一端分别与所述第一变压器T1的两个输入端连接，所述第五电容C5和所述第六电容C6的另一端均接地，所述第一变压器T1的用于接供电电压Vcc2的输入端通过所述第三电感L3与所述供电电压Vcc2连接，所述两个第四电感L4的一端分别与所述第一变压器T1的两个输出端连接，所述两个第四电感L4的另一端均接地，所述两个第七电容C7分别串联在所述第一变压器T1的两个输出端和所述第三级双路放大电路的两个输入端之间。
更进一步地，所述输出变压器匹配网络还包括两个第八电容C8、第九电容C9、第十电容C10、第五电感L5以及第六电感L6；
所述两个第八电容C8的一端分别与所述第二变压器T2的两个输入端连接，所述两个第八电容C8的另一端均接地，所述第二变压器T 2的接地的输出端通过所述第五电感L5接地，且所述第九电容C9的一端与所述第二变压器T2的接地的输出端连接，所述第九电容C9的另一端接地，所述第三变压器T3的接地的输出端通过所述第六电感L6接地，所述第十电容C10的一端与所述第三变压器T3的接地的输出端连接，所述第十电容C10的另一端接地。
更进一步地，还包括第一放大单元和级间匹配网络一；所述第一级双路放大电路中与所述第三变压器T3的输入端连接的输出端，依次通过所述级间匹配网络一和所述第一放大单元与所述第三变压器T3的输入端连接。
更进一步地，还包括第二放大单元和级间匹配网络二；所述第一放大单元依次通过所述级间匹配网络二和所述第二放大单元与所述第三变压器T3的输入端连接。
更进一步地，所述第一级双路放大电路包括两个第一晶体管Q1，所述第二级单路放大电路包括一个第二晶体管Q2，所述第三级双路放大电路包括两个第三晶体管Q3；
其中所述两个第一晶体管Q1的基极分别对应为所述第一级双路放大电路 的两个输入端，所述两个第一晶体管Q1的集电极分别对应为第一级双路放大电路的两个输出端，所述两个第一晶体管Q1的发射极均接地；所述第二晶体管Q2的基极和集电极分别对应为所述第二级单路放大电路的输入端和输出端，所述第二晶体管Q2的发射极接地；所述两个第三晶体管Q3的基极分别对应为所述第三级双路放大电路的两个输入端，所述两个第三晶体管Q3的集电极分别对应为第三级双路放大电路的两个输出端，所述两个第三晶体管Q3的发射极均接地。
有益效果：本实用新型的基于变压器匹配的三路功率合成的射频功率放大器中，包括输入匹配网络、第一级双路放大电路、第一级匹配网络、第二级单路放大电路、第二级变压器匹配网络、第三级双路放大电路以及输出变压器匹配网络；所述第二级变压器匹配网络包括第一变压器T1，所述输出变压器匹配网络包括第二变压器T2和第三变压器T3，射频输入信号RFin通过所述输入匹配网络传输至所述第一级双路放大电路的两个输入端，经过第一级双路放大电路的放大后，一路放大信号依次通过所述第一级匹配网络和所述第二级单路放大电路后，传输至所述第一变压器T1，通过第一变压器T1变换为两路差分信号，该两路差分信号经过所述第三级双路放大电路后，传输至所述第二变压器T2，通过所述第二变压器T2将两路差分信号合成为一路信号，并将该路信号传输至所述第三变压器T3的一个输入端，而经过第一级双路放大电路的放大后的另一路放大信号传输至第三变压器T3的另一个输入端，从而通过第三变压器T3进行信号合成为一路射频输出信号RFout，由此实现三路功率合成，通过上述方式，利用变压器进行阻抗匹配，能够降低阻抗匹配难度，且可以有效优化输入回波损耗和增益，还有利于提高输出功率。
附图说明
下面结合附图，通过对本实用新型的具体实施方式详细描述，将使本实用新型的技术方案及其有益效果显而易见。
图1是本实用新型实施例提供的射频功率放大器的一结构示意图；
图2是本实用新型实施例提供的射频功率放大器的另一结构示意图；
图3是本实用新型实施例提供的射频功率放大器的又一结构示意图；
图4是本实用新型实施例提供的射频功率放大器的又一结构示意图。
具体实施方式
请参照图式，其中相同的组件符号代表相同的组件，本实用新型的原理是以实施在一适当的运算环境中来举例说明。以下的说明是基于所例示的本实用新型具体实施例，其不应被视为限制本实用新型未在此详述的其它具体实施例。
参阅图1，本实用新型实施例提供的一种基于变压器匹配的三路功率合成的射频功率放大器，该射频功率放大器100包括输入匹配网络11、第一级双路放大电路12、第一级匹配网络13、第二级单路放大电路14、第二级变压器匹配网络15、第三级双路放大电路16以及输出变压器匹配网络17。
其中，所述第二级变压器匹配网络15包括第一变压器T1，所述输出变压器匹配网络包括第二变压器T2和第三变压器T3。可以理解的是，第一级双路放大电路12和第三级双路放大电路16均为具有两路放大电路的电路，都具有两个输入端和两个输出端，第二级单路放大电路14为一路放大电路。
射频输入信号RFin通过所述输入匹配网络11传输至所述第一级双路放大电路12的两个输入端，所述第一级双路放大电路12的两个输出端分别与所述第一级匹配网络13的输入端和所述第三变压器T3的一个输入端连接；所述第一级匹配网络13的输出端与所述第二级单路放大电路14的输入端连接，所述第一变压器T1的两个输入端分别与所述第二级单路放大电路14的输出端和供电电压Vcc2连接，所述第一变压器T1的两个输出端分别与所述第三级双路放大电路16的两个输入端连接，所述第三级双路放大电路16的两个输出端分别与所述第二变压器T2的两个输入端连接，所述第二变压器T2的两个输出端分别与地端和所述第三变压器T3的另一个输入端连接，所述第三变压器T3的一个输出端用于输出射频输出信号RFout，所述第三变压器T3的另一个输出端接地。
由此，经过第一级双路放大电路12放大的两路放大信号，一路放大信号依次通过所述第一级匹配网络13和所述第二级单路放大电路14后，传输至所述第一变压器T1，通过第一变压器T1的作用再变换为两路差分信号，该两路差分信号与经过第一级双路放大电路12放大后的另一路放大电路形成了三路信号。其中，该两路差分信号经过所述第三级双路放大电路后，传输至所述第二变压器T2，通过所述第二变压器T2的作用将两路差分信号合成为一路信号， 并将该路信号传输至所述第三变压器T3的一个输入端，而经过第一级双路放大电路12的放大后的另一路放大信号传输至第三变压器T3的另一个输入端，从而通过第三变压器T3进行信号合成为一路射频输出信号RFout，由此实现三路功率合成。通过上述方式，利用变压器进行阻抗匹配，能够降低阻抗匹配难度，且可以有效优化输入回波损耗和增益，还有利于提高输出功率。
在本实用新型的一些实施例中，所述输入匹配网络11包括第四变压器T4、第一电容C1、第二电容C2、第一电感L1以及两个第三电容C3。在本实施例何种，射频输入信号RFin为单端信号。所述第四变压器T4的一个输入端用于输入所述射频输入信号RFin，所述第四变压器T4的另一个输入端通过所述第一电感L1接地，所述第一电容C1和第二电容C2的一端分别与所述第四变压器T4的两个输入端连接，所述第一电容C1和第二电容C2的另一端均接地，所述第四变压器T4的两个输出端分别通过所述两个第三电容C3与所述第一级双路放大电路12的两个输入端连接。
由此，通过第四变压器T4的作用，可以实现将单端的射频输入信号RFin变为两路信号，该两路信号输入至第一级双路放大电路12进行放大。
继续参阅图1，所述第一级匹配网络13包括高通T型LC单元和第二电感L2。
所述高通T型LC单元包括电容Ca、电容Cb和电感La，电容Ca的一端作为所述高通T型LC单元的输入端与所述第二电感L2的一端连接，且连接节点作为所述第一级匹配网络13的输入端与所述第一级双路放大电路12的一个输出端连接，所述第二电感L2的另一端连接供电电压Vcc1。电容Ca的另一端与电容Cb的一端、电感La的一端连接，电容Cb的另一端为所述高通T型LC单元的输出端，也是所述第一级匹配网络13的输出端，与所述第二级单路放大电路14的输入端连接。电感La的另一端接地。
其中，所述第二级变压器匹配网络15还包括第五电容C5、第六电容C6、第三电感L3、两个第四电感L4以及两个第七电容C7。所述第五电容C5和所述第六电容C6的一端分别与所述第一变压器T1的两个输入端连接，所述第五电容C5和所述第六电容C6的另一端均接地，所述第一变压器T1的用于接供电电压Vcc2的输入端通过所述第三电感L3与所述供电电压Vcc2连接，所述 两个第四电感L4的一端分别与所述第一变压器T1的两个输出端连接，所述两个第四电感L4的另一端均接地，所述两个第七电容C7分别串联在所述第一变压器T1的两个输出端和所述第三级双路放大电路16的两个输入端之间。
其中，所述输出变压器匹配网络17还包括两个第八电容C8、第九电容C9、第十电容C10、第五电感L5以及第六电感L6。所述两个第八电容C8的一端分别与所述第二变压器T2的两个输入端连接，所述两个第八电容C8的另一端均接地，所述第二变压器T 2的接地的输出端通过所述第五电感L5接地，且所述第九电容C9的一端与所述第二变压器T 2的接地的输出端连接，所述第九电容C9的另一端接地，所述第三变压器T3的接地的输出端通过所述第六电感L6接地，所述第十电容C10的一端与所述第三变压器T3的接地的输出端连接，所述第十电容C10的另一端接地。
进一步地，所述输出变压器匹配网络17还包括第十一电容C11、第十二电容C12、第七电感L7以及第八电感L8，其中，所述第一级双路放大电路12的一个输出端依次通过所述第十一电容C11和第七电感L7与所述第三变压器T3的输入端连接。所述第十二电容C12的一端连接在所述第十一电容C11和第七电感L7之间，另一端接地。所述第八电感L8的一端连接在所述第一级双路放大电路12的输出端与所述第十一电容C11之间，另一端连接供电电压Vcc1。
本实用新型的一些实施例中，所述第一级双路放大电路12包括两个第一晶体管Q1，所述第二级单路放大电路14包括一个第二晶体管Q2，所述第三级双路放大电路16包括两个第三晶体管Q3。
其中所述两个第一晶体管Q1的基极分别对应为所述第一级双路放大电路12的两个输入端，所述两个第一晶体管Q1的集电极分别对应为第一级双路放大电路12的两个输出端，所述两个第一晶体管Q1的发射极均接地；所述第二晶体管Q2的基极和集电极分别对应为所述第二级单路放大电路14的输入端和输出端，所述第二晶体管Q2的发射极接地；所述两个第三晶体管Q3的基极分别对应为所述第三级双路放大电路16的两个输入端，所述两个第三晶体管Q3的集电极分别对应为第三级双路放大电路16的两个输出端，所述两个第三晶体管Q3的发射极均接地。
因此，本实用新型的实施例中，第一级双路放大电路12采用两个第一晶体 管Q1分别实现两路放大电路，而在其他实时方式中，第一级双路放大电路12的每一路放大电路可以采用多个并联的第一晶体管Q1实现，每一路中多个并联的第一晶体管Q1的基极并联在一起，集电极并联在一起，发射极接地。同理地，其他级的放大电路中的每一路放大电路均可采用多个并联的晶体管实现。
其中，第一晶体管Q1、第二晶体管Q2以及第三晶体管Q3的基极均可连接用于提供偏置电压的偏置电路，如第一晶体管Q1的基极可连接偏置电路bias1，第二晶体管Q2的基极可连接偏置电路bias2，第三晶体管Q3的基极可连接偏置电路bias3。
本申请实施例中，射频功率放大器100可作为5G通信中N77频段(3.3～4.2GHz)的功率放大器，通过采用变压器匹配的方式，能够显著的提高功率放大器的增益、输出功率，并解决了放大电路级间匹配较难的问题。
其中，射频功率放大器100由三级放大电路构成以此获得高增益，各级放大电路上的晶体管的基极电流约为100μA，均为AB类静态工作点，以此增加整体射频功率放大器的功率附加效率。其中，输入匹配网络11为变压器匹配，可将单端输入信号转为差分信号，其中电容C1、C2、C3和电感L1与第四变压器T4一起组成变压器匹配网络，两个电容C3可调节第一级双路放大电路12的增益趋势，其中，两个第一晶体管Q1可以根据需要设置为相同或不同的晶体管，若两个第一晶体管Q1相同则两个电容C3也相同，反之两个电容C3不相同。第一级双路放大电路12输出的两个差分信号，一个经过第一级匹配网络13和第二级单路放大电路14后进入第二级变压器匹配网络15，另一路直接进入输出变压器匹配网络17。第一级匹配网络13为两阶LC匹配，第二级变压器匹配网络15将第二级单路放大电路14的单端输出信号转为差分输出信号，其中两个电容C7可调节第三级双路放大电路16的增益趋势。输出变压器匹配网络17由两个变压器组成，其中第二变压器T2将第三级双路放大电路16输出的差分信号转为单端信号，该信号再与另一路第一级双路放大电路12的输出信号经过第三变压器T3合成为一路，以此得到高输出功率。其中，可以通过调节第一级双路放大电路12的一路输出功率，以此达到调节整体输出功率的目的。
参阅图2，本实用新型的射频功率放大器100的另一实施例中，与图1所 示的射频功率放大器的不同之处在于输入匹配网络11的结构不同，图1的实施例中输入匹配网络11输入的单个射频输入信号RFin，然后由第四变压器T4变为两路差分信号，本实施例中，输入信号直接是两路差分结构的射频输入信号RFin，一路为射频输入信号RFin+，另一路为射频输入信号RFin-。
更具体地，本实施例中，输入匹配网络11两路呈镜像的π型电路111，每路所述π型电路111包括高通π型LC单元1111、第四电容C4和基极电阻R0；
所述高通π型LC单元1111的输入端用于输入射频输入信号RFin，所述高通π型LC单元1111的输出端依次通过所述第四电容C4和基极电阻R0与所述第一级双路放大电路12的一个输入端连接。其中，高通π型LC单元1111包括一个电容和两个电感，两个电感的一端分别与电容的两端连接，且电容两端分别为高通π型LC单元的输入端和输出端，两个电感的另一端接地。
参阅图3，本实用新型的射频功率放大器100的又一实施例中，射频功率放大器100还可以包括第一放大单元18和级间匹配网络一19。
所述第一级双路放大电路12中与所述第三变压器T3的输入端连接的输出端，依次通过所述级间匹配网络一19和所述第一放大单元18与所述第十一电容C11和第八电感L8的连接节点连接。
其中，如图所示，第一放大单元18的具体结构可以与第二级单路放大电路14的结构相同，即第一放大单元18也可以采用一个第二晶体管Q2实现，级间匹配网络一19的结构和第一级匹配网络13的结构基本相同，也包括高通T型LC单元和电感元件，不同之处在于级间匹配网络一19中具有一个基极电阻R1，基极电阻R1串联在高通T型LC单元和第二晶体管Q2的基极之间。
本实施例中，通过设置所述级间匹配网络一19和所述第一放大单元18，从而与第一级双路放大电路12的一路放大电路(即图1所示的下半部分的第一晶体管Q1)构成两级放大电路，由此可提供更大的增益和输出功率，并且通过级间匹配网络19也可优化输入回波损耗S11。
可以理解的是，图3所示的输入匹配网络也可以采用如图2所示的输入匹配网络的结构。
参阅图4，本实用新型的射频功率放大器100的又一实施例中，还包括第二放大单元20和级间匹配网络二21。所述第一放大单元18依次通过所述级间 匹配网络二21和所述第二放大单元20与所述第十一电容C11和第八电感L8的连接节点连接。其中，级间匹配网络二21的结构与级间匹配网络一19的结构相同，在此不进行一一赘述，第二放大单元20可以采用一个第三晶体管Q3实现。其中，图4所示的输入匹配网络也可以采用如图2所示的输入匹配网络的结构。
本实施例中，通过在图3所示的基础上增加第二放大单元20和级间匹配网络二21，由此可与第一级双路放大电路12的一路放大电路(即图1所示的下半部分的第一晶体管Q1)以及第一放大单元18共同构成三级放大电路，从而可以提供更大的增益和输出功率，同时可优化输入回波损耗S11。
以上对本实用新型实施例所提供的一种基于变压器匹配的三路功率合成的射频功率放大器进行了详细介绍，本文中应用了具体个例对本实用新型的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本实用新型的方法及其核心思想；同时，对于本领域的技术人员，依据本实用新型的思想，在具体实施方式及应用范围上均会有改变之处，综上所述，本说明书内容不应理解为对本实用新型的限制。

Claims (9)

  1. 一种基于变压器匹配的三路功率合成的射频功率放大器，其特征在于，包括输入匹配网络、第一级双路放大电路、第一级匹配网络、第二级单路放大电路、第二级变压器匹配网络、第三级双路放大电路以及输出变压器匹配网络；
    所述第二级变压器匹配网络包括第一变压器T1，所述输出变压器匹配网络包括第二变压器T2和第三变压器T3；
    射频输入信号RFin通过所述输入匹配网络传输至所述第一级双路放大电路的两个输入端，所述第一级双路放大电路的两个输出端分别与所述第一级匹配网络的输入端和所述第三变压器T3的一个输入端连接；所述第一级匹配网络的输出端与所述第二级单路放大电路的输入端连接，所述第一变压器T1的两个输入端分别与所述第二级单路放大电路的输出端和供电电压Vcc2连接，所述第一变压器T1的两个输出端分别与所述第三级双路放大电路的两个输入端连接，所述第三级双路放大电路的两个输出端分别与所述第二变压器T2的两个输入端连接，所述第二变压器T2的两个输出端分别与地端和所述第三变压器T3的另一个输入端连接，所述第三变压器T3的一个输出端用于输出射频输出信号RFout，所述第三变压器T3的另一个输出端接地。
  2. 根据权利要求1所述的射频功率放大器，其特征在于，所述输入匹配网络包括第四变压器T4、第一电容C1、第二电容C2、第一电感L1以及两个第三电容C3；
    所述第四变压器T4的一个输入端用于输入所述射频输入信号RFin，所述第四变压器T4的另一个输入端通过所述第一电感L1接地，所述第一电容C1和第二电容C2的一端分别与所述第四变压器T4的两个输入端连接，所述第一电容C1和第二电容C2的另一端均接地，所述第四变压器T4的两个输出端分别通过所述两个第三电容C3与所述第一级双路放大电路的两个输入端连接。
  3. 根据权利要求1所述的射频功率放大器，其特征在于，所述输入匹配网络包括两路呈镜像的π型电路，每路所述π型电路包括高通π型LC单元、第四电容C4和基极电阻R0；
    所述高通π型LC单元的输入端用于输入射频输入信号RFin，所述高通π型LC单元的输出端依次通过所述第四电容C4和基极电阻R0与所述第一级双 路放大电路的一个输入端连接。
  4. 根据权利要求1所述的射频功率放大器，其特征在于，所述第一级匹配网络包括高通T型LC单元和第二电感L2；
    所述高通T型LC单元的输入端与所述第二电感L2的一端连接，且连接节点作为所述第一级匹配网络的输入端与所述第一级双路放大电路的一个输出端连接，所述第二电感L2的另一端连接供电电压Vcc1，所述高通T型LC单元的输出端作为所述第一级匹配网络的输出端与所述第二级单路放大电路的输入端连接。
  5. 根据权利要求1所述的射频功率放大器，其特征在于，所述第二级变压器匹配网络还包括第五电容C5、第六电容C6、第三电感L3、两个第四电感L4以及两个第七电容C7；
    所述第五电容C5和所述第六电容C6的一端分别与所述第一变压器T1的两个输入端连接，所述第五电容C5和所述第六电容C6的另一端均接地，所述第一变压器T1的用于接供电电压Vcc2的输入端通过所述第三电感L3与所述供电电压Vcc2连接，所述两个第四电感L4的一端分别与所述第一变压器T1的两个输出端连接，所述两个第四电感L4的另一端均接地，所述两个第七电容C7分别串联在所述第一变压器T1的两个输出端和所述第三级双路放大电路的两个输入端之间。
  6. 根据权利要求1所述的射频功率放大器，其特征在于，所述输出变压器匹配网络还包括两个第八电容C8、第九电容C9、第十电容C10、第五电感L5以及第六电感L6；
    所述两个第八电容C8的一端分别与所述第二变压器T2的两个输入端连接，所述两个第八电容C8的另一端均接地，所述第二变压器T2的接地的输出端通过所述第五电感L5接地，且所述第九电容C9的一端与所述第二变压器T2的接地的输出端连接，所述第九电容C9的另一端接地，所述第三变压器T3的接地的输出端通过所述第六电感L6接地，所述第十电容C10的一端与所述第三变压器T3的接地的输出端连接，所述第十电容C10的另一端接地。
  7. 根据权利要求1至6任一项所述的射频功率放大器，其特征在于，还包括第一放大单元和级间匹配网络一；所述第一级双路放大电路中与所述第三变 压器T3的输入端连接的输出端，依次通过所述级间匹配网络一和所述第一放大单元与所述第三变压器T3的输入端连接。
  8. 根据权利要求7所述的射频功率放大器，其特征在于，还包括第二放大单元和级间匹配网络二；所述第一放大单元依次通过所述级间匹配网络二和所述第二放大单元与所述第三变压器T3的输入端连接。
  9. 根据权利要求1所述的射频功率放大器，其特征在于，所述第一级双路放大电路包括两个第一晶体管Q1，所述第二级单路放大电路包括一个第二晶体管Q2，所述第三级双路放大电路包括两个第三晶体管Q3；
    其中所述两个第一晶体管Q1的基极分别对应为所述第一级双路放大电路的两个输入端，所述两个第一晶体管Q1的集电极分别对应为第一级双路放大电路的两个输出端，所述两个第一晶体管Q1的发射极均接地；所述第二晶体管Q2的基极和集电极分别对应为所述第二级单路放大电路的输入端和输出端，所述第二晶体管Q2的发射极接地；所述两个第三晶体管Q3的基极分别对应为所述第三级双路放大电路的两个输入端，所述两个第三晶体管Q3的集电极分别对应为第三级双路放大电路的两个输出端，所述两个第三晶体管Q3的发射极均接地。
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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7486141B2 (en) * 2005-12-21 2009-02-03 Trex Enterprises Corp. Wide bandwidth, high power amplifier
JP2015115860A (ja) * 2013-12-13 2015-06-22 サムソン エレクトロ−メカニックス カンパニーリミテッド． 高周波電力増幅装置及び無線通信装置
CN106533374A (zh) * 2016-09-20 2017-03-22 锐迪科微电子（上海）有限公司 一种多频gsm射频功率放大器
CN106788274A (zh) * 2017-01-18 2017-05-31 广东宽普科技股份有限公司 一种宽带三路合成射频微波功率放大器
CN112865720A (zh) * 2021-01-20 2021-05-28 电子科技大学 X波段宽脉冲大功率内匹配功率放大器
CN216056945U (zh) * 2021-10-22 2022-03-15 深圳飞骧科技股份有限公司 基于变压器匹配的三路功率合成的射频功率放大器

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7486141B2 (en) * 2005-12-21 2009-02-03 Trex Enterprises Corp. Wide bandwidth, high power amplifier
JP2015115860A (ja) * 2013-12-13 2015-06-22 サムソン エレクトロ−メカニックス カンパニーリミテッド． 高周波電力増幅装置及び無線通信装置
CN106533374A (zh) * 2016-09-20 2017-03-22 锐迪科微电子（上海）有限公司 一种多频gsm射频功率放大器
CN106788274A (zh) * 2017-01-18 2017-05-31 广东宽普科技股份有限公司 一种宽带三路合成射频微波功率放大器
CN112865720A (zh) * 2021-01-20 2021-05-28 电子科技大学 X波段宽脉冲大功率内匹配功率放大器
CN216056945U (zh) * 2021-10-22 2022-03-15 深圳飞骧科技股份有限公司 基于变压器匹配的三路功率合成的射频功率放大器

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