WO2023061226A1

WO2023061226A1 - Array substrate and display panel

Info

Publication number: WO2023061226A1
Application number: PCT/CN2022/122195
Authority: WO
Inventors: 唐榕; 郑浩旋
Original assignee: 惠科股份有限公司
Priority date: 2021-10-15
Filing date: 2022-09-28
Publication date: 2023-04-20
Also published as: CN113641051B; CN113641051A

Abstract

The present application discloses an array substrate and a display panel. The array substrate comprises: a substrate and a first electrode and a second electrode formed on the substrate, the first electrode being a pixel electrode, and the second electrode being a common electrode or a ground electrode; the first electrode and the second electrode are connected by means of at least one force-sensitive resistive material layer, and the force-sensitive resistive material layer is changed from an insulator or a semiconductor to a conductor after being extruded. The force-sensitive resistive material layer in the array substrate is changed from the insulator or the semiconductor to the conductor after being extruded, and the conductive force-sensitive resistive material layer enables the first electrode and the second electrode to be in short-circuit connection. In this way, liquid crystal molecules at a pressed part can be prevented from being rearranged, thereby avoiding the phenomenon of uneven brightness caused by scratches, and finally improving the product quality.

Description

Array substrate and display panel

This application claims priority to a Chinese patent application with application number 202111200792.3 and application title "Array Substrate and Display Panel" filed at the China Patent Office on October 15, 2021, the entire contents of which are incorporated herein by reference .

technical field

The present application relates to the field of display technology, and in particular to an array substrate and a display panel.

Background technique

Trace Mura (indentation) can be understood as a phenomenon of uneven brightness of scratches. It means that after scratching the surface of the display with a hard part, the display will follow the scratched position without damaging the surface film layer. There is mura (uneven brightness) phenomenon on the route, and the mura cannot disappear in a short time. The principle of Trace Mura is that when the display panel is under pressure, the liquid crystal molecules with a large inclination at the pressure position are squeezed and rearranged, so that the light transmittance changes. When the pressure is removed, the force of the rearranged liquid crystal molecules in the electric field The bottom cannot return to the original position in a short time, which will affect the display effect and ultimately affect the product quality.

technical problem

The purpose of the embodiments of the present application is to provide an array substrate and a display panel.

technical solution

The technical scheme that the embodiment of the present application adopts is:

In a first aspect, an array substrate is provided, including a substrate and a first electrode and a second electrode formed on the substrate, the first electrode is a pixel electrode, and the second electrode is a common electrode or a ground electrode An electrode, wherein the first electrode and the second electrode are connected by at least one layer of force-sensitive resistance material, and the force-sensitive resistance material layer changes from an insulator or a semiconductor to a conductor after extrusion.

In one embodiment, the array substrate further includes:

a gate formed on the substrate;

a gate insulating layer formed on the substrate and covering the gate;

an active layer formed on the gate insulating layer;

source and drain electrodes formed on the active layer;

a passivation layer formed on the source and drain;

The first electrode is located on the passivation layer, the second electrode is located between the substrate and the gate insulating layer, and a layer of the passivation layer is provided between the first electrode and the passivation layer. The force-sensitive resistance material layer, a layer of the force-sensitive resistance material layer is provided between the second electrode and the gate insulating layer, and the first electrode is connected to the second electrode through a via hole. The force sensitive resistive material layers are in contact.

In one embodiment, the array substrate further includes:

a gate formed on the substrate;

a gate insulating layer formed on the substrate and covering the gate;

an active layer formed on the gate insulating layer;

source and drain electrodes formed on the active layer;

a passivation layer formed on the source and drain;

a color resist layer formed on the passivation layer;

a flat layer formed on the color resist layer;

The first electrode and the second electrode are on the same layer, and the second electrode is a common electrode; the first electrode and the second electrode are arranged on the flat layer at intervals, and the force-sensitive resistance material layer Covering the first electrode and the second electrode to connect the first electrode and the second electrode; or the force sensitive resistance material layer is arranged on the flat layer, the first electrode and the second electrode The second electrodes are spaced on the force-sensitive resistance material layer, and are connected through the force-sensitive resistance material layer.

In one embodiment, the material of the force-sensitive resistor material layer is selected from at least one of silicon semiconductors, conductive polymers, and organic insulating materials containing conductive materials.

In one embodiment, the conductive polymer is selected from at least one of polythiophene polymers and polyaniline polymers.

In one embodiment, the conductive material in the organic insulating material is selected from at least one of carbon nanotubes and graphene nanosheets.

In one embodiment, the material of the force-sensitive resistance material layer is selected from organic insulating materials containing conductive materials, and the thickness of the force-sensitive resistance material layer is 200nm-1500nm.

In one embodiment, the conductive material accounts for 40%-60% by volume of the force-sensitive resistance material layer.

In one embodiment, the contact portion between the force-sensitive resistance material layer and the first electrode or the second electrode is provided with a conductive point-shaped material, and the tip of the point-shaped material faces toward the force-sensitive resistance material. layer.

In a second aspect, a display panel is provided, including an array substrate, a color filter substrate disposed opposite to the array substrate, and a liquid crystal layer located between the array substrate and the color filter substrate, the array substrate includes a substrate Bottom and a first electrode and a second electrode formed on the substrate, the first electrode is a pixel electrode, and the second electrode is a common electrode or a ground electrode, wherein the first electrode and the The second electrodes are connected through at least one force-sensitive resistance material layer, and the force-sensitive resistance material layer changes from an insulator or a semiconductor to a conductor after extrusion.

In one embodiment, the array substrate further includes:

a gate formed on the substrate;

a gate insulating layer formed on the substrate and covering the gate;

an active layer formed on the gate insulating layer;

source and drain electrodes formed on the active layer;

a passivation layer formed on the source and drain;

In one embodiment, the array substrate further includes:

a gate formed on the substrate;

a gate insulating layer formed on the substrate and covering the gate;

an active layer formed on the gate insulating layer;

source and drain electrodes formed on the active layer;

a passivation layer formed on the source and drain;

a color resist layer formed on the passivation layer;

a flat layer formed on the color resist layer;

In one embodiment, the conductive material accounts for 45%-55% by volume of the force-sensitive resistance material layer.

In one embodiment, the color filter substrate is provided with a black matrix, and the force-sensitive resistance material layer is disposed opposite to the black matrix.

Beneficial effect

The beneficial effect of the array substrate provided by the embodiment of the present application is that the array substrate is provided with at least one force-sensitive resistance material layer, and the force-sensitive resistance material layer connects the first electrode, which is the pixel electrode, and the second electrode, which is the common electrode or the ground electrode. connection, the resistance value of the force-sensitive resistance material layer decreases with the increase of external force, and when there is no external force, the force-sensitive resistance material layer is an insulator or semiconductor, which does not affect the display effect, because the force-sensitive resistance material layer connects the first electrode and the The second electrode, therefore, the resistance of the force-sensitive resistance material layer becomes smaller after being squeezed and can be changed from an insulator or a semiconductor to a conductor, and the conductive force-sensitive resistance material layer connects the first electrode and the second electrode in a short circuit, thereby avoiding pressure The rearrangement of the liquid crystal molecules in the part can avoid the phenomenon of Trace Mura, and finally improve the quality of the product.

The beneficial effect of the display panel provided by the embodiment of the present application is that the display panel includes the unique array substrate of the present application, and the array substrate is provided with a unique force-sensitive resistance material layer to connect the first electrode and the second electrode, and the force-sensitive resistance material layer After extrusion, the resistance becomes smaller, and the insulator or semiconductor can be changed into a conductor, so that the first electrode and the second electrode are short-circuited and connected, which can avoid the rearrangement of liquid crystal molecules in the pressed part, thereby avoiding the Trace Mura phenomenon, and finally improving The product quality of the display panel.

Description of drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the accompanying drawings that need to be used in the embodiments or exemplary technical descriptions. Obviously, the accompanying drawings in the following descriptions are only for this application. For some embodiments, those skilled in the art can also obtain other drawings based on these drawings without creative efforts.

FIG. 1 is a schematic structural view of an array substrate provided in the first embodiment of the present application;

FIG. 2 is another schematic structural view of the array substrate provided in the first embodiment of the present application;

FIG. 3 is a schematic structural diagram of an array substrate provided in a second embodiment of the present application;

FIG. 4 is a schematic structural diagram of an array substrate provided in a third embodiment of the present application;

FIG. 5 is a schematic structural diagram of a display panel provided by a fourth embodiment of the present application;

FIG. 6 is another schematic structural view of the display panel provided by the fourth embodiment of the present application;

Wherein, each reference sign in the figure:

10-substrate, 11-first electrode, 12-second electrode, 13-force sensitive resistance material layer, 14-gate, 15-gate insulating layer, 16-active layer, 17-source and drain, 18 -passivation layer, 19-color resist layer, 20-planar layer, 21-via hole, 30-liquid crystal layer, 31-liquid crystal molecule, 40-color filter substrate, 41-black matrix.

Embodiments of the present invention

In order to make the purpose, technical solution and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present application, not to limit the present application.

In this application, the term "and/or" describes the association relationship of associated objects, indicating that there may be three relationships, for example, A and/or B may mean: A exists alone, A and B exist simultaneously, and B exists alone Condition. Among them, A and B can be singular or plural. The character "/" generally indicates that the contextual objects are an "or" relationship.

In the present application, "at least one" means one or more, and "multiple" means two or more. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items.

It should be understood that in various embodiments of the present application, the sequence numbers of the above-mentioned processes do not mean the order of execution, and some or all steps may be executed in parallel or sequentially, and the execution order of each process shall be based on its functions and The internal logic is determined and should not constitute any limitation to the implementation process of the embodiment of the present application.

Terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the present application. The singular forms "a", "said" and "the" used in the embodiments of this application and the appended claims are also intended to include plural forms unless the context clearly indicates otherwise.

The terms "first" and "second" are only used for descriptive purposes to distinguish objects such as substances from each other, and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of indicated technical features. For example, without departing from the scope of the embodiments of the present application, the first XX can also be called the second XX, and similarly, the second XX can also be called the first XX. Thus, a feature defined as "first" and "second" may explicitly or implicitly include one or more of these features.

First embodiment:

This embodiment provides an array substrate, as shown in Figure 1 and Figure 2, the array substrate includes:

Substrate 10;

The first electrode 11 is formed on the substrate 10;

The second electrode 12 is formed on the substrate 10;

The first electrode 11 is a pixel electrode, and the second electrode 12 is a common electrode or a ground electrode;

The first electrode 11 and the second electrode 12 are connected through at least one layer of force-sensitive resistance material layer 13, and the force-sensitive resistance material layer 13 changes from an insulator or a semiconductor to a conductor after extrusion.

The array substrate provided in this embodiment is provided with at least one layer of force-sensitive resistance material layer 13, and the force-sensitive resistance material layer 13 connects the first electrode 11, that is, the pixel electrode, and the second electrode 12, that is, the common electrode or the ground electrode. The resistance value of the sensitive resistance material layer 13 decreases with the increase of external force. When there is no external force, the force sensitive resistance material layer 13 is an insulator or semiconductor, which does not affect the display effect, because the force sensitive resistance material layer 13 is connected to the first electrode and The second electrode, therefore, when the force-sensitive resistance material layer 13 is extruded, the resistance becomes smaller and can be changed from an insulator or a semiconductor to a conductor, and the conductive force-sensitive resistance material layer 13 connects the first electrode 11 and the second electrode 12 by short-circuiting, Thereby, the high voltage difference between the first electrode 11 and the second electrode 12 at the pressed position can be eliminated, and liquid crystal molecule rearrangement at the pressed position can be avoided, so that Trace Mura phenomenon can be avoided, and the quality of the product can be finally improved.

In this embodiment, the first electrode 11 and the second electrode 12 may be on the same layer, located on the same side of the force-sensitive resistance material layer 13, and the force-sensitive resistance material layer 13 may be located on the first electrode 11 and the second electrode 12, 13 It can also be located under the first electrode 11 and the second electrode 12; as shown in FIG. , at this time the second electrode 12 may be a common electrode. Of course, the first electrode 11 and the second electrode 12 can be in different layers, respectively located on both sides of the force-sensitive resistance material layer 13, as shown in Figure 2, the force-sensitive resistance material layer 13 is between the first electrode 11 and the second electrode 12 The first electrode 11 and the second electrode 12 are connected, and the second electrode 12 may be a common electrode or a ground electrode.

Specifically, the array substrate provided in this embodiment is an array substrate used for liquid crystal display panels. The material of the force-sensitive resistance material layer 13 on the array substrate has force-sensitive resistance properties, and its resistance value changes with the change of external force. Specifically, the resistance of the force-sensitive resistor material decreases as the force increases, and the external force makes the force-sensitive resistor material layer 13 change from a non-conductive insulator or semiconductor to a conductor, so that the first electrode will 11 is in communication with the second electrode 12, so as to avoid rearrangement of the liquid crystal molecules at the pressing part of the display panel, avoid Trace Mura, and improve product quality.

It should be noted that the force or pressure mentioned in this application generally refers to the external force that can generate Mura at present, and there is a corresponding threshold. When there is no external force or the external force received is less than the threshold, the force-sensitive resistor material layer 13 in the array substrate of the embodiment of the present application is a non-conductive insulator or semiconductor; when the external force is greater than or equal to the threshold, the force-sensitive resistor The material layer 13 changes from an insulator or a semiconductor to a conductor, and when the external force is removed again, it will be insulated again; this will not affect the display effect of the display panel in normal use, and can avoid the Trace Mura phenomenon.

Specifically, the material of the force-sensitive resistance material layer 13 on the array substrate is selected from at least one of silicon semiconductors, conductive polymers, and organic insulating materials containing conductive materials. Wherein, the conductive polymer is a polymer formed by chemical polymerization of conductive monomers and some resinous monomers, specifically at least one selected from polythiophene polymers and polyaniline polymers. The above-mentioned silicon semiconductor and conductive polymer have force-sensitive resistance properties. After the force-sensitive resistance material layer 13 of this application is made, it will not conduct electricity when it is not squeezed, and it will become a conductor when it receives an external force of a certain threshold.

In the above-mentioned organic insulating material containing conductive material, the conductive material is selected from at least one of carbon nanotubes and graphene nanosheets, and the graphene nanosheets and carbon nanotubes are dispersed in the organic insulating material. Wherein, the organic insulating material may be polytetrafluoroethylene, silicone rubber, acrylic resin, and the like. It is an insulator when it is not extruded, and when the force-sensitive resistor material layer 13 acts on a certain threshold of external force, the conductive material parts therein contact each other so that the force-sensitive resistor material layer 13 changes from an insulator to a conductor.

Specifically, the thickness of the force sensitive resistance material layer 13 is 200nm-1500nm. In the force-sensitive resistor material layer 13 , the size of the dispersed carbon nanotubes may be 2nm×100nm˜100nm×1 μm, and the size of the graphene nanosheets may be 2nm×200nm˜20nm×1 μm. However, the force-sensitive resistance material layer 13 with a thickness of 200nm-1500nm is more likely to conduct electricity after a certain threshold of external force acts on it. Further, the conductive material (such as carbon nanotubes or graphene nanosheets) in the force-sensitive resistance material layer 13 accounts for 40% to 60% by volume of the force-sensitive resistance material layer 13, and further accounts for 45% to 60% by volume. 55%. Under the above-mentioned volume ratio conditions, the force-sensitive resistance material layer 13 can better realize the contact of the conductive material under pressure, so as to become a conductor. It should be noted that the nanoscale material mentioned in this application may refer to a material with a size between 1 nm and 1000 nm.

Specifically, the contact portion between the force-sensitive resistor material layer 13 and the first electrode 11 is provided with a conductive tip structure, and the tip of the tip structure faces the force-sensitive resistor material layer 13 . Alternatively, the contact portion between the force-sensitive resistor material layer 13 and the second electrode 12 is conductively provided with a conductive tip structure, and the tip of the tip structure faces the force-sensitive resistor material layer 13 . Specifically, the tip structure is a layer of conductive tip-shaped material, which is arranged between the force-sensitive resistor material layer 13 and the first electrode 11 or the second electrode 12 , and the tip of the tip structure faces the force-sensitive resistor material layer 13 . When the force-sensitive resistance material layer 13 is pressed by an external force, the conductive material is at least partially in contact with each other so that the force-sensitive resistance material layer 13 is changed from an insulator to a conductor, and the tip structure can pierce the surface of the force-sensitive resistance material layer 13 at the same time. The contact conduction can further increase the conductivity between the force-sensitive resistance material layer 13 and the first electrode 11 or the second electrode 12 .

Second embodiment:

This embodiment provides an array substrate, as shown in Figure 3, the array substrate also includes:

Substrate 10;

a gate 14 formed on the substrate 10;

a gate insulating layer 15, formed on the substrate 10 and covering the gate 14;

an active layer 16 formed on the gate insulating layer 15;

The source and drain electrodes 17 are formed on the active layer 16;

a passivation layer 18 formed on the source and drain electrodes 17;

The first electrode 11 and the second electrode 12 have different layers, the first electrode 11 is located on the passivation layer 18, the second electrode 12 is located between the substrate 10 and the gate insulating layer 15, and between the first electrode 11 and the passivation layer 18 A layer of force-sensitive resistance material layer 13 is provided between them, and a layer of force-sensitive resistance material layer 13 is provided between the second electrode 12 and the gate insulating layer 15. The resistive material layer 13 is in contact. Wherein, the first electrode 11 is a pixel electrode, and the force-sensitive resistance material layer 13 on the passivation layer 18 can connect the sub-pixel electrodes; the second electrode 12 is a common electrode or an electrode to ground, and the force-sensitive resistance on the second electrode 12 The material layer 13 can communicate with the first electrode 11 and the second electrode 12 , so that each sub-pixel electrode can communicate with the second electrode 12 . When the force-sensitive resistive material layer 13 is subjected to an external force of a certain threshold, it becomes a conductor, and the conductive force-sensitive resistive material layer 13 connects the first electrode 11 and the second electrode 12, so that the extrusion position connects the pixel electrode and the common electrode or The ground electrode is short-circuited to eliminate the high pressure difference between the two electrodes at the squeezed position, so that more pixel unit areas can avoid the rearrangement of liquid crystal molecules at the pressed position, avoid the Trace Mura phenomenon, and ultimately improve the quality of the product. Wherein, the material and thickness options of the force sensitive resistance material layer 13 of the first embodiment can be used in the array substrate shown in FIG. 3 .

Third embodiment:

The array substrate provided in this embodiment is a COA (Color Filter On Array) substrate, and the color-resist layer is integrated and manufactured on one side of the array substrate. Specifically, as shown in FIG. 4 , the array substrate also includes:

Substrate 10;

a gate 14 formed on the substrate 10;

an active layer 16 formed on the gate insulating layer 15;

The source and drain electrodes 17 are formed on the active layer 16;

a passivation layer 18 formed on the source and drain electrodes 17;

The color resist layer 19 is formed on the passivation layer 18;

a flat layer 20 formed on the color resist layer 19;

The first electrode 11 and the second electrode 12 are on the same layer, the first electrode 11 is a pixel electrode, and the second electrode 12 is a common electrode; the first electrode 11 and the second electrode 12 are arranged on the flat layer 20 at intervals, and the force-sensitive resistance material layer 13 covers the first electrode 11 and the second electrode 12 to connect the first electrode 11 and the second electrode 12 . Such a structure is not only beneficial to the preparation of the force-sensitive resistance material layer 13, and the process is simple, but also becomes a conductor when the force-sensitive resistance material layer 13 is subjected to an external force of a certain threshold value, and the conductive force-sensitive resistance material layer 13 connects the first electrode 11 with the first electrode 11. The second electrode 12 is connected and conducted, so that the squeezed position short-circuits the pixel electrode and the common electrode, thereby avoiding rearrangement of liquid crystal molecules at the pressed position, avoiding Trace Mura phenomenon, and finally improving the quality of the product. Wherein, the material and thickness options of the force sensitive resistance material layer 13 of the first embodiment can be used in the array substrate shown in FIG. 4 .

In addition, the force-sensitive resistance material layer 13 can also be disposed on the planar layer 20 , while the first electrode 11 and the second electrode 12 are spaced apart on the force-sensitive resistance material layer 13 , and the connection is realized through the force-sensitive resistance material layer 13 .

Fourth embodiment:

This embodiment provides a display panel. As shown in FIG. 5 and FIG. 6 , the display panel includes: an array substrate, a color filter substrate 40 disposed opposite to the array substrate, and a liquid crystal layer located between the array substrate and the color filter substrate 40 30. Specifically, the array substrate includes: a substrate 10, a first electrode 11 and a second electrode 12 formed on the substrate 10; the first electrode 11 is a pixel electrode, and the second electrode 12 is a common electrode or a ground electrode; The first electrode 11 and the second electrode 12 are connected through at least one layer of force-sensitive resistance material layer 13, and the force-sensitive resistance material layer 13 changes from an insulator or a semiconductor to a conductor after extrusion.

Wherein, the first electrode 11 and the second electrode 12 can be in the same layer, located on the same side of the force-sensitive resistance material layer 13, as shown in Figure 5; of course, the first electrode 11 and the second electrode 12 can be in different layers, respectively located in the force-sensitive resistance material layer 13. The two sides of the sensitive resistive material layer 13 are shown in FIG. 6 .

The display panel provided in this embodiment includes the unique array substrate of the embodiment of the present application, the array substrate is provided with a unique force-sensitive resistance material layer 13 to connect the first electrode 11 and the second electrode 12, and the force-sensitive resistance material layer 13 is squeezed After the resistance becomes smaller, the insulator or semiconductor can be changed into a conductor, so that the first electrode 11 and the second electrode 12 are short-circuited, so that the rearrangement of the liquid crystal molecules 31 in the liquid crystal layer 30 at the pressured part can be avoided, thereby avoiding Trace The Mura phenomenon ultimately improves the product quality of the display panel.

Specifically, the color filter substrate 40 of the display panel is provided with a black matrix 41 , and the force sensitive resistance material layer is arranged opposite to the black matrix 41 . The force-sensitive resistance material is generally a transparent material, and the light-shielding effect is small. However, as in the embodiment of the present application, the force-sensitive resistance material layer 13 is set opposite to the black matrix 41, which can further reduce the light-shielding effect, so that the display panel has a better display effect. .

Specifically, the display panel provided in the embodiment of the present application can be provided with the array substrates provided in the first embodiment, the second embodiment, and the third embodiment, therefore, the optional schemes of the above array substrates can all be used in this In the display panel, the display panel has all the advantages of the array substrate provided by the above embodiments, which will not be repeated here.

The above are only optional embodiments of the application, and are not intended to limit the application. For those skilled in the art, various modifications and changes may occur in this application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present application shall be included within the scope of the claims of the present application.

Claims

An array substrate, comprising a substrate and a first electrode and a second electrode formed on the substrate, the first electrode is a pixel electrode, and the second electrode is a common electrode or a ground electrode, wherein the The first electrode and the second electrode are connected through at least one force-sensitive resistance material layer, and the force-sensitive resistance material layer changes from an insulator or a semiconductor to a conductor after extrusion.
The array substrate according to claim 1, wherein the array substrate further comprises:

a gate formed on the substrate;

a gate insulating layer formed on the substrate and covering the gate;

an active layer formed on the gate insulating layer;

source and drain electrodes formed on the active layer;

a passivation layer formed on the source and drain;

The first electrode is located on the passivation layer, the second electrode is located between the substrate and the gate insulating layer, and a layer of the passivation layer is provided between the first electrode and the passivation layer. The force-sensitive resistance material layer, a layer of the force-sensitive resistance material layer is provided between the second electrode and the gate insulating layer, and the first electrode is connected to the second electrode through a via hole. The force sensitive resistive material layers are in contact.
The array substrate according to claim 1, wherein the array substrate further comprises:

a gate formed on the substrate;

a gate insulating layer formed on the substrate and covering the gate;

an active layer formed on the gate insulating layer;

source and drain electrodes formed on the active layer;

a passivation layer formed on the source and drain;

a color resist layer formed on the passivation layer;

a flat layer formed on the color resist layer;

The first electrode and the second electrode are on the same layer, and the second electrode is a common electrode; the first electrode and the second electrode are arranged on the flat layer at intervals, and the force-sensitive resistance material layer Covering the first electrode and the second electrode to connect the first electrode and the second electrode; or the force sensitive resistance material layer is arranged on the flat layer, the first electrode and the second electrode The second electrodes are spaced on the force-sensitive resistance material layer, and are connected through the force-sensitive resistance material layer.
The array substrate according to claim 1, wherein the material of the force sensitive resistance material layer is selected from at least one of silicon semiconductors, conductive polymers, and organic insulating materials containing conductive materials.
The array substrate according to claim 4, wherein the conductive polymer is selected from at least one of polythiophene polymers and polyaniline polymers.
The array substrate according to claim 4, wherein the conductive material in the organic insulating material is at least one selected from carbon nanotubes and graphene nanosheets.
The array substrate according to claim 1, wherein the material of the force-sensitive resistance material layer is selected from organic insulating materials containing conductive materials, and the thickness of the force-sensitive resistance material layer is 200 nm to 1500 nm.
The array substrate according to claim 7, wherein the volume percentage of the conductive material in the force sensitive resistance material layer is 40%-60%.
The array substrate according to claim 7, wherein the contact portion between the force-sensitive resistance material layer and the first electrode or the second electrode is provided with a conductive point-shaped material, and the point of the point-shaped material faces The force sensitive resistance material layer.
A display panel, comprising an array substrate, a color filter substrate disposed opposite to the array substrate, and a liquid crystal layer located between the array substrate and the color filter substrate, the array substrate includes a substrate and is formed on the The first electrode and the second electrode on the substrate, the first electrode is a pixel electrode, and the second electrode is a common electrode or a ground electrode, wherein the first electrode and the second electrode pass through at least A layer of force-sensitive resistor material is connected, and the force-sensitive resistor material layer changes from an insulator or a semiconductor to a conductor after being extruded.
The display panel according to claim 10, wherein the array substrate further comprises:

a gate formed on the substrate;

a gate insulating layer formed on the substrate and covering the gate;

an active layer formed on the gate insulating layer;

source and drain electrodes formed on the active layer;

a passivation layer formed on the source and drain;

The first electrode is located on the passivation layer, the second electrode is located between the substrate and the gate insulating layer, and a layer of the passivation layer is provided between the first electrode and the passivation layer. The force-sensitive resistance material layer, a layer of the force-sensitive resistance material layer is provided between the second electrode and the gate insulating layer, and the first electrode is connected to the second electrode through a via hole. The force sensitive resistive material layers are in contact.
The display panel according to claim 10, wherein the array substrate further comprises:

a gate formed on the substrate;

a gate insulating layer formed on the substrate and covering the gate;

an active layer formed on the gate insulating layer;

source and drain electrodes formed on the active layer;

a passivation layer formed on the source and drain;

a color resist layer formed on the passivation layer;

a flat layer formed on the color resist layer;

The first electrode and the second electrode are on the same layer, and the second electrode is a common electrode; the first electrode and the second electrode are arranged on the flat layer at intervals, and the force-sensitive resistance material layer Covering the first electrode and the second electrode to connect the first electrode and the second electrode; or the force sensitive resistance material layer is arranged on the flat layer, the first electrode and the second electrode The second electrodes are spaced on the force-sensitive resistance material layer, and are connected through the force-sensitive resistance material layer.
The display panel according to claim 10, wherein the material of the force-sensitive resistive material layer is at least one selected from silicon semiconductors, conductive polymers, and organic insulating materials containing conductive materials.
The display panel according to claim 13, wherein the conductive polymer is at least one selected from polythiophene polymers and polyaniline polymers.
The display panel according to claim 13, wherein the conductive material in the organic insulating material is at least one selected from carbon nanotubes and graphene nanosheets.
The display panel according to claim 10, wherein the material of the force-sensitive resistance material layer is selected from organic insulating materials containing conductive materials, and the thickness of the force-sensitive resistance material layer is 200 nm˜1500 nm.
The display panel according to claim 16, wherein the conductive material accounts for 40%-60% by volume of the force-sensitive resistor material layer.
The display panel according to claim 17, wherein the volume percentage of the conductive material in the force-sensitive resistance material layer is 45%-55%.
The display panel according to claim 16, wherein the contact portion between the force-sensitive resistance material layer and the first electrode or the second electrode is provided with a conductive point-shaped material, and the point of the point-shaped material faces The force sensitive resistance material layer.
The display panel according to claim 10, wherein the color filter substrate is provided with a black matrix, and the force sensitive resistance material layer is arranged opposite to the black matrix.