WO2023060865A1 - Encoding method and device, and decoding method and device - Google Patents

Abstract

Provided in the embodiments of the present application are an encoding method and a decoding method. The encoding method comprises: encoding an original data stream to generate a forward error correction (FEC) code block, which comprises a plurality of data code blocks, first overhead code blocks and second overhead code blocks, wherein the FEC code block comprises N rows, the first overhead code blocks are located in each of the N rows of the FEC code block, the second overhead code blocks are located in M rows of the FEC code block, M is less than or equal to N, and M and N are integers greater than 0; and sending the FEC code block. By means of the method, a spatially coupled forward error correction code can be enhanced, and an error floor is lowered, thereby realizing the application of a spatially coupled code in a communication transmission scenario having a low delay, high throughput and a high rate.

Description

Codec method and codec device

This application claims the priority of a foreign patent application with application number 2021130126 entitled "Coding method and codec device" filed at Rospatent on October 15, 2021, and claims on November 29, 2021 Priority of a foreign patent application with application number 2021134795 entitled "Coding method and coding device" filed at Rospatent Federal Institute of Intellectual Property, the entire content of which is incorporated in this application by reference.

technical field

The present application relates to the field of optical communication, and more specifically, to a codec method and a codec device.

Background technique

With the development of digital communication systems and the increase of communication channel data rates, it is inevitable that a large number of transmission errors will increase. Therefore, the forward error correction code (forward error correction, FEC) has become the focus of attention due to the point of reducing the number of transmission errors. However, FEC code design for modern data transmission systems is a challenging task as it must simultaneously provide high performance, low latency, and low power consumption, etc.

Currently, the structure of spatially coupled error correction codes (spatially coupled error correction code, SC ECC) has limitations in its characteristics, resulting in very limited technologies for reducing the error floor, which cannot meet the requirements of low delay, high speed, and low bit error. High-rate communication scenarios.

Therefore, how to reduce the error floor and enhance the spatially coupled forward error correction code, so as to realize the application of the spatially coupled code in low-delay, high-throughput, and high-speed communication transmission scenarios is an urgent problem to be solved.

Contents of the invention

The embodiment of the present application provides a codec method and codec device, which can reduce the error floor and enhance the spatially coupled forward error correction code, so as to realize the spatially coupled code in the low-delay, high-throughput, high-speed communication transmission scenario in the application.

In a first aspect, an encoding method is provided, including: encoding an original data stream to generate a forward error correction (FEC) code block, where the FEC code block includes a plurality of data code blocks, a first overhead code block, and a second overhead code block, wherein the FEC code block includes N rows, the first overhead code block is located in each of the N rows of the FEC code block, the second overhead code block is located in M rows of the FEC code block, and M is less than or equal to N, M and N is an integer greater than zero; send the FEC code block.

In a second aspect, a decoding method is provided, including: receiving a forward error correction FEC code block; decoding the FEC code block to restore the original data stream, the FEC code block includes a plurality of data code blocks, a first overhead code block and a second overhead code block, wherein the FEC code block includes N rows, the first overhead code block is located in each of the N rows of the FEC code block, and the second overhead code block is located in M rows of the FEC code block, and M is less than or equal to N, M and N are integers greater than zero.

Exemplarily, in the embodiment of the present application, the currently transmitted FEC code block is based on the structure of the existing spatially coupled code, coupled with a generalized error location code (generalized error location codes, GEL) code to generate additional redundancy, as Each row generates the original redundancy of the existing spatially coupled code.

Specifically, the currently transmitted FEC code block is based on the structure of the spatially coupled code, and coupled with the GEL code to generate original redundancy and additional redundancy. Among them, the original redundancy can be generated by the inner code B ₁ of the GEL code according to the complete GEL codec method; or, the original redundancy can be generated by the component code B of the original space-coupled code according to the partial GEL codec method, which exists in Each row of the FEC code block, and each row of the FEC code block is half of the codeword B. Additional redundancy is generated by the outer code _A2 of the GEL, present in some rows of the FEC code block. The FEC code block includes s matrices of n rows and h columns arranged in h rows and h columns of matrices. The FEC code block contains k ₂ ·h+K·m ₂ payload bits (ie, bits of the original data stream), m ₁ ·h bits of original overhead and (hK)·m ₂ bits of overhead.

Wherein, s, h, n, m ₁ , k ₂ , K, and m ₂ are all positive integers.

Optionally, the second overhead code block may occupy some bits in any one data code block of the multiple data code blocks. For example, the second overhead code block is a matrix located in rows 14-15 and columns 7-14 of the seventh code block, which is not specifically limited in the present application.

It should be noted that the first overhead code block of the space-coupled code in this implementation is generated by the GEL inner code B ₁ (that is, according to the complete GEL encoding and decoding method), or the first overhead code block is generated by the original space The component code B of the coupled code is generated (that is, according to a partial GEL encoding and decoding mode); the second overhead code block is generated by re-encoding the encoding result of the inner code with the outer code of the GEL.

In this implementation, additional redundancy (eg, a second overhead code block) provides increased error correction capability, which is beneficial for reducing the error floor and providing faster convergence.

In this embodiment of the application, "overhead symbol", "redundant symbol" and "check symbol" can be replaced in non-specific cases, and "overhead code block" can include "overhead symbol" and "redundant symbol" , "check symbol", etc., "code block" and "matrix" can be replaced by each other in non-specific cases, or in other words, a code block is composed of a matrix. Wherein, one symbol may correspond to multiple bits, one code block may include multiple symbols, and a code block includes multiple bits or multiple symbols, which is not specifically limited in this application.

Exemplarily, the original data stream may include multiple bits, symbols, etc., which are not specifically limited in this application.

According to the scheme provided by this application, by adding additional overhead (for example, based on generalized error location codes (generalized error location codes, GEL), (generalized concatenated code, GCC), tensor product and generalized integrated interleaved (generalized integrated interleaved, GII) Any kind of codeword generation) to obtain subcodes of the original code with better properties (ie, larger minimum Hamming distance), as well as new features that provide performance improvements and reduce error decoding. Based on the structure of the original space-coupled codes (for example, open forward error correction (OFEC), by introducing additional overhead, a suitable new space-coupled code is designed to allow low-complexity decoding The application of FEC codewords with process and low error level in low-latency, high-throughput, high-speed communication transmission scenarios.

In combination with the first or second aspect, in some implementations, any code word in the general error position GEL code, the general concatenated code GCC, the tensor product and the general integrated interleaving GII code is selected as the component of the spatially coupled code codes to generate a first overhead code block and a second overhead code block.

In combination with the first or second aspect, in some implementations, when the second overhead code block is generated according to the codeword C _GEL of the GEL code, the check matrix H _B of the C _GEL is used to check the column code of the GEL code The second overhead code block is generated by encoding the row codes of the first parity check matrix, and the first parity check matrix is determined according to the product of the sub-matrix of the H _B and the sub-matrix of the GEL code.

Among them, GEL codes are a class of block codes with good properties. The H _B matrix used to generate column code check symbols in GEL codes is a check matrix of 2·n×2·n, the check matrix H 1 of B ₁ in rows k+1 to 2·n, and the check matrix H ₁ of k ₂ + Lines 1 to k are H ₂ , and H ₁ and H ₂ constitute the parity check matrix of B ₂ . The first to k ₂ rows of H ₃ include a k ₂ ×k ₂ identity matrix and a 2·nk ₂ zero matrix.

Specifically, before GEL encoding, there is only payload data in the GEL code matrix. The m ₂ ×(hK) matrix determined by the k ₂ +1 to k th columns to k th columns is 0 before encoding, and is used to store the second overhead after encoding. The matrix determined in rows k+1 to 2·n is all 0s before encoding, and is used to store the first overhead after encoding.

Wherein, h, n, m ₁ , k ₂ , K, k, and m ₂ are all positive integers.

In the embodiment of this application, there are two encoding methods of the component code GEL. The first one is to use the complete GEL code C _GEL encoding method for encoding, using the code from the historical code block

and k ₂ ·h+K·m ₂ payload bits to generate all m ₁ ·h+(hK)·m ₂ check bits (ie, original overhead + additional overhead).

It should be understood that before the encoding of the current payload data, the transposition of the selected corresponding sub-matrix from the transmitted s different FEC code blocks constitutes

That is, the historical code block.

The second is to use GEL codes. The encoding process of _{the GEL} part generates overhead, using blocks from historical code blocks

bits, k ₂ ·h+K·m ₂ payload bits, and m ₂ ×(hK) overhead, the original space-coupled code component code encoding method is used to generate m ₁ ·h-bit original overhead.

Specifically, after the H _B matrix is multiplied by the GEL code matrix, the 1st to k ₂ keep the original values, and the k ₂ + 1 to kth rows get the first parity check matrix of the column code, and then the first parity check matrix of the column code is performed

Encoding, putting the generated parity check matrix into the m ₂ ×(hK) matrix determined by the k ₂ +1 to kth rows and k to h columns of the GEL code matrix, as the second overhead generation method. At this time, the inner code B ₁ (that is, the component code B of the original space-coupled code) is encoded for each column of the 1st to k rows, and the resulting check bits are put into the k+1 to 2·n rows as the first overhead .

Among them, h represents the number of codeword symbols after encoding, K represents the number of payload symbols before encoding, and D represents the minimum Hamming distance after encoding.

In combination with the first or second aspect, in some implementations, when the component code A _i of the spatially coupled code is a GEL code, the component code A _i includes a historical code block C _i , a plurality of data code blocks, a first overhead code block and the second overhead code block.

It should be noted that, in the embodiment of the present application, the historical code block C _i may refer to a code block before the current FEC code block to be transmitted. Among them, the historical code block C _i can be understood as

transmitted in sequence.

It should be understood that one of the cores of the encoding method of the space-coupled code is to construct the code block to be encoded of the component code A _i at the current moment, where i is an integer greater than or equal to 0.

In combination with the first or second aspect, in some implementations, when the second overhead code block is generated according to the code word C _GEL of the GEL code, the component code is a GEL code; wherein, C _GEL is composed of 4 inner codes and The matrix of 2·n rows and h columns of 3 outer codes, the code length of the inner code and the code length of the outer code are 2·n and h respectively, and the inner code B ₀ of C _GEL is the identity code word [2·n, 2·n,1] ₂ , B ₁ is the codeword [2·n,k,d] ₂ , B ₂ is the codeword [2·n,k ₂ ,d ₂ ] ₂ , B ₃ is the all-zero codeword, The outer code A ₁ of C _GEL is the Galois Field

The all-zero codeword on A ₂ is the Galois Field

codeword on

A ₃ is Galois field

identity codeword on

m ₁ =2·nk, m ₂ =kk ₂ , m ₃ =k ₂ .

Among them, 2·n is the number of bits contained in the encoded codewords of B ₀ , B ₁ , and B ₃ , and 2·n, k, and k ₂ are respectively contained in the codewords of B ₀ , B ₁ , and B ₃ The number of bits, 1, d and d ₂ are the minimum Hamming distances of the encoded codewords of B ₀ , B ₁ and B ₃ respectively. h is the number of symbols contained in the encoded codewords of _A2 and _A3 , and K and h are the number of symbols contained in the codewords before and after _A2 and _A3 encoding respectively. m ₁ , m ₂ , m ₃ represent the number of bits contained in the symbols in A ₁ , A ₂ and A ₃ codewords respectively (or, they can also represent the extended field GF(2 ^m1 ) of GF(2), GF (2 ^m2 ), the dimensions of the elements in GF(2 ^m3 ) under the vector representation).

In combination with the first or second aspect, in some implementations, the historical code block includes n×h bits, and the multiple data code blocks include k ₂ h+K m ₂ bits of the original data stream (that is, payload bits ), the first overhead code block includes m ₁ ×h bits of original overhead, and the second overhead code block includes (hK)·m ₂ bits of additional overhead.

In combination with the first or second aspect, in some implementations, when sending the FEC code block, the generated semi-infinite sequence is

Among them, V _i is a binary matrix with h rows and n columns, and V _i includes s square matrices with h rows and h columns (V _i,0 V _i,1 ... V _i,s-1 ), s=n/ h, s, h and n are integers greater than 0;

When i=0,1,2,...,N ₀ , the matrix V _i is an all-zero matrix with h rows and n columns;

When i>N ₀ , the component code in the space coupling code is a GEL code, and the GEL code is

The code word of each column in the GEL code is the component code B[2 n, k, d] ₂ of the original space coupling code (for example, OFEC code block);

Among them, V ^T is the transpose of matrix V, N ₀ is a non-negative integer determined according to the coupling mode of space-coupled codes, π _i,k (V) is determined after rearranging matrix V according to any rearrangement rules , k=0,1,2,...,s-1.

It should be noted that the continuously sent FEC code blocks constitute a semi-infinite sequence, and one FEC code block includes N rows and K columns, and the corresponding semi-infinite sequence includes N rows and infinitely many columns.

In combination with the first or second aspect, in some implementations, the semi-infinite sequence V is the bit sum of the first overhead code block generated based on the bits of the historical code block and the bits of the original data stream according to the encoding method of the GEL code Bits of the second overhead code block.

Specifically, the semi-infinite sequence V is based on historical code blocks

bits and k ₂ ·h+K·m ₂ payload bits to generate all m ₁ ·h+(hK)·m ₂ original overhead and additional overhead.

In combination with the first or second aspect, in some implementations, the semi-infinite sequence V is the bits of the second overhead code block generated based on the bits of the historical code block and the bits of the original data stream according to the encoding method of the GEL code, and the bits of the first overhead code block generated based on the bits of the second overhead code block.

Specifically, the semi-infinite sequence V is based on historical code blocks

bits, k ₂ ·h+K·m ₂ payload bits and m ₂ ×(hK) overhead to generate m ₁ ·h bits of original overhead.

In combination with the first or second aspect, in some implementations, when the component code of the spatial coupling code is a GEL code, and the spatial coupling structure is similar to open FEC, the FEC code block V _i is a sub-matrix for the component code A _i A' _i transpose (A' _i ) rearrangement of ^T , wherein, the component code A _i is a matrix of 256 rows and 16 columns, and the sub-matrix A' _i is the rear 128 row and 16 column matrix of A _i , and the component code A _i includes Historical code block C _i , a plurality of data code blocks and the first overhead code block, V _i includes 8 sub-matrices V _i,t (r,c) of 16 rows and 16 columns arranged in a row-wise matrix of 16 rows and 128 columns , i is the row number of the FEC code block, t is the column number of the FEC code block, r and c are the row number and column number of the sub-matrix V _i,t (r,c) respectively, and t is greater than or equal to 0 and less than or an integer equal to 7, i is an integer greater than or equal to 0, r and c are integers greater than 0 and less than or equal to 15.

In combination with the first or second aspect, in some implementations, when the component code A _i of the spatial coupling code is a GEL code, and the spatial coupling structure is similar to open FEC, the code word C of the GEL code and _{the GEL} inner code B ₀ are Identity code word [256,256,1] ₂ , B ₁ is extended BCH code word [256,239,6] ₂ , B ₂ is extended BCH code word [256,231,8] ₂ , m ₁ =17, m ₂ =8, m ₃ = 231, the code word C of GEL code A ₁ of _GEL outer code is the all-zero code word on GF(2 ¹⁷ ), and A ₂ is the cyclic RS code on GF(2 ⁸ )

A ₃ is the identity codeword on GF(2 ²³¹ )

For example, for space-coupled code h=16, s=8, N ₀ =15+2·g, when i>N ₀ , i _j =i+2·(jg)+(-1) ⁱ -16, j =0,1,2,...,7; for another example, h=16, s=8, N ₀ =g+7 of the space-coupled code, when i>N ₀ , i _j =i+jg-8 , j=0,1,2,...,7.

In combination with the first or second aspect, in some implementations, the sub-matrix A' _i transpose (A' _i ) ^T of the component code A _i is a plurality of data code blocks, the first overhead code block and the second overhead code The transposition of the block, (A′ _i ) ^T includes 8 sub-matrices of 16 rows and 16 columns (A' _i,t (r,c)) ^T is a matrix of 16 rows and 128 columns arranged in the row direction, where r and c is the row number and column number of sub-matrix (A' _i,t (r,c)) ^T respectively, t is an integer greater than or equal to 0 and less than or equal to 7, i is an integer greater than or equal to 0, r and c is an integer greater than or equal to 0 and less than or equal to 15.

Wherein, A' _{i, t} (t=0,1,2...7) represent respectively the 129th～144th lines, the 145th～160th lines, ... the 225th～240th lines of the component code code words of 256 lines and 16 columns in size, A matrix with 16 rows and 16 columns composed of rows 241 to 256.

In combination with the first or second aspect, in some implementations, the second overhead code block is located at (A′ _i,6 (r,c)) ^T , where r is an integer greater than or equal to 14 and less than or equal to 15 , c is an integer greater than or equal to 7 and less than or equal to 14, the first overhead code block is located at (A′ _i,6 (r,c ₁ )) ^T and (A′ _i,7 (r,c ₂ )) ^T , r is an integer greater than or equal to 0 and less than or equal to 15, c ₁ is 15, and c ₂ is an integer greater than or equal to 0 and less than or equal to 15.

In combination with the first or second aspect, in some implementations, the historical code block C _i includes eight 16-row and 16-column sub-matrices C _{i, t} arranged in a column-wise 128-row and 16-column matrix, when the FEC code block When i in V _i is an even number, select the j-th 16-row 16-column matrix V i-19+2*j, j of the historical FEC code block _{with the serial number i-19+2*j, and} then transpose and rearrange Transpose to obtain C _{i, j} in the historical code block; when i in the FEC code block V _i is an odd number, select the jth 16th row 16 of the historical FEC code block with the sequence number i-21+2*j The column matrix V _i-21+2*j,j is transposed and rearranged and then transposed to obtain C _i,j in the historical code block.

In combination with the first or second aspect, in some implementations, the historical code block C _i includes eight 16-row and 16-column sub-matrices C _{i, t} arranged in a column-wise 16-row and 128-column matrix, and the FEC code block V _i select the j-th 16-row 16-column matrix V _{i-27+j, j of the historical FEC code block with the serial number i-27+j} to transpose and rearrange and then transpose to obtain C _i in the historical code block _,j .

In combination with the first or second aspect, in some implementations, when the original space coupling code is a structure similar to open FEC, and the second overhead code block is generated based on the GEL code encoding method, the data code block is the same as the second overhead code block The code block constitutes a code block with 16 rows and 111 columns (among them, columns 103-110 (serial numbers start from 0) of rows 14-15 (serial numbers start from 0) are the second overhead code blocks, and the rest are original data ), the first overhead code block is an encoding information matrix with 16 rows and 17 columns. After rearranging the bits (or symbols) in the data code block, the first overhead code block and the second overhead code block, an encoded FEC code block can be obtained.

Wherein, the first overhead code block is at the same position as the OFEC overhead code block, and the second overhead code block is at a part of the OFEC original data code block.

In combination with the first or second aspect, in some implementations, when the original space coupling code is an open forward error correction OFEC code, and the second overhead code block is generated based on the GEL code encoding method, the rearrangement rule definition of π as follows:

in,

Indicates the XOR of i and j. The following table corresponds to the above rules. The numbers in the table indicate the element at the current position of the rearranged matrix, which is the element corresponding to the column of the same row of the original matrix W. Wherein, ω _{i, j} represent the elements of row i and column j in a matrix W with 16 rows and 16 columns, and i and j are integers greater than or equal to 0 and less than or equal to 15, respectively.

It should be understood that the above rearrangement rule π is only an exemplary description, and should not constitute any limitation to the technical solution of the present application.

In combination with the first or second aspect, in some implementations, when the original spatial coupling code is an open forward error correction OFEC code, and the second overhead code block is generated based on the GEL code encoding method, the FEC code block V is composed _of Eight rearranged sub-matrixes B _t are determined, i represents the serial number of the FEC code block, V _i,t represents the t-th sub-matrix B _t with 16 rows and 16 columns, and t is greater than or equal to 0 and less than or equal to 7 integer.

In combination with the first or second aspect, in some implementations, when the original space coupling code is an open forward error correction OFEC code, and the second overhead code block is generated based on the GEL code encoding method, the GEL code is 256 A matrix block with 16 rows and 16 columns, wherein, the matrix block of the 0-127 row is determined from the historical FEC code block, the matrix block of the 128-230 row is a data code block, and the first 14 columns of the matrix block of the 231-238 row are For the data code block, the second overhead code block occupies the last two columns of the matrix block in rows 231-238 of the GEL code, and the first overhead code block is located in rows 239-255.

It should be understood that the above is only an exemplary description, and should not be construed as any limitation to the technical solution of the present application.

In a third aspect, an encoding device is provided, including: a processing unit, configured to encode an original data stream to generate a forward error correction (FEC) code block, the FEC code block includes a plurality of data code blocks, a first overhead code block and a second overhead code block, wherein the FEC code block includes N rows, the first overhead code block is located in each of the N rows of the FEC code block, and the second overhead code block is located in M rows of the FEC code block, and M is less than or equal to N, M and N are integers greater than zero; the transceiver unit is used to send the FEC code block.

In the fourth aspect, a decoding device is provided, including: a transceiver unit, used for forward error correction FEC code blocks; a processing unit, used for decoding the FEC code blocks to restore the original data stream, and the FEC code blocks include multiple A data code block, a first overhead code block and a second overhead code block, wherein the FEC code block includes N rows, the first overhead code block is located in each of the N rows of the FEC code block, and the second overhead code block is located in the FEC code block M rows of blocks, where M is less than or equal to N, where M and N are integers greater than zero.

Exemplarily, in the embodiment of the present application, the currently transmitted FEC code block is based on the structure of the existing spatially coupled code, coupled with the general error position GEL code to generate additional redundancy, and generate the existing spatially coupled code for each row The original redundancy of the code.

Specifically, the currently transmitted FEC code block is based on the structure of the spatially coupled code, and coupled with the GEL code to generate original redundancy and additional redundancy. Among them, the original redundancy can be generated by the inner code B ₁ of the GEL code according to the complete GEL codec method; or, the original redundancy can be generated by the component code B of the original space-coupled code according to the partial GEL codec method, which exists in Each row of the FEC code block, and each row of the FEC code block is half of the codeword B. Additional redundancy is generated by the outer code _A2 of the GEL, present in some rows of the FEC code block. The FEC code block includes s matrices of n rows and h columns arranged in h rows and h columns of matrices. The FEC code block contains k ₂ ·h+K·m ₂ payload bits (ie, bits of the original data stream), m ₁ ·h bits of original overhead and (hK)·m ₂ bits of overhead.

Optionally, the second overhead code block may occupy some bits in any one data code block of the multiple data code blocks. For example, the second overhead code block is a matrix located in rows 14-15 and columns 7-14 of the seventh code block, etc., which is not specifically limited in the present application.

It should be noted that the first overhead code block of the space-coupled code in this implementation is generated by the GEL inner code B ₁ (that is, according to the complete GEL encoding and decoding method), or the first overhead code block is generated by the original space The component code B of the coupled code is generated (that is, according to a partial GEL encoding and decoding mode); the second overhead code block is generated by re-encoding the encoding result of the inner code with the outer code of the GEL.

The additional redundancy in this implementation (eg, a second overhead code block) provides improved error correction capability, which is beneficial for reducing the error floor and providing faster convergence.

In this embodiment of the application, "overhead symbol", "redundant symbol" and "check symbol" can be replaced in non-specific cases, and "overhead code block" can include "overhead symbol", "redundant symbol", "Check symbol", etc., "code block" and "matrix" can be replaced by each other in non-specific cases, or in other words, a code block is composed of a matrix. Wherein, one symbol may correspond to multiple bits, one code block may include multiple symbols, and a code block includes multiple bits or multiple symbols, which is not specifically limited in this application.

Exemplarily, the original data stream may include multiple bits, symbols, etc., which are not specifically limited in this application.

In combination with the third or fourth aspect, in some implementations, the processing unit is also used to: select any codeword in the general error location GEL code, the general concatenated code GCC, the tensor product and the general integrated interleaving GII code A component code serving as a spatially coupled code to generate a first overhead code block and a second overhead code block.

In combination with the third or fourth aspect, in some implementations, the processing unit is further configured to: when the second overhead code block is generated according to the code word C _GEL of the GEL code, use the parity check matrix H _B of C _GEL to pair GEL The column code of the code is checked, and the second overhead code block is generated by encoding the row code of the first parity check matrix. The first parity check matrix is determined according to the product of the sub-matrix of H _B and the sub-matrix of the GEL code .

Among them, GEL codes are a class of block codes with good properties. The H _B matrix used to generate column code check symbols in GEL codes is a check matrix of 2·n×2·n, the check matrix H 1 of B ₁ in rows k+1 to 2·n, and the check matrix H ₁ of k ₂ + Rows 1 to k are H ₂ , and H ₁ and H ₂ constitute the parity check matrix of B ₂ . The first to k ₂ rows of H ₃ include a k ₂ ×k ₂ identity matrix and a 2·nk ₂ zero matrix.

Specifically, before GEL encoding, there is only payload data in the GEL code matrix. The m ₂ ×(hK) matrix determined by the k ₂ +1 to k th columns to k th columns is 0 before encoding, and is used to store the second overhead after encoding. The matrix determined in rows k+1 to 2·n is all 0s before encoding, and is used to store the first overhead after encoding.

There are two encoding methods of the component code GEL, the first is to use the complete GEL code C _GEL encoding method to encode, using the historical code block

bits and k ₂ h+K m ₂ payload bits to generate all m ₁ h+(hK) m ₂ parity bits (that is, original overhead m ₁ h+extra overhead m ₂ ×(hK) ).

The second is to use GEL codes. The encoding process of _{the GEL} part generates overhead, using blocks from historical code blocks

bits, k ₂ ·h+K·m ₂ payload bits, and m ₂ ×(hK) overhead, the original space-coupled code component code encoding method is used to generate m ₁ ·h-bit original overhead.

Specifically, after the H _B matrix is multiplied by the GEL code matrix, the 1st to k ₂ keep the original values, and the k ₂ + 1 to kth rows get the first parity check matrix of the column code, and then the first parity check matrix of the column code is performed

Encoding, putting the generated parity check matrix into the m ₂ ×(hK) matrix determined by the k ₂ +1 to kth rows and k to h columns of the GEL code matrix, as the second overhead generation method. At this time, the inner code B ₁ (that is, the component code B of the original space-coupled code) is encoded for each column of the 1st to k rows, and the resulting check bits are put into the k+1 to 2·n rows as the first overhead .

In the embodiment of the present application, unless otherwise specified, "decoding" and "decoding" can be equivalently interchanged, and the present application does not specifically limit this.

In combination with the third or fourth aspect, in some implementations, when the component code A _i of the space-coupled code is a GEL code, the component code A _i includes a historical code block C _i , a plurality of data code blocks, a first overhead code block and the second overhead code block.

It should be noted that, in the embodiment of the present application, the historical code block C _i may refer to a code block before the current FEC code block to be transmitted.

It should be understood that one of the cores of the encoding method of the space-coupled code is to construct the code block to be encoded of the component code A _i at the current moment, where i is an integer greater than or equal to 0.

In combination with the third or fourth aspect, in some implementations, when the second overhead code block is generated according to the code word C _GEL of the GEL code, the component code is a GEL code; wherein, C _GEL includes 4 inner codes and The matrix of 2·n rows and h columns of 3 outer codes, the code length of the inner code and the code length of the outer code are 2·n and h respectively, and the inner code B ₀ of C _GEL is the identity code word [2·n, 2·n,1] ₂ , B ₁ is the codeword [2·n,k,d] ₂ , B ₂ is the codeword [2·n,k ₂ ,d ₂ ] ₂ , B ₃ is the all-zero codeword, The outer code A ₁ of C _GEL is the Galois Field

The all-zero codeword on A ₂ is the Galois Field

codeword on

A ₃ is Galois field

identity codeword on

m ₁ =2·nk, m ₂ =kk ₂ , m ₃ =k ₂ .

In combination with the third or fourth aspect, in some implementations, the historical code block includes n×h bits, and the multiple data code blocks include k ₂ h+K m ₂ bits (that is, payload bits ), the first overhead code block includes m ₁ ×h bits of original overhead, and the second overhead code block includes (hK)·m ₂ bits of additional overhead.

In combination with the third or fourth aspect, in some implementations, when sending the FEC code block, the generated semi-infinite sequence is

Among them, V _i is a binary matrix with h rows and n columns, and V _i includes s square matrices with h rows and h columns (V _i,0 V _i,1 ... V _i,s-1 ), s=n/ h, s, h and n are integers greater than 0;

When i=0,1,2,...,N ₀ , the matrix V _i is an all-zero matrix with h rows and n columns;

When i>N ₀ , the component code in the space coupling code is a GEL code, and the GEL code is

The codeword of each column in the GEL code is the component code B[2·n,k,d] ₂ of the original space-coupled code (eg, OFEC code block).

Among them, V ^T is the transpose of matrix V, N ₀ is a non-negative integer determined according to the coupling mode of space-coupled codes, π _i,k (V) is determined after rearranging matrix V according to any rearrangement rules , k=0,1,2,...,s-1.

It should be noted that the continuously sent FEC code blocks constitute a semi-infinite sequence, and one FEC code block includes N rows and K columns, and the corresponding semi-infinite sequence includes N rows and infinitely many columns.

In combination with the third or fourth aspect, in some implementations, the semi-infinite sequence V is the bit sum of the first overhead code block generated based on the bits of the historical code block and the bits of the original data stream according to the encoding method of the GEL code Bits of the second overhead code block.

Specifically, the semi-infinite sequence V is based on historical code blocks

bits and k ₂ ·h+K·m ₂ payload bits to generate all m ₁ ·h+(hK)·m ₂ original overhead and additional overhead.

In combination with the third or fourth aspect, in some implementations, the semi-infinite sequence V is the bits of the second overhead code block generated based on the bits of the historical code block and the bits of the original data stream according to the encoding method of the GEL code, and the bits of the first overhead code block generated based on the bits of the second overhead code block.

Specifically, the semi-infinite sequence V is based on historical code blocks

bits, k ₂ ·h+K·m ₂ payload bits and m ₂ ×(hK) overhead to generate m ₁ ·h bits of original overhead.

In combination with the third or fourth aspect, in some implementations, when the component code of the spatial coupling code is a GEL code, and the spatial coupling structure is similar to open FEC, the FEC code block V _i is a sub-matrix for the component code A _i A' _i transpose (A' _i ) rearrangement of ^T , wherein, the component code A _i is a matrix of 256 rows and 16 columns, and the sub-matrix A' _i is the rear 128 row and 16 column matrix of A _i , and the component code A _i includes Historical code block C _i , a plurality of data code blocks and the first overhead code block, V _i includes 8 sub-matrices V _i,t (r,c) of 16 rows and 16 columns arranged in a row-wise matrix of 16 rows and 128 columns , i is the row number of the FEC code block, t is the column number of the FEC code block, r and c are the row number and column number of the sub-matrix V _i,t (r,c) respectively, and t is greater than or equal to 0 and less than or an integer equal to 7, i is an integer greater than or equal to 0, r and c are integers greater than 0 and less than or equal to 15.

In combination with the third or fourth aspect, in some implementations, when the component code A _i of the spatial coupling code is a GEL code, and the spatial coupling structure is similar to that of open FEC, the code word C of the GEL code _GEL inner code B ₀ is Identity code word [256,256,1] ₂ , B ₁ is extended BCH code word [256,239,6] ₂ , B ₂ is extended BCH code word [256,231,8] ₂ , m ₁ =17, m ₂ =8, m ₃ = 231, the code word C of GEL code A ₁ of _GEL outer code is the all-zero code word on GF(2 ¹⁷ ), and A ₂ is the cyclic RS code on GF(2 ⁸ )

A ₃ is the identity codeword on GF(2 ²³¹ )

For example, for space-coupled code h=16, s=8, N ₀ =15+2·g, when i>N ₀ , i _j =i+2·(jg)+(-1) ⁱ -16, j =0,1,2,...,7; for another example, h=16, s=8, N ₀ =g+7 of the space-coupled code, when i>N ₀ , i _j =i+jg-8 , j=0,1,2,...,7.

In conjunction with the third or fourth aspect, in some implementations, the sub-matrix A' _i transpose (A' _i ) ^T of the component code A _i is a plurality of data code blocks, the first overhead code block and the second overhead code The transposition of the block, (A′ _i ) ^T includes 8 sub-matrices of 16 rows and 16 columns (A' _i,t (r,c)) ^T is a matrix of 16 rows and 128 columns arranged in the row direction, where r and c is the row number and column number of sub-matrix (A' _i,t (r,c)) ^T respectively, t is an integer greater than or equal to 0 and less than or equal to 7, i is an integer greater than or equal to 0, r and c is an integer greater than or equal to 0 and less than or equal to 15.

In combination with the third or fourth aspect, in some implementations, the second overhead code block is located at (A′ _i,6 (r,c)) ^T , where r is an integer greater than or equal to 14 and less than or equal to 15 , c is an integer greater than or equal to 7 and less than or equal to 14, the first overhead code block is located at (A′ _i,6 (r,c ₁ )) ^T and (A′ _i,7 (r,c ₂ )) ^T , r is an integer greater than or equal to 0 and less than or equal to 15, c ₁ is 15, and c ₂ is an integer greater than or equal to 0 and less than or equal to 15.

In combination with the third or fourth aspect, in some implementations, the historical code block C _i includes eight 16-row and 16-column sub-matrices C _{i, t} arranged in a column-wise 128-row and 16-column matrix, when the FEC code block When i in V _i is an even number, select the j-th 16-row 16-column matrix V i-19+2*j, j of the historical FEC code block _{with the serial number i-19+2*j, and} then transpose and rearrange Transpose to obtain C _{i, j} in the historical code block; when i in the FEC code block V _i is an odd number, select the jth 16th row 16 of the historical FEC code block with the sequence number i-21+2*j The column matrix V _i-21+2*j,j is transposed and rearranged and then transposed to obtain C _i,j in the historical code block.

In combination with the third or fourth aspect, in some implementations, the historical code block C _i includes eight 16-row and 16-column sub-matrices C _{i, t} arranged in a column-wise 16-row and 128-column matrix, and the FEC code block V _i select the j-th 16-row 16-column matrix V _{i-27+j, j of the historical FEC code block with the serial number i-27+j} to transpose and rearrange and then transpose to obtain C _i in the historical code block _,j .

In combination with the third or fourth aspect, in some implementations, when the original space coupling code is a structure similar to open FEC, and the second overhead code block is generated based on the GEL code encoding method, the data code block and the second overhead code The block determines a code block with 16 rows and 111 columns (wherein, the 103-110 columns (serial numbers start from 0) of the 14th-15th rows (serial numbers start from 0) are the second overhead code blocks, and the rest are original data), The first overhead code block is an encoding information matrix with 16 rows and 17 columns. After rearranging the bits (or symbols) in the original data, the first overhead and the second overhead code block, the coded FEC code block can be obtained.

Wherein, the first overhead code block is at the same position as the OFEC overhead code block, and the second overhead code block is at a part of the OFEC original data code block.

In combination with the third or fourth aspect, in some implementations, when the original space coupling code is an open forward error correction OFEC code, and the second overhead code block is generated based on the GEL code encoding method, the rearrangement rule of π is defined as follows:

in,

Indicates the XOR of i and j. The following table corresponds to the above rules. The numbers in the table indicate the element at the current position of the rearranged matrix π(W), which is the element corresponding to the column of the same row of the original matrix W. Wherein, ω _{i, j} represent the elements of row i and column j in a matrix W with 16 rows and 16 columns, and i and j are integers greater than or equal to 0 and less than or equal to 15, respectively.

It should be understood that the above rearrangement rule π is only an exemplary description, and should not constitute any limitation to the technical solution of the present application.

In combination with the third or fourth aspect, in some implementations, when the original spatial coupling code is an open forward error correction OFEC code, and the second overhead code block is generated based on the GEL code encoding method, the FEC code block V _i is composed of Eight rearranged sub-matrixes B _t are determined, i represents the serial number of the FEC code block, V _i,t represents the t-th sub-matrix B _t with 16 rows and 16 columns, and t is greater than or equal to 0 and less than or equal to 7 integer.

In combination with the third or fourth aspect, in some implementations, when the original space coupling code is an open forward error correction OFEC code, and the second overhead code block is generated based on the GEL code encoding method, the GEL code is 256 A matrix block with 16 rows and 16 columns, wherein, the matrix block of the 0-127 row is determined from the historical FEC codeword, the matrix block of the 128-230 row is a data code block, and the first 14 columns of the matrix block of the 231-238 row are For the data code block, the second overhead code block occupies the last two columns of the matrix block in rows 231-238 of the GEL code, and the first overhead code block is located in rows 239-255.

It should be understood that the above is only an exemplary description, and should not be construed as any limitation to the technical solution of the present application.

In a fifth aspect, a coding device is provided, including a processor, and optionally, a memory, the processor is used to control the transceiver to send and receive signals, the memory is used to store a computer program, and the processor is used to call from the memory And run the computer program, so that the encoding device executes the method in the above first aspect or any possible implementation manner of the first aspect.

Optionally, there are one or more processors, and one or more memories.

Optionally, the memory can be integrated with the processor, or the memory can be set separately from the processor.

Optionally, the encoding device further includes a transceiver, which may specifically be a transmitter (transmitter) and a receiver (receiver).

In a sixth aspect, a decoding device is provided, including a processor, and optionally, a memory, the processor is used to control the transceiver to send and receive signals, the memory is used to store a computer program, and the processor is used to call from the memory And run the computer program, so that the coding device executes the method in the above second aspect or any possible implementation manner of the second aspect.

Optionally, there are one or more processors, and one or more memories.

Optionally, the memory can be integrated with the processor, or the memory can be set separately from the processor.

Optionally, the decoding device further includes a transceiver, which may specifically be a transmitter (transmitter) and a receiver (receiver).

In a seventh aspect, a codec device is provided, including: various modules or units for implementing the method in the first aspect or any possible implementation manner of the first aspect; or, for implementing the second aspect or the second Each module or unit of the method in any possible implementation of the aspect.

In an eighth aspect, an optical communication system is provided, including: a codec device, configured to execute the method in the above first aspect or any possible implementation manner of the first aspect, or to execute the above second aspect or the method in the first aspect The method in any one of the possible implementations of the two aspects.

In the ninth aspect, a computer-readable storage medium is provided, the computer-readable storage medium stores computer programs or codes, and when the computer programs or codes run on a computer, the computer executes the above-mentioned first aspect or the first aspect The method in any possible implementation manner, or causing the computer to execute the above second aspect or the method in any possible implementation manner of the second aspect.

In a tenth aspect, a chip is provided, including at least one processor, the at least one processor is coupled to a memory, the memory is used to store a computer program, and the processor is used to call and run the computer program from the memory, so that the installed The encoding device of the chip system executes the method in the above-mentioned first aspect or any possible implementation of the first aspect, or makes the decoding device installed with the chip system execute the above-mentioned second aspect or any of the possible implementations of the second aspect method in .

Wherein, the chip may include an input circuit or interface for sending information or data, and an output circuit or interface for receiving information or data.

In an eleventh aspect, a computer program product is provided, the computer program product includes computer program code, and when the computer program code is run by a coding device, the coding device is made to perform any one of the above-mentioned first aspect or the first aspect. A method in an implementation manner; or, when the computer program code is executed by a decoding device, the decoding device is made to execute the second aspect or the method in any possible implementation manner of the second aspect.

According to the solution of the embodiment of the present application, a codec method is provided, by using one of the coding methods such as general error location GEL, general concatenated GCC, tensor product (tensor product) and general integrated interleaving code word GII as Component codes of space-coupled codes, resulting in overhead. Based on the first overhead (equal to the overhead size of the current spatially coupled code), the second overhead, and the characteristics of the GEL code, decoding is performed using the current spatially coupled code. By modifying the component codes, the delay is reduced, the slope of the performance curve is improved, and the bit error floor is significantly reduced; the output bit error rate (bit error rate) is reduced by negligible power and complexity costs, and a reasonable overhead (overhead). , BER) the bit error floor is reduced to 1e-15 level.

Description of drawings

FIG. 1 is a schematic diagram of an example of spatial coupling where the component codes applicable to the present application are BCH codes.

FIG. 2 is a schematic diagram of an example of a spatially coupled code to which the block code of the present application is applied.

FIG. 3 is a schematic diagram of an example of a decoding process of sliding window decoding to which the spatially coupled code of the present application is applied.

FIG. 4 is a schematic diagram of an example of a general error location GEL code applicable to this application.

FIG. 5 is a schematic diagram of an example of the encoding process of the GEL code to which this application is applied.

FIG. 6 is a schematic diagram of an example of a decoding process of a GEL code to which the present application is applied.

FIG. 7 is a schematic diagram showing an example of using GEL codes as component codes in a space coupling structure to which the present application is applied.

FIG. 8 is a schematic diagram of an example of using GEL codes as component codes in a spatially coupled staircase applicable to the present application.

Fig. 9 is a schematic diagram of an example of the error floor of the staircase and staircase-GEL codes applicable to the present application.

FIG. 10 is a schematic diagram of an example of a spatial coupling FEC encoding method applicable to the present application.

FIG. 11 is a schematic diagram of an example of a decoding method for spatial coupling forward error correction applicable to the present application.

Fig. 12 is a schematic diagram of an example of a coupling frame structure of the space coupling code open FEC and the GEL code applicable to the present application.

FIG. 13 is a schematic diagram of an example of an FEC applicable to an optical transmission scenario of the present application.

Fig. 14 is a schematic diagram of another example of the FEC applicable to the optical transmission scenario of the present application.

Fig. 15 is a schematic diagram of an example of a spatial coupling forward error correction coding device applicable to the present application.

Fig. 16 is a schematic diagram of an example of a spatial coupling forward error correction decoding device applicable to the present application.

Fig. 17 is a schematic diagram of an example of a spatial coupling forward error correction coding device applicable to the present application.

Fig. 18 is a schematic diagram of an example of a spatial coupling forward error correction decoding device applicable to the present application.

Detailed ways

The technical solutions in the embodiments of the present application will be described below with reference to the accompanying drawings.

The development of digital communication systems is closely related to the increase of data rate in communication channels, resulting in the increase of a large number of transmission errors. The purpose of forward error correction (FEC) is to minimize the number of transmission errors.

Currently, the best FEC for high-performance, high-speed applications is based on the idea of spatial coupling or continuous interleaving. The combination of spatial coupling and block codes is widely used in erasure correction of errors in data transmission and storage.

Spatial coupling codes include braided block codes (braided block codes, BBC), continuous interleaved BCH (continuously-interleaved bose-chaudhuri-hocquenghem, CI-BCH) codes, staircase codes (staircase), open forward error correction codes (open forward error correction, OFEC) and zipper codes, these error-correcting codes take advantage of low decoding complexity to achieve high performance.

Generally, a binary BCH code with a small error correction capability is used as a component code of a spatially coupled code to obtain a low-complexity decoding process. Due to the characteristics of low complexity and high performance in the encoding and decoding process, spatially coupled error correction code (spatially coupled error correction code, SC ECC) is suitable for high-throughput optical communication (for example, 400Gb/s and 800Gb/s).

FIG. 1 is a schematic diagram of an example of a spatially coupled code in which the component code applicable to the present application is a BCH code. As shown in Figure 1, taking the (256, 239) BCH code as an example of the spatial coupling code of the component code, the 128-bit Info_Pad represents the historical code block, and some bits in the previously transmitted codeword (through a certain mapping relationship ), 111 bits are the original data bits to be transmitted currently. Different space coupling codes can be simply understood as different rules for selecting the Info_Pad of the component codes.

Taking the open forward error correction code open FEC as an example, the component code of the original open FEC is a (256, 239) single parity bit extended BCH code. After open FEC encoding, the transmitted i-th FEC code block W _i includes eight matrices of 16 rows and 16 columns, i represents the serial number of the FEC code block, and W _i,t can be used to represent the t-th code block in W _i (0 ≤t≤7 integer).

In order to obtain the code block W _i transmitted after the i-th row is encoded by open FEC, it is necessary to obtain a historical code block C _i from the transmitted code block W _n according to a specific interleaving relationship, which has the same size as W _i and also includes 8 16 A matrix with 16 rows and 16 columns is a matrix arranged in rows, C _{i, t} represents the t-th 16-row and 16-column code block (0≤t≤7) in C _i , and n is less than t. C _i,t is the rearrangement result of W _m,t after transposition. m=i+2*(t-2)+(-1) ⁱ -16, the value of m is shown in Table 1.

Table 1

Then, a 16-row 111-column data code block D _i is obtained from the current information to be transmitted, and a 16-row 239-column code block to be encoded is obtained by splicing the historical code block C _i code block and the data code block D _i back and forth, and then for each Extended BCH (256, 239) encoding for one line, and finally a code block A _i with 16 rows and 256 columns can be obtained, which is equivalent to 16 sub-matrices with 16 rows and 16 columns arranged in rows, and A _i,p represents the pth in A _i A code block with 16 rows and 16 columns (0≤p≤15). The first 16 rows and 128 columns of A _i come from the historical code block C _i and will not be transmitted. The sub-matrix A′ _i with 16 rows and 128 columns after A _i=20 contains the current 16 rows and 111 columns of data and 16 rows and 17 columns of overhead . A' _i is divided into eight 16-row and 16-column matrices A' _i,t , where A' _i,t represents the t-th 16-row and 16-column code block in A' _i (0≤t≤7). After rearranging each sub-matrix A' _i in A' _i , W _i can be obtained.

For a matrix W with 16 rows and 16 columns, the rearrangement rules can be arbitrary, and W is π(W) after rearrangement. π(W) _i,j represents the element corresponding to the i-th (0≤i≤15) row and j-th column (0≤j≤15) column of the matrix. The rearrangement rules in open FEC can be expressed by the following formula:

After the matrix W is rearranged by the open FEC matrix, the result π(W) is shown in Table 2. The numbers in the table represent the element at the current position of π(W), which column is in the same row of the original matrix W.

Table 2

0	1	2	3	4	5	6	7	8	9	10	11	12	13	14	15
1	0	3	2	5	4	7	6	9	8	11	10	13	12	15	14
2	3	0	1	6	7	4	5	10	11	8	9	14	15	12	13
3	2	1	0	7	6	5	4	11	10	9	8	15	14	13	12
4	5	6	7	0	1	2	3	12	13	14	15	8	9	10	11
5	4	7	6	1	0	3	2	13	12	15	14	9	8	11	10
6	7	4	5	2	3	0	1	14	15	12	13	10	11	8	9
7	6	5	4	3	2	1	0	15	14	13	12	11	10	9	8
8	9	10	11	12	13	14	15	0	1	2	3	4	5	6	7
9	8	11	10	13	12	15	14	1	0	3	2	5	4	7	6

This implementation can utilize the interleaving relationship between codewords to improve error correction capabilities, that is, to improve bit error performance. However, the number of trap sets is higher and the error floor is higher.

FIG. 2 is a schematic diagram of an example of a space-coupled code to which this application is applied. That is, a spatially coupled code is constructed from the historical code block and the newly input data code block. As shown in Figure 2, each code block consists of information symbols (data) and parity symbols (overhead).

Specifically, any space-coupled code can be simply constructed by the following process: data is divided into blocks; where each block is composed of information symbols and check symbols; current information symbols are put into new code blocks; new code blocks The verification part of is obtained by selecting some symbols in the historical coding block, combining with the current information symbols, and performing component code coding (GEL in this application).

The core part of this implementation is the selected block code (the component codes are block codes) and the mapper. The main difference between these different types of space-coupled codes lies in the internal structure of the mapper and the selected component codes.

It should be understood that the above description is only an example, and should not constitute any limitation on the spatial coupling principle of the technical solution of the present application. It is also possible to consider implementing multiple block codes and multiple mappers. The check symbols of a code block may depend on previous code blocks of different numbers and sequence numbers, and the history code blocks may be filled with zero or non-zero symbols.

Decoding of space-coupled codes is performed using a "sliding window" decoding technique. That is, the receiver collects s code block matrices V _i from the channel and/or from previous processing, V _i+1? ,...,V _i+s-1 (window). Then, the decoding step of sliding window decoding (as shown in Fig. 3) is applied for decoding. Thereafter, the window "shifts" and the decoder utilizes only the following matrices V _i+1 , V _i+2 , . . . , V _i+s .

FIG. 3 is a schematic diagram of an example of a decoding process of sliding window decoding to which the spatially coupled code of the present application is applied. The specific decoding steps are as follows:

Input: V _i , V _i+1? ,...,V _{i+s-1 -} the decoding window of the SC code, _it - the number of iterations

Output: V _i , V _i+1? ,...,V _i+s-1 - update SC code decoding window

1: For j from 1 to i _t cycle operation;

2: For b, loop operation from s–1 to 0;

3: Use the checksum information symbols in block V _i+b , symbols in b-1 previous blocks to form component code code words according to a specific SCC (Space Coupled Code) code word structure (each format code should contain at least a symbol in block V _i+b );

4: For each codeword in the formed component code, apply the decoding algorithm of the component code;

5: Update the code block in the window according to the correct value;

6: end b cycle;

7: End the j loop.

Current space-coupled code structures have limitations in their properties.

For example, considering a ladder code with an overhead of OH=6.67%, it has been shown through experiments that it is impossible to construct a ladder code with relatively low delay, good performance and low bit error rate. The ladder code based on BCH that can correct 2 bit errors has low delay, but the error performance is relatively poor. At the same time, it also needs some additional technologies to reduce the error floor, even after processing the error floor is close to 1e -15. In contrast, ladder codes based on 3-bit-error-correctable BCH have good performance, but particularly high latency. Therefore, with the existing idea of constructing space-coupled codes, it is impossible to design a space-coupled code that is suitable for low-latency and high-performance communication scenarios, and has a low bit error rate and a relatively simple encoding and decoding algorithm.

It should be noted that the codewords that can generate the second overhead include: generalized concatenated codewords (generalized concatenated code, GCC), generalized error location codes (generalized error location codes, GEL) codes, locally repairable codes (locally repairable codes, LRC), generalized integrated interleaved (generalized integrated interleaved, GII) code, etc. Exemplarily, the second overhead of the GEL is a matrix obtained by matrix multiplication of the GEL code sub-matrix by the H _B matrix, and then the overhead of the row code generated by performing row code encoding on the matrix.

FIG. 4 is a schematic diagram of an example of a general error location GEL code applicable to this application. As shown in Figure 4, the GEL code structure includes row codes and column codes, and the check symbols of the GEL code are usually obtained by encoding the check symbols of the column codes by using the row codes. Row codes can also be called outer codes, and column codes can also be called inner codes.

Let F _q be a finite field with q elements, B _i be [n,k _i ,d _i ] _q linear code, where i∈{0,1,...,L}, n represents the encoded code character The number length, k represents the length of the payload symbol before encoding, and d represents the minimum Hamming distance after encoding. make

Indicates that the elements in the collection are zero vectors of length n.

It means that the elements in the finite field F _q can be represented by n-dimensional vectors, B ₁ ,..., B _L are

subset of . Therefore, it can be obtained that n=k ₀ >k ₁ >...>k _L =0. Let H _B be a non-singular matrix based on F _q .

Among them, H _i is a m _i ×n sub-matrix, and m _i can represent the number of bits contained in the codeword symbol of the outer code A _i , and can also be expressed as the dimension under the vector representation of the elements in the F _Qi field. For i, m _i =k _{i ? 1} ? k _i ∈ {1,2,...,L}; moreover, the matrix H _i , H _{i? 1} ,...,H ₁ form the parity check matrix of _Bi .

Suppose A _i is based on F _Qi

Linear code, N represents the codeword length after encoding, K represents the payload length before encoding, and D represents the minimum Hamming distance after encoding. where, i∈{1,2,...,L},

N represents the codeword symbol length after encoding, K represents the payload symbol length before encoding, and D represents the minimum Hamming distance after encoding.

if in any

arrive

(from all vector spaces of s×N matrices (s rows and N columns) based on F _q to

N-dimensional vector space), C satisfies the following conditions:

Then the linear subspace C based on the n×N matrix of F _q is called the general error location (GEL) code, which has L+1 inner code and L outer code B ₀ , B ₁ ,..., _BL and A ₁ , A ₂ , ... A _L . Among them, c represents an n×N matrix in C, and c is an element in C space.

The most common case of this structure is to use N different nested internal codes, such as

where B _i ^(j) is a [N,k _i ,d _i ] _q linear code, the ranges of i and j are as follows i∈{0,1,...,L}, j∈{1,2,... ,N}. In this case, condition (2) is as follows:

in,

yes

The corresponding submatrix, c ^(j) is the jth column of c, where j∈{1,2,...,N}.

In the embodiment of this application, a single nested inner code is used. In order to obtain a simple systematic encoding method of the GEL code, the outer code uses a systematic form of encoding and adopts a special form of matrix H _B , namely:

Among them, I _i is the identity matrix of m _i ×m _i ; O _i,j is the zero matrix of m _i ×m _j ; P _i,j is the m _i ×m _j matrix based on the finite field F _q .

According to the structure of H _B and the parameters of the outer code, the codeword c of the GEL code can be split into 2L sub-matrices whose size is m _i ×K _i or m _i ×(NK _i ), where i∈{1,2 ,...,L}, as follows:

Wherein, X _i and Y _i are respectively m _i ·K _i and m _i ×(NK _i ) sub-matrices, i∈{1,2,...,N}.

Fig. 5 is a schematic diagram of an example of the encoding process of the GEL code applicable to the present application. The specific decoding steps are as follows:

Input: F _q based

(the value is treated as an information symbol)

Output: codeword of c–GEL code (n×N matrix based on F _q )

1: set matrix c to zero;

2: Do a loop for i from 1 to L;

3: Set the X _i sub-matrix of c by the input m _i ×K _i information symbol;

4: end the i loop;

5: c:=H _B c;

6: Do a loop for i from L to 1;

7: Use the system encoder of A _i to encode X _i to obtain the check symbol Z _i ;

8: Use Z _i to set the Y _i sub-matrix of c;

9: end the i loop;

10:

Among them, the matrix H _B ^-1 is the standard matrix inverse of H _B.

FIG. 6 is a schematic diagram of an example of a decoding process of a GEL code to which the present application is applied. The specific decoding steps are as follows:

Input: v - the received codeword from the channel

Output: c - GEL code or updated codeword v and decoding failure signal

1: set the list of erase positions I ₁ , I ₂ , ..., I _L+1 as an empty list;

2: Do a loop for i from 1 to L;

3: Obtain codewords a _i with errors in the codeword space A _i :=H _i ·v;

4: With the aid of the erasure position list I _i , decode a _i by the A _i decoder;

5: If the decoding of the word a _i is observed to fail, complete the decoding and return v and the decoding failure;

6: otherwise continue decoding;

7: Carry out the following cycle for the column corresponding to the error of a _i or the erasing symbol;

8: Use a _1, , a ₂ , ..., a _i to decode the error or erasure value of the result position, and obtain the parity check matrix

The corresponding adjoint vector s;

9: Obtain the error pattern e corresponding to s through the _Bi decoder;

10: If a decoding failure is observed, add the column number to the list I _i+1 ;

11: Otherwise, update the corresponding column of v by eliminating the error pattern e;

12: end a _i cycle;

13: end the i loop;

14: If the list of erasing position I _L+1 is not empty, complete decoding and return v and decoding failure;

15: Otherwise, return the updated codeword v as c.

It should be understood that the decoding of the GEL code can be done step by step. In fact, a partial iterative loop and update can be performed on the codeword v. It can reduce the number of erroneous symbols in a codeword, but it cannot correct all errors. Encoding and decoding using GEL codes will help to enhance existing spatially coupled codes and design new spatially coupled codes

FIG. 7 is a schematic diagram showing an example of using GEL codes as component codes in a space coupling structure to which the present application is applied. As shown in Fig. 7, in order to design long GEL codes with high performance, it is necessary to use codewords with larger minimum Hamming distance in larger finite fields. Furthermore, existing GEL codes do not support iterative decoding. Therefore, the embodiment of the present application adopts the GEL code as the component code in the spatial coupling structure.

FIG. 8 is a schematic diagram of an example of using GEL codes as component codes in a spatially coupled staircase applicable to the present application. As shown in Figure 8, combining the staircase and GEL structures, in the traditional ladder code based on the BCH code as the component code, the component code can correct up to two errors using the original overhead, and has a relatively high error floor. According to the GEL structure, the designed GEL-based ladder code can correct up to 2 errors per column, and may correct up to 3 errors in some columns using original overhead and additional overhead.

FIG. 9 is a schematic diagram of an example of the error floor of the staircase and staircase-GEL codes applicable to the present application. As shown in Figure 9, the combination of staircase and GEL structure has better performance and lower error. That is, the FEC obtained by the staircase-GEL code space coupling has a lower error floor and a better slope of the performance curve. It should be understood that both FECs have the same overhead and delay. The error floor has nothing to do with the delay of the decoding algorithm, the two are independent. In addition, staircase-GEL is suitable for high-rate and extremely low-latency structures, which cannot be achieved by Staircase-BCH and GEL respectively. Classical staircase-BCH requires a large decoding window size to avoid poor performance.

In summary, current techniques for eliminating error floors (e.g., traditional bit-flipping techniques) are very limited; designing traditional SC ECC codes with extremely low latency and high rates is a challenging task; The current ECC adapts to the development of the current digital communication system and the data rate requirements of the communication channel.

In view of this, the present application provides a codec method to obtain subcodes of the original code with better properties (i.e., larger minimum distance) by adding additional overhead, and to provide performance improvement, reduce errors in decoding new features. Reduce latency by adding overhead, improve the slope of the performance curve, and significantly reduce the error floor; reduce the error floor to 1e-15 by outputting BER at negligible power and complexity costs, and adding reasonable OH .

In order to facilitate the understanding of the embodiments of the present application, the following explanations are made:

In the present application, "at least one" means one or more than two. "And/or" describes the association relationship of associated objects, indicating that there may be three types of relationships, for example, A and/or B, which can mean: A exists alone, A and B exist simultaneously, and B exists alone, where A, B can be singular or plural. In the text description of this application, the character "/" generally indicates that the contextual objects are an "or" relationship.

It can be understood that the various numbers involved in the embodiments of the present application are only for convenience of description, and are not used to limit the scope of the embodiments of the present application. The sequence numbers of the above processes do not mean the order of execution, and the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiment of the present application.

In the embodiment of the present application, "first", "second" and various numbers indicate distinctions for convenience of description, and are not used to limit the scope of the embodiment of the present application. For example, distinguishing between different information matrices, etc.

The codec method provided by the embodiment of the present application will be described in detail below with reference to the accompanying drawings.

Exemplarily, a specific embodiment of spatial coupling forward error correction using open FEC type spatial coupling and GEL.

FIG. 10 is a schematic diagram of an example of a method 1000 for spatially coupled FEC coding applicable to the present application. The specific implementation steps include:

S1010. Encode the original data stream to generate a forward error correction (FEC) code block.

Wherein, the FEC code block includes a plurality of data code blocks, a first overhead code block and a second overhead code block (for example, as shown in FIG. 13 ), wherein the FEC code block includes N rows, and the first overhead code block is located in the FEC code block In each row of the N rows, the second overhead code block is located in the M rows of the FEC code block, M is less than or equal to N, and M and N are integers greater than zero.

Exemplarily, the original data stream may include bits, symbols, etc., which are not specifically limited in the present application.

Specifically, the first overhead code block is generated by encoding the information matrix to be encoded determined by the data code block and the second overhead code block based on the encoding method of the space coupling code, and the second overhead code block is based on the general error location GEL code , general concatenated code GCC, tensor product and general integrated interleaved GII code generated by any one codeword, the second check symbol occupies Q bits of the data code block, and Q is an integer greater than zero.

A possible implementation is to select any one of the general error position GEL code, the general concatenated code GCC, the tensor product and the general integrated interleaving GII code as the component code of the spatially coupled code to generate the first overhead code block and the second overhead code block.

In a possible implementation, when the second overhead code block is introduced by the GEL code word C _GEL , the check matrix H _B of C _GEL is used to check the column code of the GEL code, and the second overhead code block is the first The first check matrix is generated by encoding the row codes of the check matrix, and the first check matrix is determined according to the product of the sub-matrix of the H _B and the sub-matrix of the GEL code.

Among them, GEL codes are a class of block codes with good properties. The H _B matrix used to generate column code check symbols in GEL codes is a check matrix of 2·n×2·n, the check matrix H 1 of B ₁ in rows k+1 to 2·n, and the check matrix H ₁ of k ₂ + Rows 1 to k are H ₂ , and H ₁ and H ₂ constitute the parity check matrix of B ₂ . The first to k ₂ rows of H ₃ include a k ₂ ×k ₂ identity matrix and a 2·nk ₂ zero matrix.

Specifically, before GEL encoding, there is only payload data in the GEL code matrix. The m ₂ ×(hK) matrix determined by the k ₂ +1 to k th columns to k th columns is 0 before encoding, and is used to store the second overhead after encoding. The matrix determined in rows k+1 to 2·n is all 0s before encoding, and is used to store the first overhead after encoding.

It should be noted that the improved space-coupled code is a special subcode of the original space-coupled code. There are two encoding methods of the component code GEL:

One: use the complete GEL code C _GEL encoding method for encoding. Using chunks from history

and k ₂ ·h+K·m ₂ payload bits to generate all m ₁ ·h+(hK)·m ₂ check bits (ie, original overhead + additional overhead).

Second: use GEL code C The encoding process of _{the GEL} part generates additional overhead, using blocks from historical code blocks

bits, k ₂ ·h+K·m ₂ payload bits, and m ₂ ×(hK) overhead, the original space-coupled code component code encoding method is used to generate m ₁ ·h-bit original overhead.

Specifically, after the H _B matrix is multiplied by the GEL code matrix, the 1st to k ₂ keep the original values, and the k ₂ + 1 to kth rows get the first parity check matrix of the column code, and then the first parity check matrix of the column code is performed

Encoding, putting the generated parity check matrix into the m ₂ ×(hK) matrix determined by the k ₂ +1 to kth rows and k to h columns of the GEL code matrix, as the second overhead generation method. At this time, the inner code B ₁ (that is, the component code B of the original space-coupled code) is encoded for each column of the 1st to k rows, and the resulting check bits are put into the k+1 to 2·n rows as the first overhead .

In a possible implementation manner, when the component code A _i of the spatially coupled code is a GEL code, the component code A _i includes a historical code block C _i , multiple data code blocks, a first overhead code block, and a second overhead code block.

It should be noted that, in the embodiment of the present application, the historical code block C _i may refer to a code block before the current FEC code block to be transmitted.

It should be understood that one of the cores of the encoding method of the space-coupled code is to construct the code block to be encoded of the component code A _i at the current moment, where i is an integer greater than or equal to 0.

A possible implementation, when based on the coupling relationship of the original space coupling code, and the new space coupling code generated by using GEL as the component code corresponds to the semi-infinite sequence

Where V _i is a binary matrix of h×n (h rows and n columns), and h is a divisor of n, so s=n/h. Obviously, V _i is composed of s square matrices (V _i,0 V _i,1 ... V _i,s-1 ) of h×h (h rows and h columns). So a semi-infinite sequence V can be defined as:

1. When i=0,1,2,...,N ₀ , the matrix V _i is an all-zero matrix of h×n (h rows and n columns);

2,

Each row of is a codeword in the codeword space of the component code B of the space-coupled code;

3. When i>N ₀ ,

Both are codewords in the codeword space of the GEL code. At this time, j=0,1,2,...,s-1, i _j , N ₀ and π _i,k (V) are semi-infinite sequences corresponding to the original space coupling code

have the same value.

Among them, when the component code is the binary codeword B[2 n,k,d] _2, the original space coupling code corresponds to the semi-infinite sequence

Where W _i is a binary matrix of h×n (h rows and n columns), and h is a divisor of n, so s=n/h. Obviously, W _i is composed of s square matrices (W _i,0 W _i,1 ...W _i,s-1 ) of h×n (h rows and h columns). So a semi-infinite sequence can be defined as:

1. When i=0,1,2,...,N ₀ , the matrix W _i is an all-zero matrix of h×n (h rows and n columns);

2. When i>N ₀ ,

Each row of is a code word corresponding to the component code B; at this time j=0,1,2,...,s-1, the value of i _j depends on the specific space coupling design, W ^T is the matrix W Transpose; N ₀ is a non-negative integer depending on the space coupling design; π _i,k (W) is the rearrangement of the matrix W, k=0,1,2,...,2·s-1.

In the embodiment of this application, by modifying the component codes and introducing additional overhead, a suitable new space-coupled code is designed to allow FEC codewords with low-complexity decoding process and low error floor at low delay and high throughput Applications in high-volume, high-speed communication transmission scenarios.

In a possible implementation, the semi-infinite sequence V is the bits of the first overhead code block and the bits of the second overhead code block generated based on the bits of the historical code block and the bits of the original data stream according to the encoding method of the GEL code.

Specifically, the semi-infinite sequence V is based on historical code blocks

bits and k ₂ ·h+K·m ₂ payload bits to generate all m ₁ ·h+(hK)·m ₂ original overhead and additional overhead.

In another possible implementation, the semi-infinite sequence V is based on the encoding method of the GEL code, based on the bits of the historical code block and the bits of the original data stream, the bits of the generated second overhead code block, and the bits based on the second overhead code block The bits of are the bits of the generated first overhead code block.

Specifically, the semi-infinite sequence V is based on historical code blocks

bits, k ₂ ·h+K·m ₂ payload bits and m ₂ ×(hK) overhead to generate m ₁ ·h bits of original overhead.

It should be noted that due to the GEL structure, the modified semi-infinite sequence V contains (hK)·m ₂ additional overheads in each code block V _i , while retaining the structure of the original space-coupled code.

It should be understood that the extra overhead is introduced by the GEL codeword C _GEL , which is more overhead than the overhead of the original space-coupled code. Among them, the GEL code word C _GEL used to introduce additional overhead includes 4 inner codes and 3 outer codes, so L=3, and the code lengths of the inner code and the outer code are 2·n and h respectively. The inner code word B ₀ and B ₃ of C _GEL are the identity code word [2 n, 2 n, 1] ₂ and the all-zero code word respectively, B ₁ and the component code B of the original space coupling code are the same code word, B ₂ is the codeword [2·n,k ₂ ,d2] ₂ , which is also the subcode of B ₁ , so there is

According to the above description of GEL, the obtained H _B matrix is:

At this time, m ₁ =2·nk, m ₂ =kk ₂ , m ₃ =k ₂ .

It should also be understood that all the outer codes of the GEL code word C _GEL are code words defined on different extension fields of the binary field. That is, the outer code A ₁ of C _GEL is the Galois Field

The all-zero codeword on A ₂ is the Galois Field

codeword on

A ₃ is Galois field

identity codeword on

Wherein, in this implementation, A ₂ is used as an error correction code for encoding and decoding.

Exemplarily, the historical code block includes n×h bits, the multiple data code blocks include k ₂ h+K m ₂ bits (that is, payload bits) of the original data stream, and the first overhead code block includes m ₁ × h bits of original overhead, and the second overhead code block includes (hK)·m ₂ bits of overhead.

In a possible implementation, the FEC code block V _i is a rearrangement of the transpose (A' _i ) ^T of the sub-matrix A' _i of the component code A _i , where the component code A _i is a matrix with 256 rows and 16 columns, The sub-matrix A' _i is the last 128 rows and 16 columns matrix of A _i , the component code A _i includes the historical code block C _i , multiple data code blocks and the first overhead code block, V _i includes eight sub-matrixes with 16 rows and 16 columns Matrix V _i,t (r, c) is a matrix of 16 rows and 128 columns arranged in the row direction, i is the row number of the FEC code block, t is the column number of the FEC code block, r and c are sub-matrixes V _i, The row number and column number of _t (r,c), t is an integer greater than or equal to 0 and less than or equal to 7, i is an integer greater than or equal to 0, r and c are integers greater than 0 and less than or equal to 15.

In a possible implementation, the sub-matrix A' _i transpose (A' _i ) ^T of the component code A _i is the transpose of multiple data code blocks, the first overhead code block and the second overhead code block, (A' _i ) ^T includes 8 sub-matrices (A' _i,t (r,c)) of 16 rows and 16 columns (A' i,t (r,c)) ^T is a matrix of 16 rows and 128 columns arranged in the row direction, where r and c are sub-matrices (A' _i,t (r,c)) The row number and column number of ^T , t is an integer greater than or equal to 0 and less than or equal to 7, i is an integer greater than or equal to 0, r and c are greater than or equal to 0 and less than or an integer equal to 15.

In a possible implementation manner, the second overhead code block is located at (A′ _i,6 (r,c)) ^T , where r is an integer greater than or equal to 14 and less than or equal to 15, c is greater than or equal to 7 and An integer less than or equal to 14, the first overhead code block is located at (A′ _i,6 (r,c ₁ )) ^T and (A′ _i,7 (r,c ₂ )) ^T , r is greater than or equal to 0 and An integer less than or equal to 15, c ₁ is 15, and c ₂ is an integer greater than or equal to 0 and less than or equal to 15.

In a possible implementation, the historical code block C _i includes 8 sub-matrices C _i,t with 16 rows and 16 columns arranged in the column direction, and a matrix with 128 rows and 16 columns, when i in the FEC code block V _i is an even number , select the j-th 16-row and 16-column matrix V i-19+2*j _{,j of the historical FEC code block with the serial number i-19+2*j} to transpose and rearrange and then transpose to obtain the historical code block C _i,j in ; when i in the FEC code block V _i is an odd number, select the j-th 16-row 16-column matrix V i-21+2 of the historical FEC code block whose serial number _{is i-21+} 2*j _*j,j are transposed and rearranged and then transposed to obtain C _i,j in the historical code block.

In a possible implementation, the historical code block C _i includes eight 16-row and 16-column sub-matrices C _{i, t} arranged in a column-wise 16-row and 128-column matrix, and the sequence number of the FEC code block V _i is i-27+ The j-th 16-row and 16-column matrix V _{i-27+j,j of j} 's historical FEC code block is transposed, rearranged and then transposed to obtain C _i,j in the historical code block.

Exemplarily, when the component code A _i of the space coupling code is a GEL code, and the space coupling structure is similar to open FEC, the code word C of the GEL code _GEL inner code B ₀ is the identity code word [256,256,1] ₂ , B ₁ is the extended BCH code word [256,239,6] ₂ , B ₂ is the extended BCH code word [256,231,8] ₂ , m ₁ =17, m ₂ =8, m ₃ =231, the code word C _GEL of the GEL code The outer code A ₁ is the all-zero code word on GF(2 ¹⁷ ), and A ₂ is the cyclic RS code on GF(2 ⁸ )

A ₃ is the identity codeword on GF(2 ²³¹ )

For example, for space-coupled code h=16, s=8, N ₀ =15+2·g, when i>N ₀ , i _j =i+2·(jg)+(-1) ⁱ -16, j =0,1,2,...,7; for another example, h=16, s=8, N ₀ =g+7 of the space-coupled code, when i>N ₀ , i _j =i+jg-8 , j=0,1,2,...,7.

A possible implementation, when the original space coupling code is a structure similar to open FEC, and the second overhead code block is generated based on the GEL code encoding method, the data code block and the second overhead code block determine a 16-row 111-column code blocks (wherein, the 14th-15th row (the serial number starts from 0), the 103-110 column (the serial number starts from 0) is the second overhead code block, and the rest is the original data), the first overhead code block is 16 An encoded information matrix with 17 rows and 17 columns. After rearranging the bits (or symbols) in the data code block, the first overhead code block and the second overhead code block, an encoded FEC code block can be obtained.

Wherein, the first overhead code block is at the same position as the OFEC overhead code block, and the second overhead code block is at a part of the OFEC original data code block.

In a possible implementation, when the original space coupling code is an open forward error correction OFEC code, and the second overhead code block is generated based on the GEL code encoding method, the rearrangement rule of π is defined as follows:

in,

Indicates the XOR of i and j. The following table corresponds to the above rules. The numbers in the table indicate the element at the current position of the rearranged matrix, which is the element corresponding to the column of the same row of the original matrix W. Wherein, ω _{i, j} represent the elements of row i and column j in a matrix W with 16 rows and 16 columns, and i and j are integers greater than or equal to 0 and less than or equal to 15, respectively.

A possible implementation, when the original space coupling code is an open forward error correction OFEC code, and the second overhead code block is generated based on the GEL code encoding method, the FEC code block V _i consists of 8 rearranged sub-matrices B _t is determined, i represents the serial number of the FEC code block, V _i,t represents the t-th sub-matrix B _t with 16 rows and 16 columns, and t is an integer greater than or equal to 0 and less than or equal to 7.

A possible implementation, when the original space coupling code is an open forward error correction OFEC code, and the second overhead code block is generated based on the GEL code encoding method, at this time the GEL code is an information matrix block with 256 rows and 16 columns, Among them, the matrix blocks of rows 0-127 are determined from historical FEC code blocks, the matrix blocks of rows 128-230 are data code blocks, the first 14 columns of information matrix blocks of rows 231-238 are data code blocks, and the second The overhead code blocks occupy the last two columns of the matrix block in rows 231-238 of the GEL code, and the first overhead code block is located in rows 239-255.

It should be understood that the above is only an exemplary description, and should not be construed as any limitation to the technical solution of the present application.

S1020. Send the FEC code block.

According to the scheme provided by this application, by adding additional overhead (for example, based on any codeword generation in GEL, GCC, tensor product and GII) to obtain better properties (that is, a larger minimum Hamming distance) Subcodes of the original code, and new features in decoding that provide performance improvements and reduce errors. Design suitable spatially coupled codes (for example, open forward error correction code OFEC) to allow FEC codewords with low-complexity decoding process and low error floor in low-latency, high-throughput, high-rate communication transmission scenarios in the application.

FIG. 11 is a schematic diagram of an example of a method 1100 for spatially coupled FEC decoding applicable to the present application. The specific implementation steps include:

S1110. Receive a forward error correction (FEC) code block stream.

S1120. Decode the FEC code block to generate a forward error correction FEC code block.

Wherein, the FEC code block includes a plurality of data code blocks, a first overhead code block and a second overhead code block (for example, as shown in FIG. 13 ), wherein the FEC code block includes N rows, and the first overhead code block is located in the FEC code block In each row of the N rows, the second overhead code block is located in the M rows of the FEC code block, M is less than or equal to N, and M and N are integers greater than zero.

Exemplarily, the original data stream may include bits, symbols, etc., which are not specifically limited in the present application.

In this embodiment of the application, "overhead symbol", "redundant symbol" and "check symbol" can be replaced in non-specific cases, and "overhead code block" can include "overhead symbol", "redundant symbol", "Check symbol", etc., "code block" and "matrix" can be replaced by each other in non-specific cases, or in other words, a code block is composed of a matrix. Wherein, one symbol may correspond to multiple bits, one code block may include multiple symbols, and a code block includes multiple bits or multiple symbols, which is not specifically limited in this application.

Specifically, the first overhead code block is generated by encoding the information matrix to be encoded determined by the data code block and the second overhead code block based on the encoding method of the space coupling code, and the second overhead code block is based on the general error location GEL code , general concatenated code GCC, tensor product and general integrated interleaved GII code generated by any one codeword, the second overhead code block occupies Q bits of the data code block, and Q is an integer greater than zero.

A possible implementation is to select any one of the general error position GEL code, the general concatenated code GCC, the tensor product and the general integrated interleaving GII code as the component code of the spatially coupled code to generate the first overhead code block and the second overhead code block.

In a possible implementation, when the second overhead code block is generated according to the code word C _GEL of the GEL code, the check matrix H _B of C _GEL is used to check the column code of the GEL code, and the second overhead code block is It is generated by encoding the row codes of the first check matrix, and the first check matrix is determined according to the product of the sub-matrix of the H _B and the sub-matrix of the GEL code.

Among them, GEL codes are a class of block codes with good properties. The H _B matrix used to generate column code check symbols in GEL codes is a check matrix of 2·n×2·n, the check matrix H 1 of B ₁ in rows k+1 to 2·n, and the check matrix H ₁ of k ₂ + Rows 1 to k are H ₂ , and H ₁ and H ₂ constitute the parity check matrix of B ₂ . The first to k ₂ rows of H ₃ include a k ₂ ×k ₂ identity matrix and a 2·nk ₂ zero matrix.

Specifically, before GEL encoding, there is only payload data in the GEL code matrix. The m ₂ ×(hK) matrix determined by the k ₂ +1 to k th columns to k th columns is 0 before encoding, and is used to store the second overhead after encoding. The matrix determined in rows k+1 to 2·n is all 0s before encoding, and is used to store the first overhead after encoding.

It should be noted that the improved space-coupled code is a special subcode of the original space-coupled code. There are two encoding methods of the component code GEL:

One: use the complete GEL code C _GEL encoding method for encoding. Using chunks from history

and k ₂ ·h+K·m ₂ payload bits to generate all m ₁ ·h+(hK)·m ₂ check bits (ie, original overhead + additional overhead).

Second: use GEL code C The encoding process of _{the GEL} part generates additional overhead, using blocks from historical code blocks

bits, k ₂ ·h+K·m ₂ payload bits, and m ₂ ×(hK) overhead, the original space-coupled code component code encoding method is used to generate m ₁ ·h-bit original overhead.

Specifically, after the H _B matrix is multiplied by the GEL code matrix, the 1st to k ₂ keep the original values, and the k ₂ + 1 to kth rows get the first parity check matrix of the column code, and then the first parity check matrix of the column code is performed

Encoding, putting the generated parity check matrix into the m ₂ ×(hK) matrix determined by the k ₂ +1 to kth rows and k to h columns of the GEL code matrix, as the second overhead generation method. At this time, the inner code B ₁ (that is, the component code B of the original space-coupled code) is encoded for each column of the 1st to k rows, and the resulting check bits are put into the k+1 to 2·n rows as the first overhead .

In a possible implementation manner, when the component code A _i is a GEL code, the component code A _i includes a historical code block C _i , multiple data code blocks, a first overhead code block, and a second overhead code block.

It should be noted that, in the embodiment of the present application, the historical code block C _i may refer to a code block before the current FEC code block to be transmitted.

It should be understood that one of the cores of the encoding method of the space-coupled code is to construct the code block to be encoded of the component code A _i at the current moment, where i is an integer greater than or equal to 0.

A possible implementation, when based on the coupling relationship of the original space coupling code, and the new space coupling code generated by using GEL as the component code corresponds to the semi-infinite sequence

Where V _i is a binary matrix of h×n (h rows and n columns), and h is a divisor of n, so s=n/h. Obviously, V _i is composed of s square matrices (V _i,0 V _i,1 ... V _i,s-1 ) of h×h (h rows and h columns). So a semi-infinite sequence V can be defined as:

1. When i=0,1,2,...,N ₀ , the matrix V _i is an all-zero matrix of h×n (h rows and n columns);

2,

Each row of is a codeword in the codeword space of the component code B of the space-coupled code;

3. When i>N ₀ ,

Both are codewords in the codeword space of the GEL code. At this time, j=0,1,2,...,s-1, i _j , N ₀ and π _i,k (V) are semi-infinite sequences corresponding to the original space coupling code

have the same value.

Among them, when the component code is the binary codeword B[2 n,k,d] _2, the original space coupling code corresponds to the semi-infinite sequence

Where W _i is a binary matrix of h×n (h rows and n columns), and h is a divisor of n, so s=n/h. Obviously, W _i is composed of s square matrices (W _i,0 W _i,1 ...W _i,s-1 ) of h×n (h rows and h columns). So a semi-infinite sequence can be defined as:

1. When i=0,1,2,...,N ₀ , the matrix W _i is an all-zero matrix of h×n (h rows and n columns);

2. When i>N ₀ ,

Each row of is a code word corresponding to the component code B; at this time j=0,1,2,...,s-1, the value of i _j depends on the specific space coupling design, W ^T is the matrix W Transpose; N ₀ is a non-negative integer depending on the space coupling design; π _i,k (W) is the rearrangement of matrix W, k=0,1,2,...,2·s-1;

In the embodiment of this application, by modifying the component codes and introducing additional overhead, a suitable new space-coupled code is designed to allow FEC codewords with low-complexity decoding process and low error floor at low delay and high throughput Applications in high-volume, high-speed communication transmission scenarios.

In a possible implementation, the semi-infinite sequence V is the bits of the first overhead code block and the bits of the second overhead code block generated based on the bits of the historical code block and the bits of the original data stream according to the encoding method of the GEL code.

Specifically, the semi-infinite sequence V is based on historical code blocks

bits and k ₂ ·h+K·m ₂ payload bits to generate all m ₁ ·h+(hK)·m ₂ original overhead and additional overhead.

In another possible implementation, the semi-infinite sequence V is based on the encoding method of the GEL code, based on the bits of the historical code block and the bits of the original data stream, the bits of the generated second overhead code block, and the bits based on the second overhead code block The bits of are the bits of the generated first overhead code block.

Specifically, the semi-infinite sequence V is based on historical code blocks

bits, k ₂ ·h+K·m ₂ payload bits and m ₂ ×(hK) overhead to generate m ₁ ·h bits of original overhead.

It should be noted that due to the GEL structure, the modified semi-infinite sequence V contains (hK)·m ₂ additional overheads in each code block V _i , while retaining the structure of the original space-coupled code.

It should be understood that the extra overhead is introduced by the GEL codeword C _GEL , which is more overhead than the overhead of the original space-coupled code. Among them, the GEL code word C _GEL used to introduce additional overhead includes 4 inner codes and 3 outer codes, so L=3, and the code lengths of the inner code and the outer code are 2·n and h respectively. The inner code word B ₀ and B ₃ of C _GEL are the identity code word [2 n, 2 n, 1] ₂ and the all-zero code word respectively, B ₁ and the component code B of the original space coupling code are the same code word, B ₂ is the codeword [2·n,k ₂ ,d2] ₂ , which is also the subcode of B ₁ , so there is

According to the above description of GEL, the obtained H _B matrix is:

At this time, m ₁ =2·nk, m ₂ =kk ₂ , m ₃ =k ₂ .

It should also be understood that all the outer codes of the GEL code word C _GEL are code words defined on different extension fields of the binary field. That is, the outer code A ₁ of C _GEL is the Galois Field

The all-zero codeword on A ₂ is the Galois Field

codeword on

A ₃ is Galois field

identity codeword on

Wherein, in this implementation, A ₂ is used as an error correction code for encoding and decoding.

Exemplarily, the historical code block includes n×h bits, the multiple data code blocks include k ₂ h+K m ₂ bits (that is, payload bits) of the original data stream, and the first overhead code block includes m ₁ × h bits of original overhead, and the second overhead code block includes (hK)·m ₂ bits of overhead.

In a possible implementation, the FEC code block V _i is a rearrangement of the transpose (A' _i ) ^T of the sub-matrix A' _i of the component code A _i , where the component code A _i is a matrix with 256 rows and 16 columns, The sub-matrix A' _i is the last 128 rows and 16 columns matrix of A _i , the component code A _i includes the historical code block C _i , multiple data code blocks and the first overhead code block, V _i includes eight sub-matrixes with 16 rows and 16 columns Matrix V _i,t (r, c) is a matrix of 16 rows and 128 columns arranged in the row direction, i is the row number of the FEC code block, t is the column number of the FEC code block, r and c are sub-matrixes V _i, The row number and column number of _t (r,c), t is an integer greater than or equal to 0 and less than or equal to 7, i is an integer greater than or equal to 0, r and c are integers greater than 0 and less than or equal to 15.

In a possible implementation, the sub-matrix A' _i transpose (A' _i ) ^T of the component code A _i is the transpose of multiple data code blocks, the first overhead code block and the second overhead code block, (A' _i ) ^T includes 8 sub-matrices (A' _i,t (r,c)) of 16 rows and 16 columns (A' i,t (r,c)) ^T is a matrix of 16 rows and 128 columns arranged in the row direction, where r and c are sub-matrices (A' _i,t (r,c)) The row number and column number of ^T , t is an integer greater than or equal to 0 and less than or equal to 7, i is an integer greater than or equal to 0, r and c are greater than or equal to 0 and less than or an integer equal to 15.

In a possible implementation manner, the second overhead code block is located at (A′ _i,6 (r,c)) ^T , where r is an integer greater than or equal to 14 and less than or equal to 15, c is greater than or equal to 7 and An integer less than or equal to 14, the first overhead code block is located at (A′ _i,6 (r,c ₁ )) ^T and (A′ _i,7 (r,c ₂ )) ^T , r is greater than or equal to 0 and An integer less than or equal to 15, c ₁ is 15, and c ₂ is an integer greater than or equal to 0 and less than or equal to 15.

In a possible implementation, the historical code block C _i includes 8 sub-matrices C _i,t with 16 rows and 16 columns arranged in the column direction, and a matrix with 128 rows and 16 columns, when i in the FEC code block V _i is an even number , select the j-th 16-row and 16-column matrix V _{i-19+2*j,j of the historical FEC code block with the serial number i-19+2*j} to transpose and rearrange and then transpose to obtain the historical code block C _i,j in ; when i in the FEC code block V _i is an odd number, select the j-th 16-row 16-column matrix V i-21+2 of the historical FEC code block whose serial number _{is i-21+} 2*j _*j,j are transposed and rearranged and then transposed to obtain C _i,j in the historical code block.

In a possible implementation, the historical code block C _i includes eight 16-row and 16-column sub-matrices C _{i, t} arranged in a column-wise 16-row and 128-column matrix, and the sequence number of the FEC code block V _i is i-27+ The j-th 16-row and 16-column matrix V _{i-27+j,j of j} 's historical FEC code block is transposed, rearranged and then transposed to obtain C _i,j in the historical code block.

Exemplarily, when the component code A _i of the space coupling code is a GEL code, and the space coupling structure is similar to open FEC, the code word C of the GEL code _GEL inner code B ₀ is the identity code word [256,256,1] ₂ , B ₁ is the extended BCH code word [256,239,6] ₂ , B ₂ is the extended BCH code word [256,231,8] ₂ , m ₁ =17, m ₂ =8, m ₃ =231, the code word C _GEL of the GEL code The outer code A ₁ is the all-zero code word on GF(2 ¹⁷ ), and A ₂ is the cyclic RS code on GF(2 ⁸ )

A ₃ is the identity codeword on GF(2 ²³¹ )

For example, for space-coupled code h=16, s=8, N ₀ =15+2·g, when i>N ₀ , i _j =i+2·(jg)+(-1) ⁱ -16, j =0,1,2,...,7; for another example, h=16, s=8, N ₀ =g+7 of the space coupling code, when i>N ₀ , i _j =i+jg-8 , j=0,1,2,...,7.

A possible implementation, when the original space coupling code is a structure similar to open FEC, and the second overhead code block is generated based on the GEL code encoding method, the data code block and the second overhead code block determine a 16-row 111-column The code blocks of (among them, lines 14-15 (serial numbers start from 0), columns 103-110 (serial numbers start from 0) are the second overhead code blocks, and the rest are original data), and the first overhead code block is 16 lines A matrix of encoded information with 17 columns. After rearranging the bits (or symbols) in the original data, the first overhead and the second overhead code block, the coded FEC code block can be obtained.

Wherein, the first overhead code block is at the same position as the OFEC overhead code block, and the second overhead code block is at a part of the OFEC original data code block.

In a possible implementation, when the original space coupling code is an open forward error correction OFEC code, and the second overhead code block is generated based on the GEL code encoding method, the rearrangement rule of π is defined as follows:

in,

Indicates the XOR of i and j. The following table corresponds to the above rules. The numbers in the table indicate the element at the current position of the rearranged matrix π(W), which is the element corresponding to the column of the same row of the original matrix W. Wherein, ω _{i, j} represent the elements of row i and column j in a matrix W with 16 rows and 16 columns, and i and j are integers greater than or equal to 0 and less than or equal to 15, respectively.

A possible implementation, when the original space coupling code is an open forward error correction OFEC code, and the second overhead code block is generated based on the GEL code encoding method, the FEC code block V _i consists of 8 rearranged sub-matrices B _t is determined, i represents the serial number of the FEC code block, V _i,t represents the t-th sub-matrix B _t with 16 rows and 16 columns, and t is an integer greater than or equal to 0 and less than or equal to 7.

A possible implementation, when the original space coupling code is an open forward error correction OFEC code, and the second overhead code block is generated based on the GEL code encoding method, at this time the GEL code is an information matrix block with 256 rows and 16 columns, Among them, the matrix blocks of rows 0-127 are determined from historical FEC code blocks, the matrix blocks of rows 128-230 are data code blocks, the first 14 columns of information matrix blocks of rows 231-238 are data code blocks, and the second The overhead code blocks occupy the last two columns of the matrix block in rows 231-238 of the GEL code, and the first overhead code block is located in rows 239-255.

It should be understood that the above is only an exemplary description, and should not be construed as any limitation to the technical solution of the present application.

According to the scheme provided by this application, by adding additional overhead (for example, based on any codeword generation in GEL, GCC, tensor product and GII) to obtain better properties (that is, a larger minimum Hamming distance) Subcodes of the original code, as well as new features in decoding that provide performance improvements and reduce errors. Design suitable spatially coupled codes (for example, open forward error correction code OFEC) to allow FEC codewords with low-complexity decoding process and low error floor in low-latency, high-throughput, high-rate communication transmission scenarios Applications.

One possible implementation, when the spatial coupling structure of the original spatially coupled code is similar to open FEC, the component code B is the extended binary BCH[256,239,6] ₂ , the component code in the new spatially coupled code is the GEL code, and the GEL code The word C _GEL is a matrix of 256 rows and 16 columns including 4 inner codes and 3 outer codes.

Among them, GEL code word C _GEL inner code word B ₀ and B ₃ are the identity code word [256,256,1] ₂ and all-zero code word respectively, B ₁ and the component code B of the original space coupling code are the same code word [256,239,6] ₂ , B ₂ is the extended BCH codeword [256,231,8] ₂ , B ₁ and B ₂ are the extensions of the original binary BCH code in the narrow sense, and the extended bits are obtained through single parity check. Among them, the generator polynomial of B ₁ is g ₁ (x)=x ¹⁶ +x ¹⁴ +x ^{13 +} x ¹¹ +x ¹⁰ +x 9 +x ⁸ +x ⁶ +x ⁵ +x+1, and the generator polynomial of B ₂ g ₂ (x)=x ²⁴ +x ²³ +x ²¹ +x ²⁰ +x ¹⁹ +x ¹⁷ +x ¹⁶ +x ¹⁵ +x ^{13 +x 8 +x 7 +x 5 + x 4 +} x ² +1, B ₃ is an all-0 codeword with a length of 256.

Express H _B in the form of formula (4). Right now,

Therefore, m ₁ =17, m ₂ =8, m ₃ =231.

Among them, the outer codewords of GEL include three codewords of length 16 on different binary domain extension domains. That is, A ₁ is an all-zero codeword on the GF(2 ¹⁷ ) field. A ₂ is on the field of GF(2 ⁸ )

A cyclic (Reed-Solomon, RS) codeword of the form whose generator polynomial is

α is the primitive element of GF(2 ⁸ ). A ₃ is the identity codeword on GF(2 ²³¹ ) field

In this implementation, the spatially coupled code h=16, s=8, N ₀ =15+2·g, when i>N ₀ , i _j =i+2·(jg)+(-1) ⁱ - 16, and j=0,1,2,...,7 at the same time.

It should be understood that this application mainly focuses on the outer code _A2 as an error correction code and only requires some non-trivial encoding and decoding processes for this code.

Therefore, the GEL code word C _GEL is a linear block code in the binary field with a length of 4096 and a dimension of 3808. A code word c in the code word C _GEL can be regarded as a 256×16 binary matrix. Here, each column in the codeword c in GEL is a codeword constructed by the codeword _B1 construction rule. Furthermore, the matrix product of _H2 and c is the codeword of RS code _A2 .

Wherein, the decoding of codeword C ₁ can be divided into 3 steps:

1: Use the decoder of B ₁ to complete the decoding of each column;

2 _: Obtain A 2 through the matrix product of H ₂ and c and then use the decoder of A ₂ to decode

3: Use the decoding results of the previous steps to decode some columns using the syndrome decoder of _B2

It should be noted that in the first decoding process, the failed column can mark the corresponding column of the _A2 codeword, and in the second decoding process, the symbol of _A2 corresponding to the marked column is erased. The Error and/or erasure values obtained during the _A2 decoding process are the adjoint values of the columns involved in the _H2 parity check matrix. Since H ₂ and H ₁ determine the parity check matrix of the code word B ₂ , the syndromes calculated in the first and second steps of the decoding process proposed above can be passed through the syndrome decoder of B ₂ Decoding column.

When the space coupling structure of the original space coupling code is similar to open FEC, the component codes in the new space coupling code are GEL codes. Semi-infinite sequence determined by 16×128 binary matrix

Each matrix V _i is expressed as eight 16×16 binary square matrices, representing the FEC code block transmitted after the sub-matrix rearrangement of the component code GEL, using V _i =(V _i,0 V _i,1 ... V _{i ,7} ) said. So the semi-infinite sequence V is defined as:

1. Matrix V _i is a 16×256 zero matrix, where i=0,1,2,...,15+2·g;

2. Matrix (π _i,1 ,π _i,2 ,π _i,3 ,...,π _i,15 ) ^T represents a codeword in the codeword set C ₁ , i>15+2·g, j =0, 1, 2, . . . , 7, i _j =i+2·(jg)+(−1) ⁱ −16.

where ^VT is the matrix transpose of V. g is a non-negative integer, π _{i, k} (V) is some arrangement of matrix items, and k can take values 0, 1, 2, ..., 15, which is not specifically limited in this application.

Exemplarily, in the embodiment of the present application, g is called a guard interval, which is fixed at 2, π _i,k (V)=π, and π can be defined as shown in Table 2. Among them, the number in each cell of each row represents the element in this cell of the matrix after rearrangement, which is the element corresponding to the column of this row before the matrix arrangement.

The encoding of this semi-infinite sequence is to use the encoding process of code word _C1 to perform continuous encoding matrix by matrix. That is, one can use the matrix

and 1760-bit payload (original information, that is, multiple data code blocks) as the information bits of the codeword, and then obtain 288 overheads consisting of 16 additional overheads (second overhead) and 272 original overheads (first overhead) A matrix V _i of parity bits, payload, and parity bits.

Figure 12 is a schematic diagram of an example of the combination of open FEC and GEL codes applicable to this application. As shown in FIG. 12 , in the transmission process, each small matrix is B=16, that is, a 16*16 information matrix, and there are R=8 such matrix blocks in one row. Considering these 8 matrix blocks as a whole, it is called a 16*128 matrix block A.

Specifically, after performing GEL encoding on 16*128bit (the interleaved bit of the historical codeword obtained by the OFEC interleaving method)+16*128bit (matrix block A of each row: current information bit+reserved parity bit (overhead)), Fill the obtained check digit (overhead) into the corresponding position.

In this implementation, the GEL code C ₁ outer code A2 combined with the inner code B ₂ generates an additional 16-bit second overhead, the first overhead of which is generated by the inner codeword eBCH[256,239,6]. By using all overhead (original and extra) to improve the convergence of iterative decoding, reduce the number of trap sets, and then achieve a low-latency, high-rate, low-error-rate, low-complexity encoding and decoding process.

It should be noted that eBCH means that the BCH codeword is expanded by a single-bit parity bit (that is, a parity bit is added to the lowest bit of the BCH codeword to ensure that the modulo two sum of the entire codeword bits is 0). Codeword.

Table 3 is the general design of the OFEC space coupling structure and GEL as component codes applicable to the embodiments of the present application, and g is a constant. Among them, the extra overhead bit is generated by the principle of GEL encoding. Its internal code is eBCH[256,239,6] and eBCH[256,231,8], and its external code is RS[16,14,3].

table 3

It should be understood that each frame corresponds to a codeword of the GEL code, which can be represented as a 16×256-bit block, and each row is a codeword of the eBCH [256, 239, 6]. Each frame is half of the corresponding GEL code, and the second half can be obtained using the coupling structure of the open FEC. If the other 14 codewords of the frame are error-free, up to 2 lines can be decoded into eBCH[256,231,8] (correcting up to 3 errors in that line) using 16 bits of overhead.

Another possible implementation, when the space coupling structure of the original space coupling code is similar to open FEC, but the space coupling relationship is more compact, the component code Β is the extended binary BCH[256,239,6] ₂ , in the new space coupling code The component code of is GEL code, and the GEL code word C _GEL is a matrix including 4 inner codes and 3 outer codes.

Among them, GEL code word C _GEL inner code word B ₀ and B ₃ are the identity code word eBCH[256,256,1] ₂ and all-zero code word respectively, B ₁ and the component code B of the original space coupling code are the same code The word eBCH[256,239,6] ₂ , B ₂ is the extended BCH code word eBCH[256,231,8] ₂ , B ₁ and B ₂ are the extensions of the original binary BCH code in the narrow sense, and the extended bits are obtained through single parity check. Among them, B ₀ is the identity code word eBCH[256,256,1] ₂ , B ₁ is the same code word [256,239,6] ₂ as the component code B of the original space-coupled code, using the generator polynomial g ₁ (x)=x ¹⁶ +x ¹⁴ +x ¹³ +x ¹¹ +x ¹⁰ +x ⁹ +x ⁸ +x ⁶ +x ⁵ +x+1 is generated, and B ₂ is generated by using the generator polynomial g ₂ (x)=x ²⁴ +x ²³ + x ²¹ +x ²⁰ +x ¹⁹ +x ¹⁷ +x ¹⁶ +x ¹⁵ +x ¹³ +x ⁸ +x ⁷ +x ⁵ +x ⁴ +x ² +1 generated codeword eBCH[256,231,8] ₂ ，B ₃ is a codeword of all 0s with a length of 256.

Express H _B in the form of formula (4). Right now,

Therefore, m ₁ =17, m ₂ =8, m ₃ =231.

The outer codewords of GEL include three codewords of length 16 on different binary domain extension domains. That is, A ₁ is an all-zero codeword on the GF(2 ¹⁷ ) field. A ₂ is on the field of GF(2 ⁸ )

A cyclic RS codeword of the form whose generator polynomial is

α is the primitive element of GF(2 ⁸ ). A ₃ is the identity codeword on GF(2 ²³¹ ) field

In this implementation, the spatial coupling code h=16, s=8, N ₀ =g+7, when i>N ₀ , i _j =i+jg-8, and j=0,1,2, ...,7.

It should be understood that this application mainly focuses on the outer code _A2 as an error correction code and only requires some non-trivial encoding and decoding processes for this code.

Therefore, the GEL codeword C ₁ is a linear block code over a binary field with length 4096 and dimension 3808. A code word c in code word C ₁ can be regarded as a 256×16 binary matrix. Here, each column in the codeword c in GEL is a codeword constructed by the codeword _B1 construction rule. Furthermore, the matrix product of _H2 and c is the codeword of RS code _A2 .

Wherein, the decoding of codeword C ₁ can be divided into 3 steps:

1: Use the decoder of B ₁ to complete the decoding of each column;

2 _: Obtain A 2 through the matrix product of H ₂ and c and then use the decoder of A ₂ to decode

3: Use the decoding results of the previous steps to decode some columns using the syndrome decoder of _B2

It should be noted that in the first step of decoding, the failed column can mark the column corresponding to the _A2 codeword, and in the second step of decoding, the _A2 symbol corresponding to the marked column is erased. The Error and/or erasure values obtained during the _A2 decoding process are the adjoint values of the columns involved in the _H2 parity check matrix. Since H ₂ and H ₁ determine the parity check matrix of the code word B ₂ , the adjoint formula calculated in the first and second steps of the decoding process proposed above can be decoded by the adjoint formula of B ₂ Decoder column.

Considering the spatial coupling structure to meet the requirements of low-latency decoding and support 800G channel throughput, the GEL code C _GEL is used to generate additional overhead bits. When the space coupling structure of the original space coupling code is similar to open FEC, the component codes in the new space coupling code are GEL codes. Semi-infinite sequence determined by 16×128 binary matrix

Each matrix V _i is expressed as eight 16×16 binary square matrices, representing the FEC code block transmitted after the sub-matrix rearrangement of the component code GEL, using V _i =(V _i,0 V _i,1 ... V _{i ,7} ) said. So a semi-infinite sequence V can be defined as:

1. Matrix V _i is a 16×256 zero matrix, where i=0,1,2,...,g+7;

2. Matrix

Table code word C, i>g+7, j=0,1,2,...,7, i _j =i+jg-8.

where ^VT is the matrix transpose of V. g is a non-negative integer, π _{i, k} (V) is some arrangement of matrix items, and k can take values 0, 1, 2, ..., 15, which is not specifically limited in this application.

Exemplarily, in the embodiment of the present application, g is called a guard interval, which is fixed at 19, π _i,k (V)=π, and π can be defined as shown in Table 2. The number in each cell of each row represents the element of the matrix in this cell after rearrangement, which is the element of the column corresponding to this row before the matrix arrangement.

The encoding of this semi-infinite sequence is to use the encoding process of code word _C1 to perform continuous encoding matrix by matrix. That is, one can use the matrix

and 1760-bit payload (original information, for example, multiple data code blocks involved in this application) as the information bits of the codeword, and then obtain 16 additional overheads (second overhead) and 272 original overheads (first overhead) Overhead) is a matrix V _i of 288 parity bits, payload, and parity bits.

It should be noted that the above descriptions are only exemplary descriptions, and should not be construed as any limitation to the technical solution of the present application. In addition, the decoding process of the above example may refer to FIG. 3 . For the sake of brevity, details are not repeated here.

Table 4 shows the main design of a similar OFEC spatial coupling structure and GEL as component codes applicable to the embodiment of the present application. The GEL code C ₁ outer code A ₂ combined with the inner code B ₂ generates an additional 16-bit second overhead, the first overhead of which is generated by the inner codeword eBCH[256,239,6].

Table 4

Table 5 is a general design of a space-coupled code structure similar to OFEC but more compact and GEL as a component code applicable to the embodiment of the present application, and g is a constant. Among them, the extra overhead bit is generated by the principle of GEL encoding. Its internal code is eBCH[256,239,6] and eBCH[256,231,8], and its external code is RS[16,14,3].

Table 6

It should be understood that for the combination of the space coupling code and the GEL as described in FIG. 12 . It should be understood that for the combination of the space coupling code and the GEL as described in FIG. 12 . If the currently to-be-transmitted data is filled in matrix blocks with 16 rows and 16 columns with serial numbers 0 to 6, the data with 2 rows and 8 columns is reserved in the matrix block with serial number 6 for storing the second overhead (at this time, the second overhead is used Filling with all 0s), use the matrix block with serial number 6 to reserve the position of 16 rows and 1 column and the matrix block with 16 rows and 16 columns with serial number 7 to store the first overhead (at this time, the first overhead is filled with all 0s).

Then, eight matrices with 16 rows and 16 columns are generated from the transmitted historical FEC code blocks according to the coupling rules of specific space coupling codes to form historical code blocks. The historical code block and the current code block are spliced into a matrix Q with 16 rows and 256 columns. Transpose this matrix to get a matrix Q ^T with 256 rows and 16 columns. At this time, there is only original data in Q, and the first overhead and the second overhead are filled with all 0s.

Then use the specific H _B matrix (256 rows and 256 columns) to perform matrix multiplication with the matrix Q ^T (256 rows and 16 columns) to obtain the matrix P (256 rows and 16 columns). In the matrix P, _A2 encoding is performed on columns 0-13 of rows 230-238 where the second overhead is located, and the encoded overhead is put into the position corresponding to the second overhead ^{of QT} . Then put the symbol of the first overhead position in P into Q ^T , and generate a new matrix Y at this time.

The matrix Y (256 rows and 16 columns) is transposed to obtain Y ^T (16 rows and 256 columns), and the 128-255 columns of Y ^T are selected and rearranged to obtain the FEC code block to be transmitted. (The generated first overhead is equivalent to the overhead obtained by performing eBCH[256,239] encoding on the first 239 bits of each row of Y ^T when the second overhead position is filled with all 0s).

As an example but not a limitation, FIG. 13 is a schematic diagram of an example of an FEC applicable to an optical transmission scenario of the present application. As shown in Figure 13, the abscissa is the input BER, and the ordinate is the bit error rate BER. It can be seen from the figure that the error floor of the FEC with additional overhead is significantly lower than that of the original FEC.

Among them, in the case of a specific 5nm chip process, the power consumption estimation can include: SD1 P3 HD2<280mW, SD1 P6 HD2<450mW. In SDx Py HD z, x represents the number of iterations of soft-decision decoding, y represents the number of selected least reliable positions, and z represents the number of iterations of hard-decision decoding.

In this implementation, the original FEC has 15.3% OH. On this basis, FEC adds +1% redundancy (over head, OH) as additional overhead. It can be seen that at negligible added power and complexity cost, the slope of the FEC performance curve with overhead is significantly improved, achieving 0.5/0.7dB at an output BER of 1e-15 gain.

As an example but not a limitation, FIG. 14 is a schematic diagram of an example of an FEC applicable to an optical transmission scenario of the present application. As shown in Figure 14, the abscissa is the input bit error rate (BER), and the ordinate is the output BER. It can be seen from the figure that the error floor of the FEC with additional overhead is significantly lower than that of the original FEC.

Among them, in the case of a specific 5nm chip process, the power consumption estimation can include: SD1 P6 HD5<600mW. . In SDx Py HD z, x represents the number of iterations of soft-decision decoding, y represents the number of selected least reliable positions, and z represents the number of iterations of hard-decision decoding.

In this implementation, the original FEC has 15.3% OH. On this basis, FEC adds +1% OH as an additional overhead. It can be seen that the slope of the FEC performance curve with overhead is significantly improved with negligible power and complexity cost

To sum up, this application provides a method for spatially coupled forward error correction codec, by adding additional overhead to obtain a subcode of the original code with better properties (ie, a larger minimum Hamming distance), As well as new features in decoding that provide performance improvements and reduce errors. Support new requirements for latency and performance, improve the slope of the performance curve and significantly reduce the error floor, provide backward compatibility and improvements in FEC characteristics, design a single FEC that supports various performance, latency and complexity requirements. Reduces bit error floor to 1e-15 level at negligible power and complexity cost and adds reasonable OH by outputting BER or less;

It should be noted that, the foregoing is only an illustration of spatial coupling using similar OFEC spatial coupling codes combined with GEL codes, and should not constitute any limitation to the technical solution of the present application. The technical solution of the present application is also applicable to adding extra overhead by using principles such as general error location codes, general integrated codes, general concatenated codes, and local recoverable codes to enhance space coupling codes.

Utilizing the extra and original overhead of space-coupled codes sequentially improves the minimum distance of FEC, lowers the error floor, and uses the full overhead (original and extra) to improve the convergence of iterative decoding and reduce the number of dangerous stall modes (i.e., reduce the trap The number of sets), etc., can effectively improve performance, delay, power consumption and other indicators.

The technical solution of this application can improve the minimum distance of FEC; reduce the bit error level, and improve the convergence of iterative decoding by using all overhead (original and extra); reduce the number of trap sets; low delay, high rate, low bit error rate , Low-complexity decoding process to achieve high performance.

The embodiments of the codec method of the present application are described in detail above with reference to FIGS. 1 to 14 , and the embodiments of the codec device of the present application will be described in detail below in conjunction with FIGS. 15 to 18 . It should be understood that the description of the embodiment of the codec device and the description of the embodiment of the codec method correspond to each other, therefore, for parts not described in detail, reference may be made to the foregoing method embodiments.

Fig. 15 is a schematic diagram of an example of encoding equipment for spatially coupled forward error correction codes provided by an embodiment of the present application. As shown in FIG. 15 , the device 1500 may include a processing unit 1520 and a transceiver unit 1510 .

Optionally, the device 1500 may correspond to the encoding device in the above method embodiments, for example, may be an encoding device, or a component configured in the encoding device (such as a circuit, a chip, or a chip system, etc.).

Exemplarily, the processing unit 1520 is configured to encode the original data stream to generate a forward error correction FEC code block, where the FEC code block includes a plurality of data code blocks, a first overhead code block, and a second overhead code block, where , the FEC code block includes N rows, the first overhead code block is located in each of the N rows of the FEC code block, the second overhead code block is located in the M rows of the FEC code block, M is less than or equal to N, and M and N are greater than zero an integer of

The transceiver unit 1510 is configured to send the FEC code block.

It should be understood that the device 1500 may correspond to the encoding device in the method 1000 according to the embodiment of the present application, and the device 1500 may include a unit for performing the method performed by the encoding device in the method 1000 in FIG. 10 . Moreover, each unit in the device 1500 and other operations and/or functions mentioned above are respectively intended to implement a corresponding flow of the method 1000 in FIG. 10 .

It should also be understood that the transceiver unit 1510 in the coding device 1500 can be implemented by a transceiver, for example, it can correspond to the transceiver 1820 in the coding device shown in FIG. The processor implements, for example, may correspond to the processor 1810 in the encoding device 1800 shown in FIG. 18 .

It should also be understood that when the device 1500 is a chip or system-on-a-chip configured in the coding device, the transceiver unit 1510 in the coding device 1500 can be realized through an input/output interface, a circuit, etc., and the processing unit 1520 in the coding device 1500 can be It is realized by the processor, microprocessor or integrated circuit integrated on the chip or chip system.

Fig. 16 is a schematic diagram of an example of a spatial coupling forward error correction decoding device provided by an embodiment of the present application. As shown in FIG. 16 , the device 1600 may include a processing unit 1620 and a transceiver unit 1610 .

Optionally, the device 1600 may correspond to the decoding device in the above method embodiment, for example, may be a decoding device, or a component (such as a circuit, a chip, or a chip system, etc.) configured in the decoding device.

Exemplarily, the transceiver unit 1610 is configured to receive a forward error correction FEC code block;

The processing unit 1620 is configured to decode the FEC code block to restore the original data stream, the FEC code block includes a plurality of data code blocks, the first overhead code block and the second overhead code block, wherein the FEC code block includes N rows, The first overhead code block is located in each of the N lines of the FEC code block, the second overhead code block is located in the M lines of the FEC code block, M is less than or equal to N, and M and N are integers greater than zero.

It should be understood that the device 1600 may correspond to the decoding device in the method 1100 according to the embodiment of the present application, and the device 1600 may include a unit for performing the method performed by the decoding device in the method 1100 in FIG. 11 . Moreover, each unit in the device 1600 and the above-mentioned other operations and/or functions are respectively intended to implement a corresponding flow of the method 1100 in FIG. 11 .

It should also be understood that the transceiver unit 1610 in the decoding device 1600 can be implemented by a transceiver, for example, it can correspond to the transceiver 1820 in the encoding device shown in FIG. The processor implements, for example, may correspond to the processor 1810 in the encoding device 1800 shown in FIG. 18 .

It should also be understood that when the device 1600 is a chip or chip system configured in a coding device, the transceiver unit 1610 in the coding device 1600 can be realized through an input/output interface, a circuit, etc., and the processing unit 1620 in the coding device 1600 can be It is realized by the processor, microprocessor or integrated circuit integrated on the chip or chip system.

Fig. 17 is a schematic diagram of an example of a spatial coupling forward error correction coding device provided by an embodiment of the present application. As shown in FIG. 17 , the apparatus 1700 may include a processor 1710 and a transceiver 1720 . Optionally, a memory 1730 is also included. Wherein, the processor 1710, the transceiver 1720 and the memory 1730 communicate with each other through an internal connection path, the memory 1730 is used to store instructions, and the processor 1710 is used to execute the instructions stored in the memory 1730 to control the transceiver 1720 to send signals and /or to receive a signal.

It should be understood that the encoding apparatus 1700 may correspond to the encoding device in the above method embodiments, and may be used to execute various steps and/or processes performed by the encoding device in the above method embodiments. Optionally, the memory 1730 may include read-only memory and random-access memory, and provides instructions and data to the processor. A portion of the memory may also include non-volatile random access memory. The memory 1730 can be an independent device, or can be integrated in the processor 1710 . The processor 1710 may be used to execute the instructions stored in the memory 1730, and when the processor 1710 executes the instructions stored in the memory, the processor 1710 is used to execute the steps of the above-mentioned method embodiments corresponding to the encoding device and/or or process.

Optionally, the encoding device 1700 is the encoding device in the foregoing embodiments.

Exemplarily, the processor 1710 is configured to encode the original data stream to generate a forward error correction FEC code block, where the FEC code block includes a plurality of data code blocks, a first overhead code block, and a second overhead code block, where , the FEC code block includes N rows, the first overhead code block is located in each of the N rows of the FEC code block, the second overhead code block is located in the M rows of the FEC code block, M is less than or equal to N, and M and N are greater than zero an integer of

The transceiver 1720 is configured to send the FEC code block.

Wherein, the transceiver 1720 may include a transmitter and a receiver. The processor 1710, memory 1730 and transceiver 1720 may be devices integrated on different chips. For example, the processor 1710 and the memory 1730 may be integrated in a baseband chip, and the transceiver 1720 may be integrated in a radio frequency chip. The processor 1710, the memory 1730 and the transceiver 1720 may also be devices integrated on the same chip. This application is not limited to this.

Optionally, the encoding device 1700 is a component configured in an encoding device, such as a circuit, a chip, a chip system, and the like.

Wherein, the transceiver 1720 may also be a communication interface, such as an input/output interface, a circuit, and the like. The transceiver 1720, the processor 1710 and the memory 1720 may be integrated in the same chip, such as a baseband chip.

Fig. 18 is a schematic diagram of an example of a spatial coupling forward error correction decoding device provided by an embodiment of the present application. As shown in FIG. 18 , the apparatus 1800 may include a processor 1810 and a transceiver 1820 . Optionally, a memory 1830 is also included. Wherein, the processor 1810, the transceiver 1820 and the memory 1830 communicate with each other through an internal connection path, the memory 1830 is used to store instructions, and the processor 1810 is used to execute the instructions stored in the memory 1830 to control the transceiver 1820 to send signals and /or to receive a signal.

It should be understood that the decoding apparatus 1800 may correspond to the decoding device in the foregoing method embodiments, and may be configured to execute various steps and/or processes performed by the decoding device in the foregoing method embodiments. Optionally, the memory 1830 may include read-only memory and random-access memory, and provides instructions and data to the processor. A portion of the memory may also include non-volatile random access memory. The memory 1830 can be an independent device, or can be integrated in the processor 1810 . The processor 1810 may be used to execute the instructions stored in the memory 1830, and when the processor 1810 executes the instructions stored in the memory, the processor 1810 is used to execute the steps of the above-mentioned method embodiments corresponding to the decoding device and/or or process.

Optionally, the decoding apparatus 1800 is the decoding device in the foregoing embodiments.

Exemplarily, the transceiver 1820 is configured to receive a forward error correction FEC code block;

The processor 1810 is configured to decode the FEC code block to restore the original data stream, the FEC code block includes a plurality of data code blocks, the first overhead code block and the second overhead code block, wherein the FEC code block includes N rows, The first overhead code block is located in each of the N lines of the FEC code block, the second overhead code block is located in the M lines of the FEC code block, M is less than or equal to N, and M and N are integers greater than zero.

Wherein, the transceiver 1820 may include a transmitter and a receiver. The processor 1810, memory 1830 and transceiver 1820 may be devices integrated on different chips. For example, the processor 1810 and the memory 1830 may be integrated in a baseband chip, and the transceiver 1820 may be integrated in a radio frequency chip. The processor 1810, the memory 1830 and the transceiver 1820 may also be devices integrated on the same chip. This application is not limited to this.

Optionally, the decoding apparatus 1800 is a component configured in a decoding device, such as a circuit, a chip, a chip system, and the like.

Wherein, the transceiver 1820 may also be a communication interface, such as an input/output interface, a circuit, and the like. The transceiver 1820, the processor 1810 and the memory 1820 may be integrated in the same chip, for example, integrated in a baseband chip.

It should be understood that the specific examples in the embodiments of the present application are only to help those skilled in the art better understand the technical solutions of the present application. example range.

It should be noted that the actions or methods executed by the controller may be implemented in whole or in part by software, hardware, firmware or any other combination. When implemented using software, the actions or methods performed by the controller may be fully or partially implemented in the form of computer program products. The computer program product comprises one or more computer instructions or computer programs. When the computer instruction or computer program is loaded or executed on the computer, the processes or functions according to the embodiments of the present application will be generated in whole or in part. The computer may be a general purpose computer, a special purpose computer, a computer network, or other programmable devices. The computer instructions may be stored in or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be transmitted from a website, computer, server or data center Transmission to another website site, computer, server or data center by wired (such as infrared, wireless, microwave, etc.). The computer-readable storage medium may be any available medium that can be accessed by a computer, or a data storage device such as a server or a data center that includes one or more sets of available media. The available medium may be a magnetic medium (for example, a floppy disk, a hard disk, or a magnetic tape), an optical medium (for example, a digital video disc (DVD)), or a semiconductor medium, and the semiconductor medium may be a solid-state hard disk.

Optionally, the memory and the processor in the foregoing apparatus embodiments may be physically independent units, or the memory and the processor may also be integrated together, which is not limited in the present application.

The processor in this embodiment of the present application may be an integrated circuit chip capable of processing signals. In the implementation process, each step of the above-mentioned method embodiments may be completed by an integrated logic circuit of hardware in a processor or instructions in the form of software. The processor can be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA), or other programmable Logic devices, discrete gate or transistor logic devices, discrete hardware components. A general-purpose processor may be a microprocessor, or the processor may be any conventional processor, or the like. The steps of the methods disclosed in the embodiments of the present application may be directly implemented by a hardware coded processor, or executed by a combination of hardware and software modules in the coded processor. The software module can be located in a mature storage medium in the field such as random access memory, flash memory, read-only memory, programmable read-only memory or electrically erasable programmable memory, register. The storage medium is located in the memory, and the processor reads the information in the memory, and completes the steps of the above method in combination with its hardware.

The memory in the embodiments of the present application may be a volatile memory or a nonvolatile memory, or may include both volatile and nonvolatile memories. Among them, the non-volatile memory can be read-only memory (read-only memory, ROM), programmable read-only memory (programmable ROM, PROM), erasable programmable read-only memory (erasable PROM, EPROM), electrically programmable Erases programmable read-only memory (electrically EPROM, EEPROM) or flash memory. Volatile memory can be random access memory (RAM), which acts as external cache memory. By way of illustration and not limitation, many forms of RAM are available such as static random access memory (static RAM, SRAM), dynamic random access memory (dynamic RAM, DRAM), synchronous dynamic random access memory (synchronous DRAM, SDRAM), double data rate synchronous dynamic random access memory (double data rate SDRAM, DDR SDRAM), enhanced synchronous dynamic random access memory (enhanced SDRAM, ESDRAM), synchronous connection dynamic random access memory (synchlink DRAM, SLDRAM ) and direct memory bus random access memory (direct rambus RAM, DRRAM). It should be noted that the memory of the systems and methods described herein is intended to include, but not be limited to, these and any other suitable types of memory.

Those skilled in the art can appreciate that the units and algorithm steps of the examples described in conjunction with the embodiments disclosed herein can be implemented by electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are executed by hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art may use different methods to implement the described functions for each specific application, but such implementation should not be regarded as exceeding the scope of the present application.

Those skilled in the art can clearly understand that for the convenience and brevity of the description, the specific working process of the above-described system, device and unit can refer to the corresponding process in the foregoing method embodiment, which will not be repeated here.

In the several embodiments provided in this application, it should be understood that the disclosed systems, devices and methods may be implemented in other ways. For example, the device embodiments described above are only illustrative. For example, the division of the units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components can be combined or May be integrated into another system, or some features may be ignored, or not implemented. In another point, the mutual coupling or direct coupling or communication connection shown or discussed may be through some interfaces, and the indirect coupling or communication connection of devices or units may be in electrical, mechanical or other forms.

The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place, or may be distributed to multiple network units. Part or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, each unit may exist separately physically, or two or more units may be integrated into one unit.

If the functions described above are realized in the form of software function units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art or the part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including Several instructions are used to make a computer device (which may be a personal computer, a server, or a network device, etc.) execute all or part of the steps of the methods described in the various embodiments of the present application. The aforementioned storage media include: U disk, mobile hard disk, read-only memory (Read-Only Memory, ROM), random access memory (Random Access Memory, RAM), magnetic disk or optical disc and other media that can store program codes. .

The above is only a specific implementation of the application, but the scope of protection of the application is not limited thereto. Anyone familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the application. Should be covered within the protection scope of this application. Therefore, the protection scope of the present application should be determined by the protection scope of the claims.

Claims (50)

1. An encoding method applied to an encoding device, characterized in that it comprises:

   Encoding the original data stream to generate a forward error correction FEC code block, the FEC code block includes a plurality of data code blocks, a first overhead code block and a second overhead code block, wherein the FEC code block includes N rows, the first overhead code block is located in each of the N rows of the FEC code block, the second overhead code block is located in M rows of the FEC code block, M is less than or equal to N, and M and N are an integer greater than zero;

   Send the FEC code block.
2. The method according to claim 1, further comprising:

   Selecting any one of the general error position GEL code, the general concatenated code GCC, the tensor product and the general integrated interleaving GII code as the component code of the spatially coupled code to generate the first overhead code block and the first overhead code block Two overhead code blocks.
3. The method according to claim 2, further comprising:

   When the second overhead code block is generated according to the code word C _GEL of the GEL code, the column code of the GEL code is checked using the check matrix H _B of C _GEL , and the second overhead code block is generated by encoding the row codes of the first parity check matrix, and the first parity check matrix is determined according to the product of the sub-matrix of the _HB and the sub-matrix of the GEL code.
4. The method according to any one of claims 1 to 3, wherein when the component code of the spatially coupled code is the GEL code, the component code includes a historical code block, the plurality of data codes block, the first overhead code block and the second overhead code block.
5. The method according to claim 4, wherein when the second overhead code block is generated according to the code word C _GEL of the GEL code, the component code is the GEL code;

   Wherein, the C _GEL is a matrix of 2.n rows and h columns comprising 4 inner codes and 3 outer codes, the code length of the inner code and the code length of the outer code are 2.n and h respectively, The inner code B ₀ of the C _GEL is the identity codeword [2·n,2·n,1] ₂ , B ₁ is the codeword [2·n,k,d] ₂ , and B ₂ is the codeword [2 n,k ₂ ,d ₂ ] ₂ , B ₃ is an all-zero codeword, and the outer code A ₁ of the C _GEL is a Galois Field

   

   The all-zero codeword on A ₂ is the Galois Field

   

   codeword on

   

   A ₃ is Galois field

   

   identity codeword on

   

   m ₁ =2·nk, m ₂ =kk ₂ , m ₃ =k ₂ .
6. The method according to claim 4 or 5, wherein the historical code block comprises n×h bits, and the plurality of data code blocks comprise k ₂ ·h+K·m ₂ bits of the original data stream , the first overhead code block includes m ₁ ×h bits of original overhead, and the second overhead code block includes (hK)·m ₂ bits of additional overhead.
7. The method according to any one of claims 4 to 6, wherein when sending the FEC code block, the generated semi-infinite sequence is

   

   Wherein, V _i is a binary matrix with h rows and n columns, and V _i includes s square matrixes with h rows and h columns (V _i,0 V _i,1 ... V _i,s-1 ), s=n/h, s, h and n are integers greater than 0;

   When i=0,1,2,...,N ₀ , the matrix V _i is an all-zero matrix with h rows and n columns;

   When i>N ₀ , the component code in the space coupling code is the GEL code, and the GEL code is

   

   Among them, V ^T is the transpose of matrix V, N ₀ is a non-negative integer determined according to the coupling mode of the space-coupled code, and π _i,k (V) is the rearrangement of matrix V according to any rearrangement rule Definitely, k=0,1,2,...,s-1.
8. The method according to claim 7, wherein the semi-infinite sequence V is generated based on the bits of the historical code block and the bits of the original data stream according to the encoding method of the GEL code. bits of the first overhead code block and bits of the second overhead code block.
9. The method according to claim 7, wherein the semi-infinite sequence V is generated based on the bits of the historical code block and the bits of the original data stream according to the encoding method of the GEL code. bits of the second overhead code block, and bits of the first overhead code block generated based on the bits of the second overhead code block.
10. The method according to any one of claims 4 to 9, wherein when the component code of the space-coupled code is the GEL code, the FEC code block is a sub-matrix transformation of the component code rearrangement of settings,

    Wherein, the component code is a matrix with 256 rows and 16 columns, the sub-matrix is a matrix with 128 rows and 16 columns after the component code, and the component code includes the historical code block, the plurality of data code blocks and In the first overhead code block, the FEC code block includes eight 16-row and 16-column sub-matrices V _i,t (r, c) arranged row-wise and 16-row and 128-column matrices, where r and c are the The row number and column number of the sub-matrix, i is the row number of the FEC code block, t is the column number of the FEC code block, i is an integer greater than or equal to 0, and t is greater than or equal to 0 and less than or An integer equal to 7, r and c are integers greater than 0 and less than or equal to 15.
11. The method according to any one of claims 4 to 10, wherein the submatrix transposition of the component codes is the plurality of data code blocks, the first overhead code block and the second overhead The transposition of the code block, the sub-matrix transposition includes 8 sub-matrixes (A' _{i, t} (r, c)) ^T of 16 rows and 16 columns arranged in the row direction, a matrix of 16 rows and 128 columns, where r and c are the row number and column number of the sub-matrix respectively, t is an integer greater than or equal to 0 and less than or equal to 7, i is an integer greater than or equal to 0, r and c are greater than or equal to 0 and less than or equal to An integer of 15.
12. The method according to claim 11, wherein the second overhead code block is located at (A' _i,6 (r,c)) ^T , where r is an integer greater than or equal to 14 and less than or equal to 15 , c is an integer greater than or equal to 7 and less than or equal to 14, and the first overhead code block is located at (A′ _i,6 (r,c ₁ )) ^T and (A′ _i,7 (r,c ₂ ) ) ^T , r is an integer greater than or equal to 0 and less than or equal to 15, c ₁ is 15, and c ₂ is an integer greater than or equal to 0 and less than or equal to 15.
13. The method according to any one of claims 4 to 12, further comprising:

    The historical code block includes eight 16-row and 16-column sub-matrices C _{i, t} arranged in a column-wise 128-row and 16-column matrix,

    When the i in the FEC code block V _i is an even number, select the jth 16-row and 16-column matrix V i-19+2*j, j of the historical FEC code block whose sequence number _{is i-19+2*j} Transpose and rearrange and then transpose to obtain C _i,j in the historical code block;

    When the i in the FEC code block V _i is an odd number, select the jth 16-row and 16-column matrix V i-21+2*j _{, j of the historical FEC code block whose sequence number is i-21+2*j} Transpose and rearrange and then transpose to obtain C _i,j in the history code block.
14. The method according to any one of claims 4 to 13, further comprising:

    The historical code block includes eight 16-row and 16-column sub-matrices C _{i, t} arranged in a column-wise 128-row and 16-column matrix, and the FEC code block is selected from the historical FEC code block whose serial number is i-27+j The j-th 16-row and 16-column matrix V _i-27+j,j is transposed, rearranged and then transposed to obtain C _i,j in the historical code block.
15. A decoding method applied to a decoding device, characterized in that it comprises:

    Receiving a forward error correction FEC code block;

    Decoding the FEC code block to restore the original data stream, the FEC code block includes a plurality of data code blocks, a first overhead code block, and a second overhead code block, where the FEC code block includes N rows, The first overhead code block is located in each of the N rows of the FEC code block, the second overhead code block is located in M rows of the FEC code block, M is less than or equal to N, and M and N are greater than zero an integer of .
16. The method according to claim 15, further comprising:

    Selecting any one of the general error position GEL code, the general concatenated code GCC, the tensor product and the general integrated interleaving GII code as the component code of the spatially coupled code to generate the first overhead code block and the first overhead code block Two overhead code blocks.
17. The method according to claim 16, further comprising:

    When the second overhead code block is generated according to the code word C _GEL of the GEL code, the column code of the GEL code is checked using the check matrix H _B of C _GEL , and the second overhead code block is generated by encoding the row codes of the first parity check matrix, and the first parity check matrix is determined according to the product of the sub-matrix of the _HB and the sub-matrix of the GEL code.
18. The method according to any one of claims 15 to 17, wherein when the component code of the spatially coupled code is the GEL code, the component code includes a historical code block, the plurality of data codes block, the first overhead code block and the second overhead code block.
19. The method according to claim 18, wherein when the component code of the space-coupled code is the GEL code, the FEC code block is a rearrangement of the submatrix transposition of the component code,

    Wherein, the component code is a matrix with 256 rows and 16 columns, the sub-matrix is a matrix with 128 rows and 16 columns after the component code, and the component code includes the historical code block, the plurality of data code blocks and In the first overhead code block, the FEC code block includes eight 16-row and 16-column sub-matrices V _i,t (r, c) arranged row-wise and 16-row and 128-column matrices, where r and c are the The row number and column number of the sub-matrix, i is the row number of the FEC code block, t is the column number of the FEC code block, t is an integer greater than or equal to 0 and less than or equal to 7, and i is greater than or equal to An integer equal to 0, r and c are integers greater than 0 and less than or equal to 15.
20. The method according to claim 18 or 19, wherein the sub-matrix transposition of the component codes is a transposition of the plurality of data code blocks, the first overhead code block, and the second overhead code block set, the sub-matrix transpose includes 8 sub-matrixes (A' _i,t (r,c)) ^T with 16 rows and 16 columns arranged row-wise, a matrix with 16 rows and 128 columns, where r and c are respectively The row number and column number of the sub-matrix (A' _i,t (r,c)) ^T , t is an integer greater than or equal to 0 and less than or equal to 7, i is an integer greater than or equal to 0, r and c An integer greater than or equal to 0 and less than or equal to 15.
21. The method according to claim 20, wherein the second overhead code block is located at (A' _i,6 (r,c)) ^T , where r is an integer greater than or equal to 14 and less than or equal to 15 , c is an integer greater than or equal to 7 and less than or equal to 14, and the first overhead code block is located at (A′ _i,6 (r,c ₁ )) ^T and (A′ _i,7 (r,c ₂ ) ) ^T , r is an integer greater than or equal to 0 and less than or equal to 15, c ₁ is 15, and c ₂ is an integer greater than or equal to 0 and less than or equal to 15.
22. The method according to any one of claims 18 to 21, further comprising:

    The historical code block includes eight 16-row and 16-column sub-matrices C _{i, t} arranged in a column-wise 128-row and 16-column matrix,

    When the i in the FEC code block V _i is an even number, select the jth 16-row and 16-column matrix V i-19+2*j, j of the historical FEC code block whose sequence number _{is i-19+2*j} Transpose and rearrange and then perform transpose to obtain C _i,j in the historical code block;

    When the i in the FEC code block V _i is an odd number, select the jth 16-row and 16-column matrix V i-21+2*j _{, j of the historical FEC code block whose sequence number is i-21+2*j} Transpose and rearrange and then perform transpose to obtain C _i,j in the history code block.
23. The method according to any one of claims 18 to 22, further comprising:

    The historical code block includes eight 16-row and 16-column sub-matrices C _{i, t} arranged in a column-wise 128-row and 16-column matrix, and the FEC code block is selected from the historical FEC code block whose serial number is i-27+j The j-th 16-row and 16-column matrix V _i-27+j,j is transposed and rearranged, and then transposed to obtain C _i,j in the historical code block.
24. An encoding device, characterized in that it comprises:

    A processing unit, configured to encode the original data stream to generate a forward error correction FEC code block, where the FEC code block includes a plurality of data code blocks, a first overhead code block, and a second overhead code block, wherein the The FEC code block includes N rows, the first overhead code block is located in each of the N rows of the FEC code block, and the second overhead code block is located in M rows of the FEC code block, and M is less than or equal to N , M and N are integers greater than zero;

    A transceiver unit, configured to send the FEC code block.
25. Encoding device according to claim 24, characterized in that,

    The processing unit is also used for: selecting any code word in general error position GEL code, general concatenated code GCC, tensor product and general integrated interleaving GII code as the component code of space coupling code, to generate the described The first overhead code block and the second overhead code block.
26. Encoding device according to claim 25, characterized in that,

    The processing unit is further configured to: when the second overhead code block is generated according to the code word C _GEL of the GEL code, use the parity check matrix H _B of C _GEL to correct the column code of the GEL code test, the second overhead code block is generated by encoding the row codes of the first parity check matrix, and the first parity check matrix is based on the product of the sub-matrix of the H _B and the sub-matrix of the GEL code definite.
27. The encoding device according to any one of claims 24 to 26, wherein when the component code of the space-coupled code is the GEL code, the component code includes a historical code block, the plurality of data code block, the first overhead code block, and the second overhead code block.
28. The encoding device according to claim 27, wherein when the second overhead code block is generated according to the codeword C _GEL of the GEL code, the component code is the GEL code;

    Wherein, the C _GEL is a matrix of 2.n rows and h columns comprising 4 inner codes and 3 outer codes, the code length of the inner code and the code length of the outer code are 2.n and h respectively, The inner code B ₀ of the C _GEL is the identity codeword [2·n,2·n,1] ₂ , B ₁ is the codeword [2·n,k,d] ₂ , and B ₂ is the codeword [2 n,k ₂ ,d ₂ ] ₂ , B ₃ is an all-zero codeword, and the outer code A ₁ of the C _GEL is a Galois Field

    

    The all-zero codeword on A ₂ is the Galois Field

    

    codeword on

    

    A ₃ is Galois field

    

    identity codeword on

    

    m ₁ =2·nk, m ₂ =kk ₂ , m ₃ =k ₂ .
29. The encoding device according to claim 27 or 28, wherein the historical code block comprises n×h bits, and the plurality of data code blocks comprise k ₂ ·h+K·m ₂ of the original data stream bits, the first overhead code block includes m ₁ ×h bits of original overhead, and the second overhead code block includes (hK)·m ₂ bits of additional overhead.
30. The encoding device according to any one of claims 27 to 29, wherein when the transceiver unit sends the FEC code block, the generated semi-infinite sequence is

    

    Wherein, V _i is a binary matrix with h rows and n columns, and V _i includes s square matrixes with h rows and h columns (V _i,0 V _i,1 ... V _i,s-1 ), s=n/h, s, h and n are integers greater than 0;

    When i=0,1,2,...,N ₀ , the matrix V _i is an all-zero matrix with h rows and n columns;

    When i>N ₀ , the component code in the space coupling code is the GEL code, and the GEL code is

    

    Among them, V ^T is the transpose of matrix V, N ₀ is a non-negative integer determined according to the coupling mode of the space-coupled code, and π _i,k (V) is the rearrangement of matrix V according to any rearrangement rule Definitely, k=0,1,2,...,s-1.
31. The encoding device according to claim 30, wherein the semi-infinite sequence V is generated based on the bits of the historical code block and the bits of the original data stream according to the encoding method of the GEL code bits of the first overhead code block and bits of the second overhead code block.
32. The encoding device according to claim 30, wherein the semi-infinite sequence V is generated based on the bits of the historical code block and the bits of the original data stream according to the encoding method of the GEL code bits of the second overhead code block, and bits of the first overhead code block generated based on the bits of the second overhead code block.
33. The encoding device according to any one of claims 27 to 32, wherein when the component code of the space-coupled code is the GEL code, the FEC code block is a sub-matrix for the component code transposed rearrangement,

    Wherein, the component is a matrix with 256 rows and 16 columns, and the sub-matrix is a matrix with 128 rows and 16 columns after the component code, and the component code includes the historical code block, the multiple data code blocks and the In the first overhead code block, the FEC code block includes eight 16-row and 16-column sub-matrices V _i,t (r, c) arranged row-wise and 16-row and 128-column matrices, where r and c are the The row number and column number of the sub-matrix, i is the row number of the FEC code block, t is the column number of the FEC code block, i is an integer greater than or equal to 0, and t is greater than or equal to 0 and less than or equal to An integer of 7, r and c are integers greater than 0 and less than or equal to 15.
34. The encoding device according to any one of claims 27 to 33, wherein the submatrix transposition of the component codes is the plurality of data code blocks, the first overhead code block and the second The transposition of the overhead code block, the sub-matrix transposition includes 8 sub-matrixes (A' _i,t (r,c)) ^T of 16 rows and 16 columns arranged in the row direction, a matrix of 16 rows and 128 columns, wherein, r and c are the row number and column number of the sub-matrix (A' _i,t (r,c)) ^T respectively, t is an integer greater than or equal to 0 and less than or equal to 7, and i is an integer greater than or equal to 0 Integer, r and c are integers greater than or equal to 0 and less than or equal to 15.
35. The encoding device according to claim 34, wherein the second overhead code block is located at (A' _i,6 (r,c)) ^T , where r is greater than or equal to 14 and less than or equal to 15 Integer, c is an integer greater than or equal to 7 and less than or equal to 14, and the first overhead code block is located at (A' _i,6 (r,c ₁ )) ^T and (A' _i,7 (r,c ₂ )) ^T , r is an integer greater than or equal to 0 and less than or equal to 15, c ₁ is 15, and c ₂ is an integer greater than or equal to 0 and less than or equal to 15.
36. The encoding device according to any one of claims 27 to 35, wherein the historical code block includes eight 16-row and 16-column sub-matrices C _{i, t} arranged in a column-wise matrix with 128 rows and 16 columns , the processing unit is also used for:

    When the i in the FEC code block V _i is an even number, select the jth 16-row and 16-column matrix V i-19+2*j, j of the historical FEC code block whose sequence number _{is i-19+2*j} Transpose and rearrange and then transpose to obtain C _i,j in the historical code block;

    When the i in the FEC code block V _i is an odd number, select the jth 16-row and 16-column matrix V i-21+2*j _{, j of the historical FEC code block whose sequence number is i-21+2*j} Transpose and rearrange and then transpose to obtain C _i,j in the history code block.
37. An encoding device according to any one of claims 27 to 36, characterized in that

    The historical code block includes 8 sub-matrixes C _{i, t} of 16 rows and 16 columns arranged in a column direction and a matrix of 128 rows and 16 columns, and the processing unit is used for the selection number of the FEC code block is i-27+ The j-th 16-row and 16-column matrix V _i-27+j,j of j's historical FEC code block is transposed, rearranged, and then transposed to obtain C _i,j in the historical code block.
38. A decoding device, characterized in that it comprises:

    A transceiver unit, configured to receive forward error correction FEC code blocks;

    A processing unit, configured to decode the FEC code block to restore the original data stream, the FEC code block includes a plurality of data code blocks, a first overhead code block, and a second overhead code block, wherein the FEC code The block includes N rows, the first overhead code block is located in each of the N rows of the FEC code block, the second overhead code block is located in M rows of the FEC code block, and M is less than or equal to N, M and N is an integer greater than zero.
39. Decoding device according to claim 38, characterized in that

    The processing unit is also used to select any code word in the general error position GEL code, the general concatenated code GCC, the tensor product and the general integrated interleaving GII code as the component code of the space coupled code, so as to generate the first an overhead code block and the second overhead code block.
40. Decoding device according to claim 39, characterized in that,

    The processing unit is further configured to, when the second overhead code block is generated according to the code word C _GEL of the GEL code, use the check matrix H _B of C _GEL to check the column code of the GEL code , the second overhead code block is generated by encoding the row codes of the first parity check matrix, and the first parity check matrix is determined according to the product of the submatrix of the H _B and the submatrix of the GEL code of.
41. The decoding device according to any one of claims 38 to 40, wherein when the component code of the space-coupled code is the GEL code, the component code includes a historical code block, the plurality of data code block, the first overhead code block, and the second overhead code block.
42. The decoding device according to claim 41, wherein when the component code of the space-coupled code is the GEL code, the FEC code block is a rearrangement of sub-matrix transposition of the component code,

    Wherein, the component code is a matrix with 256 rows and 16 columns, the sub-matrix is a matrix with 128 rows and 16 columns after the component code, and the component code includes the historical code block, the plurality of data code blocks and In the first overhead code block, the FEC code block includes eight 16-row and 16-column sub-matrices V _i,t (r, c) arranged row-wise and 16-row and 128-column matrices, where r and c are the The row number and column number of the sub-matrix, i is the row number of the FEC code block, t is the column number of the FEC code block, t is an integer greater than or equal to 0 and less than or equal to 7, and i is greater than or equal to An integer equal to 0, r and c are integers greater than 0 and less than or equal to 15.
43. The decoding device according to claim 41 or 42, wherein the sub-matrix transposition of the component codes is the sub-matrix transposition of the plurality of data code blocks, the first overhead code block and the second overhead code block Transpose, the sub-matrix transpose includes 8 sub ^- matrixes (A' _{i, t} (r, c)) of 16 rows and 16 columns arranged in row direction, a matrix of 16 rows and 128 columns, where r and c are respectively is the row number and column number of the sub-matrix (A' _i,t (r,c)) ^T , t is an integer greater than or equal to 0 and less than or equal to 7, i is an integer greater than or equal to 0, r and c is an integer greater than or equal to 0 and less than or equal to 15.
44. The decoding device according to claim 43, wherein the second overhead code block is located at (A' _i,6 (r,c)) ^T , where r is greater than or equal to 14 and less than or equal to 15 Integer, c is an integer greater than or equal to 7 and less than or equal to 14, and the first overhead code block is located at (A' _i,6 (r,c ₁ )) ^T and (A' _i,7 (r,c ₂ )) ^T , r is an integer greater than or equal to 0 and less than or equal to 15, c ₁ is 15, and c ₂ is an integer greater than or equal to 0 and less than or equal to 15.
45. The decoding device according to any one of claims 41 to 44, wherein the historical code block includes 8 sub-matrices C _{i, t} of 16 rows and 16 columns arranged in a column direction and a matrix of 128 rows and 16 columns , the processing unit is also used for:

    When the i in the FEC code block V _i is an even number, select the jth 16-row and 16-column matrix V i-19+2*j, j of the historical FEC code block whose sequence number _{is i-19+2*j} Transpose and rearrange and then transpose to obtain C _i,j in the historical code block;

    When the i in the FEC code block V _i is an odd number, select the jth 16-row and 16-column matrix V i-21+2*j of the historical FEC code block whose sequence number _{is i-21+2*j, j} is transposed and rearranged, and then transposed to obtain C _i,j in the historical code block.
46. The decoding device according to any one of claims 41 to 45, wherein the historical code block includes 8 sub-matrices C _{i, t} of 16 rows and 16 columns arranged in a column direction and a matrix of 128 rows and 16 columns , the processing unit is also used for the FEC code block to select the j-th 16-row 16-column matrix V _{i-27+j,j of the historical FEC code block whose sequence number is i-27+j, and} perform transposition and rearrangement Transpose again to obtain C _i,j in the history code block.
47. A communication device, characterized in that it includes: a processor and an interface circuit, the interface circuit is used to receive signals from other communication devices other than the communication device and transmit them to the processor or transfer signals from the processing The signal of the processor is sent to other communication devices other than the communication device, and the processor uses a logic circuit or executes code instructions for the communication device to realize any one of claims 1 to 14, 15 to 23 Methods.
48. A chip, characterized by comprising: a processor, configured to invoke and run a computer program from a memory, so that the chip installed therein executes the method according to any one of claims 1-14, 15-23.
49. A computer storage medium, characterized in that computer instructions are stored in the computer storage medium, and when the instructions are executed on a computer, the computer executes the computer according to any one of claims 1 to 14, 15 to 23. described method.
50. A computer program product, characterized in that, when the computer program code or instructions are executed on a computer, the computer executes the method according to any one of claims 1-14, 15-23.

Images