WO2023060779A1 - 电流控制电路、显示面板驱动装置及显示装置 - Google Patents

电流控制电路、显示面板驱动装置及显示装置 Download PDF

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Publication number
WO2023060779A1
WO2023060779A1 PCT/CN2021/143356 CN2021143356W WO2023060779A1 WO 2023060779 A1 WO2023060779 A1 WO 2023060779A1 CN 2021143356 W CN2021143356 W CN 2021143356W WO 2023060779 A1 WO2023060779 A1 WO 2023060779A1
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WIPO (PCT)
Prior art keywords
terminal
signal output
conversion chip
level conversion
unit
Prior art date
Application number
PCT/CN2021/143356
Other languages
English (en)
French (fr)
Inventor
周仁杰
康报虹
Original Assignee
惠科股份有限公司
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Filing date
Publication date
Application filed by 惠科股份有限公司 filed Critical 惠科股份有限公司
Priority to KR1020227041983A priority Critical patent/KR20230054317A/ko
Priority to JP2022573631A priority patent/JP2023549993A/ja
Publication of WO2023060779A1 publication Critical patent/WO2023060779A1/zh

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2230/00—Details of flat display driving waveforms
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0248—Precharge or discharge of column electrodes before or after applying exact column voltages
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0267—Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/06—Details of flat display driving waveforms
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/025—Reduction of instantaneous peaks of current
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/04—Display protection

Definitions

  • the present application relates to the field of display technology, in particular to a current control circuit, a display panel driving device and a display device.
  • a display device generally includes a timing control chip, a level conversion chip and a display panel.
  • the timing control chip is used to output timing control signals to the level conversion chip
  • the level conversion chip is used to generate multiple Gate Driver on Array (GOA) signals according to the timing control signals, such as gate open signal, gate close signal, Scan signal, reset signal, etc.
  • the level conversion chip has multiple signal output terminals, and the multiple signal output terminals are used to output multiple GOA signals one by one.
  • the display panel has multiple signal input terminals for inputting multiple GOA signals one by one. Multiple GOA signals are used to drive the display panel, so that the display panel displays images.
  • the display device further includes a discharge circuit.
  • the discharge circuit works, and the multiple signal output ends of the level conversion chip are short-circuited through the discharge circuit.
  • the signal output terminal of the level conversion chip for outputting the gate closing signal will output a high level signal, and the other signal output terminals of the level conversion chip will not output level signals.
  • multiple signal input terminals of the display panel input high-level signals, and all transistors in the display panel are turned on, so that the charges in the display panel are fully released.
  • the discharge circuit short-circuits the multiple signal output terminals of the level conversion chip, the multiple signal input terminals of the display panel all input high-level signals, which may cause the current in the display panel to increase instantaneously, resulting in The display panel is damaged.
  • One of the purposes of the embodiments of the present application is to provide a current control circuit, a display panel driving device and a display device, which can accurately control the magnitude of the current in the display panel after the display device receives a shutdown command, thereby protecting the display panel.
  • a current control circuit which is applied to a display panel driving device, and the display panel driving device includes a level shifting chip, and the level shifting chip has a plurality of signal output terminals, and the level shifting chip The multiple signal output terminals of the display panel are connected to the multiple signal input terminals of the display panel one by one.
  • the level conversion chip receives the shutdown command, the first signal in the multiple signal output terminals of the level conversion chip The output terminal outputs a high level signal;
  • the current control circuit includes: an energy storage unit, a first switch unit and a pulse width modulation unit;
  • the first end of the energy storage unit is used to connect with the first signal output end of the level shifting chip to input a high level signal
  • the second end of the energy storage unit is used to connect with the level conversion chip
  • At least one second signal output terminal of the chip is connected, and the second signal output terminal is a signal output terminal other than the first signal output terminal among the multiple signal output terminals of the level conversion chip;
  • the first terminal of the first switch unit is used to connect to the first preset voltage terminal, the second terminal of the first switch unit is connected to the first terminal of the energy storage unit, and the first terminal of the first switch unit
  • the control terminal is connected to the output terminal of the pulse width modulation unit
  • the output terminal of the pulse width modulation unit is used to output a pulse width modulation signal, and the pulse width modulation signal is used to control the duty cycle of the first switch unit to control the voltage of the first terminal of the energy storage unit size and the size of the current in the energy storage unit.
  • the current control circuit further includes: a second switch unit and a comparison control unit;
  • the first terminal of the second switch unit is used to connect to the first signal output terminal of the level conversion chip, and the second terminal of the second switch unit is connected to the first terminal of the energy storage unit;
  • the first input terminal of the comparison control unit is used to connect to the first signal output terminal of the level conversion chip
  • the second input terminal of the comparison control unit is used to connect to the second preset voltage terminal
  • the The voltage of the second preset voltage terminal is lower than the voltage of the high-level signal
  • the output terminal of the comparison control unit is connected to the control terminal of the second switch unit, so that when the first input terminal of the comparison control unit is input When the signal is at a high level, the second switch unit is controlled to be turned on.
  • the comparison control unit includes: a resistor R1, a resistor R2, and an operational amplifier A1;
  • the first end of the resistor R1 is used to connect with the first signal output end of the level conversion chip
  • the first end of the resistor R2 is connected to the second end of the resistor R1, and the second end of the resistor R2 is used to connect to the second preset voltage end;
  • the noninverting input terminal of the operational amplifier A1 is connected to the second terminal of the resistor R1
  • the inverting input terminal of the operational amplifier A1 is connected to the second terminal of the resistor R2
  • the output terminal of the operational amplifier A1 is connected to the second terminal of the resistor R2.
  • the control end of the second switch unit is connected.
  • the second switch unit includes: a transistor M1;
  • the gate of the transistor M1 is connected to the output terminal of the comparison control unit, the drain of the transistor M1 is used to be connected to the first signal output terminal of the level conversion chip, and the source of the transistor M1 is connected to the output terminal of the comparison control unit.
  • the first end of the energy storage unit is connected.
  • the current control circuit further includes: a third switch unit;
  • the first end of the third switch unit is used to connect to the first signal output end of the level conversion chip, the second end of the third switch unit is connected to the second end of the energy storage unit, so The control end of the third switch unit is connected to the output end of the comparison control unit, so as to control the third switch unit to conduct when the first input end of the comparison control unit inputs a low level signal.
  • the third switch unit includes: a transistor M2;
  • the gate of the transistor M2 is connected to the output terminal of the comparison control unit, the source of the transistor M2 is used to be connected to the first signal output terminal of the level conversion chip, and the drain of the transistor M2 is connected to the output terminal of the comparison control unit.
  • the second end of the energy storage unit is connected.
  • the current control circuit further includes: a Zener diode D1;
  • the anode of the Zener diode D1 is used to connect to the second preset voltage terminal, the voltage of the second preset voltage terminal is lower than the voltage of the first preset voltage terminal, and the cathode of the Zener diode D1 is connected to the second preset voltage terminal.
  • the first end of the first switch unit is connected.
  • the current control circuit further includes: a diode D2;
  • the anode of the diode D2 is used to connect to the first signal output end of the level shifting chip, and the cathode of the diode D2 is connected to the first end of the energy storage unit.
  • a display panel driving device including a level conversion chip and the current control circuit as described in any one of the above first aspects;
  • the level conversion chip has a plurality of signal output terminals, the multiple signal output terminals of the level conversion chip are used to connect with the multiple signal input terminals of the display panel one by one, and the level conversion chip receives the shutdown command , the first signal output terminal among the multiple signal output terminals of the level conversion chip outputs a high-level signal.
  • a display device including a display panel and the display panel driving device as described in the second aspect above;
  • the display panel has multiple signal input terminals
  • the level conversion chip has multiple signal output terminals
  • the multiple signal output terminals of the level conversion chip are connected to the multiple signal input terminals of the display panel one by one
  • the first signal output terminal among the multiple signal output terminals of the level conversion chip outputs a high-level signal.
  • the current control circuit includes an energy storage unit, a first switch unit and a pulse width modulation unit.
  • the first terminal of the energy storage unit is connected to the first preset voltage terminal through the first switch unit, and the first terminal of the energy storage unit is also connected to the first signal output terminal of the level conversion chip to input a high level signal.
  • the second terminal of the energy storage unit is connected with other signal output terminals of the level conversion chip.
  • the pulse width modulation unit is used for adjusting the duty ratio of the first switch unit.
  • the pulse width modulation unit can adjust the voltage output from the first preset voltage end to the first end of the energy storage unit through the first switch unit by adjusting the duty ratio of the first switch unit , so as to accurately control the voltage and current of the energy storage unit.
  • the second terminal of the energy storage unit is connected to at least one second signal output terminal
  • the second signal output terminal is a signal output terminal other than the first signal output terminal among the multiple signal output terminals of the level conversion chip
  • the multiple signal output terminals of the level shifting chip are used to connect with multiple signal input terminals of the display panel one by one. Therefore, by accurately controlling the current of the energy storage unit, the current of at least one new input terminal of the display panel can be accurately controlled, thereby accurately controlling the current in the display panel and protecting the display panel.
  • FIG. 1 is a schematic structural diagram of a display device provided in Embodiment 1 of the present application.
  • FIG. 2 is a schematic structural diagram of a current control circuit provided in Embodiment 2 of the present application.
  • FIG. 3 is a circuit structure diagram of a current control circuit provided in Embodiment 2 of the present application.
  • FIG. 4 is a schematic structural diagram of a current control circuit provided in Embodiment 3 of the present application.
  • FIG. 5 is a circuit structure diagram of a current control circuit provided in Embodiment 3 of the present application.
  • FIG. 6 is a circuit structure diagram of a current control circuit provided in Embodiment 4 of the present application.
  • FIG. 1 is a schematic structural diagram of a display device provided in Embodiment 1 of the present application.
  • the display device includes a display panel driving device 20 and a display panel 30 .
  • the display panel driving device 20 is used to drive the display panel 30 .
  • the display panel driving device 20 includes a timing control chip 210 , a level conversion chip 220 and a current control circuit 10 .
  • the timing control chip 210 is used to acquire the image data of the image to be displayed, and generate a timing control signal according to the image data of the image to be displayed.
  • the level conversion chip 220 is used to obtain the timing control signal output by the timing control chip 210, and generate multiple GOA signals according to the timing control signal.
  • the multiple GOA signals may respectively include a gate opening signal VGH, a gate closing signal VGL, a scan signal CLK, a reset signal RST, and a polarity switching signal LC.
  • the gate opening signal VGH can be a continuous high level signal
  • the gate closing signal VGL can be a continuous low level signal
  • the scanning signal CLK, reset signal RST and polarity switching signal LC can be composed of a high level signal and a low level signal.
  • the level conversion chip 220 has a plurality of signal output ends, and the plurality of signal output ends are used to output a plurality of GOA signals one by one.
  • the signal output end of the level conversion chip 220 used to output the gate closing signal VGL is called the first signal output end 222; among the multiple signal output ends of the level conversion chip 220 Other signal output terminals except the first signal output terminal 222 are called the second signal output terminal 224 .
  • the display panel 30 has multiple signal input terminals, and the multiple signal input terminals of the display panel 30 include a first signal input terminal 302 and a second signal input terminal 304 .
  • the multiple signal output terminals of the level conversion chip 220 (including the first signal output terminal 222 and the second signal output terminal 224 ) are connected to the multiple signal input terminals of the display panel 30 one by one, so that the multiple signal output terminals of the level conversion chip 220
  • the multiple GOA signals output from the signal output terminals one by one can be input to the multiple signal input terminals of the display panel 30 one by one. Multiple GOA signals are used to drive the display panel 30 .
  • the gate open signal VGH is used to drive the transistors in the display panel 30 to be turned on
  • the gate close signal VGL is used to drive the transistors in the display panel 30 to be turned off.
  • the scan signal CLK is used to scan gates of transistors in the display panel 30 .
  • the polarity switching signal LC is used to control the polarity inversion of the pixel electrodes relative to the common electrodes in the panel.
  • the signal input terminal connecting the display panel 30 with the first signal output terminal 222 is called the first signal input terminal 302
  • the signal input terminal connecting the display panel 30 with the second signal output terminal 224 The signal input terminal is called the second signal input terminal 304 .
  • the input terminal of the current control circuit 10 is connected to the first signal output terminal 222 , and the output terminal of the current control circuit 10 is connected to at least one second signal output terminal 224 . That is to say, the output terminal of the current control circuit 10 is connected to at least one second signal input terminal 304 .
  • the display device receives the shutdown command, that is, when the timing control chip 210 and the level conversion chip 220 in the display device receive the shutdown command, the first signal output terminal 222 of the level conversion chip 220 will output a high level signal, And the second signal output terminals 224 of the level conversion chip 220 stop outputting electrical signals.
  • the current control circuit 10 is used to control the current of the second signal input terminal 304 connected thereto, thereby controlling the current in the display panel 30 to protect the display panel 30 after receiving the shutdown command.
  • the current control circuit 10 is located in the display panel driving device 20 and is independent of the level conversion chip 220 . In some other embodiments, the current control circuit 10 can also be integrated in the level conversion chip 220 .
  • the current control circuit 10 provided by the present application will be explained in detail below from different embodiments.
  • FIG. 2 is a schematic structural diagram of the current control circuit 10 provided in Embodiment 2 of the present application. As shown in FIG. 2 , the current control circuit 10 includes an energy storage unit 110 , a first switch unit 120 and a pulse width modulation unit 130 .
  • the energy storage unit 110 has a first end a and a second end b.
  • the first terminal a of the energy storage unit 110 is connected to the first signal output terminal 222 of the level conversion chip 220 .
  • the second terminal b of the energy storage unit 110 is used to be connected to at least one second signal output terminal 224 . That is to say, the second terminal b of the energy storage unit 110 is used to be connected to at least one second signal input terminal 304 .
  • the first switch unit 120 has a first terminal c, a second terminal d and a control terminal e.
  • the first terminal c of the first switch unit 120 is used to be connected to the first preset voltage terminal V1.
  • the first preset voltage terminal V1 is used to output a first preset voltage. In some embodiments, the first preset voltage may be 12V.
  • the second terminal d of the first switch unit 120 is connected to the first terminal a of the energy storage unit 110 .
  • the control terminal e of the first switch unit 120 is used to control the conduction between the first terminal c and the second terminal d of the first switch unit 120 .
  • the pulse width modulation unit 130 has an output f.
  • the output terminal f of the pulse width modulation unit 130 is connected to the control terminal e of the first switch unit 120 .
  • the output terminal f of the pulse width modulation unit 130 is used to output a pulse width modulation signal, and the pulse width modulation signal is used to control the on and off of the first switch unit 120, that is, the first terminal c of the first switch unit 120 and the second On and off between terminals d.
  • the pulse width modulation signal may be a pulse signal composed of high-level signals and low-level signals alternately.
  • one of the high-level signal and the low-level signal is used to control the first switch unit 120 to be turned on, and the other of the high-level signal and the low-level signal is used to control the first switch unit 120 to be turned off.
  • the pulse width modulation signal is used to control the duty ratio of the first switch unit 120 , thereby controlling the voltage at the first terminal a of the energy storage unit 110 and the current in the energy storage unit 110 .
  • the duty cycle of the first switch unit 120 refers to the percentage of the conduction time of the first switch unit 120 to the cycle time during a turn-on and turn-off cycle of the first switch unit 120 .
  • the pulse width modulation signal first controls the first switch unit 120 to be continuously turned on for 0.01 seconds, and then controls the first switch unit 120 to be continuously turned off for 0.09 seconds.
  • the wide adjustment signal still firstly controls the first switch unit 120 to be turned on for 0.01 seconds, and then controls the first switch unit 120 to be turned off for 0.09 seconds.
  • the duty cycle of the first switch unit 120 is 10%.
  • the voltage of the first preset voltage terminal V1 is 12V
  • the duty ratio of the first switch unit 120 is 10%
  • the first preset voltage terminal V1 is output to the first switch unit 120 of the energy storage unit 110 through the first switch unit 120.
  • the voltage at one terminal a is 1.2V.
  • the pulse width modulation unit 130 may be a separately configured pulse width modulation chip. There is a preset program in the pulse width modulation chip, so that it can output a fixed pulse width modulation signal. In other specific embodiments, the pulse width modulation unit 130 may also be integrated in the timing control chip 210 . That is, the duty cycle of the first switch unit 120 is controlled by the timing control chip 210 .
  • the current control circuit 10 includes an energy storage unit 110 , a first switch unit 120 and a pulse width modulation unit 130 .
  • the first terminal a of the energy storage unit 110 is connected to the first preset voltage terminal V1 through the first switch unit 120, and the first terminal a of the energy storage unit 110 is also connected to the first signal output terminal 222 of the level conversion chip 220, to input a high-level signal.
  • the second terminal b of the energy storage unit 110 is connected to the second signal output terminal 224 of the level conversion chip 220 .
  • the pulse width modulation unit 130 is used to adjust the duty cycle of the first switch unit 120 .
  • the pulse width modulation unit 130 can adjust the output of the first preset voltage terminal V1 to the energy storage unit 110 through the first switch unit 120 by adjusting the duty ratio of the first switch unit 120 .
  • the magnitude of the voltage at the first terminal a accurately controls the magnitude of the voltage and the magnitude of the current of the energy storage unit 110 .
  • the second terminal b of the energy storage unit 110 is connected to at least one second signal output terminal 224 of the level conversion chip 220, that is, the second terminal b of the energy storage unit 110 is connected to at least one second signal input terminal 304 of the display panel 30 Therefore, by accurately controlling the magnitude of the current of the energy storage unit 110 , the magnitude of the current in the display panel 30 can be accurately controlled, thereby protecting the display panel 30 .
  • the level conversion chip 220 in the display panel driving device 20 may have multiple second signal output terminals 224 .
  • the multiple second signal output terminals 224 are not necessarily all connected to the second terminal b of the energy storage unit 110 .
  • the current in the display panel 30 after the level conversion chip 220 receives the shutdown command can be controlled to a certain extent.
  • the second signal output terminal with excessive current after the level conversion chip 220 receives the shutdown command can be detected according to related technologies 224 , and connect the second signal output terminals 224 with excessive currents to the second terminal b of the energy storage unit 110 .
  • FIG. 3 is a circuit structure diagram of the current control circuit 10 provided in Embodiment 2 of the present application.
  • the first switch unit 120 includes a transistor M3.
  • the transistor M3 here may be an N-type MOS (metal oxide semiconductor, metal oxide semiconductor field effect) transistor turned on at a high level. That is to say, when the pulse width modulation signal output by the pulse width modulation unit 130 is at a high level, the transistor M3 is turned on; when the pulse width modulation signal output by the pulse width modulation unit 130 is at a low level, the transistor M3 is turned off.
  • N-type MOS metal oxide semiconductor, metal oxide semiconductor field effect
  • the gate of the transistor M3 is connected to the output terminal f of the pulse width modulation unit 130 , the drain of the transistor M3 is connected to the first preset voltage terminal V1 , and the source of the transistor M3 is connected to the first terminal a of the energy storage unit 110 .
  • the first switch unit 120 may further include a resistor connected between the gate of the transistor M3 and the output terminal f of the pulse width modulation unit 130, or/and, connected between the source of the transistor M3 and the storage The resistor between the first terminal a of the energy unit 110, or/and, the resistor connected between the drain of the transistor M3 and the first preset voltage terminal V1, etc.
  • the energy storage unit 110 may include an inductor L1. A first end of the inductor L1 is connected to the first signal output end 222 of the level conversion chip 220 and is connected to the second end d of the first switch unit 120 . A second end of the inductor L1 is connected to at least one second signal output end 224 . In some other embodiments, the energy storage unit 110 may further include a resistor connected in series with the inductor L1 or the like.
  • FIG. 4 is a schematic structural diagram of the current control circuit 10 provided in Embodiment 3 of the present application. As shown in FIG. 4 , on the basis of the second embodiment, the current control circuit 10 may further include a second switch unit 140 and a comparison control unit 150 .
  • the second switch unit 140 has a first terminal g, a second terminal h and a control terminal i.
  • the first terminal g of the second switch unit 140 is used to connect to the first signal output terminal 222 of the level conversion chip 220
  • the second terminal h of the second switch unit 140 is connected to the first terminal a of the energy storage unit 110 .
  • the control terminal i of the second switch unit 140 is used to control the conduction between the first terminal g and the second terminal h of the second switch unit 140 . That is to say, the second switch unit 140 is connected between the first signal output terminal 222 of the level conversion chip 220 and the first terminal a of the energy storage unit 110 .
  • the second switch unit 140 when the second switch unit 140 is turned on, that is, when there is conduction between the first terminal g and the second terminal h of the second switch unit 140 , the first terminal a of the energy storage unit 110 communicates with the second terminal a through the second switch unit 140 .
  • the first signal output terminal 222 of the level conversion chip 220 is connected.
  • the second switch unit 140 When the second switch unit 140 is turned off, the first terminal g and the second terminal h of the second switch unit 140 are disconnected, and the first terminal a of the energy storage unit 110 is connected to the first signal output terminal of the level conversion chip 220 222 are also disconnected.
  • the comparison control unit 150 has a first input j, a second input k and an output m.
  • the first input terminal j of the comparison control unit 150 is used to connect to the first signal output terminal 222 of the level conversion chip 220
  • the second input terminal k of the comparison control unit 150 is used to connect to the second preset voltage terminal V2 .
  • the second preset voltage terminal V2 is used for providing a second preset voltage.
  • the voltage of the second preset voltage terminal V2 is lower than the voltage of the high-level signal, that is, the second preset voltage is lower than the voltage of the high-level signal.
  • the output terminal m of the comparison control unit 150 is connected to the control terminal i of the second switch unit 140 .
  • the comparison control unit 150 controls the second switch unit 140 to conduct. At this time, the first end a of the energy storage unit 110 is connected to the first signal output end 222 of the level conversion chip 220 through the second switch unit 140 .
  • the comparison control unit 150 cannot control the second switch unit 140 to be turned on. At this time, the second switch unit 140 is turned off, and the first Terminal a is disconnected from the first signal output terminal 222 of the level conversion chip 220 .
  • the second preset voltage terminal V2 may be the ground line GND. At this time, the second preset voltage is 0V.
  • the current control circuit 10 may further include a third switch unit 160 .
  • the third switch unit 160 has a first terminal p, a second terminal n and a control terminal q.
  • the first terminal p of the third switch unit 160 is used to connect to the first signal output terminal 222 of the level conversion chip 220
  • the second terminal n of the third switch unit 160 is connected to the second terminal b of the energy storage unit 110 .
  • the control terminal q of the third switch unit 160 is used to control the conduction between the first terminal p and the second terminal n of the third switch unit 160 .
  • the third switch unit 160 is connected between the first signal output terminal 222 of the level conversion chip 220 and the second terminal b of the energy storage unit 110 .
  • the third switch unit 160 when the third switch unit 160 is turned on, that is, when the connection between the first terminal p and the second terminal n of the third switch unit 160 is conducted, the second terminal b of the energy storage unit 110 communicates with the second terminal b of the energy storage unit 110 through the third switch unit 160
  • the first signal output terminal 222 of the level conversion chip 220 is connected.
  • the third switch unit 160 is turned off, the first terminal p and the second terminal n of the third switch unit 160 are disconnected, and the second terminal b of the energy storage unit 110 is connected to the first signal output terminal of the level conversion chip 220 222 are also disconnected.
  • the control terminal q of the third switch unit 160 is connected to the output terminal m of the comparison control unit 150 .
  • the comparison control unit 150 controls the third switch unit 160 to conduct.
  • the comparison control unit 150 controls the third switch unit 160 to turn off.
  • the first signal output terminal 222 of the level conversion chip 220 When the level conversion chip 220 receives the shutdown command, the first signal output terminal 222 of the level conversion chip 220 outputs a high level signal. When the level conversion chip 220 receives the power-on command, the first signal output terminal 222 of the level conversion chip 220 can output a low level signal. Generally, a high-level signal is a positive voltage, and a negative-level signal is a negative voltage. When the display device is working normally, the first signal output terminal 222 of the level conversion chip 220 outputs a low level signal. In this embodiment, the current control circuit 10 shown in FIG. 4 can work when the level shifting chip 220 receives a shutdown instruction and a startup instruction.
  • the first signal output terminal 222 of the level conversion chip 220 When the level conversion chip 220 receives the shutdown instruction, the first signal output terminal 222 of the level conversion chip 220 outputs a high level signal. At this time, the comparison control unit 150 controls the second switch unit 140 to be turned on, and a high-level signal of a positive voltage is output to the first terminal a of the energy storage unit 110 .
  • the pulse width modulation unit 130 can adjust the voltage at the first terminal a of the energy storage unit 110 and the current in the energy storage unit 110, thereby accurately controlling the display panel when the display device is turned off. The magnitude of the current in 30 protects the display panel 30 .
  • the first signal output terminal 222 of the level conversion chip 220 When the level conversion chip 220 receives the power-on command, the first signal output terminal 222 of the level conversion chip 220 outputs a low level signal. At this time, the comparison control unit 150 controls the first switch unit 120 to be turned on, and a low-level signal of a negative voltage is output to the second terminal b of the energy storage unit 110 . By adjusting the duty cycle of the first switch unit 120, the pulse width modulation unit 130 can adjust the voltage at the yth end a of the energy storage unit 110 and the current in the energy storage unit 110, thereby accurately controlling the display panel when the display device is turned on. The magnitude of the current in 30 protects the display panel 30 .
  • FIG. 5 is a circuit structure diagram of the current control circuit 10 provided in the third embodiment of the present application.
  • the comparison control unit 150 may include a resistor R1 , a resistor R2 and an operational amplifier A1 .
  • the first end of the resistor R1 is used to connect to the first signal output end 222 of the level conversion chip 220 .
  • the first end of the resistor R2 is connected to the second end of the resistor R1, and the second end of the resistor R2 is used to connect to the second preset voltage end.
  • the non-inverting input terminal of the operational amplifier A1 is connected to the second terminal of the resistor R1
  • the inverting input terminal of the operational amplifier A1 is connected to the second terminal of the resistor R2
  • the output terminal of the operational amplifier A1 is connected to the control terminal of the second switch unit 140 .
  • the second preset voltage terminal V2 is the ground wire GND.
  • Resistor R1 and resistor R2 may be variable resistors.
  • Operational amplifier A1 may be a zero-crossing voltage comparator. In this way, by adjusting the size of the resistor R1 and the resistor R2, when the first signal output terminal 222 of the level conversion chip 220 outputs a high-level signal, the output terminal of the operational amplifier A1 outputs a high-level signal; the level conversion chip 220 When the first signal output terminal 222 of the operational amplifier outputs a low-level signal, the output terminal of the operational amplifier A1 outputs a low-level signal.
  • the second switching unit 140 may include a transistor M1.
  • the transistor M1 here may be an N-type MOS transistor turned on at a high level.
  • the gate of the transistor M1 is connected to the output end of the comparison control unit 150, the drain of the transistor M1 is used to connect to the first signal output end 222 of the level conversion chip 220, and the source of the transistor M1 is connected to the first signal output end of the energy storage unit 110. end connection. That is to say, when the first signal output terminal 222 of the level conversion chip 220 outputs a high-level signal, the output terminal of the operational amplifier A1 outputs a high-level signal, and the source and drain of the transistor M1 are turned on.
  • the second switch unit 140 may further include a resistor connected between the gate of the transistor M1 and the output terminal of the comparison control unit 150, or/and, connected between the source of the transistor M1 and the energy storage unit The resistor between the first terminals 110 , or/and, the resistor connected between the drain of the transistor M1 and the first signal output terminal 222 of the level conversion chip 220 , etc.
  • the third switching unit 160 may include a transistor M2.
  • the transistor M2 here may be a P-type MOS transistor turned on at a low level.
  • the gate of the transistor M2 is connected to the output terminal of the comparison control unit 150, the source of the transistor M2 is used to be connected to the first signal output terminal 222 of the level conversion chip 220, and the drain of the transistor M2 is connected to the second signal output terminal of the energy storage unit 110. end connection. That is to say, when the first signal output terminal 222 of the level conversion chip 220 outputs a low-level signal, the output terminal of the operational amplifier A1 outputs a low-level signal, and the source and drain of the transistor M2 are turned on.
  • the third switch unit 160 may further include a resistor connected between the gate of the transistor M2 and the output terminal of the comparison control unit 150, or/and, connected between the drain of the transistor M2 and the energy storage unit The resistor between the second terminals of 110, or/and, the resistor connected between the source of the transistor M2 and the first signal output terminal 222 of the level conversion chip 220, etc.
  • FIG. 6 is a circuit structure diagram of the current control circuit 10 provided in Embodiment 4 of the present application.
  • the current control circuit 10 further includes: a Zener diode D1.
  • the anode of the Zener diode D1 is used to be connected to the second preset voltage terminal V2, and the voltage of the second preset voltage terminal V2 is lower than the voltage of the first preset voltage terminal.
  • the second preset voltage terminal V2 is the ground line GND.
  • the cathode of the Zener diode D1 is connected to the first terminal c of the first switch unit 120 . Adding a Zener diode D1 between the first terminal c of the first switch unit 120 and the ground line GND can prevent sudden changes in the current output from the first preset voltage terminal V1 to the first terminal c of the first switch unit 120 .
  • the current control circuit 10 may also include a diode D2.
  • the anode of the diode D2 is used to connect to the first signal output end 222 of the level conversion chip 220 , and the cathode of the diode D2 is connected to the first end a of the energy storage unit 110 .
  • the anode of the diode D2 is connected to the first signal output terminal 222 of the level conversion chip 220 through the second switch unit 140 .
  • a diode D2 is added between the first terminal a of the energy storage unit 110 and the second terminal h of the second switch unit 140, that is, between the first terminal a of the energy storage unit 110 and the first signal output terminal of the level conversion chip 220 Adding a diode D2 between 222 can prevent the current in the energy storage unit 110 from flowing back to the first signal output terminal 222 of the level conversion chip 220 .
  • transistors M1 and M3 are N-type MOS transistors that are turned on at a high level and turned off at a low level.
  • Transistor M2 is a P-type MOS transistor that is turned on at a low level and turned off at a high level.
  • Operational amplifier A1 is a zero-crossing voltage comparator.
  • the resistors R1 and R2 are used to divide the level signal output by the first signal output terminal 222 of the level conversion chip 220 .
  • the resistor R1 and the resistor R2 are adjustable resistors.
  • the operational amplifier A1 By adjusting the resistance of the resistor R1 and the resistor R2, when the first signal output terminal 222 of the level conversion chip 220 outputs a high-level signal, the operational amplifier A1 outputs a high-level signal. ; When the first signal output terminal 222 of the level conversion chip 220 outputs a low-level signal, the operational amplifier A1 outputs a low-level signal.
  • the current control circuit 10 is only connected between the first signal output terminal 222 and at least one second signal output terminal 224 of the level conversion chip 220 when the display device is turned on and off. When the display device works normally, the current control circuit 10 is disconnected from the first signal output terminal 222 and each second signal output terminal 224 .
  • This scheme can be realized through the hardware structure. For example, a switching device is added between the current control circuit 10 and the first signal output terminal 222 of the level conversion chip 220, and a switch is placed between the current control circuit 10 and at least one second signal output terminal 224 of the level conversion chip 220. device.
  • the timing control chip 210 controls the two switching devices to close, and when the display device During normal operation, the timing control chip 210 controls the two switching devices to be turned off.
  • the first signal output terminal 222 of the level shifting chip 220 When the level shifting chip 220 receives the shutdown command, the first signal output terminal 222 of the level shifting chip 220 outputs a positive high-level signal. At this time, the operational amplifier A1 outputs a high-level signal, the transistor M2 is turned off, and the transistor M1 is turned on. The first signal output terminal 222 of the level conversion chip 220 can output a high level signal to the left end of the inductor L1. At the same time, the first preset voltage terminal V1 also outputs a voltage to the left end of the inductor L1 through the transistor M3, and the inductor L1 is charged. In this way, the duty cycle of the transistor M3 can be controlled by the pulse width modulation unit 130 to achieve the purpose of accurately controlling the magnitude of the current of the inductor L1.
  • the first signal output terminal 222 of the level conversion chip 220 When the level conversion chip 220 receives the power-on command, the first signal output terminal 222 of the level conversion chip 220 outputs a low-level signal with a negative voltage. At this time, the operational amplifier A1 outputs a low-level signal, the transistor M1 is turned off, and the transistor M2 is turned on. The first signal output terminal 222 of the level conversion chip 220 can output a low level signal to the right end of the inductor L1. At the same time, the first preset voltage terminal V1 also outputs a voltage to the left end of the inductor L1 through the transistor M3, and the inductor L1 is charged. In this way, the duty cycle of the transistor M3 can be controlled by the pulse width modulation unit 130 to achieve the purpose of accurately controlling the magnitude of the current of the inductor L1.
  • the current control circuit 10 includes an energy storage unit 110 , a first switch unit 120 and a pulse width modulation unit 130 .
  • the first terminal a of the energy storage unit 110 is connected to the first preset voltage terminal V1 through the first switch unit 120, and the first terminal a of the energy storage unit 110 is also connected to the first signal output terminal 222 of the level conversion chip 220, to input a high-level signal.
  • the second terminal b of the energy storage unit 110 is connected to the second signal output terminal 224 of the level conversion chip 220 .
  • the pulse width modulation unit 130 is used to adjust the duty cycle of the first switch unit 120 .
  • the pulse width modulation unit 130 can adjust the output of the first preset voltage terminal V1 to the energy storage unit 110 through the first switch unit 120 by adjusting the duty ratio of the first switch unit 120 .
  • the magnitude of the voltage at the first terminal a accurately controls the magnitude of the voltage and the magnitude of the current of the energy storage unit 110 .
  • the second terminal b of the energy storage unit 110 is connected to at least one second signal output terminal 224 of the level conversion chip 220, that is, the second terminal b of the energy storage unit 110 is connected to at least one second signal input terminal 304 of the display panel 30 Therefore, by accurately controlling the magnitude of the current of the energy storage unit 110 , the magnitude of the current in the display panel 30 can be accurately controlled, thereby protecting the display panel 30 .
  • the current control circuit 10 may also include a comparison control unit 150, a second switch unit 140 and a third switch unit 160, so that when the first signal output terminal 222 of the level conversion chip 220 outputs a high level signal, the high level signal output to the first terminal a of the energy storage unit 110; when the second signal output terminal 224 of the level conversion chip 220 outputs a low-level signal, the low-level signal is output to the second terminal b of the energy storage unit 110 . When the display device is turned on, the first signal output terminal 222 of the level conversion chip 220 outputs a low level signal.
  • the pulse width modulation unit 130 can adjust the voltage at the first terminal of the energy storage unit 110 and the current in the energy storage unit 110, thereby accurately controlling the display when the display device is turned on.
  • the magnitude of the current in the panel 30 protects the display panel 30 .
  • Adding a Zener diode D1 between the first terminal of the first switch unit 120 and the ground GND can prevent sudden changes in the current output from the first preset voltage terminal V1 to the first terminal c of the first switch unit 120 .
  • a diode D2 is added between the first terminal a of the energy storage unit 110 and the first signal output terminal 222 of the level conversion chip 220, which can prevent the current in the energy storage unit 110 from flowing back to the first signal output of the level conversion chip 220 End 222.
  • the embodiment of the present application also provides a display panel driving device 20, including a level conversion chip 220 and the current control circuit 10 as in any one of the above embodiments.
  • the level conversion chip 220 has multiple signal output terminals.
  • the multiple signal output terminals of the level conversion chip 220 are used to be connected to the multiple signal input terminals of the display panel 30 one by one.
  • the first signal output terminal 222 among the multiple signal output terminals of the level conversion chip 220 outputs a high level signal.
  • the current control circuit 10 includes an energy storage unit 110 , a first switch unit 120 and a pulse width modulation unit 130 .
  • the first end of the energy storage unit 110 is used to connect with the first signal output end 222 of the level conversion chip 220 to input a high level signal, and the second end of the energy storage unit 110 is used to connect with at least the first signal output end 222 of the level conversion chip 220
  • a second signal output terminal 224 is connected.
  • the second signal output terminal 224 is the signal output terminal other than the first signal output terminal 222 among the multiple signal output terminals of the level conversion chip 220 .
  • the first terminal of the first switch unit 120 is used to connect to the first preset voltage terminal, the second terminal of the first switch unit 120 is connected to the first terminal of the energy storage unit 110, the control terminal of the first switch unit 120 is connected to the pulse
  • the output end of the width modulation unit 130 is connected.
  • the output terminal of the pulse width modulation unit 130 is used to output a pulse width modulation signal, and the pulse width modulation signal is used to control the duty ratio of the first switch unit 120 to control the voltage of the first end of the energy storage unit 110 and the energy storage unit The size of the current in 110.
  • the current control circuit 10 further includes: a second switch unit 140 and a comparison control unit 150 .
  • the first terminal of the second switch unit 140 is used to connect with the first signal output terminal 222 of the level conversion chip 220 , and the second terminal of the second switch unit 140 is connected with the first terminal of the energy storage unit 110 .
  • the first input terminal of the comparison control unit 150 is used to connect with the first signal output terminal 222 of the level conversion chip 220, the second input terminal of the comparison control unit 150 is used to be connected with the second preset voltage terminal, and the second preset The voltage at the voltage terminal is less than the voltage of the high-level signal, and the output terminal of the comparison control unit 150 is connected to the control terminal of the second switch unit 140, so that when the first input terminal of the comparison control unit 150 inputs a high-level signal, the second switch unit is controlled.
  • the switch unit 140 is turned on.
  • the comparison control unit 150 includes: a resistor R1, a resistor R2 and an operational amplifier A1.
  • the first end of the resistor R1 is used to connect with the first signal output end 222 of the level conversion chip 220 .
  • the first end of the resistor R2 is connected to the second end of the resistor R1, and the second end of the resistor R2 is used to connect to the second preset voltage end.
  • the non-inverting input terminal of the operational amplifier A1 is connected to the second terminal of the resistor R1 , the inverting input terminal of the operational amplifier A1 is connected to the second terminal of the resistor R2 , and the output terminal of the operational amplifier A1 is connected to the control terminal of the second switch unit 140 .
  • the second switch unit 140 includes: a transistor M1.
  • the gate of the transistor M1 is connected to the output end of the comparison control unit 150, the drain of the transistor M1 is used to connect to the first signal output end 222 of the level conversion chip 220, and the source of the transistor M1 is connected to the first signal output end of the energy storage unit 110. end connection.
  • the current control circuit 10 further includes: a third switch unit 160 .
  • the first end of the third switch unit 160 is used to connect with the first signal output end 222 of the level conversion chip 220, the second end of the third switch unit 160 is connected with the second end of the energy storage unit 110, and the third switch unit
  • the control terminal 160 is connected to the output terminal of the comparison control unit 150 to control the third switch unit 160 to conduct when the first input terminal of the comparison control unit 150 inputs a low level signal.
  • the third switch unit 160 includes: a transistor M2.
  • the gate of the transistor M2 is connected to the output terminal of the comparison control unit 150, the source of the transistor M2 is used to be connected to the first signal output terminal 222 of the level conversion chip 220, and the drain of the transistor M2 is connected to the second signal output terminal of the energy storage unit 110. end connection.
  • the current control circuit 10 further includes: a Zener diode D1.
  • the anode of the Zener diode D1 is used to connect to the second preset voltage terminal, the voltage of the second preset voltage terminal is lower than the voltage of the first preset voltage terminal, and the cathode of the Zener diode D1 is connected to the first terminal of the first switch unit 120 .
  • the current control circuit 10 further includes: a diode D2.
  • the anode of the diode D2 is used to connect to the first signal output end 222 of the level conversion chip 220 , and the cathode of the diode D2 is connected to the first end of the energy storage unit 110 .
  • the current control circuit 10 includes an energy storage unit 110 , a first switch unit 120 and a pulse width modulation unit 130 .
  • the first terminal of the energy storage unit 110 is connected to the first preset voltage terminal through the first switch unit 120, and the first terminal of the energy storage unit 110 is also connected to the first signal output terminal 222 of the level conversion chip 220 to input high level signal.
  • the second end of the energy storage unit 110 is connected to other signal output ends of the level conversion chip 220 .
  • the pulse width modulation unit 130 is used for adjusting the duty cycle of the first switch unit 120 .
  • the pulse width modulation unit 130 can adjust the duty ratio of the first switch unit 120 to adjust the first preset voltage output to the energy storage unit 110 through the first switch unit 120 .
  • the voltage at one end can accurately control the voltage and current of the energy storage unit 110 . Since the second terminal of the energy storage unit 110 is connected to at least one second signal output terminal 224 of the level conversion chip 220, that is, the second terminal of the energy storage unit 110 is connected to at least one second signal input terminal 304 of the display panel 30, Therefore, by accurately controlling the magnitude of the current of the energy storage unit 110 , the magnitude of the current in the display panel 30 can be accurately controlled, thereby protecting the display panel 30 .
  • the current control circuit 10 may also include a comparison control unit 150, a second switch unit 140 and a third switch unit 160, so that when the first signal output terminal 222 of the level conversion chip 220 outputs a high level signal, the high level signal output to the first terminal of the energy storage unit 110; when the second signal output terminal 224 of the level conversion chip 220 outputs a low level signal, the low level signal is output to the second terminal of the energy storage unit 110.
  • the first signal output terminal 222 of the level conversion chip 220 outputs a low level signal.
  • the pulse width modulation unit 130 can adjust the voltage at the first terminal of the energy storage unit 110 and the current in the energy storage unit 110, thereby accurately controlling the display when the display device is turned on.
  • the magnitude of the current in the panel 30 protects the display panel 30 .
  • Adding a zener diode D1 between the first terminal of the first switch unit 120 and the ground GND can prevent sudden changes in the current output from the first preset voltage terminal V1 to the first terminal of the first switch unit 120 .
  • Adding a diode D2 between the first end of the energy storage unit 110 and the first signal output end 222 of the level conversion chip 220 can prevent the current in the energy storage unit 110 from flowing backward to the first signal output end of the level conversion chip 220 222.
  • the embodiment of the present application further provides a display device, including a display panel 30 and the display panel driving device 20 in any one of the above-mentioned embodiments.
  • the display panel 30 has a plurality of signal input terminals.
  • the level conversion chip 220 has multiple signal output terminals. The multiple signal output terminals of the level conversion chip 220 are used to be connected to the multiple signal input terminals of the display panel 30 one by one.
  • the first signal output terminal 222 among the multiple signal output terminals of the level conversion chip 220 outputs a high level signal.
  • the current control circuit 10 includes an energy storage unit 110 , a first switch unit 120 and a pulse width modulation unit 130 .
  • the first end of the energy storage unit 110 is used to connect with the first signal output end 222 of the level conversion chip 220 to input a high level signal, and the second end of the energy storage unit 110 is used to connect with at least the first signal output end 222 of the level conversion chip 220
  • a second signal output terminal 224 is connected.
  • the second signal output terminal 224 is a signal output terminal other than the first signal output terminal 222 among the multiple signal output terminals of the level conversion chip 220 .
  • the first terminal of the first switch unit 120 is used to connect to the first preset voltage terminal, the second terminal of the first switch unit 120 is connected to the first terminal of the energy storage unit 110, the control terminal of the first switch unit 120 is connected to the pulse
  • the output end of the width modulation unit 130 is connected.
  • the output terminal of the pulse width modulation unit 130 is used to output a pulse width modulation signal, and the pulse width modulation signal is used to control the duty ratio of the first switch unit 120 to control the voltage of the first end of the energy storage unit 110 and the energy storage unit The size of the current in 110.
  • the current control circuit 10 further includes: a second switch unit 140 and a comparison control unit 150 .
  • the first terminal of the second switch unit 140 is used to connect with the first signal output terminal 222 of the level conversion chip 220 , and the second terminal of the second switch unit 140 is connected with the first terminal of the energy storage unit 110 .
  • the first input terminal of the comparison control unit 150 is used to connect with the first signal output terminal 222 of the level conversion chip 220, the second input terminal of the comparison control unit 150 is used to be connected with the second preset voltage terminal, and the second preset The voltage at the voltage terminal is less than the voltage of the high-level signal, and the output terminal of the comparison control unit 150 is connected to the control terminal of the second switch unit 140, so that when the first input terminal of the comparison control unit 150 inputs a high-level signal, the second switch unit is controlled.
  • the switch unit 140 is turned on.
  • the comparison control unit 150 includes: a resistor R1, a resistor R2 and an operational amplifier A1.
  • the first end of the resistor R1 is used to connect with the first signal output end 222 of the level conversion chip 220 .
  • the first end of the resistor R2 is connected to the second end of the resistor R1, and the second end of the resistor R2 is used to connect to the second preset voltage end.
  • the non-inverting input terminal of the operational amplifier A1 is connected to the second terminal of the resistor R1 , the inverting input terminal of the operational amplifier A1 is connected to the second terminal of the resistor R2 , and the output terminal of the operational amplifier A1 is connected to the control terminal of the second switch unit 140 .
  • the second switch unit 140 includes: a transistor M1.
  • the gate of the transistor M1 is connected to the output end of the comparison control unit 150, the drain of the transistor M1 is used to connect to the first signal output end 222 of the level conversion chip 220, and the source of the transistor M1 is connected to the first signal output end of the energy storage unit 110. end connection.
  • the current control circuit 10 further includes: a third switch unit 160 .
  • the first end of the third switch unit 160 is used to connect with the first signal output end 222 of the level conversion chip 220, the second end of the third switch unit 160 is connected with the second end of the energy storage unit 110, and the third switch unit
  • the control terminal 160 is connected to the output terminal of the comparison control unit 150 to control the third switch unit 160 to conduct when the first input terminal of the comparison control unit 150 inputs a low level signal.
  • the third switch unit 160 includes: a transistor M2.
  • the gate of the transistor M2 is connected to the output terminal of the comparison control unit 150, the source of the transistor M2 is used to be connected to the first signal output terminal 222 of the level conversion chip 220, and the drain of the transistor M2 is connected to the second signal output terminal of the energy storage unit 110. end connection.
  • the current control circuit 10 further includes: a Zener diode D1.
  • the anode of the Zener diode D1 is used to connect to the second preset voltage terminal, the voltage of the second preset voltage terminal is lower than the voltage of the first preset voltage terminal, and the cathode of the Zener diode D1 is connected to the first terminal of the first switch unit 120 .
  • the current control circuit 10 further includes: a diode D2.
  • the anode of the diode D2 is used to connect to the first signal output end 222 of the level conversion chip 220 , and the cathode of the diode D2 is connected to the first end of the energy storage unit 110 .
  • the current control circuit 10 includes an energy storage unit 110 , a first switch unit 120 and a pulse width modulation unit 130 .
  • the first terminal of the energy storage unit 110 is connected to the first preset voltage terminal through the first switch unit 120, and the first terminal of the energy storage unit 110 is also connected to the first signal output terminal 222 of the level conversion chip 220 to input high level signal.
  • the second end of the energy storage unit 110 is connected to other signal output ends of the level conversion chip 220 .
  • the pulse width modulation unit 130 is used to adjust the duty cycle of the first switch unit 120 .
  • the pulse width modulation unit 130 can adjust the duty ratio of the first switch unit 120 to adjust the first preset voltage output to the energy storage unit 110 through the first switch unit 120 .
  • the voltage at one end can accurately control the voltage and current of the energy storage unit 110 . Since the second end of the energy storage unit 110 is connected to at least one second signal output end 224 of the level conversion chip 220, that is, the second end of the energy storage unit 110 is connected to at least one second signal input end 304 of the display panel 30, Therefore, by accurately controlling the magnitude of the current of the energy storage unit 110 , the magnitude of the current in the display panel 30 can be accurately controlled, thereby protecting the display panel 30 .
  • the current control circuit 10 may also include a comparison control unit 150, a second switch unit 140 and a third switch unit 160, so that when the first signal output terminal 222 of the level conversion chip 220 outputs a high level signal, the high level signal output to the first terminal of the energy storage unit 110; when the second signal output terminal 224 of the level conversion chip 220 outputs a low level signal, the low level signal is output to the second terminal of the energy storage unit 110.
  • the first signal output terminal 222 of the level conversion chip 220 outputs a low level signal.
  • the pulse width modulation unit 130 can adjust the voltage at the first terminal of the energy storage unit 110 and the current in the energy storage unit 110, thereby accurately controlling the display when the display device is turned on.
  • the magnitude of the current in the panel 30 protects the display panel 30 .
  • Adding a zener diode D1 between the first terminal of the first switch unit 120 and the ground GND can prevent sudden changes in the current output from the first preset voltage terminal V1 to the first terminal of the first switch unit 120 .
  • Adding a diode D2 between the first end of the energy storage unit 110 and the first signal output end 222 of the level conversion chip 220 can prevent the current in the energy storage unit 110 from flowing backward to the first signal output end of the level conversion chip 220 222.

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Abstract

一种电流控制电路（10）、显示面板驱动装置（20）及显示装置，电流控制电路（10）包括储能单元（110）、第一开关单元（120）和脉宽调制单元（130）。储能单元（110）的第一端（a）通过第一开关单元（120）与第一预设电压端（V1）连接，储能单元（110）的第一端（a）还与电平转换芯片（220）的第一信号输出端（222）连接，以输入高电平信号。储能单元（110）的第二端（b）与电平转换芯片（220）的其他信号输出端（224）连接。脉宽调制单元（130）用于调节第一开关单元（120）的占空比。电流控制电路（10）可以在显示装置接收到关机指令后准确控制显示面板（30）中的电流大小，从而保护显示面板（30）。

Description

电流控制电路、显示面板驱动装置及显示装置
本申请要求于2021年10月14日在中华人民共和国国家知识产权局专利局提交的、申请号为202111197153.6、申请名称为“电流控制电路、显示面板驱动装置及显示装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示技术领域，具体涉及一种电流控制电路、显示面板驱动装置及显示装置。
 背景技术
显示装置通常包括时序控制芯片、电平转换芯片和显示面板。时序控制芯片用于输出时序控制信号给电平转换芯片，电平转换芯片用于根据时序控制信号生成多个栅极驱动（Gate Driver on Array，GOA）信号，如门开启信号、门关闭信号、扫描信号、复位信号等。电平转换芯片具有多个信号输出端，多个信号输出端用于一一输出多个GOA信号。显示面板具有多个信号输入端，多个信号输入端用于一一输入多个GOA信号。多个GOA信号用于驱动显示面板，从而使显示面板显示图像。
相关技术中，显示装置还包括放电电路。当显示装置接收到关机指令时，放电电路工作，电平转换芯片的多个信号输出端通过放电电路短接。此时，电平转换芯片的用于输出门关闭信号的信号输出端会输出一个高电平信号，电平转换芯片的其他信号输出端则不输出电平信号。这种情况下，显示面板的多个信号输入端均输入高电平信号，显示面板中的所有晶体管均处于开启状态，从而使显示面板中的电荷充分释放。
然而，由于放电电路将电平转换芯片的多个信号输出端短接，使显示面板的多个信号输入端均输入高电平信号，这可能会使显示面板中的电流瞬间变大，从而导致显示面板损伤。
 技术问题
本申请实施例的目的之一在于：提供一种电流控制电路、显示面板驱动装置及显示装置，可以在显示装置接收到关机指令后准确控制显示面板中的电流大小，从而保护显示面板。
 技术解决方案
第一方面，提供了一种电流控制电路，应用于显示面板驱动装置，所述显示面板驱动装置包括电平转换芯片，所述电平转换芯片具有多个信号输出端，所述电平转换芯片的多个信号输出端用于与显示面板的多个信号输入端一一连接，所述电平转换芯片接收到关机指令时，所述电平转换芯片的多个信号输出端中的第一信号输出端输出高电平信号；
所述电流控制电路包括：储能单元、第一开关单元和脉宽调制单元；
所述储能单元的第一端用于与所述电平转换芯片的第一信号输出端连接，以输入高电平信号，所述储能单元的第二端用于与所述电平转换芯片的至少一个第二信号输出端连接，所述第二信号输出端是所述电平转换芯片的多个信号输出端中除第一信号输出端之外的其他信号输出端；
所述第一开关单元的第一端用于与第一预设电压端连接，所述第一开关单元的第二端与所述储能单元的第一端连接，所述第一开关单元的控制端与所述脉宽调制单元的输出端连接；
所述脉宽调制单元的输出端用于输出脉宽调制信号，所述脉宽调制信号用于控制所述第一开关单元的占空比，以控制所述储能单元的第一端的电压大小及所述储能单元中的电流大小。
可选地，所述电流控制电路还包括：第二开关单元和比较控制单元；
所述第二开关单元的第一端用于与所述电平转换芯片的第一信号输出端连接，所述第二开关单元的第二端与所述储能单元的第一端连接；
所述比较控制单元的第一输入端用于与所述电平转换芯片的第一信号输出端连接，所述比较控制单元的第二输入端用于与第二预设电压端连接，所述第二预设电压端的电压小于所述高电平信号的电压，所述比较控制单元的输出端与所述第二开关单元的控制端连接，以当所述比较控制单元的第一输入端输入所述高电平信号时，控制所述第二开关单元导通。
可选地，所述比较控制单元包括：电阻R1、电阻R2和运算放大器A1；
所述电阻R1的第一端用于与所述电平转换芯片的第一信号输出端连接；
所述电阻R2的第一端与所述电阻R1的第二端连接，所述电阻R2的第二端用于与所述第二预设电压端连接；
所述运算放大器A1的同相输入端与所述电阻R1的第二端连接，所述运算放大器A1的反相输入端与所述电阻R2的第二端连接，所述运算放大器A1的输出端与所述第二开关单元的控制端连接。
可选地，所述第二开关单元包括：晶体管M1；
所述晶体管M1的栅极与所述比较控制单元的输出端连接，所述晶体管M1的漏极用于与所述电平转换芯片的第一信号输出端连接，所述晶体管M1的源极与所述储能单元的第一端连接。
可选地，所述电流控制电路还包括：第三开关单元；
所述第三开关单元的第一端用于与所述电平转换芯片的第一信号输出端连接，所述第三开关单元的第二端与所述储能单元的第二端连接，所述第三开关单元的控制端与所述比较控制单元的输出端连接，以当所述比较控制单元的第一输入端输入低电平信号时，控制所述第三开关单元导通。
可选地，所述第三开关单元包括：晶体管M2；
所述晶体管M2的栅极与所述比较控制单元的输出端连接，所述晶体管M2的源极用于与所述电平转换芯片的第一信号输出端连接，所述晶体管M2的漏极与所述储能单元的第二端连接。
可选地，所述电流控制电路还包括：稳压二极管D1；
所述稳压二极管D1的阳极用于与第二预设电压端连接，所述第二预设电压端的电压小于所述第一预设电压端的电压，所述稳压二极管D1的阴极与所述第一开关单元的第一端连接。
可选地，所述电流控制电路还包括：二极管D2；
所述二极管D2的阳极用于与所述电平转换芯片的第一信号输出端连接，所述二极管D2的阴极与所述储能单元的第一端连接。
第二方面，提供了一种显示面板驱动装置，包括电平转换芯片以及如上述第一方面中任意一项所述的电流控制电路；
所述电平转换芯片具有多个信号输出端，所述电平转换芯片的多个信号输出端用于与显示面板的多个信号输入端一一连接，所述电平转换芯片接收到关机指令时，所述电平转换芯片的多个信号输出端中的第一信号输出端输出高电平信号。
第三方面，提供了一种显示装置，包括显示面板以及如上述第二方面所述的显示面板驱动装置；
所述显示面板具有多个信号输入端，所述电平转换芯片具有多个信号输出端，所述电平转换芯片的多个信号输出端与所述显示面板的多个信号输入端一一连接，所述电平转换芯片接收到关机指令时，所述电平转换芯片的多个信号输出端中的第一信号输出端输出高电平信号。
 有益效果
在本申请中，电流控制电路包括储能单元、第一开关单元和脉宽调制单元。储能单元的第一端通过第一开关单元与第一预设电压端连接，储能单元的第一端还与电平转换芯片的第一信号输出端连接，以输入高电平信号。储能单元的第二端与电平转换芯片的其他信号输出端连接。脉宽调制单元用于调节第一开关单元的占空比。如此，在电流控制电路工作时，脉宽调制单元通过调节第一开关单元的占空比，即可调节第一预设电压端通过第一开关单元输出至储能单元的第一端的电压大小，从而准确控制储能单元的电压大小和电流大小。由于储能单元的第二端与至少一个第二信号输出端连接，第二信号输出端是电平转换芯片的多个信号输出端中除第一信号输出端之外的其他信号输出端，且电平转换芯片的多个信号输出端用于与显示面板的多个信号输入端一一连接。因此，通过准确控制储能单元的电流大小，即可准确控制显示面板的至少一个新输入端的电流大小，从而准确控制显示面板中的电流大小，保护显示面板。
 附图说明
为了更清楚地说明本申请实施例中的技术方案，下面将对实施例或示范性技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是本申请实施例一提供的显示装置的结构示意图；
图2是本申请实施例二提供的电流控制电路的结构示意图；
图3是本申请实施例二提供的电流控制电路的电路结构图；
图4是本申请实施例三提供的电流控制电路的结构示意图；
图5是本申请实施例三提供的电流控制电路的电路结构图；
图6是本申请实施例四提供的电流控制电路的电路结构图。
其中，各附图标号所代表的含义分别为：
10、电流控制电路；110、储能单元；120、第一开关单元；130、脉宽调制单元；140、第二开关单元；150、比较控制单元；160、第三开关单元；20、显示面板驱动装置；210、时序控制芯片；220、电平转换芯片；222、第一信号输出端；224、第二信号输出端；30、显示面板；302、第一信号输入端；304、第二信号输入端。
 本发明的实施方式
为了使本申请的目的、技术方案及优点更加清楚明白，以下结合附图及实施例，对本申请进行进一步详细说明。应当理解，此处所描述的具体实施例仅用以解释本申请，并不用于限定本申请。
应当理解的是，本申请提及的“多个”是指两个或两个以上。在本申请的描述中，除非另有说明，“/”表示或的意思，比如，A/B可以表示A或B；本文中的“和/或”仅仅是一种描述关联对象的关联关系，表示可以存在三种关系，比如，A和/或B，可以表示：单独存在A，同时存在A和B，单独存在B这三种情况。另外，为了便于清楚描述本申请的技术方案，采用了“第一”、“第二”等字样对功能和作用基本相同的相同项或相似项进行区分。本领域技术人员可以理解“第一”、“第二”等字样并不对数量和执行次序进行限定，并且“第一”、“第二”等字样也并不限定一定不同。
实施例一：
图1是本申请实施例一提供的显示装置的结构示意图。如图1所示，显示装置包括显示面板驱动装置20和显示面板30。显示面板驱动装置20用于驱动显示面板30。
具体地，显示面板驱动装置20包括时序控制芯片210、电平转换芯片220和电流控制电路10。显示装置工作时，时序控制芯片210用于获取待显示图像的图像数据，并根据待显示图像的图像数据生成时序控制信号。电平转换芯片220用于获取时序控制芯片210输出的时序控制信号，并根据时序控制信号生成多个GOA信号。如图1所示，多个GOA信号可以分别包括门开启信号VGH、门关闭信号VGL、扫描信号CLK、复位信号RST和极性转换信号LC等。其中，门开启信号VGH可以是持续的高电平信号，门关闭信号VGL可以是持续的低电平信号，扫描信号CLK、复位信号RST和极性转换信号LC可以是由高电平信号和低电平信号交替形成的具有一定时序的电信号。电平转换芯片220具有多个信号输出端，多个信号输出端用于一一输出多个GOA信号。在本申请实施例中，为便于描述，将电平转换芯片220用于输出门关闭信号VGL的信号输出端称为第一信号输出端222；将电平转换芯片220的多个信号输出端中除第一信号输出端222之外的其他信号输出端均称为第二信号输出端224。
显示面板30具有多个信号输入端，显示面板30的多个信号输入端包括第一信号输入端302和第二信号输入端304。电平转换芯片220的多个信号输出端（包括第一信号输出端222和第二信号输出端224）与显示面板30的多个信号输入端一一连接，从而使电平转换芯片220的多个信号输出端一一输出的多个GOA信号可以一一输入显示面板30的多个信号输入端。多个GOA信号用于驱动显示面板30。其中，门开启信号VGH用于驱动显示面板30中的晶体管导通，门关闭信号VGL用于驱动显示面板30中的晶体管关断。扫描信号CLK用于扫描显示面板30中晶体管的栅极。极性转换信号LC用于控制面板中像素电极相对公共电极的极性翻转。在本申请实施例中，为便于描述，将显示面板30与第一信号输出端222相连接的信号输入端称为第一信号输入端302，将显示面板30与第二信号输出端224连接的信号输入端称为第二信号输入端304。
电流控制电路10的输入端与第一信号输出端222连接，电流控制电路10的输出端与至少一个第二信号输出端224连接。也就是说，电流控制电路10的输出端与至少一个第二信号输入端304连接。当显示装置接收到关机指令时，即显示装置内的时序控制芯片210和电平转换芯片220接收到关机指令时，电平转换芯片220的第一信号输出端222会输出一个高电平信号，且电平转换芯片220的各第二信号输出端224停止输出电信号。这种情况下，电流控制电路10用于控制与其相连接的第二信号输入端304的电流大小，从而控制显示面板30中的电流大小，达到在收到关机指令后保护显示面板30的目的。
可以理解的是，在图1所示的实施例中，电流控制电路10位于显示面板驱动装置20中，且独立于电平转换芯片220。在其他一些实施例中，电流控制电路10也可以集成在电平转换芯片220内。
下面从不同实施例对本申请提供的电流控制电路10进行详细地解释说明。
实施例二：
图2是本申请实施例二提供的电流控制电路10的结构示意图。如图2所示，电流控制电路10包括储能单元110、第一开关单元120和脉宽调制单元130。
具体地，储能单元110具有第一端a和第二端b。储能单元110的第一端a与电平转换芯片220的第一信号输出端222连接。如此，当电平转换芯片220接收到关机指令时，第一信号输出端222输出的高电平信号会输入至储能单元110的第一端a。储能单元110的第二端b用于与至少一个第二信号输出端224连接。也就是说，储能单元110的第二端b用于与至少一个第二信号输入端304连接。
第一开关单元120具有第一端c、第二端d和控制端e。第一开关单元120的第一端c用于与第一预设电压端V1连接。第一预设电压端V1用于输出第一预设电压。在一些实施例中，第一预设电压可以是12V。第一开关单元120的第二端d与储能单元110的第一端a连接。第一开关单元120的控制端e用于控制第一开关单元120的第一端c和第二端d之间的导通与否。
脉宽调制单元130具有输出端f。脉宽调制单元130的输出端f与第一开关单元120的控制端e连接。脉宽调制单元130的输出端f用于输出脉宽调制信号，脉宽调制信号用于控制第一开关单元120的导通与关断，即第一开关单元120的第一端c和第二端d之间的导通与关断。脉宽调制信号可以是由高电平信号和低电平信号交替组成的脉冲信号。其中，高电平信号和低电平信号中的一个用于控制第一开关单元120导通，高电平信号和低电平信号中的另一个用于控制第一开关单元120关断。脉宽调制信号用于控制第一开关单元120的占空比，从而控制储能单元110的第一端a的电压大小和储能单元110中的电流大小。第一开关单元120的占空比指在第一开关单元120的一个导通与关断的周期内，第一开关单元120的导通时长占周期时长的百分比。例如，在第一个周期内，脉宽调制信号先控制第一开关单元120持续导通0.01秒，再控制第一开关单元120持续关断0.09秒，在紧接着的第二个周期内，脉宽调整信号仍然先控制第一开关单元120持续导通0.01秒，再控制第一开关单元120持续关断0.09秒……如此循环，则第一开关单元120的占空比为10%。当第一预设电压端V1的电压为12V时，若第一开关单元120的占空比为10%，则第一预设电压端V1通过第一开关单元120输出至储能单元110的第一端a的电压为1.2V。当第一预设电压端V1的电压为12V时，若第一开关单元120的占空比为20%，则第一预设电压端V1通过第一开关单元120输出至储能单元110的第一端a的电压为2.4V。在一些具体的实施例中，脉宽调制单元130可以是单独设置的脉宽调制芯片。脉宽调制芯片中设有预设程序，以使其可以输出固定的脉宽调制信号。在另一些具体的实施例中，脉宽调制单元130也可以集成在时序控制芯片210。即通过时序控制芯片210来控制第一开关单元120的占空比。
在本申请实施例中，电流控制电路10包括储能单元110、第一开关单元120和脉宽调制单元130。储能单元110的第一端a通过第一开关单元120与第一预设电压端V1连接，储能单元110的第一端a还与电平转换芯片220的第一信号输出端222连接，以输入高电平信号。储能单元110的第二端b与电平转换芯片220的第二信号输出端224连接。脉宽调制单元130用于调节第一开关单元120的占空比。如此，在电流控制电路10工作时，脉宽调制单元130通过调节第一开关单元120的占空比，即可调节第一预设电压端V1通过第一开关单元120输出至储能单元110的第一端a的电压大小，从而准确控制储能单元110的电压大小和电流大小。由于储能单元110的第二端b与电平转换芯片220的至少一个第二信号输出端224连接，即储能单元110的第二端b与显示面板30的至少一个第二信号输入端304连接，因此，通过准确控制储能单元110的电流大小，即可准确控制显示面板30中的电流大小，从而保护显示面板30。
可以理解的是，显示面板驱动装置20中的电平转换芯片220可以具有多个第二信号输出端224。多个第二信号输出端224不必均与储能单元110的第二端b连接。一般地，当至少一个第二信号输出端224与储能单元110的第二端b连接时，即可在一定程度上控制电平转换芯片220接收到关机指令后显示面板30中的电流大小。在一些具体的实施例中，当电平转换芯片220具有多个第二信号输出端224时，可以针对相关技术检测出电平转换芯片220接收到关机指令后电流过大的第二信号输出端224，并将这些出现电流过大的第二信号输出端224与储能单元110的第二端b连接。
图3是本申请实施例二提供的电流控制电路10的电路结构图。如图3所示，在一些实施例中，第一开关单元120包括晶体管M3。这里的晶体管M3可以是一个高电平导通的N型MOS（metal oxide semiconductor，金属氧化物半导体场效应）管。也就是说，当脉宽调制单元130输出的是脉宽调制信号为高电平时，晶体管M3导通；当脉宽调制单元130输出的脉宽调制信号为低电平时，晶体管M3关断。晶体管M3的栅极与脉宽调制单元130的输出端f连接，晶体管M3的漏极与第一预设电压端V1连接，晶体管M3的源极与储能单元110的第一端a连接。在其他一些实施例中，第一开关单元120还可以包括连接在晶体管M3的栅极与脉宽调制单元130的输出端f之间的电阻，或/和，连接在晶体管M3的源极与储能单元110的第一端a之间的电阻，或/和，连接在晶体管M3的漏极与第一预设电压端V1之间的电阻等。
储能单元110可以包括电感L1。电感L1的第一端与电平转换芯片220的第一信号输出端222连接，并与第一开关单元120的第二端d连接。电感L1的第二端与至少一个第二信号输出端224连接。在其他一些实施例中，储能单元110还可以包括与电感L1串联的电阻等。
实施例三：
图4是本申请实施例三提供的电流控制电路10的结构示意图。如图4所示，在实施例二的基础上，电流控制电路10还可以包括第二开关单元140和比较控制单元150。
具体地，第二开关单元140具有第一端g、第二端h和控制端i。第二开关单元140的第一端g用于与电平转换芯片220的第一信号输出端222连接，第二开关单元140的第二端h与储能单元110的第一端a连接。第二开关单元140的控制端i用于控制第二开关单元140的第一端g与第二端h之间的导通与否。也就是说，第二开关单元140连接于电平转换芯片220的第一信号输出端222与储能单元110的第一端a之间。如此，当第二开关单元140导通时，即第二开关单元140的第一端g和第二端h之间导通时，储能单元110的第一端a通过第二开关单元140与电平转换芯片220的第一信号输出端222连接。当第二开关单元140关断时，第二开关单元140的第一端g和第二端h之间断开，储能单元110的第一端a与电平转换芯片220的第一信号输出端222之间也断开。
比较控制单元150具有第一输入端j、第二输入端k和输出端m。比较控制单元150第一输入端j用于与电平转换芯片220的第一信号输出端222连接，比较控制单元150的第二输入端k用于与第二预设电压端V2连接。第二预设电压端V2用于提供第二预设电压。第二预设电压端V2的电压小于高电平信号的电压，即第二预设电压小于高电平信号的电压。比较控制单元150的输出端m与第二开关单元140的控制端i连接。当比较控制单元150的第一输入端j输入高电平信号时，比较控制单元150控制第二开关单元140导通。此时，储能单元110的第一端a通过第二开关单元140与电平转换芯片220的第一信号输出端222连接。当比较控制单元150的第一输入端j输入低电平信号时，比较控制单元150无法控制第二开关单元140导通，此时，第二开关单元140关断，储能单元110的第一端a与电平转换芯片220的第一信号输出端222之间断开。在一些实施例中，第二预设电压端V2可以是地线GND。此时，第二预设电压为0V。
在一些实施例中，依旧如图4所示，电流控制电路10还可以包括第三开关单元160。第三开关单元160具有第一端p、第二端n和控制端q。第三开关单元160的第一端p用于与电平转换芯片220的第一信号输出端222连接，第三开关单元160的第二端n与储能单元110的第二端b连接。第三开关单元160的控制端q用于控制第三开关单元160的第一端p与第二端n之间的导通与否。也就是说，第三开关单元160连接于电平转换芯片220的第一信号输出端222与储能单元110的第二端b之间。如此，当第三开关单元160导通时，即第三开关单元160的第一端p和第二端n之间导通时，储能单元110的第二端b通过第三开关单元160与电平转换芯片220的第一信号输出端222连接。当第三开关单元160关断时，第三开关单元160的第一端p和第二端n之间断开，储能单元110的第二端b与电平转换芯片220的第一信号输出端222之间也断开。
第三开关单元160的控制端q与比较控制单元150的输出端m连接。当比较控制单元150的第一信号输入端302输入低电平信号时，比较控制单元150控制第三开关单元160导通。当比较控制单元150的第一信号输入端302输入高电平信号时，比较控制单元150控制第三开关单元160关断。
在电平转换芯片220接收到关机指令时，电平转换芯片220的第一信号输出端222输出高电平信号。在电平转换芯片220接收到开机指令时，电平转换芯片220的第一信号输出端222可以输出低电平信号。一般地，高电平信号为正电压，负电平信号为负电压。在显示装置正常工作时，电平转换芯片220的第一信号输出端222输出低电平信号。在该实施例中，图4所示的电流控制电路10可以在电平转换芯片220接收到关机指令和开机指令时工作。在电平转换芯片220接收到关机指令时，电平转换芯片220的第一信号输出端222输出高电平信号。此时，比较控制单元150控制第二开关单元140导通，为正电压的高电平信号输出至储能单元110的第一端a。脉宽调制单元130通过调节第一开关单元120的占空比，即可调节储能单元110第一端a的电压大小及储能单元110中的电流大小，从而准确控制显示装置关机时显示面板30中的电流大小，保护显示面板30。在电平转换芯片220接收到开机指令时，电平转换芯片220的第一信号输出端222输出低电平信号。此时，比较控制单元150控制第一开关单元120导通，为负电压的低电平信号输出至储能单元110的第二端b。脉宽调制单元130通过调节第一开关单元120的占空比，即可调节储能单元110第y一端a的电压大小及储能单元110中的电流大小，从而准确控制显示装置开机时显示面板30中的电流大小，保护显示面板30。
图5是本申请实施例三提供的电流控制电路10的电路结构图。如图5所示，在一些实施例中，比较控制单元150可以包括电阻R1、电阻R2和运算放大器A1。
具体地，电阻R1的第一端用于与电平转换芯片220的第一信号输出端222连接。电阻R2的第一端与电阻R1的第二端连接，电阻R2的第二端用于与第二预设电压端连接。运算放大器A1的同相输入端与电阻R1的第二端连接，运算放大器A1的反相输入端与电阻R2的第二端连接，运算放大器A1的输出端与第二开关单元140的控制端连接。其中，在图5所示的实施例中，第二预设电压端V2为地线GND。电阻R1和电阻R2可以是可变电阻。运算放大器A1可以是过零电压比较器。如此，通过调节电阻R1和电阻R2的大小，可以使电平转换芯片220的第一信号输出端222输出高电平信号时，运算放大器A1的输出端输出高电平信号；电平转换芯片220的第一信号输出端222输出低电平信号时，运算放大器A1的输出端输出低电平信号。
第二开关单元140可以包括晶体管M1。这里的晶体管M1可以是一个高电平导通的N型MOS管。晶体管M1的栅极与比较控制单元150的输出端连接，晶体管M1的漏极用于与电平转换芯片220的第一信号输出端222连接，晶体管M1的源极与储能单元110的第一端连接。也就是说，当电平转换芯片220的第一信号输出端222输出高电平信号时，运算放大器A1的输出端输出高电平信号，晶体管M1的源极与漏极之间导通。当电平转换芯片220的第一信号输出端222输出低电平信号时，运算放大器A1的输出端输出低电平信号，晶体管M1的源极与漏极之间关断。在其他一些实施例中，第二开关单元140还可以包括连接在晶体管M1的栅极与比较控制单元150的输出端之间的电阻，或/和，连接在晶体管M1的源极与储能单元110的第一端之间的电阻，或/和，连接在晶体管M1的漏极与电平转换芯片220的第一信号输出端222之间的电阻等。
第三开关单元160可以包括晶体管M2。这里的晶体管M2可以是一个低电平导通的P型MOS管。晶体管M2的栅极与比较控制单元150的输出端连接，晶体管M2的源极用于与电平转换芯片220的第一信号输出端222连接，晶体管M2的漏极与储能单元110的第二端连接。也就是说，当电平转换芯片220的第一信号输出端222输出低电平信号时，运算放大器A1的输出端输出低电平信号，晶体管M2的源极与漏极之间导通。当电平转换芯片220的第一信号输出端222输出高电平信号时，运算放大器A1的输出端输出高电平信号，晶体管M2的源极与漏极之间关断。在其他一些实施例中，第三开关单元160还可以包括连接在晶体管M2的栅极与比较控制单元150的输出端之间的电阻，或/和，连接在晶体管M2的漏极与储能单元110的第二端之间的电阻，或/和，连接在晶体管M2的源极与电平转换芯片220的第一信号输出端222之间的电阻等。
实施例四：
图6是本申请实施例四提供的电流控制电路10的电路结构图。如图6所示，电流控制电路10还包括：稳压二极管D1。稳压二极管D1的阳极用于与第二预设电压端V2连接，第二预设电压端V2的电压小于第一预设电压端的电压。在图6所示的实施例中，第二预设电压端V2为地线GND。稳压二极管D1的阴极与第一开关单元120的第一端c连接。在第一开关单元120的第一端c与地线GND之间加入稳压二极管D1，可以防止第一预设电压端V1输出至第一开关单元120的第一端c的电流突变。
电流控制电路10还可以包括二极管D2。二极管D2的阳极用于与电平转换芯片220的第一信号输出端222连接，二极管D2的阴极与储能单元110的第一端a连接。在图6所示的实施例中，二极管D2的阳极通过第二开关单元140与电平转换芯片220的第一信号输出端222连接。在储能单元110的第一端a与第二开关单元140的第二端h之间加入二极管D2，即在储能单元110的第一端a与电平转换芯片220的第一信号输出端222之间加入二极管D2，可以避免储能单元110中的电流倒灌至电平转换芯片220的第一信号输出端222。
实施例五：
下面结合图1至图6，对本申请实施例提供的电流控制电路10应用在显示装置时的工作过程进行详细地解释说明。
在图6所示的实施例中，晶体管M1和M3为高电平导通、低电平关断的N型MOS管。晶体管M2为低电平导通、高电平关断的P型MOS管。运算放大器A1为过零电压比较器。电阻R1和电阻R2用于对电平转换芯片220的第一信号输出端222输出的电平信号进行分压。电阻R1和电阻R2为可调电阻，通过调节电阻R1和电阻R2的电阻大小，可以使电平转换芯片220的第一信号输出端222输出高电平信号时，运算放大器A1输出高电平信号；电平转换芯片220的第一信号输出端222输出低电平信号时，运算放大器A1输出低电平信号。
该电流控制电路10仅在显示装置开关机时连接在电平转换芯片220的第一信号输出端222与至少一个第二信号输出端224之间。在显示装置正常工作时，电流控制电路10与第一信号输出端222及各第二信号输出端224之间断开。这一方案可以通过硬件结构来实现。例如，在电流控制电路10与电平转换芯片220的第一信号输出端222之间加入开关器件，以及在电流控制电路10与电平转换芯片220的至少一个第二信号输出端224之间开关器件。当显示装置收到开机指令或关机指令（也即时序控制芯片210和电平转换芯片220均收到开机指令或关机指令）时，由时序控制芯片210控制这两个开关器件闭合，当显示装置正常工作时，由时序控制芯片210控制这两个开关器件断开。
在电平转换芯片220收到关机指令时，电平转换芯片220的第一信号输出端222输出正电压的高电平信号。此时，运算放大器A1输出高电平信号，晶体管M2关断，晶体管M1导通。电平转换芯片220的第一信号输出端222可以输出高电平信号至电感L1的左端。同时，第一预设电压端V1也通过晶体管M3输出电压至电感L1的左端，电感L1充电。如此，即可通过脉宽调制单元130控制晶体管M3的占空比，达到准确控制电感L1的电流大小的目的。
在电平转换芯片220收到开机指令时，电平转换芯片220的第一信号输出端222输出负电压的低电平信号。此时，运算放大器A1输出低电平信号，晶体管M1关断，晶体管M2导通。电平转换芯片220的第一信号输出端222可以输出低电平信号至电感L1的右端。同时第一预设电压端V1也通过晶体管M3输出电压至电感L1的左端，电感L1充电。如此，即可通过脉宽调制单元130控制晶体管M3的占空比，达到准确控制电感L1的电流大小的目的。
在本申请实施例中，电流控制电路10包括储能单元110、第一开关单元120和脉宽调制单元130。储能单元110的第一端a通过第一开关单元120与第一预设电压端V1连接，储能单元110的第一端a还与电平转换芯片220的第一信号输出端222连接，以输入高电平信号。储能单元110的第二端b与电平转换芯片220的第二信号输出端224连接。脉宽调制单元130用于调节第一开关单元120的占空比。如此，在电流控制电路10工作时，脉宽调制单元130通过调节第一开关单元120的占空比，即可调节第一预设电压端V1通过第一开关单元120输出至储能单元110的第一端a的电压大小，从而准确控制储能单元110的电压大小和电流大小。由于储能单元110的第二端b与电平转换芯片220的至少一个第二信号输出端224连接，即储能单元110的第二端b与显示面板30的至少一个第二信号输入端304连接，因此，通过准确控制储能单元110的电流大小，即可准确控制显示面板30中的电流大小，从而保护显示面板30。
电流控制电路10还可以包括比较控制单元150、第二开关单元140和第三开关单元160，以当电平转换芯片220的第一信号输出端222输出高电平信号时，高电平信号输出至储能单元110的第一端a；当电平转换芯片220的第二信号输出端224输出低电平信号时，低电平信号输出至储能单元110的第二端b。显示装置开机时电平转换芯片220的第一信号输出端222输出低电平信号。如此，脉宽调制单元130通过调节第一开关单元120的占空比，即可调节储能单元110第一端的电压大小及储能单元110中的电流大小，从而准确控制显示装置开机时显示面板30中的电流大小，保护显示面板30。在第一开关单元120的第一端与地线GND之间加入稳压二极管D1，可以防止第一预设电压端V1输出至第一开关单元120的第一端c的电流突变。在储能单元110的第一端a与电平转换芯片220的第一信号输出端222之间加入二极管D2，可以避免储能单元110中的电流倒灌至电平转换芯片220的第一信号输出端222。
实施例六：
本申请实施例还提供一种显示面板驱动装置20，包括电平转换芯片220以及如上述任意一个实施例中的电流控制电路10。
电平转换芯片220具有多个信号输出端。电平转换芯片220的多个信号输出端用于与显示面板30的多个信号输入端一一连接。电平转换芯片220接收到关机指令时，电平转换芯片220的多个信号输出端中的第一信号输出端222输出高电平信号。
电流控制电路10包括储能单元110、第一开关单元120和脉宽调制单元130。储能单元110的第一端用于与电平转换芯片220的第一信号输出端222连接，以输入高电平信号，储能单元110的第二端用于与电平转换芯片220的至少一个第二信号输出端224连接。第二信号输出端224是电平转换芯片220的多个信号输出端中除第一信号输出端222之外的其他信号输出端。第一开关单元120的第一端用于与第一预设电压端连接，第一开关单元120的第二端与储能单元110的第一端连接，第一开关单元120的控制端与脉宽调制单元130的输出端连接。脉宽调制单元130的输出端用于输出脉宽调制信号，脉宽调制信号用于控制第一开关单元120的占空比，以控制储能单元110的第一端的电压大小及储能单元110中的电流大小。
在一些实施例中，电流控制电路10还包括：第二开关单元140和比较控制单元150。
第二开关单元140的第一端用于与电平转换芯片220的第一信号输出端222连接，第二开关单元140的第二端与储能单元110的第一端连接。
比较控制单元150的第一输入端用于与电平转换芯片220的第一信号输出端222连接，比较控制单元150的第二输入端用于与第二预设电压端连接，第二预设电压端的电压小于高电平信号的电压，比较控制单元150的输出端与第二开关单元140的控制端连接，以当比较控制单元150的第一输入端输入高电平信号时，控制第二开关单元140导通。
在一些实施例中，比较控制单元150包括：电阻R1、电阻R2和运算放大器A1。
电阻R1的第一端用于与电平转换芯片220的第一信号输出端222连接。
电阻R2的第一端与电阻R1的第二端连接，电阻R2的第二端用于与第二预设电压端连接。
运算放大器A1的同相输入端与电阻R1的第二端连接，运算放大器A1的反相输入端与电阻R2的第二端连接，运算放大器A1的输出端与第二开关单元140的控制端连接。
在一些实施例中，第二开关单元140包括：晶体管M1。
晶体管M1的栅极与比较控制单元150的输出端连接，晶体管M1的漏极用于与电平转换芯片220的第一信号输出端222连接，晶体管M1的源极与储能单元110的第一端连接。
在一些实施例中，电流控制电路10还包括：第三开关单元160。
第三开关单元160的第一端用于与电平转换芯片220的第一信号输出端222连接，第三开关单元160的第二端与储能单元110的第二端连接，第三开关单元160的控制端与比较控制单元150的输出端连接，以当比较控制单元150的第一输入端输入低电平信号时，控制第三开关单元160导通。
在一些实施例中，第三开关单元160包括：晶体管M2。
晶体管M2的栅极与比较控制单元150的输出端连接，晶体管M2的源极用于与电平转换芯片220的第一信号输出端222连接，晶体管M2的漏极与储能单元110的第二端连接。
在一些实施例中，电流控制电路10还包括：稳压二极管D1。
稳压二极管D1的阳极用于与第二预设电压端连接，第二预设电压端的电压小于第一预设电压端的电压，稳压二极管D1的阴极与第一开关单元120的第一端连接。
在一些实施例中，电流控制电路10还包括：二极管D2。
二极管D2的阳极用于与电平转换芯片220的第一信号输出端222连接，二极管D2的阴极与储能单元110的第一端连接。
在本申请实施例中，电流控制电路10包括储能单元110、第一开关单元120和脉宽调制单元130。储能单元110的第一端通过第一开关单元120与第一预设电压端连接，储能单元110的第一端还与电平转换芯片220的第一信号输出端222连接，以输入高电平信号。储能单元110的第二端与电平转换芯片220的其他信号输出端连接。脉宽调制单元130用于调节第一开关单元120的占空比。如此，在电流控制电路10工作时，脉宽调制单元130通过调节第一开关单元120的占空比，即可调节第一预设电压端通过第一开关单元120输出至储能单元110的第一端的电压大小，从而准确控制储能单元110的电压大小和电流大小。由于储能单元110的第二端与电平转换芯片220的至少一个第二信号输出端224连接，即储能单元110的第二端与显示面板30的至少一个第二信号输入端304连接，因此，通过准确控制储能单元110的电流大小，即可准确控制显示面板30中的电流大小，从而保护显示面板30。
电流控制电路10还可以包括比较控制单元150、第二开关单元140和第三开关单元160，以当电平转换芯片220的第一信号输出端222输出高电平信号时，高电平信号输出至储能单元110的第一端；当电平转换芯片220的第二信号输出端224输出低电平信号时，低电平信号输出至储能单元110的第二端。显示装置开机时电平转换芯片220的第一信号输出端222输出低电平信号。如此，脉宽调制单元130通过调节第一开关单元120的占空比，即可调节储能单元110第一端的电压大小及储能单元110中的电流大小，从而准确控制显示装置开机时显示面板30中的电流大小，保护显示面板30。在第一开关单元120的第一端与地线GND之间加入稳压二极管D1，可以防止第一预设电压端V1输出至第一开关单元120的第一端的电流突变。在储能单元110的第一端与电平转换芯片220的第一信号输出端222之间加入二极管D2，可以避免储能单元110中的电流倒灌至电平转换芯片220的第一信号输出端222。
实施例七：
本申请实施例还提供一种显示装置，包括显示面板30以及如上述任意一个实施例中的显示面板驱动装置20。
显示面板30具有多个信号输入端。电平转换芯片220具有多个信号输出端。电平转换芯片220的多个信号输出端用于与显示面板30的多个信号输入端一一连接。电平转换芯片220接收到关机指令时，电平转换芯片220的多个信号输出端中的第一信号输出端222输出高电平信号。
电流控制电路10包括储能单元110、第一开关单元120和脉宽调制单元130。储能单元110的第一端用于与电平转换芯片220的第一信号输出端222连接，以输入高电平信号，储能单元110的第二端用于与电平转换芯片220的至少一个第二信号输出端224连接。第二信号输出端224是电平转换芯片220的多个信号输出端中除第一信号输出端222之外的其他信号输出端。第一开关单元120的第一端用于与第一预设电压端连接，第一开关单元120的第二端与储能单元110的第一端连接，第一开关单元120的控制端与脉宽调制单元130的输出端连接。脉宽调制单元130的输出端用于输出脉宽调制信号，脉宽调制信号用于控制第一开关单元120的占空比，以控制储能单元110的第一端的电压大小及储能单元110中的电流大小。
在一些实施例中，电流控制电路10还包括：第二开关单元140和比较控制单元150。
第二开关单元140的第一端用于与电平转换芯片220的第一信号输出端222连接，第二开关单元140的第二端与储能单元110的第一端连接。
比较控制单元150的第一输入端用于与电平转换芯片220的第一信号输出端222连接，比较控制单元150的第二输入端用于与第二预设电压端连接，第二预设电压端的电压小于高电平信号的电压，比较控制单元150的输出端与第二开关单元140的控制端连接，以当比较控制单元150的第一输入端输入高电平信号时，控制第二开关单元140导通。
在一些实施例中，比较控制单元150包括：电阻R1、电阻R2和运算放大器A1。
电阻R1的第一端用于与电平转换芯片220的第一信号输出端222连接。
电阻R2的第一端与电阻R1的第二端连接，电阻R2的第二端用于与第二预设电压端连接。
运算放大器A1的同相输入端与电阻R1的第二端连接，运算放大器A1的反相输入端与电阻R2的第二端连接，运算放大器A1的输出端与第二开关单元140的控制端连接。
在一些实施例中，第二开关单元140包括：晶体管M1。
晶体管M1的栅极与比较控制单元150的输出端连接，晶体管M1的漏极用于与电平转换芯片220的第一信号输出端222连接，晶体管M1的源极与储能单元110的第一端连接。
在一些实施例中，电流控制电路10还包括：第三开关单元160。
第三开关单元160的第一端用于与电平转换芯片220的第一信号输出端222连接，第三开关单元160的第二端与储能单元110的第二端连接，第三开关单元160的控制端与比较控制单元150的输出端连接，以当比较控制单元150的第一输入端输入低电平信号时，控制第三开关单元160导通。
在一些实施例中，第三开关单元160包括：晶体管M2。
晶体管M2的栅极与比较控制单元150的输出端连接，晶体管M2的源极用于与电平转换芯片220的第一信号输出端222连接，晶体管M2的漏极与储能单元110的第二端连接。
在一些实施例中，电流控制电路10还包括：稳压二极管D1。
稳压二极管D1的阳极用于与第二预设电压端连接，第二预设电压端的电压小于第一预设电压端的电压，稳压二极管D1的阴极与第一开关单元120的第一端连接。
在一些实施例中，电流控制电路10还包括：二极管D2。
二极管D2的阳极用于与电平转换芯片220的第一信号输出端222连接，二极管D2的阴极与储能单元110的第一端连接。
在本申请实施例中，电流控制电路10包括储能单元110、第一开关单元120和脉宽调制单元130。储能单元110的第一端通过第一开关单元120与第一预设电压端连接，储能单元110的第一端还与电平转换芯片220的第一信号输出端222连接，以输入高电平信号。储能单元110的第二端与电平转换芯片220的其他信号输出端连接。脉宽调制单元130用于调节第一开关单元120的占空比。如此，在电流控制电路10工作时，脉宽调制单元130通过调节第一开关单元120的占空比，即可调节第一预设电压端通过第一开关单元120输出至储能单元110的第一端的电压大小，从而准确控制储能单元110的电压大小和电流大小。由于储能单元110的第二端与电平转换芯片220的至少一个第二信号输出端224连接，即储能单元110的第二端与显示面板30的至少一个第二信号输入端304连接，因此，通过准确控制储能单元110的电流大小，即可准确控制显示面板30中的电流大小，从而保护显示面板30。
电流控制电路10还可以包括比较控制单元150、第二开关单元140和第三开关单元160，以当电平转换芯片220的第一信号输出端222输出高电平信号时，高电平信号输出至储能单元110的第一端；当电平转换芯片220的第二信号输出端224输出低电平信号时，低电平信号输出至储能单元110的第二端。显示装置开机时电平转换芯片220的第一信号输出端222输出低电平信号。如此，脉宽调制单元130通过调节第一开关单元120的占空比，即可调节储能单元110第一端的电压大小及储能单元110中的电流大小，从而准确控制显示装置开机时显示面板30中的电流大小，保护显示面板30。在第一开关单元120的第一端与地线GND之间加入稳压二极管D1，可以防止第一预设电压端V1输出至第一开关单元120的第一端的电流突变。在储能单元110的第一端与电平转换芯片220的第一信号输出端222之间加入二极管D2，可以避免储能单元110中的电流倒灌至电平转换芯片220的第一信号输出端222。
以上所述实施例仅用以说明本申请的技术方案，而非对其限制；尽管参照前述实施例对本申请进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本申请各实施例技术方案的精神和范围，均应包含在本申请的保护范围之内。

Claims (16)

  1. 一种电流控制电路，应用于显示面板驱动装置（20），所述显示面板驱动装置（20）包括电平转换芯片（220），所述电平转换芯片（220）具有多个信号输出端，所述电平转换芯片（220）的多个信号输出端用于与显示面板（30）的多个信号输入端一一连接，所述电平转换芯片（220）接收到关机指令时，所述电平转换芯片（220）的多个信号输出端中的第一信号输出端（222）输出高电平信号；
    其中，所述电流控制电路（10）包括：储能单元（110）、第一开关单元（120）和脉宽调制单元（130）；
    所述储能单元（110）的第一端用于与所述电平转换芯片（220）的第一信号输出端（222）连接，以输入高电平信号，所述储能单元（110）的第二端用于与所述电平转换芯片（220）的至少一个第二信号输出端（224）连接，所述第二信号输出端（224）是所述电平转换芯片（220）的多个信号输出端中除第一信号输出端（222）之外的其他信号输出端；
    所述第一开关单元（120）的第一端用于与第一预设电压端连接，所述第一开关单元（120）的第二端与所述储能单元（110）的第一端连接，所述第一开关单元（120）的控制端与所述脉宽调制单元（130）的输出端连接；
    所述脉宽调制单元（130）的输出端用于输出脉宽调制信号，所述脉宽调制信号用于控制所述第一开关单元（120）的占空比，以控制所述储能单元（110）的第一端的电压大小及所述储能单元（110）中的电流大小。
  2. 如权利要求1所述的电流控制电路，其中，所述电流控制电路（10）还包括：第二开关单元（140）和比较控制单元（150）；
    所述第二开关单元（140）的第一端用于与所述电平转换芯片（220）的第一信号输出端（222）连接，所述第二开关单元（140）的第二端与所述储能单元（110）的第一端连接；
    所述比较控制单元（150）的第一输入端用于与所述电平转换芯片（220）的第一信号输出端（222）连接，所述比较控制单元（150）的第二输入端用于与第二预设电压端连接，所述第二预设电压端的电压小于所述高电平信号的电压，所述比较控制单元（150）的输出端与所述第二开关单元（140）的控制端连接，以当所述比较控制单元（150）的第一输入端输入所述高电平信号时，控制所述第二开关单元（140）导通。
  3. 如权利要求2所述的电流控制电路，其中，所述比较控制单元（150）包括：电阻R1、电阻R2和运算放大器A1；
    所述电阻R1的第一端用于与所述电平转换芯片（220）的第一信号输出端（222）连接；
    所述电阻R2的第一端与所述电阻R1的第二端连接，所述电阻R2的第二端用于与所述第二预设电压端连接；
    所述运算放大器A1的同相输入端与所述电阻R1的第二端连接，所述运算放大器A1的反相输入端与所述电阻R2的第二端连接，所述运算放大器A1的输出端与所述第二开关单元（140）的控制端连接。
  4. 如权利要求2所述的电流控制电路，其中，所述第二开关单元（140）包括：晶体管M1；
    所述晶体管M1的栅极与所述比较控制单元（150）的输出端连接，所述晶体管M1的漏极用于与所述电平转换芯片（220）的第一信号输出端（222）连接，所述晶体管M1的源极与所述储能单元（110）的第一端连接。
  5. 如权利要求4所述的电流控制电路，其中，所述晶体管M1的栅极输入高电平信号时，所述晶体管M1的源极与漏极之间导通。
  6. 如权利要求2所述的电流控制电路，其中，所述电流控制电路（10）还包括：第三开关单元（160）；
    所述第三开关单元（160）的第一端用于与所述电平转换芯片（220）的第一信号输出端（222）连接，所述第三开关单元（160）的第二端与所述储能单元（110）的第二端连接，所述第三开关单元（160）的控制端与所述比较控制单元（150）的输出端连接，以当所述比较控制单元（150）的第一输入端输入低电平信号时，控制所述第三开关单元（160）导通。
  7. 如权利要求6所述的电流控制电路，其中，所述第三开关单元（160）包括：晶体管M2；
    所述晶体管M2的栅极与所述比较控制单元（150）的输出端连接，所述晶体管M2的源极用于与所述电平转换芯片（220）的第一信号输出端（222）连接，所述晶体管M2的漏极与所述储能单元（110）的第二端连接。
  8. 如权利要求7所述的电流控制电路，其中，所述晶体管M2的栅极输入低电平信号时，所述晶体管M2的源极与漏极之间导通。
  9. 如权利要求2所述的电流控制电路，其中，所述第二预设电压端为地线。
  10. 如权利要求1所述的电流控制电路，其中，所述电流控制电路（10）还包括：稳压二极管D1；
    所述稳压二极管D1的阳极用于与第二预设电压端连接，所述第二预设电压端的电压小于所述第一预设电压端的电压，所述稳压二极管D1的阴极与所述第一开关单元（120）的第一端连接。
  11. 如权利要求1所述的电流控制电路，其中，所述电流控制电路（10）还包括：二极管D2；
    所述二极管D2的阳极用于与所述电平转换芯片（220）的第一信号输出端（222）连接，所述二极管D2的阴极与所述储能单元（110）的第一端连接。
  12. 如权利要求1所述的电流控制电路，其中，所述第一开关单元（120）包括：晶体管M3；
    所述晶体管M3的栅极所述脉宽调制单元（130）的输出端连接，所述晶体管M3的漏极与所述第一预设电压端连接，所述晶体管M3的源极与所述储能单元（110）的第一端连接。
  13. 如权利要求12所述的电流控制电路，其中，所述晶体管M3的栅极输入高电平信号时，所述晶体管M3的源极与漏极之间导通。
  14. 如权利要求1所述的电流控制电路，其中，所述储能单元（110）包括：电感L1；
    所述电感L1的第一端用于与所述电平转换芯片（220）的第一信号输出端（222）连接，且所述电感L1的第一端与所述第一开关单元（120）的第二端连接；所述电感L1的第二端用于与所述电平转换芯片（220）的至少一个第二信号输出端（224）连接。
  15. 一种显示面板驱动装置，其中，包括电平转换芯片（220）以及如权利要求1至14任意一项所述的电流控制电路（10）；
    所述电平转换芯片（220）具有多个信号输出端，所述电平转换芯片（220）的多个信号输出端用于与显示面板（30）的多个信号输入端一一连接，所述电平转换芯片（220）接收到关机指令时，所述电平转换芯片（220）的多个信号输出端中的第一信号输出端（222）输出高电平信号。
  16. 一种显示装置，其中，包括显示面板（30）以及如权利要求15所述的显示面板驱动装置（20）；
    所述显示面板（30）具有多个信号输入端，所述电平转换芯片（220）具有多个信号输出端，所述电平转换芯片（220）的多个信号输出端与所述显示面板（30）的多个信号输入端一一连接，所述电平转换芯片（220）接收到关机指令时，所述电平转换芯片（220）的多个信号输出端中的第一信号输出端（222）输出高电平信号。
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