WO2023047130A1

WO2023047130A1 - Etched-facet photonic devices with improved anti-reflection coating

Info

Publication number: WO2023047130A1
Application number: PCT/GB2022/052419
Authority: WO
Inventors: Andrew Mckee
Original assignee: Sivers Photonics Limited
Priority date: 2021-09-23
Filing date: 2022-09-23
Publication date: 2023-03-30
Also published as: GB202213937D0; GB202113618D0

Abstract

A photonic device comprises a semiconductor substrate (136),an optical waveguide (104) formed over the semiconductor substrate, an etched facet (110) at an end of the waveguide, and a PECVD-deposited anti-reflection coating (117,119) deposited on the etched facet, the anti-reflection coating consisting of a layer of silicon dioxide (119) and a layer of silicon nitride (117) in between the etched facet (110) and the layer of silicon dioxide (119). The photonic device may be a semiconductor optical amplifier.

Description

ETCHED-FACET PHOTONIC DEVICES WITH IMPROVED ANTI-REFLECTION COATING

The present invention relates to photonic devices, chips and photonic chip assemblies, in particular with photonic devices having etched-facet waveguides with anti-reflection coatings.

Background Art

In the field of photonic devices, etched facets are used instead of cleaved facets, for photonic devices such as ridge-waveguide semiconductor optical amplifiers (SOAs). An etched-facet waveguide can be processed and tested at wafer scale more efficiently than a cleaved-facet waveguide made by cleaving the substrate.

Another advantage of etched facets is that the facet angle with respect to the waveguide can be defined by lithography, rather than the facet angle being constrained by the cleaved crystal plane and waveguide orientation. Oblique angling of the etched facet with respect to the propagation direction of waveguide is used to reduce facet reflectance.

Ultra-low reflectance AR (anti-reflection) (ULAR) coatings are useful, particularly for SOA (Semiconductor Optical Amplifier) and RSOA (Reflective Semiconductor Optical Amplifier) applications. Unlike lasers that can work well with more reflective AR coatings, SOAs and RSOAs operate over a spectrum of wavelengths and higher- reflectance AR coatings cause problems with “gain ripple” which is modulation of the gain spectrum. However, even for lasers, there is an advantage to using low- reflectance anti-reflection coatings.

A problem us that known ULAR coatings are not suitable for efficient processing using plasma-enhanced chemical vapour deposition (PECVD). PECVD is a useful deposition method for whole-wafer processing, compatible with the whole-wafer etched-facet process.

WO 03/044571 A2 discloses wafer-level PECVD of SiN/SiO2 multilayers for high- reflection (HR) and optimal-reflection (OR) coatings on etched facets. For AR (anti- reflective) coatings, single layers are disclosed. Multilayer anti-reflection (AR) coatings are only disclosed for non-PECVD coatings.

A known AR coating for etched facets is a single-layer SiN, which gives a facet reflectance of around 1% (for the normal non-angled facet).

Summary of invention

It is desirable to provide photonic devices, chips and photonic chip assemblies, that overcome at least some of the above-identified problems.

According to a first aspect of the present invention, there is provided a photonic device comprising:

- a semiconductor substrate;

- an optical waveguide formed over the semiconductor substrate;

- an etched facet at an end of the waveguide; and

- a PECVD-deposited anti-reflection coating deposited on the etched facet, the anti-reflection coating comprising a layer of silicon nitride and a layer of silicon dioxide.

Preferably, the anti-reflection coating comprises the layer of silicon nitride in between the etched facet and the layer of silicon dioxide.

Preferably, the anti-reflection coating consists of the layer of silicon nitride and the layer of silicon dioxide.

Preferably, the anti-reflection coating is deposited before a metal layer to act as an insulating layer beneath the metal layer. Preferably, the photonic device comprises a semiconductor optical amplifier.

Preferably, the optical waveguide is configured to guide radiation to an end facet of the waveguide, the end facet being angled to provide at the end facet an oblique angle of incidence for radiation propagating along the waveguide.

Preferably, the silicon nitride layer’s thickness may be greater than, and preferably greater than or equal to, the silicon dioxide layer’s thickness.

According to a second aspect of the present invention, there is provided a photonic chip comprising the photonic device of the first aspect.

According to a third aspect of the present invention, there is provided a photonic chip assembly comprising the photonic chip of the second aspect and a photonic integrated circuit having a receiving waveguide aligned to receive a beam of radiation from the photonic chip, the beam of radiation exiting the waveguide via the etched facet after propagating along the waveguide.

According to a fourth aspect of the present invention, there is provided a photonic chip assembly comprising the photonic chip of the second aspect and a photonic integrated circuit having a launching waveguide aligned to launch a beam of radiation to the photonic chip, the beam of radiation entering the waveguide via the etched facet to propagate along the waveguide.

Brief description of drawings

Embodiments of the present invention will now be described, by way of example only, with reference to the drawings, in which:

Figure 1 illustrates, in schematic form, a known etched-facet SOA chip, in orthographic and cross-section views.

Figure 2 illustrates, in schematic form, a known coated etched facet, in cross section. Figure 3 illustrates, in schematic form, coated etched facets in accordance with embodiments of the present invention, in cross section.

Figure 4 illustrates, in schematic form, an etched-facet SOA chip in accordance with an embodiment of the present invention, in orthographic and cross-section views.

Figure 5 illustrates, in schematic form, an etched-facet SOA chip in accordance with another embodiment of the present invention, in orthographic and cross-section views.

Figure 6 illustrates, in schematic form, a portion of an angled etched-facet SOA chip and a photonic chip assembly, in accordance with embodiments of the present invention, in plan view.

Figure 7 is a wireframe contour plot of calculated minimum reflectance of an antireflection coating as a function of thicknesses of silicon nitride on silicon dioxide.

Figure 8 is a wireframe contour plot of calculated minimum reflectance of an antireflection coating as a function of thicknesses of silicon dioxide on silicon nitride, in accordance with an embodiment of the present invention.

Detailed description

In this description and claims, optical and optical radiation relate to electromagnetic radiation over a range of wavelengths not limited to visible radiation, such as wavelengths spanning ultraviolet, visible and infrared radiation. An InP semiconductor optical amplifier (SOA) is described as an example of a photonic device. Other compound semiconductor based devices may be used with embodiments. For example photonic devices based on GaAs, GaSb, or GaN, or photonic devices based on other material systems, may be used. Rather than the SOA example described herein, other photonic devices may be used, such as lasers, reflective semiconductor optical amplifiers (RSOAs) used stand-alone or in external cavity lasers, or electro-absorption modulators (EAMs), or waveguide detectors.

The examples described herein relate to photonic devices fabricated with a ridge waveguide with an etched facet, but the skilled person will appreciate that embodiments may include photonic devices fabricated with a buried heterostructure waveguide with an etched facet.

Although silicon nitride is described as SiN, the skilled person will appreciate that other compositions of silicon nitride may be represented as SiNx.

Figure 1 illustrates a known photonic device, in this example an etched-facet SOA chip 100, with a compound semiconductor SOA on an InP (indium phosphide) substrate. Figure 1 a is an orthographic view of the SOA chip 100. Figure 1 b is a cross-section (not to scale) along a-a shown in Figure 1 a. Figure 1 b is thus a crosssection through the waveguide 104 along its propagation direction (length). Figure 1 c is a cross-section (not to scale) along b-b shown in Figure 1 a. Figure 1 c is thus a cross-section across the waveguide 104 perpendicular to its propagation direction.

The structure of the SOA chip 100 is now described in the context of its wafer-scale fabrication.

A ridge waveguide 104 is defined by a waveguide etch. A pattern of openings in a hard mask in a lithographic step defines trenches 102, 106 that are etched to define the ridge waveguide 104 in between them. An insulating dielectric material 118 covers most of the top surface, and a contact window is opened up in the dielectric along the top of the ridge 104. Subsequently, metal 116 is deposited covering the ridge waveguide and making contact through the contact window to the top of the ridge waveguide 104.

A pad of the metal 116 at one side of the ridge waveguide is used as an area for soldering or bonding to the metal. In subsequent fabrication steps, a patterned hard mask and facet etch defines etched facets 110, 108 at either end of the ridge waveguide 104. The facet etch creates an etched surface which extends either side of the etched facet. The facet etch is deeper than the ridge etch.

A small horizontal spacing is provided between the ridge trenches 102, 106 and the facet etch features, so that the etched facets 108, 110 are etched as flat planes rather than having corners with the ridge waveguide, which would etch unevenly and would be detrimental to the smoothness of the facet at the end of the waveguide. This results in a structure shaped like a T, with the waveguide being the trunk of the T, and walls 112 being the crossbar of the T. The effect of the spacing and resulting T-shaped structure is to ensure that the facet is smooth to provide efficient and reproducible transmission through optical coupling regions, or internal reflection at, the facets.

After the facet etch, an antireflection coating is applied to one etched facet 110 and an antireflection coating or high-reflectance coating is applied to the other etched facet 108 at the other end of the waveguide 104. Thus, antireflective coatings may be applied to one facet for a laser, or one or both facets for Semiconductor Optical Amplifiers (SOAs) or Electro-Absorption Modulators (EAMs).

Finally, a metallisation step coats the underside of the wafer with metal 140.

With reference to Figures 1 a and 1 b, in operation the SOA cavity, comprising the waveguide 104 bounded by facets 108 and 110 at either end, outputs optical radiation 142 through an optical coupling region 114.

With reference to Figures 1 b and 1 c, the layer structure will now be described in detail. From the top in Figure 1 b, a p-metal layer 116 extends down through a window in the dielectric layer 118. The p-metal layer 116 makes contact to a p-type InGaAs contact layer 120, which is the top epitaxially-grown layer. Below that, a p- type InP cladding layer 122 is followed by a p-type etch stop layer 124. The etch that stops on that layer 124 is the waveguide ridge etch, as illustrated in Figure 1 c. Next, a p-type InP spacer layer 126 is followed by a p-type separate confinement heterostructure (SCH) layer 128, an undoped multi-quantum well (MQW) layer 130, and an n-type SCH layer 132. The SCH and MQW layers are the optically active layers in the laser.

The n-type InP buffer layer 134 is the first of the epitaxial layers that is grown on the n-type InP substrate 136.

This specific layer structure is suitable for a laser as well as an SOA. However, the layer structure may be optimised for different active photonic devices.

In this example, the etched facets 110, 108 are coated with a PECVD-deposited silicon nitride AR coating 138. The AR coating is selectively removed after deposition to allow bonding to metallic layers.

Finally, the n-metal layer 140 is shown.

In operation, as shown at the left of Figure 1 b, a beam of optical radiation 140, illustrated bounded with dotted lines, is output from the etched facet 110 at the optical coupling region 114. In this example, the optical radiation is output from the optically active layers of the ridge waveguide 128, 130, 132 (collectively labelled 125 in Figure 1 c) into the air to the left of the etched facet 110. For this SOA example, radiation is input to the waveguide at the other etched facet 108.

With reference to Figure 1 c , the p-metal layer 116 can be seen on top of the dielectric layer 118 as it covers trenches 102, 106 either side of the ridge waveguide 104. The p-metal layer 116 contacts the top of the ridge 104 through a window in the dielectric 118. The trenches 102, 106 are etched by the waveguide etch, which selectively stops on the p-type etch stop layer 124.

The location of the optical coupling region 114 is shown projected along the waveguide from the etched facet 110 onto this cross-section plane b-b. It is centred horizontally with respect to the ridge waveguide 104 and centred vertically with respect to the undoped MQW layer 130.

In the drawings of Figure 1 and in subsequent drawings, features labelled with the same numerals correspond to the same features in subsequent drawings. Therefore a description of a feature in any drawing should also apply to a feature labelled with the same numeral elsewhere in this description.

Figure 2 illustrates, in schematic form, a known coated etched facet, in cross section. The etched facet 110 is shown with the optically active layers 125 and substrate 136. In this example, the etched facet 110 is coated with a PECVD-deposited silicon nitride anti-reflection coating 138.

Figure 3a illustrates, in schematic form, a coated etched facet in accordance with an embodiment of the present invention, in cross section. The etched facet 110 is shown with the optically active layers 125 and substrate 136. A PECVD-deposited anti-reflection coating is deposited on the etched facet 110, the anti-reflection coating comprising a layer of silicon nitride 117 with thickness T1 and a layer of silicon dioxide 119 with thickness T2. In this example, the anti-reflection coating comprises the layer of silicon nitride 117 in between the etched facet 110 and the layer of silicon dioxide 119. In other words, the silicon nitride layer 117 is closer to the etched facet 110 than the silicon dioxide layer 119.

Figure 3b illustrates, in schematic form, a coated etched facet in accordance with an embodiment of the present invention, in cross section. The features are the same as described with reference to Figure 3a, except the PECVD coating is sub-conformal, such that the layer thickness of the coating on the vertical etched facet 110 is thinner than on the horizontal surfaces 302, 304.

For low reflectance, the thickness of the silicon nitride layer 117 may be greater than, and preferably greater than or equal to, the thickness of the silicon dioxide layer 119.

The advantage of the coatings described with reference to Figures 3a and 3b is that they can provide <0.1% reflectance. This has application to photonic devices where ultra-low anti-reflection coatings are required, particularly SOAs and RSOAs.

Figure 4 illustrates, in schematic form, an etched-facet SOA chip in accordance with an embodiment of the present invention, in orthographic and cross-section views. The features in Figure 4 are the same as those described with reference to Figure 1 , with the following difference. The facet coating is a silicon nitride 117 and silicon dioxide 119 multilayer ULAR coating, as describe with reference to Figures 3a and 3b.

The features in Figure 5 are the same as those described with reference to Figure 1 , with the following differences. Firstly, the facet coating is a silicon nitride 117 and silicon dioxide 119 multilayer ULAR coating, as describe with reference to Figures 3a and 3b. In this respect, the photonic device shown in Figure 5 is similar to that shown in Figure 4.

Secondly, the ULAR coating 117,119 is used as an insulator below the metal layer 116, unlike in the known SOA chip of Figure 1 , where the isolation layer 118 is deposited before the metal layer 116 and the anti-reflection coating 138 is deposited separately after the metal layer 116. The anti-reflection coating 117,119 being deposited before the metal layer 116 thus acts as an insulating layer beneath the metal layer, instead of the separate insulating dielectric layer 118 described with reference to Figure 1 .

With reference to Figure 5c , the p-metal layer 116 can be seen on top of the antireflection coating layer 117,119 as it covers trenches 102, 106 either side of the ridge waveguide 104. The p-metal layer 116 contacts the top of the ridge 104 through a window in the anti-reflection coating layer 117,119.

Figure 6 illustrates in plan view a portion of an etched-facet SOA chip similar to that shown in Figures 4 and 5, but with an angled etched-facet, along with a photonic integrated circuit.

With reference to Figure 6, The SOA chip 600 comprises a waveguide 604 defined by etched trenches 602, 606. The etched surface 610 created by the facet etch extends either side of an angled etched facet 614. Walls 612 provide a structure shaped like a T, having the same function as the walls 612 described with reference to Figures 1 , 4 and 5.

The waveguide 604 is configured to guide radiation to the end facet 614 of the waveguide. The radiation is thus guided along the waveguide’s propagation direction at the end facet 660. The end facet in this example is angled, so it provides at the end facet 614 an oblique angle of incidence for such radiation. Furthermore, the waveguide 604 is configured such that the waveguide's propagation direction 660 at the end facet is parallel to the normal 650 to the SOA chip's edge 611 across which the radiation propagating along the waveguide and through the etched facet 614 exits the SOA chip in a beam 640. The radiation beam 640 exiting the SOA chip is illustrated schematically as a cone.

Because the etched facet 614 is angled, and because the waveguide 604 is perpendicular to the chip edge 611 , radiation propagating along the waveguide exits the waveguide at the end facet 614 in a beam 640 at an oblique angle.

Figure 6 also shows a photonic chip assembly comprising the SOA chip 600 and a photonic integrated circuit 670 having a receiving waveguide 672 aligned to receive at least some of the beam of radiation 640 from the SOA chip 600, the beam of radiation exiting the waveguide via the etched facet 614 after propagating along the waveguide 604. In another arrangement, a photonic chip assembly may comprise the SOA chip and a photonic integrated circuit having a launching waveguide aligned to launch a beam of radiation to the SOA chip, the beam of radiation entering the waveguide of the SOA via the etched facet to propagate along the waveguide. These arrangements may be combined together.

Figure 7 is a wireframe contour plot of calculated minimum reflectance as a function of thicknesses of an anti-reflection coating comprising silicon nitride on silicon dioxide.

The calculation is based on a wavelength of 1550nm, an incidence angle of 0 and a substrate refractive index of 3.18. The anti-reflection coating comprises a layer of silicon dioxide with refractive index 1 .45 and a thickness T1 under a layer of silicon nitride with refractive index 1 .9 and a thickness T2.

Figure 8 is a wireframe contour plot of calculated minimum reflectance as a function of thicknesses of an anti-reflection coating comprising silicon dioxide on silicon nitride, in accordance with an embodiment of the present invention.

The calculation is based on a wavelength of 1550nm, an incidence angle of 0 and a substrate refractive index of 3.18. The anti-reflection coating comprises a layer of silicon nitride with refractive index 1 .9 and a thickness T1 under a layer of silicon dioxide with refractive index 1 .45 and a thickness T2.

The simulation data shown in Figures 7 and 8 illustrates the advantage of the particular order with the silicon nitride being under the silicon dioxide, because the eye of lowest reflectance is larger. Nevertheless, both arguments provide a ULAR with less than 0.05% reflectance.

Experimental results of a two-layer PECVD coating with silicon nitride being under the silicon dioxide showed a reflectance of ~2E-4 (or 0.02%). This compares well to a reflectance value of ~1 E-4 using a conventional evaporated facet coating.

Small changes in refractive index will affect the optimum thickness. Furthermore, sub-conformal coating, as described with reference to Figure 3b, affect the thickness. These factors can be calibrated for for each PECVD deposition tool, and the process controlled to give acceptable tolerances.

Claims

1 . A photonic device comprising:

- a semiconductor substrate;

- an optical waveguide formed over the semiconductor substrate;

- an etched facet at an end of the waveguide; and

- a PECVD-deposited anti-reflection coating deposited on the etched facet, the anti-reflection coating consisting of a layer of silicon dioxide and a layer of silicon nitride in between the etched facet and the layer of silicon dioxide.

2. The photonic device of any preceding claim, wherein the anti-reflection coating is deposited before a metal layer to act as an insulating layer beneath the metal layer.

3. The photonic device of any preceding claim, wherein the photonic device comprises a semiconductor optical amplifier.

4. The photonic device of any preceding claim, wherein the optical waveguide is configured to guide radiation to an end facet of the waveguide, the end facet being angled to provide at the end facet an oblique angle of incidence for radiation propagating along the waveguide.

5. A photonic chip comprising the photonic device of any preceding claim.

6. A photonic chip assembly comprising the photonic chip of claim 5 and a photonic integrated circuit having a receiving waveguide aligned to receive a beam of radiation from the photonic chip, the beam of radiation exiting the waveguide via the etched facet after propagating along the waveguide.

7. A photonic chip assembly comprising the photonic chip of claim 5 and a photonic integrated circuit having a launching waveguide aligned to launch a beam of radiation to the photonic chip, the beam of radiation entering the waveguide via the etched facet to propagate along the waveguide.