WO2023045389A1

WO2023045389A1 - Network card adaptation circuit, network card adaptation method, and related apparatus

Info

Publication number: WO2023045389A1
Application number: PCT/CN2022/096162
Authority: WO
Inventors: 胡仁劼; 居海强; 张鑫; 黄城
Original assignee: 华为技术有限公司
Priority date: 2021-09-26
Filing date: 2022-05-31
Publication date: 2023-03-30
Also published as: CN115878523A

Abstract

A network card adaptation circuit, which is used for realizing the requirements of a flexible IO slot position for the mixed insertion of a standard OCP network card and an NIC network card managed by a CPU. The network card adaptation circuit specifically comprises: a network card detection circuit, a CPLD, a switch and a CPU, wherein the network card detection circuit is connected to a first pin and a second pin of the CPLD; a sixth pin and a seventh pin of the CPLD are switched with pins of the CPU by using the switch; the network card detection circuit multiplexes signals indicated by the first pin and the second pin of the CPLD as a network card detection signal, and indicates, according to the network card detection signal, that a network card inserted into an interface is a first network card managed by the CPU or a second network card under an OCP 3.0 protocol; when it is determined that the network card inserted into the interface is the first network card, a third pin, a fourth pin and a fifth pin in the CPLD indicate a signal corresponding to the first network card, and the switch gates the CPU, such that the CPU manages the signal corresponding to the first network card; and when it is determined that the network card inserted into the interface is the second network card, the switch gates the sixth pin and the seventh pin of the CPLD, such that the pins of the CPLD indicate a signal corresponding to the second network card.

Description

A network card adaptation circuit, a network card adaptation method, and related devices

This application claims the priority of the Chinese patent application submitted to the State Intellectual Property Office of China on September 26, 2021, with the application number 202111129484.6, and the title of the invention is "A network card adaptation circuit, network card adaptation method and related devices". The entire contents are incorporated by reference in this application.

technical field

The present application relates to the field of computers, and in particular to a network card adaptation circuit, a network card adaptation method and related devices.

Background technique

The rear window of the current Kunpeng rack server supports two flexible input/output (IO) slots, which can be respectively used to insert an open source computing project (open compute project, OCP) 3.0 network card and a central processing unit (central processing unit, CPU) managed network interface card (network interface card, NIC).

In terms of physical design, the OCP 3.0 network card and the NIC network card managed by the CPU have the same shape and structure, but due to the difference in the management of the network card, the interface design is also different. Therefore, the IO slots on the rear window of the server cannot be mixed. For example, taking the S920X05 server as an example, the rear window supports two

flexible IO slots

1 and 2. Among them, the flexible IO slot 1 only supports the standard OCP network card, and the flexible IO slot 2 only supports the NIC network card managed by the CPU. Mixed insertion.

Therefore, the customer's configuration requirements for external network cards are limited, and the requirements for two standard OCP network cards or two CPU-managed NIC network cards cannot be met.

Contents of the invention

Embodiments of the present application provide a network card adaptation circuit, a network card adaptation method, and related devices, which are used to realize the mixed insertion requirements of standard OCP network cards and CPU-managed NIC network cards in flexible IO slots.

In the first aspect, the embodiment of the present application provides a network card adaptation circuit, specifically as follows:

Network card detection circuit, complex programmable logic device (complex programmable logic device, CPLD), switch and CPU; The CPLD includes a first pin, a second pin, a third pin, a fourth pin, and a fifth pin , the sixth pin and the seventh pin; the network card detection circuit is connected with the first management and the second pin of the CPLD; the sixth pin and the seventh pin of the CPLD are connected with the switch; The CPU is connected to the switch; the network card detection circuit multiplexes the signal indicated by the first pin and the second pin of the CPLD as a network card detection signal, and indicates that the network card inserted into the interface is according to the network card detection signal. The first network card managed by the CPU or the second network card under the Open Computing Project OCP3.0 protocol; when the network card detection signal indicates that the network card inserted into the interface is the first network card, the third pin and the second pin in the CPLD Four pins and the fifth pin indicate the signal corresponding to the first network card, and the switch strobes the CPU so that the CPU manages the signal corresponding to the first network card; the detection signal of the network card indicates the insertion interface When the network card is the first network card, the switch gates the sixth pin and the seventh pin of the CPLD, so that the third pin, the fourth pin, the fifth pin, The sixth pin and the seventh pin indicate signals corresponding to the second network card.

In this embodiment, the network card adaptation circuit utilizes the network card detection circuit and multiplexes signals under the original OCP3. The control circuit of the managed NIC card is switched, and relevant signals are multiplexed on the control circuit of the original OCP network card. In this way, the network adaptation circuit can reuse the standard OCP network card and the NIC card managed by the CPU, and realize the mixed insertion requirements of the standard OCP network card and the NIC network card managed by the CPU in the flexible IO slot.

Optionally, the network card detection circuit of the network card detection circuit includes a parallel first branch and a second branch, a parallel first network card detection branch and a second network card detection branch, a parallel first network card detection branch and a second network card detection branch. The two branches are connected in series with the parallel first network card detection branch and the second network card detection branch; wherein, the first branch includes a first power supply, a first resistor and a second resistor; the first resistor and the The second resistor is connected in parallel; the first resistor is connected to the first pin, and the second resistor is connected to the first power supply; the second branch includes a second power supply, a third resistor, and a fourth resistor and a MOS tube; the third resistor, the fourth resistor and the MOS tube are connected in parallel; the third resistor is connected to the second pin, and the fourth resistor is connected to the second power supply; The D pole of the MOS transistor is connected to the second pin through the third resistor, and the S pole of the MOS transistor is grounded; the first network card detection branch includes a fifth resistor, and the fifth resistor The other end of the network card is grounded; the second network card detection branch includes a sixth resistor and a seventh resistor connected in parallel, and the sixth resistor is connected to the third power supply; the seventh resistor is grounded; wherein, in the first network card detection When the branch is connected with the first branch and the second branch, the second pin inputs a high level; when the second network card detection branch is connected with the first branch and the second branch When the two branches are connected, the second pin inputs a low level.

Based on the above scheme, the design of each resistor and power supply in the network card detection circuit can be as follows: the first power supply, the second power supply and the third power supply are all set to 3v3 power supply, the first resistor, the three The resistance and the fifth resistance are all set to 33 ohms, and the second resistance, the fourth resistance, the sixth resistance and the seventh resistance are all set to 1000 ohms. It can be understood that this embodiment only provides a possible design of the resistance and power supply, but does not limit the design of the resistance and power supply, as long as the detection branch of the first network card and the first branch of the first network card are satisfied. When connected with the second branch, the second pin inputs a high level; when the second network card detection branch is connected with the first branch and the second branch, the first The condition that the two pins input a low level is sufficient.

Optionally, in the case of signal multiplexing between each pin of the CPLD and the pin of the CPU, the details may be as follows:

The first pin is the PERST0# signal defined by the OCP 3.0 protocol, and the PERST0# signal and the second pin are multiplexed as the network card detection signal;

When the network card detection signal indicates that the network card inserted into the interface is the first network card, the switch selects the CPU; the third pin and the fourth pin are used to output an interrupt signal; the second pin is used to output an interrupt signal; Four management pins are used to output the indication signal of the management state indicator light; the pin output of the CPU is used to manage the first signal of the optical module and the clock data recovery chip and the second signal for the management of the physical layer PHY chip;

When the network card detection signal indicates that the network card inserted into the interface is the second network card, the sixth pin and the seventh pin of the CPLD are selected by the switch; the third pin is used to output the OCP 3.0 protocol The defined PERST1# signal, the fourth pin is used to output the BIF2# signal defined by the OCP 3.0 protocol, the fifth pin is used to output the BIF[1:0]# signal defined by the OCP 3.0 protocol, and the first The six pins are used to output the SLOT_ID[1:0] signal defined by the OCP 3.0 protocol, and the seventh pin is used to output the PERST[3:2]# signal defined by the OCP 3.0 protocol.

In the second aspect, the present application provides a network card adaptation method, which is mainly applied to computer equipment configured with the network adaptation circuit of the first aspect, specifically as follows:

The network card detection circuit multiplexes the signal indicated by the first pin and the second pin of the CPLD as a network card detection signal, and indicates the network card type of the network card inserted into the interface according to the network card detection signal, and the network card type is CPU Manage the first network card or the second network card under the OCP protocol; determine the signal corresponding to the network card according to the type of the network card; use the signal to manage the network card.

Optionally, the network card type indicating the network card inserted into the interface according to the network card detection signal includes:

When the network card detection signal indicates that the second pin input of the CPLD is high, the network card type of the network card is the first network card; when the network card detection signal indicates that the second pin input of the CPLD is low level, the network card type of the network card is the second network card.

Optionally, determining the signal corresponding to the network card according to the network card type includes:

When the network card type of the network card is the first network card, the CPU is selected by the switch; the third pin and the fourth pin are used to output an interrupt signal; the fourth management pin is used Used to output the indication signal of the management status indicator light; the pin output of the CPU is used to manage the first signal of the optical module and the clock data recovery chip and the second signal for the management of the physical layer PHY chip;

When the network card type of the network card is the second network card, the sixth pin and the seventh pin of the CPLD are selected by the switch; the third pin is used to output the PERST1# defined by the OCP 3.0 protocol signal, the fourth pin is used to output the BIF2# signal defined by the OCP 3.0 protocol, the fifth pin is used to output the BIF[1:0]# signal defined by the OCP 3.0 protocol, and the sixth pin is used To output the SLOT_ID[1:0] signal defined by the OCP 3.0 protocol, the seventh pin is used to output the PERST[3:2]# signal defined by the OCP 3.0 protocol.

In a third aspect, the present application provides computer equipment configured with the network card adaptation circuit described in the first aspect above.

In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, where the computer storage medium stores computer instructions, and the computer instructions are used to execute the method described in the second aspect above.

In the fifth aspect, the embodiment of the present application provides a computer program product including instructions, which, when run on a computer, causes the computer to execute the method described in the second aspect above.

In a sixth aspect, the present application provides a chip system, which includes a processor, configured to support the network adapter circuit to implement the functions involved in the above aspect, such as generating or processing the data involved in the above method and/or information. In a possible design, the system-on-a-chip further includes a memory, and the memory is used for storing necessary program instructions and data of the network adapter circuit, so as to realize functions in any one of the above-mentioned aspects. The system-on-a-chip may consist of chips, or may include chips and other discrete devices.

Description of drawings

Fig. 1 is a schematic diagram of an embodiment of a network adapter circuit in the embodiment of the present application;

Fig. 2 is a schematic diagram of the network card detection circuit in the embodiment of the present application;

Fig. 3 is another schematic diagram of the network card detection circuit in the embodiment of the present application;

FIG. 4 is a signal schematic diagram of a network card adaptation circuit in an embodiment of the present application;

FIG. 5 is another signal schematic diagram of the network card adaptation circuit in the embodiment of the present application;

FIG. 6 is a schematic diagram of an embodiment of a method for adapting a network card in the embodiment of the present application.

Detailed ways

In order to make the purpose, technical solutions and advantages of the present application clearer, the embodiments of the present application will be described below in conjunction with the accompanying drawings. Apparently, the described embodiments are only part of the present application, rather than all of them. . Those skilled in the art know that, with the emergence of new application scenarios, the technical solutions provided in the embodiments of the present application are also applicable to similar technical problems.

The terms "first", "second" and the like in the specification and claims of the present application and the above drawings are used to distinguish similar objects, and are not necessarily used to describe a specific sequence or sequence. It is to be understood that the terms so used are interchangeable under appropriate circumstances such that the embodiments described herein can be practiced in sequences other than those illustrated or described herein. Furthermore, the terms "comprising" and "having", as well as any variations thereof, are intended to cover a non-exclusive inclusion, for example, a process, method, system, product or device comprising a series of steps or modules is not necessarily limited to the expressly listed Instead, other steps or modules not explicitly listed or inherent to the process, method, product or apparatus may be included. The naming or numbering of the steps in this application does not mean that the steps in the method flow must be executed in the time/logic sequence indicated by the naming or numbering. The execution order of the technical purpose is changed, as long as the same or similar technical effect can be achieved. The division of units presented in this application is a logical division. In actual application, there may be other division methods. For example, multiple units can be combined or integrated in another system, or some features can be ignored. , or not, in addition, the shown or discussed mutual coupling or direct coupling or communication connection may be through some interfaces, and the indirect coupling or communication connection between units may be electrical or other similar forms, this Applications are not limited. Moreover, the units or subunits described as separate components may or may not be physically separated, may or may not be physical units, or may be distributed into multiple circuit units, and some or all of them may be selected according to actual needs unit to realize the purpose of the application scheme.

The rear window of the current Kunpeng rack server supports two flexible input/output (IO) slots, which can be used to insert OCP3.0 network cards and CPU-managed NIC cards respectively. In terms of physical design, the OCP 3.0 network card and the NIC network card managed by the CPU have the same shape and structure, but due to the difference in the management of the network card, the interface design is also different. Therefore, the IO slots on the rear window of the server cannot be mixed. For example, taking the S920X05 server as an example, the rear window supports two

flexible IO slots

1 and 2. Among them, the flexible IO slot 1 only supports the standard OCP network card, and the flexible IO slot 2 only supports the NIC network card managed by the CPU. Mixed insertion. Therefore, the customer's configuration requirements for external network cards are limited, and the requirements for two standard OCP network cards or two CPU-managed NIC network cards cannot be met.

In order to solve this problem, the application provides a network card adaptation circuit, which specifically includes: a network card detection circuit, a CPLD, a switch, and a CPU; the CPLD includes a first pin, a second pin, a third pin, a fourth Pin, the fifth pin, the sixth pin and the seventh pin; the network card detection circuit is connected with the first management and the second pin of the CPLD; the sixth pin and the seventh pin of the CPLD The pin is connected with the switch; the CPU is connected with the switch; the signal indicated by the first pin and the second pin of the CPLD multiplexed by the network card detection circuit is the network card detection signal, and according to the network card detection The signal indicates that the network card inserted into the interface is the first network card managed by the CPU or the second network card under the Open Computing Project OCP3.0 protocol; when the network card detection signal indicates that the network card inserted into the interface is the first network card, in the CPLD The third pin, the fourth pin, and the fifth pin indicate the signal corresponding to the first network card, and the switch gates the CPU so that the CPU manages the signal corresponding to the first network card; When the network card detection signal indicates that the network card inserted into the interface is the first network card, the switch selects the sixth pin and the seventh pin of the CPLD, so that the third pin and the fourth pin in the CPLD pin, the fifth pin, the sixth pin and the seventh pin indicate signals corresponding to the second network card.

The network card adaptation circuit in the embodiment of the present application will be described below with reference to FIG. 1 . As shown in FIG. 1 , the network card adaptation circuit 100 includes a network card detection circuit 101 , a CPLD 102 , a switch 103 and a CPU 104 . Wherein, the CPLD102 includes a first pin 1021, a second pin 1022, a third pin 1023, a fourth pin 1024, a fifth pin 1025, a sixth pin 1026, and a seventh pin 1027; wherein, the Network card detection circuit 101 comprises this first pin 1021 of this CPLD102 and this second pin 1022, and this switch 103 is used for realizing the sixth pin 1026 of this CPLD102 and the pin between the seventh pin 1027 and this CPU104 switch. Wherein, the network card detection circuit multiplexes the signal indicated by the first pin and the second pin of the CPLD as the network card detection signal, and indicates according to the network card detection signal that the network card inserted into the interface is the first network card managed by the CPU or an open computing project The second network card under the OCP3.0 protocol; when the network card detection signal indicates that the network card inserted into the interface is the first network card, the third pin, the fourth pin, and the fifth pin in the CPLD indicate the first network card Corresponding signal, this switch strobes this CPU, makes this CPU manage the signal corresponding to this first network card; When this network card detection signal indicates that the network card inserted into the interface is the first network card, this switch strobes the sixth pipe of this CPLD pin and the seventh pin, so that the third pin, the fourth pin, the fifth pin, the sixth pin and the seventh pin in the CPLD indicate the signal corresponding to the second network card. In this embodiment, the network card adaptation circuit utilizes the network card detection circuit and multiplexes signals under the original OCP3. The control circuit of the managed NIC card is switched, and relevant signals are multiplexed on the control circuit of the original OCP network card. In this way, the network adaptation circuit can reuse the standard OCP network card and the NIC card managed by the CPU, and realize the mixed insertion requirements of the standard OCP network card and the NIC network card managed by the CPU in the flexible IO slot.

Under this framework, the first pin 1021 and the second pin 1022 of the CPLD102 output signals under the OCP3.0 protocol to be multiplexed as the network card detection signal of the network card detection circuit 101, and the CPLD102 can indicate according to the network card detection signal The network card inserted into the interface is the first network card directly managed by the CPU or the second network card under the standard OCP3.0 protocol. A possible implementation of the network card detection circuit 101 can be shown in Figure 2:

The network card detection circuit 101 includes a parallel first branch and a second branch, a parallel first network card detection branch and a second network card detection branch, a parallel first branch and a second branch and a parallel first branch. A network card detection branch and a second network card detection branch are connected in series; wherein, the first branch includes a first power supply, a first resistor and a second resistor; the first resistor is connected in parallel with the second resistor; the The first resistor is connected to the first pin 1021, and the second resistor is connected to the first power supply; the second branch includes a second power supply, a third resistor, a fourth resistor and a MOS tube; the The third resistor, the fourth resistor and the MOS transistor are all connected in parallel; the third resistor is connected to the second pin 1022, and the fourth resistor is connected to the second power supply; the MOS transistor The D pole is connected to the second pin through the third resistor, and the S pole of the MOS transistor is grounded; the first network card detection branch includes a fifth resistor, and the other end of the fifth resistor is grounded; The second network card detection branch includes a sixth resistor and a seventh resistor connected in parallel, the sixth resistor is connected to the third power supply; the seventh resistor is grounded.

In this network card detection circuit 101, a possible implementation of the network card detection signal can be as follows: when the first network card detection branch communicates with the first branch and the second branch (i.e. plug into the interface When the network card is the first network card under the management of the CPU), the second pin inputs a high level; when the second network card detection branch is connected with the first branch and the second branch (That is, the network card inserted into the interface is the second network card under the standard OCP3.0 protocol), and the second pin inputs a low level.

In the above implementation, the specific implementation of the network card detection circuit 101 can be as shown in Figure 3: the first power supply, the second power supply and the third power supply are all set to 3v3 power supply, the first resistor, The third resistor and the fifth resistor are all set to 33 ohms, and the second resistor, the fourth resistor, the sixth resistor and the seventh resistor are all set to 1000 ohms. Under the above design scheme of resistance and power supply, when the network card inserted into the interface is the first network card, the divided voltage of 1000 ohm pull-up and 33 ohm pull-down is not enough to turn on the MOS tube, and the second pin receives a high level, that is It is determined that the network card inserted into the interface is the first network card. When the network card inserted into the interface is the second network card, no matter whether the signal on the second network card is weakly pulled down, suspended, or pulled up, it can ensure that the MOS transistor is turned on, and the second pin receives a low level, which is judged as inserted. The network card of the interface is the second network card.

Although the above only provides a possible implementation of the network card detection circuit 101, as long as the first network card and the second network card can be distinguished through different network card detection signals, there is no specific limitation here.

In this embodiment, the concrete realization of this CPLD and this CPU multiplexing signal can be as shown in Figure 4 and Figure 5:

In Fig. 4, the network card inserted into the interface is the first network card managed by the CPU, at this moment, the pin of the CPU is selected by the switch; the third pin and the fourth pin of the CPLD output an interrupt signal, and the third pin outputs an interrupt signal. The signal on the pin can be defined as INT_NIC_CPLD0, and the signal on the fourth pin can be defined as INT_NIC_CPLD1. The fifth pin outputs an indication signal for managing the status indicator light, wherein the indication signal can be defined as CPLD_NIC_I2C. The sixth pin and the seventh pin are switched to the pin of the CPU, so the pin of the CPU will output the first signal for managing the optical module and the clock data recovery chip and for managing the physical layer (Physical, PHY) The second signal of the chip, wherein the first signal may be defined as CPU_NIC_I2C, and the second signal may be defined as CPU_NIC_MDIO.

In Figure 5, the network card inserted into the interface is the second network card under the OCP3.0 protocol. At this time, the switch selects the sixth pin and the seventh pin of the CPLD; the third pin is used to output OCP 3.0 The PERST1# signal defined by the protocol, the fourth pin is used to output the BIF2# signal defined by the OCP 3.0 protocol, the fifth pin is used to output the BIF[1:0]# signal defined by the OCP 3.0 protocol, the sixth pin The pin is used to output the SLOT_ID[1:0] signal defined by the OCP 3.0 protocol, and the seventh pin is used to output the PERST[3:2]# signal defined by the OCP 3.0 protocol.

The embodiment of the present application also provides a network card adaptation method, which is mainly applied to computer equipment including the network card adaptation circuit described in any one of Figures 1 to 5 above, as shown in Figure 6 for details, the embodiment of the present application The NIC adaptation methods include:

601. Use a network card detection circuit to acquire a network card type of a network card inserted into an interface, where the network card type is a first network card managed by a CPU or a second network card under an OCP protocol.

After the network card is inserted into the interface, the computer equipment obtains the network card detection signal according to the network card detection circuit, and determines the type of the network card according to the network card detection signal. In a possible implementation manner, when the network card detection signal indicates that the second pin of the CPLD inputs a high level, the network card type of the network card is the first network card;

When the network card detection signal indicates that the second pin of the CPLD inputs a low level, the network card type of the network card is the second network card.

602. Determine a signal corresponding to the network card according to the network card type.

When determining that the network card inserted into the interface is the first network card managed by the CPU according to the network card detection signal, the switch in the network card adaptation circuit selects the pin of the CPU; the third pin of the CPLD and the fourth pin output For an interrupt signal, the signal on the third pin may be defined as INT_NIC_CPLD0, and the signal on the fourth pin may be defined as INT_NIC_CPLD1. The fifth pin outputs an indication signal for managing the status indicator light, wherein the indication signal can be defined as CPU_NIC_I2C. The sixth pin and the seventh pin are switched to the pin of the CPU, so the pin of the CPU will output the first signal for managing the optical module and the clock data recovery chip and for managing the physical layer (Physical, PHY) The second signal of the chip, wherein the first signal may be defined as CPU_NIC_I2C, and the second signal may be defined as CPU_NIC_MDIO.

When determining that the network card inserted into the interface is the second network card according to the network card detection signal, the switch in the network card adaptation circuit selects the sixth pin and the seventh pin of the CPLD; the third pin is used to output OCP 3.0 The PERST1# signal defined by the protocol, the fourth pin is used to output the BIF2# signal defined by the OCP 3.0 protocol, the fifth pin is used to output the BIF[1:0]# signal defined by the OCP 3.0 protocol, the sixth pin The pin is used to output the SLOT_ID[1:0] signal defined by the OCP 3.0 protocol, and the seventh pin is used to output the PERST[3:2]# signal defined by the OCP 3.0 protocol.

603. Use the signal to manage the network card.

An embodiment of the present application further provides a computer device, which includes the network card adaptation circuit described in any one of FIGS. 1 to 5 above.

The steps of the methods or algorithms described in connection with the disclosure of this application can be implemented in the form of hardware, or can be implemented in the form of a processor executing software instructions. The software instructions can be composed of corresponding software modules, and the software modules can be stored in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, mobile hard disk, CD-ROM or any other form of storage known in the art medium. An exemplary storage medium is coupled to the processor such the processor can read information from, and write information to, the storage medium. Of course, the storage medium may also be a component of the processor. The processor and storage medium can be located in the ASIC. Alternatively, the ASIC may be located in the terminal. Of course, the processor and the storage medium may also exist in the first communication device as discrete components.

Those skilled in the art can clearly understand that for the convenience and brevity of the description, the specific working process of the above-described system, device and unit can refer to the corresponding process in the foregoing method embodiment, which will not be repeated here.

In the several embodiments provided in this application, it should be understood that the disclosed devices and methods may be implemented in other ways. For example, the device embodiments described above are only illustrative. For example, the division of the units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components can be combined or May be integrated into another system, or some features may be ignored, or not implemented. In another point, the mutual coupling or direct coupling or communication connection shown or discussed may be through some interfaces, and the indirect coupling or communication connection of devices or units may be in electrical, mechanical or other forms.

The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place, or may be distributed to multiple network units. Part or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, each unit may exist separately physically, or two or more units may be integrated into one unit. The above-mentioned integrated units can be implemented in the form of hardware or in the form of software functional units.

If the integrated unit is realized in the form of a software function unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or part of the contribution to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium , including several instructions to make a computer device (which may be a personal computer, a server, or a network device, etc.) execute all or part of the steps of the methods described in the various embodiments of the present application. The aforementioned storage media include: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), magnetic disk or optical disc, etc., which can store program codes. .

Claims

A network card adaptation circuit is characterized in that it comprises:

Network card detection circuit, complex programmable logic device CPLD, switch and central processing unit CPU;

The CPLD includes a first pin, a second pin, a third pin, a fourth pin, a fifth pin, a sixth pin and a seventh pin;

The network card detection circuit is connected with the first management and the second pin of the CPLD;

The sixth pin and the seventh pin of the CPLD are connected to the switch;

The CPU is connected to the switch;

The network card detection circuit multiplexes the signal indicated by the first pin and the second pin of the CPLD as a network card detection signal, and indicates that the network card inserted into the interface is the first network card managed by the CPU or an open computing system according to the network card detection signal. The second network card under the project OCP3.0 protocol;

When the network card detection signal indicates that the network card inserted into the interface is the first network card, the third pin, the fourth pin, and the fifth pin in the CPLD indicate signals corresponding to the first network card, and the switch gating the CPU, so that the CPU manages the signal corresponding to the first network card;

When the network card detection signal indicates that the network card inserted into the interface is the first network card, the switch gates the sixth pin and the seventh pin of the CPLD, so that the third pin and the seventh pin in the CPLD The fourth pin, the fifth pin, the sixth pin and the seventh pin indicate signals corresponding to the second network card.
The network card adaptation circuit according to claim 1, wherein the network card detection circuit comprises a first branch and a second branch connected in parallel, a first network card detection branch and a second network card detection branch connected in parallel, The parallel first branch and the second branch are connected in series with the parallel first network card detection branch and the second network card detection branch;

Wherein, the first branch includes a first power supply, a first resistor and a second resistor; the first resistor is connected in parallel with the second resistor; the first resistor is connected to the first pin, and the the second resistor is connected to the first power supply;

The second branch includes a second power supply, a third resistor, a fourth resistor, and a MOS tube; the third resistor, the fourth resistor, and the MOS tube are connected in parallel; the third resistor and the first resistor The two pins are connected, the fourth resistor is connected to the second power supply; the D pole of the MOS transistor is connected to the second pin through the third resistor, and the S pole of the MOS transistor is grounded;

The first network card detection branch includes a fifth resistor, and the other end of the fifth resistor is grounded;

The second network card detection branch includes a sixth resistor and a seventh resistor connected in parallel, the sixth resistor is connected to a third power supply; the seventh resistor is grounded;

Wherein, when the first network card detection branch is connected with the first branch and the second branch, the second pin inputs a high level;

When the second network card detection branch is connected to the first branch and the second branch, the second pin inputs a low level.
The network card adaptation circuit according to claim 2, wherein the first power supply, the second power supply and the third power supply are all set to 3v3 power supply, the first resistor, the three resistors, The fifth resistors are all set to 33 ohms, and the second resistors, the fourth resistors, the sixth resistors and the seventh resistors are all set to 1000 ohms.
According to the network card adaptation circuit described in any one of claims 1 to 3, it is characterized in that, the first pin is the PERST0# signal defined by the OCP 3.0 protocol, and the PERST0# signal and the second pin Multiplexing as the network card detection signal;

When the network card detection signal indicates that the network card inserted into the interface is the first network card, the switch selects the CPU; the third pin and the fourth pin are used to output an interrupt signal; the second pin is used to output an interrupt signal; Four management pins are used to output the indication signal of the management state indicator light; the pin output of the CPU is used to manage the first signal of the optical module and the clock data recovery chip and the second signal for the management of the physical layer PHY chip;

When the network card detection signal indicates that the network card inserted into the interface is the second network card, the sixth pin and the seventh pin of the CPLD are selected by the switch; the third pin is used to output the OCP 3.0 protocol The defined PERST1# signal, the fourth pin is used to output the BIF2# signal defined by the OCP 3.0 protocol, the fifth pin is used to output the BIF[1:0]# signal defined by the OCP 3.0 protocol, and the first The six pins are used to output the SLOT_ID[1:0] signal defined by the OCP 3.0 protocol, and the seventh pin is used to output the PERST[3:2]# signal defined by the OCP 3.0 protocol.
A computer device, characterized in that the computer device is configured with the network adapter circuit according to any one of claims 1 to 4.
A network card adaptation method, applied to a computer device comprising the network card adaptation circuit according to any one of claims 1 to 4, characterized in that, comprising:

Utilize the network card detection circuit to obtain the network card type of the network card inserted into the interface, and the network card type is the first network card managed by the CPU or the second network card under the OCP protocol;

determining a signal corresponding to the network card according to the network card type;

The network card is managed using the signal.
The method according to claim 6, wherein the network card type of the network card inserted into the interface detected by the network card detection circuit comprises:

Obtaining a network card detection signal corresponding to the network card;

When the network card detection signal indicates that the second pin of the CPLD inputs a high level, the network card type of the network card is the first network card;

When the network card detection signal indicates that the second pin of the CPLD inputs a low level, the network card type of the network card is the second network card.
The method according to claim 6 or 7, wherein determining the signal corresponding to the network card according to the type of the network card comprises:

When the network card type of the network card is the first network card, the switch selects the CPU; the third pin and the fourth pin are used to output an interrupt signal; the fourth management pin is used Used to output the indication signal of the management status indicator light; the pin output of the CPU is used to manage the first signal of the optical module and the clock data recovery chip and the second signal for the management of the physical layer PHY chip;

When the network card type of the network card is the second network card, the sixth pin and the seventh pin of the CPLD are selected by the switch; the third pin is used to output the PERST1# defined by the OCP 3.0 protocol signal, the fourth pin is used to output the BIF2# signal defined by the OCP 3.0 protocol, the fifth pin is used to output the BIF[1:0]# signal defined by the OCP 3.0 protocol, and the sixth pin is used To output the SLOT_ID[1:0] signal defined by the OCP 3.0 protocol, the seventh pin is used to output the PERST[3:2]# signal defined by the OCP 3.0 protocol.