WO2023042393A1 - スイッチング制御装置、スイッチング電源装置および電力供給システム - Google Patents

スイッチング制御装置、スイッチング電源装置および電力供給システム Download PDF

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WO2023042393A1
WO2023042393A1 PCT/JP2021/034389 JP2021034389W WO2023042393A1 WO 2023042393 A1 WO2023042393 A1 WO 2023042393A1 JP 2021034389 W JP2021034389 W JP 2021034389W WO 2023042393 A1 WO2023042393 A1 WO 2023042393A1
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Prior art keywords
switching
voltage
delay time
power supply
value
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English (en)
French (fr)
Japanese (ja)
Inventor
正彦 広川
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TDK Corp
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TDK Corp
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Priority to JP2023548076A priority Critical patent/JP7603833B2/ja
Priority to PCT/JP2021/034389 priority patent/WO2023042393A1/ja
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/22—Conversion of DC power input into DC power output with intermediate conversion into AC
    • H02M3/24—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters
    • H02M3/28—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

  • the present invention relates to a switching power supply device that performs voltage conversion using switching elements, a switching control device applied to such a switching power supply device, and a power supply system provided with such a switching power supply device.
  • This type of DC-DC converter generally includes an inverter circuit including switching elements, a power conversion transformer (transformer), and a rectifying/smoothing circuit.
  • a switching control device is arranged between a transformer having a primary winding and a secondary winding, an input terminal pair to which an input voltage is input, and the primary winding. and a rectifying/smoothing circuit disposed between an output terminal pair from which an output voltage is output and a secondary winding, the control device being applied to a switching power supply device, the inverter comprising: a voltage detection unit for detecting a voltage across a first switching element of a plurality of switching elements included in at least one of a circuit and a rectifying/smoothing circuit at a time point of switching from an off state to an on state; The delay time from when the second switching element among the switching elements switches from the ON state to the OFF state to when the first switching element switches from the OFF state to the ON state is defined as the delay time in the first switching element.
  • a delay time setting unit that is set as needed according to the result of comparison between the value of the voltage across both terminals and the first threshold voltage and the second threshold voltage that are two different threshold voltages; and this delay time setting unit. and a drive circuit for controlling switching operations of a plurality of switching elements including the first and second switching elements using the delay times set in .
  • a switching power supply device includes the input terminal pair, the output terminal pair, the transformer, the inverter circuit, the rectifying/smoothing circuit, and the and a switching control device.
  • a power supply system includes the switching power supply device according to the embodiment of the present invention, and a power supply that supplies the input voltage to the input terminal pair. be.
  • switching control device switching power supply device, and power supply system according to one embodiment of the present invention.
  • FIG. 1 is a circuit diagram showing a schematic configuration example of a switching power supply device according to an embodiment of the present invention
  • FIG. 2 is a timing chart showing an operation example of the switching power supply device shown in FIG. 1
  • FIG. FIG. 4 is a diagram showing an example of conduction characteristics in a transistor
  • 2 is a timing chart showing an example of waveforms during resonance operation in the switching power supply device shown in FIG. 1
  • FIG. 7 is a flow chart showing an example of processing when setting dead time according to the embodiment
  • 3 is a circuit diagram showing a schematic configuration example of a switching power supply device according to Modification 1
  • FIG. FIG. 11 is a circuit diagram showing a schematic configuration example of a switching power supply device according to Modification 2
  • FIG. 11 is a circuit diagram showing a schematic configuration example of a switching power supply device according to Mod
  • FIG. 1 is a circuit diagram showing a schematic configuration example of a switching power supply (switching power supply 1) according to an embodiment of the present invention.
  • the switching power supply 1 functions as a DC-DC converter that converts a DC input voltage Vin supplied from a DC input power supply 10 (eg, a battery) into a DC output voltage Vout and supplies power to a load 9. .
  • the load 9 may be, for example, an electronic device, a battery, or the like.
  • the switching power supply device 1 is a so-called "(insulated half-bridge) LLC resonant type" DC-DC converter, as will be described below.
  • the mode of voltage conversion in the switching power supply device 1 may be either up-conversion (boosting) or down-conversion (stepping down).
  • the DC input voltage Vin corresponds to a specific example of "input voltage” in the present invention
  • the DC output voltage Vout corresponds to a specific example of "output voltage” in the present invention
  • the DC input power supply 10 corresponds to a specific example of the "power supply” in the present invention
  • a system including the DC input power supply 10 and the switching power supply device 1 is a specific example of the "power supply system” in the present invention. corresponds to the example.
  • the switching power supply device 1 includes two input terminals T1 and T2, two output terminals T3 and T4, an inverter circuit 2, a transformer 3, a rectifying/smoothing circuit 4, and a control circuit 7.
  • a DC input voltage Vin is input between the input terminals T1 and T2, and a DC output voltage Vout is output between the output terminals T3 and T4.
  • the primary low-voltage line L1L is connected to the ground GND.
  • the input terminals T1 and T2 correspond to a specific example of "input terminal pair” in the present invention
  • the output terminals T3 and T4 correspond to a specific example of "output terminal pair” in the present invention.
  • the control circuit 7 corresponds to a specific example of the "switching control device" of the present invention.
  • An input smoothing capacitor may be arranged between the primary side high voltage line L1H connected to the input terminal T1 and the primary side low voltage line L1L connected to the input terminal T2. Specifically, the first end (one end) of the input smoothing capacitor is connected to the primary side high voltage line L1H at a position between the inverter circuit 2 and the input terminals T1 and T2, which will be described later, and the input smoothing capacitor The second end (the other end) may be connected to the primary side low pressure line L1L.
  • Such an input smoothing capacitor is a capacitor for smoothing the DC input voltage Vin input from the input terminals T1 and T2.
  • the inverter circuit 2 is arranged between the input terminals T1, T2 and a primary winding 31 of the transformer 3, which will be described later.
  • the inverter circuit 2 has two switching elements S1 and S2, a resonant inductor Lr, and a resonant capacitor Cr, and is a so-called "half-bridge type" inverter circuit.
  • the resonance inductor Lr may be configured by a leakage inductance in the transformer 3, which will be described later, or may be provided separately from such a leakage inductance.
  • the switching elements S1 and S2 described above each correspond to a specific example of "a plurality of switching elements" in the present invention.
  • the switching element S2 corresponds to a specific example of the "first switching element” in the present invention
  • the switching element S1 corresponds to a specific example of the "second switching element” in the present invention.
  • MOS-FET Metal Oxide Semiconductor-Field Effect Transistor
  • IGBT Insulated Gate Bipolar Transistor
  • HEMT a GaN (gallium nitride) transistor.
  • the switching elements S1 and S2 are each composed of a transistor made up of a MOS-FET or HEMT.
  • MOS-FETs and HEMTs are used as the switching elements S1 and S2
  • the capacitors and diodes connected in parallel to the switching elements S1 and S2 are respectively replaced by the parasitic capacitances or parasitic capacitances of the MOS-FETs and HEMTs. It can be constructed from a diode.
  • a capacitor Cds1 made up of a parasitic capacitance and a diode D1 made up of a parasitic diode are connected in parallel across the switching element S1 (between the source and the drain).
  • a capacitor Cds2 made up of a parasitic capacitance and a diode D2 made up of a parasitic diode are connected in parallel across the switching element S2 (between the source and the drain).
  • two switching elements S1 and S2 are connected in series in this order between the input terminals T1 and T2 (between the primary high voltage line L1H and the primary low voltage line L1L).
  • the switching element S1 is arranged between the primary side high voltage line L1H and the connection point P1
  • the switching element S2 is arranged between the connection point P1 and the primary side low voltage line L1L.
  • the resonance inductor Lr and the resonance capacitor Cr in the inverter circuit 2 and the primary winding 31 in the transformer 3, which will be described later, are connected in series between the connection point P1 and the primary low-voltage line L1L. It is Specifically, in the example of FIG. 1, the first end (one end) of the resonance capacitor Cr is connected to the connection point P1, and the second end (the other end) of the resonance capacitor Cr is connected to the first end of the resonance inductor Lr. (one end). A second end (the other end) of the resonant inductor Lr is connected to one end of the primary winding 31, and the other end of the primary winding 31 is connected to the primary low-voltage line L1L. ing.
  • the switching elements S1 and S2 perform switching operations (on/off operations) in accordance with drive signals SG1 and SG2 supplied from the drive circuit 5 in the control circuit 7, which will be described later. , becomes: That is, the DC input voltage Vin applied between the input terminals T1 and T2 is converted into AC voltage and output to the transformer 3 (primary winding 31).
  • the transformer 3 has one primary winding 31 and two secondary windings 321 and 322 .
  • the first end (one end) of the primary winding 31 is connected to the second end (other end) of the resonance inductor Lr described above, and the second end of the primary winding 31 (the other end) is connected to the primary side low pressure line L1L described above.
  • a first end of the secondary winding 321 is connected to a cathode of the rectifier diode 41 described later via a connection line L21 described later, and a second end of the secondary winding 321 is connected. is connected to a center tap P6 in a rectifying/smoothing circuit 4 which will be described later.
  • a first end of the secondary winding 322 is connected to a cathode of a rectifier diode 42 described later via a connection line L22 described later, and a second end of the secondary winding 322 is connected. is connected to the center tap P6. That is, the second ends of the secondary windings 321 and 322 are commonly connected to the center tap P6.
  • the transformer 3 converts the voltage generated by the inverter circuit 2 (rectangular pulse wave voltage input to the primary winding 31 of the transformer 3), and the secondary windings 321 and 322 AC voltage is output from the end.
  • the rectifying/smoothing circuit 4 has two rectifying diodes 41 and 42 and one output smoothing capacitor Cout. Specifically, the rectifying/smoothing circuit 4 includes a rectifying circuit having rectifying diodes 41 and 42 and a smoothing circuit having an output smoothing capacitor Cout.
  • the above rectifier circuit is a so-called "center tap type" rectifier circuit. That is, the anodes of the rectifier diodes 41 and 42 are respectively connected to the ground line LG, and the cathode of the rectifier diode 41 is connected to the aforementioned first end of the secondary winding 321 via the connection line L21 to The cathode of diode 42 is connected to the aforementioned first end of secondary winding 322 via connection line L22. Further, as described above, the second ends of the secondary windings 321 and 322 are commonly connected to the center tap P6, and the center tap P6 is connected via the output line LO. It is connected to the output terminal T3.
  • the ground line LG described above is connected to the output terminal T4 described above.
  • an output smoothing capacitor Cout is connected between the output line LO and the ground line LG (between the output terminals T3 and T4). That is, the first end of the output smoothing capacitor Cout is connected to the output line LO, and the second end of the output smoothing capacitor Cout is connected to the ground line LG.
  • the rectifying circuit including the rectifying diodes 41 and 42 rectifies and outputs the AC voltage output from the transformer 3 .
  • a smoothing circuit including an output smoothing capacitor Cout smoothes the voltage rectified by the rectifying circuit to generate a DC output voltage Vout.
  • the DC output voltage Vout generated in this way causes the DC output current Iout (load current) to flow to the load 9, and power is supplied to the load 9 from the output terminals T3 and T4. It's becoming
  • the DC output current Iout (load current) described above corresponds to a specific example of the "output current" in the present invention.
  • the control circuit 7 is a circuit that controls the switching power supply device 1 .
  • the control circuit 7 has a voltage detection section 61, a delay time setting section 62 and a drive circuit 5, as shown in FIG.
  • FIG. 2 is a timing chart showing an operation example (waveform examples of various voltages and currents) of the switching power supply device 1 .
  • FIG. 2A shows the drive signal SG1 (the voltage Vgs1 between the gate and source of the switching element S1), and FIG. Each waveform example is shown for the voltage Vgs2) between the sources.
  • FIG. 2C shows a voltage Vds2 between the drain and source (across both ends) of the switching element S2 (shown in FIG. 1) and a current Ids2 flowing between the drain and source of the switching element S2 (shown in FIG. 1). ) and waveform examples are shown.
  • the horizontal axis indicates time t.
  • the voltage detection unit 61 the delay time setting unit 62, and the driving circuit 5 will be described in detail below with reference to FIGS. 1 and 2.
  • FIG. 1 The voltage detection unit 61, the delay time setting unit 62, and the driving circuit 5 will be described in detail below with reference to FIGS. 1 and 2.
  • FIG. 1 The voltage detection unit 61, the delay time setting unit 62, and the driving circuit 5 will be described in detail below with reference to FIGS. 1 and 2.
  • the delay time setting unit 62 sets the value of the voltage Vds2 output from the voltage detection unit 61 (the voltage Vds2 at the timing tds described above) and two different threshold voltages Vth1, (- Vth2) (see FIG. 2(C)). Further, the delay time setting unit 62 sets the length of the dead time Td as a delay time when switching driving is performed in the drive circuit 5, which will be described later. Vth2) is set at any time according to the result of comparison (see FIG. 1). The dead time Td set in this manner is, as shown in FIG.
  • the dead time Td described above is, for example, as shown in FIG. is switched from the off state to the on state (timing tds).
  • this dead time Td is a period during which both of these two switching elements S1 and S2 are set to the OFF state.
  • this dead time Td corresponds to a specific example of "delay time" in the present invention.
  • the threshold voltage (-Vth2) described above is a value smaller than the threshold voltage Vth1 in the example shown in FIG.
  • the threshold voltage Vth1 is a predetermined positive voltage (eg, about 0.2 V)
  • the threshold voltage (-Vth2) is a predetermined negative voltage (eg, - about 0.2 V). It should be noted that such a threshold voltage Vth1 corresponds to a specific example of the "first threshold voltage” in the present invention. Also, the threshold voltage (-Vth2) corresponds to a specific example of the "second threshold voltage” in the present invention.
  • the delay time setting unit 62 also causes the end timing of the dead time Td (timing tds shown in FIG. 2) to converge (substantially coincide with) the zero crossing point Pzc of the voltage Vds2 described above, although the details will be described later. ), the dead time Td is set as needed. The details of the dead time Td setting method will be described later (FIGS. 4 to 7).
  • the drive circuit 5 is a circuit that performs switching drive for controlling the operations of the switching elements S1 and S2 in the inverter circuit 2, respectively. Specifically, the drive circuit 5 controls switching operations (ON/OFF operations) of the switching elements S1 and S2 by supplying the driving signals SG1 and SG2 to the switching elements S1 and S2, respectively. It is designed to
  • the drive circuit 5 performs switching frequency control when controlling switching operations of the switching elements S1 and S2 (performing switching driving). That is, PFM (Pulse Frequency Modulation) control is performed in the drive signals SG1 and SG2.
  • PFM Pulse Frequency Modulation
  • the drive circuit 5 performs the above-described switching drive so that the switching elements S1 and S2 perform switching operations at fixed duty ratios and the switching frequency fsw varies.
  • Ton1 and Ton2 the on-periods of the switching elements S1 and S2 are represented by Ton1 and Ton2, respectively.
  • the duty ratio of each of the switching elements S1 and S2 is expressed by (Ton1/ Tsw), (Ton2/Tsw). Both of these (Ton1/Tsw) and (Ton2/Tsw) are less than 50%. , a dead time Td described below is provided.
  • the drive circuit 5 also uses the dead time Td output from the delay time setting unit 62 (the dead time Td set at any time by the delay time setting unit 62) when performing the switching drive described above.
  • the switching operations in the elements S1 and S2 are controlled respectively. Specifically, for example, as shown in FIG. 2, the driving circuit 5 performs the next switching operation at the dead time Td (for example, the dead time Td' shown in FIG. 2) set as needed. A switching operation is performed with a period Tsw.
  • the AC voltage (transformed AC voltage described above) output from the transformer 3 is rectified by the rectifying diodes 41 and 42 in the rectifying circuit, and then is rectified by the output smoothing capacitor Cout in the smoothing circuit. smoothed.
  • the DC output voltage Vout is output from the output terminals T3 and T4. This DC output voltage Vout causes a DC output current Iout to flow to the load 9 and power to be supplied to the load 9 .
  • a reverse voltage drop of, for example, 2 V or more occurs between the drain and source of the transistor as the switching element.
  • Such a reverse voltage and the drain current flowing through the transistor cause conduction loss in the switching element.
  • the reverse voltage drop described above increases, as shown in FIG.
  • FIG. 3 shows an example of conduction characteristics in a general transistor (an example of the correspondence relationship between the drain-source voltage Vds and the drain-source current Ids in the case of the GaN transistor described above). is.
  • GaN transistor does not incorporate a body diode in its device structure, it has a pseudo body diode during circuit operation of the GaN transistor.
  • the VF becomes even larger as shown in FIG. 3, for example. Since this VF is large, if the period during which the pseudo body diode is conductive is long and the current Ids is large, a larger conduction loss will occur.
  • the conduction of the body diode or pseudo body diode in the switching element is immediately before or after the switching element turns on when performing synchronous rectification or when performing zero voltage switching (ZVS). Occur. Also, just before the switching element is turned on, it is ideal that the switching element is turned on at the same time as the voltage Vds becomes a negative voltage. If the switching element is turned on too early, the charge accumulated in the output capacitance Coss of the switching element is short-circuited by the turn-on, resulting in power loss. flows. Conversely, if it turns on too late, the conduction period of the body diode or pseudo-body diode will be lengthened.
  • the voltage Vds drops rapidly just before the switching element turns on, current may flow through the gate of the switching element through the feedback capacitance, causing the voltage Vgs to become a negative voltage.
  • the negative voltage of the voltage Vgs increases VF, and the power loss due to conduction of the pseudo-body diode increases.
  • the appropriate turn-on or turn-off timing differs depending on the operating conditions of the switching power supply (input voltage, load, etc.) and variations in constants such as parasitic capacitance and inductance. Therefore, the turn-on timing is set later than ideal and the turn-off timing is set earlier than ideal to avoid fatal increase in power loss, surge and noise caused by turning on too early or turning off too late. It can be said that it is desirable to be
  • the length of the dead time Td during switching drive is determined by the value of the voltage Vds2 described above and two types of threshold voltages Vth1 and (-Vth2). is set by the control circuit 7 at any time according to the result of comparison between .
  • FIG. 4 shows a setting example of the dead time Td according to this embodiment.
  • FIG. 5 is a timing chart showing examples of waveforms during resonance operation in the switching power supply device 1 .
  • FIG. 6 is a flow chart showing an example of processing when setting the dead time Td according to the present embodiment.
  • FIG. 7 shows a setting example of the maximum dead time Tdmax and the minimum dead time Tdmin according to this embodiment.
  • the maximum dead time Tdmax is the maximum value that can be set as the dead time Td, and corresponds to a specific example of the "maximum delay time” in the present invention.
  • the minimum dead time Tdmin is the minimum value that can be set as the dead time Td, and corresponds to a specific example of the "minimum delay time” in the present invention.
  • the delay time setting unit 62 in the control circuit 7 compares the value of the voltage Vds2 described above with the two threshold voltages Vth1 and (-Vth2). Depending on the result, the dead time Td is shortened, extended or maintained.
  • the delay time setting unit 62 sets the initial value T1 of the dead time Td, which corresponds to the ideal value of the dead time Td described above (for example, as shown in FIG. equivalent to the ideal fall time).
  • This initial value T1 is defined, for example, using the following equations (1) to (3) with reference to the waveform example during the resonance operation shown in FIG.
  • equations (1) to (3) along with the DC input voltage Vin, the DC output voltage Vout, the capacitance value of the capacitor Cds2 connected in parallel to the switching element S2, the switching period Tsw, and the turns ratio n of the transformer 3, the primary side of the transformer 3
  • a transformer exciting current Im (see FIG. 5) flowing through the winding 31 and a mutual inductance Lm in the transformer 3 are used.
  • FIG. 5 also shows the variation ⁇ Im of the transformer exciting current Im and the resonant inductor current ILr flowing through the resonant inductor Lr.
  • the delay time setting unit 62 Based on the initial value T1 of the dead time Td thus set, the delay time setting unit 62 compares the value of the voltage Vds2 and the two threshold voltages Vth1 and (-Vth2). Depending on the results, the dead time Td is shortened, extended, or maintained as needed.
  • the delay time setting unit 62 sets the dead time Td be shortened.
  • the delay time setting unit 62 extends the dead time Td when the value of the voltage Vds2 exceeds the threshold voltage Vth1 (Vds2>Vth1). Further, the delay time setting unit 62 maintains the dead time Td when the value of the voltage Vds2 is equal to or higher than the threshold voltage (-Vth2) and equal to or lower than the threshold voltage Vth1 (-Vth2 ⁇ Vds2 ⁇ Vth1).
  • the dead time Td when the value of the dead time Td is greater than the maximum dead time Tdmax (Td>Tdmax), the dead time Td is set to the maximum dead time Tdmax as shown in FIG. 4, for example.
  • the dead time Td is smaller than the minimum dead time Tdmin (Td ⁇ Tdmin), the dead time Td is set to the minimum dead time Tdmin as shown in FIG. 4, for example.
  • the delay time setting unit 62 causes the end timing of the dead time Td (the timing tds shown in FIG. 2) to converge at the zero crossing point Pzc of the voltage Vds2 across the switching element S2, as described above. , the dead time Td is set at any time.
  • the delay time setting unit 62 determines whether or not the value of the voltage Vds2 is less than the threshold voltage Vth1 (Vds2 ⁇ Vth1) (step S12).
  • step S12 determines whether or not the value of the voltage Vds2 is less than the threshold voltage Vth1 (Vds2 ⁇ Vth1) (step S12).
  • step S12 determines whether or not the value of the voltage Vds2 is less than the threshold voltage Vth1 (Vds2 ⁇ Vth1) (step S12).
  • step S12 N
  • the delay time setting unit 62 determines whether or not the current dead time Td exceeds the maximum dead time Tdmax (Td>Tdmax) (step S13).
  • step S13 Y
  • step S16 the delay time setting unit 62 determines whether or not the value of the voltage Vds2 exceeds the threshold voltage (-Vth2) (Vds2 ⁇ -Vth2).
  • the threshold voltage -Vth2
  • step S16: N the threshold voltage
  • the delay time setting unit 62 determines whether or not the value of the current dead time Td is less than the minimum dead time Tdmin (Td ⁇ Tdmin) (step S17).
  • step S17 Y
  • the values of the maximum dead time Tdmax and the minimum dead time Tdmin correspond to the operating state of the switching power supply 1 (for example, the DC output current Iout, the DC input voltage Vin, DC output voltage Vout, etc.).
  • the length of the dead time Td during switching drive is determined according to the result of comparison between the value of the voltage Vds2 and the two types of threshold voltages Vth1 and (-Vth2). are set as needed by the control circuit 7, so that the following is obtained. That is, it is possible to shorten the period in which the above-described reverse voltage is generated in the switching element S2 while ensuring the above-described ZVS in the switching element S2. Specifically, the dead time Td described above can be shortened, and the conduction loss in the switching element S2 (in the body diode described above) can be reduced. As a result, in the present embodiment, power loss in switching power supply 1 can be suppressed.
  • the reverse voltage drop is large as described above. That is, in this case, it can be said that the effect of suppressing the power loss in the switching power supply device 1 is particularly large due to the reduction in the conduction loss in the switching elements S1 and S2.
  • the dead time Td is adjusted so that the end timing of the dead time Td described above (timing tds shown in FIG. 2) converges at the zero crossing point Pzc of the voltage Vds2 across the switching element S2. is set, so it looks like this: That is, as a result of being able to achieve ZVS in the switching element S2 described above more reliably, the power loss in the switching power supply device 1 can be further suppressed.
  • the values of the maximum dead time Tdmax and the minimum dead time Tdmin are changed according to the operating state of the switching power supply 1, so the following is obtained. That is, since the range of the dead time Td can be appropriately adjusted according to the operating state of the switching power supply 1, power loss in the switching power supply 1 can be further suppressed.
  • the value of the minimum dead time Tdmin is changed so as to be relatively large. From the following: That is, since the value of the minimum dead time Tdmin can be appropriately adjusted in response to a sudden change in the operating state of the switching power supply 1, power loss in the switching power supply 1 can be further suppressed.
  • the rectifier circuit in the rectifier/smoothing circuit 4 is a so-called "center tap type" rectifier circuit. Become. That is, the number of rectifying elements is reduced to two (rectifying diodes 41 and 42), and as a result, it is possible to reduce the size, loss, and cost of the rectifying circuit.
  • FIG. 8 is a circuit diagram showing a schematic configuration example of a switching power supply (switching power supply 1A) according to Modification 1. As shown in FIG.
  • a system including the DC input power supply 10 and the switching power supply device 1A corresponds to a specific example of the "power supply system" of the present invention.
  • the switching power supply 1A of Modification 1 is provided with a transformer 3A and a rectifying/smoothing circuit 4A instead of the transformer 3 and the rectifying/smoothing circuit 4 in the switching power supply 1 (see FIG. 1) of the embodiment. They correspond, and other configurations are the same.
  • the transformer 3A has one primary winding 31 and one secondary winding 32. That is, the transformer 3 is provided with two secondary windings 321 and 322, whereas the transformer 3A is provided with only one secondary winding 32.
  • FIG. The secondary winding 32 has a first end connected to a connection point P7 in the rectification/smoothing circuit 4A, which will be described later, and a second end connected to a connection point P8 in the rectification/smoothing circuit 4A.
  • the transformer 3A also converts the voltage (rectangular pulse wave voltage) generated by the inverter circuit 2 and outputs an AC voltage from the end of the secondary winding 32.
  • the degree of voltage conversion of the DC output voltage Vout with respect to the DC input voltage Vin is determined by the turns ratio n between the primary winding 31 and the secondary winding 32 and the switching frequency fsw described above. determined.
  • the rectifying/smoothing circuit 4A has four rectifying diodes 41 to 44 and one output smoothing capacitor Cout. Specifically, the rectifying/smoothing circuit 4A includes a rectifying circuit having rectifying diodes 41 to 44 and a smoothing circuit having an output smoothing capacitor Cout. In other words, the rectifying/smoothing circuit 4A is obtained by changing the configuration of the rectifying circuit in the rectifying/smoothing circuit 4. FIG.
  • the rectifier circuit of Modification 1 is a so-called “bridge type” rectifier circuit, unlike the rectifier circuit of the embodiment (so-called “center tap type” rectifier circuit). That is, the cathodes of rectifier diodes 41 and 43 are connected to output line LO, respectively, and the anode of rectifier diode 41 is connected to the cathode of rectifier diode 42 and the first end of secondary winding 32 at connection point P7. It is connected.
  • the anodes of the rectifier diodes 42 and 44 are connected to the ground line LG, respectively, and the cathode of the rectifier diode 44 is connected to the anode of the rectifier diode 43 and the second end of the secondary winding 32 at the connection point P8. It is connected.
  • the rectifying circuit 4A having such a configuration, as in the rectifying/smoothing circuit 4, the rectifying circuit including the rectifying diodes 41 to 44 rectifies and outputs the AC voltage output from the transformer 3A. It's becoming
  • the rectifying circuit in the rectifying/smoothing circuit 4A is a bridge-type rectifying circuit. ) becomes one (secondary winding 32), which decreases. As a result, it is possible to reduce the size and loss of the transformer 3A.
  • FIG. 9 is a circuit diagram showing a schematic configuration example of a switching power supply device 1B according to Modification 2. As shown in FIG.
  • a system including the DC input power supply 10 and the switching power supply device 1B corresponds to a specific example of the "power supply system" of the present invention.
  • the switching power supply device 1B of Modification 2 corresponds to the switching power supply device 1 of the embodiment provided with a rectifying/smoothing circuit 4B and a control circuit 7B instead of the rectifying/smoothing circuit 4 and the control circuit 7, respectively. , and other configurations are the same.
  • synchronous rectification circuit rectification/smoothing circuit 4B
  • Modification 2 the MOS transistors M9 and M10 themselves are controlled to be turned on (perform synchronous rectification) in synchronization with the period during which the parasitic diodes of the MOS transistors M9 and M10 are conducting.
  • a drive circuit 5 in a control circuit 7B which will be described later, uses drive signals SG9 and SG10 to control the on/off operations of the MOS transistors M9 and M10. (See Figure 9).
  • MOS transistors M9 and M10 each correspond to a specific example of a "switching element that performs synchronous rectification" in the present invention.
  • control circuit 7B of the modified example 2 basically has the voltage detection unit 61, the delay time setting unit 62 and the drive circuit 5, similarly to the control circuit 7 of the embodiment and the modified example 1. are doing. However, unlike the control circuit 7, the control circuit 7B is configured as follows.
  • both of the two switching elements S2 and S1 (corresponding to the "first and second switching elements” in the present invention) for which the dead time Td is to be set are included in the inverter circuit 2. It was an arranged switching element.
  • the control circuit 7B at least one of the two switching elements (corresponding to "first and second switching elements” in the present invention) for which the dead time Td is to be set is the rectifying/smoothing circuit described above. 4B is a switching element (at least one of the MOS transistors M9 and M10 described above) that performs synchronous rectification.
  • the two switching elements for which the dead time Td is to be set are as shown in (a) or (b) below.
  • (a) One of the switching elements S1 and S2 and one of the MOS transistors M9 and M10 are the two switching elements for which the dead time Td is set.
  • (b) The MOS transistors M9 and M10. are two switching elements for which the dead time Td is set.
  • the control circuit 7B based on the voltage across one of these two switching elements (corresponding to the "first switching element" in the present invention), is controlled according to the embodiment and modification 1.
  • the dead time Td is set. Specifically, the control circuit 7B controls the dead time during switching drive according to the result of comparison between the voltage value between both ends and the two types of threshold voltages Vth1 and (-Vth2) described above. The length of Td is set at any time. Then, the control circuit 7B uses the dead time Td thus set at any time to perform switching operations in a plurality of switching elements (switching elements S1 and S2 and MOS transistors M9 and M10) including the two switching elements described above. , respectively.
  • control circuit 7B corresponds to a specific example of the "switching control device" of the present invention.
  • switching elements S1 and S2 and the MOS transistors M9 and M10 described above each correspond to a specific example of "a plurality of switching elements” in the present invention.
  • any two of these switching elements S1, S2 and MOS transistors M9, M10 are the “first switching element” and the "second switching element” in the present invention. corresponds to a specific example of
  • FIG. 10 is a circuit diagram showing a schematic configuration example of a switching power supply device 1C according to Modification 3. As shown in FIG.
  • a system including the DC input power supply 10 and the switching power supply device 1C corresponds to a specific example of the "power supply system" of the present invention.
  • the switching power supply 1C of Modification 3 corresponds to the switching power supply 1A of Modification 1 in which a rectifying/smoothing circuit 4C and a control circuit 7C are provided instead of the rectifying/smoothing circuit 4A and the control circuit 7, respectively. , and other configurations are the same.
  • MOS transistors M11 to M14 each correspond to a specific example of a "switching element that performs synchronous rectification" in the present invention.
  • control circuit 7C of Modification 3 basically includes the voltage detection section 61, the delay time setting section 62, and the drive circuit 5, similarly to the control circuit 7 of the embodiment and Modification 1. are doing. However, this control circuit 7C is different from the control circuit 7, and like the control circuit 7B described in the modified example 2, it is configured as follows.
  • At least one of the two switching elements (corresponding to the "first and second switching elements" in the present invention) for which the dead time Td is set is located in the rectifying/smoothing circuit 4C.
  • a switching element (at least one of the MOS transistors M11 to M14 described above) that performs synchronous rectification is arranged in the .
  • the two switching elements for which the dead time Td is to be set are as indicated by (c) or (d) below.
  • (c) One of the switching elements S1 and S2 and one of the MOS transistors M11 to M14 are the two switching elements for which the dead time Td is set.
  • MOS transistors M11 to M14. are two switching elements for which the dead time Td is to be set.
  • the control circuit 7C based on the voltage across one of these two switching elements (corresponding to the "first switching element" in the present invention), is controlled according to the first embodiment and the first modification. , 2, the dead time Td is set. Specifically, the control circuit 7C controls the dead time during switching drive according to the result of comparison between the voltage value between both ends and the two types of threshold voltages Vth1 and (-Vth2) described above. The length of Td is set at any time. Then, the control circuit 7C uses the dead time Td set at any time in this manner to perform the switching operations of the plurality of switching elements (the switching elements S1 and S2 and the MOS transistors M11 to M14) including the two switching elements described above. , respectively.
  • control circuit 7C corresponds to a specific example of the "switching control device" of the present invention.
  • switching elements S1 and S2 and the MOS transistors M11 to M14 described above each correspond to a specific example of "a plurality of switching elements” in the present invention.
  • any two of these switching elements S1, S2 and MOS transistors M11 to M14 are the “first switching element” and the "second switching element” in the present invention. corresponds to a specific example of
  • a plurality of rectifying elements (rectifying diodes) in the rectifying circuit are each composed of a switching element, and the rectifying circuit is a synchronous rectifying circuit. It looks like this: That is, such a synchronous rectification circuit reduces the conduction loss during rectification, so that it is possible to reduce the size and loss of the rectification circuit.
  • switching elements include, for example, the above-described HEMTs, IGBTs with diodes added in parallel, bipolar transistors, and the like.
  • the configuration of the inverter circuit was specifically described, but it is not limited to the examples of the above embodiments and the like. good too.
  • the arrangement relationship between the resonant inductor Lr, the resonant capacitor Cr, and the primary winding 31, which are connected in series with each other is not limited to the arrangement relationship described in the embodiment and the like.
  • the two arrangement positions may be in random order with respect to each other.
  • an example of a so-called "half-bridge type" inverter circuit has been described, but the invention is not limited to this example, and a so-called "full-bridge type” inverter circuit, for example, may be used.
  • transformer primary winding and secondary winding
  • Primary winding and secondary winding may have other configurations.
  • rectifying and smoothing circuit (rectifying circuit and smoothing circuit) was specifically described, but it is not limited to the examples of the above-described embodiments and the like.
  • a rectifying circuit and a smoothing circuit may have other configurations.
  • a DC-DC converter has been described as an example of a switching power supply device according to the present invention, but the present invention is applicable to other types of switching power supply devices such as an AC-DC converter. It can also be applied to

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)
PCT/JP2021/034389 2021-09-17 2021-09-17 スイッチング制御装置、スイッチング電源装置および電力供給システム Ceased WO2023042393A1 (ja)

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JP2023548076A JP7603833B2 (ja) 2021-09-17 2021-09-17 スイッチング制御装置、スイッチング電源装置および電力供給システム
PCT/JP2021/034389 WO2023042393A1 (ja) 2021-09-17 2021-09-17 スイッチング制御装置、スイッチング電源装置および電力供給システム

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013021758A (ja) * 2011-07-07 2013-01-31 Fuji Electric Co Ltd スイッチング電源装置およびその制御装置
JP2013153620A (ja) * 2012-01-26 2013-08-08 Fuji Electric Co Ltd スイッチング電源装置
WO2018146877A1 (ja) * 2017-02-13 2018-08-16 住友電気工業株式会社 電源装置及び電源装置の制御方法
JP2020127145A (ja) * 2019-02-05 2020-08-20 ローム株式会社 ブリッジ出力回路、電源装置及び半導体装置
WO2020202967A1 (ja) * 2019-04-02 2020-10-08 株式会社オートネットワーク技術研究所 車載用電圧変換装置

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013021758A (ja) * 2011-07-07 2013-01-31 Fuji Electric Co Ltd スイッチング電源装置およびその制御装置
JP2013153620A (ja) * 2012-01-26 2013-08-08 Fuji Electric Co Ltd スイッチング電源装置
WO2018146877A1 (ja) * 2017-02-13 2018-08-16 住友電気工業株式会社 電源装置及び電源装置の制御方法
JP2020127145A (ja) * 2019-02-05 2020-08-20 ローム株式会社 ブリッジ出力回路、電源装置及び半導体装置
WO2020202967A1 (ja) * 2019-04-02 2020-10-08 株式会社オートネットワーク技術研究所 車載用電圧変換装置

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