WO2023040593A1 - Procédé et appareil de transmission de données d'image, terminal et support - Google Patents

Procédé et appareil de transmission de données d'image, terminal et support Download PDF

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Publication number
WO2023040593A1
WO2023040593A1 PCT/CN2022/114031 CN2022114031W WO2023040593A1 WO 2023040593 A1 WO2023040593 A1 WO 2023040593A1 CN 2022114031 W CN2022114031 W CN 2022114031W WO 2023040593 A1 WO2023040593 A1 WO 2023040593A1
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WIPO (PCT)
Prior art keywords
frame
ddic
image data
timer
historical
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PCT/CN2022/114031
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English (en)
Chinese (zh)
Inventor
高延凯
王月文
蔡辉跃
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Oppo广东移动通信有限公司
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Publication of WO2023040593A1 publication Critical patent/WO2023040593A1/fr

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • G06F3/147—Digital output to display device ; Cooperation and interconnection of the display device with other functional units using display panels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/393—Arrangements for updating the contents of the bit-mapped memory

Definitions

  • the embodiments of the present application relate to the field of display technology, and in particular to an image data transmission method, device, terminal and medium.
  • the DDIC outputs the frame rate according to the AP (that is, the output The rate of image data) adaptively adjusts the refresh frequency to realize adaptive frequency conversion.
  • AP Application Processor
  • DDIC display driver integrated circuit
  • Embodiments of the present application provide an image data transmission method, device, terminal, and medium. Described technical scheme is as follows:
  • an embodiment of the present application provides an image data transmission method for an application processor AP, the method comprising:
  • n is An integer greater than or equal to 2;
  • the display delay operation is performed on the m+1th frame of image data, and the display delay operation is used to delay the transmission of the m+th frame to the DDIC 1 frame of image data;
  • the m+1th frame of image data is transmitted to the DDIC.
  • an image data transmission device the device includes:
  • the transmission module is used to transmit the image data of the mth frame to the display driver chip DDIC, where m is a positive integer;
  • the first determination module is configured to determine n of each frame image in the m-nth to m-1th frame images of the DDIC based on the historical TE signal output by the DDIC during the display process of the n-th frame image closest to the m-th frame image historical refresh frequency, n is an integer greater than or equal to 2;
  • a delay module configured to perform a display delay operation on the m+1th frame of image data when the n historical refresh frequencies meet the display delay condition, and the display delay operation is used to delay transmission to the DDIC The m+1th frame of image data;
  • the transmission module is further configured to transmit the m+1th frame of image data to the DDIC when the display delay operation is completed.
  • an embodiment of the present application provides a terminal, the terminal includes an AP, a display screen, and a DDIC, and the AP and the DDIC are connected through a Mobile Industry Processor Interface (MIPI),
  • MIPI Mobile Industry Processor Interface
  • the AP is used to execute at least one program in the memory to realize the image data transmission method described above.
  • an embodiment of the present application provides a computer-readable storage medium, the computer-readable storage medium stores at least one program, and the at least one program is used to be executed by a processor to implement the above-mentioned image data transmission method .
  • an embodiment of the present application provides a computer program product, the computer program product includes computer instructions, and the computer instructions are stored in a computer-readable storage medium; the processor of the terminal reads the computer program from the computer-readable storage medium. Instructions, the processor executes the computer instructions, so that the terminal executes the image data transmission method provided in the above aspect.
  • Figure 1 is a schematic diagram of the image display process under the AP-DDCI-Panel architecture
  • Fig. 2 is a schematic diagram of the principle of the image data transmission method provided by the embodiment of the present application.
  • FIG. 3 shows a flowchart of an image data transmission method shown in an exemplary embodiment of the present application
  • Figure 4 is a comparison chart of the refresh frequency when the display delay mechanism is introduced and the display delay mechanism is not introduced;
  • Fig. 5 is a flow chart of a process of determining the historical refresh frequency shown in an exemplary embodiment of the present application
  • Fig. 6 is an implementation schematic diagram of a historical refresh frequency determination process shown in an exemplary embodiment of the present application.
  • FIG. 7 shows a flowchart of an image data transmission method shown in another exemplary embodiment of the present application.
  • Fig. 8 is an implementation schematic diagram of the implementation process of the image data transmission method shown in Fig. 7;
  • FIG. 9 shows a structural block diagram of an image data transmission device provided by an embodiment of the present application.
  • Fig. 10 shows a structural block diagram of a terminal provided by an exemplary embodiment of the present application.
  • the "plurality” mentioned herein means two or more.
  • “And/or” describes the association relationship of associated objects, indicating that there may be three types of relationships, for example, A and/or B may indicate: A exists alone, A and B exist simultaneously, and B exists independently.
  • the character “/” generally indicates that the contextual objects are an "or” relationship.
  • the AP side first performs layer drawing and rendering through the application program (Application, App), and then performs layering on the drawn layer through SurfaceFlinger (layer compositor) Synthesize the image data, and then send the image data to display (write) DDIC through MIPI.
  • the DDIC stores the image data sent by the AP in the buffer (Buffer), and controls the Panel to refresh and display the image (Display) by scanning (reading) the image data in the Buffer.
  • the DDIC When implementing adaptive frequency conversion, the DDIC will adaptively adjust the refresh frequency according to the output frame rate of the AP (that is, the amount of image data transmitted by the AP to the DDIC per unit time, or the speed at which the AP transmits image data to the DDIC). For example, when the output frame rate of the AP decreases, the DDIC lowers the refresh rate, and when the output frame rate of the AP increases, the DDIC increases the refresh rate.
  • the output frame rate of the AP that is, the amount of image data transmitted by the AP to the DDIC per unit time, or the speed at which the AP transmits image data to the DDIC. For example, when the output frame rate of the AP decreases, the DDIC lowers the refresh rate, and when the output frame rate of the AP increases, the DDIC increases the refresh rate.
  • the refresh frequency changes in a small range in a short time without affecting the image display quality, but when the refresh frequency changes in a large range in a short time, problems such as flickering and jitter will occur, which will affect the image display quality.
  • the output frame rate of the AP changes from 60 Hz to 45 Hz in a short period of time, and then changes from 45 Hz to 72 Hz, and the refresh rate of the DDIC changes from 60 Hz.
  • the refresh rate of DDIC changes from 45Hz to 72Hz, the flickering and jittering of the screen will appear because the refresh rate changes too much.
  • the AP side introduces a display delay mechanism.
  • the AP determines the historical refresh frequency of the DDIC during the display process of the latest n frames of images based on the historical TE signal output by the DDIC (that is, the refresh frequency of the DDIC when displaying each frame of the latest n frames of images) , and based on the DDIC refresh frequency stabilization algorithm, the display delay condition detection is performed on the historical refresh frequency, so that when the delay condition is met, the display delay operation is performed on the next frame of image data to avoid the problem of a large jump in the refresh frequency , to achieve the effect of stabilizing the DDIC refresh rate, thereby reducing the flickering problem of the display screen caused by it.
  • the AP obtains the historical refresh rate of the DDIC during the display of the last two frames of images.
  • the historical refresh rates of the DDIC are 60 Hz (refresh frame image refresh rate)
  • the AP directly transmits the next frame of image data to the DDIC after completing the data preparation, the refresh rate of the DDIC will become 72Hz; and after the display delay mechanism is introduced, the AP detects the historical refresh of the DDIC
  • the frequency satisfies the delay condition of sending display, so that the next frame of image data is transmitted to DDIC after a certain period of time delay, so that the refresh frequency of DDIC becomes 60Hz, thus avoiding the sharp jump of DDIC refresh frequency directly from 45Hz to 72Hz.
  • the method provided in the embodiment of the present application is applied to a terminal, and the above image data transmission method is executed by an AP in the terminal.
  • the terminal may include a smart phone, a tablet computer, a wearable device (such as a smart watch), a portable personal computer, a smart TV, etc.
  • the embodiment of the present application does not limit the specific type of the terminal.
  • FIG. 3 shows a flowchart of an image data transmission method shown in an exemplary embodiment of the present application.
  • the method includes:
  • Step 301 transmit the image data of the mth frame to the DDIC, where m is a positive integer.
  • the AP and the DDIC are connected through MIPI. After the image data preparation is completed, the AP transmits the image data to the DDIC through the MIPI, and then the DDIC controls the display screen (Panel) to display images based on the image data.
  • Step 302 based on the historical TE signal output by the DDIC during the display process of the n-th frame image closest to the m-th frame image, determine the n historical refresh frequencies of the DDIC for each frame image in the m-nth to m-1th frame image, where n is greater than An integer equal to 2.
  • n historical refresh frequencies of DDIC can be used to detect whether the display delay condition is satisfied based on n historical refresh frequencies.
  • the process of displaying a frame of image includes the process of the DDIC performing frame scanning, and the process of waiting for the next frame of image data after the frame scanning is completed. While waiting for the next frame of image data, DDIC will output the TE signal (instructing the AP to transmit the ready image data), and stop outputting the TE signal when receiving the next frame of image data, so as to frame based on the next frame of image data scanning. Therefore, in a possible implementation manner, the AP may determine the historical refresh frequency of the DDIC based on the historical TE signal output by the DDIC. Regarding the specific implementation manner of determining the historical refresh frequency on the DDIC side, the following embodiments will describe in detail.
  • the AP monitors the refresh rate of the DDIC in real time during the image display process of each frame, and performs a corresponding refresh rate on the n-frame images closest to the m-th frame (currently displayed frame).
  • Storage that is, the AP stores the historical refresh frequency of the last n frames.
  • the AP obtains the stored n historical refresh frequencies.
  • the AP determines the first DDIC during the display of the 8th frame of image The historical refresh rate, and the second historical refresh rate of DDIC during the image display of the ninth frame.
  • Step 303 When the n historical refresh frequencies meet the display delay condition, perform a display delay operation on the m+1th frame of image data, and the display delay operation is used to delay the transmission of the m+1th frame of image data to the DDIC.
  • the display delay condition is used to filter sporadic acceleration requests on the AP side, preventing the DDIC from directly increasing from a low refresh rate to a high refresh rate.
  • the AP when the image data preparation speed on the AP side changes suddenly in a short period of time, the AP generates sporadic acceleration requests, and after the sporadic acceleration requests, the speed of preparing image data on the AP side drops and cannot be maintained for a long time. Occurs after the delay in preparing image frame data on the AP side.
  • the AP judges whether there is an image preparation delay in the latest n frames of images based on the historical refresh frequency of the latest n frames of images.
  • +1 frame of image data is sent to the display with a delay operation to avoid that when the m+1th frame of image data is prepared in advance, the refresh rate jumps due to the AP immediately transmitting the m+1th frame of image data to the DDIC (because the previous frame is sent Display delay will shorten the sending interval between two adjacent frames of image data, which will lead to an increase in refresh rate).
  • the purpose of the display delay operation is to reduce the refresh frequency of the DDIC, so as to avoid the sudden increase in the image preparation speed of the AP side that causes the DDIC refresh frequency to jump and rise when there is an image preparation delay in the latest n frames of images. .
  • the AP when the historical refresh frequency of the latest n frames does not meet the display delay condition, the AP does not need to perform the display delay operation on the m+1th frame of image data, and transmits the m+1th frame to the DDIC according to the conventional display logic image data.
  • Step 304 when the delay operation of sending to display is completed, transmit the m+1th frame of image data to the DDIC.
  • the AP transmits the m+1th frame of image data to the DDIC according to the TE signal output by the DDIC. After completing the transmission of the image data of the m+1 frame, and before transmitting the image data of the m+2 frame, the AP re-executes the above steps 302 to 303, which will not be repeated here in this embodiment.
  • the DDIC displays according to the refresh frequency corresponding to the frame register (the register used to store the correspondence between the refresh frequency and the display screen parameters in the DDIC).
  • the parameters of the display screen are adjusted.
  • the adjusted display screen parameters may include Gamma parameters and Demura parameters, which are not limited in this embodiment.
  • the refresh frequency of the DDIC jumps from 45Hz to 72Hz without introducing a display delay mechanism.
  • the refresh frequency of the DDIC jumps from 51Hz to 72Hz.
  • the AP After introducing the display delay mechanism, before sending the seventh frame of image data to the DDIC, the AP determines that the historical refresh frequencies of the DDIC during the display of the fourth and fifth frames are 60 Hz and 45 Hz, respectively, so it is determined that the display delay condition is met.
  • the display delay operation is implemented, and the transmission of the seventh frame of image data to the DDIC is delayed, so that the refresh frequency of the DDIC is reduced to 60Hz during the display of the sixth frame of the image, that is, in the process of displaying the fifth and sixth frames of images, the DDIC’s Refresh frequency increased from 45Hz to 60Hz, but did not jump directly to 72Hz;
  • the AP displays the images based on the 12th and 13th frames
  • the historical refresh frequencies of the DDIC are 60Hz and 51Hz respectively, so it is determined that the display delay condition is satisfied, so that the transmission of the 15th frame of image data to the DDIC is delayed, so that the refresh rate of the DDIC is reduced to 60Hz during the display of the 14th frame of image, that is, when the DDIC is displayed During the 13th and 14th frames, the refresh rate of DDIC increased from 51Hz to 60Hz, but did not directly jump to 72Hz.
  • the AP transmits the image data of the m-th frame to the DDIC, it determines the The n historical refresh frequencies of DDIC, and further determine whether the display delay condition is satisfied based on the n historical refresh frequencies, so that when the display delay condition is satisfied, after the display delay operation is performed on the m+1th frame image data, and then sent to
  • the DDIC transmits the image data of the m+1th frame, avoiding the DDIC refresh frequency jump caused by the fluctuation of the AP output frame rate, which in turn causes the problem of flickering and jittering of the screen, which helps to improve the stability of the DDIC refresh frequency during the image display process, and achieves an improvement.
  • the effect of image display quality after the AP transmits the image data of the m-th frame to the DDIC, it determines the The n historical refresh frequencies of DDIC, and further determine whether the display delay condition is satisfied based on the n historical refresh frequencies, so that when the display delay condition is satisfied, after the display delay operation is performed on the m+1th frame
  • the AP is used to transmit image data when the high level of the single-TE signal is detected, and the single-TE signal is a continuous high-level TE signal output by the DDIC;
  • n historical refresh frequencies of the DDIC for each frame image in the m-nth to m-1th frame images including:
  • n historical refresh frequencies Based on the time interval between adjacent falling edges, determine n historical refresh frequencies.
  • n historical refresh frequencies based on the time interval between adjacent falling edges including:
  • the display transmission delay operation is performed on the image data of the m+1th frame, including:
  • the display delay operation is performed on the m+1th frame of image data.
  • the target refresh rate is the same as that of the foreground application during running to match the base frame rate.
  • data transmission is performed between the AP and the DDIC through the mobile industry processor interface MIPI;
  • the method After transmitting the mth frame of image data to the DDIC, the method also includes:
  • Perform display delay operation on the image data of the m+1th frame including:
  • a second timer is started, and the MIPI is set to a blocking state within the timer duration of the second timer;
  • the timer duration of the first timer and the timer duration of the second timer are set based on the target refresh frequency.
  • the target refresh rate is i
  • the highest refresh rate required by the DDIC during the running of the foreground application is j, where j is greater than i;
  • timer duration of the first timer is less than 1/j
  • the sum of the timer duration of the first timer and the timer duration of the second timer is greater than 1/j and less than 1/i.
  • the MIPI When the timer duration of the second timer is reached, the MIPI is set to a pass state, and the m+1th frame of image data is transmitted to the DDIC.
  • the method also includes:
  • the DDIC when the DDIC completes the image display based on the image data transmitted by the AP and is ready to refresh the next frame of image, it will output a continuous high-level single-tear effect (single-TE) signal, correspondingly, When the AP detects the high level of the single-TE signal, it transmits the prepared image data to the DDIC.
  • single-TE single-tear effect
  • the DDIC after receiving the image data corresponding to the image frame A sent by the AP, the DDIC performs frame scanning on the image frame A, and outputs a continuous high-level single-TE signal when the frame scanning is completed .
  • the AP completes the data preparation of the image frame B and detects the high level of the single-TE signal, it transmits the image data corresponding to the image frame B to the DDIC.
  • the DDIC scans the image frame B, the single-TE signal set low.
  • the DDIC outputs a single-TE signal with a continuous high level again, and waits for the AP to transmit the image data of image frame C.
  • the interval between the falling edges (Falling Trigger) of adjacent single-TE signals output by the DDIC is the display duration of one frame of image, so the AP can detect the falling edge of the single-TE signal To determine the historical refresh frequency of DDIC.
  • the process of determining n historical refresh frequencies may include the following steps.
  • Step 302A determine the falling edge of the historical single-TE signal output by the DDIC during the image display process of the n-frame closest to the m-th frame.
  • the AP when it is necessary to determine the n historical refresh frequencies corresponding to the latest n frames of images, the AP obtains the falling edges of the last n+1 historical single-TE signals output by the DDIC, where n+1 Falling edges of two adjacent historical single-TE signals in the historical single-TE signal are used to determine a historical refresh frequency.
  • the AP obtains the falling edges of the last three historical single-TE signals, which are respectively DDIC to image frame C
  • the falling edge of the single-TE signal output before frame scanning that is, the first falling edge
  • the falling edge of the single-TE signal output by DDIC before frame scanning of image frame B that is, the second falling edge most recently
  • the falling edge that is, the latest third falling edge
  • Step 302B based on the time interval between adjacent falling edges, determine n historical refresh frequencies.
  • the AP when determining the historical refresh frequency corresponding to the m-i frame image, determines the i-th falling edge interval between the latest i-th falling edge and the latest i+1-th falling edge (i is less than A positive integer of n), so that based on the i-th falling edge interval, the historical refresh frequency corresponding to the m-i-th frame image is determined.
  • the AP determines the history corresponding to image frame B (equivalent to the second frame image above) based on the first falling edge interval between the most recent first falling edge and the most recent second falling edge
  • the refresh frequency is 45Hz (that is, the refresh frequency of DDIC is 45Hz in the process of displaying image frame B); based on the second falling edge interval between the nearest second falling edge and the nearest third falling edge, determine the image frame A (
  • the historical refresh frequency corresponding to the above-mentioned first frame image) is 60 Hz (that is, the refresh frequency of the DDIC during the process of displaying image frame A is 60 Hz).
  • the AP may also use other methods to determine the historical refresh frequency of the DDIC, which is not limited in this embodiment.
  • the refresh rate of DDIC should be designed to stabilize the frame with 60Hz as the target refresh rate, that is, the target refresh rate
  • the frequency matches the base frame rate while the foreground app is running.
  • the match between the target refresh rate and the reference frame rate means that the difference between the target refresh rate and the reference frame rate is less than a threshold (for example, 5FPS).
  • the target refresh rate is equal to the reference frame rate, or the target refresh rate is slightly lower than greater than the base frame rate, or, the target refresh rate is slightly less than the base frame rate.
  • the DDIC can wait appropriately to ensure that the refresh rate of the DDIC is not greater than the target refresh rate in most scenarios. range (such as 45Hz to 60Hz).
  • the AP when the AP prepares the image data in advance (that is, when there is a demand for acceleration), in order to avoid the DDIC’s refresh rate from directly jumping from a low refresh rate to a high refresh rate (that is, from a refresh rate lower than 60Hz to a refresh rate higher than 60Hz) Refresh frequency), in this application, the AP performs display delay operation.
  • the AP obtains n historical refresh frequencies, it detects whether each historical refresh frequency is lower than the target Refresh frequency. If the historical refresh frequency corresponding to at least one frame of image is less than the target refresh frequency, it is determined that the display delay condition is satisfied, and then the display delay operation is performed on the (m+1)th frame of image data.
  • the AP transmits the m+1th frame of image data to the DDIC.
  • the AP determines the base frame rate of the foreground application, so as to set the display delay condition based on the base frame rate.
  • the AP sets the display delay condition as follows: among the historical refresh rates corresponding to the last two frames of images, there is a historical refresh rate less than 60Hz. That is, as long as the historical refresh frequency corresponding to an image is less than 60Hz, the AP will perform the display delay operation; if the historical refresh frequency corresponding to two frames of images is not less than 60Hz, the AP does not need to perform the display delay operation.
  • the AP can delay sending the display by blocking MIPI.
  • FIG. 7 shows a flowchart of an image data transmission method shown in another exemplary embodiment of the present application.
  • the method includes:
  • Step 701 transmit the image data of the mth frame to the DDIC, where m is a positive integer.
  • Step 702 start the first timer, wherein, the MIPI is in the pass state within the timer duration of the first timer.
  • the AP after transmitting the image data to the DDIC, the AP starts the first timer and ensures that the MIPI is in the pass state within the timer duration of the first timer, so that the AP can pass the MIPI during the frame scanning process. Instructions other than image data are transmitted to the DDIC, wherein the first timer can be started by the AP by calling a timing thread.
  • the AP starts the first timer after transmitting the image data of the image frame C to the DDIC.
  • Step 703 based on the historical TE signal output by the DDIC during the display process of the n-th frame image closest to the m-th frame image, determine the n historical refresh frequencies of the DDIC for each frame image in the m-nth to m-1th frame image, where n is greater than An integer equal to 2.
  • the AP transmits the image data of image frame C to the DDIC, it determines that the historical refresh frequency of the DDIC when displaying image frame A is 60 Hz, and that the historical refresh frequency of DDIC when displaying image frame B is 45 Hz.
  • Step 704 In the case that there is at least one frame of image whose historical refresh frequency is less than the target refresh frequency, when the timer duration of the first timer is reached, start the second timer, and when the timer duration of the second timer Set MIPI to blocking state.
  • the AP when the first timer reaches the timer duration, the AP sets the MIPI from the channel state to the blocking state, and starts the second timer to ensure that the MIPI remains in the blocking state within the timer duration of the second timer. Since MIPI is in the blocking state, the TE signal cannot be detected during the second timer period, so the AP cannot transmit the m+1th frame of image data to the DDIC during the second timer period, thus achieving the effect of delayed display.
  • the timer duration of the first timer and the timer duration of the second timer are set based on the target refresh frequency.
  • the target refresh frequency is i
  • the highest refresh frequency required by DDIC during the running of the foreground application is j
  • the timer duration of the first timer is less than 1/j
  • the first timer The sum of the timer duration of the second timer and the second timer is greater than 1/j and less than 1/i, so that MIPI enters the blocking state before the rising edge of the next TE signal, and makes the refresh of DDIC during the image display process of the mth frame Frequency is the target refresh rate.
  • the AP cannot transmit the image data of the image frame D to the DDIC within this period.
  • Step 705 when the timer duration of the second timer is reached, set the MIPI to the channel state, and transmit the m+1th frame of image data to the DDIC.
  • the AP when the timer duration of the second timer is reached, the AP resets the MIPI to the channel state, and when detecting the high level of the single-TE signal, transmits the m+1th frame of image data to the DDIC, so that the first During the m-frame image display process, the refresh rate of the DDIC is the target refresh rate.
  • the AP restores the MIPI to the path state, and when detecting the high level of the single-TE signal output by the DDIC, transmits the image frame to the DDIC D image data.
  • the refresh frequency of DDIC is 72Hz in the process of displaying image frame C, but after introducing the display delay mechanism, the refresh frequency of DDIC is reduced to 60Hz in the process of displaying image frame C, thus avoiding refresh The frequency jumps from 45Hz to 72Hz.
  • the above-mentioned embodiment only uses the delayed display sending method of blocking MIPI as an example for illustration.
  • the AP may delay the display sending timing in other ways.
  • the explicit way constitutes a limitation.
  • FIG. 9 shows a structural block diagram of an image data transmission device provided by an embodiment of the present application.
  • the unit includes:
  • the transmission module 901 is configured to transmit the mth frame of image data to the display driver chip DDIC, where m is a positive integer;
  • the first determination module 902 is configured to determine, based on the historical TE signal output by the DDIC during the display process of the n-th frame image closest to the m-th frame image, the DDIC for each frame image in the m-nth to m-1th frame image n historical refresh frequencies, n is an integer greater than or equal to 2;
  • the delay module 903 is configured to perform a display delay operation on the (m+1)th frame of image data when the n historical refresh frequencies meet the display delay condition, and the display delay operation is used to delay sending to the DDIC transmitting the m+1th frame of image data;
  • the transmission module 901 is further configured to transmit the m+1th frame of image data to the DDIC when the display delay operation is completed.
  • the AP is used to perform image data transmission when a high level of a single-TE signal with a single tearing effect is detected, and the single-TE signal is a continuous high-level TE signal output by the DDIC;
  • the first determining module 902 includes:
  • the first determination unit is configured to determine the falling edge of the historical single-TE signal output by the DDIC during the display process of the n-frame image closest to the m-th frame image;
  • the second determination unit is configured to determine n historical refresh frequencies based on the time interval between adjacent falling edges.
  • the second determination unit is configured to:
  • the historical refresh frequency corresponding to the m-i-th frame image is determined.
  • the delay module 903 includes:
  • a delay unit configured to determine that the display delay condition is satisfied when the historical refresh frequency corresponding to at least one frame of image is less than the target refresh frequency, and perform the sending of the m+1th frame of image data operation with significant delay, the target refresh rate matches the base frame rate during the running of the foreground application.
  • data transmission is performed between the AP and the DDIC through a mobile industry processor interface MIPI;
  • the device also includes:
  • a starting module configured to start a first timer, wherein the MIPI is in a pass state within the timer duration of the first timer;
  • the delay unit is used for:
  • the timer duration of the first timer and the timer duration of the second timer are set based on the target refresh frequency.
  • the target refresh frequency is i
  • the highest refresh frequency required by the DDIC during the running of the foreground application is j, where j is greater than i;
  • timer duration of the first timer is less than 1/j
  • the sum of the timer duration of the first timer and the timer duration of the second timer is greater than 1/j and less than 1/i.
  • the transmission module 901 is configured to:
  • the MIPI When the timer duration of the second timer is reached, the MIPI is set to a pass state, and the m+1th frame of image data is transmitted to the DDIC.
  • the device also includes:
  • a second determining module configured to determine the reference frame rate of the foreground application
  • a setting module configured to set the display delay condition based on the reference frame rate.
  • the AP transmits the image data of the mth frame to the DDIC, based on the historical TE signal output by the DDIC during the display process of the n-frame image closest to the m-th image, Determine the n historical refresh frequencies of DDIC, and further determine whether the display delay condition is satisfied based on the n historical refresh frequencies, so that when the display delay condition is satisfied, after the display delay operation is performed on the m+1th frame of image data, and then The image data of the m+1th frame is transmitted to the DDIC to avoid the jump of the DDIC refresh rate caused by the fluctuation of the AP output frame rate, which in turn causes the problem of flickering and jittering of the screen, which helps to improve the stability of the DDIC refresh rate during the image display process, and achieves Improve the image display quality effect.
  • FIG. 10 shows a structural block diagram of a terminal 1000 provided by an exemplary embodiment of the present application.
  • the terminal 1000 may be a smart phone, a tablet computer, a notebook computer, and the like.
  • the terminal 1000 in this application may include one or more of the following components: a processor 1010 , a memory 1020 , and a display screen module 1030 .
  • the processor 1010 may include one or more processing cores, and the processor 1010 may be the AP described in the foregoing embodiments.
  • the processor 1010 uses various interfaces and lines to connect various parts of the entire terminal 1000, and executes the terminal by running or executing instructions, programs, code sets or instruction sets stored in the memory 1020, and calling data stored in the memory 1020. 1000's of various functions and processing data.
  • the processor 1010 may adopt at least one of Digital Signal Processing (Digital Signal Processing, DSP), Field-Programmable Gate Array (Field-Programmable Gate Array, FPGA), and Programmable Logic Array (Programmable Logic Array, PLA). implemented in the form of hardware.
  • DSP Digital Signal Processing
  • FPGA Field-Programmable Gate Array
  • PLA Programmable Logic Array
  • the processor 1010 may integrate one or more of a central processing unit (Central Processing Unit, CPU), an image processor (Graphics Processing Unit, GPU), a neural network processor (Neural-network Processing Unit, NPU) and a modem, etc.
  • a central processing unit Central Processing Unit, CPU
  • an image processor Graphics Processing Unit, GPU
  • a neural network processor Neural-network Processing Unit, NPU
  • the CPU mainly handles the operating system, user interface and application programs, etc.
  • the GPU is used to render and draw the content that the touch display module 1030 needs to display
  • the NPU is used to realize the artificial intelligence (Artificial Intelligence, AI) function
  • the modem Used to handle wireless communications. It can be understood that, the above-mentioned modem may not be integrated into the processor 1010, but may be realized by a single chip.
  • the memory 1020 may include random access memory (Random Access Memory, RAM), and may also include read-only memory (Read-Only Memory, ROM).
  • the memory 1020 includes a non-transitory computer-readable storage medium.
  • the memory 1020 may be used to store instructions, programs, codes, sets of codes or sets of instructions.
  • the memory 1020 may include a program storage area and a data storage area, wherein the program storage area may store instructions for implementing an operating system, instructions for at least one function (such as a touch function, a sound playback function, an image playback function, etc.), Instructions and the like for implementing various method embodiments of the present application; the storage data area may store data created according to the use of the terminal 1000 (such as audio data, phone book) and the like.
  • the display screen module 1030 is a display component for displaying images, and is usually arranged on the front panel of the terminal 1000 .
  • the display module 1030 can be designed as a full screen, a curved screen, a special-shaped screen, a double-sided screen or a folding screen.
  • the display screen module 1030 can also be designed as a combination of a full screen and a curved screen, or a combination of a special-shaped screen and a curved screen, which is not limited in this embodiment.
  • the display screen module 1030 includes a DDIC 1031 and a display screen 1032 (panel).
  • the display screen 1032 may be an OLED display screen, which may be a low temperature polysilicon (Low Temperature Poly-Silicon, LTPS) AMOLED display screen or a low temperature polycrystalline oxide (Low Temperature Polycrystalline Oxide, LTPO) AMOLED display screen.
  • the DDIC1031 is used to drive the display screen 1032 to display images.
  • the DDIC 1031 is connected to the processor 1010 through a MIPI interface, and is used for receiving image data and instructions issued by the processor 1010 .
  • the display screen module 1030 also has a touch function.
  • the touch function the user can use any suitable object such as a finger or a touch pen to perform touch operations on the display screen module 1030 .
  • the structure of the terminal 1000 shown in the above drawings does not constitute a limitation on the terminal 1000, and the terminal may include more or less components than those shown in the figure, or combine some components, or different component arrangements.
  • the terminal 1000 also includes components such as a microphone, a speaker, a radio frequency circuit, an input unit, a sensor, an audio circuit, a wireless fidelity (Wireless Fidelity, WiFi) module, a power supply, and a bluetooth module, which will not be repeated here.
  • the embodiment of the present application also provides a computer-readable storage medium, the computer-readable storage medium stores at least one program, and the at least one program is used to be executed by a processor to implement the image data transmission method as described in the above-mentioned embodiments.
  • the embodiment of the present application also provides a computer program product, the computer program product includes computer instructions, and the computer instructions are stored in a computer-readable storage medium; the processor of the terminal reads the computer instructions from the computer-readable storage medium, and processes The computer executes the computer instruction, so that the terminal executes the image data transmission method provided by the above embodiment.
  • the functions described in the embodiments of the present application may be implemented by hardware, software, firmware or any combination thereof.
  • the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium.
  • Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another.
  • a storage media may be any available media that can be accessed by a general purpose or special purpose computer.

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Television Systems (AREA)
  • Controls And Circuits For Display Device (AREA)

Abstract

Procédé et appareil de transmission de données d'image, terminal et support. Le procédé consiste à : transmettre une m-ième trame de données d'image à un DDIC (301) ; sur la base d'un signal TE historique émis par le DDIC pendant le processus d'affichage de n trames des images les plus proches de la m-ième image de trame, déterminer n fréquences de rafraîchissement historiques du DDIC pour chaque image de trame à partir d'une (m-n)ième à une (m-1)ème image de trame (302) ; lorsque les n fréquences de rafraîchissement historiques satisfont des conditions de retard d'affichage, réaliser une opération de retard d'affichage sur une (m+1)ème trame de données d'image, l'opération de retard d'affichage étant utilisée pour retarder la transmission de la (m+1)ème trame de données d'image au DDIC (303) ; et transmettre la (m+1)ème trame de données d'image au DDIC lorsque l'opération de retard d'affichage est achevée (304). Au moyen de l'introduction d'un mécanisme de retard d'affichage, le problème de scintillement d'écran et de gigue provoqué par le saut de fréquence de la fréquence de rafraîchissement de DDIC dû aux fluctuations de la fréquence image émise par un AP est évité, et la stabilité de la fréquence image de DDIC pendant le processus d'affichage d'image est améliorée.
PCT/CN2022/114031 2021-09-15 2022-08-22 Procédé et appareil de transmission de données d'image, terminal et support WO2023040593A1 (fr)

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