WO2023037416A1 - Delay adjustment device and redundant line system - Google Patents

Delay adjustment device and redundant line system Download PDF

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Publication number
WO2023037416A1
WO2023037416A1 PCT/JP2021/032885 JP2021032885W WO2023037416A1 WO 2023037416 A1 WO2023037416 A1 WO 2023037416A1 JP 2021032885 W JP2021032885 W JP 2021032885W WO 2023037416 A1 WO2023037416 A1 WO 2023037416A1
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Prior art keywords
time
frame
buffer
reception
delay
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PCT/JP2021/032885
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French (fr)
Japanese (ja)
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仁 長谷川
利文 宮城
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日本電信電話株式会社
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Priority to PCT/JP2021/032885 priority Critical patent/WO2023037416A1/en
Priority to JP2023546599A priority patent/JPWO2023037416A1/ja
Publication of WO2023037416A1 publication Critical patent/WO2023037416A1/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/22—Arrangements for detecting or preventing errors in the information received using redundant apparatus to increase reliability

Definitions

  • the present disclosure relates to a delay adjustment device and a redundant line system, and more particularly to a delay adjustment device and redundant line system that enable uninterrupted switching of redundant communication lines.
  • a hitless switching technology is known, for example, as disclosed in Non-Patent Document 1.
  • the sending device copies the same frame to two redundant paths, and the receiving device checks the received frame, selects the normal frame, and sends it out. It is a redundancy technology that does not cause interruptions.
  • the upper device and lower device that have a redundant switching function between the operating system and the standby system are connected to each other by two systems, an operating system line and a standby system line.
  • the active system line is composed of a cable such as an optical cable
  • the standby system line is composed of a transmission device such as a wireless system
  • Jitter is the degree of change in delay time.
  • the inter-system delay difference and fluctuation must be less than the upper limit.
  • a mechanism is desired that reduces inter-system delay differences and fluctuations between devices.
  • the present disclosure has been made to solve the above-described problems, and is a delay adjustment device and a An object of the present invention is to provide a redundant line system.
  • a first aspect relates to the delay adjuster.
  • a delay adjuster is provided in the redundant line system.
  • a redundant line system is a system in which a transmitting device and a receiving device are connected by two systems, a first path and a second path. The first path and the second path transmit the same frame.
  • the delay adjusting device connects between the transmitting device and the receiving device.
  • the delay adjustment device includes a first transceiver, a second transceiver, and a controller.
  • the first transmission/reception unit temporarily stores frames received from the transmission device via the first path in a first buffer.
  • the second transmitting/receiving unit temporarily stores frames received from the transmitting device via the second path in a second buffer.
  • the control unit controls frame transmittable timings in the first transmission/reception unit and the second transmission/reception unit at regular intervals.
  • the control unit controls the difference between a first reception time of the measurement frame received from the transmission device via the first path and a second reception time of the measurement frame received from the transmission device via the second path.
  • Calculate differential delay time based on
  • the control unit sets the delay difference time in the first transmission/reception unit when the first reception time is earlier than the second reception time.
  • the control unit sets the delay difference time in the second transmission/reception unit when the second reception time is earlier than the first reception time.
  • the first transmitting/receiving unit stores the frame stored in the first buffer at the next transmittable timing after the delay difference time has passed after the frame is received. to the receiving device.
  • the first transmitting/receiving unit transmits the frame stored in the first buffer to the receiving device at the next transmittable timing after receiving the frame when the delay difference time is not set.
  • the second transmitting/receiving unit stores the frame stored in the second buffer at the next transmittable timing after the differential delay time has elapsed since the frame was received. to the receiving device.
  • the second transmitting/receiving unit transmits the frame stored in the second buffer to the receiving device at the next transmittable timing after receiving the frame when the delay difference time is not set.
  • the second aspect further has the following features in addition to the first aspect.
  • the controller sets the size of the first buffer larger than that of the second buffer as the delay difference time increases.
  • the controller sets the size of the second buffer larger than that of the first buffer as the delay difference time increases.
  • a third aspect relates to redundant line systems.
  • a redundant line system is a system in which a transmitting device and a receiving device are connected by two systems, a first path and a second path. The first path and the second path transmit the same frame.
  • a redundant line system comprises a delay adjustment device connecting between the transmitting device and the receiving device.
  • the delay adjustment device includes a first transceiver, a second transceiver, and a controller.
  • the first transmission/reception unit temporarily stores frames received from the transmission device via the first path in a first buffer.
  • the second transmitting/receiving unit temporarily stores frames received from the transmitting device via the second path in a second buffer.
  • the control unit controls frame transmittable timings in the first transmission/reception unit and the second transmission/reception unit at regular intervals.
  • the control unit controls the difference between a first reception time of the measurement frame received from the transmission device via the first path and a second reception time of the measurement frame received from the transmission device via the second path. Calculate differential delay time based on The control unit sets the delay difference time in the first transmission/reception unit when the first reception time is earlier than the second reception time. The control unit sets the delay difference time in the second transmission/reception unit when the second reception time is earlier than the first reception time. When the delay difference time is set, the first transmitting/receiving unit stores the frame stored in the first buffer at the next transmittable timing after the delay difference time has passed after the frame is received. to the receiving device.
  • the first transmitting/receiving unit transmits the frame stored in the first buffer to the receiving device at the next transmittable timing after receiving the frame when the delay difference time is not set.
  • the second transmitting/receiving unit stores the frame stored in the second buffer at the next transmittable timing after the differential delay time has elapsed since the frame was received. to the receiving device.
  • the second transmitting/receiving unit transmits the frame stored in the second buffer to the receiving device at the next transmittable timing after receiving the frame when the delay difference time is not set.
  • the fourth aspect further has the following features in addition to the third aspect.
  • the controller sets the size of the first buffer larger than that of the second buffer as the delay difference time increases.
  • the controller sets the size of the second buffer larger than that of the first buffer as the delay difference time increases.
  • inter-system delay difference can be absorbed by fixedly setting the calculated delay difference time to the transmitting/receiving unit that receives the frame first among the two transmitting/receiving units. Also, by controlling the transmittable timing of the frame sent from the buffer at regular intervals, it is possible to absorb fluctuations that occur in a wireless system or the like. High service quality can be ensured by uninterrupted switching between systems by absorbing inter-system delay differences and fluctuations. According to the present disclosure, even when two communication paths are configured using arbitrary devices, inter-system delay differences and fluctuations can be absorbed, and instantaneous switching between systems is possible.
  • FIG. 1 is a diagram for explaining a configuration example of a redundant line system according to an embodiment
  • FIG. 3 is a block diagram illustrating an overview of functions of the delay adjustment device according to the embodiment
  • FIG. 9 is a timing chart for explaining an example in which delay difference and fluctuation absorption processing are applied according to the embodiment
  • 7 is a flowchart illustrating delay difference and fluctuation absorption processing executed by the delay adjustment device 1 according to the embodiment
  • 2 is a block diagram showing a hardware configuration example of the delay adjustment device 1 according to the embodiment
  • Embodiment 1. Redundant Line System
  • FIG. 1 is a diagram for explaining a configuration example of a redundant line system according to an embodiment.
  • the redundant line system shown in FIG. 1 includes a delay adjustment device 1, a host device 2, a subordinate device 3, and a repeater 4 (an active repeater 4a and a standby repeater 4b).
  • the application of the delay adjustment device 1 will be described with an example of the downstream signal flow from the upper device 2 to the lower device 3 .
  • the upper device 2 functions as a transmitting device
  • the lower device 3 functions as a receiving device.
  • the redundant line system connects the upper device 2 and the lower device 3 with two systems, an active communication path (first path) and a standby communication path (second path).
  • the same frame copied in the upper device 2 as a transmitter is transmitted to the lower device 3 as a receiver via two redundant routes.
  • the transmission method is, for example, Ethernet (registered trademark).
  • the upper device 2 and the lower device 3 have a redundancy switching function between operation/standby systems.
  • the relay device 4 is composed of, for example, a wired optical cable or a wireless transmission device.
  • the active communication path is composed of one or more active relay devices 4a having optical cables.
  • the standby communication path is composed of one or more standby relay devices 4b having transmission devices such as wireless systems.
  • a large delay difference may occur between routes on routes with different route lengths and facilities. Also, when a transmission device is applied to a redundant line, fluctuations of the transmission device are inserted.
  • the delay adjustment device 1 is a device for absorbing inter-system delay differences and fluctuations.
  • the delay adjustment device 1 shown in FIG. 1 is connected between the relay device 4 and the lower device 3, that is, directly upstream of the receiving device.
  • the delay adjustment device 1 arranged in this way absorbs the inter-system delay difference and fluctuations of the frames transmitted from the two systems of the active relay device 4a and the standby relay device 4b, respectively. Send to the interface unit and the standby system interface unit.
  • FIG. 2 is a block diagram illustrating an overview of the functions of the delay adjustment apparatus 1 according to the embodiment.
  • the delay adjustment device 1 absorbs the inter-system delay difference and fluctuation (jitter), thereby enabling the high-level device 2 and the low-level device 3 to switch between the active system and the standby system without interruption.
  • the delay adjustment device 1 includes an active interface section 10 (first transmission/reception section), a standby interface section 20 (second transmission/reception section), and a control section 30 .
  • the working system interface section 10 includes a relay side interface 11 , a working side buffer 12 (first buffer), and a node side interface 13 .
  • the relay-side interface 11 has a communication circuit and connects to the active relay device 4a in FIG.
  • the relay-side interface 11 outputs the frame received from the active-system relay device 4 a on the active-system communication path to the active-side buffer 12 . Also, the relay-side interface 11 outputs signal arrival information of the received frame to the control unit 30 .
  • the operation-side buffer 12 is a FIFO type buffer, that is, a queue.
  • the working-side buffer 12 temporarily stores frames input from the relay-side interface 11 via the working-system communication path in order to absorb inter-system delay differences and fluctuations.
  • the node-side interface 13 has a communication circuit and connects to the active system interface section of the lower device 3 in FIG.
  • the node-side interface 13 can transmit the frames temporarily stored in the operation-side buffer 12 to the operation system interface section of the lower device 3 .
  • a transmission possible timing and a delay difference time can be set in the active interface unit 10 by the control unit 30, which will be described later.
  • the timing at which frames can be transmitted arrives at regular intervals.
  • the active interface unit 10 can transmit the frames stored in the active buffer 12 frame by frame each time a transmittable timing at a constant interval arrives. However, if the differential delay time is set, this does not apply until the differential delay time elapses.
  • the active interface unit 10 stores the The frame is transmitted to the lower device 3 . Further, when the differential delay time is not set, the active system interface unit 10, after receiving the frame, transmits the frame stored in the active buffer 12 to the lower device 3 at the next transmittable timing. Send to
  • the standby interface unit 20 has the same configuration as the active interface unit 10 .
  • the standby system interface unit 20 includes a relay side interface 21 , a standby side buffer 22 (second buffer), and a node side interface 23 .
  • the relay side interface 21 has a communication circuit and connects to the standby system relay device 4b in FIG.
  • the relay-side interface 21 outputs the frame received from the standby-system relay device 4 b on the standby-system communication path to the standby-side buffer 22 . Also, the relay-side interface 21 outputs signal arrival information of the received frame to the control unit 30 .
  • the standby buffer 22 is a FIFO type buffer, that is, a queue.
  • the standby-side buffer 22 temporarily stores the frame input from the relay-side interface 21 via the standby-system communication path in order to absorb inter-system delay differences and fluctuations.
  • the node-side interface 23 has a communication circuit and connects to the standby system interface unit of the lower device 3 in FIG.
  • the node-side interface 23 can transmit the frames temporarily stored in the standby-side buffer 22 to the standby-system interface section of the lower-level device 3 .
  • the standby system interface unit 20 can be set with a transmittable timing and a delay difference time by the control unit 30, which will be described later.
  • the timing at which frames can be transmitted arrives at regular intervals.
  • the standby system interface unit 20 can transmit the frames stored in the standby buffer 22 frame by frame each time a transmittable timing at a constant interval arrives. However, if the differential delay time is set, this does not apply until the differential delay time elapses.
  • the standby interface unit 20 stores the The frame is transmitted to the lower device 3 .
  • the standby system interface unit 20 receives the frame stored in the standby buffer 22 at the next transmittable timing after receiving the frame. Send to
  • the control unit 30 receives signal arrival information from the active interface unit 10 .
  • the operational system signal arrival information includes the reception time (first reception time TA) of the frame received by the operational system interface unit 10 .
  • the control unit 30 also receives signal arrival information from the standby system interface unit 20 .
  • the standby system signal arrival information includes the reception time (second reception time TB) of the frame received by the standby system interface unit 20 .
  • the delay difference detection processing 31 detects the first reception time TA of the measurement frame received from the host device 2 via the active communication path and the second reception time TA of the measurement frame received from the host device 2 via the standby communication path. A differential delay time is calculated based on the absolute value of the difference from TB. The delay difference detection processing 31 sets the delay difference time to the interface section that has received the measurement frame first, out of the active interface section 10 and the standby interface section 20 .
  • control unit 30 controls the timing at which frames can be transmitted in the active interface unit 10 and the standby interface unit 20 at regular intervals.
  • control unit 30 may set the buffer size of the interface unit that received the measurement packet earlier as the measured delay difference time increases. For example, when the first reception time TA is earlier than the second reception time TB, the control unit 30 sets the size of the operation buffer 12 larger than that of the standby buffer 22 as the delay difference time increases. When the second reception time TB is earlier than the first reception time TA, the controller 30 sets the size of the standby buffer 22 larger than that of the operation buffer 12 as the delay difference time increases.
  • FIG. 3 is a timing chart for explaining an example in which delay difference and fluctuation absorption processing are applied according to the embodiment.
  • the timing at which frames can be transmitted in the active interface section 10 and the standby interface section 20 is set to a constant interval T.
  • Ta is the reception time of the frame (hereinafter referred to as frame A) received by the active interface unit 10 after the measurement frame.
  • Tb is the reception time of the frame A received by the standby system interface section 20 .
  • X is the differential delay time calculated by the control unit 30 for the measurement frames received before frame A; In FIG. 3 , it is assumed that the delay difference time X is set in the active system interface unit 10 .
  • Y is the transmission waiting time from time Tc to transmittable timing T3.
  • the active interface unit 10 receives frame A and temporarily stores frame A in the active buffer 12 .
  • a delay difference time X is set in the active system interface unit 10 . Therefore, the active interface unit 10 waits until time Tc when the delay difference time X elapses from time Ta. After that, the active interface unit 10 transmits the frame A stored in the active buffer 12 to the lower device 3 at the next transmittable timing T3.
  • the standby system interface unit 20 receives frame A and temporarily stores frame A in the standby buffer 22 .
  • the delay difference time X is not set in the standby system interface section 20 . Therefore, the standby system interface unit transmits the frame A stored in the standby buffer 22 to the lower device 3 at the next transmittable timing T3.
  • the delay adjustment device 1 sets the differential delay time X in the active interface unit 10, and sets the active interface unit 10 and the standby interface unit 20 to transmit possible timings at the constant interval T. By setting, the delay difference and fluctuation can be absorbed.
  • FIG. 4 is a flowchart illustrating delay difference and fluctuation absorption processing executed by the delay adjustment device 1 according to the embodiment.
  • the frame transmittable timings of the active interface unit 10 and the standby interface unit 20 are set at regular intervals.
  • step S100 upon receiving a frame, the active interface section 10 causes the active buffer 12 to temporarily store the frame.
  • step S ⁇ b>101 the active interface unit 10 outputs signal arrival information to the control unit 30 .
  • the signal arrival information includes the frame reception time (first reception time TA).
  • step S200 when the standby system interface unit 20 receives the frame, it temporarily stores the frame in the standby buffer 22.
  • step S ⁇ b>201 the standby system interface unit 20 outputs signal arrival information to the control unit 30 .
  • the signal arrival information includes the frame reception time (second reception time TB).
  • step S300 the control unit 30 calculates the delay difference time (delay amount) based on the absolute value of the difference between the first reception time TA and the second reception time TB.
  • the control unit 30 outputs a command to set no differential delay time to the active interface unit 10 and the standby interface unit 20 in order to temporarily reset the differential delay time set in any of the interface units. do.
  • the active interface unit 10 sets the delay differential time input from the control unit 30 in step S102.
  • the set differential delay time is applied to the process of step S103 from the time the next frame is received.
  • the standby system interface unit 20 sets the delay difference time input from the control unit 30 in step S202.
  • the set differential delay time is applied to the process of step S203 from the time the next frame is received.
  • the processing related to the delay difference time in steps S101, S102, S200, S201, S300, and S301 described above may be executed each time a frame is received, or may be executed in each predetermined cycle. That is, recalculation and resetting of the differential delay time may be performed after a predetermined period of time.
  • step S103 the active system interface unit 10 determines whether or not a differential delay time is set. If the delay difference time is set, the process of step S104 is executed. If the delay difference time is not set, the process of step S105 is executed.
  • step S104 the active interface unit 10 receives the frame stored in the active buffer 12 at the next transmittable timing after the delay differential time has passed since the frame was received. to the lower device 3.
  • step S105 the working system interface unit 10 transmits the frame stored in the working buffer 12 to the lower device 3 at the next transmittable timing after receiving the frame. do.
  • step S203 the standby system interface section 20 determines whether or not a differential delay time is set. If the delay difference time is set, the process of step S204 is executed. If the delay difference time is not set, the process of step S205 is executed.
  • step S204 the standby system interface unit 20 receives the frame stored in the standby buffer 22 at the next transmittable timing after the delay difference time has passed since the frame was received. to the lower device 3.
  • step S205 the standby system interface unit 20 transmits the frame stored in the standby buffer 22 to the lower device 3 at the next transmittable timing after receiving the frame. do.
  • the delay adjustment device 1 is connected between the host device 2 and the relay device 4, the host device 3 functions as a transmitter, and the host device 2 functions as a receiver.
  • the active interface unit 10 is the first transmission/reception unit and the standby interface unit 20 is the second transmission/reception unit.
  • the unit 20 may be used as the first transmitting/receiving unit. That is, either of the two transmission/reception units of the delay adjustment device 1 may be connected to the active system or may be connected to the standby system.
  • the differential delay time is set in the appropriate one of the transmitting/receiving units.
  • the differential delay time calculated based on the difference in signal reception time between the active system and the standby system is fixedly set to the transmitting/receiving unit that receives first, the inter-system delay difference can be absorbed. Also, by controlling the transmittable timing of the frame sent from the buffer at regular intervals, it is possible to absorb fluctuations that occur in a wireless system or the like. High service quality can be ensured by uninterrupted switching between systems by absorbing inter-system delay differences and fluctuations.
  • the delay adjustment device 1 can absorb inter-system delay differences and fluctuations even when two communication paths are configured using arbitrary devices, and can switch between systems without instantaneous interruption. In addition, since it is possible to switch without interruption, it is not necessary to borrow a line from the customer for maintenance work, and maintenance work can be reduced.
  • FIG. 5 is a block diagram showing a hardware configuration example of the delay adjustment device 1 according to the embodiment.
  • the delay adjustment device 1 includes a control device 90 , an active communication circuit 95 and a standby communication circuit 96 .
  • the control device 90 controls the delay adjustment device 1 .
  • the control device 90 includes one or more processors 91 (hereinafter simply referred to as "processors 91") and one or more storage devices 92 (hereinafter simply referred to as “storage devices 92").
  • the processor 91 performs various types of information processing (including the processing of each unit shown in FIG. 2).
  • Processor 91 includes, for example, a CPU.
  • the storage device 92 stores various information necessary for processing by the processor 91 . Examples of the storage device 92 include volatile memory, nonvolatile memory, HDD, SSD, and the like.
  • the functions of the control device 90 are realized by the processor 91 executing a control program, which is a computer program.
  • a control program is stored in the storage device 92 .
  • the control program may be recorded on a computer-readable recording medium.
  • the operation side buffer 12 and the standby side buffer 22 in FIG. 2 may be realized by part of the storage device 92 .
  • the active communication circuit 95 includes the relay side interface 11 and the node side interface 13 of FIG. Note that the active communication circuit 95 may include a storage device that functions as the active buffer 12 in FIG. Standby system communication circuit 96 includes relay side interface 21 and node side interface 23 of FIG. The standby system communication circuit 96 may include a storage device that functions as the standby buffer 22 in FIG.

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Abstract

This delay adjustment device absorbs the inter-system delay difference and fluctuation between lines in two systems to enable inter-system uninterruptible switching. The delay adjustment device is provided with a first transmission/reception unit, a second transmission/reception unit, and a control unit. The control unit controls the transmittable timing of frames of each transmission/reception unit to be a constant interval. The control unit calculates a delay difference time on the basis of the difference between the frame reception times of the transmission/reception units. The control unit sets the delay difference time in the transmission/reception unit that received a frame first. The one transmission/reception unit in which the delay difference time is set transmits the frame, which is stored in a buffer, to a reception device at the next transmittable timing after the delay difference time has elapsed following reception of the frame. The other transmission/reception unit in which the delay difference time is not set transmits the frame, which is stored in a buffer, to the reception device at the next transmittable timing after reception of the frame.

Description

遅延調整装置および冗長回線システムDelay adjusters and redundant line systems
　本開示は、遅延調整装置および冗長回線システムに係り、特に冗長化された通信回線の無瞬断切替を可能とする遅延調整装置および冗長回線システムに関する。 The present disclosure relates to a delay adjustment device and a redundant line system, and more particularly to a delay adjustment device and redundant line system that enable uninterrupted switching of redundant communication lines.
　例えば非特許文献１に開示されるように、無瞬断切替技術が知られている。無瞬断切替技術は、送信装置が冗長化された２つの経路に同じフレームをコピーし、受信装置が到着したフレームをチェックし、正常なフレームを選択し送出することで、伝送路障害時に通信断を発生させない冗長化技術である。 A hitless switching technology is known, for example, as disclosed in Non-Patent Document 1. With hitless switching technology, the sending device copies the same frame to two redundant paths, and the receiving device checks the received frame, selects the normal frame, and sends it out. It is a redundancy technology that does not cause interruptions.
　例えば、専用線サービスにおいて、保守作業等で回線に瞬断が発生する場合には事前にお客様承諾の上、回線借用の手続きが必要となるため、保守者の作業が煩雑になる。また、収容する回線に遠隔医療等の重要な回線が含まれている場合は、回線の瞬断が許容されないため、冗長回線において確実に無瞬断切替が行える必要がある。 For example, in a leased line service, if there is a momentary interruption in the line due to maintenance work, etc., it is necessary to obtain the customer's consent in advance and take procedures to borrow the line, which makes the maintenance work complicated. Further, when an important line for telemedicine or the like is included in the lines to be accommodated, a momentary interruption of the line is not allowed, so it is necessary to reliably perform non-instantaneous interruption switching in the redundant line.
　運用系／待機系間の冗長切替機能を有する上位装置および下位装置は、装置間が運用系回線および待機系回線の２系統で接続されている。運用系回線が光ケーブルなどの有線で構成され、待機系回線が無線システム等の伝送装置で構成された場合においては、系間で大きな遅延差が発生する。また、回線に伝送装置を適用した場合は、伝送装置によるゆらぎ（ジッタ：jitter）が挿入されることになる。ジッタとは遅延時間の変化度合いである。装置間で無瞬断で冗長切替を行うには、系間遅延差およびゆらぎが上限値未満でなくてはならない。瞬断を抑制するために、装置間の系間遅延差およびゆらぎを小さくする仕組みが望まれている。 The upper device and lower device that have a redundant switching function between the operating system and the standby system are connected to each other by two systems, an operating system line and a standby system line. When the active system line is composed of a cable such as an optical cable and the standby system line is composed of a transmission device such as a wireless system, a large delay difference occurs between the systems. Also, when a transmission device is applied to the line, jitter is inserted due to the transmission device. Jitter is the degree of change in delay time. In order to perform redundancy switching between devices without interruption, the inter-system delay difference and fluctuation must be less than the upper limit. In order to suppress instantaneous interruptions, a mechanism is desired that reduces inter-system delay differences and fluctuations between devices.
　本開示は、上述のような課題を解決するためになされたもので、２系統の回線の系間遅延差およびゆらぎを吸収して、系間の無瞬断切替を可能とする遅延調整装置および冗長回線システムを提供することを目的とする。 The present disclosure has been made to solve the above-described problems, and is a delay adjustment device and a An object of the present invention is to provide a redundant line system.
　第１の観点は、遅延調整装置に関連する。
　遅延調整装置は、冗長回線システムに備えられる。冗長回線システムは、送信装置と受信装置との間を第１経路および第２経路の２系統で接続したシステムである。前記第１経路および前記第２経路は同じフレームを伝送する。
　前記遅延調整装置は、前記送信装置と前記受信装置との間を接続する。
　前記遅延調整装置は、第１送受信部と第２送受信部と制御部とを備える。
　第１送受信部は、前記送信装置から前記第１経路を介して受信したフレームを第１バッファに一時的に記憶する。
　第２送受信部は、前記送信装置から前記第２経路を介して受信したフレームを第２バッファに一時的に記憶する。
　制御部は、前記第１送受信部および前記第２送受信部におけるフレームの送信可能タイミングを一定間隔に制御する。
　前記制御部は、前記送信装置から前記第１経路を介して受信した測定フレームの第１受信時刻と前記送信装置から前記第２経路を介して受信した当該測定フレームの第２受信時刻との差に基づいて遅延差時間を計算する。
　前記制御部は、前記第１受信時刻が前記第２受信時刻より早い場合に、前記第１送受信部に前記遅延差時間を設定する。
　前記制御部は、前記第２受信時刻が前記第１受信時刻より早い場合に、前記第２送受信部に前記遅延差時間を設定する。
　前記第１送受信部は、前記遅延差時間が設定されている場合に、フレームを受信してから前記遅延差時間が経過した後の次の送信可能タイミングに前記第１バッファに記憶された当該フレームを前記受信装置へ送信する。
　前記第１送受信部は、前記遅延差時間が設定されていない場合に、フレームを受信した後の次の送信可能タイミングに前記第１バッファに記憶された当該フレームを前記受信装置へ送信する。
　前記第２送受信部は、前記遅延差時間が設定されている場合に、フレームを受信してから前記遅延差時間が経過した後の次の送信可能タイミングに前記第２バッファに記憶された当該フレームを前記受信装置へ送信する。
　前記第２送受信部は、前記遅延差時間が設定されていない場合に、フレームを受信した後の次の送信可能タイミングに前記第２バッファに記憶された当該フレームを前記受信装置へ送信する。 A first aspect relates to the delay adjuster.
A delay adjuster is provided in the redundant line system. A redundant line system is a system in which a transmitting device and a receiving device are connected by two systems, a first path and a second path. The first path and the second path transmit the same frame.
The delay adjusting device connects between the transmitting device and the receiving device.
The delay adjustment device includes a first transceiver, a second transceiver, and a controller.
The first transmission/reception unit temporarily stores frames received from the transmission device via the first path in a first buffer.
The second transmitting/receiving unit temporarily stores frames received from the transmitting device via the second path in a second buffer.
The control unit controls frame transmittable timings in the first transmission/reception unit and the second transmission/reception unit at regular intervals.
The control unit controls the difference between a first reception time of the measurement frame received from the transmission device via the first path and a second reception time of the measurement frame received from the transmission device via the second path. Calculate differential delay time based on
The control unit sets the delay difference time in the first transmission/reception unit when the first reception time is earlier than the second reception time.
The control unit sets the delay difference time in the second transmission/reception unit when the second reception time is earlier than the first reception time.
When the delay difference time is set, the first transmitting/receiving unit stores the frame stored in the first buffer at the next transmittable timing after the delay difference time has passed after the frame is received. to the receiving device.
The first transmitting/receiving unit transmits the frame stored in the first buffer to the receiving device at the next transmittable timing after receiving the frame when the delay difference time is not set.
When the differential delay time is set, the second transmitting/receiving unit stores the frame stored in the second buffer at the next transmittable timing after the differential delay time has elapsed since the frame was received. to the receiving device.
The second transmitting/receiving unit transmits the frame stored in the second buffer to the receiving device at the next transmittable timing after receiving the frame when the delay difference time is not set.
　第２の観点は、第１の観点に加えて、次の特徴を更に有する。
　前記制御部は、前記第１受信時刻が前記第２受信時刻より早い場合に、前記遅延差時間が大きいほど、前記第１バッファのサイズを前記第２バッファに比して大きく設定する。
　前記制御部は、前記第２受信時刻が前記第１受信時刻より早い場合に、前記遅延差時間が大きいほど、前記第２バッファのサイズを前記第１バッファに比して大きく設定する。 The second aspect further has the following features in addition to the first aspect.
When the first reception time is earlier than the second reception time, the controller sets the size of the first buffer larger than that of the second buffer as the delay difference time increases.
When the second reception time is earlier than the first reception time, the controller sets the size of the second buffer larger than that of the first buffer as the delay difference time increases.
　第３の観点は、冗長回線システムに関連する。
　冗長回線システムは、送信装置と受信装置との間を第１経路および第２経路の２系統で接続したシステムである。前記第１経路および前記第２経路は同じフレームを伝送する。
　冗長回線システムは、前記送信装置と前記受信装置との間を接続する遅延調整装置を備える。
　前記遅延調整装置は、第１送受信部と第２送受信部と制御部とを備える。
　第１送受信部は、前記送信装置から前記第１経路を介して受信したフレームを第１バッファに一時的に記憶する。
　第２送受信部は、前記送信装置から前記第２経路を介して受信したフレームを第２バッファに一時的に記憶する。
　制御部は、前記第１送受信部および前記第２送受信部におけるフレームの送信可能タイミングを一定間隔に制御する。
　前記制御部は、前記送信装置から前記第１経路を介して受信した測定フレームの第１受信時刻と前記送信装置から前記第２経路を介して受信した当該測定フレームの第２受信時刻との差に基づいて遅延差時間を計算する。
　前記制御部は、前記第１受信時刻が前記第２受信時刻より早い場合に、前記第１送受信部に前記遅延差時間を設定する。
　前記制御部は、前記第２受信時刻が前記第１受信時刻より早い場合に、前記第２送受信部に前記遅延差時間を設定する。
　前記第１送受信部は、前記遅延差時間が設定されている場合に、フレームを受信してから前記遅延差時間が経過した後の次の送信可能タイミングに前記第１バッファに記憶された当該フレームを前記受信装置へ送信する。
　前記第１送受信部は、前記遅延差時間が設定されていない場合に、フレームを受信した後の次の送信可能タイミングに前記第１バッファに記憶された当該フレームを前記受信装置へ送信する。
　前記第２送受信部は、前記遅延差時間が設定されている場合に、フレームを受信してから前記遅延差時間が経過した後の次の送信可能タイミングに前記第２バッファに記憶された当該フレームを前記受信装置へ送信する。
　前記第２送受信部は、前記遅延差時間が設定されていない場合に、フレームを受信した後の次の送信可能タイミングに前記第２バッファに記憶された当該フレームを前記受信装置へ送信する。 A third aspect relates to redundant line systems.
A redundant line system is a system in which a transmitting device and a receiving device are connected by two systems, a first path and a second path. The first path and the second path transmit the same frame.
A redundant line system comprises a delay adjustment device connecting between the transmitting device and the receiving device.
The delay adjustment device includes a first transceiver, a second transceiver, and a controller.
The first transmission/reception unit temporarily stores frames received from the transmission device via the first path in a first buffer.
The second transmitting/receiving unit temporarily stores frames received from the transmitting device via the second path in a second buffer.
The control unit controls frame transmittable timings in the first transmission/reception unit and the second transmission/reception unit at regular intervals.
The control unit controls the difference between a first reception time of the measurement frame received from the transmission device via the first path and a second reception time of the measurement frame received from the transmission device via the second path. Calculate differential delay time based on
The control unit sets the delay difference time in the first transmission/reception unit when the first reception time is earlier than the second reception time.
The control unit sets the delay difference time in the second transmission/reception unit when the second reception time is earlier than the first reception time.
When the delay difference time is set, the first transmitting/receiving unit stores the frame stored in the first buffer at the next transmittable timing after the delay difference time has passed after the frame is received. to the receiving device.
The first transmitting/receiving unit transmits the frame stored in the first buffer to the receiving device at the next transmittable timing after receiving the frame when the delay difference time is not set.
When the differential delay time is set, the second transmitting/receiving unit stores the frame stored in the second buffer at the next transmittable timing after the differential delay time has elapsed since the frame was received. to the receiving device.
The second transmitting/receiving unit transmits the frame stored in the second buffer to the receiving device at the next transmittable timing after receiving the frame when the delay difference time is not set.
　第４の観点は、第３の観点に加えて、次の特徴を更に有する。
　前記制御部は、前記第１受信時刻が前記第２受信時刻より早い場合に、前記遅延差時間が大きいほど、前記第１バッファのサイズを前記第２バッファに比して大きく設定する。
　前記制御部は、前記第２受信時刻が前記第１受信時刻より早い場合に、前記遅延差時間が大きいほど、前記第２バッファのサイズを前記第１バッファに比して大きく設定する。 The fourth aspect further has the following features in addition to the third aspect.
When the first reception time is earlier than the second reception time, the controller sets the size of the first buffer larger than that of the second buffer as the delay difference time increases.
When the second reception time is earlier than the first reception time, the controller sets the size of the second buffer larger than that of the first buffer as the delay difference time increases.
　本開示によれば、計算された遅延差時間を、２系統の送受信部のうちフレームを先に受信する送受信部に固定的に設定することにより、系間遅延差を吸収することができる。また、バッファから送出されるフレームの送信可能タイミングを一定間隔に制御することにより、無線システム等で発生するゆらぎを吸収することができる。系間遅延差およびゆらぎを吸収することで、系間の無瞬断切替による高いサービス品質を担保できる。本開示によれば、２系統の通信経路が任意の装置を使用して構成された場合でも、系間遅延差およびゆらぎを吸収でき、系間の無瞬断切替が可能である。 According to the present disclosure, inter-system delay difference can be absorbed by fixedly setting the calculated delay difference time to the transmitting/receiving unit that receives the frame first among the two transmitting/receiving units. Also, by controlling the transmittable timing of the frame sent from the buffer at regular intervals, it is possible to absorb fluctuations that occur in a wireless system or the like. High service quality can be ensured by uninterrupted switching between systems by absorbing inter-system delay differences and fluctuations. According to the present disclosure, even when two communication paths are configured using arbitrary devices, inter-system delay differences and fluctuations can be absorbed, and instantaneous switching between systems is possible.
実施の形態に係る冗長回線システムの構成例を説明するための図である。1 is a diagram for explaining a configuration example of a redundant line system according to an embodiment; FIG. 実施の形態に係る遅延調整装置が有する機能の概要を例示するブロック図である。3 is a block diagram illustrating an overview of functions of the delay adjustment device according to the embodiment; FIG. 実施の形態に係る、遅延差およびゆらぎ吸収処理が適用された例を説明するためのタイミングチャートである。9 is a timing chart for explaining an example in which delay difference and fluctuation absorption processing are applied according to the embodiment; 実施の形態に係る遅延調整装置１が実行する遅延差およびゆらぎ吸収処理を例示するフローチャートである。7 is a flowchart illustrating delay difference and fluctuation absorption processing executed by the delay adjustment device 1 according to the embodiment; 実施の形態に係る遅延調整装置１のハードウェア構成例を示すブロック図である。2 is a block diagram showing a hardware configuration example of the delay adjustment device 1 according to the embodiment; FIG.
　以下、図面を参照して本発明の実施の形態について詳細に説明する。尚、各図において共通する要素には、同一の符号を付して重複する説明を省略する。 Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Elements that are common in each drawing are denoted by the same reference numerals, and overlapping descriptions are omitted.
実施の形態１．
１．冗長回線システム
　図１は、実施の形態に係る冗長回線システムの構成例を説明するための図である。
　図１に示す冗長回線システムは、遅延調整装置１、上位装置２、下位装置３、中継装置４（運用系中継装置４ａ、待機系中継装置４ｂ）を備える。以下の説明では、遅延調整装置１の適用に関して、上位装置２から下位装置３への下り方向の信号の流れを例に説明する。この場合、上位装置２は送信装置、下位装置３は受信装置として機能する。 Embodiment 1.
1. 1. Redundant Line System FIG. 1 is a diagram for explaining a configuration example of a redundant line system according to an embodiment.
The redundant line system shown in FIG. 1 includes a delay adjustment device 1, a host device 2, a subordinate device 3, and a repeater 4 (an active repeater 4a and a standby repeater 4b). In the following description, the application of the delay adjustment device 1 will be described with an example of the downstream signal flow from the upper device 2 to the lower device 3 . In this case, the upper device 2 functions as a transmitting device, and the lower device 3 functions as a receiving device.
　冗長回線システムは、上位装置２と下位装置３との間を運用系通信経路（第１経路）および待機系通信経路（第２経路）の２系統で接続する。送信装置としての上位装置２においてコピーされた同じフレームは、冗長化された２つの経路を介して、受信装置としての下位装置３まで伝送される。伝送方式は例えばイーサネット（登録商標）である。上位装置２および下位装置３は、運用／待機系間の冗長切替機能を有する。 The redundant line system connects the upper device 2 and the lower device 3 with two systems, an active communication path (first path) and a standby communication path (second path). The same frame copied in the upper device 2 as a transmitter is transmitted to the lower device 3 as a receiver via two redundant routes. The transmission method is, for example, Ethernet (registered trademark). The upper device 2 and the lower device 3 have a redundancy switching function between operation/standby systems.
　中継装置４は、例えば、有線の光ケーブルや、無線の伝送装置で構成される。一例として、運用系通信経路は、光ケーブルを有する１つ以上の運用系中継装置４ａで構成されている。待機系通信経路は、無線システム等の伝送装置を有する１つ以上の待機系中継装置４ｂで構成されている。経路長や設備の異なる経路においては、経路間で大きな遅延差が発生しうる。また、冗長回線に伝送装置を適用した場合は、伝送装置のゆらぎが挿入される。 The relay device 4 is composed of, for example, a wired optical cable or a wireless transmission device. As an example, the active communication path is composed of one or more active relay devices 4a having optical cables. The standby communication path is composed of one or more standby relay devices 4b having transmission devices such as wireless systems. A large delay difference may occur between routes on routes with different route lengths and facilities. Also, when a transmission device is applied to a redundant line, fluctuations of the transmission device are inserted.
　遅延調整装置１は、系間遅延差およびゆらぎを吸収するための装置である。図１に示す遅延調整装置１は、中継装置４と下位装置３との間、すなわち受信装置の直上流に接続されている。このように配置された遅延調整装置１は、運用系中継装置４ａおよび待機系中継装置４ｂの２系統からそれぞれ送信されたフレームの系間遅延差およびゆらぎを吸収して、下位装置３の運用系インタフェース部および待機系インタフェース部へ送信する。 The delay adjustment device 1 is a device for absorbing inter-system delay differences and fluctuations. The delay adjustment device 1 shown in FIG. 1 is connected between the relay device 4 and the lower device 3, that is, directly upstream of the receiving device. The delay adjustment device 1 arranged in this way absorbs the inter-system delay difference and fluctuations of the frames transmitted from the two systems of the active relay device 4a and the standby relay device 4b, respectively. Send to the interface unit and the standby system interface unit.
２．遅延調整装置の機能概要
　図２は、実施の形態に係る遅延調整装置１が有する機能の概要を例示するブロック図である。 2. Functional Overview of Delay Adjustment Apparatus FIG. 2 is a block diagram illustrating an overview of the functions of the delay adjustment apparatus 1 according to the embodiment.
　遅延調整装置１は、系間遅延差およびゆらぎ（ジッタ）を吸収することにより、上位装置２および下位装置３による運用系と待機系との間の無瞬断切替を可能とする。遅延調整装置１は、運用系インタフェース部１０（第１送受信部）と、待機系インタフェース部２０（第２送受信部）と、制御部３０とを備える。 The delay adjustment device 1 absorbs the inter-system delay difference and fluctuation (jitter), thereby enabling the high-level device 2 and the low-level device 3 to switch between the active system and the standby system without interruption. The delay adjustment device 1 includes an active interface section 10 (first transmission/reception section), a standby interface section 20 (second transmission/reception section), and a control section 30 .
２－１．運用系インタフェース部
　運用系インタフェース部１０は、中継側インタフェース１１、運用側バッファ１２（第１バッファ）、ノード側インタフェース１３を備える。 2-1. Working System Interface Section The working system interface section 10 includes a relay side interface 11 , a working side buffer 12 (first buffer), and a node side interface 13 .
　中継側インタフェース１１は、通信回路を有し、図１の運用系中継装置４ａに接続する。中継側インタフェース１１は、運用系通信経路の運用系中継装置４ａから受信したフレームを運用側バッファ１２へ出力する。また、中継側インタフェース１１は、受信したフレームの信号到達情報を制御部３０へ出力する。 The relay-side interface 11 has a communication circuit and connects to the active relay device 4a in FIG. The relay-side interface 11 outputs the frame received from the active-system relay device 4 a on the active-system communication path to the active-side buffer 12 . Also, the relay-side interface 11 outputs signal arrival information of the received frame to the control unit 30 .
　運用側バッファ１２は、ＦＩＦＯ型のバッファ、すなわちキューである。運用側バッファ１２は、系間遅延差とゆらぎを吸収するために、運用系通信経路を介して中継側インタフェース１１から入力したフレームを一時的に記憶する。 The operation-side buffer 12 is a FIFO type buffer, that is, a queue. The working-side buffer 12 temporarily stores frames input from the relay-side interface 11 via the working-system communication path in order to absorb inter-system delay differences and fluctuations.
　ノード側インタフェース１３は、通信回路を有し、図１の下位装置３の運用系インタフェース部に接続する。ノード側インタフェース１３は、運用側バッファ１２に一時的に記憶されたフレームを下位装置３の運用系インタフェース部へ送信可能である。 The node-side interface 13 has a communication circuit and connects to the active system interface section of the lower device 3 in FIG. The node-side interface 13 can transmit the frames temporarily stored in the operation-side buffer 12 to the operation system interface section of the lower device 3 .
　運用系インタフェース部１０には、後述する制御部３０により送信可能タイミングおよび遅延差時間が設定されうる。フレームを送信可能なタイミングは一定間隔で到来する。運用系インタフェース部１０は、運用側バッファ１２に記憶されたフレームを、一定間隔の送信可能タイミングが到来するたびにフレーム単位で送信可能である。ただし、遅延差時間が設定されている場合、遅延差時間が経過するまではこの限りではない。 A transmission possible timing and a delay difference time can be set in the active interface unit 10 by the control unit 30, which will be described later. The timing at which frames can be transmitted arrives at regular intervals. The active interface unit 10 can transmit the frames stored in the active buffer 12 frame by frame each time a transmittable timing at a constant interval arrives. However, if the differential delay time is set, this does not apply until the differential delay time elapses.
　運用系インタフェース部１０は、遅延差時間が設定されている場合に、フレームを受信してから遅延差時間が経過した後、その次に到来する送信可能タイミングで、運用側バッファ１２に記憶された当該フレームを下位装置３へ送信する。また、運用系インタフェース部１０は、遅延差時間が設定されていない場合に、フレームを受信した後、その次に到来する送信可能タイミングで、運用側バッファ１２に記憶された当該フレームを下位装置３へ送信する。 When the differential delay time is set, the active interface unit 10 stores the The frame is transmitted to the lower device 3 . Further, when the differential delay time is not set, the active system interface unit 10, after receiving the frame, transmits the frame stored in the active buffer 12 to the lower device 3 at the next transmittable timing. Send to
２－２．待機系インタフェース部
　待機系インタフェース部２０は、運用系インタフェース部１０と同等の構成を有する。待機系インタフェース部２０は、中継側インタフェース２１、待機側バッファ２２（第２バッファ）、ノード側インタフェース２３を備える。 2-2. Standby Interface Unit The standby interface unit 20 has the same configuration as the active interface unit 10 . The standby system interface unit 20 includes a relay side interface 21 , a standby side buffer 22 (second buffer), and a node side interface 23 .
　中継側インタフェース２１は、通信回路を有し、図１の待機系中継装置４ｂに接続する。中継側インタフェース２１は、待機系通信経路の待機系中継装置４ｂから受信したフレームを待機側バッファ２２へ出力する。また、中継側インタフェース２１は、受信したフレームの信号到達情報を制御部３０へ出力する。 The relay side interface 21 has a communication circuit and connects to the standby system relay device 4b in FIG. The relay-side interface 21 outputs the frame received from the standby-system relay device 4 b on the standby-system communication path to the standby-side buffer 22 . Also, the relay-side interface 21 outputs signal arrival information of the received frame to the control unit 30 .
　待機側バッファ２２は、ＦＩＦＯ型のバッファ、すなわちキューである。待機側バッファ２２は、系間遅延差とゆらぎを吸収するために、待機系通信経路を介して中継側インタフェース２１から入力したフレームを一時的に記憶する。 The standby buffer 22 is a FIFO type buffer, that is, a queue. The standby-side buffer 22 temporarily stores the frame input from the relay-side interface 21 via the standby-system communication path in order to absorb inter-system delay differences and fluctuations.
　ノード側インタフェース２３は、通信回路を有し、図１の下位装置３の待機系インタフェース部に接続する。ノード側インタフェース２３は、待機側バッファ２２に一時的に記憶されたフレームを下位装置３の待機系インタフェース部へ送信可能である。 The node-side interface 23 has a communication circuit and connects to the standby system interface unit of the lower device 3 in FIG. The node-side interface 23 can transmit the frames temporarily stored in the standby-side buffer 22 to the standby-system interface section of the lower-level device 3 .
　待機系インタフェース部２０には、後述する制御部３０により送信可能タイミングおよび遅延差時間が設定されうる。フレームを送信可能なタイミングは一定間隔で到来する。待機系インタフェース部２０は、待機側バッファ２２に記憶されたフレームを、一定間隔の送信可能タイミングが到来するたびにフレーム単位で送信可能である。ただし、遅延差時間が設定されている場合、遅延差時間が経過するまではこの限りではない。 The standby system interface unit 20 can be set with a transmittable timing and a delay difference time by the control unit 30, which will be described later. The timing at which frames can be transmitted arrives at regular intervals. The standby system interface unit 20 can transmit the frames stored in the standby buffer 22 frame by frame each time a transmittable timing at a constant interval arrives. However, if the differential delay time is set, this does not apply until the differential delay time elapses.
　待機系インタフェース部２０は、遅延差時間が設定されている場合に、フレームを受信してから遅延差時間が経過した後、その次に到来する送信可能タイミングで、待機側バッファ２２に記憶された当該フレームを下位装置３へ送信する。また、待機系インタフェース部２０は、遅延差時間が設定されていない場合に、フレームを受信した後、その次に到来する送信可能タイミングで、待機側バッファ２２に記憶された当該フレームを下位装置３へ送信する。 When the differential delay time is set, the standby interface unit 20 stores the The frame is transmitted to the lower device 3 . In addition, when the delay difference time is not set, the standby system interface unit 20 receives the frame stored in the standby buffer 22 at the next transmittable timing after receiving the frame. Send to
２－３．制御部
　制御部３０は、運用系インタフェース部１０から信号到達情報を入力する。運用系の信号到達情報は、運用系インタフェース部１０が受信したフレームの受信時刻（第１受信時刻ＴＡ）を含む。また、制御部３０は、待機系インタフェース部２０から信号到達情報を入力する。待機系の信号到達情報は、待機系インタフェース部２０が受信したフレームの受信時刻（第２受信時刻ＴＢ）を含む。 2-3. Control Unit The control unit 30 receives signal arrival information from the active interface unit 10 . The operational system signal arrival information includes the reception time (first reception time TA) of the frame received by the operational system interface unit 10 . The control unit 30 also receives signal arrival information from the standby system interface unit 20 . The standby system signal arrival information includes the reception time (second reception time TB) of the frame received by the standby system interface unit 20 .
　便宜的に、遅延差検出処理３１の対象となるフレームを測定フレームと称する。遅延差検出処理３１は、上位装置２から運用系通信経路を介して受信した測定フレームの第１受信時刻ＴＡと上位装置２から待機系通信経路を介して受信した当該測定フレームの第２受信時刻ＴＢとの差の絶対値に基づいて遅延差時間を計算する。遅延差検出処理３１は、運用系インタフェース部１０および待機系インタフェース部２０のうち、測定フレームを先に受信したインタフェース部に遅延差時間を設定する。 For convenience, the frame targeted for the delay difference detection process 31 will be referred to as a measurement frame. The delay difference detection processing 31 detects the first reception time TA of the measurement frame received from the host device 2 via the active communication path and the second reception time TA of the measurement frame received from the host device 2 via the standby communication path. A differential delay time is calculated based on the absolute value of the difference from TB. The delay difference detection processing 31 sets the delay difference time to the interface section that has received the measurement frame first, out of the active interface section 10 and the standby interface section 20 .
　また、制御部３０は、運用系インタフェース部１０および待機系インタフェース部２０におけるフレームの送信可能タイミングを一定間隔に制御する。 In addition, the control unit 30 controls the timing at which frames can be transmitted in the active interface unit 10 and the standby interface unit 20 at regular intervals.
　また、制御部３０は、測定した遅延差時間が大きいほど先に測定パケットを受信したインタフェース部のバッファサイズを大きく設定してもよい。例えば、制御部３０は、第１受信時刻ＴＡが第２受信時刻ＴＢより早い場合に、遅延差時間が大きいほど、運用側バッファ１２のサイズを待機側バッファ２２に比して大きく設定する。制御部３０は、第２受信時刻ＴＢが第１受信時刻ＴＡより早い場合に、遅延差時間が大きいほど、待機側バッファ２２のサイズを運用側バッファ１２に比して大きく設定する。 Also, the control unit 30 may set the buffer size of the interface unit that received the measurement packet earlier as the measured delay difference time increases. For example, when the first reception time TA is earlier than the second reception time TB, the control unit 30 sets the size of the operation buffer 12 larger than that of the standby buffer 22 as the delay difference time increases. When the second reception time TB is earlier than the first reception time TA, the controller 30 sets the size of the standby buffer 22 larger than that of the operation buffer 12 as the delay difference time increases.
３．遅延差およびゆらぎ吸収処理
３－１．具体例
　図３は、実施の形態に係る、遅延差およびゆらぎ吸収処理が適用された例を説明するためのタイミングチャートである。 3. Delay difference and fluctuation absorption processing 3-1. Specific Example FIG. 3 is a timing chart for explaining an example in which delay difference and fluctuation absorption processing are applied according to the embodiment.
　図３において、運用系インタフェース部１０および待機系インタフェース部２０におけるフレームの送信可能タイミングは一定間隔Ｔに設定されている。Ｔａは、運用系インタフェース部１０が、測定フレーム以降に受信したフレーム（以下、フレームＡという）の受信時刻である。Ｔｂは、待機系インタフェース部２０が受信したフレームＡの受信時刻である。Ｘは、フレームＡよりも前に受信された測定フレームについて制御部３０により計算された遅延差時間である。図３では、遅延差時間Ｘは、運用系インタフェース部１０に設定されているものとする。Ｙは、時刻Ｔｃから送信可能タイミングＴ３までの送信待ち時間である。 　In FIG. 3, the timing at which frames can be transmitted in the active interface section 10 and the standby interface section 20 is set to a constant interval T. Ta is the reception time of the frame (hereinafter referred to as frame A) received by the active interface unit 10 after the measurement frame. Tb is the reception time of the frame A received by the standby system interface section 20 . X is the differential delay time calculated by the control unit 30 for the measurement frames received before frame A; In FIG. 3 , it is assumed that the delay difference time X is set in the active system interface unit 10 . Y is the transmission waiting time from time Tc to transmittable timing T3.
　時刻Ｔａにおいて、運用系インタフェース部１０は、フレームＡを受信し、フレームＡを運用側バッファ１２に一時的に記憶させる。運用系インタフェース部１０には遅延差時間Ｘが設定されている。そのため、運用系インタフェース部１０は、時刻Ｔａから遅延差時間Ｘが経過する時刻Ｔｃまで待つ。その後、運用系インタフェース部１０は、次の送信可能タイミングＴ３において、運用側バッファ１２に記憶されたフレームＡを下位装置３へ送信する。 At time Ta, the active interface unit 10 receives frame A and temporarily stores frame A in the active buffer 12 . A delay difference time X is set in the active system interface unit 10 . Therefore, the active interface unit 10 waits until time Tc when the delay difference time X elapses from time Ta. After that, the active interface unit 10 transmits the frame A stored in the active buffer 12 to the lower device 3 at the next transmittable timing T3.
　時刻Ｔｂにおいて、待機系インタフェース部２０は、フレームＡを受信し、フレームＡを待機側バッファ２２に一時的に記憶させる。待機系インタフェース部２０には遅延差時間Ｘが設定されていない。そのため、待機系インタフェース部は、次の送信可能タイミングＴ３において、待機側バッファ２２に記憶されたフレームＡを下位装置３へ送信する。 At time Tb, the standby system interface unit 20 receives frame A and temporarily stores frame A in the standby buffer 22 . The delay difference time X is not set in the standby system interface section 20 . Therefore, the standby system interface unit transmits the frame A stored in the standby buffer 22 to the lower device 3 at the next transmittable timing T3.
　このように、図３の例では、遅延調整装置１は、運用系インタフェース部１０に遅延差時間Ｘを設定し、運用系インタフェース部１０および待機系インタフェース部２０に一定間隔Ｔの送信可能タイミングを設定することで、遅延差およびゆらぎを吸収することができる。 Thus, in the example of FIG. 3, the delay adjustment device 1 sets the differential delay time X in the active interface unit 10, and sets the active interface unit 10 and the standby interface unit 20 to transmit possible timings at the constant interval T. By setting, the delay difference and fluctuation can be absorbed.
３－２．フローチャートの例
　図４は、実施の形態に係る遅延調整装置１が実行する遅延差およびゆらぎ吸収処理を例示するフローチャートである。なお、運用系インタフェース部１０および待機系インタフェース部２０におけるフレームの送信可能タイミングは一定間隔に設定されている。 3-2. Example of Flowchart FIG. 4 is a flowchart illustrating delay difference and fluctuation absorption processing executed by the delay adjustment device 1 according to the embodiment. The frame transmittable timings of the active interface unit 10 and the standby interface unit 20 are set at regular intervals.
　ステップＳ１００において、運用系インタフェース部１０は、フレームを受信すると、運用側バッファ１２にフレームを一時的に記憶させる。 In step S100, upon receiving a frame, the active interface section 10 causes the active buffer 12 to temporarily store the frame.
　ステップＳ１０１において、運用系インタフェース部１０は、信号到達情報を制御部３０へ出力する。信号到達情報は、フレームの受信時刻（第１受信時刻ＴＡ）を含む。 In step S<b>101 , the active interface unit 10 outputs signal arrival information to the control unit 30 . The signal arrival information includes the frame reception time (first reception time TA).
　ステップＳ２００において、待機系インタフェース部２０は、フレームを受信すると、待機側バッファ２２にフレームを一時的に記憶させる。 In step S200, when the standby system interface unit 20 receives the frame, it temporarily stores the frame in the standby buffer 22.
　ステップＳ２０１において、待機系インタフェース部２０は、信号到達情報を制御部３０へ出力する。信号到達情報は、フレームの受信時刻（第２受信時刻ＴＢ）を含む。 In step S<b>201 , the standby system interface unit 20 outputs signal arrival information to the control unit 30 . The signal arrival information includes the frame reception time (second reception time TB).
　ステップＳ３００において、制御部３０は、第１受信時刻ＴＡと第２受信時刻ＴＢとの差の絶対値に基づいて遅延差時間（遅延量）を計算する。また、制御部３０は、いずれかのインタフェース部に設定されている遅延差時間を一旦リセットするために、運用系インタフェース部１０および待機系インタフェース部２０へ遅延差時間を非設定にする命令を出力する。 In step S300, the control unit 30 calculates the delay difference time (delay amount) based on the absolute value of the difference between the first reception time TA and the second reception time TB. In addition, the control unit 30 outputs a command to set no differential delay time to the active interface unit 10 and the standby interface unit 20 in order to temporarily reset the differential delay time set in any of the interface units. do.
　ステップＳ３０１において、制御部３０は、第１受信時刻ＴＡと第２受信時刻ＴＢとを比較する。ＴＡ＜ＴＢの場合に、制御部３０は、遅延差時間を運用系インタフェース部１０へ出力する。ＴＡ＞ＴＢの場合に、制御部３０は、遅延差時間を待機系インタフェース部２０へ出力する。なお、ＴＡ＝ＴＢの場合は、遅延差時間は０なので遅延差時間を出力する必要はない。 In step S301, the control unit 30 compares the first reception time TA and the second reception time TB. If TA<TB, the control unit 30 outputs the differential delay time to the active system interface unit 10 . If TA>TB, the control unit 30 outputs the differential delay time to the standby system interface unit 20 . When TA=TB, the differential delay time is 0, so there is no need to output the differential delay time.
　ＴＡ＜ＴＢの場合、ステップＳ１０２において、運用系インタフェース部１０は、制御部３０から入力した遅延差時間を設定する。設定された遅延差時間は、次のフレームを受信したときからステップＳ１０３の処理に適用される。 If TA<TB, the active interface unit 10 sets the delay differential time input from the control unit 30 in step S102. The set differential delay time is applied to the process of step S103 from the time the next frame is received.
　ＴＡ＞ＴＢの場合、ステップＳ２０２において、待機系インタフェース部２０は、制御部３０から入力した遅延差時間を設定する。設定された遅延差時間は、次のフレームを受信したときからステップＳ２０３の処理に適用される。 If TA>TB, the standby system interface unit 20 sets the delay difference time input from the control unit 30 in step S202. The set differential delay time is applied to the process of step S203 from the time the next frame is received.
　ところで、上述したステップＳ１０１、Ｓ１０２、Ｓ２００、S２０１、Ｓ３００、Ｓ３０１による遅延差時間に関する処理は、フレームを受信する度に実行されてもよいが、所定のサイクル毎に実行されてもよい。すなわち遅延差時間の再計算および再設定は所定期間後に実行されてもよい。 By the way, the processing related to the delay difference time in steps S101, S102, S200, S201, S300, and S301 described above may be executed each time a frame is received, or may be executed in each predetermined cycle. That is, recalculation and resetting of the differential delay time may be performed after a predetermined period of time.
　ステップＳ１００に戻り説明を続ける。上述したステップＳ１００においてフレームを受信後、ステップＳ１０３の処理が実行される。ステップＳ１０３において、運用系インタフェース部１０は、遅延差時間が設定されているか否かを判定する。遅延差時間が設定されている場合はステップＳ１０４の処理が実行される。遅延差時間が設定されていない場合はステップＳ１０５の処理が実行される。 Return to step S100 and continue the explanation. After receiving the frame in step S100 described above, the process of step S103 is executed. In step S103, the active system interface unit 10 determines whether or not a differential delay time is set. If the delay difference time is set, the process of step S104 is executed. If the delay difference time is not set, the process of step S105 is executed.
　遅延差時間が設定されている場合、ステップＳ１０４において、運用系インタフェース部１０は、フレームを受信してから遅延差時間が経過した後の次の送信可能タイミングに運用側バッファ１２に記憶されたフレームを下位装置３へ送信する。 If the differential delay time is set, in step S104, the active interface unit 10 receives the frame stored in the active buffer 12 at the next transmittable timing after the delay differential time has passed since the frame was received. to the lower device 3.
　一方、遅延差時間が設定されていない場合、ステップＳ１０５において、運用系インタフェース部１０は、フレームを受信した後の次の送信可能タイミングに運用側バッファ１２に記憶されたフレームを下位装置３へ送信する。 On the other hand, if the delay difference time is not set, in step S105, the working system interface unit 10 transmits the frame stored in the working buffer 12 to the lower device 3 at the next transmittable timing after receiving the frame. do.
　ステップＳ２００に戻り説明を続ける。上述したステップＳ２００においてフレームを受信後、ステップＳ２０３の処理が実行される。ステップＳ２０３において、待機系インタフェース部２０は、遅延差時間が設定されているか否かを判定する。遅延差時間が設定されている場合はステップＳ２０４の処理が実行される。遅延差時間が設定されていない場合はステップＳ２０５の処理が実行される。 Return to step S200 to continue the explanation. After receiving the frame in step S200 described above, the process of step S203 is executed. In step S203, the standby system interface section 20 determines whether or not a differential delay time is set. If the delay difference time is set, the process of step S204 is executed. If the delay difference time is not set, the process of step S205 is executed.
　遅延差時間が設定されている場合、ステップＳ２０４において、待機系インタフェース部２０は、フレームを受信してから遅延差時間が経過した後の次の送信可能タイミングに待機側バッファ２２に記憶されたフレームを下位装置３へ送信する。 If the delay difference time is set, in step S204, the standby system interface unit 20 receives the frame stored in the standby buffer 22 at the next transmittable timing after the delay difference time has passed since the frame was received. to the lower device 3.
　一方、遅延差時間が設定されていない場合、ステップＳ２０５において、待機系インタフェース部２０は、フレームを受信した後の次の送信可能タイミングに待機側バッファ２２に記憶されたフレームを下位装置３へ送信する。 On the other hand, if the delay difference time is not set, in step S205, the standby system interface unit 20 transmits the frame stored in the standby buffer 22 to the lower device 3 at the next transmittable timing after receiving the frame. do.
４．変形例
　ところで、上述した実施の形態では、上位装置２から下位装置３への下り方向の信号に対する遅延調整装置１の適用について説明したが、遅延調整装置１は下位装置３から上位装置２への上り方向の信号に対しても適用可能である。この場合、遅延調整装置１は、上位装置２と中継装置４との間に接続され、下位装置３は送信装置、上位装置２は受信装置として機能する。 4. MODIFICATIONS By the way, in the above-described embodiment, the application of the delay adjustment device 1 to the downlink signal from the higher-level device 2 to the lower-level device 3 has been described. It is also applicable to upstream signals. In this case, the delay adjustment device 1 is connected between the host device 2 and the relay device 4, the host device 3 functions as a transmitter, and the host device 2 functions as a receiver.
　また、上述した実施の形態では、運用系インタフェース部１０を第１送受信部とし、待機系インタフェース部２０を第２送受信部としているが、運用系インタフェース部１０を第２送受信部とし、待機系インタフェース部２０を第１送受信部としてもよい。すなわち、遅延調整装置１が有する２系統の送受信部のどちらを運用系に接続してもよいし、待機系に接続してもよい。遅延差時間は、適切な一方の送受信部に設定される。 Further, in the above-described embodiment, the active interface unit 10 is the first transmission/reception unit and the standby interface unit 20 is the second transmission/reception unit. The unit 20 may be used as the first transmitting/receiving unit. That is, either of the two transmission/reception units of the delay adjustment device 1 may be connected to the active system or may be connected to the standby system. The differential delay time is set in the appropriate one of the transmitting/receiving units.
５．効果
　以上説明したように、本実施の形態に係る冗長回線システムによれば、運用系および待機系の信号受信時刻の差に基づいて計算された遅延差時間を、２系統の送受信部のうちフレームを先に受信する送受信部に固定的に設定することにより、系間遅延差を吸収することができる。また、バッファから送出されるフレームの送信可能タイミングを一定間隔に制御することにより、無線システム等で発生するゆらぎを吸収することができる。系間遅延差およびゆらぎを吸収することで、系間の無瞬断切替による高いサービス品質を担保できる。遅延調整装置１は、２系統の通信経路が任意の装置を使用して構成された場合でも、系間遅延差およびゆらぎを吸収でき、系間の無瞬断切替が可能である。また、無瞬断切替が可能であるため、保守作業においてお客様に対する回線借用が不要であり保守稼働の低減が図れる。 5. Effect As described above, according to the redundant line system according to the present embodiment, the differential delay time calculated based on the difference in signal reception time between the active system and the standby system is is fixedly set to the transmitting/receiving unit that receives first, the inter-system delay difference can be absorbed. Also, by controlling the transmittable timing of the frame sent from the buffer at regular intervals, it is possible to absorb fluctuations that occur in a wireless system or the like. High service quality can be ensured by uninterrupted switching between systems by absorbing inter-system delay differences and fluctuations. The delay adjustment device 1 can absorb inter-system delay differences and fluctuations even when two communication paths are configured using arbitrary devices, and can switch between systems without instantaneous interruption. In addition, since it is possible to switch without interruption, it is not necessary to borrow a line from the customer for maintenance work, and maintenance work can be reduced.
６．ハードウェア構成例
　図５は、実施の形態に係る遅延調整装置１のハードウェア構成例を示すブロック図である。遅延調整装置１は、制御装置９０、運用系通信回路９５、待機系通信回路９６を含む。 6. Hardware Configuration Example FIG. 5 is a block diagram showing a hardware configuration example of the delay adjustment device 1 according to the embodiment. The delay adjustment device 1 includes a control device 90 , an active communication circuit 95 and a standby communication circuit 96 .
　制御装置９０は、遅延調整装置１の制御を行う。例えば、制御装置９０は、１又は複数のプロセッサ９１（以下、単に「プロセッサ９１」と呼ぶ）及び１又は複数の記憶装置９２（以下、単に「記憶装置９２」と呼ぶ）を含む。プロセッサ９１は、各種情報処理（図２に示す各部の処理を含む）を行う。プロセッサ９１は、例えばＣＰＵを含む。記憶装置９２は、プロセッサ９１による処理に必要な各種情報を格納する。記憶装置９２としては、揮発性メモリ、不揮発性メモリ、ＨＤＤ、ＳＳＤ、等が例示される。プロセッサ９１が、コンピュータプログラムである制御プログラムを実行することにより、制御装置９０の機能が実現される。制御プログラムは、記憶装置９２に格納される。制御プログラムは、コンピュータが読み取り可能な記録媒体に記録されてもよい。図２の運用側バッファ１２および待機側バッファ２２は、記憶装置９２の一部により実現されてもよい。 The control device 90 controls the delay adjustment device 1 . For example, the control device 90 includes one or more processors 91 (hereinafter simply referred to as "processors 91") and one or more storage devices 92 (hereinafter simply referred to as "storage devices 92"). The processor 91 performs various types of information processing (including the processing of each unit shown in FIG. 2). Processor 91 includes, for example, a CPU. The storage device 92 stores various information necessary for processing by the processor 91 . Examples of the storage device 92 include volatile memory, nonvolatile memory, HDD, SSD, and the like. The functions of the control device 90 are realized by the processor 91 executing a control program, which is a computer program. A control program is stored in the storage device 92 . The control program may be recorded on a computer-readable recording medium. The operation side buffer 12 and the standby side buffer 22 in FIG. 2 may be realized by part of the storage device 92 .
　運用系通信回路９５は、図２の中継側インタフェース１１およびノード側インタフェース１３を含む。なお、運用系通信回路９５は、図２の運用側バッファ１２として機能する記憶装置を備えてもよい。待機系通信回路９６は、図２の中継側インタフェース２１およびノード側インタフェース２３を含む。なお、待機系通信回路９６は、図２の待機側バッファ２２として機能する記憶装置を備えてもよい。 The active communication circuit 95 includes the relay side interface 11 and the node side interface 13 of FIG. Note that the active communication circuit 95 may include a storage device that functions as the active buffer 12 in FIG. Standby system communication circuit 96 includes relay side interface 21 and node side interface 23 of FIG. The standby system communication circuit 96 may include a storage device that functions as the standby buffer 22 in FIG.
　以上、本発明の実施の形態について説明したが、本発明は、上記の実施の形態に限定されるものではなく、本発明の趣旨を逸脱しない範囲で種々変形して実施することができる。上述した実施の形態において各要素の個数、数量、量、範囲等の数に言及した場合、特に明示した場合や原理的に明らかにその数に特定される場合を除いて、その言及した数にこの発明が限定されるものではない。また、上述した実施の形態において説明する構造等は、特に明示した場合や明らかに原理的にそれに特定される場合を除いて、この発明に必ずしも必須のものではない。 Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the scope of the present invention. When referring to numbers such as the number, quantity, amount, range, etc. of each element in the above-described embodiments, unless otherwise specified or clearly specified in principle, the number referred to The invention is not limited. Also, the structures and the like described in the above-described embodiments are not necessarily essential to the present invention unless otherwise specified or clearly specified in principle.
１　遅延調整装置
２　上位装置
３　下位装置
４　中継装置
４ａ　運用系中継装置
４ｂ　待機系中継装置
１０　運用系インタフェース部
１１　中継側インタフェース
１２　運用側バッファ
１３　ノード側インタフェース
２０　待機系インタフェース部
２１　中継側インタフェース
２２　待機側バッファ
２３　ノード側インタフェース
３０　制御部
３１　遅延差検出処理
９０　制御装置
９１　プロセッサ
９２　記憶装置
９５　運用系通信回路
９６　待機系通信回路 1 Delay adjustment device 2 Upper device 3 Lower device 4 Relay device 4a Active relay device 4b Standby relay device 10 Active interface unit 11 Relay interface 12 Operation buffer 13 Node interface 20 Standby interface 21 Relay interface 22 standby-side buffer 23 node-side interface 30 control unit 31 delay difference detection processing 90 control device 91 processor 92 storage device 95 active communication circuit 96 standby communication circuit

Claims (4)

  1. 　送信装置と受信装置との間を第１経路および第２経路の２系統で接続し、前記第１経路および前記第２経路は同じフレームを伝送する、冗長回線システムに備えられる遅延調整装置であって、
    　前記遅延調整装置は、
    　　前記送信装置と前記受信装置との間を接続し、
    　　前記送信装置から前記第１経路を介して受信したフレームを第１バッファに一時的に記憶する第１送受信部と、
    　　前記送信装置から前記第２経路を介して受信したフレームを第２バッファに一時的に記憶する第２送受信部と、
    　　前記第１送受信部および前記第２送受信部におけるフレームの送信可能タイミングを一定間隔に制御する制御部と、を備え、
    　前記制御部は、
    　　前記送信装置から前記第１経路を介して受信した測定フレームの第１受信時刻と前記送信装置から前記第２経路を介して受信した当該測定フレームの第２受信時刻との差に基づいて遅延差時間を計算し、
    　　前記第１受信時刻が前記第２受信時刻より早い場合に、前記第１送受信部に前記遅延差時間を設定し、
    　　前記第２受信時刻が前記第１受信時刻より早い場合に、前記第２送受信部に前記遅延差時間を設定し、
    　前記第１送受信部は、
    　　前記遅延差時間が設定されている場合に、フレームを受信してから前記遅延差時間が経過した後の次の送信可能タイミングに前記第１バッファに記憶された当該フレームを前記受信装置へ送信し、
    　　前記遅延差時間が設定されていない場合に、フレームを受信した後の次の送信可能タイミングに前記第１バッファに記憶された当該フレームを前記受信装置へ送信し、
    　前記第２送受信部は、
    　　前記遅延差時間が設定されている場合に、フレームを受信してから前記遅延差時間が経過した後の次の送信可能タイミングに前記第２バッファに記憶された当該フレームを前記受信装置へ送信し、
    　　前記遅延差時間が設定されていない場合に、フレームを受信した後の次の送信可能タイミングに前記第２バッファに記憶された当該フレームを前記受信装置へ送信すること、
    　を特徴とする遅延調整装置。     A delay adjustment device provided in a redundant line system, in which a transmission device and a reception device are connected by two systems of a first route and a second route, and the first route and the second route transmit the same frame. hand,
    The delay adjustment device is
    connecting between the transmitting device and the receiving device;
    a first transmission/reception unit that temporarily stores frames received from the transmission device via the first path in a first buffer;
    a second transmitting/receiving unit that temporarily stores frames received from the transmitting device via the second path in a second buffer;
    a control unit that controls frame transmittable timings in the first transmitting/receiving unit and the second transmitting/receiving unit at regular intervals;
    The control unit
    A delay difference based on a difference between a first reception time of the measurement frame received from the transmission device via the first path and a second reception time of the measurement frame received from the transmission device via the second path calculate time,
    when the first reception time is earlier than the second reception time, setting the delay difference time in the first transmission/reception unit;
    when the second reception time is earlier than the first reception time, setting the delay difference time in the second transmission/reception unit;
    The first transceiver unit
    When the differential delay time is set, the frame stored in the first buffer is transmitted to the receiving device at the next transmittable timing after the differential delay time has elapsed since the frame was received. ,
    when the delay difference time is not set, transmitting the frame stored in the first buffer to the receiving device at the next transmittable timing after receiving the frame;
    The second transmission/reception unit is
    When the differential delay time is set, the frame stored in the second buffer is transmitted to the receiving device at the next transmittable timing after the differential delay time has elapsed since the frame was received. ,
    transmitting the frame stored in the second buffer to the receiving device at the next transmittable timing after the frame is received when the delay difference time is not set;
    A delay adjustment device characterized by:
  2. 　前記制御部は、
    　　前記第１受信時刻が前記第２受信時刻より早い場合に、前記遅延差時間が大きいほど、前記第１バッファのサイズを前記第２バッファに比して大きく設定し、
    　　前記第２受信時刻が前記第１受信時刻より早い場合に、前記遅延差時間が大きいほど、前記第２バッファのサイズを前記第１バッファに比して大きく設定すること、
    　を特徴とする請求項１に記載の遅延調整装置。     The control unit
    when the first reception time is earlier than the second reception time, setting the size of the first buffer larger than that of the second buffer as the delay difference time increases;
    setting the size of the second buffer larger than that of the first buffer as the delay difference time increases when the second reception time is earlier than the first reception time;
    The delay adjustment device according to claim 1, characterized by:
  3. 　送信装置と受信装置との間を第１経路および第２経路の２系統で接続し、前記第１経路および前記第２経路は同じフレームを伝送する、冗長回線システムであって、
    　前記送信装置と前記受信装置との間を接続する遅延調整装置を備え、
    　前記遅延調整装置は、
    　　前記送信装置から前記第１経路を介して受信したフレームを第１バッファに一時的に記憶する第１送受信部と、
    　　前記送信装置から前記第２経路を介して受信したフレームを第２バッファに一時的に記憶する第２送受信部と、
    　　前記第１送受信部および前記第２送受信部におけるフレームの送信可能タイミングを一定間隔に制御する制御部と、を備え、
    　前記制御部は、
    　　前記送信装置から前記第１経路を介して受信した測定フレームの第１受信時刻と前記送信装置から前記第２経路を介して受信した当該測定フレームの第２受信時刻との差に基づいて遅延差時間を計算し、
    　　前記第１受信時刻が前記第２受信時刻より早い場合に、前記第１送受信部に前記遅延差時間を設定し、
    　　前記第２受信時刻が前記第１受信時刻より早い場合に、前記第２送受信部に前記遅延差時間を設定し、
    　前記第１送受信部は、
    　　前記遅延差時間が設定されている場合に、フレームを受信してから前記遅延差時間が経過した後の次の送信可能タイミングに前記第１バッファに記憶された当該フレームを前記受信装置へ送信し、
    　　前記遅延差時間が設定されていない場合に、フレームを受信した後の次の送信可能タイミングに前記第１バッファに記憶された当該フレームを前記受信装置へ送信し、
    　前記第２送受信部は、
    　　前記遅延差時間が設定されている場合に、フレームを受信してから前記遅延差時間が経過した後の次の送信可能タイミングに前記第２バッファに記憶された当該フレームを前記受信装置へ送信し、
    　　前記遅延差時間が設定されていない場合に、フレームを受信した後の次の送信可能タイミングに前記第２バッファに記憶された当該フレームを前記受信装置へ送信すること、
    　を特徴とする冗長回線システム。     A redundant line system in which a transmitting device and a receiving device are connected by two systems of a first route and a second route, and the first route and the second route transmit the same frame,
    A delay adjustment device connecting between the transmitting device and the receiving device,
    The delay adjustment device is
    a first transmission/reception unit that temporarily stores frames received from the transmission device via the first path in a first buffer;
    a second transmitting/receiving unit that temporarily stores frames received from the transmitting device via the second path in a second buffer;
    a control unit that controls frame transmittable timings in the first transmitting/receiving unit and the second transmitting/receiving unit at regular intervals;
    The control unit
    A delay difference based on a difference between a first reception time of the measurement frame received from the transmission device via the first path and a second reception time of the measurement frame received from the transmission device via the second path calculate time,
    when the first reception time is earlier than the second reception time, setting the delay difference time in the first transmission/reception unit;
    when the second reception time is earlier than the first reception time, setting the delay difference time in the second transmission/reception unit;
    The first transceiver unit
    When the differential delay time is set, the frame stored in the first buffer is transmitted to the receiving device at the next transmittable timing after the differential delay time has elapsed since the frame was received. ,
    when the delay difference time is not set, transmitting the frame stored in the first buffer to the receiving device at the next transmittable timing after receiving the frame;
    The second transmission/reception unit is
    When the differential delay time is set, the frame stored in the second buffer is transmitted to the receiving device at the next transmittable timing after the differential delay time has elapsed since the frame was received. ,
    transmitting the frame stored in the second buffer to the receiving device at the next transmittable timing after the frame is received when the delay difference time is not set;
    A redundant line system characterized by:
  4. 　前記制御部は、
    　　前記第１受信時刻が前記第２受信時刻より早い場合に、前記遅延差時間が大きいほど、前記第１バッファのサイズを前記第２バッファに比して大きく設定し、
    　　前記第２受信時刻が前記第１受信時刻より早い場合に、前記遅延差時間が大きいほど、前記第２バッファのサイズを前記第１バッファに比して大きく設定すること、
    　を特徴とする請求項３に記載の冗長回線システム。     The control unit
    when the first reception time is earlier than the second reception time, setting the size of the first buffer larger than that of the second buffer as the delay difference time increases;
    setting the size of the second buffer larger than that of the first buffer as the delay difference time increases when the second reception time is earlier than the first reception time;
    4. The redundant line system according to claim 3, characterized by:
PCT/JP2021/032885 2021-09-07 2021-09-07 Delay adjustment device and redundant line system WO2023037416A1 (en)

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Publication number Priority date Publication date Assignee Title
JP2003018203A (en) * 2001-07-03 2003-01-17 Fujitsu Ltd Transmission device
JP2012114660A (en) * 2010-11-24 2012-06-14 Hitachi Ltd Packet transfer device and packet transfer method
JP2012178665A (en) * 2011-02-25 2012-09-13 Nippon Telegr & Teleph Corp <Ntt> Uninterruptible packet transmission device and uninterruptible packet transmission method
JP2013110659A (en) * 2011-11-24 2013-06-06 Oki Electric Ind Co Ltd Gateway unit
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